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authorAndre Maasikas <amaasikas@gmail.com>2009-10-05 09:38:52 +0300
committerAndre Maasikas <amaasikas@gmail.com>2009-10-06 16:17:03 +0300
commitec58dac86d3068b47c5a4e0187ef56985dcbf75c (patch)
tree5de9fc41a5b990f3e55e5d4701f3d1c2c830662f /src
parent340436d8d2f5f6360c2920de3a7547af95deb8f6 (diff)
r600: r700PredictRenderSize can flush, so move index buffer setup after it
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/r600/r700_render.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/r600/r700_render.c b/src/mesa/drivers/dri/r600/r700_render.c
index 0aef0b7ea1..4f39d9f1bd 100644
--- a/src/mesa/drivers/dri/r600/r700_render.c
+++ b/src/mesa/drivers/dri/r600/r700_render.c
@@ -960,7 +960,6 @@ static GLboolean r700TryDrawPrims(GLcontext *ctx,
_tnl_UpdateFixedFunctionProgram(ctx);
r700SetVertexFormat(ctx, arrays, max_index + 1);
- r700SetupIndexBuffer(ctx, ib);
/* shaders need to be updated before buffers are validated */
r700UpdateShaders2(ctx);
if (!r600ValidateBuffers(ctx))
@@ -981,6 +980,7 @@ static GLboolean r700TryDrawPrims(GLcontext *ctx,
GLuint emit_end = r700PredictRenderSize(ctx, nr_prims)
+ context->radeon.cmdbuf.cs->cdw;
+ r700SetupIndexBuffer(ctx, ib);
r700SetupStreams2(ctx, arrays, max_index + 1);
radeonEmitState(radeon);