diff options
| -rw-r--r-- | ir_to_mesa.cpp | 37 | ||||
| -rw-r--r-- | ir_to_mesa.h | 20 | ||||
| -rw-r--r-- | mesa_codegen.brg | 67 |
3 files changed, 59 insertions, 65 deletions
diff --git a/ir_to_mesa.cpp b/ir_to_mesa.cpp index 77a8822934..1bdb61801c 100644 --- a/ir_to_mesa.cpp +++ b/ir_to_mesa.cpp @@ -77,23 +77,40 @@ ir_to_mesa_emit_op3(struct mbtree *tree, enum prog_opcode op, ir_to_mesa_instruction * -ir_to_mesa_emit_op2(struct mbtree *tree, enum prog_opcode op, - ir_to_mesa_dst_reg dst, - ir_to_mesa_src_reg src0, - ir_to_mesa_src_reg src1) +ir_to_mesa_emit_op2_full(struct mbtree *tree, enum prog_opcode op, + ir_to_mesa_dst_reg dst, + ir_to_mesa_src_reg src0, + ir_to_mesa_src_reg src1) { return ir_to_mesa_emit_op3(tree, op, dst, src0, src1, ir_to_mesa_undef); } ir_to_mesa_instruction * -ir_to_mesa_emit_op1(struct mbtree *tree, enum prog_opcode op, - ir_to_mesa_dst_reg dst, - ir_to_mesa_src_reg src0) +ir_to_mesa_emit_op2(struct mbtree *tree, enum prog_opcode op) +{ + return ir_to_mesa_emit_op2_full(tree, op, + tree->dst_reg, + tree->left->src_reg, + tree->right->src_reg); +} + +ir_to_mesa_instruction * +ir_to_mesa_emit_op1_full(struct mbtree *tree, enum prog_opcode op, + ir_to_mesa_dst_reg dst, + ir_to_mesa_src_reg src0) { return ir_to_mesa_emit_op3(tree, op, dst, src0, ir_to_mesa_undef, ir_to_mesa_undef); } +ir_to_mesa_instruction * +ir_to_mesa_emit_op1(struct mbtree *tree, enum prog_opcode op) +{ + return ir_to_mesa_emit_op1_full(tree, op, + tree->dst_reg, + tree->left->src_reg); +} + /** * Emits Mesa scalar opcodes to produce unique answers across channels. * @@ -131,9 +148,9 @@ ir_to_mesa_emit_scalar_op1(struct mbtree *tree, enum prog_opcode op, src.swizzle = MAKE_SWIZZLE4(src_swiz, src_swiz, src_swiz, src_swiz); - inst = ir_to_mesa_emit_op1(tree, op, - dst, - src); + inst = ir_to_mesa_emit_op1_full(tree, op, + dst, + src); inst->dst_reg.writemask = this_mask; done_mask |= this_mask; } diff --git a/ir_to_mesa.h b/ir_to_mesa.h index fbf10d86bb..ee776bd55f 100644 --- a/ir_to_mesa.h +++ b/ir_to_mesa.h @@ -145,15 +145,21 @@ public: }; ir_to_mesa_instruction * -ir_to_mesa_emit_op1(struct mbtree *tree, enum prog_opcode op, - ir_to_mesa_dst_reg dst, - ir_to_mesa_src_reg src0); +ir_to_mesa_emit_op1(struct mbtree *tree, enum prog_opcode op); ir_to_mesa_instruction * -ir_to_mesa_emit_op2(struct mbtree *tree, enum prog_opcode op, - ir_to_mesa_dst_reg dst, - ir_to_mesa_src_reg src0, - ir_to_mesa_src_reg src1); +ir_to_mesa_emit_op1_full(struct mbtree *tree, enum prog_opcode op, + ir_to_mesa_dst_reg dst, + ir_to_mesa_src_reg src0); + +ir_to_mesa_instruction * +ir_to_mesa_emit_op2(struct mbtree *tree, enum prog_opcode op); + +ir_to_mesa_instruction * +ir_to_mesa_emit_op2_full(struct mbtree *tree, enum prog_opcode op, + ir_to_mesa_dst_reg dst, + ir_to_mesa_src_reg src0, + ir_to_mesa_src_reg src1); ir_to_mesa_instruction * ir_to_mesa_emit_op3(struct mbtree *tree, enum prog_opcode op, diff --git a/mesa_codegen.brg b/mesa_codegen.brg index 5e7953b75c..e52798bcf5 100644 --- a/mesa_codegen.brg +++ b/mesa_codegen.brg @@ -110,9 +110,9 @@ vec4: reference_vec4 0 # which would clean these up. stmt: assign(vec4, vec4) 1 { - ir_to_mesa_emit_op1(tree, OPCODE_MOV, - tree->left->dst_reg, - tree->right->src_reg); + ir_to_mesa_emit_op1_full(tree, OPCODE_MOV, + tree->left->dst_reg, + tree->right->src_reg); } # Perform a swizzle by composing our swizzle with the swizzle @@ -131,60 +131,31 @@ vec4: swizzle_vec4(vec4) 1 } reg.swizzle = MAKE_SWIZZLE4(swiz[0], swiz[1], swiz[2], swiz[3]); - ir_to_mesa_emit_op1(tree, OPCODE_MOV, - tree->dst_reg, - reg); + ir_to_mesa_emit_op1_full(tree, OPCODE_MOV, + tree->dst_reg, + reg); } -vec4: add_vec4_vec4(vec4, vec4) 1 -{ - ir_to_mesa_emit_op2(tree, OPCODE_ADD, - tree->dst_reg, - tree->left->src_reg, - tree->right->src_reg); -} - -vec4: sub_vec4_vec4(vec4, vec4) 1 -{ - ir_to_mesa_emit_op2(tree, OPCODE_SUB, - tree->dst_reg, - tree->left->src_reg, - tree->right->src_reg); -} - -vec4: mul_vec4_vec4(vec4, vec4) 1 -{ - ir_to_mesa_emit_op2(tree, OPCODE_MUL, - tree->dst_reg, - tree->left->src_reg, - tree->right->src_reg); -} +vec4: add_vec4_vec4(vec4, vec4) 1 { ir_to_mesa_emit_op2(tree, OPCODE_ADD); } +vec4: sub_vec4_vec4(vec4, vec4) 1 { ir_to_mesa_emit_op2(tree, OPCODE_SUB); } +vec4: mul_vec4_vec4(vec4, vec4) 1 { ir_to_mesa_emit_op2(tree, OPCODE_MUL); } vec4: dp4_vec4_vec4(vec4, vec4) 1 { - ir_to_mesa_emit_op2(tree, OPCODE_DP4, - tree->dst_reg, - tree->left->src_reg, - tree->right->src_reg); + ir_to_mesa_emit_op2(tree, OPCODE_DP4); tree->src_reg.swizzle = SWIZZLE_XXXX; } vec4: dp3_vec4_vec4(vec4, vec4) 1 { - ir_to_mesa_emit_op2(tree, OPCODE_DP3, - tree->dst_reg, - tree->left->src_reg, - tree->right->src_reg); + ir_to_mesa_emit_op2(tree, OPCODE_DP3); tree->src_reg.swizzle = SWIZZLE_XXXX; } vec4: dp2_vec4_vec4(vec4, vec4) 1 { - ir_to_mesa_emit_op2(tree, OPCODE_DP2, - tree->dst_reg, - tree->left->src_reg, - tree->right->src_reg); + ir_to_mesa_emit_op2(tree, OPCODE_DP2); tree->src_reg.swizzle = SWIZZLE_XXXX; } @@ -194,10 +165,10 @@ vec4: div_vec4_vec4(vec4, vec4) 1 tree->dst_reg, tree->right->src_reg); - ir_to_mesa_emit_op2(tree, OPCODE_MUL, - tree->dst_reg, - tree->src_reg, - tree->left->src_reg); + ir_to_mesa_emit_op2_full(tree, OPCODE_MUL, + tree->dst_reg, + tree->src_reg, + tree->left->src_reg); } vec4: sqrt_vec4(vec4) 1 @@ -206,9 +177,9 @@ vec4: sqrt_vec4(vec4) 1 tree->dst_reg, tree->left->src_reg); - ir_to_mesa_emit_op1(tree, OPCODE_RCP, - tree->dst_reg, - tree->src_reg); + ir_to_mesa_emit_op1_full(tree, OPCODE_RCP, + tree->dst_reg, + tree->src_reg); } vec4: rsq_vec4(vec4) 1 |