diff options
134 files changed, 3131 insertions, 10010 deletions
@@ -180,7 +180,7 @@ ultrix-gcc: # Rules for making release tarballs -VERSION=7.8-devel +VERSION=7.9-devel DIRECTORY = Mesa-$(VERSION) LIB_NAME = MesaLib-$(VERSION) DEMO_NAME = MesaDemos-$(VERSION) @@ -215,7 +215,6 @@ MAIN_FILES = \ $(DIRECTORY)/include/GL/glx_mangle.h \ $(DIRECTORY)/include/GL/glfbdev.h \ $(DIRECTORY)/include/GL/mesa_wgl.h \ - $(DIRECTORY)/include/GL/mglmesa.h \ $(DIRECTORY)/include/GL/osmesa.h \ $(DIRECTORY)/include/GL/vms_x_fix.h \ $(DIRECTORY)/include/GL/wglext.h \ diff --git a/configs/autoconf.in b/configs/autoconf.in index 30637877f3..510d658b11 100644 --- a/configs/autoconf.in +++ b/configs/autoconf.in @@ -83,7 +83,6 @@ PROGRAM_DIRS = @PROGRAM_DIRS@ # Driver specific build vars DRI_DIRS = @DRI_DIRS@ -WINDOW_SYSTEM = @WINDOW_SYSTEM@ EGL_DISPLAYS = @EGL_DISPLAYS@ # Dependencies diff --git a/configs/default b/configs/default index ad6d93c92f..4fe64cc6c9 100644 --- a/configs/default +++ b/configs/default @@ -9,7 +9,7 @@ CONFIG_NAME = default # Version info MESA_MAJOR=7 -MESA_MINOR=8 +MESA_MINOR=9 MESA_TINY=0 MESA_VERSION = $(MESA_MAJOR).$(MESA_MINOR).$(MESA_TINY) diff --git a/configs/freebsd-dri b/configs/freebsd-dri index 0b91cfc37e..2c697e1c6e 100644 --- a/configs/freebsd-dri +++ b/configs/freebsd-dri @@ -44,7 +44,6 @@ GLW_LIB_DEPS = -L$(TOP)/$(LIB_DIR) -L/usr/local/lib -lGL -lXt -lX11 SRC_DIRS = glx gallium mesa glu glut/glx glew glw DRIVER_DIRS = dri PROGRAM_DIRS = -WINDOW_SYSTEM=dri DRM_SOURCE_PATH=$(TOP)/../drm diff --git a/configs/linux-dri b/configs/linux-dri index e8e8ccfcf9..b75273946d 100644 --- a/configs/linux-dri +++ b/configs/linux-dri @@ -58,7 +58,6 @@ PROGRAM_DIRS := egl $(PROGRAM_DIRS) EGL_DRIVERS_DIRS = glx DRIVER_DIRS = dri -WINDOW_SYSTEM = dri GALLIUM_WINSYS_DIRS = drm GALLIUM_WINSYS_DRM_DIRS = vmware intel i965 GALLIUM_STATE_TRACKERS_DIRS = egl diff --git a/configs/linux-dri-xcb b/configs/linux-dri-xcb index c5ed89c4b3..1ed980aa36 100644 --- a/configs/linux-dri-xcb +++ b/configs/linux-dri-xcb @@ -51,7 +51,5 @@ SRC_DIRS = glx gallium mesa glu glut/glx glew glw PROGRAM_DIRS = xdemos DRIVER_DIRS = dri -WINDOW_SYSTEM=dri - DRI_DIRS = i810 i915 mach64 mga r128 r200 r300 radeon \ savage sis tdfx unichrome diff --git a/configs/linux-egl b/configs/linux-egl index 2c2834b81d..a8910018fc 100644 --- a/configs/linux-egl +++ b/configs/linux-egl @@ -51,7 +51,6 @@ SRC_DIRS = gallium mesa gallium/winsys glu egl PROGRAM_DIRS = egl DRIVER_DIRS = dri -WINDOW_SYSTEM = dri GALLIUM_WINSYS_DIRS = egl_drm DRI_DIRS = intel diff --git a/configs/linux-indirect b/configs/linux-indirect index 0914fba19b..1c7dd857db 100644 --- a/configs/linux-indirect +++ b/configs/linux-indirect @@ -50,4 +50,3 @@ GL_LIB_DEPS = $(EXTRA_LIB_PATH) -lX11 -lXext -lXxf86vm -lm -lpthread -ldl SRC_DIRS = glx glu glut/glx glew glw DRIVER_DIRS = PROGRAM_DIRS = -WINDOW_SYSTEM=dri diff --git a/configure.ac b/configure.ac index 8ca274932c..70e158f5d7 100644 --- a/configure.ac +++ b/configure.ac @@ -457,7 +457,6 @@ CORE_DIRS="glsl mesa" SRC_DIRS="glew" GLU_DIRS="sgi" -WINDOW_SYSTEM="" GALLIUM_DIRS="auxiliary drivers state_trackers" GALLIUM_WINSYS_DIRS="" GALLIUM_WINSYS_DRM_DIRS="" @@ -472,7 +471,6 @@ xlib) dri) SRC_DIRS="$SRC_DIRS glx" DRIVER_DIRS="dri" - WINDOW_SYSTEM="dri" GALLIUM_WINSYS_DIRS="$GALLIUM_WINSYS_DIRS drm" ;; osmesa) @@ -482,7 +480,6 @@ esac AC_SUBST([SRC_DIRS]) AC_SUBST([GLU_DIRS]) AC_SUBST([DRIVER_DIRS]) -AC_SUBST([WINDOW_SYSTEM]) AC_SUBST([GALLIUM_DIRS]) AC_SUBST([GALLIUM_WINSYS_DIRS]) AC_SUBST([GALLIUM_WINSYS_DRM_DIRS]) diff --git a/docs/relnotes-7.9.html b/docs/relnotes-7.9.html new file mode 100644 index 0000000000..f7d5016dc6 --- /dev/null +++ b/docs/relnotes-7.9.html @@ -0,0 +1,50 @@ +<HTML> + +<TITLE>Mesa Release Notes</TITLE> + +<head><link rel="stylesheet" type="text/css" href="mesa.css"></head> + +<BODY> + +<body bgcolor="#eeeeee"> + +<H1>Mesa 7.9 Release Notes / date TBD</H1> + +<p> +Mesa 7.9 is a new development release. +People who are concerned with stability and reliability should stick +with a previous release or wait for Mesa 7.9.1. +</p> +<p> +Mesa 7.9 implements the OpenGL 2.1 API, but the version reported by +glGetString(GL_VERSION) depends on the particular driver being used. +Some drivers don't support all the features required in OpenGL 2.1. +</p> +<p> +See the <a href="install.html">Compiling/Installing page</a> for prerequisites +for DRI hardware acceleration. +</p> + + +<h2>MD5 checksums</h2> +<pre> +tbd +</pre> + + +<h2>New features</h2> +<ul> +</ul> + + +<h2>Bug fixes</h2> +<ul> +</ul> + + +<h2>Changes</h2> +<ul> +</ul> + +</body> +</html> diff --git a/include/GL/glut_h.dja b/include/GL/glut_h.dja deleted file mode 100644 index e76dcb985e..0000000000 --- a/include/GL/glut_h.dja +++ /dev/null @@ -1,340 +0,0 @@ - -/* - * Mesa 3-D graphics library - * Version: 3.1 - * Copyright (C) 1995-1998 Brian Paul - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Library General Public - * License as published by the Free Software Foundation; either - * version 2 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Library General Public License for more details. - * - * You should have received a copy of the GNU Library General Public - * License along with this library; if not, write to the Free - * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - - -/* - * This header file is based on the REAL glut.h by Mark J. Kilgard. - * - * The DJGPP/ALLEGRO (DJA) GLUT implementation was written by - * Bernhard Tschirren (bernie-t@geocities.com) for the sole purpose - * of compiling all the sample programs (which use GLUT). Therefore, - * is NOT AT ALL a complete version of GLUT! - */ - - -#ifndef __AGLUT_H__ -#define __AGLUT_H__ - -#include <GL/gl.h> -#include <GL/glu.h> - -#define GLUTCALLBACK -#define APIENTRY -#define GLUTAPI extern - -#define GLUT_RGB 0 -#define GLUT_RGBA GLUT_RGB -#define GLUT_INDEX 1 -#define GLUT_SINGLE 0 -#define GLUT_DOUBLE 2 -#define GLUT_ACCUM 4 -#define GLUT_ALPHA 8 -#define GLUT_DEPTH 16 -#define GLUT_STENCIL 32 - -/* Mouse buttons. */ -#define GLUT_LEFT_BUTTON 0 -#define GLUT_MIDDLE_BUTTON 1 -#define GLUT_RIGHT_BUTTON 2 - -/* Mouse button state. */ -#define GLUT_DOWN 0 -#define GLUT_UP 1 - -/* function keys */ -#define GLUT_KEY_F1 1 -#define GLUT_KEY_F2 2 -#define GLUT_KEY_F3 3 -#define GLUT_KEY_F4 4 -#define GLUT_KEY_F5 5 -#define GLUT_KEY_F6 6 -#define GLUT_KEY_F7 7 -#define GLUT_KEY_F8 8 -#define GLUT_KEY_F9 9 -#define GLUT_KEY_F10 10 -#define GLUT_KEY_F11 11 -#define GLUT_KEY_F12 12 - -/* directional keys */ -#define GLUT_KEY_LEFT 100 -#define GLUT_KEY_UP 101 -#define GLUT_KEY_RIGHT 102 -#define GLUT_KEY_DOWN 103 -#define GLUT_KEY_PAGE_UP 104 -#define GLUT_KEY_PAGE_DOWN 105 -#define GLUT_KEY_HOME 106 -#define GLUT_KEY_END 107 -#define GLUT_KEY_INSERT 108 - -/* Entry/exit state. */ -#define GLUT_LEFT 0 -#define GLUT_ENTERED 1 - -/* Visibility state. */ -#define GLUT_NOT_VISIBLE 0 -#define GLUT_VISIBLE 1 - -/* Color index component selection values. */ -#define GLUT_RED 0 -#define GLUT_GREEN 1 -#define GLUT_BLUE 2 - -/* Layers for use. */ -#define GLUT_NORMAL 0 -#define GLUT_OVERLAY 1 - -/* Stroke font constants (use these in GLUT program). */ -#define GLUT_STROKE_ROMAN ((void*)0) -#define GLUT_STROKE_MONO_ROMAN ((void*)1) - -/* Bitmap font constants (use these in GLUT program). */ -#define GLUT_BITMAP_9_BY_15 ((void*)2) -#define GLUT_BITMAP_8_BY_13 ((void*)3) -#define GLUT_BITMAP_TIMES_ROMAN_10 ((void*)4) -#define GLUT_BITMAP_TIMES_ROMAN_24 ((void*)5) -#define GLUT_BITMAP_HELVETICA_10 ((void*)6) -#define GLUT_BITMAP_HELVETICA_12 ((void*)7) -#define GLUT_BITMAP_HELVETICA_18 ((void*)8) - -/* glutGet parameters. */ -#define GLUT_WINDOW_X 100 -#define GLUT_WINDOW_Y 101 -#define GLUT_WINDOW_WIDTH 102 -#define GLUT_WINDOW_HEIGHT 103 -#define GLUT_WINDOW_BUFFER_SIZE 104 -#define GLUT_WINDOW_STENCIL_SIZE 105 -#define GLUT_WINDOW_DEPTH_SIZE 106 -#define GLUT_WINDOW_RED_SIZE 107 -#define GLUT_WINDOW_GREEN_SIZE 108 -#define GLUT_WINDOW_BLUE_SIZE 109 -#define GLUT_WINDOW_ALPHA_SIZE 110 -#define GLUT_WINDOW_ACCUM_RED_SIZE 111 -#define GLUT_WINDOW_ACCUM_GREEN_SIZE 112 -#define GLUT_WINDOW_ACCUM_BLUE_SIZE 113 -#define GLUT_WINDOW_ACCUM_ALPHA_SIZE 114 -#define GLUT_WINDOW_DOUBLEBUFFER 115 -#define GLUT_WINDOW_RGBA 116 -#define GLUT_WINDOW_PARENT 117 -#define GLUT_WINDOW_NUM_CHILDREN 118 -#define GLUT_WINDOW_COLORMAP_SIZE 119 -#define GLUT_WINDOW_NUM_SAMPLES 120 -#define GLUT_WINDOW_STEREO 121 -#define GLUT_WINDOW_CURSOR 122 -#define GLUT_SCREEN_WIDTH 200 -#define GLUT_SCREEN_HEIGHT 201 -#define GLUT_SCREEN_WIDTH_MM 202 -#define GLUT_SCREEN_HEIGHT_MM 203 -#define GLUT_MENU_NUM_ITEMS 300 -#define GLUT_DISPLAY_MODE_POSSIBLE 400 -#define GLUT_INIT_WINDOW_X 500 -#define GLUT_INIT_WINDOW_Y 501 -#define GLUT_INIT_WINDOW_WIDTH 502 -#define GLUT_INIT_WINDOW_HEIGHT 503 -#define GLUT_INIT_DISPLAY_MODE 504 -#define GLUT_ELAPSED_TIME 700 -#define GLUT_WINDOW_FORMAT_ID 123 - -/* glutDeviceGet parameters. */ -#define GLUT_HAS_KEYBOARD 600 -#define GLUT_HAS_MOUSE 601 -#define GLUT_HAS_SPACEBALL 602 -#define GLUT_HAS_DIAL_AND_BUTTON_BOX 603 -#define GLUT_HAS_TABLET 604 -#define GLUT_NUM_MOUSE_BUTTONS 605 -#define GLUT_NUM_SPACEBALL_BUTTONS 606 -#define GLUT_NUM_BUTTON_BOX_BUTTONS 607 -#define GLUT_NUM_DIALS 608 -#define GLUT_NUM_TABLET_BUTTONS 609 -#define GLUT_DEVICE_IGNORE_KEY_REPEAT 610 -#define GLUT_DEVICE_KEY_REPEAT 611 -#define GLUT_HAS_JOYSTICK 612 -#define GLUT_OWNS_JOYSTICK 613 -#define GLUT_JOYSTICK_BUTTONS 614 -#define GLUT_JOYSTICK_AXES 615 -#define GLUT_JOYSTICK_POLL_RATE 616 - -/* glutLayerGet parameters. */ -#define GLUT_OVERLAY_POSSIBLE 800 -#define GLUT_LAYER_IN_USE 801 -#define GLUT_HAS_OVERLAY 802 -#define GLUT_TRANSPARENT_INDEX 803 -#define GLUT_NORMAL_DAMAGED 804 -#define GLUT_OVERLAY_DAMAGED 805 - -/* glutVideoResizeGet parameters. */ -#define GLUT_VIDEO_RESIZE_POSSIBLE 900 -#define GLUT_VIDEO_RESIZE_IN_USE 901 -#define GLUT_VIDEO_RESIZE_X_DELTA 902 -#define GLUT_VIDEO_RESIZE_Y_DELTA 903 -#define GLUT_VIDEO_RESIZE_WIDTH_DELTA 904 -#define GLUT_VIDEO_RESIZE_HEIGHT_DELTA 905 -#define GLUT_VIDEO_RESIZE_X 906 -#define GLUT_VIDEO_RESIZE_Y 907 -#define GLUT_VIDEO_RESIZE_WIDTH 908 -#define GLUT_VIDEO_RESIZE_HEIGHT 909 - -/* glutUseLayer parameters. */ -#define GLUT_NORMAL 0 -#define GLUT_OVERLAY 1 - -/* glutGetModifiers return mask. */ -#define GLUT_ACTIVE_SHIFT 1 -#define GLUT_ACTIVE_CTRL 2 -#define GLUT_ACTIVE_ALT 4 - -/* glutSetCursor parameters. */ -/* Basic arrows. */ -#define GLUT_CURSOR_RIGHT_ARROW 0 -#define GLUT_CURSOR_LEFT_ARROW 1 -/* Symbolic cursor shapes. */ -#define GLUT_CURSOR_INFO 2 -#define GLUT_CURSOR_DESTROY 3 -#define GLUT_CURSOR_HELP 4 -#define GLUT_CURSOR_CYCLE 5 -#define GLUT_CURSOR_SPRAY 6 -#define GLUT_CURSOR_WAIT 7 -#define GLUT_CURSOR_TEXT 8 -#define GLUT_CURSOR_CROSSHAIR 9 -/* Directional cursors. */ -#define GLUT_CURSOR_UP_DOWN 10 -#define GLUT_CURSOR_LEFT_RIGHT 11 -/* Sizing cursors. */ -#define GLUT_CURSOR_TOP_SIDE 12 -#define GLUT_CURSOR_BOTTOM_SIDE 13 -#define GLUT_CURSOR_LEFT_SIDE 14 -#define GLUT_CURSOR_RIGHT_SIDE 15 -#define GLUT_CURSOR_TOP_LEFT_CORNER 16 -#define GLUT_CURSOR_TOP_RIGHT_CORNER 17 -#define GLUT_CURSOR_BOTTOM_RIGHT_CORNER 18 -#define GLUT_CURSOR_BOTTOM_LEFT_CORNER 19 -/* Inherit from parent window. */ -#define GLUT_CURSOR_INHERIT 100 -/* Blank cursor. */ -#define GLUT_CURSOR_NONE 101 -/* Fullscreen crosshair (if available). */ -#define GLUT_CURSOR_FULL_CROSSHAIR 102 - -/* GLUT initialization sub-API. */ -GLUTAPI void APIENTRY glutInit(int *argcp, char **argv); -GLUTAPI void APIENTRY glutInitDisplayMode(unsigned int mode); -GLUTAPI void APIENTRY glutInitWindowPosition(int x, int y); -GLUTAPI void APIENTRY glutInitWindowSize(int width, int height); -GLUTAPI void APIENTRY glutMainLoop(void); - -/* GLUT window sub-API. */ -GLUTAPI int APIENTRY glutCreateWindow(const char *title); -GLUTAPI int APIENTRY glutCreateSubWindow(int win, int x, int y, int width, int height); -GLUTAPI void APIENTRY glutDestroyWindow(int win); -GLUTAPI void APIENTRY glutPostRedisplay(void); -GLUTAPI void APIENTRY glutSwapBuffers(void); -GLUTAPI int APIENTRY glutGetWindow(void); -GLUTAPI void APIENTRY glutSetWindow(int win); -GLUTAPI void APIENTRY glutSetWindowTitle(const char *title); -GLUTAPI void APIENTRY glutSetIconTitle(const char *title); -GLUTAPI void APIENTRY glutPositionWindow(int x, int y); -GLUTAPI void APIENTRY glutReshapeWindow(int width, int height); -GLUTAPI void APIENTRY glutPopWindow(void); -GLUTAPI void APIENTRY glutPushWindow(void); -GLUTAPI void APIENTRY glutIconifyWindow(void); -GLUTAPI void APIENTRY glutShowWindow(void); -GLUTAPI void APIENTRY glutHideWindow(void); - -/* GLUT overlay sub-API. */ -GLUTAPI void APIENTRY glutEstablishOverlay(void); -GLUTAPI void APIENTRY glutRemoveOverlay(void); -GLUTAPI void APIENTRY glutUseLayer(GLenum layer); -GLUTAPI void APIENTRY glutPostOverlayRedisplay(void); -GLUTAPI void APIENTRY glutShowOverlay(void); -GLUTAPI void APIENTRY glutHideOverlay(void); - -/* GLUT menu sub-API. */ -GLUTAPI int APIENTRY glutCreateMenu(void (GLUTCALLBACK *)(int)); -GLUTAPI void APIENTRY glutDestroyMenu(int menu); -GLUTAPI int APIENTRY glutGetMenu(void); -GLUTAPI void APIENTRY glutSetMenu(int menu); -GLUTAPI void APIENTRY glutAddMenuEntry(const char *label, int value); -GLUTAPI void APIENTRY glutAddSubMenu(const char *label, int submenu); -GLUTAPI void APIENTRY glutChangeToMenuEntry(int item, const char *label, int value); -GLUTAPI void APIENTRY glutChangeToSubMenu(int item, const char *label, int submenu); -GLUTAPI void APIENTRY glutRemoveMenuItem(int item); -GLUTAPI void APIENTRY glutAttachMenu(int button); -GLUTAPI void APIENTRY glutDetachMenu(int button); - -/* GLUT window callback sub-API. */ -GLUTAPI void APIENTRY glutDisplayFunc(void (GLUTCALLBACK * func)(void)); -GLUTAPI void APIENTRY glutReshapeFunc(void (GLUTCALLBACK * func)(int width, int height)); -GLUTAPI void APIENTRY glutKeyboardFunc(void (GLUTCALLBACK * func)(unsigned char key, int x, int y)); -GLUTAPI void APIENTRY glutMouseFunc(void (GLUTCALLBACK * func)(int button, int state, int x, int y)); -GLUTAPI void APIENTRY glutMotionFunc(void (GLUTCALLBACK * func)(int x, int y)); -GLUTAPI void APIENTRY glutPassiveMotionFunc(void (GLUTCALLBACK * func)(int x, int y)); -GLUTAPI void APIENTRY glutEntryFunc(void (GLUTCALLBACK * func)(int state)); -GLUTAPI void APIENTRY glutVisibilityFunc(void (GLUTCALLBACK * func)(int state)); -GLUTAPI void APIENTRY glutIdleFunc(void (GLUTCALLBACK * func)(void)); -GLUTAPI void APIENTRY glutTimerFunc(unsigned int millis, void (GLUTCALLBACK * func)(int value), int value); -GLUTAPI void APIENTRY glutMenuStateFunc(void (GLUTCALLBACK * func)(int state)); -GLUTAPI void APIENTRY glutSpecialFunc(void (GLUTCALLBACK * func)(int key, int x, int y)); -GLUTAPI void APIENTRY glutSpaceballMotionFunc(void (GLUTCALLBACK * func)(int x, int y, int z)); -GLUTAPI void APIENTRY glutSpaceballRotateFunc(void (GLUTCALLBACK * func)(int x, int y, int z)); -GLUTAPI void APIENTRY glutSpaceballButtonFunc(void (GLUTCALLBACK * func)(int button, int state)); -GLUTAPI void APIENTRY glutButtonBoxFunc(void (GLUTCALLBACK * func)(int button, int state)); -GLUTAPI void APIENTRY glutDialsFunc(void (GLUTCALLBACK * func)(int dial, int value)); -GLUTAPI void APIENTRY glutTabletMotionFunc(void (GLUTCALLBACK * func)(int x, int y)); -GLUTAPI void APIENTRY glutTabletButtonFunc(void (GLUTCALLBACK * func)(int button, int state, int x, int y)); -GLUTAPI void APIENTRY glutMenuStatusFunc(void (GLUTCALLBACK * func)(int status, int x, int y)); -GLUTAPI void APIENTRY glutOverlayDisplayFunc(void (GLUTCALLBACK * func)(void)); -GLUTAPI void APIENTRY glutWindowStatusFunc(void (GLUTCALLBACK * func)(int state)); - -/* GLUT color index sub-API. */ -GLUTAPI void APIENTRY glutSetColor(int, GLfloat red, GLfloat green, GLfloat blue); -GLUTAPI GLfloat APIENTRY glutGetColor(int ndx, int component); -GLUTAPI void APIENTRY glutCopyColormap(int win); - -/* GLUT state retrieval sub-API. */ -GLUTAPI int APIENTRY glutGet(GLenum type); -GLUTAPI int APIENTRY glutDeviceGet(GLenum type); - -/* GLUT font sub-API */ -GLUTAPI void APIENTRY glutBitmapCharacter(void *font, int character); -GLUTAPI int APIENTRY glutBitmapWidth(void *font, int character); -GLUTAPI void APIENTRY glutStrokeCharacter(void *font, int character); -GLUTAPI int APIENTRY glutStrokeWidth(void *font, int character); - -/* GLUT pre-built models sub-API */ -GLUTAPI void APIENTRY glutWireSphere(GLdouble radius, GLint slices, GLint stacks); -GLUTAPI void APIENTRY glutSolidSphere(GLdouble radius, GLint slices, GLint stacks); -GLUTAPI void APIENTRY glutWireCone(GLdouble base, GLdouble height, GLint slices, GLint stacks); -GLUTAPI void APIENTRY glutSolidCone(GLdouble base, GLdouble height, GLint slices, GLint stacks); -GLUTAPI void APIENTRY glutWireCube(GLdouble size); -GLUTAPI void APIENTRY glutSolidCube(GLdouble size); -GLUTAPI void APIENTRY glutWireTorus(GLdouble innerRadius, GLdouble outerRadius, GLint sides, GLint rings); -GLUTAPI void APIENTRY glutSolidTorus(GLdouble innerRadius, GLdouble outerRadius, GLint sides, GLint rings); -GLUTAPI void APIENTRY glutWireDodecahedron(void); -GLUTAPI void APIENTRY glutSolidDodecahedron(void); -GLUTAPI void APIENTRY glutWireTeapot(GLdouble size); -GLUTAPI void APIENTRY glutSolidTeapot(GLdouble size); -GLUTAPI void APIENTRY glutWireOctahedron(void); -GLUTAPI void APIENTRY glutSolidOctahedron(void); -GLUTAPI void APIENTRY glutWireTetrahedron(void); -GLUTAPI void APIENTRY glutSolidTetrahedron(void); -GLUTAPI void APIENTRY glutWireIcosahedron(void); -GLUTAPI void APIENTRY glutSolidIcosahedron(void); - -#endif /* __AGLUT_H__ */ diff --git a/include/GL/mglmesa.h b/include/GL/mglmesa.h deleted file mode 100644 index 0f9f789571..0000000000 --- a/include/GL/mglmesa.h +++ /dev/null @@ -1,79 +0,0 @@ -/**************************************************************************** -* -* Mesa bindings for SciTech MGL -* -* Copyright (C) 1996 SciTech Software. -* All rights reserved. -* -* Filename: mglmesa.h -* Version: Revision: 1.1.1.1 -* -* Language: ANSI C -* Environment: Any -* -* Description: Header file for the Mesa/OpenGL interface bindings for the -* SciTech MGL graphics library. Uses the MGL internal -* device context structures to get direct access to the -* high performance MGL rasterization functions for maximum -* performance. Utilizes the VESA VBE/AF Accelerator Functions -* via the MGL's accelerated device driver functions, as well -* as basic DirectDraw accelerated functions provided by the -* MGL. -* -* This library is free software; you can redistribute it and/or -* modify it under the terms of the GNU Library General Public -* License as published by the Free Software Foundation; either -* version 2 of the License, or (at your option) any later version. -* -* This library is distributed in the hope that it will be useful, -* but WITHOUT ANY WARRANTY; without even the implied warranty of -* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -* Library General Public License for more details. -* -* You should have received a copy of the GNU Library General Public -* License along with this library; if not, write to the Free -* Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -* -* -****************************************************************************/ - -#ifndef __MGLMESA_H -#define __MGLMESA_H - -#include "mgraph.h" - -/*------------------------- Function Prototypes ---------------------------*/ - -#ifdef __cplusplus -extern "C" { /* Use "C" linkage when in C++ mode */ -#endif - -#ifndef __WINDOWS__ -#define GLAPIENTRY -#endif - -#ifdef __WINDOWS__ -bool GLAPIENTRY MGLMesaInitDLL(MGLCallbacks *cb,char *version); -#endif -void GLAPIENTRY MGLMesaChooseVisual(MGLDC *dc,MGLVisual *visual); -bool GLAPIENTRY MGLMesaSetVisual(MGLDC *dc,MGLVisual *visual); -bool GLAPIENTRY MGLMesaCreateContext(MGLDC *dc,bool forceMemDC); -void GLAPIENTRY MGLMesaDestroyContext(MGLDC *dc); -void GLAPIENTRY MGLMesaMakeCurrent(MGLDC *dc); -void GLAPIENTRY MGLMesaSwapBuffers(MGLDC *dc,bool waitVRT); - -/* Palette manipulation support. The reason we provide palette manipulation - * routines is so that when rendering in double buffered modes with a - * software backbuffer, the palette for the backbuffer is kept consistent - * with the hardware front buffer. - */ - -void GLAPIENTRY MGLMesaSetPaletteEntry(MGLDC *dc,int entry,uchar red,uchar green,uchar blue); -void GLAPIENTRY MGLMesaSetPalette(MGLDC *dc,palette_t *pal,int numColors,int startIndex); -void GLAPIENTRY MGLMesaRealizePalette(MGLDC *dc,int numColors,int startIndex,int waitVRT); - -#ifdef __cplusplus -} /* End of "C" linkage for C++ */ -#endif /* __cplusplus */ - -#endif /* __MGLMESA_H */ diff --git a/progs/gallium/unit/u_format_test.c b/progs/gallium/unit/u_format_test.c index 2dfba5538b..5274311e03 100644 --- a/progs/gallium/unit/u_format_test.c +++ b/progs/gallium/unit/u_format_test.c @@ -30,546 +30,10 @@ #include <stdio.h> #include "util/u_format.h" +#include "util/u_format_tests.h" #include "util/u_format_pack.h" -#define MAX_PACKED_BYTES 16 - - -/** - * A (packed, unpacked) color pair. - */ -struct util_format_test_case -{ - enum pipe_format format; - - /** - * Mask of the bits that actually meaningful data. Used to mask out the - * "X" channels. - */ - uint8_t mask[MAX_PACKED_BYTES]; - - uint8_t packed[MAX_PACKED_BYTES]; - - /** - * RGBA. - */ - double unpacked[4]; -}; - - -/* - * Helper macros to create the packed bytes for longer words. - */ - -#define PACKED_1x8(x) {x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} -#define PACKED_2x8(x, y) {x, y, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} -#define PACKED_3x8(x, y, z) {x, y, z, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} -#define PACKED_4x8(x, y, z, w) {x, y, z, w, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} - -#define PACKED_1x16(x) {(x) & 0xff, (x) >> 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} -#define PACKED_2x16(x, y) {(x) & 0xff, (x) >> 8, (y) & 0xff, (y) >> 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} -#define PACKED_3x16(x, y, z) {(x) & 0xff, (x) >> 8, (y) & 0xff, (y) >> 8, (z) & 0xff, (z) >> 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} -#define PACKED_4x16(x, y, z, w) {(x) & 0xff, (x) >> 8, (y) & 0xff, (y) >> 8, (z) & 0xff, (z) >> 8, (w) & 0xff, (w) >> 8, 0, 0, 0, 0, 0, 0, 0, 0} - -#define PACKED_1x32(x) {(x) & 0xff, ((x) >> 8) & 0xff, ((x) >> 16) & 0xff, (x) >> 24, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} -#define PACKED_2x32(x, y) {(x) & 0xff, ((x) >> 8) & 0xff, ((x) >> 16) & 0xff, (x) >> 24, (y) & 0xff, ((y) >> 8) & 0xff, ((y) >> 16) & 0xff, (y) >> 24, 0, 0, 0, 0, 0, 0, 0, 0} -#define PACKED_3x32(x, y, z) {(x) & 0xff, ((x) >> 8) & 0xff, ((x) >> 16) & 0xff, (x) >> 24, (y) & 0xff, ((y) >> 8) & 0xff, ((y) >> 16) & 0xff, (y) >> 24, (z) & 0xff, ((z) >> 8) & 0xff, ((z) >> 16) & 0xff, (z) >> 24, 0, 0, 0, 0} -#define PACKED_4x32(x, y, z, w) {(x) & 0xff, ((x) >> 8) & 0xff, ((x) >> 16) & 0xff, (x) >> 24, (y) & 0xff, ((y) >> 8) & 0xff, ((y) >> 16) & 0xff, (y) >> 24, (z) & 0xff, ((z) >> 8) & 0xff, ((z) >> 16) & 0xff, (z) >> 24, (w) & 0xff, ((w) >> 8) & 0xff, ((w) >> 16) & 0xff, (w) >> 24} - - -/** - * Test cases. - * - * These were manually entered. We could generate these - * - * To keep this to a we cover only the corner cases, which should produce - * good enough coverage since that pixel format transformations are afine for - * non SRGB formats. - */ -static const struct util_format_test_case -test_cases[] = -{ - - /* - * 32-bit rendertarget formats - */ - - {PIPE_FORMAT_B8G8R8A8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x00000000), {0.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_B8G8R8A8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x000000ff), {0.0, 0.0, 1.0, 0.0}}, - {PIPE_FORMAT_B8G8R8A8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x0000ff00), {0.0, 1.0, 0.0, 0.0}}, - {PIPE_FORMAT_B8G8R8A8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x00ff0000), {1.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_B8G8R8A8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0xff000000), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_B8G8R8A8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0xffffffff), {1.0, 1.0, 1.0, 1.0}}, - - {PIPE_FORMAT_B8G8R8X8_UNORM, PACKED_1x32(0x00ffffff), PACKED_1x32(0x00000000), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_B8G8R8X8_UNORM, PACKED_1x32(0x00ffffff), PACKED_1x32(0x000000ff), {0.0, 0.0, 1.0, 1.0}}, - {PIPE_FORMAT_B8G8R8X8_UNORM, PACKED_1x32(0x00ffffff), PACKED_1x32(0x0000ff00), {0.0, 1.0, 0.0, 1.0}}, - {PIPE_FORMAT_B8G8R8X8_UNORM, PACKED_1x32(0x00ffffff), PACKED_1x32(0x00ff0000), {1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_B8G8R8X8_UNORM, PACKED_1x32(0x00ffffff), PACKED_1x32(0xff000000), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_B8G8R8X8_UNORM, PACKED_1x32(0x00ffffff), PACKED_1x32(0xffffffff), {1.0, 1.0, 1.0, 1.0}}, - - {PIPE_FORMAT_A8R8G8B8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x00000000), {0.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_A8R8G8B8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x000000ff), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_A8R8G8B8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x0000ff00), {1.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_A8R8G8B8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x00ff0000), {0.0, 1.0, 0.0, 0.0}}, - {PIPE_FORMAT_A8R8G8B8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0xff000000), {0.0, 0.0, 1.0, 0.0}}, - {PIPE_FORMAT_A8R8G8B8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0xffffffff), {1.0, 1.0, 1.0, 1.0}}, - - {PIPE_FORMAT_X8R8G8B8_UNORM, PACKED_1x32(0xffffff00), PACKED_1x32(0x00000000), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_X8R8G8B8_UNORM, PACKED_1x32(0xffffff00), PACKED_1x32(0x000000ff), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_X8R8G8B8_UNORM, PACKED_1x32(0xffffff00), PACKED_1x32(0x0000ff00), {1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_X8R8G8B8_UNORM, PACKED_1x32(0xffffff00), PACKED_1x32(0x00ff0000), {0.0, 1.0, 0.0, 1.0}}, - {PIPE_FORMAT_X8R8G8B8_UNORM, PACKED_1x32(0xffffff00), PACKED_1x32(0xff000000), {0.0, 0.0, 1.0, 1.0}}, - {PIPE_FORMAT_X8R8G8B8_UNORM, PACKED_1x32(0xffffff00), PACKED_1x32(0xffffffff), {1.0, 1.0, 1.0, 1.0}}, - - {PIPE_FORMAT_A8B8G8R8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x00000000), {0.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_A8B8G8R8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x000000ff), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_A8B8G8R8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x0000ff00), {0.0, 0.0, 1.0, 0.0}}, - {PIPE_FORMAT_A8B8G8R8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x00ff0000), {0.0, 1.0, 0.0, 0.0}}, - {PIPE_FORMAT_A8B8G8R8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0xff000000), {1.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_A8B8G8R8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0xffffffff), {1.0, 1.0, 1.0, 1.0}}, - - {PIPE_FORMAT_X8B8G8R8_UNORM, PACKED_1x32(0xffffff00), PACKED_1x32(0x00000000), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_X8B8G8R8_UNORM, PACKED_1x32(0xffffff00), PACKED_1x32(0x000000ff), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_X8B8G8R8_UNORM, PACKED_1x32(0xffffff00), PACKED_1x32(0x0000ff00), {0.0, 0.0, 1.0, 1.0}}, - {PIPE_FORMAT_X8B8G8R8_UNORM, PACKED_1x32(0xffffff00), PACKED_1x32(0x00ff0000), {0.0, 1.0, 0.0, 1.0}}, - {PIPE_FORMAT_X8B8G8R8_UNORM, PACKED_1x32(0xffffff00), PACKED_1x32(0xff000000), {1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_X8B8G8R8_UNORM, PACKED_1x32(0xffffff00), PACKED_1x32(0xffffffff), {1.0, 1.0, 1.0, 1.0}}, - - {PIPE_FORMAT_R10G10B10A2_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x00000000), {0.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R10G10B10A2_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x000003ff), {1.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R10G10B10A2_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x000ffc00), {0.0, 1.0, 0.0, 0.0}}, - {PIPE_FORMAT_R10G10B10A2_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x3ff00000), {0.0, 0.0, 1.0, 0.0}}, - {PIPE_FORMAT_R10G10B10A2_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0xc0000000), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R10G10B10A2_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0xffffffff), {1.0, 1.0, 1.0, 1.0}}, - - /* - * 16-bit rendertarget formats - */ - - {PIPE_FORMAT_B5G5R5A1_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x0000), {0.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_B5G5R5A1_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x001f), {0.0, 0.0, 1.0, 0.0}}, - {PIPE_FORMAT_B5G5R5A1_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x03e0), {0.0, 1.0, 0.0, 0.0}}, - {PIPE_FORMAT_B5G5R5A1_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x7c00), {1.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_B5G5R5A1_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x8000), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_B5G5R5A1_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0xffff), {1.0, 1.0, 1.0, 1.0}}, - - {PIPE_FORMAT_B4G4R4A4_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x0000), {0.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_B4G4R4A4_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x000f), {0.0, 0.0, 1.0, 0.0}}, - {PIPE_FORMAT_B4G4R4A4_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x00f0), {0.0, 1.0, 0.0, 0.0}}, - {PIPE_FORMAT_B4G4R4A4_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x0f00), {1.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_B4G4R4A4_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0xf000), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_B4G4R4A4_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0xffff), {1.0, 1.0, 1.0, 1.0}}, - - {PIPE_FORMAT_B5G6R5_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x0000), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_B5G6R5_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x001f), {0.0, 0.0, 1.0, 1.0}}, - {PIPE_FORMAT_B5G6R5_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x07e0), {0.0, 1.0, 0.0, 1.0}}, - {PIPE_FORMAT_B5G6R5_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0xf800), {1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_B5G6R5_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0xffff), {1.0, 1.0, 1.0, 1.0}}, - - /* - * Luminance/intensity/alpha formats - */ - - {PIPE_FORMAT_L8_UNORM, PACKED_1x8(0xff), PACKED_1x8(0x00), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_L8_UNORM, PACKED_1x8(0xff), PACKED_1x8(0xff), {1.0, 1.0, 1.0, 1.0}}, - - {PIPE_FORMAT_A8_UNORM, PACKED_1x8(0xff), PACKED_1x8(0x00), {0.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_A8_UNORM, PACKED_1x8(0xff), PACKED_1x8(0xff), {0.0, 0.0, 0.0, 1.0}}, - - {PIPE_FORMAT_I8_UNORM, PACKED_1x8(0xff), PACKED_1x8(0x00), {0.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_I8_UNORM, PACKED_1x8(0xff), PACKED_1x8(0xff), {1.0, 1.0, 1.0, 1.0}}, - - {PIPE_FORMAT_L8A8_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x0000), {0.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_L8A8_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x00ff), {1.0, 1.0, 1.0, 0.0}}, - {PIPE_FORMAT_L8A8_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0xff00), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_L8A8_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0xffff), {1.0, 1.0, 1.0, 1.0}}, - - {PIPE_FORMAT_L16_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x0000), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_L16_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0xffff), {1.0, 1.0, 1.0, 1.0}}, - - /* - * TODO: SRGB formats - */ - - /* - * Mixed-signed formats - */ - - {PIPE_FORMAT_R8SG8SB8UX8U_NORM, PACKED_1x32(0x00ffffff), PACKED_1x32(0x00000000), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8SG8SB8UX8U_NORM, PACKED_1x32(0x00ffffff), PACKED_1x32(0x0000007f), { 1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8SG8SB8UX8U_NORM, PACKED_1x32(0x00ffffff), PACKED_1x32(0x00000081), {-1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8SG8SB8UX8U_NORM, PACKED_1x32(0x00ffffff), PACKED_1x32(0x00007f00), { 0.0, 1.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8SG8SB8UX8U_NORM, PACKED_1x32(0x00ffffff), PACKED_1x32(0x00008100), { 0.0, -1.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8SG8SB8UX8U_NORM, PACKED_1x32(0x00ffffff), PACKED_1x32(0x00ff0000), { 0.0, 0.0, 1.0, 1.0}}, - {PIPE_FORMAT_R8SG8SB8UX8U_NORM, PACKED_1x32(0x00ffffff), PACKED_1x32(0xff000000), { 0.0, 0.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R5SG5SB6U_NORM, PACKED_1x16(0xffff), PACKED_1x16(0x0000), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R5SG5SB6U_NORM, PACKED_1x16(0xffff), PACKED_1x16(0x000f), { 1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R5SG5SB6U_NORM, PACKED_1x16(0xffff), PACKED_1x16(0x0011), {-1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R5SG5SB6U_NORM, PACKED_1x16(0xffff), PACKED_1x16(0x01e0), { 0.0, 1.0, 0.0, 1.0}}, - {PIPE_FORMAT_R5SG5SB6U_NORM, PACKED_1x16(0xffff), PACKED_1x16(0x0220), { 0.0, -1.0, 0.0, 1.0}}, - {PIPE_FORMAT_R5SG5SB6U_NORM, PACKED_1x16(0xffff), PACKED_1x16(0xfc00), { 0.0, 0.0, 1.0, 1.0}}, - - /* - * TODO: Depth-stencil formats - */ - - /* - * TODO: YUV formats - */ - - /* - * TODO: Compressed formats - */ - - /* - * Standard 8-bit integer formats - */ - - {PIPE_FORMAT_R8_UNORM, PACKED_1x8(0xff), PACKED_1x8(0x00), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8_UNORM, PACKED_1x8(0xff), PACKED_1x8(0xff), {1.0, 0.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R8G8_UNORM, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x00, 0x00), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8_UNORM, PACKED_2x8(0xff, 0xff), PACKED_2x8(0xff, 0x00), {1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8_UNORM, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x00, 0xff), {0.0, 1.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8_UNORM, PACKED_2x8(0xff, 0xff), PACKED_2x8(0xff, 0xff), {1.0, 1.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R8G8B8_UNORM, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x00, 0x00), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8B8_UNORM, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0xff, 0x00, 0x00), {1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8B8_UNORM, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0xff, 0x00), {0.0, 1.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8B8_UNORM, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x00, 0xff), {0.0, 0.0, 1.0, 1.0}}, - {PIPE_FORMAT_R8G8B8_UNORM, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0xff, 0xff, 0xff), {1.0, 1.0, 1.0, 1.0}}, - - {PIPE_FORMAT_R8G8B8A8_UNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x00, 0x00), {0.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R8G8B8A8_UNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0xff, 0x00, 0x00, 0x00), {1.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R8G8B8A8_UNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0xff, 0x00, 0x00), {0.0, 1.0, 0.0, 0.0}}, - {PIPE_FORMAT_R8G8B8A8_UNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0xff, 0x00), {0.0, 0.0, 1.0, 0.0}}, - {PIPE_FORMAT_R8G8B8A8_UNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x00, 0xff), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8B8A8_UNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0xff, 0xff, 0xff, 0xff), {1.0, 1.0, 1.0, 1.0}}, - - {PIPE_FORMAT_R8_USCALED, PACKED_1x8(0xff), PACKED_1x8(0x00), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8_USCALED, PACKED_1x8(0xff), PACKED_1x8(0xff), {255.0, 0.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R8G8_USCALED, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x00, 0x00), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8_USCALED, PACKED_2x8(0xff, 0xff), PACKED_2x8(0xff, 0x00), {255.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8_USCALED, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x00, 0xff), { 0.0, 255.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8_USCALED, PACKED_2x8(0xff, 0xff), PACKED_2x8(0xff, 0xff), {255.0, 255.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R8G8B8_USCALED, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x00, 0x00), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8B8_USCALED, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0xff, 0x00, 0x00), {255.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8B8_USCALED, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0xff, 0x00), { 0.0, 255.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8B8_USCALED, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x00, 0xff), { 0.0, 0.0, 255.0, 1.0}}, - {PIPE_FORMAT_R8G8B8_USCALED, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0xff, 0xff, 0xff), {255.0, 255.0, 255.0, 1.0}}, - - {PIPE_FORMAT_R8G8B8A8_USCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x00, 0x00), { 0.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R8G8B8A8_USCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0xff, 0x00, 0x00, 0x00), {255.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R8G8B8A8_USCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0xff, 0x00, 0x00), { 0.0, 255.0, 0.0, 0.0}}, - {PIPE_FORMAT_R8G8B8A8_USCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0xff, 0x00), { 0.0, 0.0, 255.0, 0.0}}, - {PIPE_FORMAT_R8G8B8A8_USCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x00, 0xff), { 0.0, 0.0, 0.0, 255.0}}, - {PIPE_FORMAT_R8G8B8A8_USCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0xff, 0xff, 0xff, 0xff), {255.0, 255.0, 255.0, 255.0}}, - - {PIPE_FORMAT_R8_SNORM, PACKED_1x8(0xff), PACKED_1x8(0x00), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8_SNORM, PACKED_1x8(0xff), PACKED_1x8(0x7f), { 1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8_SNORM, PACKED_1x8(0xff), PACKED_1x8(0x81), {-1.0, 0.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R8G8_SNORM, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x00, 0x00), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8_SNORM, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x7f, 0x00), { 1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8_SNORM, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x81, 0x00), {-1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8_SNORM, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x00, 0x7f), { 0.0, 1.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8_SNORM, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x00, 0x81), { 0.0, -1.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R8G8B8_SNORM, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x00, 0x00), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8B8_SNORM, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x7f, 0x00, 0x00), { 1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8B8_SNORM, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x81, 0x00, 0x00), {-1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8B8_SNORM, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x7f, 0x00), { 0.0, 1.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8B8_SNORM, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x81, 0x00), { 0.0, -1.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8B8_SNORM, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x00, 0x7f), { 0.0, 0.0, 1.0, 1.0}}, - {PIPE_FORMAT_R8G8B8_SNORM, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x00, 0x81), { 0.0, 0.0, -1.0, 1.0}}, - - {PIPE_FORMAT_R8G8B8A8_SNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x00, 0x00), { 0.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R8G8B8A8_SNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x7f, 0x00, 0x00, 0x00), { 1.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R8G8B8A8_SNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x81, 0x00, 0x00, 0x00), {-1.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R8G8B8A8_SNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x7f, 0x00, 0x00), { 0.0, 1.0, 0.0, 0.0}}, - {PIPE_FORMAT_R8G8B8A8_SNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x81, 0x00, 0x00), { 0.0, -1.0, 0.0, 0.0}}, - {PIPE_FORMAT_R8G8B8A8_SNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x7f, 0x00), { 0.0, 0.0, 1.0, 0.0}}, - {PIPE_FORMAT_R8G8B8A8_SNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x81, 0x00), { 0.0, 0.0, -1.0, 0.0}}, - {PIPE_FORMAT_R8G8B8A8_SNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x00, 0x7f), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8B8A8_SNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x00, 0x81), { 0.0, 0.0, 0.0, -1.0}}, - - {PIPE_FORMAT_R8_SSCALED, PACKED_1x8(0xff), PACKED_1x8(0x00), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8_SSCALED, PACKED_1x8(0xff), PACKED_1x8(0x7f), { 127.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8_SSCALED, PACKED_1x8(0xff), PACKED_1x8(0x80), {-128.0, 0.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R8G8_SSCALED, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x00, 0x00), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8_SSCALED, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x7f, 0x00), { 127.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8_SSCALED, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x80, 0x00), {-128.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8_SSCALED, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x00, 0x7f), { 0.0, 127.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8_SSCALED, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x00, 0x80), { 0.0, -128.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R8G8B8_SSCALED, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x00, 0x00), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8B8_SSCALED, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x7f, 0x00, 0x00), { 127.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8B8_SSCALED, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x80, 0x00, 0x00), {-128.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8B8_SSCALED, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x7f, 0x00), { 0.0, 127.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8B8_SSCALED, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x80, 0x00), { 0.0, -128.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8B8_SSCALED, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x00, 0x7f), { 0.0, 0.0, 127.0, 1.0}}, - {PIPE_FORMAT_R8G8B8_SSCALED, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x00, 0x80), { 0.0, 0.0, -128.0, 1.0}}, - - {PIPE_FORMAT_R8G8B8A8_SSCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x00, 0x00), { 0.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R8G8B8A8_SSCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x7f, 0x00, 0x00, 0x00), { 127.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R8G8B8A8_SSCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x80, 0x00, 0x00, 0x00), {-128.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R8G8B8A8_SSCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x7f, 0x00, 0x00), { 0.0, 127.0, 0.0, 0.0}}, - {PIPE_FORMAT_R8G8B8A8_SSCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x80, 0x00, 0x00), { 0.0, -128.0, 0.0, 0.0}}, - {PIPE_FORMAT_R8G8B8A8_SSCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x7f, 0x00), { 0.0, 0.0, 127.0, 0.0}}, - {PIPE_FORMAT_R8G8B8A8_SSCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x80, 0x00), { 0.0, 0.0, -128.0, 0.0}}, - {PIPE_FORMAT_R8G8B8A8_SSCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x00, 0x7f), { 0.0, 0.0, 0.0, 127.0}}, - {PIPE_FORMAT_R8G8B8A8_SSCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x00, 0x80), { 0.0, 0.0, 0.0, -128.0}}, - - /* - * Standard 16-bit integer formats - */ - - {PIPE_FORMAT_R16_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x0000), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0xffff), {1.0, 0.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R16G16_UNORM, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x0000, 0x0000), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16_UNORM, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0xffff, 0x0000), {1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16_UNORM, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x0000, 0xffff), {0.0, 1.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16_UNORM, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0xffff, 0xffff), {1.0, 1.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R16G16B16_UNORM, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x0000, 0x0000), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16B16_UNORM, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0xffff, 0x0000, 0x0000), {1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16B16_UNORM, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0xffff, 0x0000), {0.0, 1.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16B16_UNORM, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x0000, 0xffff), {0.0, 0.0, 1.0, 1.0}}, - {PIPE_FORMAT_R16G16B16_UNORM, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0xffff, 0xffff, 0xffff), {1.0, 1.0, 1.0, 1.0}}, - - {PIPE_FORMAT_R16G16B16A16_UNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x0000, 0x0000), {0.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R16G16B16A16_UNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0xffff, 0x0000, 0x0000, 0x0000), {1.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R16G16B16A16_UNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0xffff, 0x0000, 0x0000), {0.0, 1.0, 0.0, 0.0}}, - {PIPE_FORMAT_R16G16B16A16_UNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0xffff, 0x0000), {0.0, 0.0, 1.0, 0.0}}, - {PIPE_FORMAT_R16G16B16A16_UNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x0000, 0xffff), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16B16A16_UNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), {1.0, 1.0, 1.0, 1.0}}, - - {PIPE_FORMAT_R16_USCALED, PACKED_1x16(0xffff), PACKED_1x16(0x0000), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16_USCALED, PACKED_1x16(0xffff), PACKED_1x16(0xffff), {65535.0, 0.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R16G16_USCALED, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x0000, 0x0000), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16_USCALED, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0xffff, 0x0000), {65535.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16_USCALED, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x0000, 0xffff), { 0.0, 65535.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16_USCALED, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0xffff, 0xffff), {65535.0, 65535.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R16G16B16_USCALED, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x0000, 0x0000), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16B16_USCALED, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0xffff, 0x0000, 0x0000), {65535.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16B16_USCALED, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0xffff, 0x0000), { 0.0, 65535.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16B16_USCALED, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x0000, 0xffff), { 0.0, 0.0, 65535.0, 1.0}}, - {PIPE_FORMAT_R16G16B16_USCALED, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0xffff, 0xffff, 0xffff), {65535.0, 65535.0, 65535.0, 1.0}}, - - {PIPE_FORMAT_R16G16B16A16_USCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x0000, 0x0000), { 0.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R16G16B16A16_USCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0xffff, 0x0000, 0x0000, 0x0000), {65535.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R16G16B16A16_USCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0xffff, 0x0000, 0x0000), { 0.0, 65535.0, 0.0, 0.0}}, - {PIPE_FORMAT_R16G16B16A16_USCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0xffff, 0x0000), { 0.0, 0.0, 65535.0, 0.0}}, - {PIPE_FORMAT_R16G16B16A16_USCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x0000, 0xffff), { 0.0, 0.0, 0.0, 65535.0}}, - {PIPE_FORMAT_R16G16B16A16_USCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), {65535.0, 65535.0, 65535.0, 65535.0}}, - - {PIPE_FORMAT_R16_SNORM, PACKED_1x16(0xffff), PACKED_1x16(0x0000), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16_SNORM, PACKED_1x16(0xffff), PACKED_1x16(0x7fff), { 1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16_SNORM, PACKED_1x16(0xffff), PACKED_1x16(0x8001), { -1.0, 0.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R16G16_SNORM, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x0000, 0x0000), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16_SNORM, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x7fff, 0x0000), { 1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16_SNORM, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x8001, 0x0000), { -1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16_SNORM, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x0000, 0x7fff), { 0.0, 1.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16_SNORM, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x0000, 0x8001), { 0.0, -1.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R16G16B16_SNORM, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x0000, 0x0000), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16B16_SNORM, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x7fff, 0x0000, 0x0000), { 1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16B16_SNORM, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x8001, 0x0000, 0x0000), { -1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16B16_SNORM, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x7fff, 0x0000), { 0.0, 1.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16B16_SNORM, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x8001, 0x0000), { 0.0, -1.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16B16_SNORM, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x0000, 0x7fff), { 0.0, 0.0, 1.0, 1.0}}, - {PIPE_FORMAT_R16G16B16_SNORM, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x0000, 0x8001), { 0.0, 0.0, -1.0, 1.0}}, - - {PIPE_FORMAT_R16G16B16A16_SNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x0000, 0x0000), { 0.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R16G16B16A16_SNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x7fff, 0x0000, 0x0000, 0x0000), { 1.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R16G16B16A16_SNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x8001, 0x0000, 0x0000, 0x0000), { -1.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R16G16B16A16_SNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x7fff, 0x0000, 0x0000), { 0.0, 1.0, 0.0, 0.0}}, - {PIPE_FORMAT_R16G16B16A16_SNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x8001, 0x0000, 0x0000), { 0.0, -1.0, 0.0, 0.0}}, - {PIPE_FORMAT_R16G16B16A16_SNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x7fff, 0x0000), { 0.0, 0.0, 1.0, 0.0}}, - {PIPE_FORMAT_R16G16B16A16_SNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x8001, 0x0000), { 0.0, 0.0, -1.0, 0.0}}, - {PIPE_FORMAT_R16G16B16A16_SNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x0000, 0x7fff), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16B16A16_SNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x0000, 0x8001), { 0.0, 0.0, 0.0, -1.0}}, - - {PIPE_FORMAT_R16_SSCALED, PACKED_1x16(0xffff), PACKED_1x16(0x0000), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16_SSCALED, PACKED_1x16(0xffff), PACKED_1x16(0x7fff), { 32767.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16_SSCALED, PACKED_1x16(0xffff), PACKED_1x16(0x8000), {-32768.0, 0.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R16G16_SSCALED, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x0000, 0x0000), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16_SSCALED, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x7fff, 0x0000), { 32767.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16_SSCALED, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x8000, 0x0000), {-32768.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16_SSCALED, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x0000, 0x7fff), { 0.0, 32767.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16_SSCALED, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x0000, 0x8000), { 0.0, -32768.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R16G16B16_SSCALED, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x0000, 0x0000), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16B16_SSCALED, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x7fff, 0x0000, 0x0000), { 32767.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16B16_SSCALED, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x8000, 0x0000, 0x0000), {-32768.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16B16_SSCALED, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x7fff, 0x0000), { 0.0, 32767.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16B16_SSCALED, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x8000, 0x0000), { 0.0, -32768.0, 0.0, 1.0}}, - {PIPE_FORMAT_R16G16B16_SSCALED, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x0000, 0x7fff), { 0.0, 0.0, 32767.0, 1.0}}, - {PIPE_FORMAT_R16G16B16_SSCALED, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x0000, 0x8000), { 0.0, 0.0, -32768.0, 1.0}}, - - {PIPE_FORMAT_R16G16B16A16_SSCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x0000, 0x0000), { 0.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R16G16B16A16_SSCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x7fff, 0x0000, 0x0000, 0x0000), { 32767.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R16G16B16A16_SSCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x8000, 0x0000, 0x0000, 0x0000), {-32768.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R16G16B16A16_SSCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x7fff, 0x0000, 0x0000), { 0.0, 32767.0, 0.0, 0.0}}, - {PIPE_FORMAT_R16G16B16A16_SSCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x8000, 0x0000, 0x0000), { 0.0, -32768.0, 0.0, 0.0}}, - {PIPE_FORMAT_R16G16B16A16_SSCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x7fff, 0x0000), { 0.0, 0.0, 32767.0, 0.0}}, - {PIPE_FORMAT_R16G16B16A16_SSCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x8000, 0x0000), { 0.0, 0.0, -32768.0, 0.0}}, - {PIPE_FORMAT_R16G16B16A16_SSCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x0000, 0x7fff), { 0.0, 0.0, 0.0, 32767.0}}, - {PIPE_FORMAT_R16G16B16A16_SSCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x0000, 0x8000), { 0.0, 0.0, 0.0, -32768.0}}, - - /* - * Standard 32-bit integer formats - * - * NOTE: We can't accurately represent integers larger than +/-0x1000000 - * with single precision floats, so that's as far as we test. - */ - - {PIPE_FORMAT_R32_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x00000000), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0xffffffff), {1.0, 0.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R32G32_UNORM, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x00000000, 0x00000000), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32_UNORM, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0xffffffff, 0x00000000), {1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32_UNORM, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x00000000, 0xffffffff), {0.0, 1.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32_UNORM, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0xffffffff, 0xffffffff), {1.0, 1.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R32G32B32_UNORM, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x00000000, 0x00000000), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_UNORM, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0xffffffff, 0x00000000, 0x00000000), {1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_UNORM, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0xffffffff, 0x00000000), {0.0, 1.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_UNORM, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x00000000, 0xffffffff), {0.0, 0.0, 1.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_UNORM, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), {1.0, 1.0, 1.0, 1.0}}, - - {PIPE_FORMAT_R32G32B32A32_UNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x00000000, 0x00000000), {0.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_UNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0xffffffff, 0x00000000, 0x00000000, 0x00000000), {1.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_UNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0xffffffff, 0x00000000, 0x00000000), {0.0, 1.0, 0.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_UNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0xffffffff, 0x00000000), {0.0, 0.0, 1.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_UNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x00000000, 0xffffffff), {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32B32A32_UNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), {1.0, 1.0, 1.0, 1.0}}, - - {PIPE_FORMAT_R32_USCALED, PACKED_1x32(0xffffffff), PACKED_1x32(0x00000000), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32_USCALED, PACKED_1x32(0xffffffff), PACKED_1x32(0x01000000), {16777216.0, 0.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R32G32_USCALED, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x00000000, 0x00000000), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32_USCALED, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x01000000, 0x00000000), {16777216.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32_USCALED, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x00000000, 0x01000000), { 0.0, 16777216.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32_USCALED, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x01000000, 0x01000000), {16777216.0, 16777216.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R32G32B32_USCALED, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x00000000, 0x00000000), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_USCALED, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x01000000, 0x00000000, 0x00000000), {16777216.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_USCALED, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x01000000, 0x00000000), { 0.0, 16777216.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_USCALED, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x00000000, 0x01000000), { 0.0, 0.0, 16777216.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_USCALED, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x01000000, 0x01000000, 0x01000000), {16777216.0, 16777216.0, 16777216.0, 1.0}}, - - {PIPE_FORMAT_R32G32B32A32_USCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x00000000, 0x00000000), { 0.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_USCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x01000000, 0x00000000, 0x00000000, 0x00000000), {16777216.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_USCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x01000000, 0x00000000, 0x00000000), { 0.0, 16777216.0, 0.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_USCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x01000000, 0x00000000), { 0.0, 0.0, 16777216.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_USCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x00000000, 0x01000000), { 0.0, 0.0, 0.0, 16777216.0}}, - {PIPE_FORMAT_R32G32B32A32_USCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x01000000, 0x01000000, 0x01000000, 0x01000000), {16777216.0, 16777216.0, 16777216.0, 16777216.0}}, - - {PIPE_FORMAT_R32_SNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x00000000), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32_SNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x7fffffff), { 1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32_SNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x80000001), { -1.0, 0.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R32G32_SNORM, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x00000000, 0x00000000), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32_SNORM, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x7fffffff, 0x00000000), { 1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32_SNORM, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x80000001, 0x00000000), { -1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32_SNORM, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x00000000, 0x7fffffff), { 0.0, 1.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32_SNORM, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x00000000, 0x80000001), { 0.0, -1.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R32G32B32_SNORM, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x00000000, 0x00000000), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_SNORM, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x7fffffff, 0x00000000, 0x00000000), { 1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_SNORM, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x80000001, 0x00000000, 0x00000000), { -1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_SNORM, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x7fffffff, 0x00000000), { 0.0, 1.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_SNORM, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x80000001, 0x00000000), { 0.0, -1.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_SNORM, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x00000000, 0x7fffffff), { 0.0, 0.0, 1.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_SNORM, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x00000000, 0x80000001), { 0.0, 0.0, -1.0, 1.0}}, - - {PIPE_FORMAT_R32G32B32A32_SNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x00000000, 0x00000000), { 0.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_SNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x7fffffff, 0x00000000, 0x00000000, 0x00000000), { 1.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_SNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x80000001, 0x00000000, 0x00000000, 0x00000000), { -1.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_SNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x7fffffff, 0x00000000, 0x00000000), { 0.0, 1.0, 0.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_SNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x80000001, 0x00000000, 0x00000000), { 0.0, -1.0, 0.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_SNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x7fffffff, 0x00000000), { 0.0, 0.0, 1.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_SNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x80000001, 0x00000000), { 0.0, 0.0, -1.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_SNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x00000000, 0x7fffffff), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32B32A32_SNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x00000000, 0x80000001), { 0.0, 0.0, 0.0, -1.0}}, - - {PIPE_FORMAT_R32_SSCALED, PACKED_1x32(0xffffffff), PACKED_1x32(0x00000000), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32_SSCALED, PACKED_1x32(0xffffffff), PACKED_1x32(0x01000000), { 16777216.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32_SSCALED, PACKED_1x32(0xffffffff), PACKED_1x32(0xff000000), {-16777216.0, 0.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R32G32_SSCALED, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x00000000, 0x00000000), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32_SSCALED, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x01000000, 0x00000000), { 16777216.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32_SSCALED, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0xff000000, 0x00000000), {-16777216.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32_SSCALED, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x00000000, 0x01000000), { 0.0, 16777216.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32_SSCALED, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x00000000, 0xff000000), { 0.0, -16777216.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R32G32B32_SSCALED, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x00000000, 0x00000000), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_SSCALED, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x01000000, 0x00000000, 0x00000000), { 16777216.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_SSCALED, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0xff000000, 0x00000000, 0x00000000), {-16777216.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_SSCALED, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x01000000, 0x00000000), { 0.0, 16777216.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_SSCALED, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0xff000000, 0x00000000), { 0.0, -16777216.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_SSCALED, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x00000000, 0x01000000), { 0.0, 0.0, 16777216.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_SSCALED, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x00000000, 0xff000000), { 0.0, 0.0, -16777216.0, 1.0}}, - - {PIPE_FORMAT_R32G32B32A32_SSCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x00000000, 0x00000000), { 0.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_SSCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x01000000, 0x00000000, 0x00000000, 0x00000000), { 16777216.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_SSCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0xff000000, 0x00000000, 0x00000000, 0x00000000), {-16777216.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_SSCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x01000000, 0x00000000, 0x00000000), { 0.0, 16777216.0, 0.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_SSCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0xff000000, 0x00000000, 0x00000000), { 0.0, -16777216.0, 0.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_SSCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x01000000, 0x00000000), { 0.0, 0.0, 16777216.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_SSCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0xff000000, 0x00000000), { 0.0, 0.0, -16777216.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_SSCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x00000000, 0x01000000), { 0.0, 0.0, 0.0, 16777216.0}}, - {PIPE_FORMAT_R32G32B32A32_SSCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x00000000, 0xff000000), { 0.0, 0.0, 0.0, -16777216.0}}, - - /* - * Standard 32-bit float formats - */ - - {PIPE_FORMAT_R32_FLOAT, PACKED_1x32(0xffffffff), PACKED_1x32(0x00000000), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32_FLOAT, PACKED_1x32(0xffffffff), PACKED_1x32(0x3f800000), { 1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32_FLOAT, PACKED_1x32(0xffffffff), PACKED_1x32(0xbf800000), { -1.0, 0.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R32G32_FLOAT, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x00000000, 0x00000000), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32_FLOAT, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x3f800000, 0x00000000), { 1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32_FLOAT, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0xbf800000, 0x00000000), {-1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32_FLOAT, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x00000000, 0x3f800000), { 0.0, 1.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32_FLOAT, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x00000000, 0xbf800000), { 0.0, -1.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32_FLOAT, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x3f800000, 0x3f800000), { 1.0, 1.0, 0.0, 1.0}}, - - {PIPE_FORMAT_R32G32B32_FLOAT, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x00000000, 0x00000000), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_FLOAT, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x3f800000, 0x00000000, 0x00000000), { 1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_FLOAT, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0xbf800000, 0x00000000, 0x00000000), {-1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_FLOAT, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x3f800000, 0x00000000), { 0.0, 1.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_FLOAT, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0xbf800000, 0x00000000), { 0.0, -1.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_FLOAT, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x00000000, 0x3f800000), { 0.0, 0.0, 1.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_FLOAT, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x00000000, 0xbf800000), { 0.0, 0.0, -1.0, 1.0}}, - {PIPE_FORMAT_R32G32B32_FLOAT, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x3f800000, 0x3f800000, 0x3f800000), { 1.0, 1.0, 1.0, 1.0}}, - - {PIPE_FORMAT_R32G32B32A32_FLOAT, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x00000000, 0x00000000), { 0.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_FLOAT, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x3f800000, 0x00000000, 0x00000000, 0x00000000), { 1.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_FLOAT, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0xbf800000, 0x00000000, 0x00000000, 0x00000000), {-1.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_FLOAT, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x3f800000, 0x00000000, 0x00000000), { 0.0, 1.0, 0.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_FLOAT, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0xbf800000, 0x00000000, 0x00000000), { 0.0, -1.0, 0.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_FLOAT, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x3f800000, 0x00000000), { 0.0, 0.0, 1.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_FLOAT, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0xbf800000, 0x00000000), { 0.0, 0.0, -1.0, 0.0}}, - {PIPE_FORMAT_R32G32B32A32_FLOAT, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x00000000, 0x3f800000), { 0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R32G32B32A32_FLOAT, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x00000000, 0xbf800000), { 0.0, 0.0, 0.0, -1.0}}, - {PIPE_FORMAT_R32G32B32A32_FLOAT, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000), { 1.0, 1.0, 1.0, 1.0}}, -}; - - static boolean test_format_unpack_4f(const struct util_format_test_case *test) { @@ -596,7 +60,7 @@ test_format_unpack_4f(const struct util_format_test_case *test) static boolean test_format_pack_4f(const struct util_format_test_case *test) { - uint8_t packed[MAX_PACKED_BYTES]; + uint8_t packed[UTIL_FORMAT_MAX_PACKED_BYTES]; unsigned i; boolean success; @@ -605,7 +69,7 @@ test_format_pack_4f(const struct util_format_test_case *test) util_format_pack_4f(test->format, packed, test->unpacked[0], test->unpacked[1], test->unpacked[2], test->unpacked[3]); success = TRUE; - for (i = 0; i < MAX_PACKED_BYTES; ++i) + for (i = 0; i < UTIL_FORMAT_MAX_PACKED_BYTES; ++i) if ((test->packed[i] & test->mask[i]) != (packed[i] & test->mask[i])) success = FALSE; @@ -627,13 +91,27 @@ test_format_pack_4f(const struct util_format_test_case *test) } -static void +static boolean convert_4f_to_4ub(uint8_t *dst, const double *src) { unsigned i; + boolean accurate = TRUE; - for (i = 0; i < 4; ++i) - dst[i] = CLAMP(src[i], 0.0, 1.0) * 255.0; + for (i = 0; i < 4; ++i) { + if (src[i] < 0.0) { + accurate = FALSE; + dst[i] = 0; + } + else if (src[i] > 1.0) { + accurate = FALSE; + dst[i] = 255; + } + else { + dst[i] = src[i] * 255.0; + } + } + + return accurate; } @@ -667,18 +145,23 @@ static boolean test_format_pack_4ub(const struct util_format_test_case *test) { uint8_t unpacked[4]; - uint8_t packed[MAX_PACKED_BYTES]; + uint8_t packed[UTIL_FORMAT_MAX_PACKED_BYTES]; unsigned i; boolean success; - convert_4f_to_4ub(unpacked, test->unpacked); + if (!convert_4f_to_4ub(unpacked, test->unpacked)) { + /* + * Skip test cases which cannot be represented by four unorm bytes. + */ + return TRUE; + } memset(packed, 0, sizeof packed); util_format_pack_4ub(test->format, packed, unpacked[0], unpacked[1], unpacked[2], unpacked[3]); success = TRUE; - for (i = 0; i < MAX_PACKED_BYTES; ++i) + for (i = 0; i < UTIL_FORMAT_MAX_PACKED_BYTES; ++i) if ((test->packed[i] & test->mask[i]) != (packed[i] & test->mask[i])) success = FALSE; @@ -711,15 +194,16 @@ test_one(test_func_t func, const char *suffix) unsigned i; bool success = TRUE; - for (i = 0; i < sizeof(test_cases)/sizeof(test_cases[0]); ++i) { - if (test_cases[i].format != last_format) { + for (i = 0; i < util_format_nr_test_cases; ++i) { + const struct util_format_test_case *test = &util_format_test_cases[i]; + if (test->format != last_format) { const struct util_format_description *format_desc; - format_desc = util_format_description(test_cases[i].format); - printf("Testing %s.%s ...\n", format_desc->name, suffix); - last_format = test_cases[i].format; + format_desc = util_format_description(test->format); + printf("Testing util_format_%s_%s ...\n", format_desc->short_name, suffix); + last_format = test->format; } - if (!func(&test_cases[i])) + if (!func(&util_format_test_cases[i])) success = FALSE; } diff --git a/scons/llvm.py b/scons/llvm.py index 37c503ec98..c8e50c5916 100644 --- a/scons/llvm.py +++ b/scons/llvm.py @@ -29,7 +29,9 @@ Tool-specific initialization for LLVM import os import os.path +import re import sys +import distutils.version import SCons.Errors import SCons.Util @@ -60,71 +62,108 @@ def generate(env): if env['platform'] == 'windows': # XXX: There is no llvm-config on Windows, so assume a standard layout - if llvm_dir is not None: - env.Prepend(CPPPATH = [os.path.join(llvm_dir, 'include')]) - env.AppendUnique(CPPDEFINES = [ - '__STDC_LIMIT_MACROS', - '__STDC_CONSTANT_MACROS', - 'HAVE_STDINT_H', + if llvm_dir is None: + return + + # Try to determine the LLVM version from llvm/Config/config.h + llvm_config = os.path.join(llvm_dir, 'include/llvm/Config/config.h') + if not os.path.exists(llvm_config): + print 'scons: could not find %s' % llvm_config + return + llvm_version_re = re.compile(r'^#define PACKAGE_VERSION "([^"]*)"') + llvm_version = None + for line in open(llvm_config, 'rt'): + mo = llvm_version_re.match(line) + if mo: + llvm_version = mo.group(1) + llvm_version = distutils.version.LooseVersion(llvm_version) + break + if llvm_version is None: + print 'scons: could not determine the LLVM version from %s' % llvm_config + return + + if llvm_version >= distutils.version.LooseVersion('2.7'): + print 'scons: Ignoring unsupported LLVM version %s' % llvm_version + print 'scons: See http://www.llvm.org/bugs/show_bug.cgi?id=6429' + return + + env.Prepend(CPPPATH = [os.path.join(llvm_dir, 'include')]) + env.AppendUnique(CPPDEFINES = [ + '__STDC_LIMIT_MACROS', + '__STDC_CONSTANT_MACROS', + 'HAVE_STDINT_H', + ]) + env.Prepend(LIBPATH = [os.path.join(llvm_dir, 'lib')]) + if llvm_version >= distutils.version.LooseVersion('2.7'): + # 2.7 + env.Prepend(LIBS = [ + 'LLVMLinker', 'LLVMipo', 'LLVMInterpreter', + 'LLVMInstrumentation', 'LLVMJIT', 'LLVMExecutionEngine', + 'LLVMBitWriter', 'LLVMX86Disassembler', 'LLVMX86AsmParser', + 'LLVMMCParser', 'LLVMX86AsmPrinter', 'LLVMX86CodeGen', + 'LLVMSelectionDAG', 'LLVMX86Info', 'LLVMAsmPrinter', + 'LLVMCodeGen', 'LLVMScalarOpts', 'LLVMInstCombine', + 'LLVMTransformUtils', 'LLVMipa', 'LLVMAsmParser', + 'LLVMArchive', 'LLVMBitReader', 'LLVMAnalysis', 'LLVMTarget', + 'LLVMMC', 'LLVMCore', 'LLVMSupport', 'LLVMSystem', ]) - env.Prepend(LIBPATH = [os.path.join(llvm_dir, 'lib')]) + else: + # 2.6 env.Prepend(LIBS = [ - 'LLVMX86AsmParser', - 'LLVMX86AsmPrinter', - 'LLVMX86CodeGen', - 'LLVMX86Info', - 'LLVMLinker', - 'LLVMipo', - 'LLVMInterpreter', - 'LLVMInstrumentation', - 'LLVMJIT', - 'LLVMExecutionEngine', - 'LLVMDebugger', - 'LLVMBitWriter', - 'LLVMAsmParser', - 'LLVMArchive', - 'LLVMBitReader', - 'LLVMSelectionDAG', - 'LLVMAsmPrinter', - 'LLVMCodeGen', - 'LLVMScalarOpts', - 'LLVMTransformUtils', - 'LLVMipa', - 'LLVMAnalysis', - 'LLVMTarget', - 'LLVMMC', - 'LLVMCore', - 'LLVMSupport', + 'LLVMX86AsmParser', 'LLVMX86AsmPrinter', 'LLVMX86CodeGen', + 'LLVMX86Info', 'LLVMLinker', 'LLVMipo', 'LLVMInterpreter', + 'LLVMInstrumentation', 'LLVMJIT', 'LLVMExecutionEngine', + 'LLVMDebugger', 'LLVMBitWriter', 'LLVMAsmParser', + 'LLVMArchive', 'LLVMBitReader', 'LLVMSelectionDAG', + 'LLVMAsmPrinter', 'LLVMCodeGen', 'LLVMScalarOpts', + 'LLVMTransformUtils', 'LLVMipa', 'LLVMAnalysis', + 'LLVMTarget', 'LLVMMC', 'LLVMCore', 'LLVMSupport', 'LLVMSystem', - 'imagehlp', - 'psapi', ]) - if env['msvc']: - # Some of the LLVM C headers use the inline keyword without - # defining it. - env.Append(CPPDEFINES = [('inline', '__inline')]) - if env['debug']: - # LLVM libraries are static, build with /MT, and they - # automatically link agains LIBCMT. When we're doing a - # debug build we'll be linking against LIBCMTD, so disable - # that. - env.Append(LINKFLAGS = ['/nodefaultlib:LIBCMT']) - env['LLVM_VERSION'] = '2.6' - return + env.Append(LIBS = [ + 'imagehlp', + 'psapi', + ]) + if env['msvc']: + # Some of the LLVM C headers use the inline keyword without + # defining it. + env.Append(CPPDEFINES = [('inline', '__inline')]) + if env['debug']: + # LLVM libraries are static, build with /MT, and they + # automatically link agains LIBCMT. When we're doing a + # debug build we'll be linking against LIBCMTD, so disable + # that. + env.Append(LINKFLAGS = ['/nodefaultlib:LIBCMT']) elif env.Detect('llvm-config'): - version = env.backtick('llvm-config --version').rstrip() + llvm_version = env.backtick('llvm-config --version').rstrip() + llvm_version = distutils.version.LooseVersion(llvm_version) + + if llvm_version >= distutils.version.LooseVersion('2.7'): + print 'scons: Ignoring unsupported LLVM version %s' % llvm_version + print 'scons: See http://www.llvm.org/bugs/show_bug.cgi?id=6429' + return try: env.ParseConfig('llvm-config --cppflags') env.ParseConfig('llvm-config --libs jit interpreter nativecodegen bitwriter') env.ParseConfig('llvm-config --ldflags') except OSError: - print 'llvm-config version %s failed' % version + print 'llvm-config version %s failed' % llvm_version else: - if env['platform'] == 'windows': - env.Append(LIBS = ['imagehlp', 'psapi']) env['LINK'] = env['CXX'] - env['LLVM_VERSION'] = version + else: + return + + assert llvm_version is not None + + print 'scons: Found LLVM version %s' % llvm_version + env['LLVM_VERSION'] = llvm_version + + # Define HAVE_LLVM macro with the major/minor version number (e.g., 0x0206 for 2.6) + llvm_version_major = int(llvm_version.version[0]) + llvm_version_minor = int(llvm_version.version[1]) + llvm_version_hex = '0x%02x%02x' % (llvm_version_major, llvm_version_minor) + env.Prepend(CPPDEFINES = [('HAVE_LLVM', llvm_version_hex)]) def exists(env): return True diff --git a/src/gallium/auxiliary/Makefile b/src/gallium/auxiliary/Makefile index 1d0930e024..68b1a3e854 100644 --- a/src/gallium/auxiliary/Makefile +++ b/src/gallium/auxiliary/Makefile @@ -107,6 +107,7 @@ C_SOURCES = \ util/u_draw_quad.c \ util/u_format_access.c \ util/u_format_table.c \ + util/u_format_tests.c \ util/u_gen_mipmap.c \ util/u_handle_table.c \ util/u_hash_table.c \ diff --git a/src/gallium/auxiliary/SConscript b/src/gallium/auxiliary/SConscript index f365c4bbdd..d6185bcb5e 100644 --- a/src/gallium/auxiliary/SConscript +++ b/src/gallium/auxiliary/SConscript @@ -7,6 +7,8 @@ env.Append(CPPPATH = [ 'util', ]) +env.Tool('udis86') + env.CodeGenerate( target = 'indices/u_indices_gen.c', script = 'indices/u_indices_gen.py', @@ -149,6 +151,7 @@ source = [ 'util/u_draw_quad.c', 'util/u_format_access.c', 'util/u_format_table.c', + 'util/u_format_tests.c', 'util/u_gen_mipmap.c', 'util/u_handle_table.c', 'util/u_hash.c', diff --git a/src/gallium/auxiliary/gallivm/lp_bld_pack.c b/src/gallium/auxiliary/gallivm/lp_bld_pack.c index bc360ad77a..4c61d10749 100644 --- a/src/gallium/auxiliary/gallivm/lp_bld_pack.c +++ b/src/gallium/auxiliary/gallivm/lp_bld_pack.c @@ -256,7 +256,9 @@ lp_build_pack2(LLVMBuilderRef builder, LLVMValueRef lo, LLVMValueRef hi) { +#if !(HAVE_LLVM >= 0x0207) LLVMTypeRef src_vec_type = lp_build_vec_type(src_type); +#endif LLVMTypeRef dst_vec_type = lp_build_vec_type(dst_type); LLVMValueRef shuffle; LLVMValueRef res; @@ -272,11 +274,14 @@ lp_build_pack2(LLVMBuilderRef builder, switch(src_type.width) { case 32: if(dst_type.sign) { +#if HAVE_LLVM >= 0x0207 + res = lp_build_intrinsic_binary(builder, "llvm.x86.sse2.packssdw.128", dst_vec_type, lo, hi); +#else res = lp_build_intrinsic_binary(builder, "llvm.x86.sse2.packssdw.128", src_vec_type, lo, hi); +#endif } else { if (util_cpu_caps.has_sse4_1) { - /* PACKUSDW is the only instrinsic with a consistent signature */ return lp_build_intrinsic_binary(builder, "llvm.x86.sse41.packusdw", dst_vec_type, lo, hi); } else { @@ -288,9 +293,17 @@ lp_build_pack2(LLVMBuilderRef builder, case 16: if(dst_type.sign) +#if HAVE_LLVM >= 0x0207 + res = lp_build_intrinsic_binary(builder, "llvm.x86.sse2.packsswb.128", dst_vec_type, lo, hi); +#else res = lp_build_intrinsic_binary(builder, "llvm.x86.sse2.packsswb.128", src_vec_type, lo, hi); +#endif else +#if HAVE_LLVM >= 0x0207 + res = lp_build_intrinsic_binary(builder, "llvm.x86.sse2.packuswb.128", dst_vec_type, lo, hi); +#else res = lp_build_intrinsic_binary(builder, "llvm.x86.sse2.packuswb.128", src_vec_type, lo, hi); +#endif break; default: diff --git a/src/gallium/auxiliary/gallivm/lp_bld_sample.c b/src/gallium/auxiliary/gallivm/lp_bld_sample.c index 6a026e468e..29cadcc15a 100644 --- a/src/gallium/auxiliary/gallivm/lp_bld_sample.c +++ b/src/gallium/auxiliary/gallivm/lp_bld_sample.c @@ -62,6 +62,18 @@ lp_sampler_static_state(struct lp_sampler_static_state *state, if(!sampler) return; + /* + * We don't copy sampler state over unless it is actually enabled, to avoid + * spurious recompiles, as the sampler static state is part of the shader + * key. + * + * Ideally the state tracker or cso_cache module would make all state + * canonical, but until that happens it's better to be safe than sorry here. + * + * XXX: Actually there's much more than can be done here, especially + * regarding 1D/2D/3D/CUBE textures, wrap modes, etc. + */ + state->format = texture->format; state->target = texture->target; state->pot_width = util_is_pot(texture->width0); @@ -74,8 +86,12 @@ lp_sampler_static_state(struct lp_sampler_static_state *state, state->min_img_filter = sampler->min_img_filter; state->min_mip_filter = sampler->min_mip_filter; state->mag_img_filter = sampler->mag_img_filter; + state->compare_mode = sampler->compare_mode; - state->compare_func = sampler->compare_func; + if (sampler->compare_mode != PIPE_TEX_COMPARE_NONE) { + state->compare_func = sampler->compare_func; + } + state->normalized_coords = sampler->normalized_coords; state->lod_bias = sampler->lod_bias; state->min_lod = sampler->min_lod; diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c index 5f2c2a54ee..28ff362cac 100644 --- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c +++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c @@ -384,6 +384,11 @@ emit_store( assert(0); break; + case TGSI_FILE_PREDICATE: + /* FIXME */ + assert(0); + break; + default: assert( 0 ); } @@ -581,6 +586,17 @@ emit_instruction( if (indirect_temp_reference(inst)) return FALSE; + /* + * Stores and write masks are handled in a general fashion after the long + * instruction opcode switch statement. + * + * Although not stricitly necessary, we avoid generating instructions for + * channels which won't be stored, in cases where's that easy. For some + * complex instructions, like texture sampling, it is more convenient to + * assume a full writemask and then let LLVM optimization passes eliminate + * redundant code. + */ + assert(info->num_dst <= 1); if(info->num_dst) { FOR_EACH_DST0_ENABLED_CHANNEL( inst, chan_index ) { @@ -1126,7 +1142,6 @@ emit_instruction( break; case TGSI_OPCODE_TEX: - /* XXX what about dst0 writemask? */ emit_tex( bld, inst, FALSE, FALSE, dst0 ); break; diff --git a/src/gallium/auxiliary/util/u_format.h b/src/gallium/auxiliary/util/u_format.h index e8fa0022b5..b2aa5bfb18 100644 --- a/src/gallium/auxiliary/util/u_format.h +++ b/src/gallium/auxiliary/util/u_format.h @@ -120,9 +120,15 @@ struct util_format_channel_description struct util_format_description { enum pipe_format format; + const char *name; /** + * Short name, striped of the prefix, lower case. + */ + const char *short_name; + + /** * Pixel block dimensions. */ struct util_format_block block; @@ -140,6 +146,15 @@ struct util_format_description unsigned is_array:1; /** + * Whether the pixel format can be described as a bitfield structure. + * + * In particular: + * - pixel depth must be 8, 16, or 32 bits; + * - all channels must be unsigned, signed, or void + */ + unsigned is_bitmask:1; + + /** * Whether channels have mixed types (ignoring UTIL_FORMAT_TYPE_VOID). */ unsigned is_mixed:1; diff --git a/src/gallium/auxiliary/util/u_format_pack.py b/src/gallium/auxiliary/util/u_format_pack.py index 3f33f7cc02..b49039db39 100644 --- a/src/gallium/auxiliary/util/u_format_pack.py +++ b/src/gallium/auxiliary/util/u_format_pack.py @@ -252,9 +252,6 @@ def conversion_expr(src_channel, dst_channel, dst_native_type, value, clamp=True if src_channel.type == FLOAT and dst_channel.type == FLOAT: return '(%s)%s' % (dst_native_type, value) - if not src_channel.norm and not dst_channel.norm: - return '(%s)%s' % (dst_native_type, value) - if clamp: value = clamp_expr(src_channel, dst_channel, dst_native_type, value) @@ -280,15 +277,15 @@ def conversion_expr(src_channel, dst_channel, dst_native_type, value, clamp=True value = '(%s * %s)' % (value, scale) return '(%s)%s' % (dst_native_type, value) - if not src_channel.norm and not dst_channel.norm: - # neither is normalized -- just cast - return '(%s)%s' % (dst_native_type, value) - if src_channel.type in (SIGNED, UNSIGNED) and dst_channel.type in (SIGNED, UNSIGNED): + if not src_channel.norm and not dst_channel.norm: + # neither is normalized -- just cast + return '(%s)%s' % (dst_native_type, value) + src_one = get_one(src_channel) dst_one = get_one(dst_channel) - if src_one > dst_one and src_channel.norm: + if src_one > dst_one and src_channel.norm and dst_channel.norm: # We can just bitshift src_shift = get_one_shift(src_channel) dst_shift = get_one_shift(dst_channel) @@ -296,7 +293,7 @@ def conversion_expr(src_channel, dst_channel, dst_native_type, value, clamp=True else: # We need to rescale using an intermediate type big enough to hold the multiplication of both tmp_native_type = intermediate_native_type(src_channel.size + dst_channel.size, src_channel.sign and dst_channel.sign) - value = '(%s)%s' % (tmp_native_type, value) + value = '((%s)%s)' % (tmp_native_type, value) value = '(%s * 0x%x / 0x%x)' % (value, dst_one, src_one) value = '(%s)%s' % (dst_native_type, value) return value @@ -307,6 +304,8 @@ def conversion_expr(src_channel, dst_channel, dst_native_type, value, clamp=True def generate_format_unpack(format, dst_channel, dst_native_type, dst_suffix): '''Generate the function to unpack pixels from a particular format''' + assert format.layout == PLAIN + name = format.short_name() src_native_type = native_type(format) @@ -314,32 +313,99 @@ def generate_format_unpack(format, dst_channel, dst_native_type, dst_suffix): print 'static INLINE void' print 'util_format_%s_unpack_%s(%s *dst, const void *src)' % (name, dst_suffix, dst_native_type) print '{' - print ' union util_format_%s pixel;' % format.short_name() - print ' memcpy(&pixel, src, sizeof pixel);' - bswap_format(format) + + if format.is_bitmask(): + depth = format.block_size() + print ' uint%u_t value = *(uint%u_t *)src;' % (depth, depth) - assert format.layout == PLAIN + # Declare the intermediate variables + for i in range(format.nr_channels()): + src_channel = format.channels[i] + if src_channel.type == UNSIGNED: + print ' uint%u_t %s;' % (depth, src_channel.name) + elif src_channel.type == SIGNED: + print ' int%u_t %s;' % (depth, src_channel.name) - for i in range(4): - swizzle = format.swizzles[i] - if swizzle < 4: - src_channel = format.channels[swizzle] - value = 'pixel.chan.%s' % src_channel.name - value = conversion_expr(src_channel, dst_channel, dst_native_type, value) - elif swizzle == SWIZZLE_0: - value = '0' - elif swizzle == SWIZZLE_1: - value = get_one(dst_channel) - elif swizzle == SWIZZLE_NONE: - value = '0' - else: - assert False - if format.colorspace == ZS: - if i == 3: + print '#ifdef PIPE_ARCH_BIG_ENDIAN' + print ' value = util_bswap%u(value);' % depth + print '#endif' + + # Compute the intermediate unshifted values + shift = 0 + for i in range(format.nr_channels()): + src_channel = format.channels[i] + value = 'value' + if src_channel.type == UNSIGNED: + if shift: + value = '%s >> %u' % (value, shift) + if shift + src_channel.size < depth: + value = '(%s) & 0x%x' % (value, (1 << src_channel.size) - 1) + elif src_channel.type == SIGNED: + if shift + src_channel.size < depth: + # Align the sign bit + lshift = depth - (shift + src_channel.size) + value = '%s << %u' % (value, lshift) + # Cast to signed + value = '(int%u_t)(%s) ' % (depth, value) + if src_channel.size < depth: + # Align the LSB bit + rshift = depth - src_channel.size + value = '(%s) >> %u' % (value, rshift) + else: + value = None + + if value is not None: + print ' %s = %s;' % (src_channel.name, value) + + shift += src_channel.size + + # Convert, swizzle, and store final values + for i in range(4): + swizzle = format.swizzles[i] + if swizzle < 4: + src_channel = format.channels[swizzle] + value = src_channel.name + value = conversion_expr(src_channel, dst_channel, dst_native_type, value) + elif swizzle == SWIZZLE_0: + value = '0' + elif swizzle == SWIZZLE_1: value = get_one(dst_channel) - elif i >= 1: - value = 'dst[0]' - print ' dst[%u] = %s; /* %s */' % (i, value, 'rgba'[i]) + elif swizzle == SWIZZLE_NONE: + value = '0' + else: + assert False + if format.colorspace == ZS: + if i == 3: + value = get_one(dst_channel) + elif i >= 1: + value = 'dst[0]' + print ' dst[%u] = %s; /* %s */' % (i, value, 'rgba'[i]) + + else: + print ' union util_format_%s pixel;' % format.short_name() + print ' memcpy(&pixel, src, sizeof pixel);' + bswap_format(format) + + for i in range(4): + swizzle = format.swizzles[i] + if swizzle < 4: + src_channel = format.channels[swizzle] + value = 'pixel.chan.%s' % src_channel.name + value = conversion_expr(src_channel, dst_channel, dst_native_type, value) + elif swizzle == SWIZZLE_0: + value = '0' + elif swizzle == SWIZZLE_1: + value = get_one(dst_channel) + elif swizzle == SWIZZLE_NONE: + value = '0' + else: + assert False + if format.colorspace == ZS: + if i == 3: + value = get_one(dst_channel) + elif i >= 1: + value = 'dst[0]' + print ' dst[%u] = %s; /* %s */' % (i, value, 'rgba'[i]) print '}' print diff --git a/src/gallium/auxiliary/util/u_format_parse.py b/src/gallium/auxiliary/util/u_format_parse.py index 250926418e..f74dc5e88a 100755 --- a/src/gallium/auxiliary/util/u_format_parse.py +++ b/src/gallium/auxiliary/util/u_format_parse.py @@ -78,7 +78,7 @@ class Channel: if self.type == UNSIGNED: return (1 << self.size) - 1 if self.type == SIGNED: - return self.size - 1 + return (1 << (self.size - 1)) - 1 assert False def min(self): @@ -166,17 +166,11 @@ class Format: return True def is_bitmask(self): - if self.block_size() > 32: - return False - if not self.is_pot(): + if self.block_size() not in (8, 16, 32): return False for channel in self.channels: - if not is_pot(channel.size): - return True if channel.type not in (VOID, UNSIGNED, SIGNED): return False - if channel.size >= 32: - return False return True def inv_swizzles(self): diff --git a/src/gallium/auxiliary/util/u_format_table.py b/src/gallium/auxiliary/util/u_format_table.py index 4e29d15f3b..fb68852a53 100755 --- a/src/gallium/auxiliary/util/u_format_table.py +++ b/src/gallium/auxiliary/util/u_format_table.py @@ -90,11 +90,13 @@ def write_format_table(formats): print 'util_format_none_description = {' print " PIPE_FORMAT_NONE," print " \"PIPE_FORMAT_NONE\"," + print " \"none\"," print " {0, 0, 0}," print " 0," print " 0," print " 0," print " 0," + print " 0," print " {{0, 0, 0}, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}}," print " {0, 0, 0, 0}," print " 0" @@ -105,10 +107,12 @@ def write_format_table(formats): print 'util_format_%s_description = {' % (format.short_name(),) print " %s," % (format.name,) print " \"%s\"," % (format.name,) + print " \"%s\"," % (format.short_name(),) print " {%u, %u, %u},\t/* block */" % (format.block_width, format.block_height, format.block_size()) print " %s," % (layout_map(format.layout),) print " %u,\t/* nr_channels */" % (format.nr_channels(),) print " %s,\t/* is_array */" % (bool_map(format.is_array()),) + print " %s,\t/* is_bitmask */" % (bool_map(format.is_bitmask()),) print " %s,\t/* is_mixed */" % (bool_map(format.is_mixed()),) print " {" for i in range(4): diff --git a/src/gallium/auxiliary/util/u_format_tests.c b/src/gallium/auxiliary/util/u_format_tests.c new file mode 100644 index 0000000000..182a474044 --- /dev/null +++ b/src/gallium/auxiliary/util/u_format_tests.c @@ -0,0 +1,544 @@ +/************************************************************************** + * + * Copyright 2009-2010 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + + +#include "u_memory.h" +#include "u_format_tests.h" + + +/* + * Helper macros to create the packed bytes for longer words. + */ + +#define PACKED_1x8(x) {x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} +#define PACKED_2x8(x, y) {x, y, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} +#define PACKED_3x8(x, y, z) {x, y, z, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} +#define PACKED_4x8(x, y, z, w) {x, y, z, w, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + +#define PACKED_1x16(x) {(x) & 0xff, (x) >> 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} +#define PACKED_2x16(x, y) {(x) & 0xff, (x) >> 8, (y) & 0xff, (y) >> 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} +#define PACKED_3x16(x, y, z) {(x) & 0xff, (x) >> 8, (y) & 0xff, (y) >> 8, (z) & 0xff, (z) >> 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} +#define PACKED_4x16(x, y, z, w) {(x) & 0xff, (x) >> 8, (y) & 0xff, (y) >> 8, (z) & 0xff, (z) >> 8, (w) & 0xff, (w) >> 8, 0, 0, 0, 0, 0, 0, 0, 0} + +#define PACKED_1x32(x) {(x) & 0xff, ((x) >> 8) & 0xff, ((x) >> 16) & 0xff, (x) >> 24, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} +#define PACKED_2x32(x, y) {(x) & 0xff, ((x) >> 8) & 0xff, ((x) >> 16) & 0xff, (x) >> 24, (y) & 0xff, ((y) >> 8) & 0xff, ((y) >> 16) & 0xff, (y) >> 24, 0, 0, 0, 0, 0, 0, 0, 0} +#define PACKED_3x32(x, y, z) {(x) & 0xff, ((x) >> 8) & 0xff, ((x) >> 16) & 0xff, (x) >> 24, (y) & 0xff, ((y) >> 8) & 0xff, ((y) >> 16) & 0xff, (y) >> 24, (z) & 0xff, ((z) >> 8) & 0xff, ((z) >> 16) & 0xff, (z) >> 24, 0, 0, 0, 0} +#define PACKED_4x32(x, y, z, w) {(x) & 0xff, ((x) >> 8) & 0xff, ((x) >> 16) & 0xff, (x) >> 24, (y) & 0xff, ((y) >> 8) & 0xff, ((y) >> 16) & 0xff, (y) >> 24, (z) & 0xff, ((z) >> 8) & 0xff, ((z) >> 16) & 0xff, (z) >> 24, (w) & 0xff, ((w) >> 8) & 0xff, ((w) >> 16) & 0xff, (w) >> 24} + + +/** + * Test cases. + * + * These were manually entered. We could generate these + * + * To keep this to a we cover only the corner cases, which should produce + * good enough coverage since that pixel format transformations are afine for + * non SRGB formats. + */ +const struct util_format_test_case +util_format_test_cases[] = +{ + + /* + * 32-bit rendertarget formats + */ + + {PIPE_FORMAT_B8G8R8A8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x00000000), {0.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_B8G8R8A8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x000000ff), {0.0, 0.0, 1.0, 0.0}}, + {PIPE_FORMAT_B8G8R8A8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x0000ff00), {0.0, 1.0, 0.0, 0.0}}, + {PIPE_FORMAT_B8G8R8A8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x00ff0000), {1.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_B8G8R8A8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0xff000000), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_B8G8R8A8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0xffffffff), {1.0, 1.0, 1.0, 1.0}}, + + {PIPE_FORMAT_B8G8R8X8_UNORM, PACKED_1x32(0x00ffffff), PACKED_1x32(0x00000000), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_B8G8R8X8_UNORM, PACKED_1x32(0x00ffffff), PACKED_1x32(0x000000ff), {0.0, 0.0, 1.0, 1.0}}, + {PIPE_FORMAT_B8G8R8X8_UNORM, PACKED_1x32(0x00ffffff), PACKED_1x32(0x0000ff00), {0.0, 1.0, 0.0, 1.0}}, + {PIPE_FORMAT_B8G8R8X8_UNORM, PACKED_1x32(0x00ffffff), PACKED_1x32(0x00ff0000), {1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_B8G8R8X8_UNORM, PACKED_1x32(0x00ffffff), PACKED_1x32(0xff000000), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_B8G8R8X8_UNORM, PACKED_1x32(0x00ffffff), PACKED_1x32(0xffffffff), {1.0, 1.0, 1.0, 1.0}}, + + {PIPE_FORMAT_A8R8G8B8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x00000000), {0.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_A8R8G8B8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x000000ff), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_A8R8G8B8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x0000ff00), {1.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_A8R8G8B8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x00ff0000), {0.0, 1.0, 0.0, 0.0}}, + {PIPE_FORMAT_A8R8G8B8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0xff000000), {0.0, 0.0, 1.0, 0.0}}, + {PIPE_FORMAT_A8R8G8B8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0xffffffff), {1.0, 1.0, 1.0, 1.0}}, + + {PIPE_FORMAT_X8R8G8B8_UNORM, PACKED_1x32(0xffffff00), PACKED_1x32(0x00000000), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_X8R8G8B8_UNORM, PACKED_1x32(0xffffff00), PACKED_1x32(0x000000ff), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_X8R8G8B8_UNORM, PACKED_1x32(0xffffff00), PACKED_1x32(0x0000ff00), {1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_X8R8G8B8_UNORM, PACKED_1x32(0xffffff00), PACKED_1x32(0x00ff0000), {0.0, 1.0, 0.0, 1.0}}, + {PIPE_FORMAT_X8R8G8B8_UNORM, PACKED_1x32(0xffffff00), PACKED_1x32(0xff000000), {0.0, 0.0, 1.0, 1.0}}, + {PIPE_FORMAT_X8R8G8B8_UNORM, PACKED_1x32(0xffffff00), PACKED_1x32(0xffffffff), {1.0, 1.0, 1.0, 1.0}}, + + {PIPE_FORMAT_A8B8G8R8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x00000000), {0.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_A8B8G8R8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x000000ff), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_A8B8G8R8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x0000ff00), {0.0, 0.0, 1.0, 0.0}}, + {PIPE_FORMAT_A8B8G8R8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x00ff0000), {0.0, 1.0, 0.0, 0.0}}, + {PIPE_FORMAT_A8B8G8R8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0xff000000), {1.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_A8B8G8R8_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0xffffffff), {1.0, 1.0, 1.0, 1.0}}, + + {PIPE_FORMAT_X8B8G8R8_UNORM, PACKED_1x32(0xffffff00), PACKED_1x32(0x00000000), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_X8B8G8R8_UNORM, PACKED_1x32(0xffffff00), PACKED_1x32(0x000000ff), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_X8B8G8R8_UNORM, PACKED_1x32(0xffffff00), PACKED_1x32(0x0000ff00), {0.0, 0.0, 1.0, 1.0}}, + {PIPE_FORMAT_X8B8G8R8_UNORM, PACKED_1x32(0xffffff00), PACKED_1x32(0x00ff0000), {0.0, 1.0, 0.0, 1.0}}, + {PIPE_FORMAT_X8B8G8R8_UNORM, PACKED_1x32(0xffffff00), PACKED_1x32(0xff000000), {1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_X8B8G8R8_UNORM, PACKED_1x32(0xffffff00), PACKED_1x32(0xffffffff), {1.0, 1.0, 1.0, 1.0}}, + + {PIPE_FORMAT_R10G10B10A2_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x00000000), {0.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R10G10B10A2_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x000003ff), {1.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R10G10B10A2_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x000ffc00), {0.0, 1.0, 0.0, 0.0}}, + {PIPE_FORMAT_R10G10B10A2_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x3ff00000), {0.0, 0.0, 1.0, 0.0}}, + {PIPE_FORMAT_R10G10B10A2_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0xc0000000), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R10G10B10A2_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0xffffffff), {1.0, 1.0, 1.0, 1.0}}, + + /* + * 16-bit rendertarget formats + */ + + {PIPE_FORMAT_B5G5R5A1_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x0000), {0.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_B5G5R5A1_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x001f), {0.0, 0.0, 1.0, 0.0}}, + {PIPE_FORMAT_B5G5R5A1_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x03e0), {0.0, 1.0, 0.0, 0.0}}, + {PIPE_FORMAT_B5G5R5A1_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x7c00), {1.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_B5G5R5A1_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x8000), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_B5G5R5A1_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0xffff), {1.0, 1.0, 1.0, 1.0}}, + + {PIPE_FORMAT_B4G4R4A4_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x0000), {0.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_B4G4R4A4_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x000f), {0.0, 0.0, 1.0, 0.0}}, + {PIPE_FORMAT_B4G4R4A4_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x00f0), {0.0, 1.0, 0.0, 0.0}}, + {PIPE_FORMAT_B4G4R4A4_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x0f00), {1.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_B4G4R4A4_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0xf000), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_B4G4R4A4_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0xffff), {1.0, 1.0, 1.0, 1.0}}, + + {PIPE_FORMAT_B5G6R5_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x0000), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_B5G6R5_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x001f), {0.0, 0.0, 1.0, 1.0}}, + {PIPE_FORMAT_B5G6R5_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x07e0), {0.0, 1.0, 0.0, 1.0}}, + {PIPE_FORMAT_B5G6R5_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0xf800), {1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_B5G6R5_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0xffff), {1.0, 1.0, 1.0, 1.0}}, + + /* + * Luminance/intensity/alpha formats + */ + + {PIPE_FORMAT_L8_UNORM, PACKED_1x8(0xff), PACKED_1x8(0x00), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_L8_UNORM, PACKED_1x8(0xff), PACKED_1x8(0xff), {1.0, 1.0, 1.0, 1.0}}, + + {PIPE_FORMAT_A8_UNORM, PACKED_1x8(0xff), PACKED_1x8(0x00), {0.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_A8_UNORM, PACKED_1x8(0xff), PACKED_1x8(0xff), {0.0, 0.0, 0.0, 1.0}}, + + {PIPE_FORMAT_I8_UNORM, PACKED_1x8(0xff), PACKED_1x8(0x00), {0.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_I8_UNORM, PACKED_1x8(0xff), PACKED_1x8(0xff), {1.0, 1.0, 1.0, 1.0}}, + + {PIPE_FORMAT_L8A8_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x0000), {0.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_L8A8_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x00ff), {1.0, 1.0, 1.0, 0.0}}, + {PIPE_FORMAT_L8A8_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0xff00), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_L8A8_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0xffff), {1.0, 1.0, 1.0, 1.0}}, + + {PIPE_FORMAT_L16_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x0000), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_L16_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0xffff), {1.0, 1.0, 1.0, 1.0}}, + + /* + * TODO: SRGB formats + */ + + /* + * Mixed-signed formats + */ + + {PIPE_FORMAT_R8SG8SB8UX8U_NORM, PACKED_4x8(0xff, 0xff, 0xff, 0x00), PACKED_4x8(0x00, 0x00, 0x00, 0x00), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8SG8SB8UX8U_NORM, PACKED_4x8(0xff, 0xff, 0xff, 0x00), PACKED_4x8(0x7f, 0x00, 0x00, 0x00), { 1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8SG8SB8UX8U_NORM, PACKED_4x8(0xff, 0xff, 0xff, 0x00), PACKED_4x8(0x81, 0x00, 0x00, 0x00), {-1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8SG8SB8UX8U_NORM, PACKED_4x8(0xff, 0xff, 0xff, 0x00), PACKED_4x8(0x00, 0x7f, 0x00, 0x00), { 0.0, 1.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8SG8SB8UX8U_NORM, PACKED_4x8(0xff, 0xff, 0xff, 0x00), PACKED_4x8(0x00, 0x81, 0x00, 0x00), { 0.0, -1.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8SG8SB8UX8U_NORM, PACKED_4x8(0xff, 0xff, 0xff, 0x00), PACKED_4x8(0x00, 0x00, 0xff, 0x00), { 0.0, 0.0, 1.0, 1.0}}, + + {PIPE_FORMAT_R5SG5SB6U_NORM, PACKED_1x16(0xffff), PACKED_1x16(0x0000), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R5SG5SB6U_NORM, PACKED_1x16(0xffff), PACKED_1x16(0x000f), { 1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R5SG5SB6U_NORM, PACKED_1x16(0xffff), PACKED_1x16(0x0011), {-1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R5SG5SB6U_NORM, PACKED_1x16(0xffff), PACKED_1x16(0x01e0), { 0.0, 1.0, 0.0, 1.0}}, + {PIPE_FORMAT_R5SG5SB6U_NORM, PACKED_1x16(0xffff), PACKED_1x16(0x0220), { 0.0, -1.0, 0.0, 1.0}}, + {PIPE_FORMAT_R5SG5SB6U_NORM, PACKED_1x16(0xffff), PACKED_1x16(0xfc00), { 0.0, 0.0, 1.0, 1.0}}, + + /* + * TODO: Depth-stencil formats + */ + + /* + * TODO: YUV formats + */ + + /* + * TODO: Compressed formats + */ + + /* + * Standard 8-bit integer formats + */ + + {PIPE_FORMAT_R8_UNORM, PACKED_1x8(0xff), PACKED_1x8(0x00), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8_UNORM, PACKED_1x8(0xff), PACKED_1x8(0xff), {1.0, 0.0, 0.0, 1.0}}, + + {PIPE_FORMAT_R8G8_UNORM, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x00, 0x00), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8_UNORM, PACKED_2x8(0xff, 0xff), PACKED_2x8(0xff, 0x00), {1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8_UNORM, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x00, 0xff), {0.0, 1.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8_UNORM, PACKED_2x8(0xff, 0xff), PACKED_2x8(0xff, 0xff), {1.0, 1.0, 0.0, 1.0}}, + + {PIPE_FORMAT_R8G8B8_UNORM, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x00, 0x00), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8B8_UNORM, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0xff, 0x00, 0x00), {1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8B8_UNORM, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0xff, 0x00), {0.0, 1.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8B8_UNORM, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x00, 0xff), {0.0, 0.0, 1.0, 1.0}}, + {PIPE_FORMAT_R8G8B8_UNORM, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0xff, 0xff, 0xff), {1.0, 1.0, 1.0, 1.0}}, + + {PIPE_FORMAT_R8G8B8A8_UNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x00, 0x00), {0.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R8G8B8A8_UNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0xff, 0x00, 0x00, 0x00), {1.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R8G8B8A8_UNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0xff, 0x00, 0x00), {0.0, 1.0, 0.0, 0.0}}, + {PIPE_FORMAT_R8G8B8A8_UNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0xff, 0x00), {0.0, 0.0, 1.0, 0.0}}, + {PIPE_FORMAT_R8G8B8A8_UNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x00, 0xff), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8B8A8_UNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0xff, 0xff, 0xff, 0xff), {1.0, 1.0, 1.0, 1.0}}, + + {PIPE_FORMAT_R8_USCALED, PACKED_1x8(0xff), PACKED_1x8(0x00), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8_USCALED, PACKED_1x8(0xff), PACKED_1x8(0xff), {255.0, 0.0, 0.0, 1.0}}, + + {PIPE_FORMAT_R8G8_USCALED, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x00, 0x00), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8_USCALED, PACKED_2x8(0xff, 0xff), PACKED_2x8(0xff, 0x00), {255.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8_USCALED, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x00, 0xff), { 0.0, 255.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8_USCALED, PACKED_2x8(0xff, 0xff), PACKED_2x8(0xff, 0xff), {255.0, 255.0, 0.0, 1.0}}, + + {PIPE_FORMAT_R8G8B8_USCALED, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x00, 0x00), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8B8_USCALED, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0xff, 0x00, 0x00), {255.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8B8_USCALED, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0xff, 0x00), { 0.0, 255.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8B8_USCALED, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x00, 0xff), { 0.0, 0.0, 255.0, 1.0}}, + {PIPE_FORMAT_R8G8B8_USCALED, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0xff, 0xff, 0xff), {255.0, 255.0, 255.0, 1.0}}, + + {PIPE_FORMAT_R8G8B8A8_USCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x00, 0x00), { 0.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R8G8B8A8_USCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0xff, 0x00, 0x00, 0x00), {255.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R8G8B8A8_USCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0xff, 0x00, 0x00), { 0.0, 255.0, 0.0, 0.0}}, + {PIPE_FORMAT_R8G8B8A8_USCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0xff, 0x00), { 0.0, 0.0, 255.0, 0.0}}, + {PIPE_FORMAT_R8G8B8A8_USCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x00, 0xff), { 0.0, 0.0, 0.0, 255.0}}, + {PIPE_FORMAT_R8G8B8A8_USCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0xff, 0xff, 0xff, 0xff), {255.0, 255.0, 255.0, 255.0}}, + + {PIPE_FORMAT_R8_SNORM, PACKED_1x8(0xff), PACKED_1x8(0x00), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8_SNORM, PACKED_1x8(0xff), PACKED_1x8(0x7f), { 1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8_SNORM, PACKED_1x8(0xff), PACKED_1x8(0x81), {-1.0, 0.0, 0.0, 1.0}}, + + {PIPE_FORMAT_R8G8_SNORM, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x00, 0x00), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8_SNORM, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x7f, 0x00), { 1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8_SNORM, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x81, 0x00), {-1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8_SNORM, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x00, 0x7f), { 0.0, 1.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8_SNORM, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x00, 0x81), { 0.0, -1.0, 0.0, 1.0}}, + + {PIPE_FORMAT_R8G8B8_SNORM, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x00, 0x00), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8B8_SNORM, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x7f, 0x00, 0x00), { 1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8B8_SNORM, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x81, 0x00, 0x00), {-1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8B8_SNORM, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x7f, 0x00), { 0.0, 1.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8B8_SNORM, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x81, 0x00), { 0.0, -1.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8B8_SNORM, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x00, 0x7f), { 0.0, 0.0, 1.0, 1.0}}, + {PIPE_FORMAT_R8G8B8_SNORM, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x00, 0x81), { 0.0, 0.0, -1.0, 1.0}}, + + {PIPE_FORMAT_R8G8B8A8_SNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x00, 0x00), { 0.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R8G8B8A8_SNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x7f, 0x00, 0x00, 0x00), { 1.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R8G8B8A8_SNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x81, 0x00, 0x00, 0x00), {-1.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R8G8B8A8_SNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x7f, 0x00, 0x00), { 0.0, 1.0, 0.0, 0.0}}, + {PIPE_FORMAT_R8G8B8A8_SNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x81, 0x00, 0x00), { 0.0, -1.0, 0.0, 0.0}}, + {PIPE_FORMAT_R8G8B8A8_SNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x7f, 0x00), { 0.0, 0.0, 1.0, 0.0}}, + {PIPE_FORMAT_R8G8B8A8_SNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x81, 0x00), { 0.0, 0.0, -1.0, 0.0}}, + {PIPE_FORMAT_R8G8B8A8_SNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x00, 0x7f), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8B8A8_SNORM, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x00, 0x81), { 0.0, 0.0, 0.0, -1.0}}, + + {PIPE_FORMAT_R8_SSCALED, PACKED_1x8(0xff), PACKED_1x8(0x00), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8_SSCALED, PACKED_1x8(0xff), PACKED_1x8(0x7f), { 127.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8_SSCALED, PACKED_1x8(0xff), PACKED_1x8(0x80), {-128.0, 0.0, 0.0, 1.0}}, + + {PIPE_FORMAT_R8G8_SSCALED, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x00, 0x00), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8_SSCALED, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x7f, 0x00), { 127.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8_SSCALED, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x80, 0x00), {-128.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8_SSCALED, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x00, 0x7f), { 0.0, 127.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8_SSCALED, PACKED_2x8(0xff, 0xff), PACKED_2x8(0x00, 0x80), { 0.0, -128.0, 0.0, 1.0}}, + + {PIPE_FORMAT_R8G8B8_SSCALED, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x00, 0x00), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8B8_SSCALED, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x7f, 0x00, 0x00), { 127.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8B8_SSCALED, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x80, 0x00, 0x00), {-128.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8B8_SSCALED, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x7f, 0x00), { 0.0, 127.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8B8_SSCALED, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x80, 0x00), { 0.0, -128.0, 0.0, 1.0}}, + {PIPE_FORMAT_R8G8B8_SSCALED, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x00, 0x7f), { 0.0, 0.0, 127.0, 1.0}}, + {PIPE_FORMAT_R8G8B8_SSCALED, PACKED_3x8(0xff, 0xff, 0xff), PACKED_3x8(0x00, 0x00, 0x80), { 0.0, 0.0, -128.0, 1.0}}, + + {PIPE_FORMAT_R8G8B8A8_SSCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x00, 0x00), { 0.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R8G8B8A8_SSCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x7f, 0x00, 0x00, 0x00), { 127.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R8G8B8A8_SSCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x80, 0x00, 0x00, 0x00), {-128.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R8G8B8A8_SSCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x7f, 0x00, 0x00), { 0.0, 127.0, 0.0, 0.0}}, + {PIPE_FORMAT_R8G8B8A8_SSCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x80, 0x00, 0x00), { 0.0, -128.0, 0.0, 0.0}}, + {PIPE_FORMAT_R8G8B8A8_SSCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x7f, 0x00), { 0.0, 0.0, 127.0, 0.0}}, + {PIPE_FORMAT_R8G8B8A8_SSCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x80, 0x00), { 0.0, 0.0, -128.0, 0.0}}, + {PIPE_FORMAT_R8G8B8A8_SSCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x00, 0x7f), { 0.0, 0.0, 0.0, 127.0}}, + {PIPE_FORMAT_R8G8B8A8_SSCALED, PACKED_4x8(0xff, 0xff, 0xff, 0xff), PACKED_4x8(0x00, 0x00, 0x00, 0x80), { 0.0, 0.0, 0.0, -128.0}}, + + /* + * Standard 16-bit integer formats + */ + + {PIPE_FORMAT_R16_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0x0000), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16_UNORM, PACKED_1x16(0xffff), PACKED_1x16(0xffff), {1.0, 0.0, 0.0, 1.0}}, + + {PIPE_FORMAT_R16G16_UNORM, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x0000, 0x0000), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16_UNORM, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0xffff, 0x0000), {1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16_UNORM, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x0000, 0xffff), {0.0, 1.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16_UNORM, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0xffff, 0xffff), {1.0, 1.0, 0.0, 1.0}}, + + {PIPE_FORMAT_R16G16B16_UNORM, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x0000, 0x0000), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16B16_UNORM, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0xffff, 0x0000, 0x0000), {1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16B16_UNORM, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0xffff, 0x0000), {0.0, 1.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16B16_UNORM, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x0000, 0xffff), {0.0, 0.0, 1.0, 1.0}}, + {PIPE_FORMAT_R16G16B16_UNORM, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0xffff, 0xffff, 0xffff), {1.0, 1.0, 1.0, 1.0}}, + + {PIPE_FORMAT_R16G16B16A16_UNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x0000, 0x0000), {0.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R16G16B16A16_UNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0xffff, 0x0000, 0x0000, 0x0000), {1.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R16G16B16A16_UNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0xffff, 0x0000, 0x0000), {0.0, 1.0, 0.0, 0.0}}, + {PIPE_FORMAT_R16G16B16A16_UNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0xffff, 0x0000), {0.0, 0.0, 1.0, 0.0}}, + {PIPE_FORMAT_R16G16B16A16_UNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x0000, 0xffff), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16B16A16_UNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), {1.0, 1.0, 1.0, 1.0}}, + + {PIPE_FORMAT_R16_USCALED, PACKED_1x16(0xffff), PACKED_1x16(0x0000), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16_USCALED, PACKED_1x16(0xffff), PACKED_1x16(0xffff), {65535.0, 0.0, 0.0, 1.0}}, + + {PIPE_FORMAT_R16G16_USCALED, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x0000, 0x0000), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16_USCALED, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0xffff, 0x0000), {65535.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16_USCALED, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x0000, 0xffff), { 0.0, 65535.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16_USCALED, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0xffff, 0xffff), {65535.0, 65535.0, 0.0, 1.0}}, + + {PIPE_FORMAT_R16G16B16_USCALED, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x0000, 0x0000), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16B16_USCALED, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0xffff, 0x0000, 0x0000), {65535.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16B16_USCALED, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0xffff, 0x0000), { 0.0, 65535.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16B16_USCALED, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x0000, 0xffff), { 0.0, 0.0, 65535.0, 1.0}}, + {PIPE_FORMAT_R16G16B16_USCALED, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0xffff, 0xffff, 0xffff), {65535.0, 65535.0, 65535.0, 1.0}}, + + {PIPE_FORMAT_R16G16B16A16_USCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x0000, 0x0000), { 0.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R16G16B16A16_USCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0xffff, 0x0000, 0x0000, 0x0000), {65535.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R16G16B16A16_USCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0xffff, 0x0000, 0x0000), { 0.0, 65535.0, 0.0, 0.0}}, + {PIPE_FORMAT_R16G16B16A16_USCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0xffff, 0x0000), { 0.0, 0.0, 65535.0, 0.0}}, + {PIPE_FORMAT_R16G16B16A16_USCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x0000, 0xffff), { 0.0, 0.0, 0.0, 65535.0}}, + {PIPE_FORMAT_R16G16B16A16_USCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), {65535.0, 65535.0, 65535.0, 65535.0}}, + + {PIPE_FORMAT_R16_SNORM, PACKED_1x16(0xffff), PACKED_1x16(0x0000), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16_SNORM, PACKED_1x16(0xffff), PACKED_1x16(0x7fff), { 1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16_SNORM, PACKED_1x16(0xffff), PACKED_1x16(0x8001), { -1.0, 0.0, 0.0, 1.0}}, + + {PIPE_FORMAT_R16G16_SNORM, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x0000, 0x0000), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16_SNORM, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x7fff, 0x0000), { 1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16_SNORM, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x8001, 0x0000), { -1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16_SNORM, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x0000, 0x7fff), { 0.0, 1.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16_SNORM, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x0000, 0x8001), { 0.0, -1.0, 0.0, 1.0}}, + + {PIPE_FORMAT_R16G16B16_SNORM, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x0000, 0x0000), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16B16_SNORM, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x7fff, 0x0000, 0x0000), { 1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16B16_SNORM, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x8001, 0x0000, 0x0000), { -1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16B16_SNORM, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x7fff, 0x0000), { 0.0, 1.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16B16_SNORM, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x8001, 0x0000), { 0.0, -1.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16B16_SNORM, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x0000, 0x7fff), { 0.0, 0.0, 1.0, 1.0}}, + {PIPE_FORMAT_R16G16B16_SNORM, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x0000, 0x8001), { 0.0, 0.0, -1.0, 1.0}}, + + {PIPE_FORMAT_R16G16B16A16_SNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x0000, 0x0000), { 0.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R16G16B16A16_SNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x7fff, 0x0000, 0x0000, 0x0000), { 1.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R16G16B16A16_SNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x8001, 0x0000, 0x0000, 0x0000), { -1.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R16G16B16A16_SNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x7fff, 0x0000, 0x0000), { 0.0, 1.0, 0.0, 0.0}}, + {PIPE_FORMAT_R16G16B16A16_SNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x8001, 0x0000, 0x0000), { 0.0, -1.0, 0.0, 0.0}}, + {PIPE_FORMAT_R16G16B16A16_SNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x7fff, 0x0000), { 0.0, 0.0, 1.0, 0.0}}, + {PIPE_FORMAT_R16G16B16A16_SNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x8001, 0x0000), { 0.0, 0.0, -1.0, 0.0}}, + {PIPE_FORMAT_R16G16B16A16_SNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x0000, 0x7fff), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16B16A16_SNORM, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x0000, 0x8001), { 0.0, 0.0, 0.0, -1.0}}, + + {PIPE_FORMAT_R16_SSCALED, PACKED_1x16(0xffff), PACKED_1x16(0x0000), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16_SSCALED, PACKED_1x16(0xffff), PACKED_1x16(0x7fff), { 32767.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16_SSCALED, PACKED_1x16(0xffff), PACKED_1x16(0x8000), {-32768.0, 0.0, 0.0, 1.0}}, + + {PIPE_FORMAT_R16G16_SSCALED, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x0000, 0x0000), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16_SSCALED, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x7fff, 0x0000), { 32767.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16_SSCALED, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x8000, 0x0000), {-32768.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16_SSCALED, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x0000, 0x7fff), { 0.0, 32767.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16_SSCALED, PACKED_2x16(0xffff, 0xffff), PACKED_2x16(0x0000, 0x8000), { 0.0, -32768.0, 0.0, 1.0}}, + + {PIPE_FORMAT_R16G16B16_SSCALED, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x0000, 0x0000), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16B16_SSCALED, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x7fff, 0x0000, 0x0000), { 32767.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16B16_SSCALED, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x8000, 0x0000, 0x0000), {-32768.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16B16_SSCALED, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x7fff, 0x0000), { 0.0, 32767.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16B16_SSCALED, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x8000, 0x0000), { 0.0, -32768.0, 0.0, 1.0}}, + {PIPE_FORMAT_R16G16B16_SSCALED, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x0000, 0x7fff), { 0.0, 0.0, 32767.0, 1.0}}, + {PIPE_FORMAT_R16G16B16_SSCALED, PACKED_3x16(0xffff, 0xffff, 0xffff), PACKED_3x16(0x0000, 0x0000, 0x8000), { 0.0, 0.0, -32768.0, 1.0}}, + + {PIPE_FORMAT_R16G16B16A16_SSCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x0000, 0x0000), { 0.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R16G16B16A16_SSCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x7fff, 0x0000, 0x0000, 0x0000), { 32767.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R16G16B16A16_SSCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x8000, 0x0000, 0x0000, 0x0000), {-32768.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R16G16B16A16_SSCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x7fff, 0x0000, 0x0000), { 0.0, 32767.0, 0.0, 0.0}}, + {PIPE_FORMAT_R16G16B16A16_SSCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x8000, 0x0000, 0x0000), { 0.0, -32768.0, 0.0, 0.0}}, + {PIPE_FORMAT_R16G16B16A16_SSCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x7fff, 0x0000), { 0.0, 0.0, 32767.0, 0.0}}, + {PIPE_FORMAT_R16G16B16A16_SSCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x8000, 0x0000), { 0.0, 0.0, -32768.0, 0.0}}, + {PIPE_FORMAT_R16G16B16A16_SSCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x0000, 0x7fff), { 0.0, 0.0, 0.0, 32767.0}}, + {PIPE_FORMAT_R16G16B16A16_SSCALED, PACKED_4x16(0xffff, 0xffff, 0xffff, 0xffff), PACKED_4x16(0x0000, 0x0000, 0x0000, 0x8000), { 0.0, 0.0, 0.0, -32768.0}}, + + /* + * Standard 32-bit integer formats + * + * NOTE: We can't accurately represent integers larger than +/-0x1000000 + * with single precision floats, so that's as far as we test. + */ + + {PIPE_FORMAT_R32_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x00000000), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32_UNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0xffffffff), {1.0, 0.0, 0.0, 1.0}}, + + {PIPE_FORMAT_R32G32_UNORM, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x00000000, 0x00000000), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32_UNORM, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0xffffffff, 0x00000000), {1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32_UNORM, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x00000000, 0xffffffff), {0.0, 1.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32_UNORM, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0xffffffff, 0xffffffff), {1.0, 1.0, 0.0, 1.0}}, + + {PIPE_FORMAT_R32G32B32_UNORM, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x00000000, 0x00000000), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_UNORM, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0xffffffff, 0x00000000, 0x00000000), {1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_UNORM, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0xffffffff, 0x00000000), {0.0, 1.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_UNORM, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x00000000, 0xffffffff), {0.0, 0.0, 1.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_UNORM, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), {1.0, 1.0, 1.0, 1.0}}, + + {PIPE_FORMAT_R32G32B32A32_UNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x00000000, 0x00000000), {0.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_UNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0xffffffff, 0x00000000, 0x00000000, 0x00000000), {1.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_UNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0xffffffff, 0x00000000, 0x00000000), {0.0, 1.0, 0.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_UNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0xffffffff, 0x00000000), {0.0, 0.0, 1.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_UNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x00000000, 0xffffffff), {0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32B32A32_UNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), {1.0, 1.0, 1.0, 1.0}}, + + {PIPE_FORMAT_R32_USCALED, PACKED_1x32(0xffffffff), PACKED_1x32(0x00000000), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32_USCALED, PACKED_1x32(0xffffffff), PACKED_1x32(0x01000000), {16777216.0, 0.0, 0.0, 1.0}}, + + {PIPE_FORMAT_R32G32_USCALED, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x00000000, 0x00000000), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32_USCALED, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x01000000, 0x00000000), {16777216.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32_USCALED, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x00000000, 0x01000000), { 0.0, 16777216.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32_USCALED, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x01000000, 0x01000000), {16777216.0, 16777216.0, 0.0, 1.0}}, + + {PIPE_FORMAT_R32G32B32_USCALED, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x00000000, 0x00000000), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_USCALED, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x01000000, 0x00000000, 0x00000000), {16777216.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_USCALED, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x01000000, 0x00000000), { 0.0, 16777216.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_USCALED, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x00000000, 0x01000000), { 0.0, 0.0, 16777216.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_USCALED, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x01000000, 0x01000000, 0x01000000), {16777216.0, 16777216.0, 16777216.0, 1.0}}, + + {PIPE_FORMAT_R32G32B32A32_USCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x00000000, 0x00000000), { 0.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_USCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x01000000, 0x00000000, 0x00000000, 0x00000000), {16777216.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_USCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x01000000, 0x00000000, 0x00000000), { 0.0, 16777216.0, 0.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_USCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x01000000, 0x00000000), { 0.0, 0.0, 16777216.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_USCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x00000000, 0x01000000), { 0.0, 0.0, 0.0, 16777216.0}}, + {PIPE_FORMAT_R32G32B32A32_USCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x01000000, 0x01000000, 0x01000000, 0x01000000), {16777216.0, 16777216.0, 16777216.0, 16777216.0}}, + + {PIPE_FORMAT_R32_SNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x00000000), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32_SNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x7fffffff), { 1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32_SNORM, PACKED_1x32(0xffffffff), PACKED_1x32(0x80000001), { -1.0, 0.0, 0.0, 1.0}}, + + {PIPE_FORMAT_R32G32_SNORM, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x00000000, 0x00000000), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32_SNORM, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x7fffffff, 0x00000000), { 1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32_SNORM, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x80000001, 0x00000000), { -1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32_SNORM, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x00000000, 0x7fffffff), { 0.0, 1.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32_SNORM, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x00000000, 0x80000001), { 0.0, -1.0, 0.0, 1.0}}, + + {PIPE_FORMAT_R32G32B32_SNORM, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x00000000, 0x00000000), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_SNORM, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x7fffffff, 0x00000000, 0x00000000), { 1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_SNORM, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x80000001, 0x00000000, 0x00000000), { -1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_SNORM, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x7fffffff, 0x00000000), { 0.0, 1.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_SNORM, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x80000001, 0x00000000), { 0.0, -1.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_SNORM, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x00000000, 0x7fffffff), { 0.0, 0.0, 1.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_SNORM, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x00000000, 0x80000001), { 0.0, 0.0, -1.0, 1.0}}, + + {PIPE_FORMAT_R32G32B32A32_SNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x00000000, 0x00000000), { 0.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_SNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x7fffffff, 0x00000000, 0x00000000, 0x00000000), { 1.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_SNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x80000001, 0x00000000, 0x00000000, 0x00000000), { -1.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_SNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x7fffffff, 0x00000000, 0x00000000), { 0.0, 1.0, 0.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_SNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x80000001, 0x00000000, 0x00000000), { 0.0, -1.0, 0.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_SNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x7fffffff, 0x00000000), { 0.0, 0.0, 1.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_SNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x80000001, 0x00000000), { 0.0, 0.0, -1.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_SNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x00000000, 0x7fffffff), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32B32A32_SNORM, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x00000000, 0x80000001), { 0.0, 0.0, 0.0, -1.0}}, + + {PIPE_FORMAT_R32_SSCALED, PACKED_1x32(0xffffffff), PACKED_1x32(0x00000000), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32_SSCALED, PACKED_1x32(0xffffffff), PACKED_1x32(0x01000000), { 16777216.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32_SSCALED, PACKED_1x32(0xffffffff), PACKED_1x32(0xff000000), {-16777216.0, 0.0, 0.0, 1.0}}, + + {PIPE_FORMAT_R32G32_SSCALED, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x00000000, 0x00000000), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32_SSCALED, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x01000000, 0x00000000), { 16777216.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32_SSCALED, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0xff000000, 0x00000000), {-16777216.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32_SSCALED, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x00000000, 0x01000000), { 0.0, 16777216.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32_SSCALED, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x00000000, 0xff000000), { 0.0, -16777216.0, 0.0, 1.0}}, + + {PIPE_FORMAT_R32G32B32_SSCALED, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x00000000, 0x00000000), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_SSCALED, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x01000000, 0x00000000, 0x00000000), { 16777216.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_SSCALED, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0xff000000, 0x00000000, 0x00000000), {-16777216.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_SSCALED, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x01000000, 0x00000000), { 0.0, 16777216.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_SSCALED, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0xff000000, 0x00000000), { 0.0, -16777216.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_SSCALED, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x00000000, 0x01000000), { 0.0, 0.0, 16777216.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_SSCALED, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x00000000, 0xff000000), { 0.0, 0.0, -16777216.0, 1.0}}, + + {PIPE_FORMAT_R32G32B32A32_SSCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x00000000, 0x00000000), { 0.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_SSCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x01000000, 0x00000000, 0x00000000, 0x00000000), { 16777216.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_SSCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0xff000000, 0x00000000, 0x00000000, 0x00000000), {-16777216.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_SSCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x01000000, 0x00000000, 0x00000000), { 0.0, 16777216.0, 0.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_SSCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0xff000000, 0x00000000, 0x00000000), { 0.0, -16777216.0, 0.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_SSCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x01000000, 0x00000000), { 0.0, 0.0, 16777216.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_SSCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0xff000000, 0x00000000), { 0.0, 0.0, -16777216.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_SSCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x00000000, 0x01000000), { 0.0, 0.0, 0.0, 16777216.0}}, + {PIPE_FORMAT_R32G32B32A32_SSCALED, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x00000000, 0xff000000), { 0.0, 0.0, 0.0, -16777216.0}}, + + /* + * Standard 32-bit float formats + */ + + {PIPE_FORMAT_R32_FLOAT, PACKED_1x32(0xffffffff), PACKED_1x32(0x00000000), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32_FLOAT, PACKED_1x32(0xffffffff), PACKED_1x32(0x3f800000), { 1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32_FLOAT, PACKED_1x32(0xffffffff), PACKED_1x32(0xbf800000), { -1.0, 0.0, 0.0, 1.0}}, + + {PIPE_FORMAT_R32G32_FLOAT, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x00000000, 0x00000000), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32_FLOAT, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x3f800000, 0x00000000), { 1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32_FLOAT, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0xbf800000, 0x00000000), {-1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32_FLOAT, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x00000000, 0x3f800000), { 0.0, 1.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32_FLOAT, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x00000000, 0xbf800000), { 0.0, -1.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32_FLOAT, PACKED_2x32(0xffffffff, 0xffffffff), PACKED_2x32(0x3f800000, 0x3f800000), { 1.0, 1.0, 0.0, 1.0}}, + + {PIPE_FORMAT_R32G32B32_FLOAT, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x00000000, 0x00000000), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_FLOAT, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x3f800000, 0x00000000, 0x00000000), { 1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_FLOAT, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0xbf800000, 0x00000000, 0x00000000), {-1.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_FLOAT, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x3f800000, 0x00000000), { 0.0, 1.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_FLOAT, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0xbf800000, 0x00000000), { 0.0, -1.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_FLOAT, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x00000000, 0x3f800000), { 0.0, 0.0, 1.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_FLOAT, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x00000000, 0x00000000, 0xbf800000), { 0.0, 0.0, -1.0, 1.0}}, + {PIPE_FORMAT_R32G32B32_FLOAT, PACKED_3x32(0xffffffff, 0xffffffff, 0xffffffff), PACKED_3x32(0x3f800000, 0x3f800000, 0x3f800000), { 1.0, 1.0, 1.0, 1.0}}, + + {PIPE_FORMAT_R32G32B32A32_FLOAT, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x00000000, 0x00000000), { 0.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_FLOAT, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x3f800000, 0x00000000, 0x00000000, 0x00000000), { 1.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_FLOAT, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0xbf800000, 0x00000000, 0x00000000, 0x00000000), {-1.0, 0.0, 0.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_FLOAT, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x3f800000, 0x00000000, 0x00000000), { 0.0, 1.0, 0.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_FLOAT, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0xbf800000, 0x00000000, 0x00000000), { 0.0, -1.0, 0.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_FLOAT, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x3f800000, 0x00000000), { 0.0, 0.0, 1.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_FLOAT, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0xbf800000, 0x00000000), { 0.0, 0.0, -1.0, 0.0}}, + {PIPE_FORMAT_R32G32B32A32_FLOAT, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x00000000, 0x3f800000), { 0.0, 0.0, 0.0, 1.0}}, + {PIPE_FORMAT_R32G32B32A32_FLOAT, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x00000000, 0x00000000, 0x00000000, 0xbf800000), { 0.0, 0.0, 0.0, -1.0}}, + {PIPE_FORMAT_R32G32B32A32_FLOAT, PACKED_4x32(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), PACKED_4x32(0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000), { 1.0, 1.0, 1.0, 1.0}}, +}; + + +const unsigned util_format_nr_test_cases = Elements(util_format_test_cases); diff --git a/src/gallium/auxiliary/util/u_format_tests.h b/src/gallium/auxiliary/util/u_format_tests.h new file mode 100644 index 0000000000..2d4d9d5fa9 --- /dev/null +++ b/src/gallium/auxiliary/util/u_format_tests.h @@ -0,0 +1,69 @@ +/************************************************************************** + * + * Copyright 2010 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + **************************************************************************/ + + +#ifndef U_FORMAT_TESTS_H_ +#define U_FORMAT_TESTS_H_ + + +#include "pipe/p_compiler.h" +#include "pipe/p_format.h" + + +#define UTIL_FORMAT_MAX_PACKED_BYTES 16 + + +/** + * A (packed, unpacked) color pair. + */ +struct util_format_test_case +{ + enum pipe_format format; + + /** + * Mask of the bits that actually meaningful data. Used to mask out the + * "X" channels. + */ + uint8_t mask[UTIL_FORMAT_MAX_PACKED_BYTES]; + + uint8_t packed[UTIL_FORMAT_MAX_PACKED_BYTES]; + + /** + * RGBA. + */ + double unpacked[4]; +}; + + +extern const struct util_format_test_case +util_format_test_cases[]; + + +extern const unsigned util_format_nr_test_cases; + + +#endif /* U_FORMAT_TESTS_H_ */ diff --git a/src/gallium/drivers/i915/i915_texture.c b/src/gallium/drivers/i915/i915_texture.c index 7ba222c78b..334959c46d 100644 --- a/src/gallium/drivers/i915/i915_texture.c +++ b/src/gallium/drivers/i915/i915_texture.c @@ -219,12 +219,12 @@ i915_miptree_layout_2d(struct i915_texture *tex) unsigned nblocksy = util_format_get_nblocksy(pt->format, pt->width0); /* used for scanouts that need special layouts */ - if (pt->tex_usage & PIPE_TEXTURE_USAGE_PRIMARY) + if (pt->tex_usage & PIPE_TEXTURE_USAGE_SCANOUT) if (i915_scanout_layout(tex)) return; - /* for shared buffers we use something very like scanout */ - if (pt->tex_usage & PIPE_TEXTURE_USAGE_DISPLAY_TARGET) + /* shared buffers needs to be compatible with X servers */ + if (pt->tex_usage & PIPE_TEXTURE_USAGE_SHARED) if (i915_display_target_layout(tex)) return; @@ -369,12 +369,12 @@ i945_miptree_layout_2d(struct i915_texture *tex) unsigned nblocksy = util_format_get_nblocksy(pt->format, pt->height0); /* used for scanouts that need special layouts */ - if (tex->base.tex_usage & PIPE_TEXTURE_USAGE_PRIMARY) + if (tex->base.tex_usage & PIPE_TEXTURE_USAGE_SCANOUT) if (i915_scanout_layout(tex)) return; - /* for shared buffers we use some very like scanout */ - if (tex->base.tex_usage & PIPE_TEXTURE_USAGE_DISPLAY_TARGET) + /* shared buffers needs to be compatible with X servers */ + if (tex->base.tex_usage & PIPE_TEXTURE_USAGE_SHARED) if (i915_display_target_layout(tex)) return; @@ -642,7 +642,7 @@ i915_texture_create(struct pipe_screen *screen, /* for scanouts and cursors, cursors arn't scanouts */ - if (templat->tex_usage & PIPE_TEXTURE_USAGE_PRIMARY && templat->width0 != 64) + if (templat->tex_usage & PIPE_TEXTURE_USAGE_SCANOUT && templat->width0 != 64) buf_usage = INTEL_NEW_SCANOUT; else buf_usage = INTEL_NEW_TEXTURE; @@ -673,6 +673,58 @@ fail: } static struct pipe_texture * +i915_texture_from_handle(struct pipe_screen * screen, + const struct pipe_texture *templat, + struct winsys_handle *whandle) +{ + struct i915_screen *is = i915_screen(screen); + struct i915_texture *tex; + struct intel_winsys *iws = is->iws; + struct intel_buffer *buffer; + unsigned stride; + + assert(screen); + + buffer = iws->buffer_from_handle(iws, whandle, &stride); + + /* Only supports one type */ + if (templat->target != PIPE_TEXTURE_2D || + templat->last_level != 0 || + templat->depth0 != 1) { + return NULL; + } + + tex = CALLOC_STRUCT(i915_texture); + if (!tex) + return NULL; + + tex->base = *templat; + pipe_reference_init(&tex->base.reference, 1); + tex->base.screen = screen; + + tex->stride = stride; + + i915_miptree_set_level_info(tex, 0, 1, templat->width0, templat->height0, 1); + i915_miptree_set_image_offset(tex, 0, 0, 0, 0); + + tex->buffer = buffer; + + return &tex->base; +} + +static boolean +i915_texture_get_handle(struct pipe_screen * screen, + struct pipe_texture *texture, + struct winsys_handle *whandle) +{ + struct i915_screen *is = i915_screen(screen); + struct i915_texture *tex = (struct i915_texture *)texture; + struct intel_winsys *iws = is->iws; + + return iws->buffer_get_handle(iws, tex->buffer, whandle, tex->stride); +} + +static struct pipe_texture * i915_texture_blanket(struct pipe_screen * screen, const struct pipe_texture *base, const unsigned *stride, @@ -869,6 +921,8 @@ void i915_init_screen_texture_functions(struct i915_screen *is) { is->base.texture_create = i915_texture_create; + is->base.texture_from_handle = i915_texture_from_handle; + is->base.texture_get_handle = i915_texture_get_handle; is->base.texture_blanket = i915_texture_blanket; is->base.texture_destroy = i915_texture_destroy; is->base.get_tex_surface = i915_get_tex_surface; @@ -878,53 +932,3 @@ i915_init_screen_texture_functions(struct i915_screen *is) is->base.transfer_unmap = i915_transfer_unmap; is->base.tex_transfer_destroy = i915_tex_transfer_destroy; } - -struct pipe_texture * -i915_texture_blanket_intel(struct pipe_screen *screen, - struct pipe_texture *base, - unsigned stride, - struct intel_buffer *buffer) -{ - struct i915_texture *tex; - assert(screen); - - /* Only supports one type */ - if (base->target != PIPE_TEXTURE_2D || - base->last_level != 0 || - base->depth0 != 1) { - return NULL; - } - - tex = CALLOC_STRUCT(i915_texture); - if (!tex) - return NULL; - - tex->base = *base; - pipe_reference_init(&tex->base.reference, 1); - tex->base.screen = screen; - - tex->stride = stride; - - i915_miptree_set_level_info(tex, 0, 1, base->width0, base->height0, 1); - i915_miptree_set_image_offset(tex, 0, 0, 0, 0); - - tex->buffer = buffer; - - return &tex->base; -} - -boolean -i915_get_texture_buffer_intel(struct pipe_texture *texture, - struct intel_buffer **buffer, - unsigned *stride) -{ - struct i915_texture *tex = (struct i915_texture *)texture; - - if (!texture) - return FALSE; - - *stride = tex->stride; - *buffer = tex->buffer; - - return TRUE; -} diff --git a/src/gallium/drivers/i915/intel_winsys.h b/src/gallium/drivers/i915/intel_winsys.h index b3a802b0e2..00fd0c1efe 100644 --- a/src/gallium/drivers/i915/intel_winsys.h +++ b/src/gallium/drivers/i915/intel_winsys.h @@ -33,6 +33,7 @@ struct intel_buffer; struct intel_batchbuffer; struct pipe_texture; struct pipe_fence_handle; +struct winsys_handle; enum intel_buffer_usage { @@ -129,6 +130,25 @@ struct intel_winsys { enum intel_buffer_type type); /** + * Creates a buffer from a handle. + * Used to implement pipe_screen::texture_from_handle. + * Also provides the stride information needed for the + * texture via the stride argument. + */ + struct intel_buffer *(*buffer_from_handle)(struct intel_winsys *iws, + struct winsys_handle *whandle, + unsigned *stride); + + /** + * Used to implement pipe_screen::texture_get_handle. + * The winsys might need the stride information. + */ + boolean (*buffer_get_handle)(struct intel_winsys *iws, + struct intel_buffer *buffer, + struct winsys_handle *whandle, + unsigned stride); + + /** * Fence a buffer with a fence reg. * Not to be confused with pipe_fence_handle. */ @@ -204,23 +224,4 @@ struct intel_winsys { struct pipe_screen *i915_create_screen(struct intel_winsys *iws, unsigned pci_id); -/** - * Get the intel_winsys buffer backing the texture. - * - * TODO UGLY - */ -boolean i915_get_texture_buffer_intel(struct pipe_texture *texture, - struct intel_buffer **buffer, - unsigned *stride); - -/** - * Wrap a intel_winsys buffer with a texture blanket. - * - * TODO UGLY - */ -struct pipe_texture * i915_texture_blanket_intel(struct pipe_screen *screen, - struct pipe_texture *tmplt, - unsigned pitch, - struct intel_buffer *buffer); - #endif diff --git a/src/gallium/drivers/i965/brw_screen_texture.c b/src/gallium/drivers/i965/brw_screen_texture.c index e38fdf1869..caa16ee150 100644 --- a/src/gallium/drivers/i965/brw_screen_texture.c +++ b/src/gallium/drivers/i965/brw_screen_texture.c @@ -231,8 +231,8 @@ static struct pipe_texture *brw_texture_create( struct pipe_screen *screen, goto fail; - if (templ->tex_usage & (PIPE_TEXTURE_USAGE_DISPLAY_TARGET | - PIPE_TEXTURE_USAGE_PRIMARY)) { + if (templ->tex_usage & (PIPE_TEXTURE_USAGE_SCANOUT | + PIPE_TEXTURE_USAGE_SHARED)) { buffer_type = BRW_BUFFER_TYPE_SCANOUT; } else { @@ -303,6 +303,119 @@ fail: return NULL; } +static struct pipe_texture * +brw_texture_from_handle(struct pipe_screen *screen, + const struct pipe_texture *templ, + struct winsys_handle *whandle) +{ + struct brw_screen *bscreen = brw_screen(screen); + struct brw_texture *tex; + struct brw_winsys_buffer *buffer; + unsigned tiling; + unsigned pitch; + + if (templ->target != PIPE_TEXTURE_2D || + templ->last_level != 0 || + templ->depth0 != 1) + return NULL; + + if (util_format_is_compressed(templ->format)) + return NULL; + + tex = CALLOC_STRUCT(brw_texture); + if (!tex) + return NULL; + + if (bscreen->sws->bo_from_handle(bscreen->sws, whandle, &pitch, &tiling, &buffer) != PIPE_OK) + goto fail; + + memcpy(&tex->base, templ, sizeof *templ); + pipe_reference_init(&tex->base.reference, 1); + tex->base.screen = screen; + + /* XXX: cpp vs. blocksize + */ + tex->cpp = util_format_get_blocksize(tex->base.format); + tex->tiling = tiling; + + make_empty_list(&tex->views[0]); + make_empty_list(&tex->views[1]); + + if (!brw_texture_layout(bscreen, tex)) + goto fail; + + /* XXX Maybe some more checks? */ + if ((pitch / tex->cpp) < tex->pitch) + goto fail; + + tex->pitch = pitch / tex->cpp; + + tex->bo = buffer; + + /* fix this warning */ +#if 0 + if (tex->size > buffer->size) + goto fail; +#endif + + tex->ss.ss0.mipmap_layout_mode = BRW_SURFACE_MIPMAPLAYOUT_BELOW; + tex->ss.ss0.surface_type = translate_tex_target(tex->base.target); + tex->ss.ss0.surface_format = translate_tex_format(tex->base.format); + assert(tex->ss.ss0.surface_format != BRW_SURFACEFORMAT_INVALID); + + /* This is ok for all textures with channel width 8bit or less: + */ +/* tex->ss.ss0.data_return_format = BRW_SURFACERETURNFORMAT_S1; */ + + + /* XXX: what happens when tex->bo->offset changes??? + */ + tex->ss.ss1.base_addr = 0; /* reloc */ + tex->ss.ss2.mip_count = tex->base.last_level; + tex->ss.ss2.width = tex->base.width0 - 1; + tex->ss.ss2.height = tex->base.height0 - 1; + + switch (tex->tiling) { + case BRW_TILING_NONE: + tex->ss.ss3.tiled_surface = 0; + tex->ss.ss3.tile_walk = 0; + break; + case BRW_TILING_X: + tex->ss.ss3.tiled_surface = 1; + tex->ss.ss3.tile_walk = BRW_TILEWALK_XMAJOR; + break; + case BRW_TILING_Y: + tex->ss.ss3.tiled_surface = 1; + tex->ss.ss3.tile_walk = BRW_TILEWALK_YMAJOR; + break; + } + + tex->ss.ss3.pitch = (tex->pitch * tex->cpp) - 1; + tex->ss.ss3.depth = tex->base.depth0 - 1; + + tex->ss.ss4.min_lod = 0; + + return &tex->base; + +fail: + FREE(tex); + return NULL; +} + +static boolean +brw_texture_get_handle(struct pipe_screen *screen, + struct pipe_texture *texture, + struct winsys_handle *whandle) +{ + struct brw_screen *bscreen = brw_screen(screen); + struct brw_texture *tex = brw_texture(texture); + unsigned stride; + + stride = tex->pitch * tex->cpp; + + return bscreen->sws->bo_get_handle(tex->bo, whandle, stride); +} + static struct pipe_texture *brw_texture_blanket(struct pipe_screen *screen, const struct pipe_texture *templ, const unsigned *stride, @@ -451,125 +564,12 @@ brw_tex_transfer_destroy(struct pipe_transfer *trans) } -/* - * Functions exported to the winsys - */ - -boolean brw_texture_get_winsys_buffer(struct pipe_texture *texture, - struct brw_winsys_buffer **buffer, - unsigned *stride) -{ - struct brw_texture *tex = brw_texture(texture); - - *buffer = tex->bo; - if (stride) - *stride = tex->pitch * tex->cpp; - - return TRUE; -} - -struct pipe_texture * -brw_texture_blanket_winsys_buffer(struct pipe_screen *screen, - const struct pipe_texture *templ, - unsigned pitch, - unsigned tiling, - struct brw_winsys_buffer *buffer) -{ - struct brw_screen *bscreen = brw_screen(screen); - struct brw_texture *tex; - GLuint format; - - if (templ->target != PIPE_TEXTURE_2D || - templ->last_level != 0 || - templ->depth0 != 1) - return NULL; - - if (util_format_is_compressed(templ->format)) - return NULL; - - tex = CALLOC_STRUCT(brw_texture); - if (!tex) - return NULL; - - memcpy(&tex->base, templ, sizeof *templ); - pipe_reference_init(&tex->base.reference, 1); - tex->base.screen = screen; - - /* XXX: cpp vs. blocksize - */ - tex->cpp = util_format_get_blocksize(tex->base.format); - tex->tiling = tiling; - - make_empty_list(&tex->views[0]); - make_empty_list(&tex->views[1]); - - if (!brw_texture_layout(bscreen, tex)) - goto fail; - - /* XXX Maybe some more checks? */ - if ((pitch / tex->cpp) < tex->pitch) - goto fail; - - tex->pitch = pitch / tex->cpp; - - tex->bo = buffer; - - /* fix this warning */ -#if 0 - if (tex->size > buffer->size) - goto fail; -#endif - - tex->ss.ss0.mipmap_layout_mode = BRW_SURFACE_MIPMAPLAYOUT_BELOW; - tex->ss.ss0.surface_type = translate_tex_target(tex->base.target); - - format = translate_tex_format(tex->base.format); - assert(format != BRW_SURFACEFORMAT_INVALID); - tex->ss.ss0.surface_format = format; - - /* This is ok for all textures with channel width 8bit or less: - */ -/* tex->ss.ss0.data_return_format = BRW_SURFACERETURNFORMAT_S1; */ - - - /* XXX: what happens when tex->bo->offset changes??? - */ - tex->ss.ss1.base_addr = 0; /* reloc */ - tex->ss.ss2.mip_count = tex->base.last_level; - tex->ss.ss2.width = tex->base.width0 - 1; - tex->ss.ss2.height = tex->base.height0 - 1; - - switch (tex->tiling) { - case BRW_TILING_NONE: - tex->ss.ss3.tiled_surface = 0; - tex->ss.ss3.tile_walk = 0; - break; - case BRW_TILING_X: - tex->ss.ss3.tiled_surface = 1; - tex->ss.ss3.tile_walk = BRW_TILEWALK_XMAJOR; - break; - case BRW_TILING_Y: - tex->ss.ss3.tiled_surface = 1; - tex->ss.ss3.tile_walk = BRW_TILEWALK_YMAJOR; - break; - } - - tex->ss.ss3.pitch = (tex->pitch * tex->cpp) - 1; - tex->ss.ss3.depth = tex->base.depth0 - 1; - - tex->ss.ss4.min_lod = 0; - - return &tex->base; - -fail: - FREE(tex); - return NULL; -} - void brw_screen_tex_init( struct brw_screen *brw_screen ) { brw_screen->base.is_format_supported = brw_is_format_supported; brw_screen->base.texture_create = brw_texture_create; + brw_screen->base.texture_from_handle = brw_texture_from_handle; + brw_screen->base.texture_get_handle = brw_texture_get_handle; brw_screen->base.texture_destroy = brw_texture_destroy; brw_screen->base.texture_blanket = brw_texture_blanket; brw_screen->base.get_tex_transfer = brw_get_tex_transfer; diff --git a/src/gallium/drivers/i965/brw_winsys.h b/src/gallium/drivers/i965/brw_winsys.h index c82d00f4a4..139e26e31f 100644 --- a/src/gallium/drivers/i965/brw_winsys.h +++ b/src/gallium/drivers/i965/brw_winsys.h @@ -162,6 +162,16 @@ struct brw_winsys_screen { unsigned alignment, struct brw_winsys_buffer **bo_out); + enum pipe_error (*bo_from_handle)(struct brw_winsys_screen *sws, + struct winsys_handle *whandle, + unsigned *stride, + unsigned *tiling, + struct brw_winsys_buffer **bo_out); + + enum pipe_error (*bo_get_handle)(struct brw_winsys_buffer *buffer, + struct winsys_handle *whandle, + unsigned stride); + /* Destroy a buffer when our refcount goes to zero: */ void (*bo_destroy)(struct brw_winsys_buffer *buffer); diff --git a/src/gallium/drivers/identity/id_drm.c b/src/gallium/drivers/identity/id_drm.c index f258c38cd7..936ccc444a 100644 --- a/src/gallium/drivers/identity/id_drm.c +++ b/src/gallium/drivers/identity/id_drm.c @@ -63,62 +63,6 @@ identity_drm_create_screen(struct drm_api *_api, int fd, return identity_screen_create(screen); } - -static struct pipe_texture * -identity_drm_texture_from_shared_handle(struct drm_api *_api, - struct pipe_screen *_screen, - struct pipe_texture *templ, - const char *name, - unsigned stride, - unsigned handle) -{ - struct identity_screen *id_screen = identity_screen(_screen); - struct identity_drm_api *id_api = identity_drm_api(_api); - struct pipe_screen *screen = id_screen->screen; - struct drm_api *api = id_api->api; - struct pipe_texture *result; - - result = api->texture_from_shared_handle(api, screen, templ, name, stride, handle); - - result = identity_texture_create(identity_screen(_screen), result); - - return result; -} - -static boolean -identity_drm_shared_handle_from_texture(struct drm_api *_api, - struct pipe_screen *_screen, - struct pipe_texture *_texture, - unsigned *stride, - unsigned *handle) -{ - struct identity_screen *id_screen = identity_screen(_screen); - struct identity_texture *id_texture = identity_texture(_texture); - struct identity_drm_api *id_api = identity_drm_api(_api); - struct pipe_screen *screen = id_screen->screen; - struct pipe_texture *texture = id_texture->texture; - struct drm_api *api = id_api->api; - - return api->shared_handle_from_texture(api, screen, texture, stride, handle); -} - -static boolean -identity_drm_local_handle_from_texture(struct drm_api *_api, - struct pipe_screen *_screen, - struct pipe_texture *_texture, - unsigned *stride, - unsigned *handle) -{ - struct identity_screen *id_screen = identity_screen(_screen); - struct identity_texture *id_texture = identity_texture(_texture); - struct identity_drm_api *id_api = identity_drm_api(_api); - struct pipe_screen *screen = id_screen->screen; - struct pipe_texture *texture = id_texture->texture; - struct drm_api *api = id_api->api; - - return api->local_handle_from_texture(api, screen, texture, stride, handle); -} - static void identity_drm_destroy(struct drm_api *_api) { @@ -145,9 +89,6 @@ identity_drm_create(struct drm_api *api) id_api->base.name = api->name; id_api->base.driver_name = api->driver_name; id_api->base.create_screen = identity_drm_create_screen; - id_api->base.texture_from_shared_handle = identity_drm_texture_from_shared_handle; - id_api->base.shared_handle_from_texture = identity_drm_shared_handle_from_texture; - id_api->base.local_handle_from_texture = identity_drm_local_handle_from_texture; id_api->base.destroy = identity_drm_destroy; id_api->api = api; diff --git a/src/gallium/drivers/identity/id_screen.c b/src/gallium/drivers/identity/id_screen.c index b85492114a..77e15b92f7 100644 --- a/src/gallium/drivers/identity/id_screen.c +++ b/src/gallium/drivers/identity/id_screen.c @@ -135,6 +135,39 @@ identity_screen_texture_create(struct pipe_screen *_screen, } static struct pipe_texture * +identity_screen_texture_from_handle(struct pipe_screen *_screen, + const struct pipe_texture *templ, + struct winsys_handle *handle) +{ + struct identity_screen *id_screen = identity_screen(_screen); + struct pipe_screen *screen = id_screen->screen; + struct pipe_texture *result; + + /* TODO trace call */ + + result = screen->texture_from_handle(screen, templ, handle); + + result = identity_texture_create(identity_screen(_screen), result); + + return result; +} + +static boolean +identity_screen_texture_get_handle(struct pipe_screen *_screen, + struct pipe_texture *_texture, + struct winsys_handle *handle) +{ + struct identity_screen *id_screen = identity_screen(_screen); + struct identity_texture *id_texture = identity_texture(_texture); + struct pipe_screen *screen = id_screen->screen; + struct pipe_texture *texture = id_texture->texture; + + /* TODO trace call */ + + return screen->texture_get_handle(screen, texture, handle); +} + +static struct pipe_texture * identity_screen_texture_blanket(struct pipe_screen *_screen, const struct pipe_texture *templat, const unsigned *stride, @@ -495,6 +528,8 @@ identity_screen_create(struct pipe_screen *screen) id_screen->base.is_format_supported = identity_screen_is_format_supported; id_screen->base.context_create = identity_screen_context_create; id_screen->base.texture_create = identity_screen_texture_create; + id_screen->base.texture_from_handle = identity_screen_texture_from_handle; + id_screen->base.texture_get_handle = identity_screen_texture_get_handle; id_screen->base.texture_blanket = identity_screen_texture_blanket; id_screen->base.texture_destroy = identity_screen_texture_destroy; id_screen->base.get_tex_surface = identity_screen_get_tex_surface; diff --git a/src/gallium/drivers/llvmpipe/lp_texture.c b/src/gallium/drivers/llvmpipe/lp_texture.c index 7f45635542..7d15e85600 100644 --- a/src/gallium/drivers/llvmpipe/lp_texture.c +++ b/src/gallium/drivers/llvmpipe/lp_texture.c @@ -125,7 +125,8 @@ llvmpipe_texture_create(struct pipe_screen *_screen, lpt->base.screen = &screen->base; if (lpt->base.tex_usage & (PIPE_TEXTURE_USAGE_DISPLAY_TARGET | - PIPE_TEXTURE_USAGE_PRIMARY)) { + PIPE_TEXTURE_USAGE_SCANOUT | + PIPE_TEXTURE_USAGE_SHARED)) { if (!llvmpipe_displaytarget_layout(screen, lpt)) goto fail; } diff --git a/src/gallium/drivers/nouveau/nouveau_screen.c b/src/gallium/drivers/nouveau/nouveau_screen.c index 3c2f771b51..2013eef0c5 100644 --- a/src/gallium/drivers/nouveau/nouveau_screen.c +++ b/src/gallium/drivers/nouveau/nouveau_screen.c @@ -4,6 +4,7 @@ #include "util/u_memory.h" #include "util/u_inlines.h" +#include "util/u_format.h" #include <stdio.h> #include <errno.h> @@ -12,6 +13,9 @@ #include "nouveau_winsys.h" #include "nouveau_screen.h" +/* XXX this should go away */ +#include "state_tracker/drm_api.h" + static const char * nouveau_screen_get_name(struct pipe_screen *pscreen) { @@ -231,6 +235,71 @@ nouveau_screen_fence_finish(struct pipe_screen *screen, return 0; } + +/* + * Both texture_{from|get}_handle use drm api defines directly which they + * shouldn't do. The problem is that from|get are pipe functions and as + * such they should be defined in the pipe level. If nouveau had a propper + * winsys interface we would have added from|get to that interface using + * the winsys_handle struct as done with other drivers. However this code + * calls directly into the libdrm_nouveau.so functions (nouveau_bo_*). So + * we need to translate the handle into something they understand. + */ +static struct pipe_texture * +nouveau_screen_texture_from_handle(struct pipe_screen *pscreen, + const struct pipe_texture *templ, + struct winsys_handle *whandle) +{ + struct nouveau_device *dev = nouveau_screen(pscreen)->device; + struct pipe_texture *pt; + struct pipe_buffer *pb; + int ret; + + pb = CALLOC(1, sizeof(struct pipe_buffer) + sizeof(struct nouveau_bo*)); + if (!pb) + return NULL; + + ret = nouveau_bo_handle_ref(dev, whandle->handle, (struct nouveau_bo**)(pb+1)); + if (ret) { + debug_printf("%s: ref name 0x%08x failed with %d\n", + __func__, whandle->handle, ret); + FREE(pb); + return NULL; + } + + pipe_reference_init(&pb->reference, 1); + pb->screen = pscreen; + pb->alignment = 0; + pb->usage = PIPE_BUFFER_USAGE_GPU_READ_WRITE | + PIPE_BUFFER_USAGE_CPU_READ_WRITE; + pb->size = nouveau_bo(pb)->size; + pt = pscreen->texture_blanket(pscreen, templ, &whandle->stride, pb); + pipe_buffer_reference(&pb, NULL); + return pt; +} + +static boolean +nouveau_screen_texture_get_handle(struct pipe_screen *pscreen, + struct pipe_texture *pt, + struct winsys_handle *whandle) +{ + struct nouveau_miptree *mt = nouveau_miptree(pt); + + if (!mt || !mt->bo) + return false; + + whandle->stride = util_format_get_stride(mt->base.format, mt->base.width0); + + if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) { + return nouveau_bo_handle_get(mt->bo, &whandle->handle) == 0; + } else if (whandle->type == DRM_API_HANDLE_TYPE_KMS) { + whandle->handle = mt->bo->handle; + return TRUE; + } else { + return FALSE; + } +} + int nouveau_screen_init(struct nouveau_screen *screen, struct nouveau_device *dev) { @@ -258,6 +327,9 @@ nouveau_screen_init(struct nouveau_screen *screen, struct nouveau_device *dev) pscreen->fence_signalled = nouveau_screen_fence_signalled; pscreen->fence_finish = nouveau_screen_fence_finish; + pscreen->texture_from_handle = nouveau_screen_texture_from_handle; + pscreen->texture_get_handle = nouveau_screen_texture_get_handle; + return 0; } diff --git a/src/gallium/drivers/nv30/nv30_miptree.c b/src/gallium/drivers/nv30/nv30_miptree.c index 697b1b92ff..cb756cf6e6 100644 --- a/src/gallium/drivers/nv30/nv30_miptree.c +++ b/src/gallium/drivers/nv30/nv30_miptree.c @@ -18,7 +18,7 @@ nv30_miptree_layout(struct nv30_miptree *nv30mt) PIPE_TEXTURE_USAGE_DEPTH_STENCIL | PIPE_TEXTURE_USAGE_RENDER_TARGET | PIPE_TEXTURE_USAGE_DISPLAY_TARGET | - PIPE_TEXTURE_USAGE_PRIMARY); + PIPE_TEXTURE_USAGE_SCANOUT); if (pt->target == PIPE_TEXTURE_CUBE) { nr_faces = 6; @@ -78,7 +78,7 @@ nv30_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt) pt->height0 & (pt->height0 - 1)) mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; else - if (pt->tex_usage & (PIPE_TEXTURE_USAGE_PRIMARY | + if (pt->tex_usage & (PIPE_TEXTURE_USAGE_SCANOUT | PIPE_TEXTURE_USAGE_DISPLAY_TARGET | PIPE_TEXTURE_USAGE_DEPTH_STENCIL)) mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; diff --git a/src/gallium/drivers/nv40/nv40_miptree.c b/src/gallium/drivers/nv40/nv40_miptree.c index 85d7e1f197..b17255dc6b 100644 --- a/src/gallium/drivers/nv40/nv40_miptree.c +++ b/src/gallium/drivers/nv40/nv40_miptree.c @@ -20,7 +20,7 @@ nv40_miptree_layout(struct nv40_miptree *mt) PIPE_TEXTURE_USAGE_DEPTH_STENCIL | PIPE_TEXTURE_USAGE_RENDER_TARGET | PIPE_TEXTURE_USAGE_DISPLAY_TARGET | - PIPE_TEXTURE_USAGE_PRIMARY); + PIPE_TEXTURE_USAGE_SCANOUT); if (pt->target == PIPE_TEXTURE_CUBE) { nr_faces = 6; @@ -80,7 +80,7 @@ nv40_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt) pt->height0 & (pt->height0 - 1)) mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; else - if (pt->tex_usage & (PIPE_TEXTURE_USAGE_PRIMARY | + if (pt->tex_usage & (PIPE_TEXTURE_USAGE_SCANOUT | PIPE_TEXTURE_USAGE_DISPLAY_TARGET | PIPE_TEXTURE_USAGE_DEPTH_STENCIL)) mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; diff --git a/src/gallium/drivers/nv50/nv50_miptree.c b/src/gallium/drivers/nv50/nv50_miptree.c index 3f9d869d7a..a7788249ab 100644 --- a/src/gallium/drivers/nv50/nv50_miptree.c +++ b/src/gallium/drivers/nv50/nv50_miptree.c @@ -104,7 +104,7 @@ nv50_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *tmp) tile_flags = 0x7400; break; default: - if ((pt->tex_usage & PIPE_TEXTURE_USAGE_PRIMARY) && + if ((pt->tex_usage & PIPE_TEXTURE_USAGE_SCANOUT) && util_format_get_blocksizebits(pt->format) == 32) tile_flags = 0x7a00; else diff --git a/src/gallium/drivers/r300/Makefile b/src/gallium/drivers/r300/Makefile index 1f69daec81..61b54af4dd 100644 --- a/src/gallium/drivers/r300/Makefile +++ b/src/gallium/drivers/r300/Makefile @@ -19,7 +19,8 @@ C_SOURCES = \ r300_state_invariant.c \ r300_vs.c \ r300_texture.c \ - r300_tgsi_to_rc.c + r300_tgsi_to_rc.c \ + r300_transfer.c LIBRARY_INCLUDES = \ -I$(TOP)/src/mesa/drivers/dri/r300/compiler \ diff --git a/src/gallium/drivers/r300/SConscript b/src/gallium/drivers/r300/SConscript index 183aa17f9b..27b2e30993 100644 --- a/src/gallium/drivers/r300/SConscript +++ b/src/gallium/drivers/r300/SConscript @@ -30,6 +30,7 @@ r300 = env.ConvenienceLibrary( 'r300_vs.c', 'r300_texture.c', 'r300_tgsi_to_rc.c', + 'r300_transfer.c', ] + r300compiler) + r300compiler Export('r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 86b98a4ba5..e0a5532327 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -72,11 +72,8 @@ r300_is_texture_referenced(struct pipe_context *pipe, struct pipe_texture *texture, unsigned face, unsigned level) { - struct pipe_buffer* buf = 0; - - r300_get_texture_buffer(pipe->screen, texture, &buf, NULL); - - return pipe->is_buffer_referenced(pipe, buf); + return pipe->is_buffer_referenced(pipe, + ((struct r300_texture *)texture)->buffer); } static unsigned int @@ -86,7 +83,14 @@ r300_is_buffer_referenced(struct pipe_context *pipe, /* This only checks to see whether actual hardware buffers are * referenced. Since we use managed BOs and transfers, it's actually not * possible for pipe_buffers to ever reference the actual hardware, so - * buffers are never referenced. */ + * buffers are never referenced. + */ + + /* XXX: that doesn't make sense given that + * r300_is_texture_referenced is implemented on top of this + * function and hardware can certainly refer to textures + * directly... + */ return 0; } @@ -159,6 +163,8 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, if (!r300) return NULL; + r300screen->ctx = (struct pipe_context*)r300; + r300->winsys = radeon_winsys; r300->context.winsys = (struct pipe_winsys*)radeon_winsys; @@ -212,7 +218,6 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300->invariant_state.dirty = TRUE; r300->winsys->set_flush_cb(r300->winsys, r300_flush_cb, r300); - r300->dirty_state = R300_NEW_KITCHEN_SINK; r300->dirty_hw++; r300->blitter = util_blitter_create(&r300->context); diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 0d1518a05b..8c52d880a3 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -368,6 +368,8 @@ struct r300_context { boolean polygon_offset_enabled; /* Z buffer bit depth. */ uint32_t zbuffer_bpp; + /* Whether scissor is enabled. */ + boolean scissor_enabled; }; /* Convenience cast wrapper. */ diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index addb28bded..51fc590e5d 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -675,7 +675,7 @@ void r300_emit_scissor_state(struct r300_context* r300, maxx = fb->width; maxy = fb->height; - if (((struct r300_rs_state*)r300->rs_state.state)->rs.scissor) { + if (r300->scissor_enabled) { minx = MAX2(minx, scissor->minx); miny = MAX2(miny, scissor->miny); maxx = MIN2(maxx, scissor->maxx); @@ -794,6 +794,30 @@ void r300_emit_aos(struct r300_context* r300, unsigned offset) END_CS; } +void r300_emit_vertex_buffer(struct r300_context* r300) +{ + CS_LOCALS(r300); + + DBG(r300, DBG_DRAW, "r300: Preparing vertex buffer %p for render, " + "vertex size %d\n", r300->vbo, + r300->vertex_info.size); + /* Set the pointer to our vertex buffer. The emitted values are this: + * PACKET3 [3D_LOAD_VBPNTR] + * COUNT [1] + * FORMAT [size | stride << 8] + * OFFSET [offset into BO] + * VBPNTR [relocated BO] + */ + BEGIN_CS(7); + OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, 3); + OUT_CS(1); + OUT_CS(r300->vertex_info.size | + (r300->vertex_info.size << 8)); + OUT_CS(r300->vbo_offset); + OUT_CS_RELOC(r300->vbo, 0, RADEON_GEM_DOMAIN_GTT, 0, 0); + END_CS; +} + void r300_emit_vertex_stream_state(struct r300_context* r300, unsigned size, void* state) { @@ -868,7 +892,7 @@ void r300_emit_vs_state(struct r300_context* r300, unsigned size, void* state) CS_LOCALS(r300); if (!r300screen->caps->has_tcl) { - debug_printf("r300: Implementation error: emit_vertex_shader called," + debug_printf("r300: Implementation error: emit_vs_state called," " but has_tcl is FALSE!\n"); return; } @@ -907,7 +931,7 @@ void r300_emit_vs_constant_buffer(struct r300_context* r300, CS_LOCALS(r300); if (!r300screen->caps->has_tcl) { - debug_printf("r300: Implementation error: emit_vertex_shader called," + debug_printf("r300: Implementation error: emit_vs_constant_buffer called," " but has_tcl is FALSE!\n"); return; } @@ -1135,8 +1159,10 @@ void r300_emit_dirty_state(struct r300_context* r300) assert(r300->dirty_state == 0); */ - /* Finally, emit the VBO. */ - /* r300_emit_vertex_buffer(r300); */ + /* Emit the VBO for SWTCL. */ + if (!r300screen->caps->has_tcl) { + r300_emit_vertex_buffer(r300); + } r300->dirty_hw++; } diff --git a/src/gallium/drivers/r300/r300_flush.c b/src/gallium/drivers/r300/r300_flush.c index e37d309270..70de152713 100644 --- a/src/gallium/drivers/r300/r300_flush.c +++ b/src/gallium/drivers/r300/r300_flush.c @@ -61,6 +61,12 @@ static void r300_flush(struct pipe_context* pipe, atom->dirty = TRUE; } } + + /* Unmark HWTCL state for SWTCL. */ + if (!r300_screen(pipe->screen)->caps->has_tcl) { + r300->vs_state.dirty = FALSE; + r300->dirty_state &= ~R300_NEW_VERTEX_SHADER_CONSTANTS; + } } /* reset flushed query */ diff --git a/src/gallium/drivers/r300/r300_fs.c b/src/gallium/drivers/r300/r300_fs.c index 3c2625269b..9e71e61c30 100644 --- a/src/gallium/drivers/r300/r300_fs.c +++ b/src/gallium/drivers/r300/r300_fs.c @@ -207,6 +207,7 @@ static void r300_translate_fragment_shader( DBG(r300, DBG_FP, "r300: Error compiling fragment program: %s\n", compiler.Base.ErrorMsg); assert(0); + abort(); } /* And, finally... */ diff --git a/src/gallium/drivers/r300/r300_render.c b/src/gallium/drivers/r300/r300_render.c index 6c891029a5..c8420bcdd5 100644 --- a/src/gallium/drivers/r300/r300_render.c +++ b/src/gallium/drivers/r300/r300_render.c @@ -186,7 +186,7 @@ static void r300_emit_draw_arrays_immediate(struct r300_context *r300, dwords = 10 + count * vertex_size; r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + dwords); - r300_emit_buffer_validate(r300, FALSE, 0); + r300_emit_buffer_validate(r300, FALSE, NULL); r300_emit_dirty_state(r300); BEGIN_CS(dwords); @@ -278,7 +278,7 @@ static void r300_emit_draw_elements(struct r300_context *r300, DBG(r300, DBG_DRAW, "r300: Indexbuf of %u indices, min %u max %u\n", count, minIndex, maxIndex); - maxIndex = MIN2(maxIndex, ((1 << 24) - 1)); + maxIndex = MIN2(maxIndex, r300->vertex_buffer_max_index); if (alt_num_verts) { BEGIN_CS(16); @@ -450,7 +450,7 @@ void r300_draw_arrays(struct pipe_context* pipe, unsigned mode, /* Make sure there are at least 128 spare dwords in the command buffer. * (most of it being consumed by emit_aos) */ r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 128); - r300_emit_buffer_validate(r300, TRUE, 0); + r300_emit_buffer_validate(r300, TRUE, NULL); r300_emit_dirty_state(r300); if (alt_num_verts || count <= 65535) { @@ -468,7 +468,7 @@ void r300_draw_arrays(struct pipe_context* pipe, unsigned mode, /* Again, we emit both AOS and draw_arrays so there should be * at least 128 spare dwords. */ if (count && r300_reserve_cs_space(r300, 128)) { - r300_emit_buffer_validate(r300, TRUE, 0); + r300_emit_buffer_validate(r300, TRUE, NULL); r300_emit_dirty_state(r300); } } while (count); @@ -688,6 +688,7 @@ static void r300_render_draw_arrays(struct vbuf_render* render, CS_LOCALS(r300); r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 2); + r300_emit_buffer_validate(r300, FALSE, NULL); r300_emit_dirty_state(r300); DBG(r300, DBG_DRAW, "r300: Doing vbuf render, count %d\n", count); @@ -711,6 +712,7 @@ static void r300_render_draw(struct vbuf_render* render, CS_LOCALS(r300); r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + dwords); + r300_emit_buffer_validate(r300, FALSE, NULL); r300_emit_dirty_state(r300); BEGIN_CS(dwords); diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index d397a8eb2b..5880eecd5f 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -1,5 +1,6 @@ /* * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> + * Copyright 2010 Marek Olšák <maraeo@gmail.com> * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -20,14 +21,13 @@ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. */ -#include "util/u_inlines.h" #include "util/u_format.h" #include "util/u_memory.h" #include "util/u_simple_screen.h" #include "r300_context.h" -#include "r300_screen.h" #include "r300_texture.h" +#include "r300_transfer.h" #include "radeon_winsys.h" #include "r300_winsys.h" @@ -231,14 +231,16 @@ static boolean r300_is_format_supported(struct pipe_screen* screen, /* Check colorbuffer format support. */ if ((usage & (PIPE_TEXTURE_USAGE_RENDER_TARGET | PIPE_TEXTURE_USAGE_DISPLAY_TARGET | - PIPE_TEXTURE_USAGE_PRIMARY)) && + PIPE_TEXTURE_USAGE_SCANOUT | + PIPE_TEXTURE_USAGE_SHARED)) && /* 2101010 cannot be rendered to on non-r5xx. */ (is_r500 || !is_color2101010) && r300_is_colorbuffer_format_supported(format)) { retval |= usage & (PIPE_TEXTURE_USAGE_RENDER_TARGET | PIPE_TEXTURE_USAGE_DISPLAY_TARGET | - PIPE_TEXTURE_USAGE_PRIMARY); + PIPE_TEXTURE_USAGE_SCANOUT | + PIPE_TEXTURE_USAGE_SHARED); } /* Check depth-stencil format support. */ @@ -250,70 +252,6 @@ static boolean r300_is_format_supported(struct pipe_screen* screen, return retval == usage; } -static struct pipe_transfer* -r300_get_tex_transfer(struct pipe_screen *screen, - struct pipe_texture *texture, - unsigned face, unsigned level, unsigned zslice, - enum pipe_transfer_usage usage, unsigned x, unsigned y, - unsigned w, unsigned h) -{ - struct r300_texture *tex = (struct r300_texture *)texture; - struct r300_transfer *trans; - struct r300_screen *rscreen = r300_screen(screen); - unsigned offset; - - offset = r300_texture_get_offset(tex, level, zslice, face); /* in bytes */ - - trans = CALLOC_STRUCT(r300_transfer); - if (trans) { - pipe_texture_reference(&trans->transfer.texture, texture); - trans->transfer.x = x; - trans->transfer.y = y; - trans->transfer.width = w; - trans->transfer.height = h; - trans->transfer.stride = r300_texture_get_stride(rscreen, tex, level); - trans->transfer.usage = usage; - trans->transfer.zslice = zslice; - trans->transfer.face = face; - - trans->offset = offset; - } - return &trans->transfer; -} - -static void -r300_tex_transfer_destroy(struct pipe_transfer *trans) -{ - pipe_texture_reference(&trans->texture, NULL); - FREE(trans); -} - -static void* r300_transfer_map(struct pipe_screen* screen, - struct pipe_transfer* transfer) -{ - struct r300_texture* tex = (struct r300_texture*)transfer->texture; - char* map; - enum pipe_format format = tex->tex.format; - - map = pipe_buffer_map(screen, tex->buffer, - pipe_transfer_buffer_flags(transfer)); - - if (!map) { - return NULL; - } - - return map + r300_transfer(transfer)->offset + - transfer->y / util_format_get_blockheight(format) * transfer->stride + - transfer->x / util_format_get_blockwidth(format) * util_format_get_blocksize(format); -} - -static void r300_transfer_unmap(struct pipe_screen* screen, - struct pipe_transfer* transfer) -{ - struct r300_texture* tex = (struct r300_texture*)transfer->texture; - pipe_buffer_unmap(screen, tex->buffer); -} - static void r300_destroy_screen(struct pipe_screen* pscreen) { struct r300_screen* r300screen = r300_screen(pscreen); @@ -350,13 +288,11 @@ struct pipe_screen* r300_create_screen(struct radeon_winsys* radeon_winsys) r300screen->screen.get_paramf = r300_get_paramf; r300screen->screen.is_format_supported = r300_is_format_supported; r300screen->screen.context_create = r300_create_context; - r300screen->screen.get_tex_transfer = r300_get_tex_transfer; - r300screen->screen.tex_transfer_destroy = r300_tex_transfer_destroy; - r300screen->screen.transfer_map = r300_transfer_map; - r300screen->screen.transfer_unmap = r300_transfer_unmap; r300_init_screen_texture_functions(&r300screen->screen); + r300_init_screen_transfer_functions(&r300screen->screen); u_simple_screen_init(&r300screen->screen); return &r300screen->screen; } + diff --git a/src/gallium/drivers/r300/r300_screen.h b/src/gallium/drivers/r300/r300_screen.h index 502fbfa5a2..484bde6a6b 100644 --- a/src/gallium/drivers/r300/r300_screen.h +++ b/src/gallium/drivers/r300/r300_screen.h @@ -1,5 +1,6 @@ /* * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> + * Copyright 2010 Marek Olšák <maraeo@gmail.com> * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -27,6 +28,8 @@ #include "r300_chipset.h" +#define R300_TEXTURE_USAGE_TRANSFER PIPE_TEXTURE_USAGE_CUSTOM + struct radeon_winsys; struct r300_screen { @@ -35,6 +38,10 @@ struct r300_screen { struct radeon_winsys* radeon_winsys; + /* XXX This hack will be removed once texture transfers become part of + * pipe_context. */ + struct pipe_context* ctx; + /* Chipset capabilities */ struct r300_capabilities* caps; @@ -42,25 +49,14 @@ struct r300_screen { unsigned debug; }; -struct r300_transfer { - /* Parent class */ - struct pipe_transfer transfer; - - /* Offset from start of buffer. */ - unsigned offset; -}; /* Convenience cast wrapper. */ static INLINE struct r300_screen* r300_screen(struct pipe_screen* screen) { return (struct r300_screen*)screen; } -/* Convenience cast wrapper. */ -static INLINE struct r300_transfer* -r300_transfer(struct pipe_transfer* transfer) -{ - return (struct r300_transfer*)transfer; -} +/* Creates a new r300 screen. */ +struct pipe_screen* r300_create_screen(struct radeon_winsys* radeon_winsys); /* Debug functionality. */ diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 1f6f99d3e5..8c9f604622 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -571,6 +571,7 @@ static void { struct r300_context* r300 = r300_context(pipe); struct r300_screen* r300screen = r300_screen(pipe->screen); + struct pipe_framebuffer_state *old_state = r300->fb_state.state; unsigned max_width, max_height; uint32_t zbuffer_bpp = 0; @@ -595,23 +596,30 @@ static void return; } - if (r300->draw) { draw_flush(r300->draw); } - memcpy(r300->fb_state.state, state, sizeof(struct pipe_framebuffer_state)); + r300->fb_state.dirty = TRUE; - r300->fb_state.size = (10 * state->nr_cbufs) + (2 * (4 - state->nr_cbufs)) + - (state->zsbuf ? 10 : 0) + 8; + /* If nr_cbufs is changed from zero to non-zero or vice versa... */ + if (!!old_state->nr_cbufs != !!state->nr_cbufs) { + r300->blend_state.dirty = TRUE; + } + /* If zsbuf is set from NULL to non-NULL or vice versa.. */ + if (!!old_state->zsbuf != !!state->zsbuf) { + r300->dsa_state.dirty = TRUE; + } + if (!r300->scissor_enabled) { + r300->scissor_state.dirty = TRUE; + } r300_fb_update_tiling_flags(r300, r300->fb_state.state, state); - /* XXX wait what */ - r300->blend_state.dirty = TRUE; - r300->dsa_state.dirty = TRUE; - r300->fb_state.dirty = TRUE; - r300->scissor_state.dirty = TRUE; + memcpy(r300->fb_state.state, state, sizeof(struct pipe_framebuffer_state)); + + r300->fb_state.size = (10 * state->nr_cbufs) + (2 * (4 - state->nr_cbufs)) + + (state->zsbuf ? 10 : 0) + 8; /* Polygon offset depends on the zbuffer bit depth. */ if (state->zsbuf && r300->polygon_offset_enabled) { @@ -716,8 +724,7 @@ static void* r300_create_rs_state(struct pipe_context* pipe, rs->vap_control_status = R300_VC_32BIT_SWAP; #endif - /* If bypassing TCL, or if no TCL engine is present, turn off the HW TCL. - * Else, enable HW TCL and force Draw's TCL off. */ + /* If no TCL engine is present, turn off the HW TCL. */ if (!r300screen->caps->has_tcl) { rs->vap_control_status |= R300_VAP_TCL_BYPASS; } @@ -807,6 +814,7 @@ static void r300_bind_rs_state(struct pipe_context* pipe, void* state) { struct r300_context* r300 = r300_context(pipe); struct r300_rs_state* rs = (struct r300_rs_state*)state; + boolean scissor_was_enabled = r300->scissor_enabled; if (r300->draw) { draw_flush(r300->draw); @@ -815,20 +823,17 @@ static void r300_bind_rs_state(struct pipe_context* pipe, void* state) if (rs) { r300->polygon_offset_enabled = rs->rs.offset_cw || rs->rs.offset_ccw; + r300->scissor_enabled = rs->rs.scissor; } else { r300->polygon_offset_enabled = FALSE; + r300->scissor_enabled = FALSE; } UPDATE_STATE(state, r300->rs_state); r300->rs_state.size = 17 + (r300->polygon_offset_enabled ? 5 : 0); - /* XXX Why is this still needed, dammit!? */ - r300->scissor_state.dirty = TRUE; - r300->viewport_state.dirty = TRUE; - - /* XXX Clean these up when we move to atom emits */ - if (r300->fs && r300->fs->inputs.wpos != ATTR_UNUSED) { - r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS; + if (scissor_was_enabled != r300->scissor_enabled) { + r300->scissor_state.dirty = TRUE; } } @@ -973,7 +978,9 @@ static void r300_set_scissor_state(struct pipe_context* pipe, memcpy(r300->scissor_state.state, state, sizeof(struct pipe_scissor_state)); - r300->scissor_state.dirty = TRUE; + if (r300->scissor_enabled) { + r300->scissor_state.dirty = TRUE; + } } static void r300_set_viewport_state(struct pipe_context* pipe, @@ -1088,68 +1095,71 @@ static void* r300_create_vs_state(struct pipe_context* pipe, { struct r300_context* r300 = r300_context(pipe); - if (r300_screen(pipe->screen)->caps->has_tcl) { - struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader); - /* Copy state directly into shader. */ - vs->state = *shader; - vs->state.tokens = tgsi_dup_tokens(shader->tokens); - - tgsi_scan_shader(shader->tokens, &vs->info); + struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader); + r300_vertex_shader_common_init(vs, shader); - return (void*)vs; + if (r300_screen(pipe->screen)->caps->has_tcl) { + r300_translate_vertex_shader(r300, vs); } else { - return draw_create_vertex_shader(r300->draw, shader); + vs->draw_vs = draw_create_vertex_shader(r300->draw, shader); } + + return vs; } static void r300_bind_vs_state(struct pipe_context* pipe, void* shader) { struct r300_context* r300 = r300_context(pipe); + struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; - if (r300_screen(pipe->screen)->caps->has_tcl) { - struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; + if (vs == NULL) { + r300->vs_state.state = NULL; + return; + } + if (vs == r300->vs_state.state) { + return; + } + r300->vs_state.state = vs; - if (vs == NULL) { - r300->vs_state.state = NULL; - return; - } else if (!vs->translated) { - r300_translate_vertex_shader(r300, vs); - } + // VS output mapping for HWTCL or stream mapping for SWTCL to the RS block + if (r300->fs) { + r300_vertex_shader_setup_wpos(r300); + } + memcpy(r300->vap_output_state.state, &vs->vap_out, + sizeof(struct r300_vap_output_state)); + r300->vap_output_state.dirty = TRUE; + + /* The majority of the RS block bits is dependent on the vertex shader. */ + r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */ - UPDATE_STATE(shader, r300->vs_state); + if (r300_screen(pipe->screen)->caps->has_tcl) { + r300->vs_state.dirty = TRUE; r300->vs_state.size = vs->code.length + 9; - r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */ - r300->vap_output_state.dirty = TRUE; - r300->vertex_stream_state.dirty = TRUE; /* XXX needed for TCL bypass */ r300->pvs_flush.dirty = TRUE; - if (r300->fs) { - r300_vertex_shader_setup_wpos(r300); - } - r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS; } else { draw_flush(r300->draw); draw_bind_vertex_shader(r300->draw, - (struct draw_vertex_shader*)shader); + (struct draw_vertex_shader*)vs->draw_vs); } } static void r300_delete_vs_state(struct pipe_context* pipe, void* shader) { struct r300_context* r300 = r300_context(pipe); + struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; if (r300_screen(pipe->screen)->caps->has_tcl) { - struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; - rc_constants_destroy(&vs->code.constants); - FREE((void*)vs->state.tokens); - FREE(shader); } else { draw_delete_vertex_shader(r300->draw, - (struct draw_vertex_shader*)shader); + (struct draw_vertex_shader*)vs->draw_vs); } + + FREE((void*)vs->state.tokens); + FREE(shader); } static void r300_set_constant_buffer(struct pipe_context *pipe, @@ -1201,8 +1211,10 @@ static void r300_set_constant_buffer(struct pipe_context *pipe, pipe_buffer_unmap(pipe->screen, buf); if (shader == PIPE_SHADER_VERTEX) { - r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS; - r300->pvs_flush.dirty = TRUE; + if (r300screen->caps->has_tcl) { + r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS; + r300->pvs_flush.dirty = TRUE; + } } else if (shader == PIPE_SHADER_FRAGMENT) r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS; diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index 9c8e907fdf..e9e40747ef 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -433,18 +433,13 @@ static void r300_update_derived_shader_state(struct r300_context* r300) { struct r300_vertex_shader* vs = r300->vs_state.state; struct r300_screen* r300screen = r300_screen(r300->context.screen); - struct r300_vap_output_state *vap_out = - (struct r300_vap_output_state*)r300->vap_output_state.state; - - /* XXX Mmm, delicious hax */ - memset(&r300->vertex_info, 0, sizeof(struct vertex_info)); - memcpy(vap_out, vs->hwfmt, sizeof(uint)*4); r300_update_rs_block(r300, &vs->outputs, &r300->fs->inputs); if (r300screen->caps->has_tcl) { r300_vertex_psc(r300); } else { + memset(&r300->vertex_info, 0, sizeof(struct vertex_info)); r300_draw_emit_all_attribs(r300); draw_compute_vertex_size(&r300->vertex_info); r300_swtcl_vertex_psc(r300); @@ -582,8 +577,7 @@ static void r300_merge_textures_and_samplers(struct r300_context* r300) void r300_update_derived_state(struct r300_context* r300) { if (r300->rs_block_state.dirty || - r300->vertex_stream_state.dirty || /* XXX put updating this state out of this file */ - r300->rs_state.dirty) { /* XXX and remove this one (tcl_bypass dependency) */ + r300->vertex_stream_state.dirty) { /* XXX put updating PSC out of this file */ r300_update_derived_shader_state(r300); } diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index c0144f64b4..21e5910450 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -617,18 +617,23 @@ static unsigned r300_texture_get_tile_size(struct r300_texture* tex, /* Return true if macrotiling should be enabled on the miplevel. */ static boolean r300_texture_macro_switch(struct r300_texture *tex, unsigned level, - boolean rv350_mode) + boolean rv350_mode, + int dim) { - unsigned tile_width, width; + unsigned tile, texdim; - tile_width = r300_texture_get_tile_size(tex, TILE_WIDTH, TRUE); - width = u_minify(tex->tex.width0, level); + tile = r300_texture_get_tile_size(tex, dim, TRUE); + if (dim == TILE_WIDTH) { + texdim = u_minify(tex->tex.width0, level); + } else { + texdim = u_minify(tex->tex.height0, level); + } /* See TX_FILTER1_n.MACRO_SWITCH. */ if (rv350_mode) { - return width >= tile_width; + return texdim >= tile; } else { - return width > tile_width; + return texdim > tile; } } @@ -692,9 +697,10 @@ static void r300_setup_miptree(struct r300_screen* screen, for (i = 0; i <= base->last_level; i++) { /* Let's see if this miplevel can be macrotiled. */ - tex->mip_macrotile[i] = (tex->macrotile == R300_BUFFER_TILED && - r300_texture_macro_switch(tex, i, rv350_mode)) ? - R300_BUFFER_TILED : R300_BUFFER_LINEAR; + tex->mip_macrotile[i] = + (tex->macrotile == R300_BUFFER_TILED && + r300_texture_macro_switch(tex, i, rv350_mode, TILE_WIDTH)) ? + R300_BUFFER_TILED : R300_BUFFER_LINEAR; stride = r300_texture_get_stride(screen, tex, i); nblocksy = r300_texture_get_nblocksy(tex, i); @@ -724,10 +730,46 @@ static void r300_setup_flags(struct r300_texture* tex) !util_is_power_of_two(tex->tex.height0); } +static void r300_setup_tiling(struct pipe_screen *screen, + struct r300_texture *tex) +{ + enum pipe_format format = tex->tex.format; + boolean rv350_mode = r300_screen(screen)->caps->family >= CHIP_FAMILY_RV350; + + if (util_format_is_compressed(format)) { + return; + } + + if (tex->tex.width0 == 1 || + tex->tex.height0 == 1) { + return; + } + + /* Set microtiling. */ + switch (util_format_get_blocksize(format)) { + case 1: + case 4: + tex->microtile = R300_BUFFER_TILED; + break; + + /* XXX Square-tiling doesn't work with kernel older than 2.6.34, + * XXX need to check the DRM version */ + /*case 2: + case 8: + tex->microtile = R300_BUFFER_SQUARETILED; + break;*/ + } + + /* Set macrotiling. */ + if (r300_texture_macro_switch(tex, 0, rv350_mode, TILE_WIDTH) && + r300_texture_macro_switch(tex, 0, rv350_mode, TILE_HEIGHT)) { + tex->macrotile = R300_BUFFER_TILED; + } +} + /* Create a new texture. */ -static struct pipe_texture* - r300_texture_create(struct pipe_screen* screen, - const struct pipe_texture* template) +static struct pipe_texture* r300_texture_create(struct pipe_screen* screen, + const struct pipe_texture* template) { struct r300_texture* tex = CALLOC_STRUCT(r300_texture); struct r300_screen* rscreen = r300_screen(screen); @@ -742,6 +784,9 @@ static struct pipe_texture* tex->tex.screen = screen; r300_setup_flags(tex); + if (!(template->tex_usage & R300_TEXTURE_USAGE_TRANSFER)) { + r300_setup_tiling(screen, tex); + } r300_setup_miptree(rscreen, tex); r300_setup_texture_state(rscreen, tex); @@ -842,6 +887,70 @@ static struct pipe_texture* return (struct pipe_texture*)tex; } +static struct pipe_texture* + r300_texture_from_handle(struct pipe_screen* screen, + const struct pipe_texture* base, + struct winsys_handle *whandle) +{ + struct radeon_winsys* winsys = (struct radeon_winsys*)screen->winsys; + struct r300_screen* rscreen = r300_screen(screen); + struct pipe_buffer *buffer; + struct r300_texture* tex; + unsigned stride; + + /* Support only 2D textures without mipmaps */ + if (base->target != PIPE_TEXTURE_2D || + base->depth0 != 1 || + base->last_level != 0) { + return NULL; + } + + buffer = winsys->buffer_from_handle(winsys, screen, whandle, &stride); + if (!buffer) { + return NULL; + } + + tex = CALLOC_STRUCT(r300_texture); + if (!tex) { + return NULL; + } + + tex->tex = *base; + pipe_reference_init(&tex->tex.reference, 1); + tex->tex.screen = screen; + + tex->stride_override = stride; + tex->pitch[0] = stride / util_format_get_blocksize(base->format); + + r300_setup_flags(tex); + r300_setup_texture_state(rscreen, tex); + + /* one ref already taken */ + tex->buffer = buffer; + + return (struct pipe_texture*)tex; +} + +static boolean + r300_texture_get_handle(struct pipe_screen* screen, + struct pipe_texture *texture, + struct winsys_handle *whandle) +{ + struct radeon_winsys* winsys = (struct radeon_winsys*)screen->winsys; + struct r300_texture* tex = (struct r300_texture*)texture; + unsigned stride; + + if (!tex) { + return FALSE; + } + + stride = r300_texture_get_stride(r300_screen(screen), tex, 0); + + winsys->buffer_get_handle(winsys, tex->buffer, stride, whandle); + + return TRUE; +} + static struct pipe_video_surface * r300_video_surface_create(struct pipe_screen *screen, enum pipe_video_chroma_format chroma_format, @@ -893,6 +1002,8 @@ static void r300_video_surface_destroy(struct pipe_video_surface *vsfc) void r300_init_screen_texture_functions(struct pipe_screen* screen) { screen->texture_create = r300_texture_create; + screen->texture_from_handle = r300_texture_from_handle; + screen->texture_get_handle = r300_texture_get_handle; screen->texture_destroy = r300_texture_destroy; screen->get_tex_surface = r300_get_tex_surface; screen->tex_surface_destroy = r300_tex_surface_destroy; @@ -902,21 +1013,3 @@ void r300_init_screen_texture_functions(struct pipe_screen* screen) screen->video_surface_destroy= r300_video_surface_destroy; } -boolean r300_get_texture_buffer(struct pipe_screen* screen, - struct pipe_texture* texture, - struct pipe_buffer** buffer, - unsigned* stride) -{ - struct r300_texture* tex = (struct r300_texture*)texture; - if (!tex) { - return FALSE; - } - - pipe_buffer_reference(buffer, tex->buffer); - - if (stride) { - *stride = r300_texture_get_stride(r300_screen(screen), tex, 0); - } - - return TRUE; -} diff --git a/src/gallium/drivers/r300/r300_texture.h b/src/gallium/drivers/r300/r300_texture.h index 46a5fb6188..138b62784e 100644 --- a/src/gallium/drivers/r300/r300_texture.h +++ b/src/gallium/drivers/r300/r300_texture.h @@ -60,13 +60,11 @@ r300_video_surface(struct pipe_video_surface *pvs) return (struct r300_video_surface *)pvs; } -#ifndef R300_WINSYS_H - +/* Used internally for texture_is_referenced() + */ boolean r300_get_texture_buffer(struct pipe_screen* screen, struct pipe_texture* texture, struct pipe_buffer** buffer, unsigned* stride); -#endif /* R300_WINSYS_H */ - #endif /* R300_TEXTURE_H */ diff --git a/src/gallium/drivers/r300/r300_transfer.c b/src/gallium/drivers/r300/r300_transfer.c new file mode 100644 index 0000000000..ec89681a3c --- /dev/null +++ b/src/gallium/drivers/r300/r300_transfer.c @@ -0,0 +1,270 @@ +/* + * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> + * Copyright 2010 Marek Olšák <maraeo@gmail.com> + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "r300_context.h" +#include "r300_transfer.h" +#include "r300_texture.h" +#include "r300_screen.h" + +#include "util/u_memory.h" +#include "util/u_format.h" + +struct r300_transfer { + /* Parent class */ + struct pipe_transfer transfer; + + /* Pipe context. */ + struct pipe_context *ctx; + + /* Parameters of get_tex_transfer. */ + unsigned x, y, level, zslice, face; + + /* Offset from start of buffer. */ + unsigned offset; + + /* Detiled texture. */ + struct r300_texture *detiled_texture; + + /* Transfer and format flags. */ + unsigned buffer_usage, render_target_usage; +}; + +/* Convenience cast wrapper. */ +static INLINE struct r300_transfer* +r300_transfer(struct pipe_transfer* transfer) +{ + return (struct r300_transfer*)transfer; +} + +/* Copy from a tiled texture to a detiled one. */ +static void r300_copy_from_tiled_texture(struct pipe_context *ctx, + struct r300_transfer *r300transfer) +{ + struct pipe_screen *screen = ctx->screen; + struct pipe_transfer *transfer = (struct pipe_transfer*)r300transfer; + struct pipe_texture *tex = transfer->texture; + struct pipe_surface *src, *dst; + + src = screen->get_tex_surface(screen, tex, r300transfer->face, + r300transfer->level, r300transfer->zslice, + PIPE_BUFFER_USAGE_GPU_READ | + PIPE_BUFFER_USAGE_PIXEL); + + dst = screen->get_tex_surface(screen, &r300transfer->detiled_texture->tex, + 0, 0, 0, + PIPE_BUFFER_USAGE_GPU_WRITE | + PIPE_BUFFER_USAGE_PIXEL | + r300transfer->buffer_usage); + + ctx->surface_copy(ctx, dst, 0, 0, src, r300transfer->x, r300transfer->y, + transfer->width, transfer->height); + + pipe_surface_reference(&src, NULL); + pipe_surface_reference(&dst, NULL); +} + +/* Copy a detiled texture to a tiled one. */ +static void r300_copy_into_tiled_texture(struct pipe_context *ctx, + struct r300_transfer *r300transfer) +{ + struct pipe_screen *screen = ctx->screen; + struct pipe_transfer *transfer = (struct pipe_transfer*)r300transfer; + struct pipe_texture *tex = transfer->texture; + struct pipe_surface *src, *dst; + + src = screen->get_tex_surface(screen, &r300transfer->detiled_texture->tex, + 0, 0, 0, + PIPE_BUFFER_USAGE_GPU_READ | + PIPE_BUFFER_USAGE_PIXEL); + + dst = screen->get_tex_surface(screen, tex, r300transfer->face, + r300transfer->level, r300transfer->zslice, + PIPE_BUFFER_USAGE_GPU_WRITE | + PIPE_BUFFER_USAGE_PIXEL); + + /* XXX this flush prevents the following DRM error from occuring: + * [drm:radeon_cs_ioctl] *ERROR* Failed to parse relocation ! + * Reproducible with perf/copytex. */ + ctx->flush(ctx, 0, NULL); + + ctx->surface_copy(ctx, dst, r300transfer->x, r300transfer->y, src, 0, 0, + transfer->width, transfer->height); + + /* XXX this flush fixes a few piglit tests (e.g. glean/pixelFormats). */ + ctx->flush(ctx, 0, NULL); + + pipe_surface_reference(&src, NULL); + pipe_surface_reference(&dst, NULL); +} + +static struct pipe_transfer* +r300_get_tex_transfer(struct pipe_screen *screen, + struct pipe_texture *texture, + unsigned face, unsigned level, unsigned zslice, + enum pipe_transfer_usage usage, unsigned x, unsigned y, + unsigned w, unsigned h) +{ + struct r300_texture *tex = (struct r300_texture *)texture; + struct r300_transfer *trans; + struct r300_screen *r300screen = r300_screen(screen); + struct pipe_texture template; + + trans = CALLOC_STRUCT(r300_transfer); + if (trans) { + /* Initialize the transfer object. */ + pipe_texture_reference(&trans->transfer.texture, texture); + trans->transfer.usage = usage; + trans->transfer.width = w; + trans->transfer.height = h; + trans->ctx = r300screen->ctx; + trans->x = x; + trans->y = y; + trans->level = level; + trans->zslice = zslice; + trans->face = face; + + /* If the texture is tiled, we must create a temporary detiled texture + * for this transfer. */ + if (tex->microtile || tex->macrotile) { + trans->buffer_usage = pipe_transfer_buffer_flags(&trans->transfer); + trans->render_target_usage = + util_format_is_depth_or_stencil(texture->format) ? + PIPE_TEXTURE_USAGE_DEPTH_STENCIL : + PIPE_TEXTURE_USAGE_RENDER_TARGET; + + template.target = PIPE_TEXTURE_2D; + template.format = texture->format; + template.width0 = w; + template.height0 = h; + template.depth0 = 0; + template.last_level = 0; + template.nr_samples = 0; + template.tex_usage = PIPE_TEXTURE_USAGE_DYNAMIC | + R300_TEXTURE_USAGE_TRANSFER; + + /* For texture reading, the temporary (detiled) texture is used as + * a render target when blitting from a tiled texture. */ + if (usage & PIPE_TRANSFER_READ) { + template.tex_usage |= trans->render_target_usage; + } + /* For texture writing, the temporary texture is used as a sampler + * when blitting into a tiled texture. */ + if (usage & PIPE_TRANSFER_WRITE) { + template.tex_usage |= PIPE_TEXTURE_USAGE_SAMPLER; + } + + /* Create the temporary texture. */ + trans->detiled_texture = + (struct r300_texture*)screen->texture_create(screen, &template); + assert(!trans->detiled_texture->microtile && + !trans->detiled_texture->macrotile); + + /* Set the stride. + * Parameters x, y, level, zslice, and face remain zero. */ + trans->transfer.stride = + r300_texture_get_stride(r300screen, trans->detiled_texture, 0); + + if (usage & PIPE_TRANSFER_READ) { + /* We cannot map a tiled texture directly because the data is + * in a different order, therefore we do detiling using a blit. */ + r300_copy_from_tiled_texture(r300screen->ctx, trans); + } + } else { + trans->transfer.x = x; + trans->transfer.y = y; + trans->transfer.stride = + r300_texture_get_stride(r300screen, tex, level); + trans->transfer.level = level; + trans->transfer.zslice = zslice; + trans->transfer.face = face; + trans->offset = r300_texture_get_offset(tex, level, zslice, face); + } + } + return &trans->transfer; +} + +static void r300_tex_transfer_destroy(struct pipe_transfer *trans) +{ + struct r300_transfer *r300transfer = r300_transfer(trans); + + if (r300transfer->detiled_texture) { + if (trans->usage & PIPE_TRANSFER_WRITE) { + r300_copy_into_tiled_texture(r300transfer->ctx, r300transfer); + } + + pipe_texture_reference( + (struct pipe_texture**)&r300transfer->detiled_texture, NULL); + } + pipe_texture_reference(&trans->texture, NULL); + FREE(trans); +} + +static void* r300_transfer_map(struct pipe_screen *screen, + struct pipe_transfer *transfer) +{ + struct r300_transfer *r300transfer = r300_transfer(transfer); + struct r300_texture *tex = (struct r300_texture*)transfer->texture; + char *map; + enum pipe_format format = tex->tex.format; + + if (r300transfer->detiled_texture) { + /* The detiled texture is of the same size as the region being mapped + * (no offset needed). */ + return pipe_buffer_map(screen, + r300transfer->detiled_texture->buffer, + pipe_transfer_buffer_flags(transfer)); + } else { + /* Tiling is disabled. */ + map = pipe_buffer_map(screen, tex->buffer, + pipe_transfer_buffer_flags(transfer)); + + if (!map) { + return NULL; + } + + return map + r300_transfer(transfer)->offset + + transfer->y / util_format_get_blockheight(format) * transfer->stride + + transfer->x / util_format_get_blockwidth(format) * util_format_get_blocksize(format); + } +} + +static void r300_transfer_unmap(struct pipe_screen *screen, + struct pipe_transfer *transfer) +{ + struct r300_transfer *r300transfer = r300_transfer(transfer); + struct r300_texture *tex = (struct r300_texture*)transfer->texture; + + if (r300transfer->detiled_texture) { + pipe_buffer_unmap(screen, r300transfer->detiled_texture->buffer); + } else { + pipe_buffer_unmap(screen, tex->buffer); + } +} + +void r300_init_screen_transfer_functions(struct pipe_screen *screen) +{ + screen->get_tex_transfer = r300_get_tex_transfer; + screen->tex_transfer_destroy = r300_tex_transfer_destroy; + screen->transfer_map = r300_transfer_map; + screen->transfer_unmap = r300_transfer_unmap; +} diff --git a/src/gallium/drivers/r300/r300_transfer.h b/src/gallium/drivers/r300/r300_transfer.h new file mode 100644 index 0000000000..60d1d3dc85 --- /dev/null +++ b/src/gallium/drivers/r300/r300_transfer.h @@ -0,0 +1,31 @@ +/* + * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> + * Copyright 2010 Marek Olšák <maraeo@gmail.com> + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_TRANSFER +#define R300_TRANSFER + +#include "pipe/p_screen.h" + +void r300_init_screen_transfer_functions(struct pipe_screen *screen); + +#endif diff --git a/src/gallium/drivers/r300/r300_vs.c b/src/gallium/drivers/r300/r300_vs.c index 60a04bbfed..379939ac75 100644 --- a/src/gallium/drivers/r300/r300_vs.c +++ b/src/gallium/drivers/r300/r300_vs.c @@ -89,95 +89,41 @@ static void r300_shader_read_vs_outputs( assert(0); } } + + /* WPOS is a straight copy of POSITION and it's always emitted. */ + vs_outputs->wpos = i; } -static void r300_shader_vap_output_fmt(struct r300_vertex_shader* vs) +/* This function sets up: + * - VAP mapping, which maps VS registers to output semantics and + * at the same time it indicates which attributes are enabled and should + * be rasterized. + * - Stream mapping to VS outputs if TCL is not present. */ +static void r300_init_vs_output_mapping(struct r300_vertex_shader* vs) { struct r300_shader_semantics* vs_outputs = &vs->outputs; - uint32_t* hwfmt = vs->hwfmt; - int i, gen_count; + struct r300_vap_output_state *vap_out = &vs->vap_out; + int *stream_loc = vs->stream_loc_notcl; + int i, gen_count, tabi = 0; boolean any_bcolor_used = vs_outputs->bcolor[0] != ATTR_UNUSED || vs_outputs->bcolor[1] != ATTR_UNUSED; - /* Do the actual vertex_info setup. - * - * vertex_info has four uints of hardware-specific data in it. - * vinfo.hwfmt[0] is R300_VAP_VTX_STATE_CNTL - * vinfo.hwfmt[1] is R300_VAP_VSM_VTX_ASSM - * vinfo.hwfmt[2] is R300_VAP_OUTPUT_VTX_FMT_0 - * vinfo.hwfmt[3] is R300_VAP_OUTPUT_VTX_FMT_1 */ - - hwfmt[0] = 0x5555; /* XXX this is classic Mesa bonghits */ + vap_out->vap_vtx_state_cntl = 0x5555; /* XXX this is classic Mesa bonghits */ /* Position. */ if (vs_outputs->pos != ATTR_UNUSED) { - hwfmt[1] |= R300_INPUT_CNTL_POS; - hwfmt[2] |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT; + vap_out->vap_vsm_vtx_assm |= R300_INPUT_CNTL_POS; + vap_out->vap_out_vtx_fmt[0] |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT; + + stream_loc[tabi++] = 0; } else { assert(0); } /* Point size. */ if (vs_outputs->psize != ATTR_UNUSED) { - hwfmt[2] |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT; - } - - /* Colors. */ - for (i = 0; i < ATTR_COLOR_COUNT; i++) { - if (vs_outputs->color[i] != ATTR_UNUSED || any_bcolor_used || - vs_outputs->color[1] != ATTR_UNUSED) { - hwfmt[1] |= R300_INPUT_CNTL_COLOR; - hwfmt[2] |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << i; - } - } - - /* Back-face colors. */ - if (any_bcolor_used) { - for (i = 0; i < ATTR_COLOR_COUNT; i++) { - hwfmt[1] |= R300_INPUT_CNTL_COLOR; - hwfmt[2] |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << (2+i); - } - } + vap_out->vap_out_vtx_fmt[0] |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT; - /* Texture coordinates. */ - gen_count = 0; - for (i = 0; i < ATTR_GENERIC_COUNT; i++) { - if (vs_outputs->generic[i] != ATTR_UNUSED) { - hwfmt[1] |= (R300_INPUT_CNTL_TC0 << gen_count); - hwfmt[3] |= (4 << (3 * gen_count)); - gen_count++; - } - } - - /* Fog coordinates. */ - if (vs_outputs->fog != ATTR_UNUSED) { - hwfmt[1] |= (R300_INPUT_CNTL_TC0 << gen_count); - hwfmt[3] |= (4 << (3 * gen_count)); - gen_count++; - } - - /* XXX magic */ - assert(gen_count <= 8); - - /* WPOS. */ - vs->wpos_tex_output = gen_count; -} - -/* Sets up stream mapping to equivalent VS outputs if TCL is bypassed - * or isn't present. */ -static void r300_stream_locations_notcl( - struct r300_shader_semantics* vs_outputs, - int* stream_loc) -{ - int i, tabi = 0, gen_count; - boolean any_bcolor_used = vs_outputs->bcolor[0] != ATTR_UNUSED || - vs_outputs->bcolor[1] != ATTR_UNUSED; - - /* Position. */ - stream_loc[tabi++] = 0; - - /* Point size. */ - if (vs_outputs->psize != ATTR_UNUSED) { stream_loc[tabi++] = 1; } @@ -185,6 +131,9 @@ static void r300_stream_locations_notcl( for (i = 0; i < ATTR_COLOR_COUNT; i++) { if (vs_outputs->color[i] != ATTR_UNUSED || any_bcolor_used || vs_outputs->color[1] != ATTR_UNUSED) { + vap_out->vap_vsm_vtx_assm |= R300_INPUT_CNTL_COLOR; + vap_out->vap_out_vtx_fmt[0] |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << i; + stream_loc[tabi++] = 2 + i; } } @@ -192,6 +141,9 @@ static void r300_stream_locations_notcl( /* Back-face colors. */ if (any_bcolor_used) { for (i = 0; i < ATTR_COLOR_COUNT; i++) { + vap_out->vap_vsm_vtx_assm |= R300_INPUT_CNTL_COLOR; + vap_out->vap_out_vtx_fmt[0] |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << (2+i); + stream_loc[tabi++] = 4 + i; } } @@ -200,6 +152,9 @@ static void r300_stream_locations_notcl( gen_count = 0; for (i = 0; i < ATTR_GENERIC_COUNT; i++) { if (vs_outputs->generic[i] != ATTR_UNUSED) { + vap_out->vap_vsm_vtx_assm |= (R300_INPUT_CNTL_TC0 << gen_count); + vap_out->vap_out_vtx_fmt[1] |= (4 << (3 * gen_count)); + assert(tabi < 16); stream_loc[tabi++] = 6 + gen_count; gen_count++; @@ -208,17 +163,22 @@ static void r300_stream_locations_notcl( /* Fog coordinates. */ if (vs_outputs->fog != ATTR_UNUSED) { + vap_out->vap_vsm_vtx_assm |= (R300_INPUT_CNTL_TC0 << gen_count); + vap_out->vap_out_vtx_fmt[1] |= (4 << (3 * gen_count)); + assert(tabi < 16); stream_loc[tabi++] = 6 + gen_count; gen_count++; } + /* XXX magic */ + assert(gen_count <= 8); + /* WPOS. */ - if (vs_outputs->wpos != ATTR_UNUSED) { - assert(tabi < 16); - stream_loc[tabi++] = 6 + gen_count; - gen_count++; - } + vs->wpos_tex_output = gen_count; + + assert(tabi < 16); + stream_loc[tabi++] = 6 + gen_count; for (; tabi < 16;) { stream_loc[tabi++] = -1; @@ -294,26 +254,16 @@ static void set_vertex_inputs_outputs(struct r300_vertex_program_compiler * c) } } -static void r300_insert_wpos(struct r300_vertex_program_compiler* c, - struct r300_shader_semantics* outputs) +void r300_vertex_shader_common_init(struct r300_vertex_shader *vs, + const struct pipe_shader_state *shader) { - int i, lastOutput = 0; - - /* Find the max output index. */ - lastOutput = MAX2(lastOutput, outputs->psize); - for (i = 0; i < ATTR_COLOR_COUNT; i++) { - lastOutput = MAX2(lastOutput, outputs->color[i]); - lastOutput = MAX2(lastOutput, outputs->bcolor[i]); - } - for (i = 0; i < ATTR_GENERIC_COUNT; i++) { - lastOutput = MAX2(lastOutput, outputs->generic[i]); - } - lastOutput = MAX2(lastOutput, outputs->fog); + /* Copy state directly into shader. */ + vs->state = *shader; + vs->state.tokens = tgsi_dup_tokens(shader->tokens); + tgsi_scan_shader(shader->tokens, &vs->info); - /* Set WPOS after the last output. */ - lastOutput++; - rc_copy_output(&c->Base, 0, lastOutput); /* out[lastOutput] = out[0]; */ - outputs->wpos = lastOutput; + r300_shader_read_vs_outputs(&vs->info, &vs->outputs); + r300_init_vs_output_mapping(vs); } void r300_translate_vertex_shader(struct r300_context* r300, @@ -322,9 +272,6 @@ void r300_translate_vertex_shader(struct r300_context* r300, struct r300_vertex_program_compiler compiler; struct tgsi_to_rc ttr; - /* Initialize. */ - r300_shader_read_vs_outputs(&vs->info, &vs->outputs); - /* Setup the compiler */ rc_init(&compiler.Base); @@ -348,10 +295,7 @@ void r300_translate_vertex_shader(struct r300_context* r300, compiler.SetHwInputOutput = &set_vertex_inputs_outputs; /* Insert the WPOS output. */ - r300_insert_wpos(&compiler, &vs->outputs); - - r300_shader_vap_output_fmt(vs); - r300_stream_locations_notcl(&vs->outputs, vs->stream_loc_notcl); + rc_copy_output(&compiler.Base, 0, vs->outputs.wpos); /* Invoke the compiler */ r3xx_compile_vertex_program(&compiler); @@ -363,30 +307,29 @@ void r300_translate_vertex_shader(struct r300_context* r300, /* And, finally... */ rc_destroy(&compiler.Base); - vs->translated = TRUE; } boolean r300_vertex_shader_setup_wpos(struct r300_context* r300) { struct r300_vertex_shader* vs = r300->vs_state.state; + struct r300_vap_output_state *vap_out = &vs->vap_out; int tex_output = vs->wpos_tex_output; uint32_t tex_fmt = R300_INPUT_CNTL_TC0 << tex_output; - uint32_t* hwfmt = vs->hwfmt; if (r300->fs->inputs.wpos != ATTR_UNUSED) { /* Enable WPOS in VAP. */ - if (!(hwfmt[1] & tex_fmt)) { - hwfmt[1] |= tex_fmt; - hwfmt[3] |= (4 << (3 * tex_output)); + if (!(vap_out->vap_vsm_vtx_assm & tex_fmt)) { + vap_out->vap_vsm_vtx_assm |= tex_fmt; + vap_out->vap_out_vtx_fmt[1] |= (4 << (3 * tex_output)); assert(tex_output < 8); return TRUE; } } else { /* Disable WPOS in VAP. */ - if (hwfmt[1] & tex_fmt) { - hwfmt[1] &= ~tex_fmt; - hwfmt[3] &= ~(4 << (3 * tex_output)); + if (vap_out->vap_vsm_vtx_assm & tex_fmt) { + vap_out->vap_vsm_vtx_assm &= ~tex_fmt; + vap_out->vap_out_vtx_fmt[1] &= ~(4 << (3 * tex_output)); return TRUE; } } diff --git a/src/gallium/drivers/r300/r300_vs.h b/src/gallium/drivers/r300/r300_vs.h index 18cfeee3cd..f6f0b86b68 100644 --- a/src/gallium/drivers/r300/r300_vs.h +++ b/src/gallium/drivers/r300/r300_vs.h @@ -28,6 +28,7 @@ #include "tgsi/tgsi_scan.h" #include "radeon_code.h" +#include "r300_context.h" #include "r300_shader_semantics.h" struct r300_context; @@ -38,7 +39,7 @@ struct r300_vertex_shader { struct tgsi_shader_info info; struct r300_shader_semantics outputs; - uint hwfmt[4]; + struct r300_vap_output_state vap_out; /* Stream locations for SWTCL or if TCL is bypassed. */ int stream_loc_notcl[16]; @@ -46,13 +47,17 @@ struct r300_vertex_shader { /* Output stream location for WPOS. */ int wpos_tex_output; - /* Has this shader been translated yet? */ - boolean translated; - + /* HWTCL-specific. */ /* Machine code (if translated) */ struct r300_vertex_program_code code; + + /* SWTCL-specific. */ + void *draw_vs; }; +void r300_vertex_shader_common_init(struct r300_vertex_shader *vs, + const struct pipe_shader_state *shader); + void r300_translate_vertex_shader(struct r300_context* r300, struct r300_vertex_shader* vs); diff --git a/src/gallium/drivers/r300/r300_winsys.h b/src/gallium/drivers/r300/r300_winsys.h index 40fb8a95ca..ddf2b79003 100644 --- a/src/gallium/drivers/r300/r300_winsys.h +++ b/src/gallium/drivers/r300/r300_winsys.h @@ -40,11 +40,6 @@ struct radeon_winsys; struct pipe_screen* r300_create_screen(struct radeon_winsys* radeon_winsys); -boolean r300_get_texture_buffer(struct pipe_screen* screen, - struct pipe_texture* texture, - struct pipe_buffer** buffer, - unsigned* stride); - #ifdef __cplusplus } #endif diff --git a/src/gallium/drivers/softpipe/sp_texture.c b/src/gallium/drivers/softpipe/sp_texture.c index 32d261b5ff..6ea060023d 100644 --- a/src/gallium/drivers/softpipe/sp_texture.c +++ b/src/gallium/drivers/softpipe/sp_texture.c @@ -123,7 +123,8 @@ softpipe_texture_create(struct pipe_screen *screen, util_is_power_of_two(template->depth0)); if (spt->base.tex_usage & (PIPE_TEXTURE_USAGE_DISPLAY_TARGET | - PIPE_TEXTURE_USAGE_PRIMARY)) { + PIPE_TEXTURE_USAGE_SCANOUT | + PIPE_TEXTURE_USAGE_SHARED)) { if (!softpipe_displaytarget_layout(screen, spt)) goto fail; } @@ -474,24 +475,4 @@ softpipe_init_screen_texture_funcs(struct pipe_screen *screen) } -/** - * Return pipe_buffer handle and stride for given texture object. - * XXX used for??? - */ -boolean -softpipe_get_texture_buffer( struct pipe_texture *texture, - struct pipe_buffer **buf, - unsigned *stride ) -{ - struct softpipe_texture *tex = (struct softpipe_texture *) texture; - - if (!tex) - return FALSE; - pipe_buffer_reference(buf, tex->buffer); - - if (stride) - *stride = tex->stride[0]; - - return TRUE; -} diff --git a/src/gallium/drivers/softpipe/sp_winsys.h b/src/gallium/drivers/softpipe/sp_winsys.h index 6e3920c49b..edc49f256d 100644 --- a/src/gallium/drivers/softpipe/sp_winsys.h +++ b/src/gallium/drivers/softpipe/sp_winsys.h @@ -60,12 +60,6 @@ struct pipe_screen *softpipe_create_screen( struct pipe_winsys * ); */ struct pipe_screen *softpipe_create_screen_malloc(void); -boolean -softpipe_get_texture_buffer( struct pipe_texture *texture, - struct pipe_buffer **buf, - unsigned *stride ); - - #ifdef __cplusplus } #endif diff --git a/src/gallium/drivers/svga/svga_screen_texture.c b/src/gallium/drivers/svga/svga_screen_texture.c index e9792e063e..4b045c44d8 100644 --- a/src/gallium/drivers/svga/svga_screen_texture.c +++ b/src/gallium/drivers/svga/svga_screen_texture.c @@ -315,7 +315,11 @@ svga_texture_create(struct pipe_screen *screen, tex->key.cachable = 0; } - if(templat->tex_usage & PIPE_TEXTURE_USAGE_PRIMARY) { + if(templat->tex_usage & PIPE_TEXTURE_USAGE_SHARED) { + tex->key.cachable = 0; + } + + if(templat->tex_usage & PIPE_TEXTURE_USAGE_SCANOUT) { tex->key.flags |= SVGA3D_SURFACE_HINT_SCANOUT; tex->key.cachable = 0; } @@ -422,13 +426,15 @@ svga_texture_blanket(struct pipe_screen * screen, } -struct pipe_texture * -svga_screen_texture_wrap_surface(struct pipe_screen *screen, - struct pipe_texture *base, - enum SVGA3dSurfaceFormat format, - struct svga_winsys_surface *srf) +static struct pipe_texture * +svga_screen_texture_from_handle(struct pipe_screen *screen, + const struct pipe_texture *base, + struct winsys_handle *whandle) { + struct svga_winsys_screen *sws = svga_winsys_screen(screen); + struct svga_winsys_surface *srf; struct svga_texture *tex; + enum SVGA3dSurfaceFormat format = 0; assert(screen); /* Only supports one type */ @@ -438,6 +444,8 @@ svga_screen_texture_wrap_surface(struct pipe_screen *screen, return NULL; } + srf = sws->surface_from_handle(sws, whandle, &format); + if (!srf) return NULL; @@ -478,6 +486,22 @@ svga_screen_texture_wrap_surface(struct pipe_screen *screen, } +static boolean +svga_screen_texture_get_handle(struct pipe_screen *screen, + struct pipe_texture *texture, + struct winsys_handle *whandle) +{ + struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen); + unsigned stride; + + assert(svga_texture(texture)->key.cachable == 0); + svga_texture(texture)->key.cachable = 0; + stride = util_format_get_nblocksx(texture->format, texture->width0) * + util_format_get_blocksize(texture->format); + return sws->surface_get_handle(sws, svga_texture(texture)->handle, stride, whandle); +} + + static void svga_texture_destroy(struct pipe_texture *pt) { @@ -955,6 +979,8 @@ void svga_screen_init_texture_functions(struct pipe_screen *screen) { screen->texture_create = svga_texture_create; + screen->texture_from_handle = svga_screen_texture_from_handle; + screen->texture_get_handle = svga_screen_texture_get_handle; screen->texture_destroy = svga_texture_destroy; screen->get_tex_surface = svga_get_tex_surface; screen->tex_surface_destroy = svga_tex_surface_destroy; @@ -1120,33 +1146,3 @@ svga_destroy_sampler_view_priv(struct svga_sampler_view *v) pipe_texture_reference(&v->texture, NULL); FREE(v); } - -boolean -svga_screen_buffer_from_texture(struct pipe_texture *texture, - struct pipe_buffer **buffer, - unsigned *stride) -{ - struct svga_texture *stex = svga_texture(texture); - - *buffer = svga_screen_buffer_wrap_surface - (texture->screen, - svga_translate_format(texture->format), - stex->handle); - - *stride = util_format_get_stride(texture->format, texture->width0); - - return *buffer != NULL; -} - - -struct svga_winsys_surface * -svga_screen_texture_get_winsys_surface(struct pipe_texture *texture) -{ - struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen); - struct svga_winsys_surface *vsurf = NULL; - - assert(svga_texture(texture)->key.cachable == 0); - svga_texture(texture)->key.cachable = 0; - sws->surface_reference(sws, &vsurf, svga_texture(texture)->handle); - return vsurf; -} diff --git a/src/gallium/drivers/svga/svga_winsys.h b/src/gallium/drivers/svga/svga_winsys.h index b4e3af0eaf..d4bb176f9a 100644 --- a/src/gallium/drivers/svga/svga_winsys.h +++ b/src/gallium/drivers/svga/svga_winsys.h @@ -51,6 +51,7 @@ struct pipe_context; struct pipe_fence_handle; struct pipe_texture; struct svga_region; +struct winsys_handle; #define SVGA_BUFFER_USAGE_PINNED (PIPE_BUFFER_USAGE_CUSTOM << 0) @@ -187,6 +188,25 @@ struct svga_winsys_screen uint32 numMipLevels); /** + * Creates a surface from a winsys handle. + * Used to implement pipe_screen::texture_from_handle. + */ + struct svga_winsys_surface * + (*surface_from_handle)(struct svga_winsys_screen *sws, + struct winsys_handle *whandle, + SVGA3dSurfaceFormat *format); + + /** + * Get a winsys_handle from a surface. + * Used to implement pipe_screen::texture_get_handle. + */ + boolean + (*surface_get_handle)(struct svga_winsys_screen *sws, + struct svga_winsys_surface *surface, + unsigned stride, + struct winsys_handle *whandle); + + /** * Whether this surface is sitting in a validate list */ boolean @@ -284,19 +304,6 @@ svga_screen_buffer_wrap_surface(struct pipe_screen *screen, struct svga_winsys_surface *srf); struct svga_winsys_surface * -svga_screen_texture_get_winsys_surface(struct pipe_texture *texture); -struct svga_winsys_surface * svga_screen_buffer_get_winsys_surface(struct pipe_buffer *buffer); -boolean -svga_screen_buffer_from_texture(struct pipe_texture *texture, - struct pipe_buffer **buffer, - unsigned *stride); - -struct pipe_texture * -svga_screen_texture_wrap_surface(struct pipe_screen *screen, - struct pipe_texture *base, - enum SVGA3dSurfaceFormat format, - struct svga_winsys_surface *srf); - #endif /* SVGA_WINSYS_H_ */ diff --git a/src/gallium/drivers/trace/tr_drm.c b/src/gallium/drivers/trace/tr_drm.c index 2b4915003e..c16989fa52 100644 --- a/src/gallium/drivers/trace/tr_drm.c +++ b/src/gallium/drivers/trace/tr_drm.c @@ -62,69 +62,8 @@ trace_drm_create_screen(struct drm_api *_api, int fd, screen = api->create_screen(api, fd, arg); - return trace_screen_create(screen); -} - - -static struct pipe_texture * -trace_drm_texture_from_shared_handle(struct drm_api *_api, - struct pipe_screen *_screen, - struct pipe_texture *templ, - const char *name, - unsigned stride, - unsigned handle) -{ - struct trace_screen *tr_screen = trace_screen(_screen); - struct trace_drm_api *tr_api = trace_drm_api(_api); - struct pipe_screen *screen = tr_screen->screen; - struct drm_api *api = tr_api->api; - struct pipe_texture *result; - - /* TODO trace call */ - - result = api->texture_from_shared_handle(api, screen, templ, name, stride, handle); - - result = trace_texture_create(trace_screen(_screen), result); - - return result; -} - -static boolean -trace_drm_shared_handle_from_texture(struct drm_api *_api, - struct pipe_screen *_screen, - struct pipe_texture *_texture, - unsigned *stride, - unsigned *handle) -{ - struct trace_screen *tr_screen = trace_screen(_screen); - struct trace_texture *tr_texture = trace_texture(_texture); - struct trace_drm_api *tr_api = trace_drm_api(_api); - struct pipe_screen *screen = tr_screen->screen; - struct pipe_texture *texture = tr_texture->texture; - struct drm_api *api = tr_api->api; - - /* TODO trace call */ - - return api->shared_handle_from_texture(api, screen, texture, stride, handle); -} -static boolean -trace_drm_local_handle_from_texture(struct drm_api *_api, - struct pipe_screen *_screen, - struct pipe_texture *_texture, - unsigned *stride, - unsigned *handle) -{ - struct trace_screen *tr_screen = trace_screen(_screen); - struct trace_texture *tr_texture = trace_texture(_texture); - struct trace_drm_api *tr_api = trace_drm_api(_api); - struct pipe_screen *screen = tr_screen->screen; - struct pipe_texture *texture = tr_texture->texture; - struct drm_api *api = tr_api->api; - - /* TODO trace call */ - - return api->local_handle_from_texture(api, screen, texture, stride, handle); + return trace_screen_create(screen); } static void @@ -158,9 +97,6 @@ trace_drm_create(struct drm_api *api) tr_api->base.name = api->name; tr_api->base.driver_name = api->driver_name; tr_api->base.create_screen = trace_drm_create_screen; - tr_api->base.texture_from_shared_handle = trace_drm_texture_from_shared_handle; - tr_api->base.shared_handle_from_texture = trace_drm_shared_handle_from_texture; - tr_api->base.local_handle_from_texture = trace_drm_local_handle_from_texture; tr_api->base.destroy = trace_drm_destroy; tr_api->api = api; diff --git a/src/gallium/drivers/trace/tr_screen.c b/src/gallium/drivers/trace/tr_screen.c index 388d83eb5c..ac0876c3a8 100644 --- a/src/gallium/drivers/trace/tr_screen.c +++ b/src/gallium/drivers/trace/tr_screen.c @@ -236,6 +236,38 @@ trace_screen_texture_create(struct pipe_screen *_screen, return result; } +static struct pipe_texture * +trace_screen_texture_from_handle(struct pipe_screen *_screen, + const struct pipe_texture *templ, + struct winsys_handle *handle) +{ + struct trace_screen *tr_screen = trace_screen(_screen); + struct pipe_screen *screen = tr_screen->screen; + struct pipe_texture *result; + + /* TODO trace call */ + + result = screen->texture_from_handle(screen, templ, handle); + + result = trace_texture_create(trace_screen(_screen), result); + + return result; +} + +static boolean +trace_screen_texture_get_handle(struct pipe_screen *_screen, + struct pipe_texture *_texture, + struct winsys_handle *handle) +{ + struct trace_screen *tr_screen = trace_screen(_screen); + struct trace_texture *tr_texture = trace_texture(_texture); + struct pipe_screen *screen = tr_screen->screen; + struct pipe_texture *texture = tr_texture->texture; + + /* TODO trace call */ + + return screen->texture_get_handle(screen, texture, handle); +} static struct pipe_texture * trace_screen_texture_blanket(struct pipe_screen *_screen, @@ -931,6 +963,8 @@ trace_screen_create(struct pipe_screen *screen) assert(screen->context_create); tr_scr->base.context_create = trace_screen_context_create; tr_scr->base.texture_create = trace_screen_texture_create; + tr_scr->base.texture_from_handle = trace_screen_texture_from_handle; + tr_scr->base.texture_get_handle = trace_screen_texture_get_handle; tr_scr->base.texture_blanket = trace_screen_texture_blanket; tr_scr->base.texture_destroy = trace_screen_texture_destroy; tr_scr->base.get_tex_surface = trace_screen_get_tex_surface; diff --git a/src/gallium/include/pipe/p_defines.h b/src/gallium/include/pipe/p_defines.h index 5cebd43ace..5c97dc87e8 100644 --- a/src/gallium/include/pipe/p_defines.h +++ b/src/gallium/include/pipe/p_defines.h @@ -176,11 +176,12 @@ enum pipe_texture_target { #define PIPE_TEX_COMPARE_R_TO_TEXTURE 1 #define PIPE_TEXTURE_USAGE_RENDER_TARGET 0x1 -#define PIPE_TEXTURE_USAGE_DISPLAY_TARGET 0x2 /* ie a backbuffer */ -#define PIPE_TEXTURE_USAGE_PRIMARY 0x4 /* ie a frontbuffer */ +#define PIPE_TEXTURE_USAGE_DISPLAY_TARGET 0x2 /* windows presentable buffer, ie a backbuffer */ +#define PIPE_TEXTURE_USAGE_SCANOUT 0x4 /* ie a frontbuffer */ #define PIPE_TEXTURE_USAGE_DEPTH_STENCIL 0x8 #define PIPE_TEXTURE_USAGE_SAMPLER 0x10 #define PIPE_TEXTURE_USAGE_DYNAMIC 0x20 +#define PIPE_TEXTURE_USAGE_SHARED 0x40 /** Pipe driver custom usage flags should be greater or equal to this value */ #define PIPE_TEXTURE_USAGE_CUSTOM (1 << 16) diff --git a/src/gallium/include/pipe/p_screen.h b/src/gallium/include/pipe/p_screen.h index e4a9222809..617c47e4dc 100644 --- a/src/gallium/include/pipe/p_screen.h +++ b/src/gallium/include/pipe/p_screen.h @@ -50,6 +50,8 @@ extern "C" { /** Opaque type */ +struct winsys_handle; +/** Opaque type */ struct pipe_fence_handle; struct pipe_winsys; struct pipe_buffer; @@ -108,6 +110,24 @@ struct pipe_screen { const struct pipe_texture *templat); /** + * Create a texture from a winsys_handle. The handle is often created in + * another process by first creating a pipe texture and then calling + * texture_get_handle. + */ + struct pipe_texture * (*texture_from_handle)(struct pipe_screen *, + const struct pipe_texture *templat, + struct winsys_handle *handle); + + /** + * Get a winsys_handle from a texture. Some platforms/winsys requires + * that the texture is created with a special usage flag like + * DISPLAYTARGET or PRIMARY. + */ + boolean (*texture_get_handle)(struct pipe_screen *, + struct pipe_texture *tex, + struct winsys_handle *handle); + + /** * Create a new texture object, using the given template info, but on top of * existing memory. * diff --git a/src/gallium/include/state_tracker/drm_api.h b/src/gallium/include/state_tracker/drm_api.h index e9fa9b4d2a..d3edddd5d4 100644 --- a/src/gallium/include/state_tracker/drm_api.h +++ b/src/gallium/include/state_tracker/drm_api.h @@ -17,6 +17,31 @@ enum drm_create_screen_mode { DRM_CREATE_MAX }; +#define DRM_API_HANDLE_TYPE_SHARED 0 +#define DRM_API_HANDLE_TYPE_KMS 1 + +/** + * For use with pipe_screen::{texture_from_handle|texture_get_handle}. + */ +struct winsys_handle +{ + /** + * Unused for texture_from_handle, always DRM_API_HANDLE_TYPE_SHARED. + * Input to texture_get_handle, use TEXTURE_USAGE to select handle for kms or ipc. + */ + unsigned type; + /** + * Input to texture_from_handle. + * Output for texture_get_handle. + */ + unsigned handle; + /** + * Input to texture_from_handle. + * Output for texture_get_handle. + */ + unsigned stride; +}; + /** * Modes other than DRM_CREATE_NORMAL derive from this struct. */ @@ -28,6 +53,8 @@ struct drm_create_screen_arg { struct drm_api { + void (*destroy)(struct drm_api *api); + const char *name; /** @@ -36,37 +63,10 @@ struct drm_api const char *driver_name; /** - * Special buffer functions + * Create a pipe srcreen. */ - /*@{*/ struct pipe_screen* (*create_screen)(struct drm_api *api, int drm_fd, struct drm_create_screen_arg *arg); - /*@}*/ - - /** - * Special buffer functions - */ - /*@{*/ - struct pipe_texture* - (*texture_from_shared_handle)(struct drm_api *api, - struct pipe_screen *screen, - struct pipe_texture *templ, - const char *name, - unsigned stride, - unsigned handle); - boolean (*shared_handle_from_texture)(struct drm_api *api, - struct pipe_screen *screen, - struct pipe_texture *texture, - unsigned *stride, - unsigned *handle); - boolean (*local_handle_from_texture)(struct drm_api *api, - struct pipe_screen *screen, - struct pipe_texture *texture, - unsigned *stride, - unsigned *handle); - /*@}*/ - - void (*destroy)(struct drm_api *api); }; extern struct drm_api * drm_api_create(void); diff --git a/src/gallium/state_trackers/dri/dri_drawable.c b/src/gallium/state_trackers/dri/dri_drawable.c index 173f4041c8..458473853c 100644 --- a/src/gallium/state_trackers/dri/dri_drawable.c +++ b/src/gallium/state_trackers/dri/dri_drawable.c @@ -58,6 +58,7 @@ dri_surface_from_handle(struct drm_api *api, struct pipe_surface *surface = NULL; struct pipe_texture *texture = NULL; struct pipe_texture templat; + struct winsys_handle whandle; memset(&templat, 0, sizeof(templat)); templat.tex_usage |= PIPE_TEXTURE_USAGE_RENDER_TARGET; @@ -68,8 +69,11 @@ dri_surface_from_handle(struct drm_api *api, templat.width0 = width; templat.height0 = height; - texture = api->texture_from_shared_handle(api, screen, &templat, - "dri2 buffer", pitch, handle); + memset(&whandle, 0, sizeof(whandle)); + whandle.handle = handle; + whandle.stride = pitch; + + texture = screen->texture_from_handle(screen, &templat, &whandle); if (!texture) { debug_printf("%s: Failed to blanket the buffer with a texture\n", __func__); diff --git a/src/gallium/state_trackers/egl/kms/native_kms.c b/src/gallium/state_trackers/egl/kms/native_kms.c index 94588bfa74..418461089a 100644 --- a/src/gallium/state_trackers/egl/kms/native_kms.c +++ b/src/gallium/state_trackers/egl/kms/native_kms.c @@ -55,7 +55,7 @@ kms_surface_validate(struct native_surface *nsurf, uint attachment_mask, templ.format = ksurf->color_format; templ.tex_usage = PIPE_TEXTURE_USAGE_RENDER_TARGET; if (ksurf->type == KMS_SURFACE_TYPE_SCANOUT) - templ.tex_usage |= PIPE_TEXTURE_USAGE_PRIMARY; + templ.tex_usage |= PIPE_TEXTURE_SCANOUT; } /* create textures */ diff --git a/src/gallium/state_trackers/egl/x11/native_dri2.c b/src/gallium/state_trackers/egl/x11/native_dri2.c index 8d2a8b1dff..9839979231 100644 --- a/src/gallium/state_trackers/egl/x11/native_dri2.c +++ b/src/gallium/state_trackers/egl/x11/native_dri2.c @@ -114,6 +114,7 @@ dri2_surface_process_drawable_buffers(struct native_surface *nsurf, struct dri2_surface *dri2surf = dri2_surface(nsurf); struct dri2_display *dri2dpy = dri2surf->dri2dpy; struct pipe_texture templ; + struct winsys_handle whandle; uint valid_mask; int i; @@ -171,9 +172,11 @@ dri2_surface_process_drawable_buffers(struct native_surface *nsurf, continue; } - dri2surf->textures[natt] = - dri2dpy->api->texture_from_shared_handle(dri2dpy->api, - dri2dpy->base.screen, &templ, desc, xbuf->pitch, xbuf->name); + memset(&whandle, 0, sizeof(whandle)); + whandle.stride = xbuf->pitch; + whandle.handle = xbuf->name; + dri2surf->textures[natt] = dri2dpy->base.screen->texture_from_handle( + dri2dpy->base.screen, &templ, &whandle); if (dri2surf->textures[natt]) valid_mask |= 1 << natt; } diff --git a/src/gallium/state_trackers/xorg/xorg_crtc.c b/src/gallium/state_trackers/xorg/xorg_crtc.c index 000ec9048f..44f7da0f96 100644 --- a/src/gallium/state_trackers/xorg/xorg_crtc.c +++ b/src/gallium/state_trackers/xorg/xorg_crtc.c @@ -197,11 +197,11 @@ crtc_load_cursor_argb_ga3d(xf86CrtcPtr crtc, CARD32 * image) if (!crtcp->cursor_tex) { struct pipe_texture templat; - unsigned pitch; + struct winsys_handle whandle; memset(&templat, 0, sizeof(templat)); templat.tex_usage |= PIPE_TEXTURE_USAGE_RENDER_TARGET; - templat.tex_usage |= PIPE_TEXTURE_USAGE_PRIMARY; + templat.tex_usage |= PIPE_TEXTURE_USAGE_SCANOUT; templat.target = PIPE_TEXTURE_2D; templat.last_level = 0; templat.depth0 = 1; @@ -209,13 +209,14 @@ crtc_load_cursor_argb_ga3d(xf86CrtcPtr crtc, CARD32 * image) templat.width0 = 64; templat.height0 = 64; + memset(&whandle, 0, sizeof(whandle)); + whandle.type = DRM_API_HANDLE_TYPE_KMS; + crtcp->cursor_tex = ms->screen->texture_create(ms->screen, &templat); - ms->api->local_handle_from_texture(ms->api, - ms->screen, - crtcp->cursor_tex, - &pitch, - &crtcp->cursor_handle); + ms->screen->texture_get_handle(ms->screen, crtcp->cursor_tex, &whandle); + + crtcp->cursor_handle = whandle.handle; } transfer = ms->screen->get_tex_transfer(ms->screen, crtcp->cursor_tex, diff --git a/src/gallium/state_trackers/xorg/xorg_dri2.c b/src/gallium/state_trackers/xorg/xorg_dri2.c index 5fc85c0e98..f23e4c6cc7 100644 --- a/src/gallium/state_trackers/xorg/xorg_dri2.c +++ b/src/gallium/state_trackers/xorg/xorg_dri2.c @@ -67,7 +67,7 @@ dri2_do_create_buffer(DrawablePtr pDraw, DRI2BufferPtr buffer, unsigned int form struct exa_pixmap_priv *exa_priv; BufferPrivatePtr private = buffer->driverPrivate; PixmapPtr pPixmap; - unsigned stride, handle; + struct winsys_handle whandle; if (pDraw->type == DRAWABLE_PIXMAP) pPixmap = (PixmapPtr) pDraw; @@ -75,6 +75,7 @@ dri2_do_create_buffer(DrawablePtr pDraw, DRI2BufferPtr buffer, unsigned int form pPixmap = (*pScreen->GetWindowPixmap)((WindowPtr) pDraw); exa_priv = exaGetPixmapDriverPrivate(pPixmap); + switch (buffer->attachment) { default: if (buffer->attachment != DRI2BufferFakeFrontLeft || @@ -128,7 +129,7 @@ dri2_do_create_buffer(DrawablePtr pDraw, DRI2BufferPtr buffer, unsigned int form template.depth0 = 1; template.last_level = 0; template.tex_usage = PIPE_TEXTURE_USAGE_DEPTH_STENCIL | - PIPE_TEXTURE_USAGE_DISPLAY_TARGET; + PIPE_TEXTURE_USAGE_SHARED; tex = ms->screen->texture_create(ms->screen, &template); pipe_texture_reference(&exa_priv->depth_stencil_tex, tex); } @@ -153,10 +154,13 @@ dri2_do_create_buffer(DrawablePtr pDraw, DRI2BufferPtr buffer, unsigned int form if (!tex) FatalError("NO TEXTURE IN DRI2\n"); - ms->api->shared_handle_from_texture(ms->api, ms->screen, tex, &stride, &handle); + memset(&whandle, 0, sizeof(whandle)); + whandle.type = DRM_API_HANDLE_TYPE_SHARED; + + ms->screen->texture_get_handle(ms->screen, tex, &whandle); - buffer->name = handle; - buffer->pitch = stride; + buffer->name = whandle.handle; + buffer->pitch = whandle.stride; buffer->cpp = 4; buffer->driverPrivate = private; buffer->flags = 0; /* not tiled */ diff --git a/src/gallium/state_trackers/xorg/xorg_driver.c b/src/gallium/state_trackers/xorg/xorg_driver.c index 8fb6e5a96d..004a28f00e 100644 --- a/src/gallium/state_trackers/xorg/xorg_driver.c +++ b/src/gallium/state_trackers/xorg/xorg_driver.c @@ -989,8 +989,9 @@ static Bool drv_create_front_buffer_ga3d(ScrnInfoPtr pScrn) { modesettingPtr ms = modesettingPTR(pScrn); - unsigned handle, stride, fb_id; struct pipe_texture *tex; + struct winsys_handle whandle; + unsigned fb_id; int ret; ms->noEvict = TRUE; @@ -1001,10 +1002,10 @@ drv_create_front_buffer_ga3d(ScrnInfoPtr pScrn) if (!tex) return FALSE; - if (!ms->api->local_handle_from_texture(ms->api, ms->screen, - tex, - &stride, - &handle)) + memset(&whandle, 0, sizeof(whandle)); + whandle.type = DRM_API_HANDLE_TYPE_KMS; + + if (!ms->screen->texture_get_handle(ms->screen, tex, &whandle)) goto err_destroy; ret = drmModeAddFB(ms->fd, @@ -1012,8 +1013,8 @@ drv_create_front_buffer_ga3d(ScrnInfoPtr pScrn) pScrn->virtualY, pScrn->depth, pScrn->bitsPerPixel, - stride, - handle, + whandle.stride, + whandle.handle, &fb_id); if (ret) { debug_printf("%s: failed to create framebuffer (%i, %s)\n", diff --git a/src/gallium/state_trackers/xorg/xorg_exa.c b/src/gallium/state_trackers/xorg/xorg_exa.c index a242e02ee7..a7ffe3f499 100644 --- a/src/gallium/state_trackers/xorg/xorg_exa.c +++ b/src/gallium/state_trackers/xorg/xorg_exa.c @@ -789,7 +789,7 @@ xorg_exa_set_displayed_usage(PixmapPtr pPixmap) return 0; } - priv->flags |= PIPE_TEXTURE_USAGE_PRIMARY; + priv->flags |= PIPE_TEXTURE_USAGE_SCANOUT; return 0; } @@ -805,7 +805,7 @@ xorg_exa_set_shared_usage(PixmapPtr pPixmap) return 0; } - priv->flags |= PIPE_TEXTURE_USAGE_DISPLAY_TARGET; + priv->flags |= PIPE_TEXTURE_USAGE_SHARED; return 0; } @@ -943,7 +943,7 @@ xorg_exa_set_texture(PixmapPtr pPixmap, struct pipe_texture *tex) { struct exa_pixmap_priv *priv = exaGetPixmapDriverPrivate(pPixmap); - int mask = PIPE_TEXTURE_USAGE_PRIMARY | PIPE_TEXTURE_USAGE_DISPLAY_TARGET; + int mask = PIPE_TEXTURE_USAGE_SHARED | PIPE_TEXTURE_USAGE_SCANOUT; if (!priv) return FALSE; @@ -976,8 +976,8 @@ xorg_exa_create_root_texture(ScrnInfoPtr pScrn, template.depth0 = 1; template.last_level = 0; template.tex_usage |= PIPE_TEXTURE_USAGE_RENDER_TARGET; - template.tex_usage |= PIPE_TEXTURE_USAGE_PRIMARY; - template.tex_usage |= PIPE_TEXTURE_USAGE_DISPLAY_TARGET; + template.tex_usage |= PIPE_TEXTURE_USAGE_SCANOUT; + template.tex_usage |= PIPE_TEXTURE_USAGE_SHARED; return exa->scrn->texture_create(exa->scrn, &template); } diff --git a/src/gallium/state_trackers/xorg/xvmc/surface.c b/src/gallium/state_trackers/xorg/xvmc/surface.c index 87d1dfaace..12d94e0c5c 100644 --- a/src/gallium/state_trackers/xorg/xvmc/surface.c +++ b/src/gallium/state_trackers/xorg/xvmc/surface.c @@ -106,7 +106,7 @@ CreateOrResizeBackBuffer(struct pipe_video_context *vpipe, unsigned int width, u template.width0 = width; template.height0 = height; template.depth0 = 1; - template.tex_usage = PIPE_TEXTURE_USAGE_DISPLAY_TARGET; + template.tex_usage = PIPE_TEXTURE_USAGE_SHARED; tex = vpipe->screen->texture_create(vpipe->screen, &template); if (!tex) diff --git a/src/gallium/winsys/drm/i965/gem/i965_drm_api.c b/src/gallium/winsys/drm/i965/gem/i965_drm_api.c index a061eef0be..21e82303f7 100644 --- a/src/gallium/winsys/drm/i965/gem/i965_drm_api.c +++ b/src/gallium/winsys/drm/i965/gem/i965_drm_api.c @@ -37,129 +37,6 @@ i965_libdrm_get_device_id(unsigned int *device_id) fclose(file); } -static struct i965_libdrm_buffer * -i965_libdrm_buffer_from_handle(struct i965_libdrm_winsys *idws, - const char* name, unsigned handle) -{ - struct i965_libdrm_buffer *buf = CALLOC_STRUCT(i965_libdrm_buffer); - uint32_t swizzle = 0; - - if (BRW_DUMP) - debug_printf("%s\n", __FUNCTION__); - - if (!buf) - return NULL; - pipe_reference_init(&buf->base.reference, 1); - buf->bo = drm_intel_bo_gem_create_from_name(idws->gem, name, handle); - buf->base.size = buf->bo->size; - buf->base.sws = &idws->base; - buf->flinked = TRUE; - buf->flink = handle; - - - if (!buf->bo) - goto err; - - drm_intel_bo_get_tiling(buf->bo, &buf->tiling, &swizzle); - if (buf->tiling != 0) - buf->map_gtt = TRUE; - - return buf; - -err: - FREE(buf); - return NULL; -} - - -/* - * Exported functions - */ - - -static struct pipe_texture * -i965_libdrm_texture_from_shared_handle(struct drm_api *api, - struct pipe_screen *screen, - struct pipe_texture *template, - const char* name, - unsigned pitch, - unsigned handle) -{ - /* XXX: this is silly -- there should be a way to get directly from - * the "drm_api" struct to ourselves, without peering into - * unrelated code: - */ - struct i965_libdrm_winsys *idws = i965_libdrm_winsys(brw_screen(screen)->sws); - struct i965_libdrm_buffer *buffer; - - if (BRW_DUMP) - debug_printf("%s %s pitch %d handle 0x%x\n", __FUNCTION__, - name, pitch, handle); - - buffer = i965_libdrm_buffer_from_handle(idws, name, handle); - if (!buffer) - return NULL; - - return brw_texture_blanket_winsys_buffer(screen, template, pitch, - buffer->tiling, - &buffer->base); -} - - -static boolean -i965_libdrm_shared_handle_from_texture(struct drm_api *api, - struct pipe_screen *screen, - struct pipe_texture *texture, - unsigned *pitch, - unsigned *handle) -{ - struct i965_libdrm_buffer *buf = NULL; - struct brw_winsys_buffer *buffer = NULL; - - if (BRW_DUMP) - debug_printf("%s\n", __FUNCTION__); - - if (!brw_texture_get_winsys_buffer(texture, &buffer, pitch)) - return FALSE; - - buf = i965_libdrm_buffer(buffer); - if (!buf->flinked) { - if (drm_intel_bo_flink(buf->bo, &buf->flink)) - return FALSE; - buf->flinked = TRUE; - } - - *handle = buf->flink; - - if (BRW_DUMP) - debug_printf(" -> pitch %d handle 0x%x\n", *pitch, *handle); - - return TRUE; -} - -static boolean -i965_libdrm_local_handle_from_texture(struct drm_api *api, - struct pipe_screen *screen, - struct pipe_texture *texture, - unsigned *pitch, - unsigned *handle) -{ - struct brw_winsys_buffer *buffer = NULL; - - if (BRW_DUMP) - debug_printf("%s\n", __FUNCTION__); - - if (!brw_texture_get_winsys_buffer(texture, &buffer, pitch)) - return FALSE; - - *handle = i965_libdrm_buffer(buffer)->bo->handle; - - if (BRW_DUMP) - debug_printf(" -> pitch %d handle 0x%x\n", *pitch, *handle); - - return TRUE; -} - static void i965_libdrm_winsys_destroy(struct brw_winsys_screen *iws) { @@ -225,9 +102,6 @@ struct drm_api i965_libdrm_api = { .name = "i965", .create_screen = i965_libdrm_create_screen, - .texture_from_shared_handle = i965_libdrm_texture_from_shared_handle, - .shared_handle_from_texture = i965_libdrm_shared_handle_from_texture, - .local_handle_from_texture = i965_libdrm_local_handle_from_texture, .destroy = destroy, }; diff --git a/src/gallium/winsys/drm/i965/gem/i965_drm_buffer.c b/src/gallium/winsys/drm/i965/gem/i965_drm_buffer.c index 07be1df87f..33a17496b2 100644 --- a/src/gallium/winsys/drm/i965/gem/i965_drm_buffer.c +++ b/src/gallium/winsys/drm/i965/gem/i965_drm_buffer.c @@ -1,4 +1,5 @@ +#include "state_tracker/drm_api.h" #include "i965_drm_winsys.h" #include "util/u_memory.h" #include "util/u_inlines.h" @@ -122,6 +123,78 @@ err: return PIPE_ERROR_OUT_OF_MEMORY; } +static enum pipe_error +i965_libdrm_bo_from_handle(struct brw_winsys_screen *sws, + struct winsys_handle *whandle, + unsigned *stride, + unsigned *tile, + struct brw_winsys_buffer **bo_out) +{ + struct i965_libdrm_winsys *idws = i965_libdrm_winsys(sws); + struct i965_libdrm_buffer *buf = CALLOC_STRUCT(i965_libdrm_buffer); + uint32_t swizzle = 0; + + if (BRW_DUMP) + debug_printf("%s\n", __FUNCTION__); + + if (!buf) + return PIPE_ERROR_OUT_OF_MEMORY; + + pipe_reference_init(&buf->base.reference, 1); + buf->bo = drm_intel_bo_gem_create_from_name(idws->gem, "FROM_HANDLE", whandle->handle); + buf->base.size = buf->bo->size; + buf->base.sws = &idws->base; + buf->flinked = TRUE; + buf->flink = whandle->handle; + + + if (!buf->bo) + goto err; + + drm_intel_bo_get_tiling(buf->bo, &buf->tiling, &swizzle); + if (buf->tiling != 0) + buf->map_gtt = TRUE; + + *tile = buf->tiling; + *stride = whandle->stride; + + *bo_out = &buf->base; + return PIPE_OK; + +err: + FREE(buf); + return PIPE_ERROR_OUT_OF_MEMORY; +} + +static enum pipe_error +i965_libdrm_bo_get_handle(struct brw_winsys_buffer *buffer, + struct winsys_handle *whandle, + unsigned stride) +{ + struct i965_libdrm_buffer *buf = i965_libdrm_buffer(buffer); + + if (BRW_DUMP) + debug_printf("%s\n", __FUNCTION__); + + if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) { + if (!buf->flinked) { + if (drm_intel_bo_flink(buf->bo, &buf->flink)) + return PIPE_ERROR_BAD_INPUT; + buf->flinked = TRUE; + } + + whandle->handle = buf->flink; + } else if (whandle->type == DRM_API_HANDLE_TYPE_KMS) { + whandle->handle = buf->bo->handle; + } else { + assert(!"unknown usage"); + return PIPE_ERROR_BAD_INPUT; + } + + whandle->stride = stride; + return PIPE_OK; +} + static void i965_libdrm_bo_destroy(struct brw_winsys_buffer *buffer) { @@ -415,6 +488,8 @@ void i965_libdrm_winsys_init_buffer_functions(struct i965_libdrm_winsys *idws) { idws->base.bo_alloc = i965_libdrm_bo_alloc; + idws->base.bo_from_handle = i965_libdrm_bo_from_handle; + idws->base.bo_get_handle = i965_libdrm_bo_get_handle; idws->base.bo_destroy = i965_libdrm_bo_destroy; idws->base.bo_emit_reloc = i965_libdrm_bo_emit_reloc; idws->base.bo_exec = i965_libdrm_bo_exec; diff --git a/src/gallium/winsys/drm/intel/gem/intel_drm_api.c b/src/gallium/winsys/drm/intel/gem/intel_drm_api.c index 377ed25513..e3b980a832 100644 --- a/src/gallium/winsys/drm/intel/gem/intel_drm_api.c +++ b/src/gallium/winsys/drm/intel/gem/intel_drm_api.c @@ -38,99 +38,6 @@ intel_drm_get_device_id(unsigned int *device_id) fclose(file); } -static struct intel_buffer * -intel_drm_buffer_from_handle(struct intel_drm_winsys *idws, - const char* name, unsigned handle) -{ - struct intel_drm_buffer *buf = CALLOC_STRUCT(intel_drm_buffer); - uint32_t tile = 0, swizzle = 0; - - if (!buf) - return NULL; - - buf->magic = 0xDEAD1337; - buf->bo = drm_intel_bo_gem_create_from_name(idws->pools.gem, name, handle); - buf->flinked = TRUE; - buf->flink = handle; - - if (!buf->bo) - goto err; - - drm_intel_bo_get_tiling(buf->bo, &tile, &swizzle); - if (tile != INTEL_TILE_NONE) - buf->map_gtt = TRUE; - - return (struct intel_buffer *)buf; - -err: - FREE(buf); - return NULL; -} - - -/* - * Exported functions - */ - - -static struct pipe_texture * -intel_drm_texture_from_shared_handle(struct drm_api *api, - struct pipe_screen *screen, - struct pipe_texture *templ, - const char* name, - unsigned pitch, - unsigned handle) -{ - struct intel_drm_winsys *idws = intel_drm_winsys(i915_screen(screen)->iws); - struct intel_buffer *buffer; - - buffer = intel_drm_buffer_from_handle(idws, name, handle); - if (!buffer) - return NULL; - - return i915_texture_blanket_intel(screen, templ, pitch, buffer); -} - -static boolean -intel_drm_shared_handle_from_texture(struct drm_api *api, - struct pipe_screen *screen, - struct pipe_texture *texture, - unsigned *pitch, - unsigned *handle) -{ - struct intel_drm_buffer *buf = NULL; - struct intel_buffer *buffer = NULL; - if (!i915_get_texture_buffer_intel(texture, &buffer, pitch)) - return FALSE; - - buf = intel_drm_buffer(buffer); - if (!buf->flinked) { - if (drm_intel_bo_flink(buf->bo, &buf->flink)) - return FALSE; - buf->flinked = TRUE; - } - - *handle = buf->flink; - - return TRUE; -} - -static boolean -intel_drm_local_handle_from_texture(struct drm_api *api, - struct pipe_screen *screen, - struct pipe_texture *texture, - unsigned *pitch, - unsigned *handle) -{ - struct intel_buffer *buffer = NULL; - if (!i915_get_texture_buffer_intel(texture, &buffer, pitch)) - return FALSE; - - *handle = intel_drm_buffer(buffer)->bo->handle; - - return TRUE; -} - static void intel_drm_winsys_destroy(struct intel_winsys *iws) { @@ -192,9 +99,6 @@ struct drm_api intel_drm_api = .name = "i915", .driver_name = "i915", .create_screen = intel_drm_create_screen, - .texture_from_shared_handle = intel_drm_texture_from_shared_handle, - .shared_handle_from_texture = intel_drm_shared_handle_from_texture, - .local_handle_from_texture = intel_drm_local_handle_from_texture, .destroy = destroy, }; diff --git a/src/gallium/winsys/drm/intel/gem/intel_drm_buffer.c b/src/gallium/winsys/drm/intel/gem/intel_drm_buffer.c index ac4dd6e00e..cb4f92a3b1 100644 --- a/src/gallium/winsys/drm/intel/gem/intel_drm_buffer.c +++ b/src/gallium/winsys/drm/intel/gem/intel_drm_buffer.c @@ -1,4 +1,5 @@ +#include "state_tracker/drm_api.h" #include "intel_drm_winsys.h" #include "util/u_memory.h" @@ -52,6 +53,66 @@ err: return NULL; } +static struct intel_buffer * +intel_drm_buffer_from_handle(struct intel_winsys *iws, + struct winsys_handle *whandle, + unsigned *stride) +{ + struct intel_drm_winsys *idws = intel_drm_winsys(iws); + struct intel_drm_buffer *buf = CALLOC_STRUCT(intel_drm_buffer); + uint32_t tile = 0, swizzle = 0; + + if (!buf) + return NULL; + + buf->magic = 0xDEAD1337; + buf->bo = drm_intel_bo_gem_create_from_name(idws->pools.gem, "gallium3d_from_handle", whandle->handle); + buf->flinked = TRUE; + buf->flink = whandle->handle; + + if (!buf->bo) + goto err; + + drm_intel_bo_get_tiling(buf->bo, &tile, &swizzle); + if (tile != INTEL_TILE_NONE) + buf->map_gtt = TRUE; + + *stride = whandle->stride; + + return (struct intel_buffer *)buf; + +err: + FREE(buf); + return NULL; +} + +static boolean +intel_drm_buffer_get_handle(struct intel_winsys *iws, + struct intel_buffer *buffer, + struct winsys_handle *whandle, + unsigned stride) +{ + struct intel_drm_buffer *buf = intel_drm_buffer(buffer); + + if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) { + if (!buf->flinked) { + if (drm_intel_bo_flink(buf->bo, &buf->flink)) + return FALSE; + buf->flinked = TRUE; + } + + whandle->handle = buf->flink; + } else if (whandle->type == DRM_API_HANDLE_TYPE_KMS) { + whandle->handle = buf->bo->handle; + } else { + assert(!"unknown usage"); + return FALSE; + } + + whandle->stride = stride; + return TRUE; +} + static int intel_drm_buffer_set_fence_reg(struct intel_winsys *iws, struct intel_buffer *buffer, @@ -146,6 +207,8 @@ void intel_drm_winsys_init_buffer_functions(struct intel_drm_winsys *idws) { idws->base.buffer_create = intel_drm_buffer_create; + idws->base.buffer_from_handle = intel_drm_buffer_from_handle; + idws->base.buffer_get_handle = intel_drm_buffer_get_handle; idws->base.buffer_set_fence_reg = intel_drm_buffer_set_fence_reg; idws->base.buffer_map = intel_drm_buffer_map; idws->base.buffer_unmap = intel_drm_buffer_unmap; diff --git a/src/gallium/winsys/drm/nouveau/drm/nouveau_drm_api.c b/src/gallium/winsys/drm/nouveau/drm/nouveau_drm_api.c index 0d05f316c4..21517b4bb5 100644 --- a/src/gallium/winsys/drm/nouveau/drm/nouveau_drm_api.c +++ b/src/gallium/winsys/drm/nouveau/drm/nouveau_drm_api.c @@ -21,9 +21,10 @@ dri_surface_from_handle(struct drm_api *api, struct pipe_screen *pscreen, struct pipe_surface *ps = NULL; struct pipe_texture *pt = NULL; struct pipe_texture tmpl; + struct winsys_handle whandle; memset(&tmpl, 0, sizeof(tmpl)); - tmpl.tex_usage = PIPE_TEXTURE_USAGE_PRIMARY; + tmpl.tex_usage = PIPE_TEXTURE_USAGE_SCANOUT; tmpl.target = PIPE_TEXTURE_2D; tmpl.last_level = 0; tmpl.depth0 = 1; @@ -31,8 +32,11 @@ dri_surface_from_handle(struct drm_api *api, struct pipe_screen *pscreen, tmpl.width0 = width; tmpl.height0 = height; - pt = api->texture_from_shared_handle(api, pscreen, &tmpl, - "front buffer", pitch, handle); + memset(&whandle, 0, sizeof(whandle)); + whandle.stride = pitch; + whandle.handle = handle; + + pt = pscreen->texture_from_handle(pscreen, &tmpl, &whandle); if (!pt) return NULL; @@ -142,74 +146,10 @@ nouveau_drm_create_screen(struct drm_api *api, int fd, return nvws->pscreen; } -static struct pipe_texture * -nouveau_drm_pt_from_name(struct drm_api *api, struct pipe_screen *pscreen, - struct pipe_texture *templ, const char *name, - unsigned stride, unsigned handle) -{ - struct nouveau_device *dev = nouveau_screen(pscreen)->device; - struct pipe_texture *pt; - struct pipe_buffer *pb; - int ret; - - pb = CALLOC(1, sizeof(struct pipe_buffer) + sizeof(struct nouveau_bo*)); - if (!pb) - return NULL; - - ret = nouveau_bo_handle_ref(dev, handle, (struct nouveau_bo**)(pb+1)); - if (ret) { - debug_printf("%s: ref name 0x%08x failed with %d\n", - __func__, handle, ret); - FREE(pb); - return NULL; - } - - pipe_reference_init(&pb->reference, 1); - pb->screen = pscreen; - pb->alignment = 0; - pb->usage = PIPE_BUFFER_USAGE_GPU_READ_WRITE | - PIPE_BUFFER_USAGE_CPU_READ_WRITE; - pb->size = nouveau_bo(pb)->size; - pt = pscreen->texture_blanket(pscreen, templ, &stride, pb); - pipe_buffer_reference(&pb, NULL); - return pt; -} - -static boolean -nouveau_drm_name_from_pt(struct drm_api *api, struct pipe_screen *pscreen, - struct pipe_texture *pt, unsigned *stride, - unsigned *handle) -{ - struct nouveau_miptree *mt = nouveau_miptree(pt); - - if (!mt || !mt->bo) - return false; - - return nouveau_bo_handle_get(mt->bo, handle) == 0; -} - -static boolean -nouveau_drm_handle_from_pt(struct drm_api *api, struct pipe_screen *pscreen, - struct pipe_texture *pt, unsigned *stride, - unsigned *handle) -{ - struct nouveau_miptree *mt = nouveau_miptree(pt); - - if (!mt || !mt->bo) - return false; - - *handle = mt->bo->handle; - *stride = util_format_get_stride(mt->base.format, mt->base.width0); - return true; -} - struct drm_api drm_api_hooks = { .name = "nouveau", .driver_name = "nouveau", .create_screen = nouveau_drm_create_screen, - .texture_from_shared_handle = nouveau_drm_pt_from_name, - .shared_handle_from_texture = nouveau_drm_name_from_pt, - .local_handle_from_texture = nouveau_drm_handle_from_pt, }; struct drm_api * diff --git a/src/gallium/winsys/drm/radeon/core/radeon_buffer.c b/src/gallium/winsys/drm/radeon/core/radeon_buffer.c index e5c6919933..daa032af6f 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_buffer.c +++ b/src/gallium/winsys/drm/radeon/core/radeon_buffer.c @@ -264,6 +264,75 @@ static int radeon_fence_finish(struct pipe_winsys *ws, return 0; } +/* Create a buffer from a handle. */ +static struct pipe_buffer* radeon_buffer_from_handle(struct radeon_winsys *radeon_ws, + struct pipe_screen *screen, + struct winsys_handle *whandle, + unsigned *stride) +{ + struct radeon_bo_manager* bom = radeon_ws->priv->bom; + struct radeon_pipe_buffer* radeon_buffer; + struct radeon_bo* bo = NULL; + + bo = radeon_bo_open(bom, whandle->handle, 0, 0, 0, 0); + if (bo == NULL) { + return NULL; + } + + radeon_buffer = CALLOC_STRUCT(radeon_pipe_buffer); + if (radeon_buffer == NULL) { + radeon_bo_unref(bo); + return NULL; + } + + pipe_reference_init(&radeon_buffer->base.reference, 1); + radeon_buffer->base.screen = screen; + radeon_buffer->base.usage = PIPE_BUFFER_USAGE_PIXEL; + radeon_buffer->bo = bo; + + *stride = whandle->stride; + + return &radeon_buffer->base; +} + +static boolean radeon_buffer_get_handle(struct radeon_winsys *radeon_ws, + struct pipe_buffer *buffer, + unsigned stride, + struct winsys_handle *whandle) +{ + int retval, fd; + struct drm_gem_flink flink; + struct radeon_pipe_buffer* radeon_buffer; + + radeon_buffer = (struct radeon_pipe_buffer*)buffer; + + + if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) { + if (!radeon_buffer->flinked) { + fd = radeon_ws->priv->fd; + + flink.handle = radeon_buffer->bo->handle; + + retval = ioctl(fd, DRM_IOCTL_GEM_FLINK, &flink); + if (retval) { + debug_printf("radeon: DRM_IOCTL_GEM_FLINK failed, error %d\n", + retval); + return FALSE; + } + + radeon_buffer->flink = flink.name; + radeon_buffer->flinked = TRUE; + } + + whandle->handle = radeon_buffer->flink; + } else if (whandle->type == DRM_API_HANDLE_TYPE_KMS) { + whandle->handle = ((struct radeon_pipe_buffer*)buffer)->bo->handle; + } + whandle->stride = stride; + + return TRUE; +} + struct radeon_winsys* radeon_pipe_winsys(int fd) { struct radeon_winsys* radeon_ws; @@ -298,6 +367,8 @@ struct radeon_winsys* radeon_pipe_winsys(int fd) radeon_ws->base.get_name = radeon_get_name; radeon_ws->buffer_set_tiling = radeon_buffer_set_tiling; + radeon_ws->buffer_from_handle = radeon_buffer_from_handle; + radeon_ws->buffer_get_handle = radeon_buffer_get_handle; return radeon_ws; } diff --git a/src/gallium/winsys/drm/radeon/core/radeon_drm.c b/src/gallium/winsys/drm/radeon/core/radeon_drm.c index e817a26da6..97edb6a47e 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_drm.c +++ b/src/gallium/winsys/drm/radeon/core/radeon_drm.c @@ -148,124 +148,6 @@ struct pipe_screen* radeon_create_screen(struct drm_api* api, } } - -boolean radeon_buffer_from_texture(struct drm_api* api, - struct pipe_screen* screen, - struct pipe_texture* texture, - struct pipe_buffer** buffer, - unsigned* stride) -{ - /* XXX fix this */ - return r300_get_texture_buffer(screen, texture, buffer, stride); -} - -/* Create a buffer from a handle. */ -/* XXX what's up with name? */ -struct pipe_buffer* radeon_buffer_from_handle(struct drm_api* api, - struct pipe_screen* screen, - const char* name, - unsigned handle) -{ - struct radeon_bo_manager* bom = - ((struct radeon_winsys*)screen->winsys)->priv->bom; - struct radeon_pipe_buffer* radeon_buffer; - struct radeon_bo* bo = NULL; - - bo = radeon_bo_open(bom, handle, 0, 0, 0, 0); - if (bo == NULL) { - return NULL; - } - - radeon_buffer = CALLOC_STRUCT(radeon_pipe_buffer); - if (radeon_buffer == NULL) { - radeon_bo_unref(bo); - return NULL; - } - - pipe_reference_init(&radeon_buffer->base.reference, 1); - radeon_buffer->base.screen = screen; - radeon_buffer->base.usage = PIPE_BUFFER_USAGE_PIXEL; - radeon_buffer->bo = bo; - return &radeon_buffer->base; -} - -static struct pipe_texture* -radeon_texture_from_shared_handle(struct drm_api *api, - struct pipe_screen *screen, - struct pipe_texture *templ, - const char *name, - unsigned stride, - unsigned handle) -{ - struct pipe_buffer *buffer; - struct pipe_texture *blanket; - - buffer = radeon_buffer_from_handle(api, screen, name, handle); - if (!buffer) { - return NULL; - } - - blanket = screen->texture_blanket(screen, templ, &stride, buffer); - - pipe_buffer_reference(&buffer, NULL); - - return blanket; -} - -static boolean radeon_shared_handle_from_texture(struct drm_api *api, - struct pipe_screen *screen, - struct pipe_texture *texture, - unsigned *stride, - unsigned *handle) -{ - int retval, fd; - struct drm_gem_flink flink; - struct radeon_pipe_buffer* radeon_buffer; - struct pipe_buffer *buffer = NULL; - - if (!radeon_buffer_from_texture(api, screen, texture, &buffer, stride)) { - return FALSE; - } - - radeon_buffer = (struct radeon_pipe_buffer*)buffer; - if (!radeon_buffer->flinked) { - fd = ((struct radeon_winsys*)screen->winsys)->priv->fd; - - flink.handle = radeon_buffer->bo->handle; - - retval = ioctl(fd, DRM_IOCTL_GEM_FLINK, &flink); - if (retval) { - debug_printf("radeon: DRM_IOCTL_GEM_FLINK failed, error %d\n", - retval); - return FALSE; - } - - radeon_buffer->flink = flink.name; - radeon_buffer->flinked = TRUE; - } - - *handle = radeon_buffer->flink; - return TRUE; -} - -static boolean radeon_local_handle_from_texture(struct drm_api *api, - struct pipe_screen *screen, - struct pipe_texture *texture, - unsigned *stride, - unsigned *handle) -{ - struct pipe_buffer *buffer = NULL; - if (!radeon_buffer_from_texture(api, screen, texture, &buffer, stride)) { - return FALSE; - } - - *handle = ((struct radeon_pipe_buffer*)buffer)->bo->handle; - - pipe_buffer_reference(&buffer, NULL); - - return TRUE; -} - static void radeon_drm_api_destroy(struct drm_api *api) { return; @@ -275,9 +157,6 @@ struct drm_api drm_api_hooks = { .name = "radeon", .driver_name = "radeon", .create_screen = radeon_create_screen, - .texture_from_shared_handle = radeon_texture_from_shared_handle, - .shared_handle_from_texture = radeon_shared_handle_from_texture, - .local_handle_from_texture = radeon_local_handle_from_texture, .destroy = radeon_drm_api_destroy, }; diff --git a/src/gallium/winsys/drm/radeon/core/radeon_drm.h b/src/gallium/winsys/drm/radeon/core/radeon_drm.h index f62a9b8048..78451b6f01 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_drm.h +++ b/src/gallium/winsys/drm/radeon/core/radeon_drm.h @@ -37,28 +37,6 @@ struct pipe_screen* radeon_create_screen(struct drm_api* api, int drmFB, struct drm_create_screen_arg *arg); - -boolean radeon_buffer_from_texture(struct drm_api* api, - struct pipe_screen* screen, - struct pipe_texture* texture, - struct pipe_buffer** buffer, - unsigned* stride); - -struct pipe_buffer* radeon_buffer_from_handle(struct drm_api* api, - struct pipe_screen* screen, - const char* name, - unsigned handle); - -boolean radeon_handle_from_buffer(struct drm_api* api, - struct pipe_screen* screen, - struct pipe_buffer* buffer, - unsigned* handle); - -boolean radeon_global_handle_from_buffer(struct drm_api* api, - struct pipe_screen* screen, - struct pipe_buffer* buffer, - unsigned* handle); - void radeon_destroy_drm_api(struct drm_api* api); /* Guess at whether this chipset should use r300g. diff --git a/src/gallium/winsys/drm/radeon/core/radeon_winsys.h b/src/gallium/winsys/drm/radeon/core/radeon_winsys.h index 4901080ca7..37eeb45979 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_winsys.h +++ b/src/gallium/winsys/drm/radeon/core/radeon_winsys.h @@ -56,6 +56,18 @@ struct radeon_winsys { /* VRAM size. */ uint32_t vram_size; + /* Create a buffer from a winsys handle. */ + struct pipe_buffer *(*buffer_from_handle)(struct radeon_winsys *winsys, + struct pipe_screen *screen, + struct winsys_handle *whandle, + unsigned *stride); + + /* Get the handle from a buffer. */ + boolean (*buffer_get_handle)(struct radeon_winsys *winsys, + struct pipe_buffer *buffer, + unsigned stride, + struct winsys_handle *whandle); + /* Add a pipe_buffer to the list of buffer objects to validate. */ boolean (*add_buffer)(struct radeon_winsys* winsys, struct pipe_buffer* pbuffer, diff --git a/src/gallium/winsys/drm/vmware/core/vmw_screen_dri.c b/src/gallium/winsys/drm/vmware/core/vmw_screen_dri.c index a7c6e88b9e..657544dcb2 100644 --- a/src/gallium/winsys/drm/vmware/core/vmw_screen_dri.c +++ b/src/gallium/winsys/drm/vmware/core/vmw_screen_dri.c @@ -44,6 +44,16 @@ #include <stdio.h> +static struct svga_winsys_surface * +vmw_drm_surface_from_handle(struct svga_winsys_screen *sws, + struct winsys_handle *whandle, + SVGA3dSurfaceFormat *format); +static boolean +vmw_drm_surface_get_handle(struct svga_winsys_screen *sws, + struct svga_winsys_surface *surface, + unsigned stride, + struct winsys_handle *whandle); + static struct dri1_api dri1_api_hooks; static struct dri1_api_version ddx_required = { 0, 1, 0 }; static struct dri1_api_version ddx_compat = { 0, 0, 0 }; @@ -129,7 +139,12 @@ vmw_drm_create_screen(struct drm_api *drm_api, &drm_compat, "use old scanout field (not a error)")) use_old_scanout_flag = TRUE; dri1->api = &dri1_api_hooks; +#if 0 break; +#else + assert(!"No dri 1 support for now\n"); + return NULL; +#endif default: return NULL; } @@ -139,6 +154,10 @@ vmw_drm_create_screen(struct drm_api *drm_api, if (!vws) goto out_no_vws; + /* XXX do this properly */ + vws->base.surface_from_handle = vmw_drm_surface_from_handle; + vws->base.surface_get_handle = vmw_drm_surface_get_handle; + screen = svga_screen_create( &vws->base ); if (!screen) goto out_no_screen; @@ -200,6 +219,7 @@ vmw_dri1_present_locked(struct pipe_context *locked_pipe, const struct drm_clip_rect *bbox, struct pipe_fence_handle **p_fence) { +#if 0 struct svga_winsys_surface *srf = svga_screen_texture_get_winsys_surface(surf->texture); struct vmw_svga_winsys_surface *vsrf = vmw_svga_winsys_surface(srf); @@ -246,21 +266,19 @@ vmw_dri1_present_locked(struct pipe_context *locked_pipe, *p_fence = (visible) ? vmw_pipe_fence(fence_seq) : NULL; vmw_svga_winsys_surface_reference(&vsrf, NULL); +#else + assert(!"No dri 1 support for now\n"); +#endif } -static struct pipe_texture * -vmw_drm_texture_from_handle(struct drm_api *drm_api, - struct pipe_screen *screen, - struct pipe_texture *templat, - const char *name, - unsigned stride, - unsigned handle) +static struct svga_winsys_surface * +vmw_drm_surface_from_handle(struct svga_winsys_screen *sws, + struct winsys_handle *whandle, + SVGA3dSurfaceFormat *format) { struct vmw_svga_winsys_surface *vsrf; struct svga_winsys_surface *ssrf; - struct vmw_winsys_screen *vws = - vmw_winsys_screen(svga_winsys_screen(screen)); - struct pipe_texture *tex; + struct vmw_winsys_screen *vws = vmw_winsys_screen(sws); union drm_vmw_surface_reference_arg arg; struct drm_vmw_surface_arg *req = &arg.req; struct drm_vmw_surface_create_req *rep = &arg.rep; @@ -273,7 +291,7 @@ vmw_drm_texture_from_handle(struct drm_api *drm_api, */ memset(&arg, 0, sizeof(arg)); - req->sid = handle; + req->sid = whandle->handle; ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_REF_SURFACE, &arg, sizeof(arg)); @@ -281,14 +299,14 @@ vmw_drm_texture_from_handle(struct drm_api *drm_api, if (ret) { fprintf(stderr, "Failed referencing shared surface. SID %d.\n" "Error %d (%s).\n", - handle, ret, strerror(-ret)); + whandle->handle, ret, strerror(-ret)); return NULL; } if (rep->mip_levels[0] != 1) { fprintf(stderr, "Incorrect number of mipmap levels on shared surface." " SID %d, levels %d\n", - handle, rep->mip_levels[0]); + whandle->handle, rep->mip_levels[0]); goto out_mip; } @@ -296,7 +314,7 @@ vmw_drm_texture_from_handle(struct drm_api *drm_api, if (rep->mip_levels[i] != 0) { fprintf(stderr, "Incorrect number of faces levels on shared surface." " SID %d, face %d present.\n", - handle, i); + whandle->handle, i); goto out_mip; } } @@ -308,38 +326,32 @@ vmw_drm_texture_from_handle(struct drm_api *drm_api, pipe_reference_init(&vsrf->refcnt, 1); p_atomic_set(&vsrf->validated, 0); vsrf->screen = vws; - vsrf->sid = handle; + vsrf->sid = whandle->handle; ssrf = svga_winsys_surface(vsrf); - tex = svga_screen_texture_wrap_surface(screen, templat, rep->format, ssrf); - if (!tex) - vmw_svga_winsys_surface_reference(&vsrf, NULL); + *format = rep->format; + + return ssrf; - return tex; - out_mip: - vmw_ioctl_surface_destroy(vws, handle); +out_mip: + vmw_ioctl_surface_destroy(vws, whandle->handle); return NULL; } static boolean -vmw_drm_handle_from_texture(struct drm_api *drm_api, - struct pipe_screen *screen, - struct pipe_texture *texture, - unsigned *stride, - unsigned *handle) +vmw_drm_surface_get_handle(struct svga_winsys_screen *sws, + struct svga_winsys_surface *surface, + unsigned stride, + struct winsys_handle *whandle) { - struct svga_winsys_surface *surface = - svga_screen_texture_get_winsys_surface(texture); struct vmw_svga_winsys_surface *vsrf; if (!surface) return FALSE; vsrf = vmw_svga_winsys_surface(surface); - *handle = vsrf->sid; - *stride = util_format_get_nblocksx(texture->format, texture->width0) * - util_format_get_blocksize(texture->format); + whandle->handle = vsrf->sid; + whandle->stride = stride; - vmw_svga_winsys_surface_reference(&vsrf, NULL); return TRUE; } @@ -353,9 +365,6 @@ static struct drm_api vmw_drm_api_hooks = { .name = "vmwgfx", .driver_name = "vmwgfx", .create_screen = vmw_drm_create_screen, - .texture_from_shared_handle = vmw_drm_texture_from_handle, - .shared_handle_from_texture = vmw_drm_handle_from_texture, - .local_handle_from_texture = vmw_drm_handle_from_texture, }; struct drm_api* drm_api_create() diff --git a/src/mesa/drivers/dri/i810/Makefile b/src/mesa/drivers/dri/i810/Makefile index 3874faee51..54a837d5ea 100644 --- a/src/mesa/drivers/dri/i810/Makefile +++ b/src/mesa/drivers/dri/i810/Makefile @@ -5,9 +5,6 @@ include $(TOP)/configs/current LIBNAME = i810_dri.so -# Not yet -# MINIGLX_SOURCES = server/i810_dri.c - DRIVER_SOURCES = \ i810context.c \ i810ioctl.c \ diff --git a/src/mesa/drivers/dri/i810/server/i810_dri.c b/src/mesa/drivers/dri/i810/server/i810_dri.c deleted file mode 100644 index f52797c5ed..0000000000 --- a/src/mesa/drivers/dri/i810/server/i810_dri.c +++ /dev/null @@ -1,975 +0,0 @@ -/** - * \file server/i810_dri.c - * \brief File to perform the device-specific initialization tasks typically - * done in the X server. - * - * Here they are converted to run in the client (or perhaps a standalone - * process), and to work with the frame buffer device rather than the X - * server infrastructure. - * - * Copyright (C) 2004 Dave Airlie (airlied@linux.ie) - */ - -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <errno.h> -#include <unistd.h> - -#include "driver.h" -#include "drm.h" - -#include "i810.h" -#include "i810_dri.h" -#include "i810_reg.h" - - -static int i810_pitches[] = { - 512, - 1024, - 2048, - 4096, - 0 -}; - -static int i810_pitch_flags[] = { - 0x0, - 0x1, - 0x2, - 0x3, - 0 -}; - -static unsigned int i810_drm_version = 0; - -static int -I810AllocLow(I810MemRange * result, I810MemRange * pool, int size) -{ - if (size > pool->Size) - return 0; - - pool->Size -= size; - result->Size = size; - result->Start = pool->Start; - result->End = pool->Start += size; - - return 1; -} - -static int -I810AllocHigh(I810MemRange * result, I810MemRange * pool, int size) -{ - if (size > pool->Size) - return 0; - - pool->Size -= size; - result->Size = size; - result->End = pool->End; - result->Start = pool->End -= size; - - return 1; -} - - -/** - * \brief Wait for free FIFO entries. - * - * \param ctx display handle. - * \param entries number of free entries to wait. - * - * It polls the free entries from the chip until it reaches the requested value - * or a timeout (3000 tries) occurs. Aborts the program if the FIFO times out. - */ -static void I810WaitForFifo( const DRIDriverContext *ctx, - int entries ) -{ -} - -/** - * \brief Reset graphics card to known state. - * - * \param ctx display handle. - * - * Resets the values of several I810 registers. - */ -static void I810EngineReset( const DRIDriverContext *ctx ) -{ - unsigned char *I810MMIO = ctx->MMIOAddress; -} - -/** - * \brief Restore the drawing engine. - * - * \param ctx display handle - * - * Resets the graphics card and sets initial values for several registers of - * the card's drawing engine. - * - * Turns on the i810 command processor engine (i.e., the ringbuffer). - */ -static int I810EngineRestore( const DRIDriverContext *ctx ) -{ - I810Ptr info = ctx->driverPrivate; - unsigned char *I810MMIO = ctx->MMIOAddress; - - fprintf(stderr, "%s\n", __FUNCTION__); - - return 1; -} - - -/** - * \brief Shutdown the drawing engine. - * - * \param ctx display handle - * - * Turns off the command processor engine & restores the graphics card - * to a state that fbdev understands. - */ -static int I810EngineShutdown( const DRIDriverContext *ctx ) -{ - drmI810Init info; - int ret; - - memset(&info, 0, sizeof(drmI810Init)); - info.func = I810_CLEANUP_DMA; - - ret = drmCommandWrite(ctx->drmFD, DRM_I810_INIT, &info, sizeof(drmI810Init)); - if (ret>0) - { - fprintf(stderr,"[dri] I810 DMA Cleanup failed\n"); - return -errno; - } - return 0; -} - -/** - * \brief Compute base 2 logarithm. - * - * \param val value. - * - * \return base 2 logarithm of \p val. - */ -static int I810MinBits(int val) -{ - int bits; - - if (!val) return 1; - for (bits = 0; val; val >>= 1, ++bits); - return bits; -} - -static int I810DRIAgpPreInit( const DRIDriverContext *ctx, I810Ptr info) -{ - - if (drmAgpAcquire(ctx->drmFD) < 0) { - fprintf(stderr, "[gart] AGP not available\n"); - return 0; - } - - - if (drmAgpEnable(ctx->drmFD, 0) < 0) { - fprintf(stderr, "[gart] AGP not enabled\n"); - drmAgpRelease(ctx->drmFD); - return 0; - } -} - -/** - * \brief Initialize the AGP state - * - * \param ctx display handle. - * \param info driver private data. - * - * \return one on success, or zero on failure. - * - * Acquires and enables the AGP device. Reserves memory in the AGP space for - * the ring buffer, vertex buffers and textures. Initialize the I810 - * registers to point to that memory and add client mappings. - */ -static int I810DRIAgpInit( const DRIDriverContext *ctx, I810Ptr info) -{ - unsigned char *I810MMIO = ctx->MMIOAddress; - int ret; - int s, l; - unsigned long dcacheHandle; - unsigned long agpHandle; - int pitch_idx = 0; - int back_size = 0; - int sysmem_size = 0; - int width = ctx->shared.virtualWidth * ctx->cpp; - - - info->backHandle = DRM_AGP_NO_HANDLE; - info->zHandle = DRM_AGP_NO_HANDLE; - info->sysmemHandle = DRM_AGP_NO_HANDLE; - info->dcacheHandle = DRM_AGP_NO_HANDLE; - - memset(&info->DcacheMem, 0, sizeof(I810MemRange)); - memset(&info->BackBuffer, 0, sizeof(I810MemRange)); - memset(&info->DepthBuffer, 0, sizeof(I810MemRange)); - - drmAgpAlloc(ctx->drmFD, 4096 * 1024, 1, NULL, &dcacheHandle); - info->dcacheHandle = dcacheHandle; - - fprintf(stderr, "[agp] dcacheHandle : 0x%x\n", dcacheHandle); - -#define Elements(x) sizeof(x)/sizeof(*x) - for (pitch_idx = 0; pitch_idx < Elements(i810_pitches); pitch_idx++) - if (width <= i810_pitches[pitch_idx]) - break; - - if (pitch_idx == Elements(i810_pitches)) { - fprintf(stderr,"[dri] Couldn't find depth/back buffer pitch\n"); - exit(-1); - } - else - { - int lines = (ctx->shared.virtualWidth + 15) / 16 * 16; - back_size = i810_pitches[pitch_idx] * lines; - back_size = ((back_size + 4096 - 1) / 4096) * 4096; - } - - sysmem_size = ctx->shared.fbSize; - fprintf(stderr,"sysmem_size is %lu back_size is %lu\n", sysmem_size, back_size); - if (dcacheHandle != DRM_AGP_NO_HANDLE) { - if (back_size > 4 * 1024 * 1024) { - fprintf(stderr,"[dri] Backsize is larger then 4 meg\n"); - sysmem_size = sysmem_size - 2 * back_size; - drmAgpFree(ctx->drmFD, dcacheHandle); - info->dcacheHandle = dcacheHandle = DRM_AGP_NO_HANDLE; - } else { - sysmem_size = sysmem_size - back_size; - } - } else { - sysmem_size = sysmem_size - 2 * back_size; - } - - info->SysMem.Start=0; - info->SysMem.Size = sysmem_size; - info->SysMem.End = sysmem_size; - - if (dcacheHandle != DRM_AGP_NO_HANDLE) { - if (drmAgpBind(ctx->drmFD, dcacheHandle, info->DepthOffset) == 0) { - memset(&info->DcacheMem, 0, sizeof(I810MemRange)); - fprintf(stderr,"[agp] GART: Found 4096K Z buffer memory\n"); - info->DcacheMem.Start = info->DepthOffset; - info->DcacheMem.Size = 1024 * 4096; - info->DcacheMem.End = info->DcacheMem.Start + info->DcacheMem.Size; - } else { - fprintf(stderr, "[agp] GART: dcache bind failed\n"); - drmAgpFree(ctx->drmFD, dcacheHandle); - info->dcacheHandle = dcacheHandle = DRM_AGP_NO_HANDLE; - } - } else { - fprintf(stderr, "[agp] GART: no dcache memory found\n"); - } - - drmAgpAlloc(ctx->drmFD, back_size, 0, NULL, &agpHandle); - info->backHandle = agpHandle; - - if (agpHandle != DRM_AGP_NO_HANDLE) { - if (drmAgpBind(ctx->drmFD, agpHandle, info->BackOffset) == 0) { - fprintf(stderr, "[agp] Bound backbuffer memory\n"); - - info->BackBuffer.Start = info->BackOffset; - info->BackBuffer.Size = back_size; - info->BackBuffer.End = (info->BackBuffer.Start + - info->BackBuffer.Size); - } else { - fprintf(stderr,"[agp] Unable to bind backbuffer. Disabling DRI.\n"); - return 0; - } - } else { - fprintf(stderr, "[dri] Unable to allocate backbuffer memory. Disabling DRI.\n"); - return 0; - } - - if (dcacheHandle == DRM_AGP_NO_HANDLE) { - drmAgpAlloc(ctx->drmFD, back_size, 0, NULL, &agpHandle); - - info->zHandle = agpHandle; - - if (agpHandle != DRM_AGP_NO_HANDLE) { - if (drmAgpBind(ctx->drmFD, agpHandle, info->DepthOffset) == 0) { - fprintf(stderr,"[agp] Bound depthbuffer memory\n"); - info->DepthBuffer.Start = info->DepthOffset; - info->DepthBuffer.Size = back_size; - info->DepthBuffer.End = (info->DepthBuffer.Start + - info->DepthBuffer.Size); - } else { - fprintf(stderr,"[agp] Unable to bind depthbuffer. Disabling DRI.\n"); - return 0; - } - } else { - fprintf(stderr,"[agp] Unable to allocate depthbuffer memory. Disabling DRI.\n"); - return 0; - } - } - - /* Now allocate and bind the agp space. This memory will include the - * regular framebuffer as well as texture memory. - */ - drmAgpAlloc(ctx->drmFD, sysmem_size, 0, NULL, &agpHandle); - info->sysmemHandle = agpHandle; - - if (agpHandle != DRM_AGP_NO_HANDLE) { - if (drmAgpBind(ctx->drmFD, agpHandle, 0) == 0) { - fprintf(stderr, "[agp] Bound System Texture Memory\n"); - } else { - fprintf(stderr, "[agp] Unable to bind system texture memory. Disabling DRI.\n"); - return 0; - } - } else { - fprintf(stderr, "[agp] Unable to allocate system texture memory. Disabling DRI.\n"); - return 0; - } - - info->auxPitch = i810_pitches[pitch_idx]; - info->auxPitchBits = i810_pitch_flags[pitch_idx]; - - return 1; -} - - -/** - * \brief Initialize the kernel data structures and enable the CP engine. - * - * \param ctx display handle. - * \param info driver private data. - * - * \return non-zero on success, or zero on failure. - * - * This function is a wrapper around the DRM_I810_CP_INIT command, passing - * all the parameters in a drmI810Init structure. - */ -static int I810DRIKernelInit( const DRIDriverContext *ctx, - I810Ptr info) -{ - int cpp = ctx->bpp / 8; - drmI810Init drmInfo; - int ret; - I810RingBuffer *ring = &(info->LpRing); - - /* This is the struct passed to the kernel module for its initialization */ - memset(&drmInfo, 0, sizeof(drmI810Init)); - - /* make sure we have at least 1.4 */ - drmInfo.func = I810_INIT_DMA_1_4; - - drmInfo.ring_start = ring->mem.Start; - drmInfo.ring_end = ring->mem.End; - drmInfo.ring_size = ring->mem.Size; - - drmInfo.mmio_offset = (unsigned int)info->regs; - drmInfo.buffers_offset = (unsigned int)info->buffer_map; - drmInfo.sarea_priv_offset = sizeof(drm_sarea_t); - - drmInfo.front_offset = 0; - drmInfo.back_offset = info->BackBuffer.Start; - drmInfo.depth_offset = info->DepthBuffer.Start; - - drmInfo.w = ctx->shared.virtualWidth; - drmInfo.h = ctx->shared.virtualHeight; - drmInfo.pitch = info->auxPitch; - drmInfo.pitch_bits = info->auxPitchBits; - - - ret = drmCommandWrite(ctx->drmFD, DRM_I810_INIT, &drmInfo, - sizeof(drmI810Init)); - - return ret >= 0; -} - - -/** - * \brief Add a map for the vertex buffers that will be accessed by any - * DRI-based clients. - * - * \param ctx display handle. - * \param info driver private data. - * - * \return one on success, or zero on failure. - * - * Calls drmAddBufs() with the previously allocated vertex buffers. - */ -static int I810DRIBufInit( const DRIDriverContext *ctx, I810Ptr info ) -{ - /* Initialize vertex buffers */ - info->bufNumBufs = drmAddBufs(ctx->drmFD, - I810_DMA_BUF_NR, - I810_DMA_BUF_SZ, - DRM_AGP_BUFFER, - info->BufferMem.Start); - - if (info->bufNumBufs <= 0) { - fprintf(stderr, - "[drm] Could not create vertex/indirect buffers list\n"); - return 0; - } - fprintf(stderr, - "[drm] Added %d %d byte vertex/indirect buffers\n", - info->bufNumBufs, I810_DMA_BUF_SZ); - - return 1; -} - -/** - * \brief Install an IRQ handler. - * - * \param ctx display handle. - * \param info driver private data. - * - * Attempts to install an IRQ handler via drmCtlInstHandler(), falling back to - * IRQ-free operation on failure. - */ -static void I810DRIIrqInit(const DRIDriverContext *ctx, - I810Ptr info) -{ - if (!info->irq) { - info->irq = drmGetInterruptFromBusID(ctx->drmFD, - ctx->pciBus, - ctx->pciDevice, - ctx->pciFunc); - - if ((drmCtlInstHandler(ctx->drmFD, info->irq)) != 0) { - fprintf(stderr, - "[drm] failure adding irq handler, " - "there is a device already using that irq\n" - "[drm] falling back to irq-free operation\n"); - info->irq = 0; - } - } - - if (info->irq) - fprintf(stderr, - "[drm] dma control initialized, using IRQ %d\n", - info->irq); -} - -static int I810CheckDRMVersion( const DRIDriverContext *ctx, - I810Ptr info ) -{ - drmVersionPtr version; - - version = drmGetVersion(ctx->drmFD); - if (version) { - int req_minor, req_patch; - - req_minor = 4; - req_patch = 0; - - i810_drm_version = (version->version_major<<16) | version->version_minor; - if (version->version_major != 1 || - version->version_minor < req_minor || - (version->version_minor == req_minor && - version->version_patchlevel < req_patch)) { - /* Incompatible drm version */ - fprintf(stderr, - "[dri] I810DRIScreenInit failed because of a version " - "mismatch.\n" - "[dri] i810.o kernel module version is %d.%d.%d " - "but version 1.%d.%d or newer is needed.\n" - "[dri] Disabling DRI.\n", - version->version_major, - version->version_minor, - version->version_patchlevel, - req_minor, - req_patch); - drmFreeVersion(version); - return 0; - } - - info->drmMinor = version->version_minor; - drmFreeVersion(version); - } - - return 1; -} - -static int I810MemoryInit( const DRIDriverContext *ctx, I810Ptr info ) -{ - int width_bytes = ctx->shared.virtualWidth * ctx->cpp; - int cpp = ctx->cpp; - int bufferSize = (ctx->shared.virtualHeight * width_bytes); - int depthSize = (((ctx->shared.virtualHeight+15) & ~15) * width_bytes); - int l; - - if (drmAddMap(ctx->drmFD, (drm_handle_t) info->BackBuffer.Start, - info->BackBuffer.Size, DRM_AGP, 0, - &info->backbuffer) < 0) { - fprintf(stderr, "[drm] drmAddMap(backbuffer) failed. Disabling DRI\n"); - return 0; - } - - if (drmAddMap(ctx->drmFD, (drm_handle_t) info->DepthBuffer.Start, - info->DepthBuffer.Size, DRM_AGP, 0, - &info->depthbuffer) < 0) { - fprintf(stderr, "[drm] drmAddMap(depthbuffer) failed. Disabling DRI.\n"); - return 0; - } - - if (!I810AllocLow(&(info->FrontBuffer), &(info->SysMem), (((ctx->shared.virtualHeight * width_bytes) + 4095) & ~4095))) - { - fprintf(stderr,"Framebuffer allocation failed\n"); - return 0; - } - else - fprintf(stderr,"Frame buffer at 0x%.8x (%luk, %lu bytes)\n", - info->FrontBuffer.Start, - info->FrontBuffer.Size / 1024, info->FrontBuffer.Size); - - memset(&(info->LpRing), 0, sizeof(I810RingBuffer)); - if (I810AllocLow(&(info->LpRing.mem), &(info->SysMem), 16 * 4096)) { - fprintf(stderr, - "Ring buffer at 0x%.8x (%luk, %lu bytes)\n", - info->LpRing.mem.Start, - info->LpRing.mem.Size / 1024, info->LpRing.mem.Size); - - info->LpRing.tail_mask = info->LpRing.mem.Size - 1; - info->LpRing.virtual_start = info->LpRing.mem.Start; - info->LpRing.head = 0; - info->LpRing.tail = 0; - info->LpRing.space = 0; - } else { - fprintf(stderr, "Ring buffer allocation failed\n"); - return (0); - } - - /* Allocate buffer memory */ - I810AllocHigh(&(info->BufferMem), &(info->SysMem), - I810_DMA_BUF_NR * I810_DMA_BUF_SZ); - - - fprintf(stderr, "[dri] Buffer map : %lx\n", - info->BufferMem.Start); - - if (info->BufferMem.Start == 0 || - info->BufferMem.End - info->BufferMem.Start > - I810_DMA_BUF_NR * I810_DMA_BUF_SZ) { - fprintf(stderr,"[dri] Not enough memory for dma buffers. Disabling DRI.\n"); - return 0; - } - - if (drmAddMap(ctx->drmFD, (drm_handle_t) info->BufferMem.Start, - info->BufferMem.Size, DRM_AGP, 0, &info->buffer_map) < 0) { - fprintf(stderr, "[drm] drmAddMap(buffer_map) failed. Disabling DRI.\n"); - return 0; - } - - if (drmAddMap(ctx->drmFD, (drm_handle_t) info->LpRing.mem.Start, - info->LpRing.mem.Size, DRM_AGP, 0, &info->ring_map) < 0) { - fprintf(stderr, "[drm] drmAddMap(ring_map) failed. Disabling DRI. \n"); - return 0; - } - - /* Front, back and depth buffers - everything else texture?? - */ - info->textureSize = info->SysMem.Size; - - if (info->textureSize < 0) - return 0; - - - l = I810MinBits((info->textureSize-1) / I810_NR_TEX_REGIONS); - if (l < I810_LOG_MIN_TEX_REGION_SIZE) l = I810_LOG_MIN_TEX_REGION_SIZE; - - /* Round the texture size up to the nearest whole number of - * texture regions. Again, be greedy about this, don't - * round down. - */ - info->logTextureGranularity = l; - info->textureSize = (info->textureSize >> l) << l; - - /* Set a minimum usable local texture heap size. This will fit - * two 256x256x32bpp textures. - */ - if (info->textureSize < 512 * 1024) { - info->textureOffset = 0; - info->textureSize = 0; - } - - I810AllocLow(&(info->TexMem), &(info->SysMem), info->textureSize); - - if (drmAddMap(ctx->drmFD, (drm_handle_t) info->TexMem.Start, - info->TexMem.Size, DRM_AGP, 0, &info->textures) < 0) { - fprintf(stderr, - "[drm] drmAddMap(textures) failed. Disabling DRI.\n"); - return 0; - } - - /* Reserve space for textures */ - fprintf(stderr, - "Will use back buffer at offset 0x%x\n", - info->BackOffset); - fprintf(stderr, - "Will use depth buffer at offset 0x%x\n", - info->DepthOffset); - fprintf(stderr, - "Will use %d kb for textures at offset 0x%x\n", - info->TexMem.Size/1024, info->TexMem.Start); - - return 1; -} - - - -/** - * Called at the start of each server generation. - * - * \param ctx display handle. - * \param info driver private data. - * - * \return non-zero on success, or zero on failure. - * - * Performs static frame buffer allocation. Opens the DRM device and add maps - * to the SAREA, framebuffer and MMIO regions. Fills in \p info with more - * information. Creates a \e server context to grab the lock for the - * initialization ioctls and calls the other initilization functions in this - * file. Starts the CP engine via the DRM_I810_CP_START command. - * - * Setups a I810DRIRec structure to be passed to i810_dri.so for its - * initialization. - */ -static int I810ScreenInit( DRIDriverContext *ctx, I810Ptr info ) -{ - I810DRIPtr pI810DRI; - int err; - - usleep(100); - /*assert(!ctx->IsClient);*/ - - /* from XFree86 driver */ - info->DepthOffset = 0x3000000; - info->BackOffset = 0x3800000; - { - int width_bytes = (ctx->shared.virtualWidth * ctx->cpp); - int maxy = ctx->shared.fbSize / width_bytes; - - - if (maxy <= ctx->shared.virtualHeight * 3) { - fprintf(stderr, - "Static buffer allocation failed -- " - "need at least %d kB video memory (have %d kB)\n", - (ctx->shared.virtualWidth * ctx->shared.virtualHeight * - ctx->cpp * 3 + 1023) / 1024, - ctx->shared.fbSize / 1024); - return 0; - } - } - - - info->regsSize = ctx->MMIOSize; - ctx->shared.SAREASize = 0x2000; - - /* Note that drmOpen will try to load the kernel module, if needed. */ - ctx->drmFD = drmOpen("i810", NULL ); - if (ctx->drmFD < 0) { - fprintf(stderr, "[drm] drmOpen failed\n"); - return 0; - } - - if ((err = drmSetBusid(ctx->drmFD, ctx->pciBusID)) < 0) { - fprintf(stderr, "[drm] drmSetBusid failed (%d, %s), %s\n", - ctx->drmFD, ctx->pciBusID, strerror(-err)); - return 0; - } - - if (drmAddMap( ctx->drmFD, - 0, - ctx->shared.SAREASize, - DRM_SHM, - DRM_CONTAINS_LOCK, - &ctx->shared.hSAREA) < 0) - { - fprintf(stderr, "[drm] drmAddMap failed\n"); - return 0; - } - fprintf(stderr, "[drm] added %d byte SAREA at 0x%08lx\n", - ctx->shared.SAREASize, ctx->shared.hSAREA); - - if (drmMap( ctx->drmFD, - ctx->shared.hSAREA, - ctx->shared.SAREASize, - (drmAddressPtr)(&ctx->pSAREA)) < 0) - { - fprintf(stderr, "[drm] drmMap failed\n"); - return 0; - } - memset(ctx->pSAREA, 0, ctx->shared.SAREASize); - fprintf(stderr, "[drm] mapped SAREA 0x%08lx to %p, size %d\n", - ctx->shared.hSAREA, ctx->pSAREA, ctx->shared.SAREASize); - - if (drmAddMap(ctx->drmFD, - ctx->MMIOStart, - ctx->MMIOSize, - DRM_REGISTERS, - DRM_READ_ONLY, - &info->regs) < 0) { - fprintf(stderr, "[drm] drmAddMap mmio failed\n"); - return 0; - } - fprintf(stderr, - "[drm] register handle = 0x%08x\n", info->regs); - - I810DRIAgpPreInit(ctx, info); - /* Need to AddMap the framebuffer and mmio regions here: - */ - if (drmAddMap( ctx->drmFD, - (drm_handle_t)ctx->FBStart, - ctx->FBSize, - DRM_FRAME_BUFFER, -#ifndef _EMBEDDED - 0, -#else - DRM_READ_ONLY, -#endif - &ctx->shared.hFrameBuffer) < 0) - { - fprintf(stderr, "[drm] drmAddMap framebuffer failed\n"); - return 0; - } - - fprintf(stderr, "[drm] framebuffer handle = 0x%08lx\n", - ctx->shared.hFrameBuffer); - - /* Check the i810 DRM version */ - if (!I810CheckDRMVersion(ctx, info)) { - return 0; - } - - /* Initialize AGP */ - if (!I810DRIAgpInit(ctx, info)) { - return 0; - } - - - /* Memory manager setup */ - if (!I810MemoryInit(ctx, info)) { - return 0; - } - - /* Initialize the SAREA private data structure */ - { - I810SAREAPtr pSAREAPriv; - pSAREAPriv = (I810SAREAPtr)(((char*)ctx->pSAREA) + - sizeof(drm_sarea_t)); - memset(pSAREAPriv, 0, sizeof(*pSAREAPriv)); - // pSAREAPriv->pf_enabled=1; - } - - - /* Create a 'server' context so we can grab the lock for - * initialization ioctls. - */ - if ((err = drmCreateContext(ctx->drmFD, &ctx->serverContext)) != 0) { - fprintf(stderr, "%s: drmCreateContext failed %d\n", __FUNCTION__, err); - return 0; - } - - DRM_LOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext, 0); - - /* Initialize the vertex buffers list */ - if (!I810DRIBufInit(ctx, info)) { - fprintf(stderr, "I810DRIBufInit failed\n"); - DRM_UNLOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext); - return 0; - } - - /* Initialize the kernel data structures */ - if (!I810DRIKernelInit(ctx, info)) { - fprintf(stderr, "I810DRIKernelInit failed\n"); - DRM_UNLOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext); - return 0; - } - - /* Initialize IRQ */ - I810DRIIrqInit(ctx, info); - - /* Quick hack to clear the front & back buffers. Could also use - * the clear ioctl to do this, but would need to setup hw state - * first. - */ -#if 0 - memset((char *)ctx->FBAddress, - 0, - info->auxPitch * ctx->cpp * ctx->shared.virtualHeight ); - - memset((char *)info->backbuffer, - 0, - info->auxPitch * ctx->cpp * ctx->shared.virtualHeight ); -#endif - - /* This is the struct passed to i810_dri.so for its initialization */ - ctx->driverClientMsg = malloc(sizeof(I810DRIRec)); - ctx->driverClientMsgSize = sizeof(I810DRIRec); - pI810DRI = (I810DRIPtr)ctx->driverClientMsg; - - pI810DRI->regs = info->regs; - pI810DRI->regsSize = info->regsSize; - // regsMap is unused - - pI810DRI->backbufferSize = info->BackBuffer.Size; - pI810DRI->backbuffer = info->backbuffer; - - pI810DRI->depthbufferSize = info->DepthBuffer.Size; - pI810DRI->depthbuffer = info->depthbuffer; - - pI810DRI->textures = info->textures; - pI810DRI->textureSize = info->textureSize; - - pI810DRI->agp_buffers = info->buffer_map; - pI810DRI->agp_buf_size = info->BufferMem.Size; - - pI810DRI->deviceID = info->Chipset; - pI810DRI->width = ctx->shared.virtualWidth; - pI810DRI->height = ctx->shared.virtualHeight; - pI810DRI->mem = ctx->shared.fbSize; - pI810DRI->cpp = ctx->bpp / 8; - pI810DRI->bitsPerPixel = ctx->bpp; - pI810DRI->fbOffset = info->FrontBuffer.Start; - pI810DRI->fbStride = info->auxPitch; - - pI810DRI->backOffset = info->BackBuffer.Start; - pI810DRI->depthOffset = info->DepthBuffer.Start; - - pI810DRI->auxPitch = info->auxPitch; - pI810DRI->auxPitchBits = info->auxPitchBits; - - pI810DRI->logTextureGranularity = info->logTextureGranularity; - pI810DRI->textureOffset = info->TexMem.Start; - - pI810DRI->ringOffset = info->LpRing.mem.Start; - pI810DRI->ringSize = info->LpRing.mem.Size; - - // drmBufs looks unused - pI810DRI->irq = info->irq; - pI810DRI->sarea_priv_offset = sizeof(drm_sarea_t); - - /* Don't release the lock now - let the VT switch handler do it. */ - return 1; -} - - -/** - * \brief Validate the fbdev mode. - * - * \param ctx display handle. - * - * \return one on success, or zero on failure. - * - * Saves some registers and returns 1. - * - * \sa i810ValidateMode(). - */ -static int i810ValidateMode( const DRIDriverContext *ctx ) -{ - unsigned char *I810MMIO = ctx->MMIOAddress; - I810Ptr info = ctx->driverPrivate; - - return 1; -} - - -/** - * \brief Examine mode returned by fbdev. - * - * \param ctx display handle. - * - * \return one on success, or zero on failure. - * - * Restores registers that fbdev has clobbered and returns 1. - * - * \sa i810ValidateMode(). - */ -static int i810PostValidateMode( const DRIDriverContext *ctx ) -{ - unsigned char *I810MMIO = ctx->MMIOAddress; - I810Ptr info = ctx->driverPrivate; - - return 1; -} - - -/** - * \brief Initialize the framebuffer device mode - * - * \param ctx display handle. - * - * \return one on success, or zero on failure. - * - * Fills in \p info with some default values and some information from \p ctx - * and then calls I810ScreenInit() for the screen initialization. - * - * Before exiting clears the framebuffer memory accessing it directly. - */ -static int i810InitFBDev( DRIDriverContext *ctx ) -{ - I810Ptr info = calloc(1, sizeof(*info)); - - { - int dummy = ctx->shared.virtualWidth; - - switch (ctx->bpp / 8) { - case 1: dummy = (ctx->shared.virtualWidth + 127) & ~127; break; - case 2: dummy = (ctx->shared.virtualWidth + 31) & ~31; break; - case 3: - case 4: dummy = (ctx->shared.virtualWidth + 15) & ~15; break; - } - - ctx->shared.virtualWidth = dummy; - } - - ctx->driverPrivate = (void *)info; - - info->Chipset = ctx->chipset; - - if (!I810ScreenInit( ctx, info )) - return 0; - - - return 1; -} - - -/** - * \brief The screen is being closed, so clean up any state and free any - * resources used by the DRI. - * - * \param ctx display handle. - * - * Unmaps the SAREA, closes the DRM device file descriptor and frees the driver - * private data. - */ -static void i810HaltFBDev( DRIDriverContext *ctx ) -{ - drmUnmap( ctx->pSAREA, ctx->shared.SAREASize ); - drmClose(ctx->drmFD); - - if (ctx->driverPrivate) { - free(ctx->driverPrivate); - ctx->driverPrivate = 0; - } -} - - -extern void i810NotifyFocus( int ); - -/** - * \brief Exported driver interface for Mini GLX. - * - * \sa DRIDriverRec. - */ -const struct DRIDriverRec __driDriver = { - i810ValidateMode, - i810PostValidateMode, - i810InitFBDev, - i810HaltFBDev, - I810EngineShutdown, - I810EngineRestore, -#ifndef _EMBEDDED - 0, -#else - i810NotifyFocus, -#endif -}; diff --git a/src/mesa/drivers/dri/i915/Makefile b/src/mesa/drivers/dri/i915/Makefile index dc15ae425c..5b49d0c77c 100644 --- a/src/mesa/drivers/dri/i915/Makefile +++ b/src/mesa/drivers/dri/i915/Makefile @@ -4,8 +4,6 @@ include $(TOP)/configs/current LIBNAME = i915_dri.so -MINIGLX_SOURCES = server/intel_dri.c - DRIVER_SOURCES = \ i830_context.c \ i830_state.c \ diff --git a/src/mesa/drivers/dri/i915/server/intel_dri.c b/src/mesa/drivers/dri/i915/server/intel_dri.c deleted file mode 120000 index effdd26448..0000000000 --- a/src/mesa/drivers/dri/i915/server/intel_dri.c +++ /dev/null @@ -1 +0,0 @@ -../../intel/server/intel_dri.c
\ No newline at end of file diff --git a/src/mesa/drivers/dri/i965/Makefile b/src/mesa/drivers/dri/i965/Makefile index f98a1a27db..a242580273 100644 --- a/src/mesa/drivers/dri/i965/Makefile +++ b/src/mesa/drivers/dri/i965/Makefile @@ -99,7 +99,6 @@ DRIVER_SOURCES = \ C_SOURCES = \ $(COMMON_SOURCES) \ - $(MINIGLX_SOURCES) \ $(DRIVER_SOURCES) ASM_SOURCES = diff --git a/src/mesa/drivers/dri/i965/server/intel_dri.c b/src/mesa/drivers/dri/i965/server/intel_dri.c deleted file mode 120000 index effdd26448..0000000000 --- a/src/mesa/drivers/dri/i965/server/intel_dri.c +++ /dev/null @@ -1 +0,0 @@ -../../intel/server/intel_dri.c
\ No newline at end of file diff --git a/src/mesa/drivers/dri/intel/server/intel_dri.c b/src/mesa/drivers/dri/intel/server/intel_dri.c deleted file mode 100644 index e49c4214ad..0000000000 --- a/src/mesa/drivers/dri/intel/server/intel_dri.c +++ /dev/null @@ -1,1306 +0,0 @@ -/** - * \file server/intel_dri.c - * \brief File to perform the device-specific initialization tasks typically - * done in the X server. - * - * Here they are converted to run in the client (or perhaps a standalone - * process), and to work with the frame buffer device rather than the X - * server infrastructure. - * - * Copyright (C) 2006 Dave Airlie (airlied@linux.ie) - - Permission is hereby granted, free of charge, to any person obtaining a - copy of this software and associated documentation files (the - "Software"), to deal in the Software without restriction, including - without limitation the rights to use, copy, modify, merge, publish, - distribute, sub license, and/or sell copies of the Software, and to - permit persons to whom the Software is furnished to do so, subject to - the following conditions: - - The above copyright notice and this permission notice (including the - next paragraph) shall be included in all copies or substantial portions - of the Software. - - THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - IN NO EVENT SHALL THE COPYRIGHT HOLDERS AND/OR THEIR SUPPLIERS BE LIABLE FOR - ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE - SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ - -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <errno.h> -#include <unistd.h> - -#include "driver.h" -#include "drm.h" - -#include "intel.h" -#include "i830_dri.h" - -#include "memops.h" -#include "pciaccess.h" - -static size_t drm_page_size; -static int nextTile = 0; -#define xf86DrvMsg(...) do {} while(0) - -static const int pitches[] = { - 128 * 8, - 128 * 16, - 128 * 32, - 128 * 64, - 0 -}; - -static Bool I830DRIDoMappings(DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea); - -static unsigned long -GetBestTileAlignment(unsigned long size) -{ - unsigned long i; - - for (i = KB(512); i < size; i <<= 1) - ; - - if (i > MB(64)) - i = MB(64); - - return i; -} - -static void SetFenceRegs(const DRIDriverContext *ctx, I830Rec *pI830) -{ - int i; - unsigned char *MMIO = ctx->MMIOAddress; - - for (i = 0; i < 8; i++) { - OUTREG(FENCE + i * 4, pI830->Fence[i]); - // if (I810_DEBUG & DEBUG_VERBOSE_VGA) - fprintf(stderr,"Fence Register : %x\n", pI830->Fence[i]); - } -} - -/* Tiled memory is good... really, really good... - * - * Need to make it less likely that we miss out on this - probably - * need to move the frontbuffer away from the 'guarenteed' alignment - * of the first memory segment, or perhaps allocate a discontigous - * framebuffer to get more alignment 'sweet spots'. - */ -static void -SetFence(const DRIDriverContext *ctx, I830Rec *pI830, - int nr, unsigned int start, unsigned int pitch, - unsigned int size) -{ - unsigned int val; - unsigned int fence_mask = 0; - unsigned int fence_pitch; - - if (nr < 0 || nr > 7) { - fprintf(stderr, - "SetFence: fence %d out of range\n",nr); - return; - } - - pI830->Fence[nr] = 0; - - if (IS_I9XX(pI830)) - fence_mask = ~I915G_FENCE_START_MASK; - else - fence_mask = ~I830_FENCE_START_MASK; - - if (start & fence_mask) { - fprintf(stderr, - "SetFence: %d: start (0x%08x) is not %s aligned\n", - nr, start, (IS_I9XX(pI830)) ? "1MB" : "512k"); - return; - } - - if (start % size) { - fprintf(stderr, - "SetFence: %d: start (0x%08x) is not size (%dk) aligned\n", - nr, start, size / 1024); - return; - } - - if (pitch & 127) { - fprintf(stderr, - "SetFence: %d: pitch (%d) not a multiple of 128 bytes\n", - nr, pitch); - return; - } - - val = (start | FENCE_X_MAJOR | FENCE_VALID); - - if (IS_I9XX(pI830)) { - switch (size) { - case MB(1): - val |= I915G_FENCE_SIZE_1M; - break; - case MB(2): - val |= I915G_FENCE_SIZE_2M; - break; - case MB(4): - val |= I915G_FENCE_SIZE_4M; - break; - case MB(8): - val |= I915G_FENCE_SIZE_8M; - break; - case MB(16): - val |= I915G_FENCE_SIZE_16M; - break; - case MB(32): - val |= I915G_FENCE_SIZE_32M; - break; - case MB(64): - val |= I915G_FENCE_SIZE_64M; - break; - default: - fprintf(stderr, - "SetFence: %d: illegal size (%d kByte)\n", nr, size / 1024); - return; - } - } else { - switch (size) { - case KB(512): - val |= FENCE_SIZE_512K; - break; - case MB(1): - val |= FENCE_SIZE_1M; - break; - case MB(2): - val |= FENCE_SIZE_2M; - break; - case MB(4): - val |= FENCE_SIZE_4M; - break; - case MB(8): - val |= FENCE_SIZE_8M; - break; - case MB(16): - val |= FENCE_SIZE_16M; - break; - case MB(32): - val |= FENCE_SIZE_32M; - break; - case MB(64): - val |= FENCE_SIZE_64M; - break; - default: - fprintf(stderr, - "SetFence: %d: illegal size (%d kByte)\n", nr, size / 1024); - return; - } - } - - if (IS_I9XX(pI830)) - fence_pitch = pitch / 512; - else - fence_pitch = pitch / 128; - - switch (fence_pitch) { - case 1: - val |= FENCE_PITCH_1; - break; - case 2: - val |= FENCE_PITCH_2; - break; - case 4: - val |= FENCE_PITCH_4; - break; - case 8: - val |= FENCE_PITCH_8; - break; - case 16: - val |= FENCE_PITCH_16; - break; - case 32: - val |= FENCE_PITCH_32; - break; - case 64: - val |= FENCE_PITCH_64; - break; - default: - fprintf(stderr, - "SetFence: %d: illegal pitch (%d)\n", nr, pitch); - return; - } - - pI830->Fence[nr] = val; -} - -static Bool -MakeTiles(const DRIDriverContext *ctx, I830Rec *pI830, I830MemRange *pMem) -{ - int pitch, ntiles, i; - - pitch = pMem->Pitch * ctx->cpp; - /* - * Simply try to break the region up into at most four pieces of size - * equal to the alignment. - */ - ntiles = ROUND_TO(pMem->Size, pMem->Alignment) / pMem->Alignment; - if (ntiles >= 4) { - return FALSE; - } - - for (i = 0; i < ntiles; i++, nextTile++) { - SetFence(ctx, pI830, nextTile, pMem->Start + i * pMem->Alignment, - pitch, pMem->Alignment); - } - return TRUE; -} - -static void I830SetupMemoryTiling(const DRIDriverContext *ctx, I830Rec *pI830) -{ - int i; - - /* Clear out */ - for (i = 0; i < 8; i++) - pI830->Fence[i] = 0; - - nextTile = 0; - - if (pI830->BackBuffer.Alignment >= KB(512)) { - if (MakeTiles(ctx, pI830, &(pI830->BackBuffer))) { - fprintf(stderr, - "Activating tiled memory for the back buffer.\n"); - } else { - fprintf(stderr, - "MakeTiles failed for the back buffer.\n"); - pI830->allowPageFlip = FALSE; - } - } - - if (pI830->DepthBuffer.Alignment >= KB(512)) { - if (MakeTiles(ctx, pI830, &(pI830->DepthBuffer))) { - fprintf(stderr, - "Activating tiled memory for the depth buffer.\n"); - } else { - fprintf(stderr, - "MakeTiles failed for the depth buffer.\n"); - } - } - - return; -} - -static int I830DetectMemory(const DRIDriverContext *ctx, I830Rec *pI830) -{ - struct pci_device host_bridge, ig_dev; - uint32_t gmch_ctrl; - int memsize = 0; - int range; - uint32_t aper_size; - uint32_t membase2 = 0; - - memset(&host_bridge, 0, sizeof(host_bridge)); - memset(&ig_dev, 0, sizeof(ig_dev)); - - ig_dev.dev = 2; - - pci_device_cfg_read_u32(&host_bridge, &gmch_ctrl, I830_GMCH_CTRL); - - if (IS_I830(pI830) || IS_845G(pI830)) { - if ((gmch_ctrl & I830_GMCH_MEM_MASK) == I830_GMCH_MEM_128M) { - aper_size = 0x80000000; - } else { - aper_size = 0x40000000; - } - } else { - if (IS_I9XX(pI830)) { - int ret; - ret = pci_device_cfg_read_u32(&ig_dev, &membase2, 0x18); - if (membase2 & 0x08000000) - aper_size = 0x8000000; - else - aper_size = 0x10000000; - - fprintf(stderr,"aper size is %08X %08x %d\n", aper_size, membase2, ret); - } else - aper_size = 0x8000000; - } - - pI830->aper_size = aper_size; - - - /* We need to reduce the stolen size, by the GTT and the popup. - * The GTT varying according the the FbMapSize and the popup is 4KB */ - range = (ctx->shared.fbSize / (1024*1024)) + 4; - - if (IS_I85X(pI830) || IS_I865G(pI830) || IS_I9XX(pI830)) { - switch (gmch_ctrl & I830_GMCH_GMS_MASK) { - case I855_GMCH_GMS_STOLEN_1M: - memsize = MB(1) - KB(range); - break; - case I855_GMCH_GMS_STOLEN_4M: - memsize = MB(4) - KB(range); - break; - case I855_GMCH_GMS_STOLEN_8M: - memsize = MB(8) - KB(range); - break; - case I855_GMCH_GMS_STOLEN_16M: - memsize = MB(16) - KB(range); - break; - case I855_GMCH_GMS_STOLEN_32M: - memsize = MB(32) - KB(range); - break; - case I915G_GMCH_GMS_STOLEN_48M: - if (IS_I9XX(pI830)) - memsize = MB(48) - KB(range); - break; - case I915G_GMCH_GMS_STOLEN_64M: - if (IS_I9XX(pI830)) - memsize = MB(64) - KB(range); - break; - } - } else { - switch (gmch_ctrl & I830_GMCH_GMS_MASK) { - case I830_GMCH_GMS_STOLEN_512: - memsize = KB(512) - KB(range); - break; - case I830_GMCH_GMS_STOLEN_1024: - memsize = MB(1) - KB(range); - break; - case I830_GMCH_GMS_STOLEN_8192: - memsize = MB(8) - KB(range); - break; - case I830_GMCH_GMS_LOCAL: - memsize = 0; - xf86DrvMsg(pScrn->scrnIndex, X_WARNING, - "Local memory found, but won't be used.\n"); - break; - } - } - if (memsize > 0) { - fprintf(stderr, - "detected %d kB stolen memory.\n", memsize / 1024); - } else { - fprintf(stderr, - "no video memory detected.\n"); - } - return memsize; -} - -static int AgpInit(const DRIDriverContext *ctx, I830Rec *info) -{ - unsigned long mode = 0x4; - - if (drmAgpAcquire(ctx->drmFD) < 0) { - fprintf(stderr, "[gart] AGP not available\n"); - return 0; - } - - if (drmAgpEnable(ctx->drmFD, mode) < 0) { - fprintf(stderr, "[gart] AGP not enabled\n"); - drmAgpRelease(ctx->drmFD); - return 0; - } - else - fprintf(stderr, "[gart] AGP enabled at %dx\n", ctx->agpmode); - - return 1; -} - -/* - * Allocate memory from the given pool. Grow the pool if needed and if - * possible. - */ -static unsigned long -AllocFromPool(const DRIDriverContext *ctx, I830Rec *pI830, - I830MemRange *result, I830MemPool *pool, - long size, unsigned long alignment, int flags) -{ - long needed, start, end; - - if (!result || !pool || !size) - return 0; - - /* Calculate how much space is needed. */ - if (alignment <= GTT_PAGE_SIZE) - needed = size; - else { - start = ROUND_TO(pool->Free.Start, alignment); - end = ROUND_TO(start + size, alignment); - needed = end - pool->Free.Start; - } - if (needed > pool->Free.Size) { - return 0; - } - - result->Start = ROUND_TO(pool->Free.Start, alignment); - pool->Free.Start += needed; - result->End = pool->Free.Start; - - pool->Free.Size = pool->Free.End - pool->Free.Start; - result->Size = result->End - result->Start; - result->Pool = pool; - result->Alignment = alignment; - return needed; -} - -static unsigned long AllocFromAGP(const DRIDriverContext *ctx, I830Rec *pI830, long size, unsigned long alignment, I830MemRange *result) -{ - unsigned long start, end; - unsigned long newApStart, newApEnd; - int ret; - if (!result || !size) - return 0; - - if (!alignment) - alignment = 4; - - start = ROUND_TO(pI830->MemoryAperture.Start, alignment); - end = ROUND_TO(start + size, alignment); - newApStart = end; - newApEnd = pI830->MemoryAperture.End; - - ret=drmAgpAlloc(ctx->drmFD, size, 0, &(result->Physical), (drm_handle_t *)&(result->Key)); - - if (ret) - { - fprintf(stderr,"drmAgpAlloc failed %d\n", ret); - return 0; - } - pI830->allocatedMemory += size; - pI830->MemoryAperture.Start = newApStart; - pI830->MemoryAperture.End = newApEnd; - pI830->MemoryAperture.Size = newApEnd - newApStart; - // pI830->FreeMemory -= size; - result->Start = start; - result->End = start + size; - result->Size = size; - result->Offset = start; - result->Alignment = alignment; - result->Pool = NULL; - - return size; -} - -unsigned long -I830AllocVidMem(const DRIDriverContext *ctx, I830Rec *pI830, - I830MemRange *result, I830MemPool *pool, long size, - unsigned long alignment, int flags) -{ - unsigned long ret; - - if (!result) - return 0; - - /* Make sure these are initialised. */ - result->Size = 0; - result->Key = -1; - - if (!size) { - return 0; - } - - if (pool->Free.Size < size) { - ret = AllocFromAGP(ctx, pI830, size, alignment, result); - } - else { - ret = AllocFromPool(ctx, pI830, result, pool, size, alignment, flags); - if (ret == 0) - ret = AllocFromAGP(ctx, pI830, size, alignment, result); - } - return ret; -} - -static Bool BindAgpRange(const DRIDriverContext *ctx, I830MemRange *mem) -{ - if (!mem) - return FALSE; - - if (mem->Key == -1) - return TRUE; - - return !drmAgpBind(ctx->drmFD, mem->Key, mem->Offset); -} - -/* simple memory allocation routines needed */ -/* put ring buffer in low memory */ -/* need to allocate front, back, depth buffers aligned correctly, - allocate ring buffer, -*/ - -/* */ -static Bool -I830AllocateMemory(const DRIDriverContext *ctx, I830Rec *pI830) -{ - unsigned long size, ret; - unsigned long lines, lineSize, align; - - /* allocate ring buffer */ - memset(pI830->LpRing, 0, sizeof(I830RingBuffer)); - pI830->LpRing->mem.Key = -1; - - size = PRIMARY_RINGBUFFER_SIZE; - - ret = I830AllocVidMem(ctx, pI830, &pI830->LpRing->mem, &pI830->StolenPool, size, 0x1000, 0); - - if (ret != size) - { - fprintf(stderr,"unable to allocate ring buffer %ld\n", ret); - return FALSE; - } - - pI830->LpRing->tail_mask = pI830->LpRing->mem.Size - 1; - - - /* allocate front buffer */ - memset(&(pI830->FrontBuffer), 0, sizeof(pI830->FrontBuffer)); - pI830->FrontBuffer.Key = -1; - pI830->FrontBuffer.Pitch = ctx->shared.virtualWidth; - - align = KB(512); - - lineSize = ctx->shared.virtualWidth * ctx->cpp; - lines = (ctx->shared.virtualHeight + 15) / 16 * 16; - size = lineSize * lines; - size = ROUND_TO_PAGE(size); - - align = GetBestTileAlignment(size); - - ret = I830AllocVidMem(ctx, pI830, &pI830->FrontBuffer, &pI830->StolenPool, size, align, 0); - if (ret < size) - { - fprintf(stderr,"unable to allocate front buffer %ld\n", ret); - return FALSE; - } - - memset(&(pI830->BackBuffer), 0, sizeof(pI830->BackBuffer)); - pI830->BackBuffer.Key = -1; - pI830->BackBuffer.Pitch = ctx->shared.virtualWidth; - - ret = I830AllocVidMem(ctx, pI830, &pI830->BackBuffer, &pI830->StolenPool, size, align, 0); - if (ret < size) - { - fprintf(stderr,"unable to allocate back buffer %ld\n", ret); - return FALSE; - } - - memset(&(pI830->DepthBuffer), 0, sizeof(pI830->DepthBuffer)); - pI830->DepthBuffer.Key = -1; - pI830->DepthBuffer.Pitch = ctx->shared.virtualWidth; - - ret = I830AllocVidMem(ctx, pI830, &pI830->DepthBuffer, &pI830->StolenPool, size, align, 0); - if (ret < size) - { - fprintf(stderr,"unable to allocate depth buffer %ld\n", ret); - return FALSE; - } - - memset(&(pI830->ContextMem), 0, sizeof(pI830->ContextMem)); - pI830->ContextMem.Key = -1; - size = KB(32); - - ret = I830AllocVidMem(ctx, pI830, &pI830->ContextMem, &pI830->StolenPool, size, align, 0); - if (ret < size) - { - fprintf(stderr,"unable to allocate context buffer %ld\n", ret); - return FALSE; - } - -#if 0 - memset(&(pI830->TexMem), 0, sizeof(pI830->TexMem)); - pI830->TexMem.Key = -1; - - size = 32768 * 1024; - ret = AllocFromAGP(ctx, pI830, size, align, &pI830->TexMem); - if (ret < size) - { - fprintf(stderr,"unable to allocate texture memory %ld\n", ret); - return FALSE; - } -#endif - - return TRUE; -} - -static Bool -I830BindMemory(const DRIDriverContext *ctx, I830Rec *pI830) -{ - if (!BindAgpRange(ctx, &pI830->LpRing->mem)) - return FALSE; - if (!BindAgpRange(ctx, &pI830->FrontBuffer)) - return FALSE; - if (!BindAgpRange(ctx, &pI830->BackBuffer)) - return FALSE; - if (!BindAgpRange(ctx, &pI830->DepthBuffer)) - return FALSE; - if (!BindAgpRange(ctx, &pI830->ContextMem)) - return FALSE; -#if 0 - if (!BindAgpRange(ctx, &pI830->TexMem)) - return FALSE; -#endif - return TRUE; -} - -static void SetupDRIMM(const DRIDriverContext *ctx, I830Rec *pI830) -{ - unsigned long aperEnd = ROUND_DOWN_TO(pI830->aper_size, GTT_PAGE_SIZE) / GTT_PAGE_SIZE; - unsigned long aperStart = ROUND_TO(pI830->aper_size - KB(32768), GTT_PAGE_SIZE) / GTT_PAGE_SIZE; - - fprintf(stderr, "aper size is %08X\n", ctx->shared.fbSize); - if (drmMMInit(ctx->drmFD, aperStart, aperEnd - aperStart, DRM_BO_MEM_TT)) { - fprintf(stderr, - "DRM MM Initialization Failed\n"); - } else { - fprintf(stderr, - "DRM MM Initialized at offset 0x%lx length %d page\n", aperStart, aperEnd-aperStart); - } - -} - -static Bool -I830CleanupDma(const DRIDriverContext *ctx) -{ - drmI830Init info; - - memset(&info, 0, sizeof(drmI830Init)); - info.func = I830_CLEANUP_DMA; - - if (drmCommandWrite(ctx->drmFD, DRM_I830_INIT, - &info, sizeof(drmI830Init))) { - fprintf(stderr, "I830 Dma Cleanup Failed\n"); - return FALSE; - } - - return TRUE; -} - -static Bool -I830InitDma(const DRIDriverContext *ctx, I830Rec *pI830) -{ - I830RingBuffer *ring = pI830->LpRing; - drmI830Init info; - - memset(&info, 0, sizeof(drmI830Init)); - info.func = I830_INIT_DMA; - - info.ring_start = ring->mem.Start + pI830->LinearAddr; - info.ring_end = ring->mem.End + pI830->LinearAddr; - info.ring_size = ring->mem.Size; - - info.mmio_offset = (unsigned int)ctx->MMIOStart; - - info.sarea_priv_offset = sizeof(drm_sarea_t); - - info.front_offset = pI830->FrontBuffer.Start; - info.back_offset = pI830->BackBuffer.Start; - info.depth_offset = pI830->DepthBuffer.Start; - info.w = ctx->shared.virtualWidth; - info.h = ctx->shared.virtualHeight; - info.pitch = ctx->shared.virtualWidth; - info.back_pitch = pI830->BackBuffer.Pitch; - info.depth_pitch = pI830->DepthBuffer.Pitch; - info.cpp = ctx->cpp; - - if (drmCommandWrite(ctx->drmFD, DRM_I830_INIT, - &info, sizeof(drmI830Init))) { - fprintf(stderr, - "I830 Dma Initialization Failed\n"); - return FALSE; - } - - return TRUE; -} - -static int I830CheckDRMVersion( const DRIDriverContext *ctx, - I830Rec *pI830 ) -{ - drmVersionPtr version; - - version = drmGetVersion(ctx->drmFD); - - if (version) { - int req_minor, req_patch; - - req_minor = 4; - req_patch = 0; - - if (version->version_major != 1 || - version->version_minor < req_minor || - (version->version_minor == req_minor && - version->version_patchlevel < req_patch)) { - /* Incompatible drm version */ - fprintf(stderr, - "[dri] I830DRIScreenInit failed because of a version " - "mismatch.\n" - "[dri] i915.o kernel module version is %d.%d.%d " - "but version 1.%d.%d or newer is needed.\n" - "[dri] Disabling DRI.\n", - version->version_major, - version->version_minor, - version->version_patchlevel, - req_minor, - req_patch); - drmFreeVersion(version); - return 0; - } - - pI830->drmMinor = version->version_minor; - drmFreeVersion(version); - } - return 1; -} - -static void -I830SetRingRegs(const DRIDriverContext *ctx, I830Rec *pI830) -{ - unsigned int itemp; - unsigned char *MMIO = ctx->MMIOAddress; - - OUTREG(LP_RING + RING_LEN, 0); - OUTREG(LP_RING + RING_TAIL, 0); - OUTREG(LP_RING + RING_HEAD, 0); - - if ((long)(pI830->LpRing->mem.Start & I830_RING_START_MASK) != - pI830->LpRing->mem.Start) { - fprintf(stderr, - "I830SetRingRegs: Ring buffer start (%lx) violates its " - "mask (%x)\n", pI830->LpRing->mem.Start, I830_RING_START_MASK); - } - /* Don't care about the old value. Reserved bits must be zero anyway. */ - itemp = pI830->LpRing->mem.Start & I830_RING_START_MASK; - OUTREG(LP_RING + RING_START, itemp); - - if (((pI830->LpRing->mem.Size - 4096) & I830_RING_NR_PAGES) != - pI830->LpRing->mem.Size - 4096) { - fprintf(stderr, - "I830SetRingRegs: Ring buffer size - 4096 (%lx) violates its " - "mask (%x)\n", pI830->LpRing->mem.Size - 4096, - I830_RING_NR_PAGES); - } - /* Don't care about the old value. Reserved bits must be zero anyway. */ - itemp = (pI830->LpRing->mem.Size - 4096) & I830_RING_NR_PAGES; - itemp |= (RING_NO_REPORT | RING_VALID); - OUTREG(LP_RING + RING_LEN, itemp); - - pI830->LpRing->head = INREG(LP_RING + RING_HEAD) & I830_HEAD_MASK; - pI830->LpRing->tail = INREG(LP_RING + RING_TAIL); - pI830->LpRing->space = pI830->LpRing->head - (pI830->LpRing->tail + 8); - if (pI830->LpRing->space < 0) - pI830->LpRing->space += pI830->LpRing->mem.Size; - - SetFenceRegs(ctx, pI830); - - /* RESET THE DISPLAY PIPE TO POINT TO THE FRONTBUFFER - hacky - hacky hacky */ - OUTREG(DSPABASE, pI830->FrontBuffer.Start + pI830->LinearAddr); - -} - -static Bool -I830SetParam(const DRIDriverContext *ctx, int param, int value) -{ - drmI830SetParam sp; - - memset(&sp, 0, sizeof(sp)); - sp.param = param; - sp.value = value; - - if (drmCommandWrite(ctx->drmFD, DRM_I830_SETPARAM, &sp, sizeof(sp))) { - fprintf(stderr, "I830 SetParam Failed\n"); - return FALSE; - } - - return TRUE; -} - -static Bool -I830DRIMapScreenRegions(DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea) -{ - fprintf(stderr, - "[drm] Mapping front buffer\n"); - - if (drmAddMap(ctx->drmFD, - (drm_handle_t)(sarea->front_offset + pI830->LinearAddr), - sarea->front_size, - DRM_FRAME_BUFFER, /*DRM_AGP,*/ - 0, - &sarea->front_handle) < 0) { - fprintf(stderr, - "[drm] drmAddMap(front_handle) failed. Disabling DRI\n"); - return FALSE; - } - ctx->shared.hFrameBuffer = sarea->front_handle; - ctx->shared.fbSize = sarea->front_size; - fprintf(stderr, "[drm] Front Buffer = 0x%08x\n", - sarea->front_handle); - - if (drmAddMap(ctx->drmFD, - (drm_handle_t)(sarea->back_offset), - sarea->back_size, DRM_AGP, 0, - &sarea->back_handle) < 0) { - fprintf(stderr, - "[drm] drmAddMap(back_handle) failed. Disabling DRI\n"); - return FALSE; - } - fprintf(stderr, "[drm] Back Buffer = 0x%08x\n", - sarea->back_handle); - - if (drmAddMap(ctx->drmFD, - (drm_handle_t)sarea->depth_offset, - sarea->depth_size, DRM_AGP, 0, - &sarea->depth_handle) < 0) { - fprintf(stderr, - "[drm] drmAddMap(depth_handle) failed. Disabling DRI\n"); - return FALSE; - } - fprintf(stderr, "[drm] Depth Buffer = 0x%08x\n", - sarea->depth_handle); - -#if 0 - if (drmAddMap(ctx->drmFD, - (drm_handle_t)sarea->tex_offset, - sarea->tex_size, DRM_AGP, 0, - &sarea->tex_handle) < 0) { - fprintf(stderr, - "[drm] drmAddMap(tex_handle) failed. Disabling DRI\n"); - return FALSE; - } - fprintf(stderr, "[drm] textures = 0x%08x\n", - sarea->tex_handle); -#endif - return TRUE; -} - - -static void -I830DRIUnmapScreenRegions(const DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea) -{ -#if 1 - if (sarea->front_handle) { - drmRmMap(ctx->drmFD, sarea->front_handle); - sarea->front_handle = 0; - } -#endif - if (sarea->back_handle) { - drmRmMap(ctx->drmFD, sarea->back_handle); - sarea->back_handle = 0; - } - if (sarea->depth_handle) { - drmRmMap(ctx->drmFD, sarea->depth_handle); - sarea->depth_handle = 0; - } - if (sarea->tex_handle) { - drmRmMap(ctx->drmFD, sarea->tex_handle); - sarea->tex_handle = 0; - } -} - -static Bool -I830DRIDoMappings(DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea) -{ - if (drmAddMap(ctx->drmFD, - (drm_handle_t)pI830->LpRing->mem.Start, - pI830->LpRing->mem.Size, DRM_AGP, 0, - &pI830->ring_map) < 0) { - fprintf(stderr, - "[drm] drmAddMap(ring_map) failed. Disabling DRI\n"); - return FALSE; - } - fprintf(stderr, "[drm] ring buffer = 0x%08x\n", - pI830->ring_map); - - if (I830InitDma(ctx, pI830) == FALSE) { - return FALSE; - } - - /* init to zero to be safe */ - - I830DRIMapScreenRegions(ctx, pI830, sarea); - SetupDRIMM(ctx, pI830); - - if (ctx->pciDevice != PCI_CHIP_845_G && - ctx->pciDevice != PCI_CHIP_I830_M) { - I830SetParam(ctx, I830_SETPARAM_USE_MI_BATCHBUFFER_START, 1 ); - } - - /* Okay now initialize the dma engine */ - { - pI830->irq = drmGetInterruptFromBusID(ctx->drmFD, - ctx->pciBus, - ctx->pciDevice, - ctx->pciFunc); - - if (drmCtlInstHandler(ctx->drmFD, pI830->irq)) { - fprintf(stderr, - "[drm] failure adding irq handler\n"); - pI830->irq = 0; - return FALSE; - } - else - fprintf(stderr, - "[drm] dma control initialized, using IRQ %d\n", - pI830->irq); - } - - fprintf(stderr, "[dri] visual configs initialized\n"); - - return TRUE; -} - -static Bool -I830ClearScreen(DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea) -{ - /* need to drmMap front and back buffers and zero them */ - drmAddress map_addr; - int ret; - - ret = drmMap(ctx->drmFD, - sarea->front_handle, - sarea->front_size, - &map_addr); - - if (ret) - { - fprintf(stderr, "Unable to map front buffer\n"); - return FALSE; - } - - drimemsetio((char *)map_addr, - 0, - sarea->front_size); - drmUnmap(map_addr, sarea->front_size); - - - ret = drmMap(ctx->drmFD, - sarea->back_handle, - sarea->back_size, - &map_addr); - - if (ret) - { - fprintf(stderr, "Unable to map back buffer\n"); - return FALSE; - } - - drimemsetio((char *)map_addr, - 0, - sarea->back_size); - drmUnmap(map_addr, sarea->back_size); - - return TRUE; -} - -static Bool -I830ScreenInit(DRIDriverContext *ctx, I830Rec *pI830) - -{ - I830DRIPtr pI830DRI; - drmI830Sarea *pSAREAPriv; - int err; - - drm_page_size = getpagesize(); - - pI830->registerSize = ctx->MMIOSize; - /* This is a hack for now. We have to have more than a 4k page here - * because of the size of the state. However, the state should be - * in a per-context mapping. This will be added in the Mesa 3.5 port - * of the I830 driver. - */ - ctx->shared.SAREASize = SAREA_MAX; - - /* Note that drmOpen will try to load the kernel module, if needed. */ - ctx->drmFD = drmOpen("i915", NULL ); - if (ctx->drmFD < 0) { - fprintf(stderr, "[drm] drmOpen failed\n"); - return 0; - } - - if ((err = drmSetBusid(ctx->drmFD, ctx->pciBusID)) < 0) { - fprintf(stderr, "[drm] drmSetBusid failed (%d, %s), %s\n", - ctx->drmFD, ctx->pciBusID, strerror(-err)); - return 0; - } - - if (drmAddMap( ctx->drmFD, - 0, - ctx->shared.SAREASize, - DRM_SHM, - DRM_CONTAINS_LOCK, - &ctx->shared.hSAREA) < 0) - { - fprintf(stderr, "[drm] drmAddMap failed\n"); - return 0; - } - - fprintf(stderr, "[drm] added %d byte SAREA at 0x%08x\n", - ctx->shared.SAREASize, ctx->shared.hSAREA); - - if (drmMap( ctx->drmFD, - ctx->shared.hSAREA, - ctx->shared.SAREASize, - (drmAddressPtr)(&ctx->pSAREA)) < 0) - { - fprintf(stderr, "[drm] drmMap failed\n"); - return 0; - - } - - memset(ctx->pSAREA, 0, ctx->shared.SAREASize); - fprintf(stderr, "[drm] mapped SAREA 0x%08x to %p, size %d\n", - ctx->shared.hSAREA, ctx->pSAREA, ctx->shared.SAREASize); - - - if (drmAddMap(ctx->drmFD, - ctx->MMIOStart, - ctx->MMIOSize, - DRM_REGISTERS, - DRM_READ_ONLY, - &pI830->registerHandle) < 0) { - fprintf(stderr, "[drm] drmAddMap mmio failed\n"); - return 0; - } - fprintf(stderr, - "[drm] register handle = 0x%08x\n", pI830->registerHandle); - - - if (!I830CheckDRMVersion(ctx, pI830)) { - return FALSE; - } - - /* Create a 'server' context so we can grab the lock for - * initialization ioctls. - */ - if ((err = drmCreateContext(ctx->drmFD, &ctx->serverContext)) != 0) { - fprintf(stderr, "%s: drmCreateContext failed %d\n", __FUNCTION__, err); - return 0; - } - - DRM_LOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext, 0); - - /* Initialize the SAREA private data structure */ - pSAREAPriv = (drmI830Sarea *)(((char*)ctx->pSAREA) + - sizeof(drm_sarea_t)); - memset(pSAREAPriv, 0, sizeof(*pSAREAPriv)); - - pI830->StolenMemory.Size = I830DetectMemory(ctx, pI830); - pI830->StolenMemory.Start = 0; - pI830->StolenMemory.End = pI830->StolenMemory.Size; - - pI830->MemoryAperture.Start = pI830->StolenMemory.End; - pI830->MemoryAperture.End = KB(40000); - pI830->MemoryAperture.Size = pI830->MemoryAperture.End - pI830->MemoryAperture.Start; - - pI830->StolenPool.Fixed = pI830->StolenMemory; - pI830->StolenPool.Total = pI830->StolenMemory; - pI830->StolenPool.Free = pI830->StolenPool.Total; - pI830->FreeMemory = pI830->StolenPool.Total.Size; - - if (!AgpInit(ctx, pI830)) - return FALSE; - - if (I830AllocateMemory(ctx, pI830) == FALSE) - { - return FALSE; - } - - if (I830BindMemory(ctx, pI830) == FALSE) - { - return FALSE; - } - - pSAREAPriv->rotated_offset = -1; - pSAREAPriv->rotated_size = 0; - pSAREAPriv->rotated_pitch = ctx->shared.virtualWidth; - - pSAREAPriv->front_offset = pI830->FrontBuffer.Start; - pSAREAPriv->front_size = pI830->FrontBuffer.Size; - pSAREAPriv->width = ctx->shared.virtualWidth; - pSAREAPriv->height = ctx->shared.virtualHeight; - pSAREAPriv->pitch = ctx->shared.virtualWidth; - pSAREAPriv->virtualX = ctx->shared.virtualWidth; - pSAREAPriv->virtualY = ctx->shared.virtualHeight; - pSAREAPriv->back_offset = pI830->BackBuffer.Start; - pSAREAPriv->back_size = pI830->BackBuffer.Size; - pSAREAPriv->depth_offset = pI830->DepthBuffer.Start; - pSAREAPriv->depth_size = pI830->DepthBuffer.Size; -#if 0 - pSAREAPriv->tex_offset = pI830->TexMem.Start; - pSAREAPriv->tex_size = pI830->TexMem.Size; -#endif - pSAREAPriv->log_tex_granularity = pI830->TexGranularity; - - ctx->driverClientMsg = malloc(sizeof(I830DRIRec)); - ctx->driverClientMsgSize = sizeof(I830DRIRec); - pI830DRI = (I830DRIPtr)ctx->driverClientMsg; - pI830DRI->deviceID = pI830->Chipset; - pI830DRI->regsSize = I830_REG_SIZE; - pI830DRI->width = ctx->shared.virtualWidth; - pI830DRI->height = ctx->shared.virtualHeight; - pI830DRI->mem = ctx->shared.fbSize; - pI830DRI->cpp = ctx->cpp; - - pI830DRI->bitsPerPixel = ctx->bpp; - pI830DRI->sarea_priv_offset = sizeof(drm_sarea_t); - - err = I830DRIDoMappings(ctx, pI830, pSAREAPriv); - if (err == FALSE) - return FALSE; - - I830SetupMemoryTiling(ctx, pI830); - - /* Quick hack to clear the front & back buffers. Could also use - * the clear ioctl to do this, but would need to setup hw state - * first. - */ - I830ClearScreen(ctx, pI830, pSAREAPriv); - - I830SetRingRegs(ctx, pI830); - - return TRUE; -} - - -/** - * \brief Validate the fbdev mode. - * - * \param ctx display handle. - * - * \return one on success, or zero on failure. - * - * Saves some registers and returns 1. - * - * \sa radeonValidateMode(). - */ -static int i830ValidateMode( const DRIDriverContext *ctx ) -{ - return 1; -} - -/** - * \brief Examine mode returned by fbdev. - * - * \param ctx display handle. - * - * \return one on success, or zero on failure. - * - * Restores registers that fbdev has clobbered and returns 1. - * - * \sa i810ValidateMode(). - */ -static int i830PostValidateMode( const DRIDriverContext *ctx ) -{ - I830Rec *pI830 = ctx->driverPrivate; - - I830SetRingRegs(ctx, pI830); - return 1; -} - - -/** - * \brief Initialize the framebuffer device mode - * - * \param ctx display handle. - * - * \return one on success, or zero on failure. - * - * Fills in \p info with some default values and some information from \p ctx - * and then calls I810ScreenInit() for the screen initialization. - * - * Before exiting clears the framebuffer memory accessing it directly. - */ -static int i830InitFBDev( DRIDriverContext *ctx ) -{ - I830Rec *pI830 = calloc(1, sizeof(I830Rec)); - int i; - - { - int dummy = ctx->shared.virtualWidth; - - switch (ctx->bpp / 8) { - case 1: dummy = (ctx->shared.virtualWidth + 127) & ~127; break; - case 2: dummy = (ctx->shared.virtualWidth + 31) & ~31; break; - case 3: - case 4: dummy = (ctx->shared.virtualWidth + 15) & ~15; break; - } - - ctx->shared.virtualWidth = dummy; - ctx->shared.Width = ctx->shared.virtualWidth; - } - - - for (i = 0; pitches[i] != 0; i++) { - if (pitches[i] >= ctx->shared.virtualWidth) { - ctx->shared.virtualWidth = pitches[i]; - break; - } - } - - ctx->driverPrivate = (void *)pI830; - - pI830->LpRing = calloc(1, sizeof(I830RingBuffer)); - pI830->Chipset = ctx->chipset; - pI830->LinearAddr = ctx->FBStart; - - if (!I830ScreenInit( ctx, pI830 )) - return 0; - - - return 1; -} - - -/** - * \brief The screen is being closed, so clean up any state and free any - * resources used by the DRI. - * - * \param ctx display handle. - * - * Unmaps the SAREA, closes the DRM device file descriptor and frees the driver - * private data. - */ -static void i830HaltFBDev( DRIDriverContext *ctx ) -{ - drmI830Sarea *pSAREAPriv; - I830Rec *pI830 = ctx->driverPrivate; - - if (pI830->irq) { - drmCtlUninstHandler(ctx->drmFD); - pI830->irq = 0; } - - I830CleanupDma(ctx); - - pSAREAPriv = (drmI830Sarea *)(((char*)ctx->pSAREA) + - sizeof(drm_sarea_t)); - - I830DRIUnmapScreenRegions(ctx, pI830, pSAREAPriv); - drmUnmap( ctx->pSAREA, ctx->shared.SAREASize ); - drmClose(ctx->drmFD); - - if (ctx->driverPrivate) { - free(ctx->driverPrivate); - ctx->driverPrivate = 0; - } -} - - -extern void i810NotifyFocus( int ); - -/** - * \brief Exported driver interface for Mini GLX. - * - * \sa DRIDriverRec. - */ -const struct DRIDriverRec __driDriver = { - i830ValidateMode, - i830PostValidateMode, - i830InitFBDev, - i830HaltFBDev, - NULL,//I830EngineShutdown, - NULL, //I830EngineRestore, -#ifndef _EMBEDDED - 0, -#else - i810NotifyFocus, -#endif -}; diff --git a/src/mesa/drivers/dri/mach64/Makefile b/src/mesa/drivers/dri/mach64/Makefile index a8f463e9fd..c20fdece29 100644 --- a/src/mesa/drivers/dri/mach64/Makefile +++ b/src/mesa/drivers/dri/mach64/Makefile @@ -5,9 +5,6 @@ include $(TOP)/configs/current LIBNAME = mach64_dri.so -# Not yet -# MINIGLX_SOURCES = server/mach64_dri.c - DRIVER_SOURCES = \ mach64_context.c \ mach64_ioctl.c \ diff --git a/src/mesa/drivers/dri/mga/Makefile b/src/mesa/drivers/dri/mga/Makefile index 0cc329fb22..92533bccc2 100644 --- a/src/mesa/drivers/dri/mga/Makefile +++ b/src/mesa/drivers/dri/mga/Makefile @@ -5,8 +5,6 @@ include $(TOP)/configs/current LIBNAME = mga_dri.so -MINIGLX_SOURCES = server/mga_dri.c - DRIVER_SOURCES = \ mgadd.c \ mgaioctl.c \ diff --git a/src/mesa/drivers/dri/mga/server/mga_dri.c b/src/mesa/drivers/dri/mga/server/mga_dri.c deleted file mode 100644 index bc575e62ee..0000000000 --- a/src/mesa/drivers/dri/mga/server/mga_dri.c +++ /dev/null @@ -1,1088 +0,0 @@ - -/* - * Copyright 2000 VA Linux Systems Inc., Fremont, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES - * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - * Gareth Hughes <gareth@valinux.com> - */ - -#include <errno.h> -#include <unistd.h> -#include <string.h> -#include <stdio.h> -#include <stdlib.h> -#include <inttypes.h> - -#include "driver.h" -#include "drm.h" -#include "memops.h" - -#include "mga_reg.h" -#include "mga.h" -#include "mga_macros.h" -#include "mga_dri.h" - - -/* Quiescence, locking - */ -#define MGA_TIMEOUT 2048 - -static void MGAWaitForIdleDMA( struct DRIDriverContextRec *ctx, MGAPtr pMga ) -{ - drm_lock_t lock; - int ret; - int i = 0; - - memset( &lock, 0, sizeof(lock) ); - - for (;;) { - do { - /* first ask for quiescent and flush */ - lock.flags = DRM_LOCK_QUIESCENT | DRM_LOCK_FLUSH; - do { - ret = drmCommandWrite( ctx->drmFD, DRM_MGA_FLUSH, - &lock, sizeof( lock ) ); - } while ( ret == -EBUSY && i++ < DRM_MGA_IDLE_RETRY ); - - /* if it's still busy just try quiescent */ - if ( ret == -EBUSY ) { - lock.flags = DRM_LOCK_QUIESCENT; - do { - ret = drmCommandWrite( ctx->drmFD, DRM_MGA_FLUSH, - &lock, sizeof( lock ) ); - } while ( ret == -EBUSY && i++ < DRM_MGA_IDLE_RETRY ); - } - } while ( ( ret == -EBUSY ) && ( i++ < MGA_TIMEOUT ) ); - - if ( ret == 0 ) - return; - - fprintf( stderr, - "[dri] Idle timed out, resetting engine...\n" ); - - drmCommandNone( ctx->drmFD, DRM_MGA_RESET ); - } -} - -static unsigned int mylog2( unsigned int n ) -{ - unsigned int log2 = 1; - while ( n > 1 ) n >>= 1, log2++; - return log2; -} - -static int MGADRIAgpInit(struct DRIDriverContextRec *ctx, MGAPtr pMga) -{ - unsigned long mode; - unsigned int vendor, device; - int ret, count, i; - - if(pMga->agpSize < 12)pMga->agpSize = 12; - if(pMga->agpSize > 64)pMga->agpSize = 64; /* cap */ - - /* FIXME: Make these configurable... - */ - pMga->agp.size = pMga->agpSize * 1024 * 1024; - - pMga->warp.offset = 0; - pMga->warp.size = MGA_WARP_UCODE_SIZE; - - pMga->primary.offset = (pMga->warp.offset + - pMga->warp.size); - pMga->primary.size = 1024 * 1024; - - pMga->buffers.offset = (pMga->primary.offset + - pMga->primary.size); - pMga->buffers.size = MGA_NUM_BUFFERS * MGA_BUFFER_SIZE; - - - pMga->agpTextures.offset = (pMga->buffers.offset + - pMga->buffers.size); - - pMga->agpTextures.size = pMga->agp.size - - pMga->agpTextures.offset; - - if ( drmAgpAcquire( ctx->drmFD ) < 0 ) { - fprintf( stderr, "[agp] AGP not available\n" ); - return 0; - } - - mode = drmAgpGetMode( ctx->drmFD ); /* Default mode */ - vendor = drmAgpVendorId( ctx->drmFD ); - device = drmAgpDeviceId( ctx->drmFD ); - - mode &= ~MGA_AGP_MODE_MASK; - switch ( pMga->agpMode ) { - case 4: - mode |= MGA_AGP_4X_MODE; - case 2: - mode |= MGA_AGP_2X_MODE; - case 1: - default: - mode |= MGA_AGP_1X_MODE; - } - -#if 0 - fprintf( stderr, - "[agp] Mode 0x%08lx [AGP 0x%04x/0x%04x; Card 0x%04x/0x%04x]\n", - mode, vendor, device, - ctx->pciVendor, - ctx->pciChipType ); -#endif - - if ( drmAgpEnable( ctx->drmFD, mode ) < 0 ) { - fprintf( stderr, "[agp] AGP not enabled\n" ); - drmAgpRelease( ctx->drmFD ); - return 0; - } - - if ( pMga->Chipset == PCI_CHIP_MGAG200 ) { - switch ( pMga->agpMode ) { - case 2: - fprintf( stderr, - "[drm] Enabling AGP 2x PLL encoding\n" ); - OUTREG( MGAREG_AGP_PLL, MGA_AGP2XPLL_ENABLE ); - break; - - case 1: - default: - fprintf( stderr, - "[drm] Disabling AGP 2x PLL encoding\n" ); - OUTREG( MGAREG_AGP_PLL, MGA_AGP2XPLL_DISABLE ); - pMga->agpMode = 1; - break; - } - } - - ret = drmAgpAlloc( ctx->drmFD, pMga->agp.size, - 0, NULL, &pMga->agp.handle ); - if ( ret < 0 ) { - fprintf( stderr, "[agp] Out of memory (%d)\n", ret ); - drmAgpRelease( ctx->drmFD ); - return 0; - } - fprintf( stderr, - "[agp] %d kB allocated with handle 0x%08x\n", - pMga->agp.size/1024, (unsigned int)pMga->agp.handle ); - - if ( drmAgpBind( ctx->drmFD, pMga->agp.handle, 0 ) < 0 ) { - fprintf( stderr, "[agp] Could not bind memory\n" ); - drmAgpFree( ctx->drmFD, pMga->agp.handle ); - drmAgpRelease( ctx->drmFD ); - return 0; - } - - /* WARP microcode space - */ - if ( drmAddMap( ctx->drmFD, - pMga->warp.offset, - pMga->warp.size, - DRM_AGP, DRM_READ_ONLY, - &pMga->warp.handle ) < 0 ) { - fprintf( stderr, - "[agp] Could not add WARP microcode mapping\n" ); - return 0; - } - fprintf( stderr, - "[agp] WARP microcode handle = 0x%08x\n", - pMga->warp.handle ); - - if ( drmMap( ctx->drmFD, - pMga->warp.handle, - pMga->warp.size, - &pMga->warp.map ) < 0 ) { - fprintf( stderr, - "[agp] Could not map WARP microcode\n" ); - return 0; - } - fprintf( stderr, - "[agp] WARP microcode mapped at 0x%08lx\n", - (unsigned long)pMga->warp.map ); - - /* Primary DMA space - */ - if ( drmAddMap( ctx->drmFD, - pMga->primary.offset, - pMga->primary.size, - DRM_AGP, DRM_READ_ONLY, - &pMga->primary.handle ) < 0 ) { - fprintf( stderr, - "[agp] Could not add primary DMA mapping\n" ); - return 0; - } - fprintf( stderr, - "[agp] Primary DMA handle = 0x%08x\n", - pMga->primary.handle ); - - if ( drmMap( ctx->drmFD, - pMga->primary.handle, - pMga->primary.size, - &pMga->primary.map ) < 0 ) { - fprintf( stderr, - "[agp] Could not map primary DMA\n" ); - return 0; - } - fprintf( stderr, - "[agp] Primary DMA mapped at 0x%08lx\n", - (unsigned long)pMga->primary.map ); - - /* DMA buffers - */ - if ( drmAddMap( ctx->drmFD, - pMga->buffers.offset, - pMga->buffers.size, - DRM_AGP, 0, - &pMga->buffers.handle ) < 0 ) { - fprintf( stderr, - "[agp] Could not add DMA buffers mapping\n" ); - return 0; - } - fprintf( stderr, - "[agp] DMA buffers handle = 0x%08x\n", - pMga->buffers.handle ); - - if ( drmMap( ctx->drmFD, - pMga->buffers.handle, - pMga->buffers.size, - &pMga->buffers.map ) < 0 ) { - fprintf( stderr, - "[agp] Could not map DMA buffers\n" ); - return 0; - } - fprintf( stderr, - "[agp] DMA buffers mapped at 0x%08lx\n", - (unsigned long)pMga->buffers.map ); - - count = drmAddBufs( ctx->drmFD, - MGA_NUM_BUFFERS, MGA_BUFFER_SIZE, - DRM_AGP_BUFFER, pMga->buffers.offset ); - if ( count <= 0 ) { - fprintf( stderr, - "[drm] failure adding %d %d byte DMA buffers\n", - MGA_NUM_BUFFERS, MGA_BUFFER_SIZE ); - return 0; - } - fprintf( stderr, - "[drm] Added %d %d byte DMA buffers\n", - count, MGA_BUFFER_SIZE ); - - i = mylog2(pMga->agpTextures.size / MGA_NR_TEX_REGIONS); - if(i < MGA_LOG_MIN_TEX_REGION_SIZE) - i = MGA_LOG_MIN_TEX_REGION_SIZE; - pMga->agpTextures.size = (pMga->agpTextures.size >> i) << i; - - if ( drmAddMap( ctx->drmFD, - pMga->agpTextures.offset, - pMga->agpTextures.size, - DRM_AGP, 0, - &pMga->agpTextures.handle ) < 0 ) { - fprintf( stderr, - "[agp] Could not add agpTexture mapping\n" ); - return 0; - } -/* should i map it ? */ - fprintf( stderr, - "[agp] agpTexture handle = 0x%08x\n", - pMga->agpTextures.handle ); - fprintf( stderr, - "[agp] agpTexture size: %d kb\n", pMga->agpTextures.size/1024 ); - - return 1; -} - -static int MGADRIMapInit( struct DRIDriverContextRec *ctx, MGAPtr pMga ) -{ - pMga->registers.size = MGAIOMAPSIZE; - - if ( drmAddMap( ctx->drmFD, - (drm_handle_t)pMga->IOAddress, - pMga->registers.size, - DRM_REGISTERS, DRM_READ_ONLY, - &pMga->registers.handle ) < 0 ) { - fprintf( stderr, - "[drm] Could not add MMIO registers mapping\n" ); - return 0; - } - fprintf( stderr, - "[drm] Registers handle = 0x%08lx\n", - pMga->registers.handle ); - - pMga->status.size = SAREA_MAX; - - if ( drmAddMap( ctx->drmFD, 0, pMga->status.size, - DRM_SHM, DRM_READ_ONLY | DRM_LOCKED | DRM_KERNEL, - &pMga->status.handle ) < 0 ) { - fprintf( stderr, - "[drm] Could not add status page mapping\n" ); - return 0; - } - fprintf( stderr, - "[drm] Status handle = 0x%08x\n", - pMga->status.handle ); - - if ( drmMap( ctx->drmFD, - pMga->status.handle, - pMga->status.size, - &pMga->status.map ) < 0 ) { - fprintf( stderr, - "[agp] Could not map status page\n" ); - return 0; - } - fprintf( stderr, - "[agp] Status page mapped at 0x%08lx\n", - (unsigned long)pMga->status.map ); - - return 1; -} - -static int MGADRIKernelInit( struct DRIDriverContextRec *ctx, MGAPtr pMga ) -{ - drm_mga_init_t init; - int ret; - - memset( &init, 0, sizeof(init) ); - - init.func = MGA_INIT_DMA; - init.sarea_priv_offset = sizeof(drm_sarea_t); - - switch ( pMga->Chipset ) { - case PCI_CHIP_MGAG550: - case PCI_CHIP_MGAG400: - init.chipset = MGA_CARD_TYPE_G400; - break; - case PCI_CHIP_MGAG200: - case PCI_CHIP_MGAG200_PCI: - init.chipset = MGA_CARD_TYPE_G200; - break; - default: - return 0; - } - - init.sgram = 0; /* FIXME !pMga->HasSDRAM; */ - - - switch (ctx->bpp) - { - case 16: - init.maccess = MGA_MACCESS_PW16; - break; - case 32: - init.maccess = MGA_MACCESS_PW32; - break; - default: - fprintf( stderr, "[mga] invalid bpp (%d)\n", ctx->bpp ); - return 0; - } - - - init.fb_cpp = ctx->bpp / 8; - init.front_offset = pMga->frontOffset; - init.front_pitch = pMga->frontPitch / init.fb_cpp; - init.back_offset = pMga->backOffset; - init.back_pitch = pMga->backPitch / init.fb_cpp; - - init.depth_cpp = ctx->bpp / 8; - init.depth_offset = pMga->depthOffset; - init.depth_pitch = pMga->depthPitch / init.depth_cpp; - - init.texture_offset[0] = pMga->textureOffset; - init.texture_size[0] = pMga->textureSize; - - init.fb_offset = ctx->shared.hFrameBuffer; - init.mmio_offset = pMga->registers.handle; - init.status_offset = pMga->status.handle; - - init.warp_offset = pMga->warp.handle; - init.primary_offset = pMga->primary.handle; - init.buffers_offset = pMga->buffers.handle; - - init.texture_offset[1] = pMga->agpTextures.handle; - init.texture_size[1] = pMga->agpTextures.size; - - ret = drmCommandWrite( ctx->drmFD, DRM_MGA_INIT, &init, sizeof(init)); - if ( ret < 0 ) { - fprintf( stderr, - "[drm] Failed to initialize DMA! (%d)\n", ret ); - return 0; - } - - return 1; -} - -static void MGADRIIrqInit(struct DRIDriverContextRec *ctx, MGAPtr pMga) -{ - if (!pMga->irq) - { - pMga->irq = drmGetInterruptFromBusID(ctx->drmFD, - ctx->pciBus, - ctx->pciDevice, - ctx->pciFunc); - - fprintf(stderr, "[drm] got IRQ %d\n", pMga->irq); - - if((drmCtlInstHandler(ctx->drmFD, pMga->irq)) != 0) - { - fprintf(stderr, - "[drm] failure adding irq handler, " - "there is a device already using that irq\n" - "[drm] falling back to irq-free operation\n"); - pMga->irq = 0; - } - else - { - pMga->reg_ien = INREG( MGAREG_IEN ); - } - } - - if (pMga->irq) - fprintf(stderr, - "[drm] dma control initialized, using IRQ %d\n", - pMga->irq); -} - -static int MGADRIBuffersInit( struct DRIDriverContextRec *ctx, MGAPtr pMga ) -{ - pMga->drmBuffers = drmMapBufs( ctx->drmFD ); - if ( !pMga->drmBuffers ) - { - fprintf( stderr, - "[drm] Failed to map DMA buffers list\n" ); - return 0; - } - - fprintf( stderr, - "[drm] Mapped %d DMA buffers\n", - pMga->drmBuffers->count ); - - return 1; -} - -static int MGAMemoryInit( struct DRIDriverContextRec *ctx, MGAPtr pMga ) -{ - int width_bytes = ctx->shared.virtualWidth * ctx->cpp; - int bufferSize = ((ctx->shared.virtualHeight * width_bytes - + MGA_BUFFER_ALIGN) - & ~MGA_BUFFER_ALIGN); - int depthSize = ((((ctx->shared.virtualHeight+15) & ~15) * width_bytes - + MGA_BUFFER_ALIGN) - & ~MGA_BUFFER_ALIGN); - int l; - - pMga->frontOffset = 0; - pMga->frontPitch = ctx->shared.virtualWidth * ctx->cpp; - - fprintf(stderr, - "Using %d MB AGP aperture\n", pMga->agpSize); - fprintf(stderr, - "Using %d MB for vertex/indirect buffers\n", pMga->buffers.size>>20); - fprintf(stderr, - "Using %d MB for AGP textures\n", pMga->agpTextures.size>>20); - - /* Front, back and depth buffers - everything else texture?? - */ - pMga->textureSize = ctx->shared.fbSize - 2 * bufferSize - depthSize; - - if (pMga->textureSize < 0) - return 0; - - l = mylog2( pMga->textureSize / MGA_NR_TEX_REGIONS ); - if ( l < MGA_LOG_MIN_TEX_REGION_SIZE ) - l = MGA_LOG_MIN_TEX_REGION_SIZE; - - /* Round the texture size up to the nearest whole number of - * texture regions. Again, be greedy about this, don't - * round down. - */ - pMga->logTextureGranularity = l; - pMga->textureSize = (pMga->textureSize >> l) << l; - - /* Set a minimum usable local texture heap size. This will fit - * two 256x256x32bpp textures. - */ - if (pMga->textureSize < 512 * 1024) { - pMga->textureOffset = 0; - pMga->textureSize = 0; - } - - /* Reserve space for textures */ - pMga->textureOffset = ((ctx->shared.fbSize - pMga->textureSize + - MGA_BUFFER_ALIGN) & - ~MGA_BUFFER_ALIGN); - - /* Reserve space for the shared depth - * buffer. - */ - pMga->depthOffset = ((pMga->textureOffset - depthSize + - MGA_BUFFER_ALIGN) & - ~MGA_BUFFER_ALIGN); - pMga->depthPitch = ctx->shared.virtualWidth * ctx->cpp; - - pMga->backOffset = ((pMga->depthOffset - bufferSize + - MGA_BUFFER_ALIGN) & - ~MGA_BUFFER_ALIGN); - pMga->backPitch = ctx->shared.virtualWidth * ctx->cpp; - - - fprintf(stderr, - "Will use back buffer at offset 0x%x\n", - pMga->backOffset); - fprintf(stderr, - "Will use depth buffer at offset 0x%x\n", - pMga->depthOffset); - fprintf(stderr, - "Will use %d kb for textures at offset 0x%x\n", - pMga->textureSize/1024, pMga->textureOffset); - - return 1; -} - -static int MGACheckDRMVersion( struct DRIDriverContextRec *ctx, MGAPtr pMga ) -{ - drmVersionPtr version; - - /* Check the MGA DRM version */ - version = drmGetVersion(ctx->drmFD); - if ( version ) { - if ( version->version_major != 3 || - version->version_minor < 0 ) { - /* incompatible drm version */ - fprintf( stderr, - "[dri] MGADRIScreenInit failed because of a version mismatch.\n" - "[dri] mga.o kernel module version is %d.%d.%d but version 3.0.x is needed.\n" - "[dri] Disabling DRI.\n", - version->version_major, - version->version_minor, - version->version_patchlevel ); - drmFreeVersion( version ); - return 0; - } - drmFreeVersion( version ); - } - - return 1; -} - -static void print_client_msg( MGADRIPtr pMGADRI ) -{ - fprintf( stderr, "chipset: %d\n", pMGADRI->chipset ); - - fprintf( stderr, "width: %d\n", pMGADRI->width ); - fprintf( stderr, "height: %d\n", pMGADRI->height ); - fprintf( stderr, "mem: %d\n", pMGADRI->mem ); - fprintf( stderr, "cpp: %d\n", pMGADRI->cpp ); - - fprintf( stderr, "agpMode: %d\n", pMGADRI->agpMode ); - - fprintf( stderr, "frontOffset: %d\n", pMGADRI->frontOffset ); - fprintf( stderr, "frontPitch: %d\n", pMGADRI->frontPitch ); - - fprintf( stderr, "backOffset: %d\n", pMGADRI->backOffset ); - fprintf( stderr, "backPitch: %d\n", pMGADRI->backPitch ); - - fprintf( stderr, "depthOffset: %d\n", pMGADRI->depthOffset ); - fprintf( stderr, "depthPitch: %d\n", pMGADRI->depthPitch ); - - fprintf( stderr, "textureOffset: %d\n", pMGADRI->textureOffset ); - fprintf( stderr, "textureSize: %d\n", pMGADRI->textureSize ); - - fprintf( stderr, "logTextureGranularity: %d\n", pMGADRI->logTextureGranularity ); - fprintf( stderr, "logAgpTextureGranularity: %d\n", pMGADRI->logAgpTextureGranularity ); - - fprintf( stderr, "agpTextureHandle: %u\n", (unsigned int)pMGADRI->agpTextureOffset ); - fprintf( stderr, "agpTextureSize: %u\n", (unsigned int)pMGADRI->agpTextureSize ); - -#if 0 - pMGADRI->registers.handle = pMga->registers.handle; - pMGADRI->registers.size = pMga->registers.size; - pMGADRI->status.handle = pMga->status.handle; - pMGADRI->status.size = pMga->status.size; - pMGADRI->primary.handle = pMga->primary.handle; - pMGADRI->primary.size = pMga->primary.size; - pMGADRI->buffers.handle = pMga->buffers.handle; - pMGADRI->buffers.size = pMga->buffers.size; - pMGADRI->sarea_priv_offset = sizeof(drm_sarea_t); -#endif -} - -static int MGAScreenInit( struct DRIDriverContextRec *ctx, MGAPtr pMga ) -{ - int i; - int err; - MGADRIPtr pMGADRI; - - usleep(100); - /*assert(!ctx->IsClient);*/ - - { - int width_bytes = (ctx->shared.virtualWidth * ctx->cpp); - int maxy = ctx->shared.fbSize / width_bytes; - - - if (maxy <= ctx->shared.virtualHeight * 3) { - fprintf(stderr, - "Static buffer allocation failed -- " - "need at least %d kB video memory (have %d kB)\n", - (ctx->shared.virtualWidth * ctx->shared.virtualHeight * - ctx->cpp * 3 + 1023) / 1024, - ctx->shared.fbSize / 1024); - return 0; - } - } - - switch(pMga->Chipset) { - case PCI_CHIP_MGAG550: - case PCI_CHIP_MGAG400: - case PCI_CHIP_MGAG200: -#if 0 - case PCI_CHIP_MGAG200_PCI: -#endif - break; - default: - fprintf(stderr, "[drm] Direct rendering only supported with G200/G400/G550 AGP\n"); - return 0; - } - - fprintf( stderr, - "[drm] bpp: %d depth: %d\n", - ctx->bpp, ctx->bpp /* FIXME: depth */ ); - - if ( (ctx->bpp / 8) != 2 && - (ctx->bpp / 8) != 4 ) { - fprintf( stderr, - "[dri] Direct rendering only supported in 16 and 32 bpp modes\n" ); - return 0; - } - - ctx->shared.SAREASize = SAREA_MAX; - - - /* Note that drmOpen will try to load the kernel module, if needed. */ - ctx->drmFD = drmOpen("mga", NULL ); - if (ctx->drmFD < 0) { - fprintf(stderr, "[drm] drmOpen failed\n"); - return 0; - } - - if ((err = drmSetBusid(ctx->drmFD, ctx->pciBusID)) < 0) { - fprintf(stderr, "[drm] drmSetBusid failed (%d, %s), %s\n", - ctx->drmFD, ctx->pciBusID, strerror(-err)); - return 0; - } - - - if (drmAddMap( ctx->drmFD, - 0, - ctx->shared.SAREASize, - DRM_SHM, - DRM_CONTAINS_LOCK, - &ctx->shared.hSAREA) < 0) - { - fprintf(stderr, "[drm] drmAddMap failed\n"); - return 0; - } - fprintf(stderr, "[drm] added %d byte SAREA at 0x%08lx\n", - ctx->shared.SAREASize, ctx->shared.hSAREA); - - if (drmMap( ctx->drmFD, - ctx->shared.hSAREA, - ctx->shared.SAREASize, - (drmAddressPtr)(&ctx->pSAREA)) < 0) - { - fprintf(stderr, "[drm] drmMap failed\n"); - return 0; - } - memset(ctx->pSAREA, 0, ctx->shared.SAREASize); - fprintf(stderr, "[drm] mapped SAREA 0x%08lx to %p, size %d\n", - ctx->shared.hSAREA, ctx->pSAREA, ctx->shared.SAREASize); - - /* Need to AddMap the framebuffer and mmio regions here: - */ - if (drmAddMap( ctx->drmFD, - (drm_handle_t)ctx->FBStart, - ctx->FBSize, - DRM_FRAME_BUFFER, - 0, - &ctx->shared.hFrameBuffer) < 0) - { - fprintf(stderr, "[drm] drmAddMap framebuffer failed\n"); - return 0; - } - fprintf(stderr, "[drm] framebuffer handle = 0x%08lx\n", - ctx->shared.hFrameBuffer); - - -#if 0 /* will be done in MGADRIMapInit */ - if (drmAddMap(ctx->drmFD, - ctx->FixedInfo.mmio_start, - ctx->FixedInfo.mmio_len, - DRM_REGISTERS, - DRM_READ_ONLY, - &pMga->registers.handle) < 0) { - fprintf(stderr, "[drm] drmAddMap mmio failed\n"); - return 0; - } - fprintf(stderr, - "[drm] register handle = 0x%08lx\n", pMga->registers.handle); -#endif - - - /* Check the mga DRM version */ - if (!MGACheckDRMVersion(ctx, pMga)) { - return 0; - } - - if ( !MGADRIAgpInit( ctx, pMga ) ) { - return 0; - } - - if ( !MGADRIMapInit( ctx, pMga ) ) { - return 0; - } - - /* Memory manager setup */ - if (!MGAMemoryInit(ctx, pMga)) { - return 0; - } - - - /* Create a 'server' context so we can grab the lock for - * initialization ioctls. - */ - if ((err = drmCreateContext(ctx->drmFD, &ctx->serverContext)) != 0) { - fprintf(stderr, "%s: drmCreateContext failed %d\n", __FUNCTION__, err); - return 0; - } - - DRM_LOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext, 0); - - /* Initialize the kernel data structures */ - if (!MGADRIKernelInit(ctx, pMga)) { - fprintf(stderr, "MGADRIKernelInit failed\n"); - DRM_UNLOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext); - return 0; - } - - /* Initialize the vertex buffers list */ - if (!MGADRIBuffersInit(ctx, pMga)) { - fprintf(stderr, "MGADRIBuffersInit failed\n"); - DRM_UNLOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext); - return 0; - } - - /* Initialize IRQ */ - MGADRIIrqInit(ctx, pMga); - - - /* Initialize the SAREA private data structure */ - { - drm_mga_sarea_t *pSAREAPriv; - pSAREAPriv = (drm_mga_sarea_t *)(((char*)ctx->pSAREA) + - sizeof(drm_sarea_t)); - memset(pSAREAPriv, 0, sizeof(*pSAREAPriv)); - } - - /* Quick hack to clear the front & back buffers. Could also use - * the clear ioctl to do this, but would need to setup hw state - * first. - */ - drimemsetio((char *)ctx->FBAddress + pMga->frontOffset, - 0, - pMga->frontPitch * ctx->shared.virtualHeight ); - - drimemsetio((char *)ctx->FBAddress + pMga->backOffset, - 0, - pMga->backPitch * ctx->shared.virtualHeight ); - - /* Can release the lock now */ -/* DRM_UNLOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext);*/ - - /* This is the struct passed to radeon_dri.so for its initialization */ - ctx->driverClientMsg = malloc(sizeof(MGADRIRec)); - ctx->driverClientMsgSize = sizeof(MGADRIRec); - - pMGADRI = (MGADRIPtr)ctx->driverClientMsg; - - - switch(pMga->Chipset) { - case PCI_CHIP_MGAG550: - case PCI_CHIP_MGAG400: - pMGADRI->chipset = MGA_CARD_TYPE_G400; - break; - case PCI_CHIP_MGAG200: - case PCI_CHIP_MGAG200_PCI: - pMGADRI->chipset = MGA_CARD_TYPE_G200; - break; - default: - return 0; - } - pMGADRI->width = ctx->shared.virtualWidth; - pMGADRI->height = ctx->shared.virtualHeight; - pMGADRI->mem = ctx->shared.fbSize; - pMGADRI->cpp = ctx->bpp / 8; - - pMGADRI->agpMode = pMga->agpMode; - - pMGADRI->frontOffset = pMga->frontOffset; - pMGADRI->frontPitch = pMga->frontPitch; - pMGADRI->backOffset = pMga->backOffset; - pMGADRI->backPitch = pMga->backPitch; - pMGADRI->depthOffset = pMga->depthOffset; - pMGADRI->depthPitch = pMga->depthPitch; - pMGADRI->textureOffset = pMga->textureOffset; - pMGADRI->textureSize = pMga->textureSize; - pMGADRI->logTextureGranularity = pMga->logTextureGranularity; - - i = mylog2( pMga->agpTextures.size / MGA_NR_TEX_REGIONS ); - if ( i < MGA_LOG_MIN_TEX_REGION_SIZE ) - i = MGA_LOG_MIN_TEX_REGION_SIZE; - - pMGADRI->logAgpTextureGranularity = i; - pMGADRI->agpTextureOffset = (unsigned int)pMga->agpTextures.handle; - pMGADRI->agpTextureSize = (unsigned int)pMga->agpTextures.size; - - pMGADRI->registers.handle = pMga->registers.handle; - pMGADRI->registers.size = pMga->registers.size; - pMGADRI->status.handle = pMga->status.handle; - pMGADRI->status.size = pMga->status.size; - pMGADRI->primary.handle = pMga->primary.handle; - pMGADRI->primary.size = pMga->primary.size; - pMGADRI->buffers.handle = pMga->buffers.handle; - pMGADRI->buffers.size = pMga->buffers.size; - pMGADRI->sarea_priv_offset = sizeof(drm_sarea_t); - - print_client_msg( pMGADRI ); - - return 1; -} - - -/** - * \brief Validate the fbdev mode. - * - * \param ctx display handle. - * - * \return one on success, or zero on failure. - * - * Saves some registers and returns 1. - * - * \sa mgaValidateMode(). - */ -static int mgaValidateMode( const DRIDriverContext *ctx ) -{ - return 1; -} - - -/** - * \brief Examine mode returned by fbdev. - * - * \param ctx display handle. - * - * \return one on success, or zero on failure. - * - * Restores registers that fbdev has clobbered and returns 1. - * - * \sa mgaValidateMode(). - */ -static int mgaPostValidateMode( const DRIDriverContext *ctx ) -{ - return 1; -} - - -/** - * \brief Initialize the framebuffer device mode - * - * \param ctx display handle. - * - * \return one on success, or zero on failure. - * - * Fills in \p info with some default values and some information from \p ctx - * and then calls MGAScreenInit() for the screen initialization. - * - * Before exiting clears the framebuffer memomry accessing it directly. - */ -static int mgaInitFBDev( struct DRIDriverContextRec *ctx ) -{ - MGAPtr pMga = calloc(1, sizeof(*pMga)); - - { - int dummy = ctx->shared.virtualWidth; - - switch (ctx->bpp / 8) { - case 1: dummy = (ctx->shared.virtualWidth + 127) & ~127; break; - case 2: dummy = (ctx->shared.virtualWidth + 31) & ~31; break; - case 3: - case 4: dummy = (ctx->shared.virtualWidth + 15) & ~15; break; - } - - ctx->shared.virtualWidth = dummy; - } - - ctx->driverPrivate = (void *)pMga; - - pMga->agpMode = MGA_DEFAULT_AGP_MODE; - pMga->agpSize = MGA_DEFAULT_AGP_SIZE; - - pMga->Chipset = ctx->chipset; - - pMga->IOAddress = ctx->MMIOStart; - pMga->IOBase = ctx->MMIOAddress; - - pMga->frontPitch = ctx->shared.virtualWidth * ctx->cpp; - - if (!MGAScreenInit( ctx, pMga )) - return 0; - - return 1; -} - - -/** - * \brief The screen is being closed, so clean up any state and free any - * resources used by the DRI. - * - * \param ctx display handle. - * - * Unmaps the SAREA, closes the DRM device file descriptor and frees the driver - * private data. - */ -static void mgaHaltFBDev( struct DRIDriverContextRec *ctx ) -{ - drmUnmap( ctx->pSAREA, ctx->shared.SAREASize ); - drmClose(ctx->drmFD); - - if (ctx->driverPrivate) { - free(ctx->driverPrivate); - ctx->driverPrivate = NULL; - } -} - - -static int mgaEngineShutdown( const DRIDriverContext *ctx ) -{ - fprintf(stderr, "%s() is not yet implemented!\n", __FUNCTION__); - - return 1; -} - -static int mgaEngineRestore( const DRIDriverContext *ctx ) -{ - fprintf(stderr, "%s() is not yet implemented!\n", __FUNCTION__); - - return 1; -} - -/** - * \brief Exported driver interface for Mini GLX. - * - * \sa DRIDriverRec. - */ -struct DRIDriverRec __driDriver = { - mgaValidateMode, - mgaPostValidateMode, - mgaInitFBDev, - mgaHaltFBDev, - mgaEngineShutdown, - mgaEngineRestore, - 0 -}; - - - - -#if 0 -void MGADRICloseScreen( ScreenPtr pScreen ) -{ - ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; - MGAPtr pMga = MGAPTR(pScrn); - MGADRIServerPrivatePtr pMga = pMga->DRIServerInfo; - drmMGAInit init; - - if ( pMga->drmBuffers ) { - drmUnmapBufs( pMga->drmBuffers ); - pMga->drmBuffers = NULL; - } - - if (pMga->irq) { - drmCtlUninstHandler(ctx->drmFD); - pMga->irq = 0; - } - - /* Cleanup DMA */ - memset( &init, 0, sizeof(drmMGAInit) ); - init.func = MGA_CLEANUP_DMA; - drmCommandWrite( ctx->drmFD, DRM_MGA_INIT, &init, sizeof(drmMGAInit) ); - - if ( pMga->status.map ) { - drmUnmap( pMga->status.map, pMga->status.size ); - pMga->status.map = NULL; - } - if ( pMga->buffers.map ) { - drmUnmap( pMga->buffers.map, pMga->buffers.size ); - pMga->buffers.map = NULL; - } - if ( pMga->primary.map ) { - drmUnmap( pMga->primary.map, pMga->primary.size ); - pMga->primary.map = NULL; - } - if ( pMga->warp.map ) { - drmUnmap( pMga->warp.map, pMga->warp.size ); - pMga->warp.map = NULL; - } - - if ( pMga->agpTextures.map ) { - drmUnmap( pMga->agpTextures.map, pMga->agpTextures.size ); - pMga->agpTextures.map = NULL; - } - - if ( pMga->agp.handle ) { - drmAgpUnbind( ctx->drmFD, pMga->agp.handle ); - drmAgpFree( ctx->drmFD, pMga->agp.handle ); - pMga->agp.handle = 0; - drmAgpRelease( ctx->drmFD ); - } - - DRICloseScreen( pScreen ); - - if ( pMga->pDRIInfo ) { - if ( pMga->pDRIpMga->devPrivate ) { - xfree( pMga->pDRIpMga->devPrivate ); - pMga->pDRIpMga->devPrivate = 0; - } - DRIDestroyInfoRec( pMga->pDRIInfo ); - pMga->pDRIInfo = 0; - } - if ( pMga->DRIServerInfo ) { - xfree( pMga->DRIServerInfo ); - pMga->DRIServerInfo = 0; - } - if ( pMga->pVisualConfigs ) { - xfree( pMga->pVisualConfigs ); - } - if ( pMga->pVisualConfigsPriv ) { - xfree( pMga->pVisualConfigsPriv ); - } -} -#endif diff --git a/src/mesa/drivers/dri/nouveau/Makefile b/src/mesa/drivers/dri/nouveau/Makefile index 49e8933561..7be19b26fd 100644 --- a/src/mesa/drivers/dri/nouveau/Makefile +++ b/src/mesa/drivers/dri/nouveau/Makefile @@ -8,8 +8,6 @@ DRI_LIB_DEPS += $(shell pkg-config libdrm_nouveau --libs) LIBNAME = nouveau_vieux_dri.so -MINIGLX_SOURCES = - DRIVER_SOURCES = \ nouveau_screen.c \ nouveau_context.c \ diff --git a/src/mesa/drivers/dri/nouveau/nouveau_context.c b/src/mesa/drivers/dri/nouveau/nouveau_context.c index 52185a2fb9..502e01255c 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_context.c +++ b/src/mesa/drivers/dri/nouveau/nouveau_context.c @@ -43,19 +43,22 @@ #define need_GL_EXT_framebuffer_object #define need_GL_EXT_fog_coord +#define need_GL_EXT_secondary_color #include "main/remap_helper.h" static const struct dri_extension nouveau_extensions[] = { { "GL_ARB_multitexture", NULL }, + { "GL_ARB_texture_env_add", NULL }, { "GL_ARB_texture_env_combine", NULL }, { "GL_ARB_texture_env_dot3", NULL }, - { "GL_ARB_texture_env_add", NULL }, - { "GL_EXT_texture_lod_bias", NULL }, - { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions }, { "GL_ARB_texture_mirrored_repeat", NULL }, - { "GL_EXT_stencil_wrap", NULL }, { "GL_EXT_fog_coord", GL_EXT_fog_coord_functions }, + { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions }, + { "GL_EXT_secondary_color", GL_EXT_secondary_color_functions }, + { "GL_EXT_stencil_wrap", NULL }, + { "GL_EXT_texture_lod_bias", NULL }, + { "GL_NV_blend_square", NULL }, { "GL_SGIS_generate_mipmap", NULL }, { NULL, NULL } }; diff --git a/src/mesa/drivers/dri/nouveau/nouveau_state.c b/src/mesa/drivers/dri/nouveau/nouveau_state.c index e1871db0eb..bc610451b4 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_state.c +++ b/src/mesa/drivers/dri/nouveau/nouveau_state.c @@ -150,6 +150,7 @@ nouveau_enable(GLcontext *ctx, GLenum cap, GLboolean state) break; case GL_COLOR_SUM_EXT: context_dirty(ctx, FRAG); + context_dirty(ctx, LIGHT_MODEL); break; case GL_CULL_FACE: context_dirty(ctx, CULL_FACE); diff --git a/src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c b/src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c index 69a9b96f0c..a365b977f2 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c +++ b/src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c @@ -281,14 +281,13 @@ vbo_maybe_split(GLcontext *ctx, const struct gl_client_array **arrays, int stride; /* Try to keep client buffers smaller than the scratch BOs. */ - if (!ib && render->mode == VBO && + if (render->mode == VBO && (stride = get_max_client_stride(ctx))) vert_avail = MIN2(vert_avail, RENDER_SCRATCH_SIZE / stride); - - if ((ib && ib->count > idx_avail) || - (!ib && max_index - min_index > vert_avail)) { + if (max_index - min_index > vert_avail || + (ib && ib->count > idx_avail)) { struct split_limits limits = { .max_verts = vert_avail, .max_indices = idx_avail, diff --git a/src/mesa/drivers/dri/nouveau/nv04_state_fb.c b/src/mesa/drivers/dri/nouveau/nv04_state_fb.c index aad1e491d2..5e5e0c5874 100644 --- a/src/mesa/drivers/dri/nouveau/nv04_state_fb.c +++ b/src/mesa/drivers/dri/nouveau/nv04_state_fb.c @@ -63,7 +63,7 @@ nv04_emit_framebuffer(GLcontext *ctx, int emit) return; /* Render target */ - if (fb->_NumColorDrawBuffers) { + if (fb->_ColorDrawBuffers[0]) { s = &to_nouveau_renderbuffer( fb->_ColorDrawBuffers[0])->surface; diff --git a/src/mesa/drivers/dri/nouveau/nv04_state_raster.c b/src/mesa/drivers/dri/nouveau/nv04_state_raster.c index 4314fc33cf..c191571a5f 100644 --- a/src/mesa/drivers/dri/nouveau/nv04_state_raster.c +++ b/src/mesa/drivers/dri/nouveau/nv04_state_raster.c @@ -275,6 +275,10 @@ nv04_emit_blend(GLcontext *ctx, int emit) else blend |= NV04_MULTITEX_TRIANGLE_BLEND_SHADE_MODE_FLAT; + /* Secondary color */ + if (NEED_SECONDARY_COLOR(ctx)) + blend |= NV04_MULTITEX_TRIANGLE_BLEND_SPECULAR_ENABLE; + /* Fog. */ if (ctx->Fog.Enabled) blend |= NV04_MULTITEX_TRIANGLE_BLEND_FOG_ENABLE; @@ -309,6 +313,10 @@ nv04_emit_blend(GLcontext *ctx, int emit) else blend |= get_texenv_mode(GL_MODULATE); + /* Secondary color */ + if (NEED_SECONDARY_COLOR(ctx)) + blend |= NV04_TEXTURED_TRIANGLE_BLEND_SPECULAR_ENABLE; + /* Fog. */ if (ctx->Fog.Enabled) blend |= NV04_TEXTURED_TRIANGLE_BLEND_FOG_ENABLE; diff --git a/src/mesa/drivers/dri/nouveau/nv10_state_fb.c b/src/mesa/drivers/dri/nouveau/nv10_state_fb.c index 05c36b4f8f..6bd383ebcd 100644 --- a/src/mesa/drivers/dri/nouveau/nv10_state_fb.c +++ b/src/mesa/drivers/dri/nouveau/nv10_state_fb.c @@ -111,7 +111,7 @@ nv10_emit_framebuffer(GLcontext *ctx, int emit) } /* Render target */ - if (fb->_NumColorDrawBuffers) { + if (fb->_ColorDrawBuffers[0]) { s = &to_nouveau_renderbuffer( fb->_ColorDrawBuffers[0])->surface; diff --git a/src/mesa/drivers/dri/nouveau/nv10_state_tnl.c b/src/mesa/drivers/dri/nouveau/nv10_state_tnl.c index 6db14d83b8..406e24c455 100644 --- a/src/mesa/drivers/dri/nouveau/nv10_state_tnl.c +++ b/src/mesa/drivers/dri/nouveau/nv10_state_tnl.c @@ -201,8 +201,10 @@ nv10_emit_light_model(GLcontext *ctx, int emit) BEGIN_RING(chan, celsius, NV10TCL_LIGHT_MODEL, 1); OUT_RING(chan, ((m->LocalViewer ? NV10TCL_LIGHT_MODEL_LOCAL_VIEWER : 0) | - (m->ColorControl == GL_SEPARATE_SPECULAR_COLOR ? - NV10TCL_LIGHT_MODEL_SEPARATE_SPECULAR : 0))); + (NEED_SECONDARY_COLOR(ctx) ? + NV10TCL_LIGHT_MODEL_SEPARATE_SPECULAR : 0) | + (!ctx->Light.Enabled && ctx->Fog.ColorSumEnabled ? + NV10TCL_LIGHT_MODEL_VERTEX_SPECULAR : 0))); } static float diff --git a/src/mesa/drivers/dri/nouveau/nv20_state_fb.c b/src/mesa/drivers/dri/nouveau/nv20_state_fb.c index 869acd6e31..d638541df9 100644 --- a/src/mesa/drivers/dri/nouveau/nv20_state_fb.c +++ b/src/mesa/drivers/dri/nouveau/nv20_state_fb.c @@ -67,7 +67,7 @@ nv20_emit_framebuffer(GLcontext *ctx, int emit) return; /* Render target */ - if (fb->_NumColorDrawBuffers) { + if (fb->_ColorDrawBuffers[0]) { s = &to_nouveau_renderbuffer( fb->_ColorDrawBuffers[0])->surface; diff --git a/src/mesa/drivers/dri/nouveau/nv20_state_tnl.c b/src/mesa/drivers/dri/nouveau/nv20_state_tnl.c index 0d566064f6..43f8c72312 100644 --- a/src/mesa/drivers/dri/nouveau/nv20_state_tnl.c +++ b/src/mesa/drivers/dri/nouveau/nv20_state_tnl.c @@ -158,7 +158,7 @@ nv20_emit_light_model(GLcontext *ctx, int emit) OUT_RING(chan, ((m->LocalViewer ? NV20TCL_LIGHT_MODEL_VIEWER_LOCAL : NV20TCL_LIGHT_MODEL_VIEWER_NONLOCAL) | - (m->ColorControl == GL_SEPARATE_SPECULAR_COLOR ? + (NEED_SECONDARY_COLOR(ctx) ? NV20TCL_LIGHT_MODEL_SEPARATE_SPECULAR : 0))); diff --git a/src/mesa/drivers/dri/r128/Makefile b/src/mesa/drivers/dri/r128/Makefile index 52c5a38a70..8144c9b43f 100644 --- a/src/mesa/drivers/dri/r128/Makefile +++ b/src/mesa/drivers/dri/r128/Makefile @@ -5,8 +5,6 @@ include $(TOP)/configs/current LIBNAME = r128_dri.so -MINIGLX_SOURCES = server/r128_dri.c - DRIVER_SOURCES = \ r128_context.c \ r128_lock.c \ diff --git a/src/mesa/drivers/dri/r128/server/r128_dri.c b/src/mesa/drivers/dri/r128/server/r128_dri.c deleted file mode 100644 index 6e3db948af..0000000000 --- a/src/mesa/drivers/dri/r128/server/r128_dri.c +++ /dev/null @@ -1,1112 +0,0 @@ -/* - * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario, - * Precision Insight, Inc., Cedar Park, Texas, and - * VA Linux Systems Inc., Fremont, California. - * - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation on the rights to use, copy, modify, merge, - * publish, distribute, sublicense, and/or sell copies of the Software, - * and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial - * portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX - * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/* - * Authors: - * Kevin E. Martin <martin@valinux.com> - * Rickard E. Faith <faith@valinux.com> - * Daryll Strauss <daryll@valinux.com> - * Gareth Hughes <gareth@valinux.com> - * - */ - -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <errno.h> -#include <unistd.h> -// Fix this to use kernel pci_ids.h when all of these IDs make it into the kernel -#include "pci_ids.h" - -#include "driver.h" -#include "drm.h" -#include "memops.h" - -#include "r128.h" -#include "r128_dri.h" -#include "r128_macros.h" -#include "r128_reg.h" -#include "r128_version.h" -#include "r128_drm.h" - -static size_t r128_drm_page_size; - -/* Compute log base 2 of val. */ -static int R128MinBits(int val) -{ - int bits; - - if (!val) return 1; - for (bits = 0; val; val >>= 1, ++bits); - return bits; -} - -/* Initialize the AGP state. Request memory for use in AGP space, and - initialize the Rage 128 registers to point to that memory. */ -static GLboolean R128DRIAgpInit(const DRIDriverContext *ctx) -{ - unsigned char *R128MMIO = ctx->MMIOAddress; - R128InfoPtr info = ctx->driverPrivate; - unsigned long mode; - unsigned int vendor, device; - int ret; - unsigned long cntl, chunk; - int s, l; - int flags; - unsigned long agpBase; - - if (drmAgpAcquire(ctx->drmFD) < 0) { - fprintf(stderr, "[agp] AGP not available\n"); - return GL_FALSE; - } - - /* Modify the mode if the default mode is - not appropriate for this particular - combination of graphics card and AGP - chipset. */ - - mode = drmAgpGetMode(ctx->drmFD); /* Default mode */ - vendor = drmAgpVendorId(ctx->drmFD); - device = drmAgpDeviceId(ctx->drmFD); - - mode &= ~R128_AGP_MODE_MASK; - switch (info->agpMode) { - case 4: mode |= R128_AGP_4X_MODE; - case 2: mode |= R128_AGP_2X_MODE; - case 1: default: mode |= R128_AGP_1X_MODE; - } - - fprintf(stderr, - "[agp] Mode 0x%08lx [AGP 0x%04x/0x%04x; Card 0x%04x/0x%04x]\n", - mode, vendor, device, - 0x1002, - info->Chipset); - - if (drmAgpEnable(ctx->drmFD, mode) < 0) { - fprintf(stderr, "[agp] AGP not enabled\n"); - drmAgpRelease(ctx->drmFD); - return GL_FALSE; - } - - info->agpOffset = 0; - - if ((ret = drmAgpAlloc(ctx->drmFD, info->agpSize*1024*1024, 0, NULL, - &info->agpMemHandle)) < 0) { - fprintf(stderr, "[agp] Out of memory (%d)\n", ret); - drmAgpRelease(ctx->drmFD); - return GL_FALSE; - } - fprintf(stderr, - "[agp] %d kB allocated with handle 0x%08x\n", - info->agpSize*1024, info->agpMemHandle); - - if (drmAgpBind(ctx->drmFD, info->agpMemHandle, info->agpOffset) < 0) { - fprintf(stderr, "[agp] Could not bind\n"); - drmAgpFree(ctx->drmFD, info->agpMemHandle); - drmAgpRelease(ctx->drmFD); - return GL_FALSE; - } - - /* Initialize the CCE ring buffer data */ - info->ringStart = info->agpOffset; - info->ringMapSize = info->ringSize*1024*1024 + r128_drm_page_size; - info->ringSizeLog2QW = R128MinBits(info->ringSize*1024*1024/8) - 1; - - info->ringReadOffset = info->ringStart + info->ringMapSize; - info->ringReadMapSize = r128_drm_page_size; - - /* Reserve space for vertex/indirect buffers */ - info->bufStart = info->ringReadOffset + info->ringReadMapSize; - info->bufMapSize = info->bufSize*1024*1024; - - /* Reserve the rest for AGP textures */ - info->agpTexStart = info->bufStart + info->bufMapSize; - s = (info->agpSize*1024*1024 - info->agpTexStart); - l = R128MinBits((s-1) / R128_NR_TEX_REGIONS); - if (l < R128_LOG_TEX_GRANULARITY) l = R128_LOG_TEX_GRANULARITY; - info->agpTexMapSize = (s >> l) << l; - info->log2AGPTexGran = l; - - if (info->CCESecure) flags = DRM_READ_ONLY; - else flags = 0; - - if (drmAddMap(ctx->drmFD, info->ringStart, info->ringMapSize, - DRM_AGP, flags, &info->ringHandle) < 0) { - fprintf(stderr, - "[agp] Could not add ring mapping\n"); - return GL_FALSE; - } - fprintf(stderr, - "[agp] ring handle = 0x%08x\n", info->ringHandle); - - if (drmMap(ctx->drmFD, info->ringHandle, info->ringMapSize, - (drmAddressPtr)&info->ring) < 0) { - fprintf(stderr, "[agp] Could not map ring\n"); - return GL_FALSE; - } - fprintf(stderr, - "[agp] Ring mapped at 0x%08lx\n", - (unsigned long)info->ring); - - if (drmAddMap(ctx->drmFD, info->ringReadOffset, info->ringReadMapSize, - DRM_AGP, flags, &info->ringReadPtrHandle) < 0) { - fprintf(stderr, - "[agp] Could not add ring read ptr mapping\n"); - return GL_FALSE; - } - fprintf(stderr, - "[agp] ring read ptr handle = 0x%08x\n", - info->ringReadPtrHandle); - - if (drmMap(ctx->drmFD, info->ringReadPtrHandle, info->ringReadMapSize, - (drmAddressPtr)&info->ringReadPtr) < 0) { - fprintf(stderr, - "[agp] Could not map ring read ptr\n"); - return GL_FALSE; - } - fprintf(stderr, - "[agp] Ring read ptr mapped at 0x%08lx\n", - (unsigned long)info->ringReadPtr); - - if (drmAddMap(ctx->drmFD, info->bufStart, info->bufMapSize, - DRM_AGP, 0, &info->bufHandle) < 0) { - fprintf(stderr, - "[agp] Could not add vertex/indirect buffers mapping\n"); - return GL_FALSE; - } - fprintf(stderr, - "[agp] vertex/indirect buffers handle = 0x%08lx\n", - info->bufHandle); - - if (drmMap(ctx->drmFD, info->bufHandle, info->bufMapSize, - (drmAddressPtr)&info->buf) < 0) { - fprintf(stderr, - "[agp] Could not map vertex/indirect buffers\n"); - return GL_FALSE; - } - fprintf(stderr, - "[agp] Vertex/indirect buffers mapped at 0x%08lx\n", - (unsigned long)info->buf); - - if (drmAddMap(ctx->drmFD, info->agpTexStart, info->agpTexMapSize, - DRM_AGP, 0, &info->agpTexHandle) < 0) { - fprintf(stderr, - "[agp] Could not add AGP texture map mapping\n"); - return GL_FALSE; - } - fprintf(stderr, - "[agp] AGP texture map handle = 0x%08lx\n", - info->agpTexHandle); - - if (drmMap(ctx->drmFD, info->agpTexHandle, info->agpTexMapSize, - (drmAddressPtr)&info->agpTex) < 0) { - fprintf(stderr, - "[agp] Could not map AGP texture map\n"); - return GL_FALSE; - } - fprintf(stderr, - "[agp] AGP Texture map mapped at 0x%08lx\n", - (unsigned long)info->agpTex); - - /* Initialize Rage 128's AGP registers */ - cntl = INREG(R128_AGP_CNTL); - cntl &= ~R128_AGP_APER_SIZE_MASK; - switch (info->agpSize) { - case 256: cntl |= R128_AGP_APER_SIZE_256MB; break; - case 128: cntl |= R128_AGP_APER_SIZE_128MB; break; - case 64: cntl |= R128_AGP_APER_SIZE_64MB; break; - case 32: cntl |= R128_AGP_APER_SIZE_32MB; break; - case 16: cntl |= R128_AGP_APER_SIZE_16MB; break; - case 8: cntl |= R128_AGP_APER_SIZE_8MB; break; - case 4: cntl |= R128_AGP_APER_SIZE_4MB; break; - default: - fprintf(stderr, - "[agp] Illegal aperture size %d kB\n", - info->agpSize*1024); - return GL_FALSE; - } - agpBase = drmAgpBase(ctx->drmFD); - OUTREG(R128_AGP_BASE, agpBase); - OUTREG(R128_AGP_CNTL, cntl); - - /* Disable Rage 128's PCIGART registers */ - chunk = INREG(R128_BM_CHUNK_0_VAL); - chunk &= ~(R128_BM_PTR_FORCE_TO_PCI | - R128_BM_PM4_RD_FORCE_TO_PCI | - R128_BM_GLOBAL_FORCE_TO_PCI); - OUTREG(R128_BM_CHUNK_0_VAL, chunk); - - OUTREG(R128_PCI_GART_PAGE, 1); /* Ensure AGP GART is used (for now) */ - - return GL_TRUE; -} - -static GLboolean R128DRIPciInit(const DRIDriverContext *ctx) -{ - R128InfoPtr info = ctx->driverPrivate; - unsigned char *R128MMIO = ctx->MMIOAddress; - uint32_t chunk; - int ret; - int flags; - - info->agpOffset = 0; - - ret = drmScatterGatherAlloc(ctx->drmFD, info->agpSize*1024*1024, - &info->pciMemHandle); - if (ret < 0) { - fprintf(stderr, "[pci] Out of memory (%d)\n", ret); - return GL_FALSE; - } - fprintf(stderr, - "[pci] %d kB allocated with handle 0x%08x\n", - info->agpSize*1024, info->pciMemHandle); - - /* Initialize the CCE ring buffer data */ - info->ringStart = info->agpOffset; - info->ringMapSize = info->ringSize*1024*1024 + r128_drm_page_size; - info->ringSizeLog2QW = R128MinBits(info->ringSize*1024*1024/8) - 1; - - info->ringReadOffset = info->ringStart + info->ringMapSize; - info->ringReadMapSize = r128_drm_page_size; - - /* Reserve space for vertex/indirect buffers */ - info->bufStart = info->ringReadOffset + info->ringReadMapSize; - info->bufMapSize = info->bufSize*1024*1024; - - flags = DRM_READ_ONLY | DRM_LOCKED | DRM_KERNEL; - - if (drmAddMap(ctx->drmFD, info->ringStart, info->ringMapSize, - DRM_SCATTER_GATHER, flags, &info->ringHandle) < 0) { - fprintf(stderr, - "[pci] Could not add ring mapping\n"); - return GL_FALSE; - } - fprintf(stderr, - "[pci] ring handle = 0x%08lx\n", info->ringHandle); - - if (drmMap(ctx->drmFD, info->ringHandle, info->ringMapSize, - (drmAddressPtr)&info->ring) < 0) { - fprintf(stderr, "[pci] Could not map ring\n"); - return GL_FALSE; - } - fprintf(stderr, - "[pci] Ring mapped at 0x%08lx\n", - (unsigned long)info->ring); - fprintf(stderr, - "[pci] Ring contents 0x%08lx\n", - *(unsigned long *)info->ring); - - if (drmAddMap(ctx->drmFD, info->ringReadOffset, info->ringReadMapSize, - DRM_SCATTER_GATHER, flags, &info->ringReadPtrHandle) < 0) { - fprintf(stderr, - "[pci] Could not add ring read ptr mapping\n"); - return GL_FALSE; - } - fprintf(stderr, - "[pci] ring read ptr handle = 0x%08lx\n", - info->ringReadPtrHandle); - - if (drmMap(ctx->drmFD, info->ringReadPtrHandle, info->ringReadMapSize, - (drmAddressPtr)&info->ringReadPtr) < 0) { - fprintf(stderr, - "[pci] Could not map ring read ptr\n"); - return GL_FALSE; - } - fprintf(stderr, - "[pci] Ring read ptr mapped at 0x%08lx\n", - (unsigned long)info->ringReadPtr); - fprintf(stderr, - "[pci] Ring read ptr contents 0x%08lx\n", - *(unsigned long *)info->ringReadPtr); - - if (drmAddMap(ctx->drmFD, info->bufStart, info->bufMapSize, - DRM_SCATTER_GATHER, 0, &info->bufHandle) < 0) { - fprintf(stderr, - "[pci] Could not add vertex/indirect buffers mapping\n"); - return GL_FALSE; - } - fprintf(stderr, - "[pci] vertex/indirect buffers handle = 0x%08lx\n", - info->bufHandle); - - if (drmMap(ctx->drmFD, info->bufHandle, info->bufMapSize, - (drmAddressPtr)&info->buf) < 0) { - fprintf(stderr, - "[pci] Could not map vertex/indirect buffers\n"); - return GL_FALSE; - } - fprintf(stderr, - "[pci] Vertex/indirect buffers mapped at 0x%08lx\n", - (unsigned long)info->buf); - fprintf(stderr, - "[pci] Vertex/indirect buffers contents 0x%08lx\n", - *(unsigned long *)info->buf); - - if (!info->IsPCI) { - /* This is really an AGP card, force PCI GART mode */ - chunk = INREG(R128_BM_CHUNK_0_VAL); - chunk |= (R128_BM_PTR_FORCE_TO_PCI | - R128_BM_PM4_RD_FORCE_TO_PCI | - R128_BM_GLOBAL_FORCE_TO_PCI); - OUTREG(R128_BM_CHUNK_0_VAL, chunk); - OUTREG(R128_PCI_GART_PAGE, 0); /* Ensure PCI GART is used */ - } - - return GL_TRUE; -} - -/* Add a map for the MMIO registers that will be accessed by any - DRI-based clients. */ -static GLboolean R128DRIMapInit(const DRIDriverContext *ctx) -{ - R128InfoPtr info = ctx->driverPrivate; - int flags; - - if (info->CCESecure) flags = DRM_READ_ONLY; - else flags = 0; - - /* Map registers */ - if (drmAddMap(ctx->drmFD, ctx->MMIOStart, ctx->MMIOSize, - DRM_REGISTERS, flags, &info->registerHandle) < 0) { - return GL_FALSE; - } - fprintf(stderr, - "[drm] register handle = 0x%08x\n", info->registerHandle); - - return GL_TRUE; -} - -/* Initialize the kernel data structures. */ -static int R128DRIKernelInit(const DRIDriverContext *ctx) -{ - R128InfoPtr info = ctx->driverPrivate; - drm_r128_init_t drmInfo; - - memset( &drmInfo, 0, sizeof(&drmInfo) ); - - drmInfo.func = R128_INIT_CCE; - drmInfo.sarea_priv_offset = sizeof(drm_sarea_t); - drmInfo.is_pci = info->IsPCI; - drmInfo.cce_mode = info->CCEMode; - drmInfo.cce_secure = info->CCESecure; - drmInfo.ring_size = info->ringSize*1024*1024; - drmInfo.usec_timeout = info->CCEusecTimeout; - - drmInfo.fb_bpp = ctx->bpp; - drmInfo.depth_bpp = ctx->bpp; - - drmInfo.front_offset = info->frontOffset; - drmInfo.front_pitch = info->frontPitch; - - drmInfo.back_offset = info->backOffset; - drmInfo.back_pitch = info->backPitch; - - drmInfo.depth_offset = info->depthOffset; - drmInfo.depth_pitch = info->depthPitch; - drmInfo.span_offset = info->spanOffset; - - drmInfo.fb_offset = info->LinearAddr; - drmInfo.mmio_offset = info->registerHandle; - drmInfo.ring_offset = info->ringHandle; - drmInfo.ring_rptr_offset = info->ringReadPtrHandle; - drmInfo.buffers_offset = info->bufHandle; - drmInfo.agp_textures_offset = info->agpTexHandle; - - if (drmCommandWrite(ctx->drmFD, DRM_R128_INIT, - &drmInfo, sizeof(drmInfo)) < 0) - return GL_FALSE; - - return GL_TRUE; -} - -/* Add a map for the vertex buffers that will be accessed by any - DRI-based clients. */ -static GLboolean R128DRIBufInit(const DRIDriverContext *ctx) -{ - R128InfoPtr info = ctx->driverPrivate; - /* Initialize vertex buffers */ - if (info->IsPCI) { - info->bufNumBufs = drmAddBufs(ctx->drmFD, - info->bufMapSize / R128_BUFFER_SIZE, - R128_BUFFER_SIZE, - DRM_SG_BUFFER, - info->bufStart); - } else { - info->bufNumBufs = drmAddBufs(ctx->drmFD, - info->bufMapSize / R128_BUFFER_SIZE, - R128_BUFFER_SIZE, - DRM_AGP_BUFFER, - info->bufStart); - } - if (info->bufNumBufs <= 0) { - fprintf(stderr, - "[drm] Could not create vertex/indirect buffers list\n"); - return GL_FALSE; - } - fprintf(stderr, - "[drm] Added %d %d byte vertex/indirect buffers\n", - info->bufNumBufs, R128_BUFFER_SIZE); - - if (!(info->buffers = drmMapBufs(ctx->drmFD))) { - fprintf(stderr, - "[drm] Failed to map vertex/indirect buffers list\n"); - return GL_FALSE; - } - fprintf(stderr, - "[drm] Mapped %d vertex/indirect buffers\n", - info->buffers->count); - - return GL_TRUE; -} - -static void R128DRIIrqInit(const DRIDriverContext *ctx) -{ - R128InfoPtr info = ctx->driverPrivate; - unsigned char *R128MMIO = ctx->MMIOAddress; - - if (!info->irq) { - info->irq = drmGetInterruptFromBusID( - ctx->drmFD, - ctx->pciBus, - ctx->pciDevice, - ctx->pciFunc); - - if((drmCtlInstHandler(ctx->drmFD, info->irq)) != 0) { - fprintf(stderr, - "[drm] failure adding irq handler, " - "there is a device already using that irq\n" - "[drm] falling back to irq-free operation\n"); - info->irq = 0; - } else { - info->gen_int_cntl = INREG( R128_GEN_INT_CNTL ); - } - } - - if (info->irq) - fprintf(stderr, - "[drm] dma control initialized, using IRQ %d\n", - info->irq); -} - -static int R128CCEStop(const DRIDriverContext *ctx) -{ - R128InfoPtr info = ctx->driverPrivate; - drm_r128_cce_stop_t stop; - int ret, i; - - stop.flush = 1; - stop.idle = 1; - - ret = drmCommandWrite( ctx->drmFD, DRM_R128_CCE_STOP, - &stop, sizeof(stop) ); - - if ( ret == 0 ) { - return 0; - } else if ( errno != EBUSY ) { - return -errno; - } - - stop.flush = 0; - - i = 0; - do { - ret = drmCommandWrite( ctx->drmFD, DRM_R128_CCE_STOP, - &stop, sizeof(stop) ); - } while ( ret && errno == EBUSY && i++ < R128_IDLE_RETRY ); - - if ( ret == 0 ) { - return 0; - } else if ( errno != EBUSY ) { - return -errno; - } - - stop.idle = 0; - - if ( drmCommandWrite( ctx->drmFD, DRM_R128_CCE_STOP, - &stop, sizeof(stop) )) { - return -errno; - } else { - return 0; - } -} - -/* Initialize the CCE state, and start the CCE (if used by the X server) */ -static void R128DRICCEInit(const DRIDriverContext *ctx) -{ - R128InfoPtr info = ctx->driverPrivate; - - /* Turn on bus mastering */ - info->BusCntl &= ~R128_BUS_MASTER_DIS; - - /* CCEMode is initialized in r128_driver.c */ - switch (info->CCEMode) { - case R128_PM4_NONPM4: info->CCEFifoSize = 0; break; - case R128_PM4_192PIO: info->CCEFifoSize = 192; break; - case R128_PM4_192BM: info->CCEFifoSize = 192; break; - case R128_PM4_128PIO_64INDBM: info->CCEFifoSize = 128; break; - case R128_PM4_128BM_64INDBM: info->CCEFifoSize = 128; break; - case R128_PM4_64PIO_128INDBM: info->CCEFifoSize = 64; break; - case R128_PM4_64BM_128INDBM: info->CCEFifoSize = 64; break; - case R128_PM4_64PIO_64VCBM_64INDBM: info->CCEFifoSize = 64; break; - case R128_PM4_64BM_64VCBM_64INDBM: info->CCEFifoSize = 64; break; - case R128_PM4_64PIO_64VCPIO_64INDPIO: info->CCEFifoSize = 64; break; - } - - /* Make sure the CCE is on for the X server */ - R128CCE_START(ctx, info); -} - - -static int R128MemoryInit(const DRIDriverContext *ctx) -{ - R128InfoPtr info = ctx->driverPrivate; - int width_bytes = ctx->shared.virtualWidth * ctx->cpp; - int cpp = ctx->cpp; - int bufferSize = ((ctx->shared.virtualHeight * width_bytes - + R128_BUFFER_ALIGN) - & ~R128_BUFFER_ALIGN); - int depthSize = ((((ctx->shared.virtualHeight+15) & ~15) * width_bytes - + R128_BUFFER_ALIGN) - & ~R128_BUFFER_ALIGN); - int l; - - info->frontOffset = 0; - info->frontPitch = ctx->shared.virtualWidth; - - fprintf(stderr, - "Using %d MB AGP aperture\n", info->agpSize); - fprintf(stderr, - "Using %d MB for the ring buffer\n", info->ringSize); - fprintf(stderr, - "Using %d MB for vertex/indirect buffers\n", info->bufSize); - fprintf(stderr, - "Using %d MB for AGP textures\n", info->agpTexSize); - - /* Front, back and depth buffers - everything else texture?? - */ - info->textureSize = ctx->shared.fbSize - 2 * bufferSize - depthSize; - - if (info->textureSize < 0) - return 0; - - l = R128MinBits((info->textureSize-1) / R128_NR_TEX_REGIONS); - if (l < R128_LOG_TEX_GRANULARITY) l = R128_LOG_TEX_GRANULARITY; - - /* Round the texture size up to the nearest whole number of - * texture regions. Again, be greedy about this, don't - * round down. - */ - info->log2TexGran = l; - info->textureSize = (info->textureSize >> l) << l; - - /* Set a minimum usable local texture heap size. This will fit - * two 256x256x32bpp textures. - */ - if (info->textureSize < 512 * 1024) { - info->textureOffset = 0; - info->textureSize = 0; - } - - /* Reserve space for textures */ - info->textureOffset = ((ctx->shared.fbSize - info->textureSize + - R128_BUFFER_ALIGN) & - ~R128_BUFFER_ALIGN); - - /* Reserve space for the shared depth - * buffer. - */ - info->depthOffset = ((info->textureOffset - depthSize + - R128_BUFFER_ALIGN) & - ~R128_BUFFER_ALIGN); - info->depthPitch = ctx->shared.virtualWidth; - - info->backOffset = ((info->depthOffset - bufferSize + - R128_BUFFER_ALIGN) & - ~R128_BUFFER_ALIGN); - info->backPitch = ctx->shared.virtualWidth; - - - fprintf(stderr, - "Will use back buffer at offset 0x%x\n", - info->backOffset); - fprintf(stderr, - "Will use depth buffer at offset 0x%x\n", - info->depthOffset); - fprintf(stderr, - "Will use %d kb for textures at offset 0x%x\n", - info->textureSize/1024, info->textureOffset); - - return 1; -} - - -/* Initialize the screen-specific data structures for the DRI and the - Rage 128. This is the main entry point to the device-specific - initialization code. It calls device-independent DRI functions to - create the DRI data structures and initialize the DRI state. */ -static GLboolean R128DRIScreenInit(DRIDriverContext *ctx) -{ - R128InfoPtr info = ctx->driverPrivate; - R128DRIPtr pR128DRI; - int err, major, minor, patch; - drmVersionPtr version; - drm_r128_sarea_t *pSAREAPriv; - - switch (ctx->bpp) { - case 8: - /* These modes are not supported (yet). */ - case 15: - case 24: - fprintf(stderr, - "[dri] R128DRIScreenInit failed (depth %d not supported). " - "[dri] Disabling DRI.\n", ctx->bpp); - return GL_FALSE; - - /* Only 16 and 32 color depths are supports currently. */ - case 16: - case 32: - break; - } - r128_drm_page_size = getpagesize(); - - info->registerSize = ctx->MMIOSize; - ctx->shared.SAREASize = SAREA_MAX; - - /* Note that drmOpen will try to load the kernel module, if needed. */ - ctx->drmFD = drmOpen("r128", NULL ); - if (ctx->drmFD < 0) { - fprintf(stderr, "[drm] drmOpen failed\n"); - return 0; - } - - /* Check the r128 DRM version */ - version = drmGetVersion(ctx->drmFD); - if (version) { - if (version->version_major != 2 || - version->version_minor < 2) { - /* incompatible drm version */ - fprintf(stderr, - "[dri] R128DRIScreenInit failed because of a version mismatch.\n" - "[dri] r128.o kernel module version is %d.%d.%d but version 2.2 or greater is needed.\n" - "[dri] Disabling the DRI.\n", - version->version_major, - version->version_minor, - version->version_patchlevel); - drmFreeVersion(version); - return GL_FALSE; - } - info->drmMinor = version->version_minor; - drmFreeVersion(version); - } - - if ((err = drmSetBusid(ctx->drmFD, ctx->pciBusID)) < 0) { - fprintf(stderr, "[drm] drmSetBusid failed (%d, %s), %s\n", - ctx->drmFD, ctx->pciBusID, strerror(-err)); - return 0; - } - - if (drmAddMap( ctx->drmFD, - 0, - ctx->shared.SAREASize, - DRM_SHM, - DRM_CONTAINS_LOCK, - &ctx->shared.hSAREA) < 0) - { - fprintf(stderr, "[drm] drmAddMap failed\n"); - return 0; - } - fprintf(stderr, "[drm] added %d byte SAREA at 0x%08lx\n", - ctx->shared.SAREASize, ctx->shared.hSAREA); - - if (drmMap( ctx->drmFD, - ctx->shared.hSAREA, - ctx->shared.SAREASize, - (drmAddressPtr)(&ctx->pSAREA)) < 0) - { - fprintf(stderr, "[drm] drmMap failed\n"); - return 0; - } - memset(ctx->pSAREA, 0, ctx->shared.SAREASize); - fprintf(stderr, "[drm] mapped SAREA 0x%08lx to %p, size %d\n", - ctx->shared.hSAREA, ctx->pSAREA, ctx->shared.SAREASize); - - /* Need to AddMap the framebuffer and mmio regions here: - */ - if (drmAddMap( ctx->drmFD, - (drm_handle_t)ctx->FBStart, - ctx->FBSize, - DRM_FRAME_BUFFER, - 0, - &ctx->shared.hFrameBuffer) < 0) - { - fprintf(stderr, "[drm] drmAddMap framebuffer failed\n"); - return 0; - } - - fprintf(stderr, "[drm] framebuffer handle = 0x%08lx\n", - ctx->shared.hFrameBuffer); - - if (!R128MemoryInit(ctx)) - return GL_FALSE; - - /* Initialize AGP */ - if (!info->IsPCI && !R128DRIAgpInit(ctx)) { - info->IsPCI = GL_TRUE; - fprintf(stderr, - "[agp] AGP failed to initialize -- falling back to PCI mode.\n"); - fprintf(stderr, - "[agp] Make sure you have the agpgart kernel module loaded.\n"); - } - - /* Initialize PCIGART */ - if (info->IsPCI && !R128DRIPciInit(ctx)) { - return GL_FALSE; - } - - /* DRIScreenInit doesn't add all the - common mappings. Add additional - mappings here. */ - if (!R128DRIMapInit(ctx)) { - return GL_FALSE; - } - - /* Create a 'server' context so we can grab the lock for - * initialization ioctls. - */ - if ((err = drmCreateContext(ctx->drmFD, &ctx->serverContext)) != 0) { - fprintf(stderr, "%s: drmCreateContext failed %d\n", __FUNCTION__, err); - return 0; - } - - DRM_LOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext, 0); - - /* Initialize the kernel data structures */ - if (!R128DRIKernelInit(ctx)) { - return GL_FALSE; - } - - /* Initialize the vertex buffers list */ - if (!R128DRIBufInit(ctx)) { - return GL_FALSE; - } - - /* Initialize IRQ */ - R128DRIIrqInit(ctx); - - /* Initialize and start the CCE if required */ - R128DRICCEInit(ctx); - - /* Quick hack to clear the front & back buffers. Could also use - * the clear ioctl to do this, but would need to setup hw state - * first. - */ - drimemsetio((char *)ctx->FBAddress + info->frontOffset, - 0, - info->frontPitch * ctx->cpp * ctx->shared.virtualHeight ); - - drimemsetio((char *)ctx->FBAddress + info->backOffset, - 0, - info->backPitch * ctx->cpp * ctx->shared.virtualHeight ); - - pSAREAPriv = (drm_r128_sarea_t *)(((char*)ctx->pSAREA) + - sizeof(drm_sarea_t)); - memset(pSAREAPriv, 0, sizeof(*pSAREAPriv)); - - /* This is the struct passed to radeon_dri.so for its initialization */ - ctx->driverClientMsg = malloc(sizeof(R128DRIRec)); - ctx->driverClientMsgSize = sizeof(R128DRIRec); - - pR128DRI = (R128DRIPtr)ctx->driverClientMsg; - pR128DRI->deviceID = info->Chipset; - pR128DRI->width = ctx->shared.virtualWidth; - pR128DRI->height = ctx->shared.virtualHeight; - pR128DRI->depth = ctx->bpp; - pR128DRI->bpp = ctx->bpp; - - pR128DRI->IsPCI = info->IsPCI; - pR128DRI->AGPMode = info->agpMode; - - pR128DRI->frontOffset = info->frontOffset; - pR128DRI->frontPitch = info->frontPitch; - pR128DRI->backOffset = info->backOffset; - pR128DRI->backPitch = info->backPitch; - pR128DRI->depthOffset = info->depthOffset; - pR128DRI->depthPitch = info->depthPitch; - pR128DRI->spanOffset = info->spanOffset; - pR128DRI->textureOffset = info->textureOffset; - pR128DRI->textureSize = info->textureSize; - pR128DRI->log2TexGran = info->log2TexGran; - - pR128DRI->registerHandle = info->registerHandle; - pR128DRI->registerSize = info->registerSize; - - pR128DRI->agpTexHandle = info->agpTexHandle; - pR128DRI->agpTexMapSize = info->agpTexMapSize; - pR128DRI->log2AGPTexGran = info->log2AGPTexGran; - pR128DRI->agpTexOffset = info->agpTexStart; - pR128DRI->sarea_priv_offset = sizeof(drm_sarea_t); - - return GL_TRUE; -} - -/* The screen is being closed, so clean up any state and free any - resources used by the DRI. */ -void R128DRICloseScreen(const DRIDriverContext *ctx) -{ - R128InfoPtr info = ctx->driverPrivate; - drm_r128_init_t drmInfo; - - /* Stop the CCE if it is still in use */ - R128CCE_STOP(ctx, info); - - if (info->irq) { - drmCtlUninstHandler(ctx->drmFD); - info->irq = 0; - } - - /* De-allocate vertex buffers */ - if (info->buffers) { - drmUnmapBufs(info->buffers); - info->buffers = NULL; - } - - /* De-allocate all kernel resources */ - memset(&drmInfo, 0, sizeof(drmInfo)); - drmInfo.func = R128_CLEANUP_CCE; - drmCommandWrite(ctx->drmFD, DRM_R128_INIT, - &drmInfo, sizeof(drmInfo)); - - /* De-allocate all AGP resources */ - if (info->agpTex) { - drmUnmap(info->agpTex, info->agpTexMapSize); - info->agpTex = NULL; - } - if (info->buf) { - drmUnmap(info->buf, info->bufMapSize); - info->buf = NULL; - } - if (info->ringReadPtr) { - drmUnmap(info->ringReadPtr, info->ringReadMapSize); - info->ringReadPtr = NULL; - } - if (info->ring) { - drmUnmap(info->ring, info->ringMapSize); - info->ring = NULL; - } - if (info->agpMemHandle != DRM_AGP_NO_HANDLE) { - drmAgpUnbind(ctx->drmFD, info->agpMemHandle); - drmAgpFree(ctx->drmFD, info->agpMemHandle); - info->agpMemHandle = 0; - drmAgpRelease(ctx->drmFD); - } - if (info->pciMemHandle) { - drmScatterGatherFree(ctx->drmFD, info->pciMemHandle); - info->pciMemHandle = 0; - } -} - -static GLboolean R128PreInitDRI(const DRIDriverContext *ctx) -{ - R128InfoPtr info = ctx->driverPrivate; - - /*info->CCEMode = R128_DEFAULT_CCE_PIO_MODE;*/ - info->CCEMode = R128_DEFAULT_CCE_BM_MODE; - info->CCESecure = GL_TRUE; - - info->agpMode = R128_DEFAULT_AGP_MODE; - info->agpSize = R128_DEFAULT_AGP_SIZE; - info->ringSize = R128_DEFAULT_RING_SIZE; - info->bufSize = R128_DEFAULT_BUFFER_SIZE; - info->agpTexSize = R128_DEFAULT_AGP_TEX_SIZE; - - info->CCEusecTimeout = R128_DEFAULT_CCE_TIMEOUT; - - return GL_TRUE; -} - -/** - * \brief Initialize the framebuffer device mode - * - * \param ctx display handle. - * - * \return one on success, or zero on failure. - * - * Fills in \p info with some default values and some information from \p ctx - * and then calls R128ScreenInit() for the screen initialization. - * - * Before exiting clears the framebuffer memory accessing it directly. - */ -static int R128InitFBDev( DRIDriverContext *ctx ) -{ - R128InfoPtr info = calloc(1, sizeof(*info)); - - { - int dummy = ctx->shared.virtualWidth; - - switch (ctx->bpp / 8) { - case 1: dummy = (ctx->shared.virtualWidth + 127) & ~127; break; - case 2: dummy = (ctx->shared.virtualWidth + 31) & ~31; break; - case 3: - case 4: dummy = (ctx->shared.virtualWidth + 15) & ~15; break; - } - - ctx->shared.virtualWidth = dummy; - } - - ctx->driverPrivate = (void *)info; - - info->Chipset = ctx->chipset; - - switch (info->Chipset) { - case PCI_DEVICE_ID_ATI_RAGE128_LE: - case PCI_DEVICE_ID_ATI_RAGE128_RE: - case PCI_DEVICE_ID_ATI_RAGE128_RK: - case PCI_DEVICE_ID_ATI_RAGE128_PD: - case PCI_DEVICE_ID_ATI_RAGE128_PP: - case PCI_DEVICE_ID_ATI_RAGE128_PR: - /* This is a PCI card */ - info->IsPCI = GL_TRUE; - break; - default: - /* This is an AGP card */ - info->IsPCI = GL_FALSE; - break; - } - - info->frontPitch = ctx->shared.virtualWidth; - info->LinearAddr = ctx->FBStart & 0xfc000000; - - if (!R128PreInitDRI(ctx)) - return 0; - - if (!R128DRIScreenInit(ctx)) - return 0; - - return 1; -} - - -/** - * \brief The screen is being closed, so clean up any state and free any - * resources used by the DRI. - * - * \param ctx display handle. - * - * Unmaps the SAREA, closes the DRM device file descriptor and frees the driver - * private data. - */ -static void R128HaltFBDev( DRIDriverContext *ctx ) -{ - drmUnmap( ctx->pSAREA, ctx->shared.SAREASize ); - drmClose(ctx->drmFD); - - if (ctx->driverPrivate) { - free(ctx->driverPrivate); - ctx->driverPrivate = 0; - } -} - - -/** - * \brief Validate the fbdev mode. - * - * \param ctx display handle. - * - * \return one on success, or zero on failure. - * - * Saves some registers and returns 1. - * - * \sa R128PostValidateMode(). - */ -static int R128ValidateMode( const DRIDriverContext *ctx ) -{ - return 1; -} - - -/** - * \brief Examine mode returned by fbdev. - * - * \param ctx display handle. - * - * \return one on success, or zero on failure. - * - * Restores registers that fbdev has clobbered and returns 1. - * - * \sa R128ValidateMode(). - */ -static int R128PostValidateMode( const DRIDriverContext *ctx ) -{ - return 1; -} - - -/** - * \brief Shutdown the drawing engine. - * - * \param ctx display handle - * - * Turns off the command processor engine & restores the graphics card - * to a state that fbdev understands. - */ -static int R128EngineShutdown( const DRIDriverContext *ctx ) -{ - return 1; -} - -/** - * \brief Restore the drawing engine. - * - * \param ctx display handle - * - * Resets the graphics card and sets initial values for several registers of - * the card's drawing engine. - * - * Turns on the R128 command processor engine (i.e., the ringbuffer). - */ -static int R128EngineRestore( const DRIDriverContext *ctx ) -{ - return 1; -} - - -/** - * \brief Exported driver interface for Mini GLX. - * - * \sa DRIDriverRec. - */ -const struct DRIDriverRec __driDriver = { - R128ValidateMode, - R128PostValidateMode, - R128InitFBDev, - R128HaltFBDev, - R128EngineShutdown, - R128EngineRestore, - 0, -}; diff --git a/src/mesa/drivers/dri/r200/Makefile b/src/mesa/drivers/dri/r200/Makefile index 14eb96c1ba..3f87100570 100644 --- a/src/mesa/drivers/dri/r200/Makefile +++ b/src/mesa/drivers/dri/r200/Makefile @@ -7,8 +7,6 @@ CFLAGS += $(RADEON_CFLAGS) LIBNAME = r200_dri.so -MINIGLX_SOURCES = server/radeon_dri.c - ifeq ($(RADEON_LDFLAGS),) CS_SOURCES = radeon_cs_space_drm.c radeon_bo.c radeon_cs.c endif @@ -26,7 +24,9 @@ RADEON_COMMON_SOURCES = \ radeon_queryobj.c \ radeon_span.c \ radeon_texture.c \ - radeon_tex_copy.c + radeon_tex_copy.c \ + radeon_tex_getimage.c \ + radeon_tile.c DRIVER_SOURCES = r200_context.c \ r200_ioctl.c \ diff --git a/src/mesa/drivers/dri/r200/radeon_tex_getimage.c b/src/mesa/drivers/dri/r200/radeon_tex_getimage.c new file mode 120000 index 0000000000..d9836d7326 --- /dev/null +++ b/src/mesa/drivers/dri/r200/radeon_tex_getimage.c @@ -0,0 +1 @@ +../radeon/radeon_tex_getimage.c
\ No newline at end of file diff --git a/src/mesa/drivers/dri/r200/radeon_tile.c b/src/mesa/drivers/dri/r200/radeon_tile.c new file mode 120000 index 0000000000..d4bfe27da6 --- /dev/null +++ b/src/mesa/drivers/dri/r200/radeon_tile.c @@ -0,0 +1 @@ +../radeon/radeon_tile.c
\ No newline at end of file diff --git a/src/mesa/drivers/dri/r200/radeon_tile.h b/src/mesa/drivers/dri/r200/radeon_tile.h new file mode 120000 index 0000000000..31074c581e --- /dev/null +++ b/src/mesa/drivers/dri/r200/radeon_tile.h @@ -0,0 +1 @@ +../radeon/radeon_tile.h
\ No newline at end of file diff --git a/src/mesa/drivers/dri/r200/server/radeon_dri.c b/src/mesa/drivers/dri/r200/server/radeon_dri.c deleted file mode 120000 index d05847d650..0000000000 --- a/src/mesa/drivers/dri/r200/server/radeon_dri.c +++ /dev/null @@ -1 +0,0 @@ -../../radeon/server/radeon_dri.c
\ No newline at end of file diff --git a/src/mesa/drivers/dri/r300/Makefile b/src/mesa/drivers/dri/r300/Makefile index 04459c2ddf..4257a32b89 100644 --- a/src/mesa/drivers/dri/r300/Makefile +++ b/src/mesa/drivers/dri/r300/Makefile @@ -7,8 +7,6 @@ CFLAGS += $(RADEON_CFLAGS) LIBNAME = r300_dri.so -MINIGLX_SOURCES = server/radeon_dri.c - ifeq ($(RADEON_LDFLAGS),) CS_SOURCES = radeon_cs_space_drm.c radeon_bo.c radeon_cs.c endif @@ -36,7 +34,9 @@ RADEON_COMMON_SOURCES = \ radeon_span.c \ radeon_queryobj.c \ radeon_texture.c \ - radeon_tex_copy.c + radeon_tex_copy.c \ + radeon_tex_getimage.c \ + radeon_tile.c DRIVER_SOURCES = \ radeon_screen.c \ diff --git a/src/mesa/drivers/dri/r300/radeon_tex_getimage.c b/src/mesa/drivers/dri/r300/radeon_tex_getimage.c new file mode 120000 index 0000000000..d9836d7326 --- /dev/null +++ b/src/mesa/drivers/dri/r300/radeon_tex_getimage.c @@ -0,0 +1 @@ +../radeon/radeon_tex_getimage.c
\ No newline at end of file diff --git a/src/mesa/drivers/dri/r300/radeon_tile.c b/src/mesa/drivers/dri/r300/radeon_tile.c new file mode 120000 index 0000000000..d4bfe27da6 --- /dev/null +++ b/src/mesa/drivers/dri/r300/radeon_tile.c @@ -0,0 +1 @@ +../radeon/radeon_tile.c
\ No newline at end of file diff --git a/src/mesa/drivers/dri/r300/radeon_tile.h b/src/mesa/drivers/dri/r300/radeon_tile.h new file mode 120000 index 0000000000..31074c581e --- /dev/null +++ b/src/mesa/drivers/dri/r300/radeon_tile.h @@ -0,0 +1 @@ +../radeon/radeon_tile.h
\ No newline at end of file diff --git a/src/mesa/drivers/dri/r300/server/radeon_dri.c b/src/mesa/drivers/dri/r300/server/radeon_dri.c deleted file mode 120000 index d05847d650..0000000000 --- a/src/mesa/drivers/dri/r300/server/radeon_dri.c +++ /dev/null @@ -1 +0,0 @@ -../../radeon/server/radeon_dri.c
\ No newline at end of file diff --git a/src/mesa/drivers/dri/r600/Makefile b/src/mesa/drivers/dri/r600/Makefile index 5d50941539..f76859d11e 100644 --- a/src/mesa/drivers/dri/r600/Makefile +++ b/src/mesa/drivers/dri/r600/Makefile @@ -7,8 +7,6 @@ CFLAGS += $(RADEON_CFLAGS) LIBNAME = r600_dri.so -MINIGLX_SOURCES = server/radeon_dri.c - ifeq ($(RADEON_LDFLAGS),) CS_SOURCES = radeon_cs_space_drm.c radeon_bo.c radeon_cs.c endif @@ -36,7 +34,9 @@ RADEON_COMMON_SOURCES = \ radeon_span.c \ radeon_texture.c \ radeon_queryobj.c \ - radeon_tex_copy.c + radeon_tex_copy.c \ + radeon_tex_getimage.c \ + radeon_tile.c DRIVER_SOURCES = \ radeon_screen.c \ diff --git a/src/mesa/drivers/dri/r600/radeon_tex_getimage.c b/src/mesa/drivers/dri/r600/radeon_tex_getimage.c new file mode 120000 index 0000000000..d9836d7326 --- /dev/null +++ b/src/mesa/drivers/dri/r600/radeon_tex_getimage.c @@ -0,0 +1 @@ +../radeon/radeon_tex_getimage.c
\ No newline at end of file diff --git a/src/mesa/drivers/dri/r600/radeon_tile.c b/src/mesa/drivers/dri/r600/radeon_tile.c new file mode 120000 index 0000000000..d4bfe27da6 --- /dev/null +++ b/src/mesa/drivers/dri/r600/radeon_tile.c @@ -0,0 +1 @@ +../radeon/radeon_tile.c
\ No newline at end of file diff --git a/src/mesa/drivers/dri/r600/radeon_tile.h b/src/mesa/drivers/dri/r600/radeon_tile.h new file mode 120000 index 0000000000..31074c581e --- /dev/null +++ b/src/mesa/drivers/dri/r600/radeon_tile.h @@ -0,0 +1 @@ +../radeon/radeon_tile.h
\ No newline at end of file diff --git a/src/mesa/drivers/dri/r600/server/radeon_dri.c b/src/mesa/drivers/dri/r600/server/radeon_dri.c deleted file mode 120000 index d05847d650..0000000000 --- a/src/mesa/drivers/dri/r600/server/radeon_dri.c +++ /dev/null @@ -1 +0,0 @@ -../../radeon/server/radeon_dri.c
\ No newline at end of file diff --git a/src/mesa/drivers/dri/radeon/Makefile b/src/mesa/drivers/dri/radeon/Makefile index a54ea16ec6..6904ebbee3 100644 --- a/src/mesa/drivers/dri/radeon/Makefile +++ b/src/mesa/drivers/dri/radeon/Makefile @@ -8,8 +8,6 @@ CFLAGS += $(RADEON_CFLAGS) LIBNAME = radeon_dri.so -MINIGLX_SOURCES = server/radeon_dri.c - ifeq ($(RADEON_LDFLAGS),) CS_SOURCES = radeon_cs_space_drm.c radeon_bo.c radeon_cs.c endif @@ -27,7 +25,9 @@ RADEON_COMMON_SOURCES = \ radeon_queryobj.c \ radeon_span.c \ radeon_texture.c \ - radeon_tex_copy.c + radeon_tex_copy.c \ + radeon_tex_getimage.c \ + radeon_tile.c DRIVER_SOURCES = \ radeon_context.c \ diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c index cd843d965e..c6cc417dd6 100644 --- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c +++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c @@ -36,6 +36,7 @@ #include "main/texobj.h" #include "main/enums.h" #include "radeon_texture.h" +#include "radeon_tile.h" static unsigned get_aligned_compressed_row_stride( gl_format format, @@ -69,16 +70,51 @@ static unsigned get_aligned_compressed_row_stride( return stride; } -static unsigned get_compressed_image_size( +unsigned get_texture_image_size( gl_format format, unsigned rowStride, - unsigned height) + unsigned height, + unsigned depth, + unsigned tiling) { - unsigned blockWidth, blockHeight; + if (_mesa_is_format_compressed(format)) { + unsigned blockWidth, blockHeight; - _mesa_get_format_block_size(format, &blockWidth, &blockHeight); + _mesa_get_format_block_size(format, &blockWidth, &blockHeight); + + return rowStride * ((height + blockHeight - 1) / blockHeight) * depth; + } else if (tiling) { + /* Need to align height to tile height */ + unsigned tileWidth, tileHeight; - return rowStride * ((height + blockHeight - 1) / blockHeight); + get_tile_size(format, &tileWidth, &tileHeight); + tileHeight--; + + height = (height + tileHeight) & ~tileHeight; + } + + return rowStride * height * depth; +} + +unsigned get_texture_image_row_stride(radeonContextPtr rmesa, gl_format format, unsigned width, unsigned tiling) +{ + if (_mesa_is_format_compressed(format)) { + return get_aligned_compressed_row_stride(format, width, rmesa->texture_compressed_row_align); + } else { + unsigned row_align; + + if (!_mesa_is_pow_two(width)) { + row_align = rmesa->texture_rect_row_align - 1; + } else if (tiling) { + unsigned tileWidth, tileHeight; + get_tile_size(format, &tileWidth, &tileHeight); + row_align = tileWidth * _mesa_get_format_bytes(format) - 1; + } else { + row_align = rmesa->texture_row_align - 1; + } + + return (_mesa_format_row_stride(format, width) + row_align) & ~row_align; + } } /** @@ -92,34 +128,15 @@ static void compute_tex_image_offset(radeonContextPtr rmesa, radeon_mipmap_tree GLuint face, GLuint level, GLuint* curOffset) { radeon_mipmap_level *lvl = &mt->levels[level]; - uint32_t row_align; GLuint height; height = _mesa_next_pow_two_32(lvl->height); - /* Find image size in bytes */ - if (_mesa_is_format_compressed(mt->mesaFormat)) { - lvl->rowstride = get_aligned_compressed_row_stride(mt->mesaFormat, lvl->width, rmesa->texture_compressed_row_align); - lvl->size = get_compressed_image_size(mt->mesaFormat, lvl->rowstride, height); - } else if (mt->target == GL_TEXTURE_RECTANGLE_NV) { - row_align = rmesa->texture_rect_row_align - 1; - lvl->rowstride = (_mesa_format_row_stride(mt->mesaFormat, lvl->width) + row_align) & ~row_align; - lvl->size = lvl->rowstride * height; - } else if (mt->tilebits & RADEON_TXO_MICRO_TILE) { - /* tile pattern is 16 bytes x2. mipmaps stay 32 byte aligned, - * though the actual offset may be different (if texture is less than - * 32 bytes width) to the untiled case */ - lvl->rowstride = (_mesa_format_row_stride(mt->mesaFormat, lvl->width) * 2 + 31) & ~31; - lvl->size = lvl->rowstride * ((height + 1) / 2) * lvl->depth; - } else { - row_align = rmesa->texture_row_align - 1; - lvl->rowstride = (_mesa_format_row_stride(mt->mesaFormat, lvl->width) + row_align) & ~row_align; - lvl->size = lvl->rowstride * height * lvl->depth; - } + lvl->rowstride = get_texture_image_row_stride(rmesa, mt->mesaFormat, lvl->width, mt->tilebits); + lvl->size = get_texture_image_size(mt->mesaFormat, lvl->rowstride, lvl->height, lvl->depth, mt->tilebits); + assert(lvl->size > 0); - /* All images are aligned to a 32-byte offset */ - *curOffset = (*curOffset + 0x1f) & ~0x1f; lvl->faces[face].offset = *curOffset; *curOffset += lvl->size; diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h index c911688c1a..088f970172 100644 --- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h +++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h @@ -89,4 +89,13 @@ void radeon_try_alloc_miptree(radeonContextPtr rmesa, radeonTexObj *t); GLuint radeon_miptree_image_offset(radeon_mipmap_tree *mt, GLuint face, GLuint level); uint32_t get_base_teximage_offset(radeonTexObj *texObj); + +unsigned get_texture_image_row_stride(radeonContextPtr rmesa, gl_format format, unsigned width, unsigned tiling); + +unsigned get_texture_image_size( + gl_format format, + unsigned rowStride, + unsigned height, + unsigned depth, + unsigned tiling); #endif /* __RADEON_MIPMAP_TREE_H_ */ diff --git a/src/mesa/drivers/dri/radeon/radeon_tex_getimage.c b/src/mesa/drivers/dri/radeon/radeon_tex_getimage.c new file mode 100644 index 0000000000..7bf6dcc2e3 --- /dev/null +++ b/src/mesa/drivers/dri/radeon/radeon_tex_getimage.c @@ -0,0 +1,95 @@ +/* + * Copyright (C) 2009 Maciej Cencora. + * Copyright (C) 2008 Nicolai Haehnle. + * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. + * + * The Weather Channel (TM) funded Tungsten Graphics to develop the + * initial release of the Radeon 8500 driver under the XFree86 license. + * This notice must be preserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial + * portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include "radeon_common_context.h" +#include "radeon_texture.h" +#include "radeon_mipmap_tree.h" + +#include "main/texgetimage.h" + +/** + * Need to map texture image into memory before copying image data, + * then unmap it. + */ +static void +radeon_get_tex_image(GLcontext * ctx, GLenum target, GLint level, + GLenum format, GLenum type, GLvoid * pixels, + struct gl_texture_object *texObj, + struct gl_texture_image *texImage, int compressed) +{ + radeon_texture_image *image = get_radeon_texture_image(texImage); + + radeon_print(RADEON_TEXTURE, RADEON_NORMAL, + "%s(%p, tex %p, image %p) compressed %d.\n", + __func__, ctx, texObj, image, compressed); + + if (image->mt) { + /* Map the texture image read-only */ + radeon_teximage_map(image, GL_FALSE); + } else { + /* Image hasn't been uploaded to a miptree yet */ + assert(image->base.Data); + } + + if (compressed) { + /* FIXME: this can't work for small textures (mips) which + use different hw stride */ + _mesa_get_compressed_teximage(ctx, target, level, pixels, + texObj, texImage); + } else { + _mesa_get_teximage(ctx, target, level, format, type, pixels, + texObj, texImage); + } + + if (image->mt) { + radeon_teximage_unmap(image); + } +} + +void +radeonGetTexImage(GLcontext * ctx, GLenum target, GLint level, + GLenum format, GLenum type, GLvoid * pixels, + struct gl_texture_object *texObj, + struct gl_texture_image *texImage) +{ + radeon_get_tex_image(ctx, target, level, format, type, pixels, + texObj, texImage, 0); +} + +void +radeonGetCompressedTexImage(GLcontext *ctx, GLenum target, GLint level, + GLvoid *pixels, + struct gl_texture_object *texObj, + struct gl_texture_image *texImage) +{ + radeon_get_tex_image(ctx, target, level, 0, 0, pixels, + texObj, texImage, 1); +} diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c index ff37fd3e86..3ccc711253 100644 --- a/src/mesa/drivers/dri/radeon/radeon_texture.c +++ b/src/mesa/drivers/dri/radeon/radeon_texture.c @@ -39,7 +39,6 @@ #include "main/texstore.h" #include "main/teximage.h" #include "main/texobj.h" -#include "main/texgetimage.h" #include "xmlpool.h" /* for symbolic values of enum-type options */ @@ -559,6 +558,15 @@ gl_format radeonChooseTextureFormat(GLcontext * ctx, case GL_COMPRESSED_SLUMINANCE_ALPHA: return MESA_FORMAT_SLA8; + case GL_COMPRESSED_SRGB_S3TC_DXT1_EXT: + return MESA_FORMAT_SRGB_DXT1; + case GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT1_EXT: + return MESA_FORMAT_SRGBA_DXT1; + case GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT3_EXT: + return MESA_FORMAT_SRGBA_DXT3; + case GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT5_EXT: + return MESA_FORMAT_SRGBA_DXT5; + default: _mesa_problem(ctx, "unexpected internalFormat 0x%x in %s", @@ -664,6 +672,7 @@ static void radeon_store_teximage(GLcontext* ctx, int dims, struct gl_texture_image *texImage, int compressed) { + radeonContextPtr rmesa = RADEON_CONTEXT(ctx); radeonTexObj *t = radeon_tex_obj(texObj); radeon_texture_image* image = get_radeon_texture_image(texImage); @@ -678,8 +687,7 @@ static void radeon_store_teximage(GLcontext* ctx, int dims, dstRowStride = image->mt->levels[image->mtlevel].rowstride; } else if (t->bo) { /* TFP case */ - /* TODO */ - assert(0); + dstRowStride = get_texture_image_row_stride(rmesa, texImage->TexFormat, width, 0); } else { dstRowStride = _mesa_format_row_stride(texImage->TexFormat, texImage->Width); } @@ -998,62 +1006,3 @@ void radeonTexSubImage3D(GLcontext * ctx, GLenum target, GLint level, radeon_texsubimage(ctx, 3, target, level, xoffset, yoffset, zoffset, width, height, depth, 0, format, type, pixels, packing, texObj, texImage, 0); } - -/** - * Need to map texture image into memory before copying image data, - * then unmap it. - */ -static void -radeon_get_tex_image(GLcontext * ctx, GLenum target, GLint level, - GLenum format, GLenum type, GLvoid * pixels, - struct gl_texture_object *texObj, - struct gl_texture_image *texImage, int compressed) -{ - radeon_texture_image *image = get_radeon_texture_image(texImage); - - radeon_print(RADEON_TEXTURE, RADEON_NORMAL, - "%s(%p, tex %p, image %p) compressed %d.\n", - __func__, ctx, texObj, image, compressed); - - if (image->mt) { - /* Map the texture image read-only */ - radeon_teximage_map(image, GL_FALSE); - } else { - /* Image hasn't been uploaded to a miptree yet */ - assert(image->base.Data); - } - - if (compressed) { - /* FIXME: this can't work for small textures (mips) which - use different hw stride */ - _mesa_get_compressed_teximage(ctx, target, level, pixels, - texObj, texImage); - } else { - _mesa_get_teximage(ctx, target, level, format, type, pixels, - texObj, texImage); - } - - if (image->mt) { - radeon_teximage_unmap(image); - } -} - -void -radeonGetTexImage(GLcontext * ctx, GLenum target, GLint level, - GLenum format, GLenum type, GLvoid * pixels, - struct gl_texture_object *texObj, - struct gl_texture_image *texImage) -{ - radeon_get_tex_image(ctx, target, level, format, type, pixels, - texObj, texImage, 0); -} - -void -radeonGetCompressedTexImage(GLcontext *ctx, GLenum target, GLint level, - GLvoid *pixels, - struct gl_texture_object *texObj, - struct gl_texture_image *texImage) -{ - radeon_get_tex_image(ctx, target, level, 0, 0, pixels, - texObj, texImage, 1); -} diff --git a/src/mesa/drivers/dri/radeon/radeon_tile.c b/src/mesa/drivers/dri/radeon/radeon_tile.c new file mode 100644 index 0000000000..403da11010 --- /dev/null +++ b/src/mesa/drivers/dri/radeon/radeon_tile.c @@ -0,0 +1,512 @@ +/* + * Copyright (C) 2010 Maciej Cencora <m.cencora@gmail.com> + * + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial + * portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include "radeon_tile.h" + +#include <stdint.h> +#include <string.h> + +#include "main/macros.h" +#include "radeon_debug.h" + +#define MICRO_TILE_SIZE 32 + +static void micro_tile_8_x_4_8bit(const void * const src, unsigned src_pitch, + void * const dst, unsigned dst_pitch, + unsigned width, unsigned height) +{ + unsigned row; /* current source row */ + unsigned col; /* current source column */ + unsigned k; /* number of processed tiles */ + const unsigned tile_width = 8, tile_height = 4; + const unsigned tiles_in_row = (width + (tile_width - 1)) / tile_width; + + k = 0; + for (row = 0; row < height; row += tile_height) + { + for (col = 0; col < width; col += tile_width, ++k) + { + uint8_t *src2 = (uint8_t *)src + src_pitch * row + col; + uint8_t *dst2 = (uint8_t *)dst + row * dst_pitch + + (k % tiles_in_row) * MICRO_TILE_SIZE / sizeof(uint8_t); + unsigned j; + + for (j = 0; j < MIN2(tile_height, height - row); ++j) + { + unsigned columns = MIN2(tile_width, width - col); + memcpy(dst2, src2, columns * sizeof(uint8_t)); + dst2 += tile_width; + src2 += src_pitch; + } + } + } +} + +static void micro_tile_4_x_4_16bit(const void * const src, unsigned src_pitch, + void * const dst, unsigned dst_pitch, + unsigned width, unsigned height) +{ + unsigned row; /* current source row */ + unsigned col; /* current source column */ + unsigned k; /* number of processed tiles */ + const unsigned tile_width = 4, tile_height = 4; + const unsigned tiles_in_row = (width + (tile_width - 1)) / tile_width; + + k = 0; + for (row = 0; row < height; row += tile_height) + { + for (col = 0; col < width; col += tile_width, ++k) + { + uint16_t *src2 = (uint16_t *)src + src_pitch * row + col; + uint16_t *dst2 = (uint16_t *)dst + row * dst_pitch + + (k % tiles_in_row) * MICRO_TILE_SIZE / sizeof(uint16_t); + unsigned j; + + for (j = 0; j < MIN2(tile_height, height - row); ++j) + { + unsigned columns = MIN2(tile_width, width - col); + memcpy(dst2, src2, columns * sizeof(uint16_t)); + dst2 += tile_width; + src2 += src_pitch; + } + } + } +} + +static void micro_tile_8_x_2_16bit(const void * const src, unsigned src_pitch, + void * const dst, unsigned dst_pitch, + unsigned width, unsigned height) +{ + unsigned row; /* current source row */ + unsigned col; /* current source column */ + unsigned k; /* number of processed tiles */ + const unsigned tile_width = 8, tile_height = 2; + const unsigned tiles_in_row = (width + (tile_width - 1)) / tile_width; + + k = 0; + for (row = 0; row < height; row += tile_height) + { + for (col = 0; col < width; col += tile_width, ++k) + { + uint16_t *src2 = (uint16_t *)src + src_pitch * row + col; + uint16_t *dst2 = (uint16_t *)dst + row * dst_pitch + + (k % tiles_in_row) * MICRO_TILE_SIZE / sizeof(uint16_t); + unsigned j; + + for (j = 0; j < MIN2(tile_height, height - row); ++j) + { + unsigned columns = MIN2(tile_width, width - col); + memcpy(dst2, src2, columns * sizeof(uint16_t)); + dst2 += tile_width; + src2 += src_pitch; + } + } + } +} + +static void micro_tile_4_x_2_32bit(const void * const src, unsigned src_pitch, + void * const dst, unsigned dst_pitch, + unsigned width, unsigned height) +{ + unsigned row; /* current source row */ + unsigned col; /* current source column */ + unsigned k; /* number of processed tiles */ + const unsigned tile_width = 4, tile_height = 2; + const unsigned tiles_in_row = (width + (tile_width - 1)) / tile_width; + + k = 0; + for (row = 0; row < height; row += tile_height) + { + for (col = 0; col < width; col += tile_width, ++k) + { + uint32_t *src2 = (uint32_t *)src + src_pitch * row + col; + uint32_t *dst2 = (uint32_t *)dst + row * dst_pitch + + (k % tiles_in_row) * MICRO_TILE_SIZE / sizeof(uint32_t); + unsigned j; + + for (j = 0; j < MIN2(tile_height, height - row); ++j) + { + unsigned columns = MIN2(tile_width, width - col); + memcpy(dst2, src2, columns * sizeof(uint32_t)); + dst2 += tile_width; + src2 += src_pitch; + } + } + } +} + +static void micro_tile_2_x_2_64bit(const void * const src, unsigned src_pitch, + void * const dst, unsigned dst_pitch, + unsigned width, unsigned height) +{ + unsigned row; /* current source row */ + unsigned col; /* current source column */ + unsigned k; /* number of processed tiles */ + const unsigned tile_width = 2, tile_height = 2; + const unsigned tiles_in_row = (width + (tile_width - 1)) / tile_width; + + k = 0; + for (row = 0; row < height; row += tile_height) + { + for (col = 0; col < width; col += tile_width, ++k) + { + uint64_t *src2 = (uint64_t *)src + src_pitch * row + col; + uint64_t *dst2 = (uint64_t *)dst + row * dst_pitch + + (k % tiles_in_row) * MICRO_TILE_SIZE / sizeof(uint64_t); + unsigned j; + + for (j = 0; j < MIN2(tile_height, height - row); ++j) + { + unsigned columns = MIN2(tile_width, width - col); + memcpy(dst2, src2, columns * sizeof(uint64_t)); + dst2 += tile_width; + src2 += src_pitch; + } + } + } +} + +static void micro_tile_1_x_1_128bit(const void * src, unsigned src_pitch, + void * dst, unsigned dst_pitch, + unsigned width, unsigned height) +{ + unsigned i, j; + const unsigned elem_size = 16; /* sizeof(uint128_t) */ + + for (j = 0; j < height; ++j) + { + for (i = 0; i < width; ++i) + { + memcpy(dst, src, width * elem_size); + dst += dst_pitch * elem_size; + src += src_pitch * elem_size; + } + } +} + +void tile_image(const void * src, unsigned src_pitch, + void *dst, unsigned dst_pitch, + gl_format format, unsigned width, unsigned height) +{ + assert(src_pitch >= width); + assert(dst_pitch >= width); + + radeon_print(RADEON_TEXTURE, RADEON_TRACE, + "Software tiling: src_pitch %d, dst_pitch %d, width %d, height %d, bpp %d\n", + src_pitch, dst_pitch, width, height, _mesa_get_format_bytes(format)); + + switch (_mesa_get_format_bytes(format)) + { + case 16: + micro_tile_1_x_1_128bit(src, src_pitch, dst, dst_pitch, width, height); + break; + case 8: + micro_tile_2_x_2_64bit(src, src_pitch, dst, dst_pitch, width, height); + break; + case 4: + micro_tile_4_x_2_32bit(src, src_pitch, dst, dst_pitch, width, height); + break; + case 2: + if (_mesa_get_format_bits(format, GL_DEPTH_BITS)) + { + micro_tile_4_x_4_16bit(src, src_pitch, dst, dst_pitch, width, height); + } + else + { + micro_tile_8_x_2_16bit(src, src_pitch, dst, dst_pitch, width, height); + } + break; + case 1: + micro_tile_8_x_4_8bit(src, src_pitch, dst, dst_pitch, width, height); + break; + default: + assert(0); + break; + } +} + +static void micro_untile_8_x_4_8bit(const void * const src, unsigned src_pitch, + void * const dst, unsigned dst_pitch, + unsigned width, unsigned height) +{ + unsigned row; /* current destination row */ + unsigned col; /* current destination column */ + unsigned k; /* current tile number */ + const unsigned tile_width = 8, tile_height = 4; + const unsigned tiles_in_row = (width + (tile_width - 1)) / tile_width; + + assert(src_pitch % tile_width == 0); + + k = 0; + for (row = 0; row < height; row += tile_height) + { + for (col = 0; col < width; col += tile_width, ++k) + { + uint8_t *src2 = (uint8_t *)src + row * src_pitch + + (k % tiles_in_row) * MICRO_TILE_SIZE / sizeof(uint8_t); + uint8_t *dst2 = (uint8_t *)dst + dst_pitch * row + col; + unsigned j; + + for (j = 0; j < MIN2(tile_height, height - row); ++j) + { + unsigned columns = MIN2(tile_width, width - col); + memcpy(dst2, src2, columns * sizeof(uint8_t)); + dst2 += dst_pitch; + src2 += tile_width; + } + } + } +} + +static void micro_untile_8_x_2_16bit(const void * const src, unsigned src_pitch, + void * const dst, unsigned dst_pitch, + unsigned width, unsigned height) +{ + unsigned row; /* current destination row */ + unsigned col; /* current destination column */ + unsigned k; /* current tile number */ + const unsigned tile_width = 8, tile_height = 2; + const unsigned tiles_in_row = (width + (tile_width - 1)) / tile_width; + + assert(src_pitch % tile_width == 0); + + k = 0; + for (row = 0; row < height; row += tile_height) + { + for (col = 0; col < width; col += tile_width, ++k) + { + uint16_t *src2 = (uint16_t *)src + row * src_pitch + + (k % tiles_in_row) * MICRO_TILE_SIZE / sizeof(uint16_t); + uint16_t *dst2 = (uint16_t *)dst + dst_pitch * row + col; + unsigned j; + + for (j = 0; j < MIN2(tile_height, height - row); ++j) + { + unsigned columns = MIN2(tile_width, width - col); + memcpy(dst2, src2, columns * sizeof(uint16_t)); + dst2 += dst_pitch; + src2 += tile_width; + } + } + } +} + +static void micro_untile_4_x_4_16bit(const void * const src, unsigned src_pitch, + void * const dst, unsigned dst_pitch, + unsigned width, unsigned height) +{ + unsigned row; /* current destination row */ + unsigned col; /* current destination column */ + unsigned k; /* current tile number */ + const unsigned tile_width = 4, tile_height = 4; + const unsigned tiles_in_row = (width + (tile_width - 1)) / tile_width; + + assert(src_pitch % tile_width == 0); + + k = 0; + for (row = 0; row < height; row += tile_height) + { + for (col = 0; col < width; col += tile_width, ++k) + { + uint16_t *src2 = (uint16_t *)src + row * src_pitch + + (k % tiles_in_row) * MICRO_TILE_SIZE / sizeof(uint16_t); + uint16_t *dst2 = (uint16_t *)dst + dst_pitch * row + col; + unsigned j; + + for (j = 0; j < MIN2(tile_height, height - row); ++j) + { + unsigned columns = MIN2(tile_width, width - col); + memcpy(dst2, src2, columns * sizeof(uint16_t)); + dst2 += dst_pitch; + src2 += tile_width; + } + } + } +} + +static void micro_untile_4_x_2_32bit(const void * const src, unsigned src_pitch, + void * const dst, unsigned dst_pitch, + unsigned width, unsigned height) +{ + unsigned row; /* current destination row */ + unsigned col; /* current destination column */ + unsigned k; /* current tile number */ + const unsigned tile_width = 4, tile_height = 2; + const unsigned tiles_in_row = (width + (tile_width - 1)) / tile_width; + + assert(src_pitch % tile_width == 0); + + k = 0; + for (row = 0; row < height; row += tile_height) + { + for (col = 0; col < width; col += tile_width, ++k) + { + uint32_t *src2 = (uint32_t *)src + row * src_pitch + + (k % tiles_in_row) * MICRO_TILE_SIZE / sizeof(uint32_t); + uint32_t *dst2 = (uint32_t *)dst + dst_pitch * row + col; + unsigned j; + + for (j = 0; j < MIN2(tile_height, height - row); ++j) + { + unsigned columns = MIN2(tile_width, width - col); + memcpy(dst2, src2, columns * sizeof(uint32_t)); + dst2 += dst_pitch; + src2 += tile_width; + } + } + } +} + +static void micro_untile_2_x_2_64bit(const void * const src, unsigned src_pitch, + void * const dst, unsigned dst_pitch, + unsigned width, unsigned height) +{ + unsigned row; /* current destination row */ + unsigned col; /* current destination column */ + unsigned k; /* current tile number */ + const unsigned tile_width = 2, tile_height = 2; + const unsigned tiles_in_row = (width + (tile_width - 1)) / tile_width; + + assert(src_pitch % tile_width == 0); + + k = 0; + for (row = 0; row < height; row += tile_height) + { + for (col = 0; col < width; col += tile_width, ++k) + { + uint64_t *src2 = (uint64_t *)src + row * src_pitch + + (k % tiles_in_row) * MICRO_TILE_SIZE / sizeof(uint64_t); + uint64_t *dst2 = (uint64_t *)dst + dst_pitch * row + col; + unsigned j; + + for (j = 0; j < MIN2(tile_height, height - row); ++j) + { + unsigned columns = MIN2(tile_width, width - col); + memcpy(dst2, src2, columns * sizeof(uint64_t)); + dst2 += dst_pitch; + src2 += tile_width; + } + } + } +} + +static void micro_untile_1_x_1_128bit(const void * src, unsigned src_pitch, + void * dst, unsigned dst_pitch, + unsigned width, unsigned height) +{ + unsigned i, j; + const unsigned elem_size = 16; /* sizeof(uint128_t) */ + + for (j = 0; j < height; ++j) + { + for (i = 0; i < width; ++i) + { + memcpy(dst, src, width * elem_size); + dst += dst_pitch * elem_size; + src += src_pitch * elem_size; + } + } +} + +void untile_image(const void * src, unsigned src_pitch, + void *dst, unsigned dst_pitch, + gl_format format, unsigned width, unsigned height) +{ + assert(src_pitch >= width); + assert(dst_pitch >= width); + + radeon_print(RADEON_TEXTURE, RADEON_TRACE, + "Software untiling: src_pitch %d, dst_pitch %d, width %d, height %d, bpp %d\n", + src_pitch, dst_pitch, width, height, _mesa_get_format_bytes(format)); + + switch (_mesa_get_format_bytes(format)) + { + case 16: + micro_untile_1_x_1_128bit(src, src_pitch, dst, dst_pitch, width, height); + break; + case 8: + micro_untile_2_x_2_64bit(src, src_pitch, dst, dst_pitch, width, height); + break; + case 4: + micro_untile_4_x_2_32bit(src, src_pitch, dst, dst_pitch, width, height); + break; + case 2: + if (_mesa_get_format_bits(format, GL_DEPTH_BITS)) + { + micro_untile_4_x_4_16bit(src, src_pitch, dst, dst_pitch, width, height); + } + else + { + micro_untile_8_x_2_16bit(src, src_pitch, dst, dst_pitch, width, height); + } + break; + case 1: + micro_untile_8_x_4_8bit(src, src_pitch, dst, dst_pitch, width, height); + break; + default: + assert(0); + break; + } +} + +void get_tile_size(gl_format format, unsigned *block_width, unsigned *block_height) +{ + switch (_mesa_get_format_bytes(format)) + { + case 16: + *block_width = 1; + *block_height = 1; + break; + case 8: + *block_width = 2; + *block_height = 2; + break; + case 4: + *block_width = 4; + *block_height = 2; + break; + case 2: + if (_mesa_get_format_bits(format, GL_DEPTH_BITS)) + { + *block_width = 4; + *block_height = 4; + } + else + { + *block_width = 8; + *block_height = 2; + } + break; + case 1: + *block_width = 8; + *block_height = 4; + break; + default: + assert(0); + break; + } +} diff --git a/src/mesa/drivers/dri/radeon/radeon_tile.h b/src/mesa/drivers/dri/radeon/radeon_tile.h new file mode 100644 index 0000000000..31d9c5611c --- /dev/null +++ b/src/mesa/drivers/dri/radeon/radeon_tile.h @@ -0,0 +1,38 @@ +/* + * Copyright (C) 2010 Maciej Cencora <m.cencora@gmail.com> + * + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial + * portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include <main/formats.h> + +void tile_image(const void * src, unsigned src_pitch, + void *dst, unsigned dst_pitch, + gl_format format, unsigned width, unsigned height); + +void untile_image(const void * src, unsigned src_pitch, + void *dst, unsigned dst_pitch, + gl_format format, unsigned width, unsigned height); + +void get_tile_size(gl_format format, unsigned *block_width, unsigned *block_height); diff --git a/src/mesa/drivers/dri/radeon/server/radeon_dri.c b/src/mesa/drivers/dri/radeon/server/radeon_dri.c deleted file mode 100644 index 7ead588dac..0000000000 --- a/src/mesa/drivers/dri/radeon/server/radeon_dri.c +++ /dev/null @@ -1,1337 +0,0 @@ -/** - * \file server/radeon_dri.c - * \brief File to perform the device-specific initialization tasks typically - * done in the X server. - * - * Here they are converted to run in the client (or perhaps a standalone - * process), and to work with the frame buffer device rather than the X - * server infrastructure. - */ - -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <errno.h> -#include <unistd.h> - -#include "driver.h" -#include "drm.h" -#include "memops.h" - -#include "radeon.h" -#include "radeon_dri.h" -#include "radeon_macros.h" -#include "radeon_reg.h" -#include "drm_sarea.h" - -static size_t radeon_drm_page_size; - -static int RadeonSetParam(const DRIDriverContext *ctx, int param, int value) -{ - drm_radeon_setparam_t sp; - - memset(&sp, 0, sizeof(sp)); - sp.param = param; - sp.value = value; - - if (drmCommandWrite(ctx->drmFD, DRM_RADEON_SETPARAM, &sp, sizeof(sp))) { - return -1; - } - - return 0; -} - -/** - * \brief Wait for free FIFO entries. - * - * \param ctx display handle. - * \param entries number of free entries to wait. - * - * It polls the free entries from the chip until it reaches the requested value - * or a timeout (3000 tries) occurs. Aborts the program if the FIFO times out. - */ -static void RADEONWaitForFifo( const DRIDriverContext *ctx, - int entries ) -{ - unsigned char *RADEONMMIO = ctx->MMIOAddress; - int i; - - for (i = 0; i < 3000; i++) { - int fifo_slots = - INREG(RADEON_RBBM_STATUS) & RADEON_RBBM_FIFOCNT_MASK; - if (fifo_slots >= entries) return; - } - - /* There are recoveries possible, but I haven't seen them work - * in practice: - */ - fprintf(stderr, "FIFO timed out: %d entries, stat=0x%08x\n", - INREG(RADEON_RBBM_STATUS) & RADEON_RBBM_FIFOCNT_MASK, - INREG(RADEON_RBBM_STATUS)); - exit(1); -} - -/** - * \brief Read a PLL register. - * - * \param ctx display handle. - * \param addr PLL register index. - * - * \return value of the PLL register. - */ -static unsigned int RADEONINPLL( const DRIDriverContext *ctx, int addr) -{ - unsigned char *RADEONMMIO = ctx->MMIOAddress; - unsigned int data; - - OUTREG8(RADEON_CLOCK_CNTL_INDEX, addr & 0x3f); - data = INREG(RADEON_CLOCK_CNTL_DATA); - - return data; -} - -/** - * \brief Reset graphics card to known state. - * - * \param ctx display handle. - * - * Resets the values of several Radeon registers. - */ -static void RADEONEngineReset( const DRIDriverContext *ctx ) -{ - unsigned char *RADEONMMIO = ctx->MMIOAddress; - unsigned int clock_cntl_index; - unsigned int mclk_cntl; - unsigned int rbbm_soft_reset; - unsigned int host_path_cntl; - int i; - - OUTREGP(RADEON_RB2D_DSTCACHE_CTLSTAT, - RADEON_RB2D_DC_FLUSH_ALL, - ~RADEON_RB2D_DC_FLUSH_ALL); - for (i = 0; i < 512; i++) { - if (!(INREG(RADEON_RB2D_DSTCACHE_CTLSTAT) & RADEON_RB2D_DC_BUSY)) - break; - } - - clock_cntl_index = INREG(RADEON_CLOCK_CNTL_INDEX); - - mclk_cntl = INPLL(ctx, RADEON_MCLK_CNTL); - OUTPLL(RADEON_MCLK_CNTL, (mclk_cntl | - RADEON_FORCEON_MCLKA | - RADEON_FORCEON_MCLKB | - RADEON_FORCEON_YCLKA | - RADEON_FORCEON_YCLKB | - RADEON_FORCEON_MC | - RADEON_FORCEON_AIC)); - - /* Soft resetting HDP thru RBBM_SOFT_RESET register can cause some - * unexpected behaviour on some machines. Here we use - * RADEON_HOST_PATH_CNTL to reset it. - */ - host_path_cntl = INREG(RADEON_HOST_PATH_CNTL); - rbbm_soft_reset = INREG(RADEON_RBBM_SOFT_RESET); - - OUTREG(RADEON_RBBM_SOFT_RESET, (rbbm_soft_reset | - RADEON_SOFT_RESET_CP | - RADEON_SOFT_RESET_HI | - RADEON_SOFT_RESET_SE | - RADEON_SOFT_RESET_RE | - RADEON_SOFT_RESET_PP | - RADEON_SOFT_RESET_E2 | - RADEON_SOFT_RESET_RB)); - INREG(RADEON_RBBM_SOFT_RESET); - OUTREG(RADEON_RBBM_SOFT_RESET, (rbbm_soft_reset & - (unsigned int) ~(RADEON_SOFT_RESET_CP | - RADEON_SOFT_RESET_HI | - RADEON_SOFT_RESET_SE | - RADEON_SOFT_RESET_RE | - RADEON_SOFT_RESET_PP | - RADEON_SOFT_RESET_E2 | - RADEON_SOFT_RESET_RB))); - INREG(RADEON_RBBM_SOFT_RESET); - - OUTREG(RADEON_HOST_PATH_CNTL, host_path_cntl | RADEON_HDP_SOFT_RESET); - INREG(RADEON_HOST_PATH_CNTL); - OUTREG(RADEON_HOST_PATH_CNTL, host_path_cntl); - - OUTREG(RADEON_RBBM_SOFT_RESET, rbbm_soft_reset); - - OUTREG(RADEON_CLOCK_CNTL_INDEX, clock_cntl_index); - OUTPLL(RADEON_MCLK_CNTL, mclk_cntl); -} - -/** - * \brief Restore the drawing engine. - * - * \param ctx display handle - * - * Resets the graphics card and sets initial values for several registers of - * the card's drawing engine. - * - * Turns on the radeon command processor engine (i.e., the ringbuffer). - */ -static int RADEONEngineRestore( const DRIDriverContext *ctx ) -{ - RADEONInfoPtr info = ctx->driverPrivate; - unsigned char *RADEONMMIO = ctx->MMIOAddress; - int pitch64, datatype, dp_gui_master_cntl, err; - - fprintf(stderr, "%s\n", __FUNCTION__); - - OUTREG(RADEON_RB3D_CNTL, 0); - RADEONEngineReset( ctx ); - - switch (ctx->bpp) { - case 16: datatype = 4; break; - case 32: datatype = 6; break; - default: return 0; - } - - dp_gui_master_cntl = - ((datatype << RADEON_GMC_DST_DATATYPE_SHIFT) - | RADEON_GMC_CLR_CMP_CNTL_DIS); - - pitch64 = ((ctx->shared.virtualWidth * (ctx->bpp / 8) + 0x3f)) >> 6; - - RADEONWaitForFifo(ctx, 1); - OUTREG(RADEON_DEFAULT_OFFSET, ((INREG(RADEON_DEFAULT_OFFSET) & 0xC0000000) - | (pitch64 << 22))); - - RADEONWaitForFifo(ctx, 1); - OUTREG(RADEON_SURFACE_CNTL, RADEON_SURF_TRANSLATION_DIS); - - RADEONWaitForFifo(ctx, 1); - OUTREG(RADEON_DEFAULT_SC_BOTTOM_RIGHT, (RADEON_DEFAULT_SC_RIGHT_MAX - | RADEON_DEFAULT_SC_BOTTOM_MAX)); - - RADEONWaitForFifo(ctx, 1); - OUTREG(RADEON_DP_GUI_MASTER_CNTL, (dp_gui_master_cntl - | RADEON_GMC_BRUSH_SOLID_COLOR - | RADEON_GMC_SRC_DATATYPE_COLOR)); - - RADEONWaitForFifo(ctx, 7); - OUTREG(RADEON_DST_LINE_START, 0); - OUTREG(RADEON_DST_LINE_END, 0); - OUTREG(RADEON_DP_BRUSH_FRGD_CLR, 0xffffffff); - OUTREG(RADEON_DP_BRUSH_BKGD_CLR, 0); - OUTREG(RADEON_DP_SRC_FRGD_CLR, 0xffffffff); - OUTREG(RADEON_DP_SRC_BKGD_CLR, 0); - OUTREG(RADEON_DP_WRITE_MASK, 0xffffffff); - OUTREG(RADEON_AUX_SC_CNTL, 0); - -/* RADEONWaitForIdleMMIO(ctx); */ - usleep(100); - - - OUTREG(RADEON_GEN_INT_CNTL, info->gen_int_cntl); - if (info->colorTiling) - info->crtc_offset_cntl |= RADEON_CRTC_TILE_EN; - OUTREG(RADEON_CRTC_OFFSET_CNTL, info->crtc_offset_cntl); - - /* Initialize and start the CP if required */ - if ((err = drmCommandNone(ctx->drmFD, DRM_RADEON_CP_START)) != 0) { - fprintf(stderr, "%s: CP start %d\n", __FUNCTION__, err); - return 0; - } - - return 1; -} - - -/** - * \brief Shutdown the drawing engine. - * - * \param ctx display handle - * - * Turns off the command processor engine & restores the graphics card - * to a state that fbdev understands. - */ -static int RADEONEngineShutdown( const DRIDriverContext *ctx ) -{ - drm_radeon_cp_stop_t stop; - int ret, i; - - stop.flush = 1; - stop.idle = 1; - - ret = drmCommandWrite(ctx->drmFD, DRM_RADEON_CP_STOP, &stop, - sizeof(drm_radeon_cp_stop_t)); - - if (ret == 0) { - return 0; - } else if (errno != EBUSY) { - return -errno; - } - - stop.flush = 0; - - i = 0; - do { - ret = drmCommandWrite(ctx->drmFD, DRM_RADEON_CP_STOP, &stop, - sizeof(drm_radeon_cp_stop_t)); - } while (ret && errno == EBUSY && i++ < 10); - - if (ret == 0) { - return 0; - } else if (errno != EBUSY) { - return -errno; - } - - stop.idle = 0; - - if (drmCommandWrite(ctx->drmFD, DRM_RADEON_CP_STOP, - &stop, sizeof(drm_radeon_cp_stop_t))) { - return -errno; - } else { - return 0; - } -} - -/** - * \brief Compute base 2 logarithm. - * - * \param val value. - * - * \return base 2 logarithm of \p val. - */ -static int RADEONMinBits(int val) -{ - int bits; - - if (!val) return 1; - for (bits = 0; val; val >>= 1, ++bits); - return bits; -} - -/** - * \brief Initialize the AGP state - * - * \param ctx display handle. - * \param info driver private data. - * - * \return one on success, or zero on failure. - * - * Acquires and enables the AGP device. Reserves memory in the AGP space for - * the ring buffer, vertex buffers and textures. Initialize the Radeon - * registers to point to that memory and add client mappings. - */ -static int RADEONDRIAgpInit( const DRIDriverContext *ctx, RADEONInfoPtr info) -{ - unsigned char *RADEONMMIO = ctx->MMIOAddress; - unsigned long mode; - int ret; - int s, l; - - if (drmAgpAcquire(ctx->drmFD) < 0) { - fprintf(stderr, "[gart] AGP not available\n"); - return 0; - } - - /* Modify the mode if the default mode is not appropriate for this - * particular combination of graphics card and AGP chipset. - */ - mode = drmAgpGetMode(ctx->drmFD); /* Default mode */ - - /* Disable fast write entirely - too many lockups. - */ - mode &= ~RADEON_AGP_MODE_MASK; - switch (ctx->agpmode) { - case 4: mode |= RADEON_AGP_4X_MODE; - case 2: mode |= RADEON_AGP_2X_MODE; - case 1: default: mode |= RADEON_AGP_1X_MODE; - } - - if (drmAgpEnable(ctx->drmFD, mode) < 0) { - fprintf(stderr, "[gart] AGP not enabled\n"); - drmAgpRelease(ctx->drmFD); - return 0; - } - else - fprintf(stderr, "[gart] AGP enabled at %dx\n", ctx->agpmode); - - /* Workaround for some hardware bugs */ - if (info->ChipFamily < CHIP_FAMILY_R200) - OUTREG(RADEON_AGP_CNTL, INREG(RADEON_AGP_CNTL) | 0x000e0000); - - info->gartOffset = 0; - - if ((ret = drmAgpAlloc(ctx->drmFD, info->gartSize*1024*1024, 0, NULL, - &info->gartMemHandle)) < 0) { - fprintf(stderr, "[gart] Out of memory (%d)\n", ret); - drmAgpRelease(ctx->drmFD); - return 0; - } - fprintf(stderr, - "[gart] %d kB allocated with handle 0x%08x\n", - info->gartSize*1024, (unsigned)info->gartMemHandle); - - if (drmAgpBind(ctx->drmFD, - info->gartMemHandle, info->gartOffset) < 0) { - fprintf(stderr, "[gart] Could not bind\n"); - drmAgpFree(ctx->drmFD, info->gartMemHandle); - drmAgpRelease(ctx->drmFD); - return 0; - } - - /* Initialize the CP ring buffer data */ - info->ringStart = info->gartOffset; - info->ringMapSize = info->ringSize*1024*1024 + radeon_drm_page_size; - - info->ringReadOffset = info->ringStart + info->ringMapSize; - info->ringReadMapSize = radeon_drm_page_size; - - /* Reserve space for vertex/indirect buffers */ - info->bufStart = info->ringReadOffset + info->ringReadMapSize; - info->bufMapSize = info->bufSize*1024*1024; - - /* Reserve the rest for AGP textures */ - info->gartTexStart = info->bufStart + info->bufMapSize; - s = (info->gartSize*1024*1024 - info->gartTexStart); - l = RADEONMinBits((s-1) / RADEON_NR_TEX_REGIONS); - if (l < RADEON_LOG_TEX_GRANULARITY) l = RADEON_LOG_TEX_GRANULARITY; - info->gartTexMapSize = (s >> l) << l; - info->log2GARTTexGran = l; - - if (drmAddMap(ctx->drmFD, info->ringStart, info->ringMapSize, - DRM_AGP, DRM_READ_ONLY, &info->ringHandle) < 0) { - fprintf(stderr, "[gart] Could not add ring mapping\n"); - return 0; - } - fprintf(stderr, "[gart] ring handle = 0x%08x\n", info->ringHandle); - - - if (drmAddMap(ctx->drmFD, info->ringReadOffset, info->ringReadMapSize, - DRM_AGP, DRM_READ_ONLY, &info->ringReadPtrHandle) < 0) { - fprintf(stderr, - "[gart] Could not add ring read ptr mapping\n"); - return 0; - } - - fprintf(stderr, - "[gart] ring read ptr handle = 0x%08lx\n", - info->ringReadPtrHandle); - - if (drmAddMap(ctx->drmFD, info->bufStart, info->bufMapSize, - DRM_AGP, 0, &info->bufHandle) < 0) { - fprintf(stderr, - "[gart] Could not add vertex/indirect buffers mapping\n"); - return 0; - } - fprintf(stderr, - "[gart] vertex/indirect buffers handle = 0x%08x\n", - info->bufHandle); - - if (drmAddMap(ctx->drmFD, info->gartTexStart, info->gartTexMapSize, - DRM_AGP, 0, &info->gartTexHandle) < 0) { - fprintf(stderr, - "[gart] Could not add AGP texture map mapping\n"); - return 0; - } - fprintf(stderr, - "[gart] AGP texture map handle = 0x%08lx\n", - info->gartTexHandle); - - /* Initialize Radeon's AGP registers */ - /* Ring buffer is at AGP offset 0 */ - OUTREG(RADEON_AGP_BASE, info->ringHandle); - - return 1; -} - -/* Initialize the PCI GART state. Request memory for use in PCI space, - * and initialize the Radeon registers to point to that memory. - */ -static int RADEONDRIPciInit(const DRIDriverContext *ctx, RADEONInfoPtr info) -{ - int ret; - int flags = DRM_READ_ONLY | DRM_LOCKED | DRM_KERNEL; - int s, l; - - ret = drmScatterGatherAlloc(ctx->drmFD, info->gartSize*1024*1024, - &info->gartMemHandle); - if (ret < 0) { - fprintf(stderr, "[pci] Out of memory (%d)\n", ret); - return 0; - } - fprintf(stderr, - "[pci] %d kB allocated with handle 0x%08lx\n", - info->gartSize*1024, info->gartMemHandle); - - info->gartOffset = 0; - - /* Initialize the CP ring buffer data */ - info->ringStart = info->gartOffset; - info->ringMapSize = info->ringSize*1024*1024 + radeon_drm_page_size; - - info->ringReadOffset = info->ringStart + info->ringMapSize; - info->ringReadMapSize = radeon_drm_page_size; - - /* Reserve space for vertex/indirect buffers */ - info->bufStart = info->ringReadOffset + info->ringReadMapSize; - info->bufMapSize = info->bufSize*1024*1024; - - /* Reserve the rest for AGP textures */ - info->gartTexStart = info->bufStart + info->bufMapSize; - s = (info->gartSize*1024*1024 - info->gartTexStart); - l = RADEONMinBits((s-1) / RADEON_NR_TEX_REGIONS); - if (l < RADEON_LOG_TEX_GRANULARITY) l = RADEON_LOG_TEX_GRANULARITY; - info->gartTexMapSize = (s >> l) << l; - info->log2GARTTexGran = l; - - if (drmAddMap(ctx->drmFD, info->ringStart, info->ringMapSize, - DRM_SCATTER_GATHER, flags, &info->ringHandle) < 0) { - fprintf(stderr, - "[pci] Could not add ring mapping\n"); - return 0; - } - fprintf(stderr, - "[pci] ring handle = 0x%08x\n", info->ringHandle); - - if (drmAddMap(ctx->drmFD, info->ringReadOffset, info->ringReadMapSize, - DRM_SCATTER_GATHER, flags, &info->ringReadPtrHandle) < 0) { - fprintf(stderr, - "[pci] Could not add ring read ptr mapping\n"); - return 0; - } - fprintf(stderr, - "[pci] ring read ptr handle = 0x%08lx\n", - info->ringReadPtrHandle); - - if (drmAddMap(ctx->drmFD, info->bufStart, info->bufMapSize, - DRM_SCATTER_GATHER, 0, &info->bufHandle) < 0) { - fprintf(stderr, - "[pci] Could not add vertex/indirect buffers mapping\n"); - return 0; - } - fprintf(stderr, - "[pci] vertex/indirect buffers handle = 0x%08lx\n", - info->bufHandle); - - if (drmAddMap(ctx->drmFD, info->gartTexStart, info->gartTexMapSize, - DRM_SCATTER_GATHER, 0, &info->gartTexHandle) < 0) { - fprintf(stderr, - "[pci] Could not add GART texture map mapping\n"); - return 0; - } - fprintf(stderr, - "[pci] GART texture map handle = 0x%08x\n", - info->gartTexHandle); - - return 1; -} - - -/** - * \brief Initialize the kernel data structures and enable the CP engine. - * - * \param ctx display handle. - * \param info driver private data. - * - * \return non-zero on success, or zero on failure. - * - * This function is a wrapper around the DRM_RADEON_CP_INIT command, passing - * all the parameters in a drm_radeon_init_t structure. - */ -static int RADEONDRIKernelInit( const DRIDriverContext *ctx, - RADEONInfoPtr info) -{ - int cpp = ctx->bpp / 8; - drm_radeon_init_t drmInfo; - int ret; - - memset(&drmInfo, 0, sizeof(drm_radeon_init_t)); - - if ( (info->ChipFamily == CHIP_FAMILY_R200) || - (info->ChipFamily == CHIP_FAMILY_RV250) || - (info->ChipFamily == CHIP_FAMILY_M9) || - (info->ChipFamily == CHIP_FAMILY_RV280) ) - drmInfo.func = RADEON_INIT_R200_CP; - else - drmInfo.func = RADEON_INIT_CP; - - /* This is the struct passed to the kernel module for its initialization */ - drmInfo.sarea_priv_offset = sizeof(drm_sarea_t); - drmInfo.is_pci = ctx->isPCI; - drmInfo.cp_mode = RADEON_DEFAULT_CP_BM_MODE; - drmInfo.gart_size = info->gartSize*1024*1024; - drmInfo.ring_size = info->ringSize*1024*1024; - drmInfo.usec_timeout = 1000; - drmInfo.fb_bpp = ctx->bpp; - drmInfo.depth_bpp = ctx->bpp; - drmInfo.front_offset = info->frontOffset; - drmInfo.front_pitch = info->frontPitch * cpp; - drmInfo.back_offset = info->backOffset; - drmInfo.back_pitch = info->backPitch * cpp; - drmInfo.depth_offset = info->depthOffset; - drmInfo.depth_pitch = info->depthPitch * cpp; - drmInfo.fb_offset = info->LinearAddr; - drmInfo.mmio_offset = info->registerHandle; - drmInfo.ring_offset = info->ringHandle; - drmInfo.ring_rptr_offset = info->ringReadPtrHandle; - drmInfo.buffers_offset = info->bufHandle; - drmInfo.gart_textures_offset = info->gartTexHandle; - - ret = drmCommandWrite(ctx->drmFD, DRM_RADEON_CP_INIT, &drmInfo, - sizeof(drm_radeon_init_t)); - - return ret >= 0; -} - - -/** - * \brief Initialize the AGP heap. - * - * \param ctx display handle. - * \param info driver private data. - * - * This function is a wrapper around the DRM_RADEON_INIT_HEAP command, passing - * all the parameters in a drm_radeon_mem_init_heap structure. - */ -static void RADEONDRIAgpHeapInit(const DRIDriverContext *ctx, - RADEONInfoPtr info) -{ - drm_radeon_mem_init_heap_t drmHeap; - - /* Start up the simple memory manager for gart space */ - drmHeap.region = RADEON_MEM_REGION_GART; - drmHeap.start = 0; - drmHeap.size = info->gartTexMapSize; - - if (drmCommandWrite(ctx->drmFD, DRM_RADEON_INIT_HEAP, - &drmHeap, sizeof(drmHeap))) { - fprintf(stderr, - "[drm] Failed to initialized gart heap manager\n"); - } else { - fprintf(stderr, - "[drm] Initialized kernel gart heap manager, %d\n", - info->gartTexMapSize); - } -} - -/** - * \brief Add a map for the vertex buffers that will be accessed by any - * DRI-based clients. - * - * \param ctx display handle. - * \param info driver private data. - * - * \return one on success, or zero on failure. - * - * Calls drmAddBufs() with the previously allocated vertex buffers. - */ -static int RADEONDRIBufInit( const DRIDriverContext *ctx, RADEONInfoPtr info ) -{ - /* Initialize vertex buffers */ - info->bufNumBufs = drmAddBufs(ctx->drmFD, - info->bufMapSize / RADEON_BUFFER_SIZE, - RADEON_BUFFER_SIZE, - ctx->isPCI ? DRM_SG_BUFFER : DRM_AGP_BUFFER, - info->bufStart); - - if (info->bufNumBufs <= 0) { - fprintf(stderr, - "[drm] Could not create vertex/indirect buffers list\n"); - return 0; - } - fprintf(stderr, - "[drm] Added %d %d byte vertex/indirect buffers\n", - info->bufNumBufs, RADEON_BUFFER_SIZE); - - return 1; -} - -/** - * \brief Install an IRQ handler. - * - * \param ctx display handle. - * \param info driver private data. - * - * Attempts to install an IRQ handler via drmCtlInstHandler(), falling back to - * IRQ-free operation on failure. - */ -static void RADEONDRIIrqInit(const DRIDriverContext *ctx, - RADEONInfoPtr info) -{ - if (!info->irq) { - info->irq = drmGetInterruptFromBusID(ctx->drmFD, - ctx->pciBus, - ctx->pciDevice, - ctx->pciFunc); - - if ((drmCtlInstHandler(ctx->drmFD, info->irq)) != 0) { - fprintf(stderr, - "[drm] failure adding irq handler, " - "there is a device already using that irq\n" - "[drm] falling back to irq-free operation\n"); - info->irq = 0; - } - } - - if (info->irq) - fprintf(stderr, - "[drm] dma control initialized, using IRQ %d\n", - info->irq); -} - -static int RADEONCheckDRMVersion( const DRIDriverContext *ctx, - RADEONInfoPtr info ) -{ - drmVersionPtr version; - - version = drmGetVersion(ctx->drmFD); - if (version) { - int req_minor, req_patch; - - /* Need 1.8.x for proper cleanup-on-client-exit behaviour. - */ - req_minor = 8; - req_patch = 0; - - if (version->version_major != 1 || - version->version_minor < req_minor || - (version->version_minor == req_minor && - version->version_patchlevel < req_patch)) { - /* Incompatible drm version */ - fprintf(stderr, - "[dri] RADEONDRIScreenInit failed because of a version " - "mismatch.\n" - "[dri] radeon.o kernel module version is %d.%d.%d " - "but version 1.%d.%d or newer is needed.\n" - "[dri] Disabling DRI.\n", - version->version_major, - version->version_minor, - version->version_patchlevel, - req_minor, - req_patch); - drmFreeVersion(version); - return 0; - } - - info->drmMinor = version->version_minor; - drmFreeVersion(version); - } - - return 1; -} - -static int RADEONMemoryInit( const DRIDriverContext *ctx, RADEONInfoPtr info ) -{ - int width_bytes = ctx->shared.virtualWidth * ctx->cpp; - int cpp = ctx->cpp; - int bufferSize = ((((ctx->shared.virtualHeight+15) & ~15) * width_bytes + RADEON_BUFFER_ALIGN) & ~RADEON_BUFFER_ALIGN); - int depthSize = ((((ctx->shared.virtualHeight+15) & ~15) * width_bytes - + RADEON_BUFFER_ALIGN) & ~RADEON_BUFFER_ALIGN); - int l; - - info->frontOffset = 0; - info->frontPitch = ctx->shared.virtualWidth; - - fprintf(stderr, - "Using %d MB AGP aperture\n", info->gartSize); - fprintf(stderr, - "Using %d MB for the ring buffer\n", info->ringSize); - fprintf(stderr, - "Using %d MB for vertex/indirect buffers\n", info->bufSize); - fprintf(stderr, - "Using %d MB for AGP textures\n", info->gartTexSize); - - /* Front, back and depth buffers - everything else texture?? - */ - info->textureSize = ctx->shared.fbSize - 2 * bufferSize - depthSize; - - if (ctx->colorTiling==1) - { - info->textureSize = ctx->shared.fbSize - ((ctx->shared.fbSize - info->textureSize + width_bytes * 16 - 1) / (width_bytes * 16)) * (width_bytes*16); - } - - if (info->textureSize < 0) - return 0; - - l = RADEONMinBits((info->textureSize-1) / RADEON_NR_TEX_REGIONS); - if (l < RADEON_LOG_TEX_GRANULARITY) l = RADEON_LOG_TEX_GRANULARITY; - - /* Round the texture size up to the nearest whole number of - * texture regions. Again, be greedy about this, don't - * round down. - */ - info->log2TexGran = l; - info->textureSize = (info->textureSize >> l) << l; - - /* Set a minimum usable local texture heap size. This will fit - * two 256x256x32bpp textures. - */ - if (info->textureSize < 512 * 1024) { - info->textureOffset = 0; - info->textureSize = 0; - } - - /* Reserve space for textures */ - if (ctx->colorTiling==1) - { - info->textureOffset = ((ctx->shared.fbSize - info->textureSize) / - (width_bytes * 16)) * (width_bytes*16); - } - else - { - info->textureOffset = ((ctx->shared.fbSize - info->textureSize + - RADEON_BUFFER_ALIGN) & - ~RADEON_BUFFER_ALIGN); - } - /* Reserve space for the shared depth - * buffer. - */ - info->depthOffset = ((info->textureOffset - depthSize + - RADEON_BUFFER_ALIGN) & - ~RADEON_BUFFER_ALIGN); - info->depthPitch = ctx->shared.virtualWidth; - - info->backOffset = ((info->depthOffset - bufferSize + - RADEON_BUFFER_ALIGN) & - ~RADEON_BUFFER_ALIGN); - info->backPitch = ctx->shared.virtualWidth; - - - fprintf(stderr, - "Will use back buffer at offset 0x%x\n", - info->backOffset); - fprintf(stderr, - "Will use depth buffer at offset 0x%x\n", - info->depthOffset); - fprintf(stderr, - "Will use %d kb for textures at offset 0x%x\n", - info->textureSize/1024, info->textureOffset); - - info->frontPitchOffset = (((info->frontPitch * cpp / 64) << 22) | - (info->frontOffset >> 10)); - - info->backPitchOffset = (((info->backPitch * cpp / 64) << 22) | - (info->backOffset >> 10)); - - info->depthPitchOffset = (((info->depthPitch * cpp / 64) << 22) | - (info->depthOffset >> 10)); - - return 1; -} - -static int RADEONColorTilingInit( const DRIDriverContext *ctx, RADEONInfoPtr info ) -{ - int width_bytes = ctx->shared.virtualWidth * ctx->cpp; - int bufferSize = ((((ctx->shared.virtualHeight+15) & ~15) * width_bytes + RADEON_BUFFER_ALIGN) - & ~RADEON_BUFFER_ALIGN); - /* Setup color tiling */ - if (info->drmMinor<14) - info->colorTiling=0; - - if (info->colorTiling) - { - - int colorTilingFlag; - drm_radeon_surface_alloc_t front,back; - - RadeonSetParam(ctx, RADEON_SETPARAM_SWITCH_TILING, info->colorTiling ? 1 : 0); - - /* Setup the surfaces */ - if (info->ChipFamily < CHIP_FAMILY_R200) - colorTilingFlag=RADEON_SURF_TILE_COLOR_MACRO; - else - colorTilingFlag=R200_SURF_TILE_COLOR_MACRO; - - front.address = info->frontOffset; - front.size = bufferSize; - front.flags = (width_bytes) | colorTilingFlag; - drmCommandWrite(ctx->drmFD, DRM_RADEON_SURF_ALLOC, &front,sizeof(front)); - - back.address = info->backOffset; - back.size = bufferSize; - back.flags = (width_bytes) | colorTilingFlag; - drmCommandWrite(ctx->drmFD, DRM_RADEON_SURF_ALLOC, &back,sizeof(back)); - - } - return 1; -} - - - -/** - * Called at the start of each server generation. - * - * \param ctx display handle. - * \param info driver private data. - * - * \return non-zero on success, or zero on failure. - * - * Performs static frame buffer allocation. Opens the DRM device and add maps - * to the SAREA, framebuffer and MMIO regions. Fills in \p info with more - * information. Creates a \e server context to grab the lock for the - * initialization ioctls and calls the other initilization functions in this - * file. Starts the CP engine via the DRM_RADEON_CP_START command. - * - * Setups a RADEONDRIRec structure to be passed to radeon_dri.so for its - * initialization. - */ -static int RADEONScreenInit( DRIDriverContext *ctx, RADEONInfoPtr info ) -{ - RADEONDRIPtr pRADEONDRI; - int err; - - usleep(100); - /*assert(!ctx->IsClient);*/ - - { - int width_bytes = (ctx->shared.virtualWidth * ctx->cpp); - int maxy = ctx->shared.fbSize / width_bytes; - - - if (maxy <= ctx->shared.virtualHeight * 3) { - fprintf(stderr, - "Static buffer allocation failed -- " - "need at least %d kB video memory (have %d kB)\n", - (ctx->shared.virtualWidth * ctx->shared.virtualHeight * - ctx->cpp * 3 + 1023) / 1024, - ctx->shared.fbSize / 1024); - return 0; - } - } - - - if (info->ChipFamily >= CHIP_FAMILY_R300) { - fprintf(stderr, - "Direct rendering not yet supported on " - "Radeon 9700 and newer cards\n"); - return 0; - } - - radeon_drm_page_size = getpagesize(); - - info->registerSize = ctx->MMIOSize; - ctx->shared.SAREASize = SAREA_MAX; - - /* Note that drmOpen will try to load the kernel module, if needed. */ - ctx->drmFD = drmOpen("radeon", NULL ); - if (ctx->drmFD < 0) { - fprintf(stderr, "[drm] drmOpen failed\n"); - return 0; - } - - if ((err = drmSetBusid(ctx->drmFD, ctx->pciBusID)) < 0) { - fprintf(stderr, "[drm] drmSetBusid failed (%d, %s), %s\n", - ctx->drmFD, ctx->pciBusID, strerror(-err)); - return 0; - } - - if (drmAddMap( ctx->drmFD, - 0, - ctx->shared.SAREASize, - DRM_SHM, - DRM_CONTAINS_LOCK, - &ctx->shared.hSAREA) < 0) - { - fprintf(stderr, "[drm] drmAddMap failed\n"); - return 0; - } - fprintf(stderr, "[drm] added %d byte SAREA at 0x%08lx\n", - ctx->shared.SAREASize, ctx->shared.hSAREA); - - if (drmMap( ctx->drmFD, - ctx->shared.hSAREA, - ctx->shared.SAREASize, - (drmAddressPtr)(&ctx->pSAREA)) < 0) - { - fprintf(stderr, "[drm] drmMap failed\n"); - return 0; - } - memset(ctx->pSAREA, 0, ctx->shared.SAREASize); - fprintf(stderr, "[drm] mapped SAREA 0x%08lx to %p, size %d\n", - ctx->shared.hSAREA, ctx->pSAREA, ctx->shared.SAREASize); - - /* Need to AddMap the framebuffer and mmio regions here: - */ - if (drmAddMap( ctx->drmFD, - (drm_handle_t)ctx->FBStart, - ctx->FBSize, - DRM_FRAME_BUFFER, -#ifndef _EMBEDDED - 0, -#else - DRM_READ_ONLY, -#endif - &ctx->shared.hFrameBuffer) < 0) - { - fprintf(stderr, "[drm] drmAddMap framebuffer failed\n"); - return 0; - } - - fprintf(stderr, "[drm] framebuffer handle = 0x%08lx\n", - ctx->shared.hFrameBuffer); - - - - if (drmAddMap(ctx->drmFD, - ctx->MMIOStart, - ctx->MMIOSize, - DRM_REGISTERS, - DRM_READ_ONLY, - &info->registerHandle) < 0) { - fprintf(stderr, "[drm] drmAddMap mmio failed\n"); - return 0; - } - fprintf(stderr, - "[drm] register handle = 0x%08lx\n", info->registerHandle); - - /* Check the radeon DRM version */ - if (!RADEONCheckDRMVersion(ctx, info)) { - return 0; - } - - if (ctx->isPCI) { - /* Initialize PCI */ - if (!RADEONDRIPciInit(ctx, info)) - return 0; - } - else { - /* Initialize AGP */ - if (!RADEONDRIAgpInit(ctx, info)) - return 0; - } - - /* Memory manager setup */ - if (!RADEONMemoryInit(ctx, info)) { - return 0; - } - - /* Create a 'server' context so we can grab the lock for - * initialization ioctls. - */ - if ((err = drmCreateContext(ctx->drmFD, &ctx->serverContext)) != 0) { - fprintf(stderr, "%s: drmCreateContext failed %d\n", __FUNCTION__, err); - return 0; - } - - DRM_LOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext, 0); - - /* Initialize the kernel data structures */ - if (!RADEONDRIKernelInit(ctx, info)) { - fprintf(stderr, "RADEONDRIKernelInit failed\n"); - DRM_UNLOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext); - return 0; - } - - /* Initialize the vertex buffers list */ - if (!RADEONDRIBufInit(ctx, info)) { - fprintf(stderr, "RADEONDRIBufInit failed\n"); - DRM_UNLOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext); - return 0; - } - - RADEONColorTilingInit(ctx, info); - - /* Initialize IRQ */ - RADEONDRIIrqInit(ctx, info); - - /* Initialize kernel gart memory manager */ - RADEONDRIAgpHeapInit(ctx, info); - - fprintf(stderr,"color tiling %sabled\n", info->colorTiling?"en":"dis"); - fprintf(stderr,"page flipping %sabled\n", info->page_flip_enable?"en":"dis"); - /* Initialize the SAREA private data structure */ - { - drm_radeon_sarea_t *pSAREAPriv; - pSAREAPriv = (drm_radeon_sarea_t *)(((char*)ctx->pSAREA) + - sizeof(drm_sarea_t)); - memset(pSAREAPriv, 0, sizeof(*pSAREAPriv)); - pSAREAPriv->pfState = info->page_flip_enable; - } - - - /* Quick hack to clear the front & back buffers. Could also use - * the clear ioctl to do this, but would need to setup hw state - * first. - */ - drimemsetio((char *)ctx->FBAddress + info->frontOffset, - 0, - info->frontPitch * ctx->cpp * ctx->shared.virtualHeight ); - - drimemsetio((char *)ctx->FBAddress + info->backOffset, - 0, - info->backPitch * ctx->cpp * ctx->shared.virtualHeight ); - - /* This is the struct passed to radeon_dri.so for its initialization */ - ctx->driverClientMsg = malloc(sizeof(RADEONDRIRec)); - ctx->driverClientMsgSize = sizeof(RADEONDRIRec); - pRADEONDRI = (RADEONDRIPtr)ctx->driverClientMsg; - pRADEONDRI->deviceID = info->Chipset; - pRADEONDRI->width = ctx->shared.virtualWidth; - pRADEONDRI->height = ctx->shared.virtualHeight; - pRADEONDRI->depth = ctx->bpp; /* XXX: depth */ - pRADEONDRI->bpp = ctx->bpp; - pRADEONDRI->IsPCI = ctx->isPCI; - pRADEONDRI->AGPMode = ctx->agpmode; - pRADEONDRI->frontOffset = info->frontOffset; - pRADEONDRI->frontPitch = info->frontPitch; - pRADEONDRI->backOffset = info->backOffset; - pRADEONDRI->backPitch = info->backPitch; - pRADEONDRI->depthOffset = info->depthOffset; - pRADEONDRI->depthPitch = info->depthPitch; - pRADEONDRI->textureOffset = info->textureOffset; - pRADEONDRI->textureSize = info->textureSize; - pRADEONDRI->log2TexGran = info->log2TexGran; - pRADEONDRI->registerHandle = info->registerHandle; - pRADEONDRI->registerSize = info->registerSize; - pRADEONDRI->statusHandle = info->ringReadPtrHandle; - pRADEONDRI->statusSize = info->ringReadMapSize; - pRADEONDRI->gartTexHandle = info->gartTexHandle; - pRADEONDRI->gartTexMapSize = info->gartTexMapSize; - pRADEONDRI->log2GARTTexGran = info->log2GARTTexGran; - pRADEONDRI->gartTexOffset = info->gartTexStart; - pRADEONDRI->sarea_priv_offset = sizeof(drm_sarea_t); - - /* Don't release the lock now - let the VT switch handler do it. */ - - return 1; -} - - -/** - * \brief Get Radeon chip family from chipset number. - * - * \param info driver private data. - * - * \return non-zero on success, or zero on failure. - * - * Called by radeonInitFBDev() to set RADEONInfoRec::ChipFamily - * according to the value of RADEONInfoRec::Chipset. Fails if the - * chipset is unrecognized or not appropriate for this driver (i.e., not - * an r100 style radeon) - */ -static int get_chipfamily_from_chipset( RADEONInfoPtr info ) -{ - switch (info->Chipset) { - case PCI_CHIP_RADEON_LY: - case PCI_CHIP_RADEON_LZ: - info->ChipFamily = CHIP_FAMILY_M6; - break; - - case PCI_CHIP_RADEON_QY: - case PCI_CHIP_RADEON_QZ: - info->ChipFamily = CHIP_FAMILY_VE; - break; - - case PCI_CHIP_R200_QL: - case PCI_CHIP_R200_QN: - case PCI_CHIP_R200_QO: - case PCI_CHIP_R200_Ql: - case PCI_CHIP_R200_BB: - info->ChipFamily = CHIP_FAMILY_R200; - break; - - case PCI_CHIP_RV200_QW: /* RV200 desktop */ - case PCI_CHIP_RV200_QX: - info->ChipFamily = CHIP_FAMILY_RV200; - break; - - case PCI_CHIP_RADEON_LW: - case PCI_CHIP_RADEON_LX: - info->ChipFamily = CHIP_FAMILY_M7; - break; - - case PCI_CHIP_RV250_Id: - case PCI_CHIP_RV250_Ie: - case PCI_CHIP_RV250_If: - case PCI_CHIP_RV250_Ig: - info->ChipFamily = CHIP_FAMILY_RV250; - break; - - case PCI_CHIP_RV250_Ld: - case PCI_CHIP_RV250_Le: - case PCI_CHIP_RV250_Lf: - case PCI_CHIP_RV250_Lg: - info->ChipFamily = CHIP_FAMILY_M9; - break; - - case PCI_CHIP_RV280_Y_: - case PCI_CHIP_RV280_Ya: - case PCI_CHIP_RV280_Yb: - case PCI_CHIP_RV280_Yc: - info->ChipFamily = CHIP_FAMILY_RV280; - break; - - case PCI_CHIP_R300_ND: - case PCI_CHIP_R300_NE: - case PCI_CHIP_R300_NF: - case PCI_CHIP_R300_NG: - info->ChipFamily = CHIP_FAMILY_R300; - break; - - default: - /* Original Radeon/7200 */ - info->ChipFamily = CHIP_FAMILY_RADEON; - } - - return 1; -} - - -/** - * \brief Validate the fbdev mode. - * - * \param ctx display handle. - * - * \return one on success, or zero on failure. - * - * Saves some registers and returns 1. - * - * \sa radeonValidateMode(). - */ -static int radeonValidateMode( const DRIDriverContext *ctx ) -{ - unsigned char *RADEONMMIO = ctx->MMIOAddress; - RADEONInfoPtr info = ctx->driverPrivate; - - info->gen_int_cntl = INREG(RADEON_GEN_INT_CNTL); - info->crtc_offset_cntl = INREG(RADEON_CRTC_OFFSET_CNTL); - - if (info->colorTiling) - info->crtc_offset_cntl |= RADEON_CRTC_TILE_EN; - return 1; -} - - -/** - * \brief Examine mode returned by fbdev. - * - * \param ctx display handle. - * - * \return one on success, or zero on failure. - * - * Restores registers that fbdev has clobbered and returns 1. - * - * \sa radeonValidateMode(). - */ -static int radeonPostValidateMode( const DRIDriverContext *ctx ) -{ - unsigned char *RADEONMMIO = ctx->MMIOAddress; - RADEONInfoPtr info = ctx->driverPrivate; - - RADEONColorTilingInit( ctx, info); - OUTREG(RADEON_GEN_INT_CNTL, info->gen_int_cntl); - if (info->colorTiling) - info->crtc_offset_cntl |= RADEON_CRTC_TILE_EN; - OUTREG(RADEON_CRTC_OFFSET_CNTL, info->crtc_offset_cntl); - - return 1; -} - - -/** - * \brief Initialize the framebuffer device mode - * - * \param ctx display handle. - * - * \return one on success, or zero on failure. - * - * Fills in \p info with some default values and some information from \p ctx - * and then calls RADEONScreenInit() for the screen initialization. - * - * Before exiting clears the framebuffer memory accessing it directly. - */ -static int radeonInitFBDev( DRIDriverContext *ctx ) -{ - RADEONInfoPtr info = calloc(1, sizeof(*info)); - - { - int dummy = ctx->shared.virtualWidth; - - if (ctx->colorTiling==1) - { - switch (ctx->bpp / 8) { - case 1: dummy = (ctx->shared.virtualWidth + 255) & ~255; break; - case 2: dummy = (ctx->shared.virtualWidth + 127) & ~127; break; - case 3: - case 4: dummy = (ctx->shared.virtualWidth + 63) & ~63; break; - } - } else { - switch (ctx->bpp / 8) { - case 1: dummy = (ctx->shared.virtualWidth + 127) & ~127; break; - case 2: dummy = (ctx->shared.virtualWidth + 31) & ~31; break; - case 3: - case 4: dummy = (ctx->shared.virtualWidth + 15) & ~15; break; - } - } - - ctx->shared.virtualWidth = dummy; - ctx->shared.Width = dummy; - } - - fprintf(stderr,"shared virtual width is %d\n", ctx->shared.virtualWidth); - ctx->driverPrivate = (void *)info; - - info->gartFastWrite = RADEON_DEFAULT_AGP_FAST_WRITE; - info->gartSize = RADEON_DEFAULT_AGP_SIZE; - info->gartTexSize = RADEON_DEFAULT_AGP_TEX_SIZE; - info->bufSize = RADEON_DEFAULT_BUFFER_SIZE; - info->ringSize = RADEON_DEFAULT_RING_SIZE; - info->page_flip_enable = RADEON_DEFAULT_PAGE_FLIP; - info->colorTiling = ctx->colorTiling; - - info->Chipset = ctx->chipset; - - if (!get_chipfamily_from_chipset( info )) { - fprintf(stderr, "Unknown or non-radeon chipset -- cannot continue\n"); - fprintf(stderr, "==> Verify PCI BusID is correct in miniglx.conf\n"); - return 0; - } - - info->frontPitch = ctx->shared.virtualWidth; - info->LinearAddr = ctx->FBStart & 0xfc000000; - - - if (!RADEONScreenInit( ctx, info )) - return 0; - - - return 1; -} - - -/** - * \brief The screen is being closed, so clean up any state and free any - * resources used by the DRI. - * - * \param ctx display handle. - * - * Unmaps the SAREA, closes the DRM device file descriptor and frees the driver - * private data. - */ -static void radeonHaltFBDev( DRIDriverContext *ctx ) -{ - drmUnmap( ctx->pSAREA, ctx->shared.SAREASize ); - drmClose(ctx->drmFD); - - if (ctx->driverPrivate) { - free(ctx->driverPrivate); - ctx->driverPrivate = 0; - } -} - - -extern void radeonNotifyFocus( int ); - -/** - * \brief Exported driver interface for Mini GLX. - * - * \sa DRIDriverRec. - */ -const struct DRIDriverRec __driDriver = { - radeonValidateMode, - radeonPostValidateMode, - radeonInitFBDev, - radeonHaltFBDev, - RADEONEngineShutdown, - RADEONEngineRestore, -#ifndef _EMBEDDED - 0, -#else - radeonNotifyFocus, -#endif -}; diff --git a/src/mesa/drivers/dri/savage/Makefile b/src/mesa/drivers/dri/savage/Makefile index 2e5c40802c..53511552c6 100644 --- a/src/mesa/drivers/dri/savage/Makefile +++ b/src/mesa/drivers/dri/savage/Makefile @@ -5,9 +5,6 @@ include $(TOP)/configs/current LIBNAME = savage_dri.so -# Doesn't exist yet. -#MINIGLX_SOURCES = server/savage_dri.c - DRIVER_SOURCES = \ savage_xmesa.c \ savagedd.c \ diff --git a/src/mesa/drivers/dri/sis/Makefile b/src/mesa/drivers/dri/sis/Makefile index ad009fc239..6b4f938bab 100644 --- a/src/mesa/drivers/dri/sis/Makefile +++ b/src/mesa/drivers/dri/sis/Makefile @@ -5,10 +5,6 @@ include $(TOP)/configs/current LIBNAME = sis_dri.so - -# Not yet -# MINIGLX_SOURCES = server/sis_dri.c - DRIVER_SOURCES = \ sis6326_state.c \ sis6326_clear.c \ diff --git a/src/mesa/drivers/dri/tdfx/Makefile b/src/mesa/drivers/dri/tdfx/Makefile index b9f25db4fe..96bd8f8202 100644 --- a/src/mesa/drivers/dri/tdfx/Makefile +++ b/src/mesa/drivers/dri/tdfx/Makefile @@ -5,9 +5,6 @@ include $(TOP)/configs/current LIBNAME = tdfx_dri.so -# not yet -# MINIGLX_SOURCES = server/tdfx_dri.c - DRIVER_SOURCES = \ tdfx_context.c \ tdfx_dd.c \ diff --git a/src/mesa/drivers/dri/tdfx/server/tdfx_dri.c b/src/mesa/drivers/dri/tdfx/server/tdfx_dri.c deleted file mode 100644 index 63fe875f59..0000000000 --- a/src/mesa/drivers/dri/tdfx/server/tdfx_dri.c +++ /dev/null @@ -1,471 +0,0 @@ -/* - * Mesa 3-D graphics library - * Version: 5.1 - * - * Copyright (C) 1999-2003 Brian Paul All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included - * in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN - * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - */ - -/* Authors: - * Keith Whitwell - * Daniel Borca - */ - - -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <errno.h> -#include <unistd.h> - -#include "driver.h" -#include "drm.h" -#include "imports.h" - -#include "dri_util.h" - -#include "tdfx_context.h" -#include "tdfx_dri.h" -#include "xf86drm.h" - - -#define TILE_WIDTH 128 -#define TILE_HEIGHT 32 - -#define CMDFIFO_PAGES 64 - - -static int -calcBufferStride (int xres, int tiled, int cpp) -{ - int strideInTiles; - - if (tiled) { - /* Calculate tile width stuff */ - strideInTiles = (xres+TILE_WIDTH-1)/TILE_WIDTH; - - return strideInTiles*cpp*TILE_WIDTH; - } else { - return xres*cpp; - } -} /* calcBufferStride */ - - -static int -calcBufferHeightInTiles (int yres) -{ - int heightInTiles; /* Height of buffer in tiles */ - - /* Calculate tile height stuff */ - heightInTiles = yres >> 5; - - if (yres & (TILE_HEIGHT - 1)) - heightInTiles++; - - return heightInTiles; - -} /* calcBufferHeightInTiles */ - - -static int -calcBufferSize (int xres, int yres, int tiled, int cpp) -{ - int stride, height, bufSize; - - if (tiled) { - stride = calcBufferStride(xres, tiled, cpp); - height = TILE_HEIGHT * calcBufferHeightInTiles(yres); - } else { - stride = xres*cpp; - height = yres; - } - - bufSize = stride * height; - - return bufSize; -} /* calcBufferSize */ - - -static void allocateMemory (const DRIDriverContext *ctx, TDFXDRIPtr pTDFX) -{ - int memRemaining, fifoSize, screenSizeInTiles; - int fbSize; - char *str; - int pixmapCacheLinesMin; - int cursorOffset, cursorSize; - - pTDFX->stride = calcBufferStride(pTDFX->width, !0, pTDFX->cpp); - - /* enough to do DVD */ - pixmapCacheLinesMin = ((720*480*pTDFX->cpp) + - pTDFX->stride - 1)/pTDFX->stride; - - if (pTDFX->deviceID > PCI_CHIP_VOODOO3) { - if ((pixmapCacheLinesMin + pTDFX->height) > 4095) - pixmapCacheLinesMin = 4095 - pTDFX->height; - } else { - if ((pixmapCacheLinesMin + pTDFX->height) > 2047) - pixmapCacheLinesMin = 2047 - pTDFX->height; - } - - if (pTDFX->cpp!=3) { - screenSizeInTiles=calcBufferSize(pTDFX->width, pTDFX->height, - !0, pTDFX->cpp); - } - else { - /* cpp==3 needs to bump up to 4 */ - screenSizeInTiles=calcBufferSize(pTDFX->width, pTDFX->height, - !0, 4); - } - - /* - * Layout is: - * cursor, fifo, fb, tex, bb, db - */ - - fbSize = (pTDFX->height + pixmapCacheLinesMin) * pTDFX->stride; - - memRemaining=(pTDFX->mem - 1) &~ 0xFFF; - /* Note that a page is 4096 bytes, and a */ - /* tile is 32 x 128 = 4096 bytes. So, */ - /* page and tile boundaries are the same */ - /* Place the depth offset first, forcing */ - /* it to be on an *odd* page boundary. */ - pTDFX->depthOffset = (memRemaining - screenSizeInTiles) &~ 0xFFF; - if ((pTDFX->depthOffset & (0x1 << 12)) == 0) { - pTDFX->depthOffset -= (0x1 << 12); - } - /* Now, place the back buffer, forcing it */ - /* to be on an *even* page boundary. */ - pTDFX->backOffset = (pTDFX->depthOffset - screenSizeInTiles) &~ 0xFFF; - if (pTDFX->backOffset & (0x1 << 12)) { - pTDFX->backOffset -= (0x1 << 12); - } - /* Give the cmd fifo at least */ - /* CMDFIFO_PAGES pages, but no more than */ - /* 64. NOTE: Don't go higher than 64, as */ - /* there is suspect code in Glide3 ! */ - fifoSize = ((64 <= CMDFIFO_PAGES) ? 64 : CMDFIFO_PAGES) << 12; - - /* We give 4096 bytes to the cursor */ - cursorSize = 0/*4096*/; - cursorOffset = 0; - - pTDFX->fifoOffset = cursorOffset + cursorSize; - pTDFX->fifoSize = fifoSize; - /* Now, place the front buffer, forcing */ - /* it to be on a page boundary too, just */ - /* for giggles. */ - pTDFX->fbOffset = pTDFX->fifoOffset + pTDFX->fifoSize; - pTDFX->textureOffset = pTDFX->fbOffset + fbSize; - if (pTDFX->depthOffset <= pTDFX->textureOffset || - pTDFX->backOffset <= pTDFX->textureOffset) { - /* - * pTDFX->textureSize < 0 means that the DRI is disabled. pTDFX->backOffset - * is used to calculate the maximum amount of memory available for - * 2D offscreen use. With DRI disabled, set this to the top of memory. - */ - - pTDFX->textureSize = -1; - pTDFX->backOffset = pTDFX->mem; - pTDFX->depthOffset = -1; - fprintf(stderr, - "Not enough video memory available for textures and depth buffer\n" - "\tand/or back buffer. Disabling DRI. To use DRI try lower\n" - "\tresolution modes and/or a smaller virtual screen size\n"); - } else { - pTDFX->textureSize = pTDFX->backOffset - pTDFX->textureOffset; - } -} - - -static int createScreen (DRIDriverContext *ctx, TDFXDRIPtr pTDFX) -{ - int err; - - { - int width_bytes = (ctx->shared.virtualWidth * ctx->cpp); - int maxy = ctx->shared.fbSize / width_bytes; - - - if (maxy <= ctx->shared.virtualHeight * 3) { - fprintf(stderr, - "Static buffer allocation failed -- " - "need at least %d kB video memory (have %d kB)\n", - (ctx->shared.virtualWidth * ctx->shared.virtualHeight * - ctx->cpp * 3 + 1023) / 1024, - ctx->shared.fbSize / 1024); - return 0; - } - } - - ctx->shared.SAREASize = SAREA_MAX; - pTDFX->regsSize = ctx->MMIOSize; - - /* Note that drmOpen will try to load the kernel module, if needed. */ - ctx->drmFD = drmOpen("tdfx", NULL ); - if (ctx->drmFD < 0) { - fprintf(stderr, "[drm] drmOpen failed\n"); - return 0; - } - - if ((err = drmSetBusid(ctx->drmFD, ctx->pciBusID)) < 0) { - fprintf(stderr, "[drm] drmSetBusid failed (%d, %s), %s\n", - ctx->drmFD, ctx->pciBusID, strerror(-err)); - return 0; - } - - if (drmAddMap( ctx->drmFD, - 0, - ctx->shared.SAREASize, - DRM_SHM, - DRM_CONTAINS_LOCK, - &ctx->shared.hSAREA) < 0) - { - fprintf(stderr, "[drm] drmAddMap failed\n"); - return 0; - } - fprintf(stderr, "[drm] added %d byte SAREA at 0x%08lx\n", - ctx->shared.SAREASize, ctx->shared.hSAREA); - - if (drmMap( ctx->drmFD, - ctx->shared.hSAREA, - ctx->shared.SAREASize, - (drmAddressPtr)(&ctx->pSAREA)) < 0) - { - fprintf(stderr, "[drm] drmMap failed\n"); - return 0; - } - memset(ctx->pSAREA, 0, ctx->shared.SAREASize); - fprintf(stderr, "[drm] mapped SAREA 0x%08lx to %p, size %d\n", - ctx->shared.hSAREA, ctx->pSAREA, ctx->shared.SAREASize); - - /* Need to AddMap the framebuffer and mmio regions here: - */ - if (drmAddMap( ctx->drmFD, - (drm_handle_t)ctx->FBStart, - ctx->FBSize, - DRM_FRAME_BUFFER, -#ifndef _EMBEDDED - 0, -#else - DRM_READ_ONLY, -#endif - &ctx->shared.hFrameBuffer) < 0) - { - fprintf(stderr, "[drm] drmAddMap framebuffer failed\n"); - return 0; - } - - fprintf(stderr, "[drm] framebuffer handle = 0x%08lx\n", - ctx->shared.hFrameBuffer); - - - if (drmAddMap(ctx->drmFD, - ctx->MMIOStart, - ctx->MMIOSize, - DRM_REGISTERS, - DRM_READ_ONLY, - &pTDFX->regs) < 0) { - fprintf(stderr, "[drm] drmAddMap mmio failed\n"); - return 0; - } - fprintf(stderr, - "[drm] register handle = 0x%08lx\n", pTDFX->regs); - - - /* Create a 'server' context so we can grab the lock for - * initialization ioctls. - */ - if ((err = drmCreateContext(ctx->drmFD, &ctx->serverContext)) != 0) { - fprintf(stderr, "%s: drmCreateContext failed %d\n", __FUNCTION__, err); - return 0; - } - - DRM_LOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext, 0); - - /* Initialize the kernel data structures */ - - /* Initialize kernel gart memory manager */ - allocateMemory(ctx, pTDFX); - - /* Initialize the SAREA private data structure */ - - - /* Quick hack to clear the front & back buffers. Could also use - * the clear ioctl to do this, but would need to setup hw state - * first. - */ - - - /* This is the struct passed to tdfx_dri.so for its initialization */ - ctx->driverClientMsg = malloc(sizeof(TDFXDRIRec)); - ctx->driverClientMsgSize = sizeof(TDFXDRIRec); - memcpy(ctx->driverClientMsg, pTDFX, ctx->driverClientMsgSize); - pTDFX = (TDFXDRIPtr)ctx->driverClientMsg; - - /* Don't release the lock now - let the VT switch handler do it. */ - - return 1; -} - - -/** - * \brief Validate the fbdev mode. - * - * \param ctx display handle. - * - * \return one on success, or zero on failure. - * - * Saves some registers and returns 1. - * - * \sa tdfxValidateMode(). - */ -static int tdfxValidateMode( const DRIDriverContext *ctx ) -{ - return 1; -} - - -/** - * \brief Examine mode returned by fbdev. - * - * \param ctx display handle. - * - * \return one on success, or zero on failure. - * - * Restores registers that fbdev has clobbered and returns 1. - * - * \sa tdfxValidateMode(). - */ -static int tdfxPostValidateMode( const DRIDriverContext *ctx ) -{ - return 1; -} - - -/** - * \brief Initialize the framebuffer device mode - * - * \param ctx display handle. - * - * \return one on success, or zero on failure. - * - * Before exiting clears the framebuffer memory accessing it directly. - */ -static int tdfxInitFBDev( DRIDriverContext *ctx ) -{ - TDFXDRIPtr pTDFX = calloc(1, sizeof(TDFXDRIRec)); - - { - int dummy = ctx->shared.virtualWidth; - - switch (ctx->bpp / 8) { - case 1: dummy = (ctx->shared.virtualWidth + 127) & ~127; break; - case 2: dummy = (ctx->shared.virtualWidth + 31) & ~31; break; - case 3: - case 4: dummy = (ctx->shared.virtualWidth + 15) & ~15; break; - } - - ctx->shared.virtualWidth = dummy; - } - - ctx->driverPrivate = (void *)pTDFX; - - pTDFX->deviceID = ctx->chipset; - pTDFX->width = ctx->shared.virtualWidth; - pTDFX->height = ctx->shared.virtualHeight; - pTDFX->cpp = ctx->cpp; - pTDFX->mem = ctx->FBSize; /* ->shared.fbSize? mem probe? */ - pTDFX->sarea_priv_offset = sizeof(drm_sarea_t); - - if (!createScreen(ctx, pTDFX)) - return 0; - - return 1; -} - - -/** - * \brief The screen is being closed, so clean up any state and free any - * resources used by the DRI. - * - * \param ctx display handle. - * - * Unmaps the SAREA, closes the DRM device file descriptor and frees the driver - * private data. - */ -static void tdfxHaltFBDev( DRIDriverContext *ctx ) -{ - drmUnmap( ctx->pSAREA, ctx->shared.SAREASize ); - drmClose(ctx->drmFD); - - if (ctx->driverPrivate) { - free(ctx->driverPrivate); - ctx->driverPrivate = 0; - } -} - - -/** - * \brief Shutdown the drawing engine. - * - * \param ctx display handle - * - * Turns off the 3D engine & restores the graphics card - * to a state that fbdev understands. - */ -static int tdfxEngineShutdown( const DRIDriverContext *ctx ) -{ - fprintf(stderr, "%s: not implemented\n", __FUNCTION__); - return 1; -} - - -/** - * \brief Restore the drawing engine. - * - * \param ctx display handle - * - * Resets the graphics card and sets initial values for several registers of - * the card's drawing engine. - * - * Turns on 3dfx - */ -static int tdfxEngineRestore( const DRIDriverContext *ctx ) -{ - fprintf(stderr, "%s: not implemented\n", __FUNCTION__); - return 1; -} - - -/** - * \brief Exported driver interface for Mini GLX. - * - * \sa DRIDriverRec. - */ -struct DRIDriverRec __driDriver = { - tdfxValidateMode, - tdfxPostValidateMode, - tdfxInitFBDev, - tdfxHaltFBDev, - tdfxEngineShutdown, - tdfxEngineRestore, - 0 -}; diff --git a/src/mesa/drivers/dri/unichrome/Makefile b/src/mesa/drivers/dri/unichrome/Makefile index 344d34fce3..14cf9f3038 100644 --- a/src/mesa/drivers/dri/unichrome/Makefile +++ b/src/mesa/drivers/dri/unichrome/Makefile @@ -5,8 +5,6 @@ include $(TOP)/configs/current LIBNAME = unichrome_dri.so -MINIGLX_SOURCES = server/via_dri.c - DRIVER_SOURCES = \ via_context.c \ via_fb.c \ diff --git a/src/mesa/drivers/dri/unichrome/server/via_dri.c b/src/mesa/drivers/dri/unichrome/server/via_dri.c deleted file mode 100644 index 74034485e2..0000000000 --- a/src/mesa/drivers/dri/unichrome/server/via_dri.c +++ /dev/null @@ -1,1251 +0,0 @@ -/* - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. - * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <errno.h> -#include <unistd.h> - -#include "driver.h" -#include "drm.h" -#include "imports.h" - -#include "dri_util.h" - -#include "via_context.h" -#include "via_dri.h" -#include "via_driver.h" -#include "xf86drm.h" - -static void VIAEnableMMIO(DRIDriverContext * ctx); -static void VIADisableMMIO(DRIDriverContext * ctx); -static void VIADisableExtendedFIFO(DRIDriverContext *ctx); -static void VIAEnableExtendedFIFO(DRIDriverContext *ctx); -static void VIAInitialize2DEngine(DRIDriverContext *ctx); -static void VIAInitialize3DEngine(DRIDriverContext *ctx); - -static int VIADRIScreenInit(DRIDriverContext * ctx); -static void VIADRICloseScreen(DRIDriverContext * ctx); -static int VIADRIFinishScreenInit(DRIDriverContext * ctx); - -/* _SOLO : missing macros normally defined by X code */ -#define xf86DrvMsg(a, b, ...) fprintf(stderr, __VA_ARGS__) -#define MMIO_IN8(base, addr) ((*(((volatile uint8_t*)base)+(addr)))+0) -#define MMIO_OUT8(base, addr, val) ((*(((volatile uint8_t*)base)+(addr)))=((uint8_t)val)) -#define MMIO_OUT16(base, addr, val) ((*(volatile uint16_t*)(((uint8_t*)base)+(addr)))=((uint16_t)val)) - -#define VIDEO 0 -#define AGP 1 -#define AGP_PAGE_SIZE 4096 -#define AGP_PAGES 8192 -#define AGP_SIZE (AGP_PAGE_SIZE * AGP_PAGES) -#define AGP_CMDBUF_PAGES 512 -#define AGP_CMDBUF_SIZE (AGP_PAGE_SIZE * AGP_CMDBUF_PAGES) - -static char VIAKernelDriverName[] = "via"; -static char VIAClientDriverName[] = "unichrome"; - -static int VIADRIAgpInit(const DRIDriverContext *ctx, VIAPtr pVia); -static int VIADRIPciInit(DRIDriverContext * ctx, VIAPtr pVia); -static int VIADRIFBInit(DRIDriverContext * ctx, VIAPtr pVia); -static int VIADRIKernelInit(DRIDriverContext * ctx, VIAPtr pVia); -static int VIADRIMapInit(DRIDriverContext * ctx, VIAPtr pVia); - -static void VIADRIIrqInit( DRIDriverContext *ctx ) -{ - VIAPtr pVia = VIAPTR(ctx); - VIADRIPtr pVIADRI = pVia->devPrivate; - - pVIADRI->irqEnabled = drmGetInterruptFromBusID(pVia->drmFD, - ctx->pciBus, - ctx->pciDevice, - ctx->pciFunc); - - if ((drmCtlInstHandler(pVia->drmFD, pVIADRI->irqEnabled))) { - xf86DrvMsg(pScreen->myNum, X_WARNING, - "[drm] Failure adding irq handler. " - "Falling back to irq-free operation.\n"); - pVIADRI->irqEnabled = 0; - } - - if (pVIADRI->irqEnabled) - xf86DrvMsg(pScreen->myNum, X_INFO, - "[drm] Irq handler installed, using IRQ %d.\n", - pVIADRI->irqEnabled); -} - -static void VIADRIIrqExit( DRIDriverContext *ctx ) { - VIAPtr pVia = VIAPTR(ctx); - VIADRIPtr pVIADRI = pVia->devPrivate; - - if (pVIADRI->irqEnabled) { - if (drmCtlUninstHandler(pVia->drmFD)) { - xf86DrvMsg(pScreen-myNum, X_INFO,"[drm] Irq handler uninstalled.\n"); - } else { - xf86DrvMsg(pScreen->myNum, X_ERROR, - "[drm] Could not uninstall irq handler.\n"); - } - } -} - -static void VIADRIRingBufferCleanup(DRIDriverContext *ctx) -{ - VIAPtr pVia = VIAPTR(ctx); - VIADRIPtr pVIADRI = pVia->devPrivate; - drm_via_dma_init_t ringBufInit; - - if (pVIADRI->ringBufActive) { - xf86DrvMsg(pScreen->myNum, X_INFO, - "[drm] Cleaning up DMA ring-buffer.\n"); - ringBufInit.func = VIA_CLEANUP_DMA; - if (drmCommandWrite(pVia->drmFD, DRM_VIA_DMA_INIT, &ringBufInit, - sizeof(ringBufInit))) { - xf86DrvMsg(pScreen->myNum, X_WARNING, - "[drm] Failed to clean up DMA ring-buffer: %d\n", errno); - } - pVIADRI->ringBufActive = 0; - } -} - -static int VIADRIRingBufferInit(DRIDriverContext *ctx) -{ - VIAPtr pVia = VIAPTR(ctx); - VIADRIPtr pVIADRI = pVia->devPrivate; - drm_via_dma_init_t ringBufInit; - drmVersionPtr drmVer; - - pVIADRI->ringBufActive = 0; - - if (NULL == (drmVer = drmGetVersion(pVia->drmFD))) { - return GL_FALSE; - } - - if (((drmVer->version_major <= 1) && (drmVer->version_minor <= 3))) { - return GL_FALSE; - } - - /* - * Info frome code-snippet on DRI-DEVEL list; Erdi Chen. - */ - - switch (pVia->ChipId) { - case PCI_CHIP_VT3259: - ringBufInit.reg_pause_addr = 0x40c; - break; - default: - ringBufInit.reg_pause_addr = 0x418; - break; - } - - ringBufInit.offset = pVia->agpSize; - ringBufInit.size = AGP_CMDBUF_SIZE; - ringBufInit.func = VIA_INIT_DMA; - if (drmCommandWrite(pVia->drmFD, DRM_VIA_DMA_INIT, &ringBufInit, - sizeof(ringBufInit))) { - xf86DrvMsg(pScreen->myNum, X_ERROR, - "[drm] Failed to initialize DMA ring-buffer: %d\n", errno); - return GL_FALSE; - } - xf86DrvMsg(pScreen->myNum, X_INFO, - "[drm] Initialized AGP ring-buffer, size 0x%lx at AGP offset 0x%lx.\n", - ringBufInit.size, ringBufInit.offset); - - pVIADRI->ringBufActive = 1; - return GL_TRUE; -} - -static int VIADRIAgpInit(const DRIDriverContext *ctx, VIAPtr pVia) -{ - unsigned long agp_phys; - drmAddress agpaddr; - VIADRIPtr pVIADRI; - pVIADRI = pVia->devPrivate; - pVia->agpSize = 0; - - if (drmAgpAcquire(pVia->drmFD) < 0) { - xf86DrvMsg(pScreen->myNum, X_ERROR, "[drm] drmAgpAcquire failed %d\n", errno); - return GL_FALSE; - } - - if (drmAgpEnable(pVia->drmFD, drmAgpGetMode(pVia->drmFD)&~0x0) < 0) { - xf86DrvMsg(pScreen->myNum, X_ERROR, "[drm] drmAgpEnable failed\n"); - return GL_FALSE; - } - - xf86DrvMsg(pScreen->myNum, X_INFO, "[drm] drmAgpEnabled succeeded\n"); - - if (drmAgpAlloc(pVia->drmFD, AGP_SIZE, 0, &agp_phys, &pVia->agpHandle) < 0) { - xf86DrvMsg(pScreen->myNum, X_ERROR, - "[drm] drmAgpAlloc failed\n"); - drmAgpRelease(pVia->drmFD); - return GL_FALSE; - } - - if (drmAgpBind(pVia->drmFD, pVia->agpHandle, 0) < 0) { - xf86DrvMsg(pScreen->myNum, X_ERROR, - "[drm] drmAgpBind failed\n"); - drmAgpFree(pVia->drmFD, pVia->agpHandle); - drmAgpRelease(pVia->drmFD); - - return GL_FALSE; - } - - /* - * Place the ring-buffer last in the AGP region, and restrict the - * public map not to include the buffer for security reasons. - */ - - pVia->agpSize = AGP_SIZE - AGP_CMDBUF_SIZE; - pVia->agpAddr = drmAgpBase(pVia->drmFD); - xf86DrvMsg(pScreen->myNum, X_INFO, - "[drm] agpAddr = 0x%08lx\n",pVia->agpAddr); - - pVIADRI->agp.size = pVia->agpSize; - if (drmAddMap(pVia->drmFD, (drm_handle_t)0, - pVIADRI->agp.size, DRM_AGP, 0, - &pVIADRI->agp.handle) < 0) { - xf86DrvMsg(pScreen->myNum, X_ERROR, - "[drm] Failed to map public agp area\n"); - pVIADRI->agp.size = 0; - return GL_FALSE; - } - /* Map AGP from kernel to Xserver - Not really needed */ - drmMap(pVia->drmFD, pVIADRI->agp.handle,pVIADRI->agp.size, &agpaddr); - - xf86DrvMsg(pScreen->myNum, X_INFO, - "[drm] agpAddr = 0x%08lx\n", pVia->agpAddr); - xf86DrvMsg(pScreen->myNum, X_INFO, - "[drm] agpSize = 0x%08lx\n", pVia->agpSize); - xf86DrvMsg(pScreen->myNum, X_INFO, - "[drm] agp physical addr = 0x%08lx\n", agp_phys); - - { - drm_via_agp_t agp; - agp.offset = 0; - agp.size = AGP_SIZE-AGP_CMDBUF_SIZE; - if (drmCommandWrite(pVia->drmFD, DRM_VIA_AGP_INIT, &agp, - sizeof(drm_via_agp_t)) < 0) { - drmUnmap(&agpaddr,pVia->agpSize); - drmRmMap(pVia->drmFD,pVIADRI->agp.handle); - drmAgpUnbind(pVia->drmFD, pVia->agpHandle); - drmAgpFree(pVia->drmFD, pVia->agpHandle); - drmAgpRelease(pVia->drmFD); - return GL_FALSE; - } - } - - return GL_TRUE; -} - -static int VIADRIFBInit(DRIDriverContext * ctx, VIAPtr pVia) -{ - int FBSize = pVia->FBFreeEnd-pVia->FBFreeStart; - int FBOffset = pVia->FBFreeStart; - VIADRIPtr pVIADRI = pVia->devPrivate; - pVIADRI->fbOffset = FBOffset; - pVIADRI->fbSize = pVia->videoRambytes; - - { - drm_via_fb_t fb; - fb.offset = FBOffset; - fb.size = FBSize; - - if (drmCommandWrite(pVia->drmFD, DRM_VIA_FB_INIT, &fb, - sizeof(drm_via_fb_t)) < 0) { - xf86DrvMsg(pScreen->myNum, X_ERROR, - "[drm] failed to init frame buffer area\n"); - return GL_FALSE; - } else { - xf86DrvMsg(pScreen->myNum, X_INFO, - "[drm] FBFreeStart= 0x%08x FBFreeEnd= 0x%08x " - "FBSize= 0x%08x\n", - pVia->FBFreeStart, pVia->FBFreeEnd, FBSize); - return GL_TRUE; - } - } -} - -static int VIADRIPciInit(DRIDriverContext * ctx, VIAPtr pVia) -{ - return GL_TRUE; -} - -static int VIADRIScreenInit(DRIDriverContext * ctx) -{ - VIAPtr pVia = VIAPTR(ctx); - VIADRIPtr pVIADRI; - int err; - -#if 0 - ctx->shared.SAREASize = ((sizeof(drm_sarea_t) + 0xfff) & 0x1000); -#else - if (sizeof(drm_sarea_t)+sizeof(drm_via_sarea_t) > SAREA_MAX) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "Data does not fit in SAREA\n"); - return GL_FALSE; - } - ctx->shared.SAREASize = SAREA_MAX; -#endif - - ctx->drmFD = drmOpen(VIAKernelDriverName, NULL); - if (ctx->drmFD < 0) { - fprintf(stderr, "[drm] drmOpen failed\n"); - return 0; - } - pVia->drmFD = ctx->drmFD; - - err = drmSetBusid(ctx->drmFD, ctx->pciBusID); - if (err < 0) { - fprintf(stderr, "[drm] drmSetBusid failed (%d, %s), %s\n", - ctx->drmFD, ctx->pciBusID, strerror(-err)); - return 0; - } - - err = drmAddMap(ctx->drmFD, 0, ctx->shared.SAREASize, DRM_SHM, - DRM_CONTAINS_LOCK, &ctx->shared.hSAREA); - if (err < 0) { - fprintf(stderr, "[drm] drmAddMap failed\n"); - return 0; - } - fprintf(stderr, "[drm] added %d byte SAREA at 0x%08lx\n", - ctx->shared.SAREASize, ctx->shared.hSAREA); - - if (drmMap(ctx->drmFD, - ctx->shared.hSAREA, - ctx->shared.SAREASize, - (drmAddressPtr)(&ctx->pSAREA)) < 0) - { - fprintf(stderr, "[drm] drmMap failed\n"); - return 0; - } - memset(ctx->pSAREA, 0, ctx->shared.SAREASize); - fprintf(stderr, "[drm] mapped SAREA 0x%08lx to %p, size %d\n", - ctx->shared.hSAREA, ctx->pSAREA, ctx->shared.SAREASize); - - /* Need to AddMap the framebuffer and mmio regions here: - */ - if (drmAddMap(ctx->drmFD, - (drm_handle_t)ctx->FBStart, - ctx->FBSize, - DRM_FRAME_BUFFER, -#ifndef _EMBEDDED - 0, -#else - DRM_READ_ONLY, -#endif - &ctx->shared.hFrameBuffer) < 0) - { - fprintf(stderr, "[drm] drmAddMap framebuffer failed\n"); - return 0; - } - - fprintf(stderr, "[drm] framebuffer handle = 0x%08lx\n", - ctx->shared.hFrameBuffer); - - pVIADRI = (VIADRIPtr) CALLOC(sizeof(VIADRIRec)); - if (!pVIADRI) { - drmClose(ctx->drmFD); - return GL_FALSE; - } - pVia->devPrivate = pVIADRI; - ctx->driverClientMsg = pVIADRI; - ctx->driverClientMsgSize = sizeof(*pVIADRI); - - /* DRIScreenInit doesn't add all the common mappings. Add additional mappings here. */ - if (!VIADRIMapInit(ctx, pVia)) { - VIADRICloseScreen(ctx); - return GL_FALSE; - } - - pVIADRI->regs.size = VIA_MMIO_REGSIZE; - pVIADRI->regs.handle = pVia->registerHandle; - xf86DrvMsg(pScreen->myNum, X_INFO, "[drm] mmio Registers = 0x%08lx\n", - pVIADRI->regs.handle); - - if (drmMap(pVia->drmFD, - pVIADRI->regs.handle, - pVIADRI->regs.size, - (drmAddress *)&pVia->MapBase) != 0) - { - VIADRICloseScreen(ctx); - return GL_FALSE; - } - - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] mmio mapped.\n" ); - - VIAEnableMMIO(ctx); - - /* Get video memory clock. */ - VGAOUT8(0x3D4, 0x3D); - pVia->MemClk = (VGAIN8(0x3D5) & 0xF0) >> 4; - xf86DrvMsg(0, X_INFO, "[dri] MemClk (0x%x)\n", pVia->MemClk); - - /* 3D rendering has noise if not enabled. */ - VIAEnableExtendedFIFO(ctx); - - VIAInitialize2DEngine(ctx); - - /* Must disable MMIO or 3D won't work. */ - VIADisableMMIO(ctx); - - VIAInitialize3DEngine(ctx); - - pVia->IsPCI = !VIADRIAgpInit(ctx, pVia); - - if (pVia->IsPCI) { - VIADRIPciInit(ctx, pVia); - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] use pci.\n" ); - } - else - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] use agp.\n" ); - - if (!(VIADRIFBInit(ctx, pVia))) { - VIADRICloseScreen(ctx); - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[dri] frame buffer initialize fail .\n" ); - return GL_FALSE; - } - - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] frame buffer initialized.\n" ); - - return VIADRIFinishScreenInit(ctx); -} - -static void -VIADRICloseScreen(DRIDriverContext * ctx) -{ - VIAPtr pVia = VIAPTR(ctx); - VIADRIPtr pVIADRI=(VIADRIPtr)pVia->devPrivate; - - VIADRIRingBufferCleanup(ctx); - - if (pVia->MapBase) { - xf86DrvMsg(pScreen->myNum, X_INFO, "[drm] Unmapping MMIO registers\n"); - drmUnmap(pVia->MapBase, pVIADRI->regs.size); - } - - if (pVia->agpSize) { - xf86DrvMsg(pScreen->myNum, X_INFO, "[drm] Freeing agp memory\n"); - drmAgpFree(pVia->drmFD, pVia->agpHandle); - xf86DrvMsg(pScreen->myNum, X_INFO, "[drm] Releasing agp module\n"); - drmAgpRelease(pVia->drmFD); - } - -#if 0 - if (pVia->DRIIrqEnable) -#endif - VIADRIIrqExit(ctx); -} - -static int -VIADRIFinishScreenInit(DRIDriverContext * ctx) -{ - VIAPtr pVia = VIAPTR(ctx); - VIADRIPtr pVIADRI; - int err; - - err = drmCreateContext(ctx->drmFD, &ctx->serverContext); - if (err != 0) { - fprintf(stderr, "%s: drmCreateContext failed %d\n", __FUNCTION__, err); - return GL_FALSE; - } - - DRM_LOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext, 0); - - - if (!VIADRIKernelInit(ctx, pVia)) { - VIADRICloseScreen(ctx); - return GL_FALSE; - } - xf86DrvMsg(pScreen->myNum, X_INFO, "[dri] kernel data initialized.\n"); - - /* set SAREA value */ - { - drm_via_sarea_t *saPriv; - - saPriv=(drm_via_sarea_t*)(((char*)ctx->pSAREA) + - sizeof(drm_sarea_t)); - assert(saPriv); - memset(saPriv, 0, sizeof(*saPriv)); - saPriv->ctxOwner = -1; - } - pVIADRI=(VIADRIPtr)pVia->devPrivate; - pVIADRI->deviceID=pVia->Chipset; - pVIADRI->width=ctx->shared.virtualWidth; - pVIADRI->height=ctx->shared.virtualHeight; - pVIADRI->mem=ctx->shared.fbSize; - pVIADRI->bytesPerPixel= (ctx->bpp+7) / 8; - pVIADRI->sarea_priv_offset = sizeof(drm_sarea_t); - /* TODO */ - pVIADRI->scrnX=pVIADRI->width; - pVIADRI->scrnY=pVIADRI->height; - - /* Initialize IRQ */ -#if 0 - if (pVia->DRIIrqEnable) -#endif - VIADRIIrqInit(ctx); - - pVIADRI->ringBufActive = 0; - VIADRIRingBufferInit(ctx); - - return GL_TRUE; -} - -/* Initialize the kernel data structures. */ -static int VIADRIKernelInit(DRIDriverContext * ctx, VIAPtr pVia) -{ - drm_via_init_t drmInfo; - memset(&drmInfo, 0, sizeof(drm_via_init_t)); - drmInfo.sarea_priv_offset = sizeof(drm_sarea_t); - drmInfo.func = VIA_INIT_MAP; - drmInfo.fb_offset = pVia->FrameBufferBase; - drmInfo.mmio_offset = pVia->registerHandle; - if (pVia->IsPCI) - drmInfo.agpAddr = (uint32_t)NULL; - else - drmInfo.agpAddr = (uint32_t)pVia->agpAddr; - - if ((drmCommandWrite(pVia->drmFD, DRM_VIA_MAP_INIT,&drmInfo, - sizeof(drm_via_init_t))) < 0) - return GL_FALSE; - - return GL_TRUE; -} -/* Add a map for the MMIO registers */ -static int VIADRIMapInit(DRIDriverContext * ctx, VIAPtr pVia) -{ - int flags = 0; - - if (drmAddMap(pVia->drmFD, pVia->MmioBase, VIA_MMIO_REGSIZE, - DRM_REGISTERS, flags, &pVia->registerHandle) < 0) { - return GL_FALSE; - } - - xf86DrvMsg(pScreen->myNum, X_INFO, - "[drm] register handle = 0x%08lx\n", pVia->registerHandle); - - return GL_TRUE; -} - -static int viaValidateMode(const DRIDriverContext *ctx) -{ - VIAPtr pVia = VIAPTR(ctx); - - return 1; -} - -static int viaPostValidateMode(const DRIDriverContext *ctx) -{ - VIAPtr pVia = VIAPTR(ctx); - - return 1; -} - -static void VIAEnableMMIO(DRIDriverContext * ctx) -{ - /*vgaHWPtr hwp = VGAHWPTR(ctx);*/ - VIAPtr pVia = VIAPTR(ctx); - unsigned char val; - -#if 0 - if (xf86IsPrimaryPci(pVia->PciInfo)) { - /* If we are primary card, we still use std vga port. If we use - * MMIO, system will hang in vgaHWSave when our card used in - * PLE and KLE (integrated Trident MVP4) - */ - vgaHWSetStdFuncs(hwp); - } - else { - vgaHWSetMmioFuncs(hwp, pVia->MapBase, 0x8000); - } -#endif - - val = VGAIN8(0x3c3); - VGAOUT8(0x3c3, val | 0x01); - val = VGAIN8(0x3cc); - VGAOUT8(0x3c2, val | 0x01); - - /* Unlock Extended IO Space */ - VGAOUT8(0x3c4, 0x10); - VGAOUT8(0x3c5, 0x01); - - /* Enable MMIO */ - if(!pVia->IsSecondary) { - VGAOUT8(0x3c4, 0x1a); - val = VGAIN8(0x3c5); -#ifdef DEBUG - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "primary val = %x\n", val); -#endif - VGAOUT8(0x3c5, val | 0x68); - } - else { - VGAOUT8(0x3c4, 0x1a); - val = VGAIN8(0x3c5); -#ifdef DEBUG - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "secondary val = %x\n", val); -#endif - VGAOUT8(0x3c5, val | 0x38); - } - - /* Unlock CRTC registers */ - VGAOUT8(0x3d4, 0x47); - VGAOUT8(0x3d5, 0x00); - - return; -} - -static void VIADisableMMIO(DRIDriverContext * ctx) -{ - VIAPtr pVia = VIAPTR(ctx); - unsigned char val; - - VGAOUT8(0x3c4, 0x1a); - val = VGAIN8(0x3c5); - VGAOUT8(0x3c5, val & 0x97); - - return; -} - -static void VIADisableExtendedFIFO(DRIDriverContext *ctx) -{ - VIAPtr pVia = VIAPTR(ctx); - uint32_t dwGE230, dwGE298; - - /* Cause of exit XWindow will dump back register value, others chipset no - * need to set extended fifo value */ - if (pVia->Chipset == VIA_CLE266 && pVia->ChipRev < 15 && - (ctx->shared.virtualWidth > 1024 || pVia->HasSecondary)) { - /* Turn off Extend FIFO */ - /* 0x298[29] */ - dwGE298 = VIAGETREG(0x298); - VIASETREG(0x298, dwGE298 | 0x20000000); - /* 0x230[21] */ - dwGE230 = VIAGETREG(0x230); - VIASETREG(0x230, dwGE230 & ~0x00200000); - /* 0x298[29] */ - dwGE298 = VIAGETREG(0x298); - VIASETREG(0x298, dwGE298 & ~0x20000000); - } -} - -static void VIAEnableExtendedFIFO(DRIDriverContext *ctx) -{ - VIAPtr pVia = VIAPTR(ctx); - uint8_t bRegTemp; - uint32_t dwGE230, dwGE298; - - switch (pVia->Chipset) { - case VIA_CLE266: - if (pVia->ChipRev > 14) { /* For 3123Cx */ - if (pVia->HasSecondary) { /* SAMM or DuoView case */ - if (ctx->shared.virtualWidth >= 1024) - { - /* 3c5.16[0:5] */ - VGAOUT8(0x3C4, 0x16); - bRegTemp = VGAIN8(0x3C5); - bRegTemp &= ~0x3F; - bRegTemp |= 0x1C; - VGAOUT8(0x3C5, bRegTemp); - /* 3c5.17[0:6] */ - VGAOUT8(0x3C4, 0x17); - bRegTemp = VGAIN8(0x3C5); - bRegTemp &= ~0x7F; - bRegTemp |= 0x3F; - VGAOUT8(0x3C5, bRegTemp); - pVia->EnableExtendedFIFO = GL_TRUE; - } - } - else /* Single view or Simultaneoue case */ - { - if (ctx->shared.virtualWidth > 1024) - { - /* 3c5.16[0:5] */ - VGAOUT8(0x3C4, 0x16); - bRegTemp = VGAIN8(0x3C5); - bRegTemp &= ~0x3F; - bRegTemp |= 0x17; - VGAOUT8(0x3C5, bRegTemp); - /* 3c5.17[0:6] */ - VGAOUT8(0x3C4, 0x17); - bRegTemp = VGAIN8(0x3C5); - bRegTemp &= ~0x7F; - bRegTemp |= 0x2F; - VGAOUT8(0x3C5, bRegTemp); - pVia->EnableExtendedFIFO = GL_TRUE; - } - } - /* 3c5.18[0:5] */ - VGAOUT8(0x3C4, 0x18); - bRegTemp = VGAIN8(0x3C5); - bRegTemp &= ~0x3F; - bRegTemp |= 0x17; - bRegTemp |= 0x40; /* force the preq always higher than treq */ - VGAOUT8(0x3C5, bRegTemp); - } - else { /* for 3123Ax */ - if (ctx->shared.virtualWidth > 1024 || pVia->HasSecondary) { - /* Turn on Extend FIFO */ - /* 0x298[29] */ - dwGE298 = VIAGETREG(0x298); - VIASETREG(0x298, dwGE298 | 0x20000000); - /* 0x230[21] */ - dwGE230 = VIAGETREG(0x230); - VIASETREG(0x230, dwGE230 | 0x00200000); - /* 0x298[29] */ - dwGE298 = VIAGETREG(0x298); - VIASETREG(0x298, dwGE298 & ~0x20000000); - - /* 3c5.16[0:5] */ - VGAOUT8(0x3C4, 0x16); - bRegTemp = VGAIN8(0x3C5); - bRegTemp &= ~0x3F; - bRegTemp |= 0x17; - /* bRegTemp |= 0x10; */ - VGAOUT8(0x3C5, bRegTemp); - /* 3c5.17[0:6] */ - VGAOUT8(0x3C4, 0x17); - bRegTemp = VGAIN8(0x3C5); - bRegTemp &= ~0x7F; - bRegTemp |= 0x2F; - /*bRegTemp |= 0x1F;*/ - VGAOUT8(0x3C5, bRegTemp); - /* 3c5.18[0:5] */ - VGAOUT8(0x3C4, 0x18); - bRegTemp = VGAIN8(0x3C5); - bRegTemp &= ~0x3F; - bRegTemp |= 0x17; - bRegTemp |= 0x40; /* force the preq always higher than treq */ - VGAOUT8(0x3C5, bRegTemp); - pVia->EnableExtendedFIFO = GL_TRUE; - } - } - break; - case VIA_KM400: - if (pVia->HasSecondary) { /* SAMM or DuoView case */ - if ((ctx->shared.virtualWidth >= 1600) && - (pVia->MemClk <= VIA_MEM_DDR200)) { - /* enable CRT extendded FIFO */ - VGAOUT8(0x3C4, 0x17); - VGAOUT8(0x3C5, 0x1C); - /* revise second display queue depth and read threshold */ - VGAOUT8(0x3C4, 0x16); - bRegTemp = VGAIN8(0x3C5); - bRegTemp &= ~0x3F; - bRegTemp = (bRegTemp) | (0x09); - VGAOUT8(0x3C5, bRegTemp); - } - else { - /* enable CRT extendded FIFO */ - VGAOUT8(0x3C4, 0x17); - VGAOUT8(0x3C5,0x3F); - /* revise second display queue depth and read threshold */ - VGAOUT8(0x3C4, 0x16); - bRegTemp = VGAIN8(0x3C5); - bRegTemp &= ~0x3F; - bRegTemp = (bRegTemp) | (0x1C); - VGAOUT8(0x3C5, bRegTemp); - } - /* 3c5.18[0:5] */ - VGAOUT8(0x3C4, 0x18); - bRegTemp = VGAIN8(0x3C5); - bRegTemp &= ~0x3F; - bRegTemp |= 0x17; - bRegTemp |= 0x40; /* force the preq always higher than treq */ - VGAOUT8(0x3C5, bRegTemp); - pVia->EnableExtendedFIFO = GL_TRUE; - } - else { - if ( (ctx->shared.virtualWidth > 1024) && (ctx->shared.virtualWidth <= 1280) ) - { - /* enable CRT extendded FIFO */ - VGAOUT8(0x3C4, 0x17); - VGAOUT8(0x3C5, 0x3F); - /* revise second display queue depth and read threshold */ - VGAOUT8(0x3C4, 0x16); - bRegTemp = VGAIN8(0x3C5); - bRegTemp &= ~0x3F; - bRegTemp = (bRegTemp) | (0x17); - VGAOUT8(0x3C5, bRegTemp); - pVia->EnableExtendedFIFO = GL_TRUE; - } - else if ((ctx->shared.virtualWidth > 1280)) - { - /* enable CRT extendded FIFO */ - VGAOUT8(0x3C4, 0x17); - VGAOUT8(0x3C5, 0x3F); - /* revise second display queue depth and read threshold */ - VGAOUT8(0x3C4, 0x16); - bRegTemp = VGAIN8(0x3C5); - bRegTemp &= ~0x3F; - bRegTemp = (bRegTemp) | (0x1C); - VGAOUT8(0x3C5, bRegTemp); - pVia->EnableExtendedFIFO = GL_TRUE; - } - else - { - /* enable CRT extendded FIFO */ - VGAOUT8(0x3C4, 0x17); - VGAOUT8(0x3C5, 0x3F); - /* revise second display queue depth and read threshold */ - VGAOUT8(0x3C4, 0x16); - bRegTemp = VGAIN8(0x3C5); - bRegTemp &= ~0x3F; - bRegTemp = (bRegTemp) | (0x10); - VGAOUT8(0x3C5, bRegTemp); - } - /* 3c5.18[0:5] */ - VGAOUT8(0x3C4, 0x18); - bRegTemp = VGAIN8(0x3C5); - bRegTemp &= ~0x3F; - bRegTemp |= 0x17; - bRegTemp |= 0x40; /* force the preq always higher than treq */ - VGAOUT8(0x3C5, bRegTemp); - } - break; - case VIA_K8M800: - /*=* R1 Display FIFO depth (384 /8 -1 -> 0xbf) SR17[7:0] (8bits) *=*/ - VGAOUT8(0x3c4, 0x17); - VGAOUT8(0x3c5, 0xbf); - - /*=* R2 Display fetch datum threshold value (328/4 -> 0x52) - SR16[5:0], SR16[7] (7bits) *=*/ - VGAOUT8(0x3c4, 0x16); - bRegTemp = VGAIN8(0x3c5) & ~0xBF; - bRegTemp |= (0x52 & 0x3F); - bRegTemp |= ((0x52 & 0x40) << 1); - VGAOUT8(0x3c5, bRegTemp); - - /*=* R3 Switch to the highest agent threshold value (74 -> 0x4a) - SR18[5:0], SR18[7] (7bits) *=*/ - VGAOUT8(0x3c4, 0x18); - bRegTemp = VGAIN8(0x3c5) & ~0xBF; - bRegTemp |= (0x4a & 0x3F); - bRegTemp |= ((0x4a & 0x40) << 1); - VGAOUT8(0x3c5, bRegTemp); -#if 0 - /*=* R4 Fetch Number for a scan line (unit: 8 bytes) - SR1C[7:0], SR1D[1:0] (10bits) *=*/ - wRegTemp = (pBIOSInfo->offsetWidthByQWord >> 1) + 4; - VGAOUT8(0x3c4, 0x1c); - VGAOUT8(0x3c5, (uint8_t)(wRegTemp & 0xFF)); - VGAOUT8(0x3c4, 0x1d); - bRegTemp = VGAIN8(0x3c5) & ~0x03; - VGAOUT8(0x3c5, bRegTemp | ((wRegTemp & 0x300) >> 8)); -#endif - if (ctx->shared.virtualWidth >= 1400 && ctx->bpp == 32) - { - /*=* Max. length for a request SR22[4:0] (64/4 -> 0x10) *=*/ - VGAOUT8(0x3c4, 0x22); - bRegTemp = VGAIN8(0x3c5) & ~0x1F; - VGAOUT8(0x3c5, bRegTemp | 0x10); - } - else - { - /*=* Max. length for a request SR22[4:0] - (128/4 -> over flow 0x0) *=*/ - VGAOUT8(0x3c4, 0x22); - bRegTemp = VGAIN8(0x3c5) & ~0x1F; - VGAOUT8(0x3c5, bRegTemp); - } - break; - case VIA_PM800: - /*=* R1 Display FIFO depth (96-1 -> 0x5f) SR17[7:0] (8bits) *=*/ - VGAOUT8(0x3c4, 0x17); - VGAOUT8(0x3c5, 0x5f); - - /*=* R2 Display fetch datum threshold value (32 -> 0x20) - SR16[5:0], SR16[7] (7bits) *=*/ - VGAOUT8(0x3c4, 0x16); - bRegTemp = VGAIN8(0x3c5) & ~0xBF; - bRegTemp |= (0x20 & 0x3F); - bRegTemp |= ((0x20 & 0x40) << 1); - VGAOUT8(0x3c5, bRegTemp); - - /*=* R3 Switch to the highest agent threshold value (16 -> 0x10) - SR18[5:0], SR18[7] (7bits) *=*/ - VGAOUT8(0x3c4, 0x18); - bRegTemp = VGAIN8(0x3c5) & ~0xBF; - bRegTemp |= (0x10 & 0x3F); - bRegTemp |= ((0x10 & 0x40) << 1); - VGAOUT8(0x3c5, bRegTemp); -#if 0 - /*=* R4 Fetch Number for a scan line (unit: 8 bytes) - SR1C[7:0], SR1D[1:0] (10bits) *=*/ - wRegTemp = (pBIOSInfo->offsetWidthByQWord >> 1) + 4; - VGAOUT8(0x3c4, 0x1c); - VGAOUT8(0x3c5, (uint8_t)(wRegTemp & 0xFF)); - VGAOUT8(0x3c4, 0x1d); - bRegTemp = VGAIN8(0x3c5) & ~0x03; - VGAOUT8(0x3c5, bRegTemp | ((wRegTemp & 0x300) >> 8)); -#endif - if (ctx->shared.virtualWidth >= 1400 && ctx->bpp == 32) - { - /*=* Max. length for a request SR22[4:0] (64/4 -> 0x10) *=*/ - VGAOUT8(0x3c4, 0x22); - bRegTemp = VGAIN8(0x3c5) & ~0x1F; - VGAOUT8(0x3c5, bRegTemp | 0x10); - } - else - { - /*=* Max. length for a request SR22[4:0] (0x1F) *=*/ - VGAOUT8(0x3c4, 0x22); - bRegTemp = VGAIN8(0x3c5) & ~0x1F; - VGAOUT8(0x3c5, bRegTemp | 0x1F); - } - break; - default: - break; - } -} - -static void VIAInitialize2DEngine(DRIDriverContext *ctx) -{ - VIAPtr pVia = VIAPTR(ctx); - uint32_t dwVQStartAddr, dwVQEndAddr; - uint32_t dwVQLen, dwVQStartL, dwVQEndL, dwVQStartEndH; - uint32_t dwGEMode; - - /* init 2D engine regs to reset 2D engine */ - VIASETREG(0x04, 0x0); - VIASETREG(0x08, 0x0); - VIASETREG(0x0c, 0x0); - VIASETREG(0x10, 0x0); - VIASETREG(0x14, 0x0); - VIASETREG(0x18, 0x0); - VIASETREG(0x1c, 0x0); - VIASETREG(0x20, 0x0); - VIASETREG(0x24, 0x0); - VIASETREG(0x28, 0x0); - VIASETREG(0x2c, 0x0); - VIASETREG(0x30, 0x0); - VIASETREG(0x34, 0x0); - VIASETREG(0x38, 0x0); - VIASETREG(0x3c, 0x0); - VIASETREG(0x40, 0x0); - - VIADisableMMIO(ctx); - - /* Init AGP and VQ regs */ - VIASETREG(0x43c, 0x00100000); - VIASETREG(0x440, 0x00000000); - VIASETREG(0x440, 0x00333004); - VIASETREG(0x440, 0x60000000); - VIASETREG(0x440, 0x61000000); - VIASETREG(0x440, 0x62000000); - VIASETREG(0x440, 0x63000000); - VIASETREG(0x440, 0x64000000); - VIASETREG(0x440, 0x7D000000); - - VIASETREG(0x43c, 0xfe020000); - VIASETREG(0x440, 0x00000000); - - if (pVia->VQStart != 0) { - /* Enable VQ */ - dwVQStartAddr = pVia->VQStart; - dwVQEndAddr = pVia->VQEnd; - dwVQStartL = 0x50000000 | (dwVQStartAddr & 0xFFFFFF); - dwVQEndL = 0x51000000 | (dwVQEndAddr & 0xFFFFFF); - dwVQStartEndH = 0x52000000 | ((dwVQStartAddr & 0xFF000000) >> 24) | - ((dwVQEndAddr & 0xFF000000) >> 16); - dwVQLen = 0x53000000 | (VIA_VQ_SIZE >> 3); - - VIASETREG(0x43c, 0x00fe0000); - VIASETREG(0x440, 0x080003fe); - VIASETREG(0x440, 0x0a00027c); - VIASETREG(0x440, 0x0b000260); - VIASETREG(0x440, 0x0c000274); - VIASETREG(0x440, 0x0d000264); - VIASETREG(0x440, 0x0e000000); - VIASETREG(0x440, 0x0f000020); - VIASETREG(0x440, 0x1000027e); - VIASETREG(0x440, 0x110002fe); - VIASETREG(0x440, 0x200f0060); - - VIASETREG(0x440, 0x00000006); - VIASETREG(0x440, 0x40008c0f); - VIASETREG(0x440, 0x44000000); - VIASETREG(0x440, 0x45080c04); - VIASETREG(0x440, 0x46800408); - - VIASETREG(0x440, dwVQStartEndH); - VIASETREG(0x440, dwVQStartL); - VIASETREG(0x440, dwVQEndL); - VIASETREG(0x440, dwVQLen); - } - else { - /* Diable VQ */ - VIASETREG(0x43c, 0x00fe0000); - VIASETREG(0x440, 0x00000004); - VIASETREG(0x440, 0x40008c0f); - VIASETREG(0x440, 0x44000000); - VIASETREG(0x440, 0x45080c04); - VIASETREG(0x440, 0x46800408); - } - - dwGEMode = 0; - - switch (ctx->bpp) { - case 16: - dwGEMode |= VIA_GEM_16bpp; - break; - case 32: - dwGEMode |= VIA_GEM_32bpp; - break; - default: - dwGEMode |= VIA_GEM_8bpp; - break; - } - -#if 0 - switch (ctx->shared.virtualWidth) { - case 800: - dwGEMode |= VIA_GEM_800; - break; - case 1024: - dwGEMode |= VIA_GEM_1024; - break; - case 1280: - dwGEMode |= VIA_GEM_1280; - break; - case 1600: - dwGEMode |= VIA_GEM_1600; - break; - case 2048: - dwGEMode |= VIA_GEM_2048; - break; - default: - dwGEMode |= VIA_GEM_640; - break; - } -#endif - - VIAEnableMMIO(ctx); - - /* Set BPP and Pitch */ - VIASETREG(VIA_REG_GEMODE, dwGEMode); - - /* Set Src and Dst base address and pitch, pitch is qword */ - VIASETREG(VIA_REG_SRCBASE, 0x0); - VIASETREG(VIA_REG_DSTBASE, 0x0); - VIASETREG(VIA_REG_PITCH, VIA_PITCH_ENABLE | - ((ctx->shared.virtualWidth * ctx->bpp >> 3) >> 3) | - (((ctx->shared.virtualWidth * ctx->bpp >> 3) >> 3) << 16)); -} - -static int b3DRegsInitialized = 0; - -static void VIAInitialize3DEngine(DRIDriverContext *ctx) -{ - VIAPtr pVia = VIAPTR(ctx); - int i; - - if (!b3DRegsInitialized) - { - - VIASETREG(0x43C, 0x00010000); - - for (i = 0; i <= 0x7D; i++) - { - VIASETREG(0x440, (uint32_t) i << 24); - } - - VIASETREG(0x43C, 0x00020000); - - for (i = 0; i <= 0x94; i++) - { - VIASETREG(0x440, (uint32_t) i << 24); - } - - VIASETREG(0x440, 0x82400000); - - VIASETREG(0x43C, 0x01020000); - - - for (i = 0; i <= 0x94; i++) - { - VIASETREG(0x440, (uint32_t) i << 24); - } - - VIASETREG(0x440, 0x82400000); - VIASETREG(0x43C, 0xfe020000); - - for (i = 0; i <= 0x03; i++) - { - VIASETREG(0x440, (uint32_t) i << 24); - } - - VIASETREG(0x43C, 0x00030000); - - for (i = 0; i <= 0xff; i++) - { - VIASETREG(0x440, 0); - } - VIASETREG(0x43C, 0x00100000); - VIASETREG(0x440, 0x00333004); - VIASETREG(0x440, 0x10000002); - VIASETREG(0x440, 0x60000000); - VIASETREG(0x440, 0x61000000); - VIASETREG(0x440, 0x62000000); - VIASETREG(0x440, 0x63000000); - VIASETREG(0x440, 0x64000000); - - VIASETREG(0x43C, 0x00fe0000); - - if (pVia->ChipRev >= 3 ) - VIASETREG(0x440,0x40008c0f); - else - VIASETREG(0x440,0x4000800f); - - VIASETREG(0x440,0x44000000); - VIASETREG(0x440,0x45080C04); - VIASETREG(0x440,0x46800408); - VIASETREG(0x440,0x50000000); - VIASETREG(0x440,0x51000000); - VIASETREG(0x440,0x52000000); - VIASETREG(0x440,0x53000000); - - b3DRegsInitialized = 1; - xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "3D Engine has been initialized.\n"); - } - - VIASETREG(0x43C,0x00fe0000); - VIASETREG(0x440,0x08000001); - VIASETREG(0x440,0x0A000183); - VIASETREG(0x440,0x0B00019F); - VIASETREG(0x440,0x0C00018B); - VIASETREG(0x440,0x0D00019B); - VIASETREG(0x440,0x0E000000); - VIASETREG(0x440,0x0F000000); - VIASETREG(0x440,0x10000000); - VIASETREG(0x440,0x11000000); - VIASETREG(0x440,0x20000000); -} - -static int -WaitIdleCLE266(VIAPtr pVia) -{ - int loop = 0; - - /*mem_barrier();*/ - - while (!(VIAGETREG(VIA_REG_STATUS) & VIA_VR_QUEUE_BUSY) && (loop++ < MAXLOOP)) - ; - - while ((VIAGETREG(VIA_REG_STATUS) & - (VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY | VIA_3D_ENG_BUSY)) && - (loop++ < MAXLOOP)) - ; - - return loop >= MAXLOOP; -} - -static int viaInitFBDev(DRIDriverContext *ctx) -{ - VIAPtr pVia = CALLOC(sizeof(*pVia)); - - ctx->driverPrivate = (void *)pVia; - - switch (ctx->chipset) { - case PCI_CHIP_CLE3122: - case PCI_CHIP_CLE3022: - pVia->Chipset = VIA_CLE266; - break; - case PCI_CHIP_VT7205: - case PCI_CHIP_VT3205: - pVia->Chipset = VIA_KM400; - break; - case PCI_CHIP_VT3204: - case PCI_CHIP_VT3344: - pVia->Chipset = VIA_K8M800; - break; - case PCI_CHIP_VT3259: - pVia->Chipset = VIA_PM800; - break; - default: - xf86DrvMsg(0, X_ERROR, "VIA: Unknown device ID (0x%x)\n", ctx->chipset); - } - - /* _SOLO TODO XXX need to read ChipRev too */ - pVia->ChipRev = 0; - - pVia->videoRambytes = ctx->shared.fbSize; - pVia->MmioBase = ctx->MMIOStart; - pVia->FrameBufferBase = ctx->FBStart & 0xfc000000; - - pVia->FBFreeStart = ctx->shared.virtualWidth * ctx->cpp * - ctx->shared.virtualHeight; - -#if 1 - /* Alloc a second framebuffer for the second head */ - pVia->FBFreeStart += ctx->shared.virtualWidth * ctx->cpp * - ctx->shared.virtualHeight; -#endif - - pVia->VQStart = pVia->FBFreeStart; - pVia->VQEnd = pVia->FBFreeStart + VIA_VQ_SIZE - 1; - - pVia->FBFreeStart += VIA_VQ_SIZE; - - pVia->FBFreeEnd = pVia->videoRambytes; - - if (!VIADRIScreenInit(ctx)) - return 0; - - return 1; -} - -static void viaHaltFBDev(DRIDriverContext *ctx) -{ - drmUnmap( ctx->pSAREA, ctx->shared.SAREASize ); - drmClose(ctx->drmFD); - - if (ctx->driverPrivate) { - free(ctx->driverPrivate); - ctx->driverPrivate = 0; - } -} - -static int viaEngineShutdown(const DRIDriverContext *ctx) -{ - return 1; -} - -static int viaEngineRestore(const DRIDriverContext *ctx) -{ - return 1; -} - -const struct DRIDriverRec __driDriver = -{ - viaValidateMode, - viaPostValidateMode, - viaInitFBDev, - viaHaltFBDev, - viaEngineShutdown, - viaEngineRestore, - 0, -}; - diff --git a/src/mesa/main/version.h b/src/mesa/main/version.h index d521569f8d..59f62ebd6c 100644 --- a/src/mesa/main/version.h +++ b/src/mesa/main/version.h @@ -1,6 +1,6 @@ /* * Mesa 3-D graphics library - * Version: 7.8 + * Version: 7.9 * * Copyright (C) 1999-2008 Brian Paul All Rights Reserved. * Copyright (C) 2009 VMware, Inc. All Rights Reserved. @@ -33,9 +33,9 @@ /* Mesa version */ #define MESA_MAJOR 7 -#define MESA_MINOR 8 +#define MESA_MINOR 9 #define MESA_PATCH 0 -#define MESA_VERSION_STRING "7.8-devel" +#define MESA_VERSION_STRING "7.9-devel" /* To make version comparison easy */ #define MESA_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) |