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-rw-r--r--src/gallium/drivers/nouveau/nouveau_class.h77
-rw-r--r--src/gallium/drivers/nv30/nv30_state.c4
-rw-r--r--src/gallium/drivers/nv30/nv30_vbo.c34
3 files changed, 66 insertions, 49 deletions
diff --git a/src/gallium/drivers/nouveau/nouveau_class.h b/src/gallium/drivers/nouveau/nouveau_class.h
index 880afe6ce0..58c80ddcd2 100644
--- a/src/gallium/drivers/nouveau/nouveau_class.h
+++ b/src/gallium/drivers/nouveau/nouveau_class.h
@@ -4,7 +4,7 @@
**************************************************************************
- Copyright (C) 2006-2007 :
+ Copyright (C) 2006-2008 :
Dmitry Baryshkov,
Laurent Carlier,
Matthieu Castet,
@@ -1740,6 +1740,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I5_MASK 0x00f00000
+#define NV10_DX5_TEXTURED_TRIANGLE 0x00000094
+
+
+
#define NV10TCL 0x00000056
#define NV10TCL_NOP 0x00000100
@@ -3871,13 +3875,13 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_COLOR 0x80020000
#define NV34TCL_BLEND_FUNC_DST_ALPHA_CONSTANT_ALPHA 0x80030000
#define NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_ALPHA 0x80040000
-#define NV34TCL_BLEND_FUNC_COLOR 0x0000031c
-#define NV34TCL_BLEND_FUNC_EQUATION 0x00000320
-#define NV34TCL_BLEND_FUNC_EQUATION_FUNC_ADD 0x00008006
-#define NV34TCL_BLEND_FUNC_EQUATION_MIN 0x00008007
-#define NV34TCL_BLEND_FUNC_EQUATION_MAX 0x00008008
-#define NV34TCL_BLEND_FUNC_EQUATION_FUNC_SUBTRACT 0x0000800a
-#define NV34TCL_BLEND_FUNC_EQUATION_FUNC_REVERSE_SUBTRACT 0x0000800b
+#define NV34TCL_BLEND_COLOR 0x0000031c
+#define NV34TCL_BLEND_EQUATION 0x00000320
+#define NV34TCL_BLEND_EQUATION_FUNC_ADD 0x00008006
+#define NV34TCL_BLEND_EQUATION_MIN 0x00008007
+#define NV34TCL_BLEND_EQUATION_MAX 0x00008008
+#define NV34TCL_BLEND_EQUATION_FUNC_SUBTRACT 0x0000800a
+#define NV34TCL_BLEND_EQUATION_FUNC_REVERSE_SUBTRACT 0x0000800b
#define NV34TCL_COLOR_MASK 0x00000324
#define NV34TCL_COLOR_MASK_B_SHIFT 0
#define NV34TCL_COLOR_MASK_B_MASK 0x000000ff
@@ -4217,6 +4221,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define NV34TCL_LIGHT_ATTENUATION_QUADRATIC__SIZE 0x00000008
#define NV34TCL_FRONT_MATERIAL_SHININESS(x) (0x00001400+((x)*4))
#define NV34TCL_FRONT_MATERIAL_SHININESS__SIZE 0x00000006
+#define NV34TCL_ENABLED_LIGHTS 0x00001420
#define NV34TCL_FP_REG_CONTROL 0x00001450
#define NV34TCL_FP_REG_CONTROL_UNK1_SHIFT 16
#define NV34TCL_FP_REG_CONTROL_UNK1_MASK 0xffff0000
@@ -4234,12 +4239,12 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define NV34TCL_POLYGON_STIPPLE_ENABLE 0x0000147c
#define NV34TCL_POLYGON_STIPPLE_PATTERN(x) (0x00001480+((x)*4))
#define NV34TCL_POLYGON_STIPPLE_PATTERN__SIZE 0x00000020
-#define NV34TCL_VERTEX_ATTR_3F_X(x) (0x00001500+((x)*16))
-#define NV34TCL_VERTEX_ATTR_3F_X__SIZE 0x00000010
-#define NV34TCL_VERTEX_ATTR_3F_Y(x) (0x00001504+((x)*16))
-#define NV34TCL_VERTEX_ATTR_3F_Y__SIZE 0x00000010
-#define NV34TCL_VERTEX_ATTR_3F_Z(x) (0x00001508+((x)*16))
-#define NV34TCL_VERTEX_ATTR_3F_Z__SIZE 0x00000010
+#define NV34TCL_VTX_ATTR_3F_X(x) (0x00001500+((x)*16))
+#define NV34TCL_VTX_ATTR_3F_X__SIZE 0x00000010
+#define NV34TCL_VTX_ATTR_3F_Y(x) (0x00001504+((x)*16))
+#define NV34TCL_VTX_ATTR_3F_Y__SIZE 0x00000010
+#define NV34TCL_VTX_ATTR_3F_Z(x) (0x00001508+((x)*16))
+#define NV34TCL_VTX_ATTR_3F_Z__SIZE 0x00000010
#define NV34TCL_VP_CLIP_PLANE_A(x) (0x00001600+((x)*16))
#define NV34TCL_VP_CLIP_PLANE_A__SIZE 0x00000006
#define NV34TCL_VP_CLIP_PLANE_B(x) (0x00001604+((x)*16))
@@ -4248,22 +4253,22 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define NV34TCL_VP_CLIP_PLANE_C__SIZE 0x00000006
#define NV34TCL_VP_CLIP_PLANE_D(x) (0x0000160c+((x)*16))
#define NV34TCL_VP_CLIP_PLANE_D__SIZE 0x00000006
-#define NV34TCL_VERTEX_BUFFER_ADDRESS(x) (0x00001680+((x)*4))
-#define NV34TCL_VERTEX_BUFFER_ADDRESS__SIZE 0x00000010
-#define NV34TCL_VERTEX_BUFFER_ADDRESS_DMA1 (1 << 31)
-#define NV34TCL_VERTEX_BUFFER_ADDRESS_OFFSET_SHIFT 0
-#define NV34TCL_VERTEX_BUFFER_ADDRESS_OFFSET_MASK 0x0fffffff
-#define NV34TCL_VERTEX_ARRAY_FORMAT(x) (0x00001740+((x)*4))
-#define NV34TCL_VERTEX_ARRAY_FORMAT__SIZE 0x00000010
-#define NV34TCL_VERTEX_ARRAY_FORMAT_TYPE_SHIFT 0
-#define NV34TCL_VERTEX_ARRAY_FORMAT_TYPE_MASK 0x0000000f
-#define NV34TCL_VERTEX_ARRAY_FORMAT_TYPE_FLOAT 0x00000002
-#define NV34TCL_VERTEX_ARRAY_FORMAT_TYPE_UBYTE 0x00000004
-#define NV34TCL_VERTEX_ARRAY_FORMAT_TYPE_USHORT 0x00000005
-#define NV34TCL_VERTEX_ARRAY_FORMAT_SIZE_SHIFT 4
-#define NV34TCL_VERTEX_ARRAY_FORMAT_SIZE_MASK 0x000000f0
-#define NV34TCL_VERTEX_ARRAY_FORMAT_STRIDE_SHIFT 8
-#define NV34TCL_VERTEX_ARRAY_FORMAT_STRIDE_MASK 0x0000ff00
+#define NV34TCL_VTXBUF_ADDRESS(x) (0x00001680+((x)*4))
+#define NV34TCL_VTXBUF_ADDRESS__SIZE 0x00000010
+#define NV34TCL_VTXBUF_ADDRESS_DMA1 (1 << 31)
+#define NV34TCL_VTXBUF_ADDRESS_OFFSET_SHIFT 0
+#define NV34TCL_VTXBUF_ADDRESS_OFFSET_MASK 0x0fffffff
+#define NV34TCL_VTXFMT(x) (0x00001740+((x)*4))
+#define NV34TCL_VTXFMT__SIZE 0x00000010
+#define NV34TCL_VTXFMT_TYPE_SHIFT 0
+#define NV34TCL_VTXFMT_TYPE_MASK 0x0000000f
+#define NV34TCL_VTXFMT_TYPE_FLOAT 0x00000002
+#define NV34TCL_VTXFMT_TYPE_UBYTE 0x00000004
+#define NV34TCL_VTXFMT_TYPE_USHORT 0x00000005
+#define NV34TCL_VTXFMT_SIZE_SHIFT 4
+#define NV34TCL_VTXFMT_SIZE_MASK 0x000000f0
+#define NV34TCL_VTXFMT_STRIDE_SHIFT 8
+#define NV34TCL_VTXFMT_STRIDE_MASK 0x0000ff00
#define NV34TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_R 0x000017a0
#define NV34TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_G 0x000017a4
#define NV34TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_B 0x000017a8
@@ -4302,6 +4307,18 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define NV34TCL_VB_VERTEX_BATCH_COUNT_SHIFT 24
#define NV34TCL_VB_VERTEX_BATCH_COUNT_MASK 0xff000000
#define NV34TCL_VERTEX_DATA 0x00001818
+#define NV34TCL_IDXBUF_ADDRESS 0x0000181c
+#define NV34TCL_IDXBUF_FORMAT 0x00001820
+#define NV34TCL_IDXBUF_FORMAT_TYPE_SHIFT 4
+#define NV34TCL_IDXBUF_FORMAT_TYPE_MASK 0x000000f0
+#define NV34TCL_IDXBUF_FORMAT_TYPE_U32 0x00000000
+#define NV34TCL_IDXBUF_FORMAT_TYPE_U16 0x00000010
+#define NV34TCL_IDXBUF_FORMAT_DMA1 (1 << 0)
+#define NV34TCL_VB_INDEX_BATCH 0x00001824
+#define NV34TCL_VB_INDEX_BATCH_COUNT_SHIFT 24
+#define NV34TCL_VB_INDEX_BATCH_COUNT_MASK 0xff000000
+#define NV34TCL_VB_INDEX_BATCH_START_SHIFT 0
+#define NV34TCL_VB_INDEX_BATCH_START_MASK 0x00ffffff
#define NV34TCL_POLYGON_MODE_FRONT 0x00001828
#define NV34TCL_POLYGON_MODE_FRONT_POINT 0x00001b00
#define NV34TCL_POLYGON_MODE_FRONT_LINE 0x00001b01
diff --git a/src/gallium/drivers/nv30/nv30_state.c b/src/gallium/drivers/nv30/nv30_state.c
index 620038fa64..84f016eead 100644
--- a/src/gallium/drivers/nv30/nv30_state.c
+++ b/src/gallium/drivers/nv30/nv30_state.c
@@ -51,7 +51,7 @@ nv30_blend_state_bind(struct pipe_context *pipe, void *hwcso)
OUT_RING (cb->b_enable);
OUT_RING (cb->b_srcfunc);
OUT_RING (cb->b_dstfunc);
- BEGIN_RING(rankine, NV34TCL_BLEND_FUNC_EQUATION, 1);
+ BEGIN_RING(rankine, NV34TCL_BLEND_EQUATION, 1);
OUT_RING (cb->b_eqn);
BEGIN_RING(rankine, NV34TCL_COLOR_MASK, 1);
@@ -531,7 +531,7 @@ nv30_set_blend_color(struct pipe_context *pipe,
{
struct nv30_context *nv30 = nv30_context(pipe);
- BEGIN_RING(rankine, NV34TCL_BLEND_FUNC_COLOR, 1);
+ BEGIN_RING(rankine, NV34TCL_BLEND_COLOR, 1);
OUT_RING ((float_to_ubyte(bcol->color[3]) << 24) |
(float_to_ubyte(bcol->color[0]) << 16) |
(float_to_ubyte(bcol->color[1]) << 8) |
diff --git a/src/gallium/drivers/nv30/nv30_vbo.c b/src/gallium/drivers/nv30/nv30_vbo.c
index b18a407ec5..ff0ce6ac81 100644
--- a/src/gallium/drivers/nv30/nv30_vbo.c
+++ b/src/gallium/drivers/nv30/nv30_vbo.c
@@ -26,12 +26,12 @@ nv30_vbo_type(uint format)
{
switch (pf_type(format)) {
case PIPE_FORMAT_TYPE_FLOAT:
- return NV34TCL_VERTEX_ARRAY_FORMAT_TYPE_FLOAT;
+ return NV34TCL_VTXFMT_TYPE_FLOAT;
case PIPE_FORMAT_TYPE_UNORM:
- return NV34TCL_VERTEX_ARRAY_FORMAT_TYPE_UBYTE;
+ return NV34TCL_VTXFMT_TYPE_UBYTE;
default:
NOUVEAU_ERR("Unknown format 0x%08x\n", format);
- return NV40TCL_VTXFMT_TYPE_FLOAT;
+ return NV34TCL_VTXFMT_TYPE_FLOAT;
}
}
@@ -51,7 +51,7 @@ nv30_vbo_static_attrib(struct nv30_context *nv30, int attrib,
map += vb->buffer_offset + ve->src_offset;
switch (type) {
- case NV34TCL_VERTEX_ARRAY_FORMAT_TYPE_FLOAT:
+ case NV34TCL_VTXFMT_TYPE_FLOAT:
{
float *v = map;
@@ -121,7 +121,7 @@ nv30_vbo_arrays_update(struct nv30_context *nv30)
struct pipe_vertex_buffer *vb;
if (!(inputs & (1 << hw))) {
- vtxfmt[hw] = NV34TCL_VERTEX_ARRAY_FORMAT_TYPE_FLOAT;
+ vtxfmt[hw] = NV34TCL_VTXFMT_TYPE_FLOAT;
continue;
}
@@ -129,7 +129,7 @@ nv30_vbo_arrays_update(struct nv30_context *nv30)
vb = &nv30->vtxbuf[ve->vertex_buffer_index];
if (vb->pitch == 0) {
- vtxfmt[hw] = NV34TCL_VERTEX_ARRAY_FORMAT_TYPE_FLOAT;
+ vtxfmt[hw] = NV34TCL_VTXFMT_TYPE_FLOAT;
if (nv30_vbo_static_attrib(nv30, hw, ve, vb) == TRUE)
continue;
}
@@ -138,13 +138,13 @@ nv30_vbo_arrays_update(struct nv30_context *nv30)
nv30->vb[hw].delta = vb->buffer_offset + ve->src_offset;
nv30->vb[hw].buffer = vb->buffer;
- vtxfmt[hw] = ((vb->pitch << NV34TCL_VERTEX_ARRAY_FORMAT_STRIDE_SHIFT) |
+ vtxfmt[hw] = ((vb->pitch << NV34TCL_VTXFMT_STRIDE_SHIFT) |
(nv30_vbo_ncomp(ve->src_format) <<
- NV34TCL_VERTEX_ARRAY_FORMAT_SIZE_SHIFT) |
+ NV34TCL_VTXFMT_SIZE_SHIFT) |
nv30_vbo_type(ve->src_format));
}
- BEGIN_RING(rankine, NV34TCL_VERTEX_ARRAY_FORMAT(0), num_hw);
+ BEGIN_RING(rankine, NV34TCL_VTXFMT(0), num_hw);
OUT_RINGp (vtxfmt, num_hw);
}
@@ -167,20 +167,20 @@ nv30_vbo_validate_state(struct nv30_context *nv30,
inputs &= ~(1 << a);
- BEGIN_RING(rankine, NV34TCL_VERTEX_BUFFER_ADDRESS(a), 1);
+ BEGIN_RING(rankine, NV34TCL_VTXBUF_ADDRESS(a), 1);
OUT_RELOC (nv30->vb[a].buffer, nv30->vb[a].delta,
NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_LOW |
NOUVEAU_BO_OR | NOUVEAU_BO_RD, 0,
- NV34TCL_VERTEX_BUFFER_ADDRESS_DMA1);
+ NV34TCL_VTXBUF_ADDRESS_DMA1);
}
if (ib) {
- BEGIN_RING(rankine, NV40TCL_IDXBUF_ADDRESS, 2);
+ BEGIN_RING(rankine, NV34TCL_IDXBUF_ADDRESS, 2);
OUT_RELOCl(ib, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
NOUVEAU_BO_RD);
OUT_RELOCd(ib, ib_format, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
NOUVEAU_BO_RD | NOUVEAU_BO_OR,
- 0, NV40TCL_IDXBUF_FORMAT_DMA1);
+ 0, NV34TCL_IDXBUF_FORMAT_DMA1);
}
BEGIN_RING(rankine, 0x1710, 1);
@@ -360,10 +360,10 @@ nv30_draw_elements_vbo(struct pipe_context *pipe,
switch (ib_size) {
case 2:
- type = NV40TCL_IDXBUF_FORMAT_TYPE_U16;
+ type = NV34TCL_IDXBUF_FORMAT_TYPE_U16;
break;
case 4:
- type = NV40TCL_IDXBUF_FORMAT_TYPE_U32;
+ type = NV34TCL_IDXBUF_FORMAT_TYPE_U32;
break;
default:
NOUVEAU_ERR("invalid idxbuf fmt %d\n", ib_size);
@@ -381,7 +381,7 @@ nv30_draw_elements_vbo(struct pipe_context *pipe,
nr = (count & 0xff);
if (nr) {
- BEGIN_RING(rankine, NV40TCL_VB_INDEX_BATCH, 1);
+ BEGIN_RING(rankine, NV34TCL_VB_INDEX_BATCH, 1);
OUT_RING (((nr - 1) << 24) | start);
start += nr;
}
@@ -392,7 +392,7 @@ nv30_draw_elements_vbo(struct pipe_context *pipe,
nr -= push;
- BEGIN_RING_NI(rankine, NV40TCL_VB_INDEX_BATCH, push);
+ BEGIN_RING_NI(rankine, NV34TCL_VB_INDEX_BATCH, push);
while (push--) {
OUT_RING(((0x100 - 1) << 24) | start);
start += 0x100;
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-16 12:21:07 +0000