diff options
| -rw-r--r-- | src/gallium/auxiliary/draw/draw_vs_ppc.c | 6 | ||||
| -rw-r--r-- | src/gallium/auxiliary/tgsi/tgsi_ppc.c | 3 | ||||
| -rw-r--r-- | src/gallium/drivers/cell/ppu/cell_context.h | 8 | ||||
| -rw-r--r-- | src/gallium/drivers/cell/spu/spu_command.c | 4 | ||||
| -rw-r--r-- | src/gallium/drivers/cell/spu/spu_exec.c | 8 | ||||
| -rw-r--r-- | src/gallium/drivers/cell/spu/spu_exec.h | 4 | ||||
| -rw-r--r-- | src/gallium/drivers/cell/spu/spu_funcs.c | 2 | ||||
| -rw-r--r-- | src/gallium/drivers/cell/spu/spu_main.h | 10 | ||||
| -rw-r--r-- | src/gallium/drivers/cell/spu/spu_render.c | 2 | ||||
| -rw-r--r-- | src/gallium/drivers/cell/spu/spu_vertex_fetch.c | 5 | ||||
| -rw-r--r-- | src/gallium/drivers/cell/spu/spu_vertex_shader.c | 12 | ||||
| -rw-r--r-- | src/gallium/drivers/llvmpipe/lp_quad.h | 8 | ||||
| -rw-r--r-- | src/gallium/drivers/llvmpipe/lp_setup.c | 2 | ||||
| -rw-r--r-- | src/gallium/drivers/llvmpipe/lp_test_blend.c | 20 | ||||
| -rw-r--r-- | src/gallium/drivers/llvmpipe/lp_test_conv.c | 4 | ||||
| -rw-r--r-- | src/gallium/include/pipe/p_compiler.h | 4 | 
16 files changed, 52 insertions, 50 deletions
| diff --git a/src/gallium/auxiliary/draw/draw_vs_ppc.c b/src/gallium/auxiliary/draw/draw_vs_ppc.c index 6179b5b65a..da9f3e3d35 100644 --- a/src/gallium/auxiliary/draw/draw_vs_ppc.c +++ b/src/gallium/auxiliary/draw/draw_vs_ppc.c @@ -98,9 +98,9 @@ vs_ppc_run_linear( struct draw_vertex_shader *base,     /* loop over verts */     for (i = 0; i < count; i += MAX_VERTICES) {        const uint max_vertices = MIN2(MAX_VERTICES, count - i); -      PIPE_ALIGN_VAR(16, float inputs_soa[PIPE_MAX_SHADER_INPUTS][4][4]); -      PIPE_ALIGN_VAR(16, float outputs_soa[PIPE_MAX_SHADER_OUTPUTS][4][4]); -      PIPE_ALIGN_VAR(16, float temps_soa[TGSI_EXEC_NUM_TEMPS][4][4]); +      PIPE_ALIGN_VAR(16) float inputs_soa[PIPE_MAX_SHADER_INPUTS][4][4]; +      PIPE_ALIGN_VAR(16) float outputs_soa[PIPE_MAX_SHADER_OUTPUTS][4][4]; +      PIPE_ALIGN_VAR(16) float temps_soa[TGSI_EXEC_NUM_TEMPS][4][4];        uint attr;        /* convert (up to) four input verts to SoA format */ diff --git a/src/gallium/auxiliary/tgsi/tgsi_ppc.c b/src/gallium/auxiliary/tgsi/tgsi_ppc.c index cec5b11fd3..ad553c71a5 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_ppc.c +++ b/src/gallium/auxiliary/tgsi/tgsi_ppc.c @@ -51,7 +51,8 @@   * Since it's pretty much impossible to form PPC vector immediates, load   * them from memory here:   */ -PIPE_ALIGN_VAR(16, const float ppc_builtin_constants[]) = { +PIPE_ALIGN_VAR(16) const float  +ppc_builtin_constants[] = {     1.0f, -128.0f, 128.0, 0.0  }; diff --git a/src/gallium/drivers/cell/ppu/cell_context.h b/src/gallium/drivers/cell/ppu/cell_context.h index fa6e4f65cd..3fb6a3227c 100644 --- a/src/gallium/drivers/cell/ppu/cell_context.h +++ b/src/gallium/drivers/cell/ppu/cell_context.h @@ -89,7 +89,7 @@ struct cell_buffer_node;   */  struct cell_buffer_list  { -   PIPE_ALIGN_VAR(16, struct cell_fence fence); +   PIPE_ALIGN_VAR(16) struct cell_fence fence;     struct cell_buffer_node *head;  }; @@ -150,18 +150,18 @@ struct cell_context     /** Mapped constant buffers */     void *mapped_constants[PIPE_SHADER_TYPES]; -   PIPE_ALIGN_VAR(16, struct cell_spu_function_info spu_functions); +   PIPE_ALIGN_VAR(16) struct cell_spu_function_info spu_functions;     uint num_cells, num_spus;     /** Buffers for command batches, vertex/index data */     uint buffer_size[CELL_NUM_BUFFERS]; -   PIPE_ALIGN_VAR(16, ubyte buffer[CELL_NUM_BUFFERS][CELL_BUFFER_SIZE]); +   PIPE_ALIGN_VAR(16) ubyte buffer[CELL_NUM_BUFFERS][CELL_BUFFER_SIZE];     int cur_batch;  /**< which buffer is being filled w/ commands */     /** [4] to ensure 16-byte alignment for each status word */ -   PIPE_ALIGN_VAR(16, uint buffer_status[CELL_MAX_SPUS][CELL_NUM_BUFFERS][4]); +   PIPE_ALIGN_VAR(16) uint buffer_status[CELL_MAX_SPUS][CELL_NUM_BUFFERS][4];     /** Associated with each command/batch buffer is a list of pipe_buffers diff --git a/src/gallium/drivers/cell/spu/spu_command.c b/src/gallium/drivers/cell/spu/spu_command.c index 2a62db4b79..55bd85bde2 100644 --- a/src/gallium/drivers/cell/spu/spu_command.c +++ b/src/gallium/drivers/cell/spu/spu_command.c @@ -53,7 +53,7 @@ struct spu_vs_context draw;  /**   * Buffers containing dynamically generated SPU code:   */ -PIPE_ALIGN_VAR(16, static unsigned char attribute_fetch_code_buffer[136 * PIPE_MAX_ATTRIBS]); +PIPE_ALIGN_VAR(16) static unsigned char attribute_fetch_code_buffer[136 * PIPE_MAX_ATTRIBS]; @@ -542,7 +542,7 @@ cmd_batch(uint opcode)  {     const uint buf = (opcode >> 8) & 0xff;     uint size = (opcode >> 16); -   PIPE_ALIGN_VAR(16, qword buffer[CELL_BUFFER_SIZE / 16]); +   PIPE_ALIGN_VAR(16) qword buffer[CELL_BUFFER_SIZE / 16];     const unsigned usize = ROUNDUP16(size) / sizeof(buffer[0]);     uint pos; diff --git a/src/gallium/drivers/cell/spu/spu_exec.c b/src/gallium/drivers/cell/spu/spu_exec.c index 6db8ed419b..d2166a4901 100644 --- a/src/gallium/drivers/cell/spu/spu_exec.c +++ b/src/gallium/drivers/cell/spu/spu_exec.c @@ -1839,11 +1839,11 @@ spu_exec_machine_run( struct spu_exec_machine *mach )     /* execute declarations (interpolants) */     if( mach->Processor == TGSI_PROCESSOR_FRAGMENT ) {        for (i = 0; i < mach->NumDeclarations; i++) { -         PIPE_ALIGN_VAR(16, +         PIPE_ALIGN_VAR(16)           union {              struct tgsi_full_declaration decl;              qword buffer[ROUNDUP16(sizeof(struct tgsi_full_declaration)) / 16]; -         } d); +         } d;           unsigned ea = (unsigned) (mach->Declarations + pc);           spu_dcache_fetch_unaligned(d.buffer, ea, sizeof(d.decl)); @@ -1854,11 +1854,11 @@ spu_exec_machine_run( struct spu_exec_machine *mach )     /* execute instructions, until pc is set to -1 */     while (pc != -1) { -      PIPE_ALIGN_VAR(16, +      PIPE_ALIGN_VAR(16)        union {           struct tgsi_full_instruction inst;           qword buffer[ROUNDUP16(sizeof(struct tgsi_full_instruction)) / 16]; -      } i); +      } i;        unsigned ea = (unsigned) (mach->Instructions + pc);        spu_dcache_fetch_unaligned(i.buffer, ea, sizeof(i.inst)); diff --git a/src/gallium/drivers/cell/spu/spu_exec.h b/src/gallium/drivers/cell/spu/spu_exec.h index c8c6183e2e..0ca92af248 100644 --- a/src/gallium/drivers/cell/spu/spu_exec.h +++ b/src/gallium/drivers/cell/spu/spu_exec.h @@ -98,9 +98,9 @@ struct spu_exec_machine      * 4  internal temporaries      * 1  address      */ -   PIPE_ALIGN_VAR(16, +   PIPE_ALIGN_VAR(16)     struct spu_exec_vector       Temps[TGSI_EXEC_NUM_TEMPS  -                                      + TGSI_EXEC_NUM_TEMP_EXTRAS + 1]); +                                      + TGSI_EXEC_NUM_TEMP_EXTRAS + 1];     struct spu_exec_vector       *Addrs; diff --git a/src/gallium/drivers/cell/spu/spu_funcs.c b/src/gallium/drivers/cell/spu/spu_funcs.c index a4e560b0a5..98919c43ff 100644 --- a/src/gallium/drivers/cell/spu/spu_funcs.c +++ b/src/gallium/drivers/cell/spu/spu_funcs.c @@ -144,7 +144,7 @@ export_func(struct cell_spu_function_info *spu_functions,  void  return_function_info(void)  { -   PIPE_ALIGN_VAR(16, struct cell_spu_function_info funcs); +   PIPE_ALIGN_VAR(16) struct cell_spu_function_info funcs;     int tag = TAG_MISC;     ASSERT(sizeof(funcs) == 256); /* must be multiple of 16 bytes */ diff --git a/src/gallium/drivers/cell/spu/spu_main.h b/src/gallium/drivers/cell/spu/spu_main.h index 8500f1bb87..b18f4c22ef 100644 --- a/src/gallium/drivers/cell/spu/spu_main.h +++ b/src/gallium/drivers/cell/spu/spu_main.h @@ -159,8 +159,8 @@ struct spu_global     struct vertex_info vertex_info;     /** Current color and Z tiles */ -   PIPE_ALIGN_VAR(16, tile_t ctile); -   PIPE_ALIGN_VAR(16, tile_t ztile); +   PIPE_ALIGN_VAR(16) tile_t ctile; +   PIPE_ALIGN_VAR(16) tile_t ztile;     /** Read depth/stencil tiles? */     boolean read_depth_stencil; @@ -169,8 +169,8 @@ struct spu_global     ubyte cur_ctile_status, cur_ztile_status;     /** Status of all tiles in framebuffer */ -   PIPE_ALIGN_VAR(16, ubyte ctile_status[CELL_MAX_HEIGHT/TILE_SIZE][CELL_MAX_WIDTH/TILE_SIZE]); -   PIPE_ALIGN_VAR(16, ubyte ztile_status[CELL_MAX_HEIGHT/TILE_SIZE][CELL_MAX_WIDTH/TILE_SIZE]); +   PIPE_ALIGN_VAR(16) ubyte ctile_status[CELL_MAX_HEIGHT/TILE_SIZE][CELL_MAX_WIDTH/TILE_SIZE]; +   PIPE_ALIGN_VAR(16) ubyte ztile_status[CELL_MAX_HEIGHT/TILE_SIZE][CELL_MAX_WIDTH/TILE_SIZE];     /** Current fragment ops machine code, at 8-byte boundary */     uint *fragment_ops_code; @@ -179,7 +179,7 @@ struct spu_global     spu_fragment_ops_func fragment_ops[2];     /** Current fragment program machine code, at 8-byte boundary */ -   PIPE_ALIGN_VAR(8, uint fragment_program_code[SPU_MAX_FRAGMENT_PROGRAM_INSTS]); +   PIPE_ALIGN_VAR(8) uint fragment_program_code[SPU_MAX_FRAGMENT_PROGRAM_INSTS];     /** Current fragment ops function */     spu_fragment_program_func fragment_program; diff --git a/src/gallium/drivers/cell/spu/spu_render.c b/src/gallium/drivers/cell/spu/spu_render.c index b13fe3184f..14987e3c3a 100644 --- a/src/gallium/drivers/cell/spu/spu_render.c +++ b/src/gallium/drivers/cell/spu/spu_render.c @@ -169,7 +169,7 @@ void  cmd_render(const struct cell_command_render *render, uint *pos_incr)  {     /* we'll DMA into these buffers */ -   PIPE_ALIGN_VAR(16, ubyte vertex_data[CELL_BUFFER_SIZE]); +   PIPE_ALIGN_VAR(16) ubyte vertex_data[CELL_BUFFER_SIZE];     const uint vertex_size = render->vertex_size; /* in bytes */     /*const*/ uint total_vertex_bytes = render->num_verts * vertex_size;     uint index_bytes; diff --git a/src/gallium/drivers/cell/spu/spu_vertex_fetch.c b/src/gallium/drivers/cell/spu/spu_vertex_fetch.c index 43600dfe0b..087963960d 100644 --- a/src/gallium/drivers/cell/spu/spu_vertex_fetch.c +++ b/src/gallium/drivers/cell/spu/spu_vertex_fetch.c @@ -43,7 +43,8 @@ typedef void (*spu_fetch_func)(qword *out, const qword *in,  			       const qword *shuffle_data); -PIPE_ALIGN_VAR(16, static const qword fetch_shuffle_data[5]) = { +PIPE_ALIGN_VAR(16) static const qword +fetch_shuffle_data[5] = {     /* Shuffle used by CVT_64_FLOAT      */     { @@ -110,7 +111,7 @@ static void generic_vertex_fetch(struct spu_vs_context *draw,        unsigned idx;        const unsigned bytes_per_entry = draw->vertex_fetch.size[attr];        const unsigned quads_per_entry = (bytes_per_entry + 15) / 16; -      PIPE_ALIGN_VAR(16, qword in[2 * 4]); +      PIPE_ALIGN_VAR(16) qword in[2 * 4];        /* Fetch four attributes for four vertices.   diff --git a/src/gallium/drivers/cell/spu/spu_vertex_shader.c b/src/gallium/drivers/cell/spu/spu_vertex_shader.c index 49938a8001..3e9804bf8e 100644 --- a/src/gallium/drivers/cell/spu/spu_vertex_shader.c +++ b/src/gallium/drivers/cell/spu/spu_vertex_shader.c @@ -107,8 +107,8 @@ run_vertex_program(struct spu_vs_context *draw,     struct spu_exec_machine *machine = &draw->machine;     unsigned int j; -   PIPE_ALIGN_VAR(16, struct spu_exec_vector inputs[PIPE_MAX_ATTRIBS]); -   PIPE_ALIGN_VAR(16, struct spu_exec_vector outputs[PIPE_MAX_ATTRIBS]); +   PIPE_ALIGN_VAR(16) struct spu_exec_vector inputs[PIPE_MAX_ATTRIBS]; +   PIPE_ALIGN_VAR(16) struct spu_exec_vector outputs[PIPE_MAX_ATTRIBS];     const float *scale = draw->viewport.scale;     const float *trans = draw->viewport.translate; @@ -132,9 +132,9 @@ run_vertex_program(struct spu_vs_context *draw,     for (j = 0; j < count; j++) {        unsigned slot;        float x, y, z, w; -      PIPE_ALIGN_VAR(16, +      PIPE_ALIGN_VAR(16)        unsigned char buffer[sizeof(struct vertex_header) -          + MAX_VERTEX_SIZE]); +          + MAX_VERTEX_SIZE];        struct vertex_header *const tmpOut =            (struct vertex_header *) buffer;        const unsigned vert_size = ROUNDUP16(sizeof(struct vertex_header) @@ -187,8 +187,8 @@ run_vertex_program(struct spu_vs_context *draw,  } -PIPE_ALIGN_VAR(16, -unsigned char immediates[(sizeof(float) * 4 * TGSI_EXEC_NUM_IMMEDIATES) + 32]); +PIPE_ALIGN_VAR(16) unsigned char +immediates[(sizeof(float) * 4 * TGSI_EXEC_NUM_IMMEDIATES) + 32]);  void diff --git a/src/gallium/drivers/llvmpipe/lp_quad.h b/src/gallium/drivers/llvmpipe/lp_quad.h index eb285e355e..c3a48700a4 100644 --- a/src/gallium/drivers/llvmpipe/lp_quad.h +++ b/src/gallium/drivers/llvmpipe/lp_quad.h @@ -84,7 +84,7 @@ struct quad_header_inout  struct quad_header_output  {     /** colors in SOA format (rrrr, gggg, bbbb, aaaa) */ -   PIPE_ALIGN_VAR(16, float color[PIPE_MAX_COLOR_BUFS][NUM_CHANNELS][QUAD_SIZE]); +   PIPE_ALIGN_VAR(16) float color[PIPE_MAX_COLOR_BUFS][NUM_CHANNELS][QUAD_SIZE];  }; @@ -93,9 +93,9 @@ struct quad_header_output   */  struct quad_interp_coef  { -   PIPE_ALIGN_VAR(16, float a0[1 + PIPE_MAX_SHADER_INPUTS][NUM_CHANNELS]); -   PIPE_ALIGN_VAR(16, float dadx[1 + PIPE_MAX_SHADER_INPUTS][NUM_CHANNELS]); -   PIPE_ALIGN_VAR(16, float dady[1 + PIPE_MAX_SHADER_INPUTS][NUM_CHANNELS]); +   PIPE_ALIGN_VAR(16) float a0[1 + PIPE_MAX_SHADER_INPUTS][NUM_CHANNELS]; +   PIPE_ALIGN_VAR(16) float dadx[1 + PIPE_MAX_SHADER_INPUTS][NUM_CHANNELS]; +   PIPE_ALIGN_VAR(16) float dady[1 + PIPE_MAX_SHADER_INPUTS][NUM_CHANNELS];  }; diff --git a/src/gallium/drivers/llvmpipe/lp_setup.c b/src/gallium/drivers/llvmpipe/lp_setup.c index 29033a067c..9b96bba727 100644 --- a/src/gallium/drivers/llvmpipe/lp_setup.c +++ b/src/gallium/drivers/llvmpipe/lp_setup.c @@ -130,7 +130,7 @@ shade_quads(struct llvmpipe_context *llvmpipe,     uint8_t *tile;     uint8_t *color;     void *depth; -   PIPE_ALIGN_VAR(16, uint32_t mask[4][NUM_CHANNELS]); +   PIPE_ALIGN_VAR(16) uint32_t mask[4][NUM_CHANNELS];     unsigned chan_index;     unsigned q; diff --git a/src/gallium/drivers/llvmpipe/lp_test_blend.c b/src/gallium/drivers/llvmpipe/lp_test_blend.c index de8f872e58..7458ef7544 100644 --- a/src/gallium/drivers/llvmpipe/lp_test_blend.c +++ b/src/gallium/drivers/llvmpipe/lp_test_blend.c @@ -531,11 +531,11 @@ test_one(unsigned verbose,     success = TRUE;     for(i = 0; i < n && success; ++i) {        if(mode == AoS) { -         PIPE_ALIGN_VAR(16, uint8_t src[LP_NATIVE_VECTOR_WIDTH/8]); -         PIPE_ALIGN_VAR(16, uint8_t dst[LP_NATIVE_VECTOR_WIDTH/8]); -         PIPE_ALIGN_VAR(16, uint8_t con[LP_NATIVE_VECTOR_WIDTH/8]); -         PIPE_ALIGN_VAR(16, uint8_t res[LP_NATIVE_VECTOR_WIDTH/8]); -         PIPE_ALIGN_VAR(16, uint8_t ref[LP_NATIVE_VECTOR_WIDTH/8]); +         PIPE_ALIGN_VAR(16) uint8_t src[LP_NATIVE_VECTOR_WIDTH/8]; +         PIPE_ALIGN_VAR(16) uint8_t dst[LP_NATIVE_VECTOR_WIDTH/8]; +         PIPE_ALIGN_VAR(16) uint8_t con[LP_NATIVE_VECTOR_WIDTH/8]; +         PIPE_ALIGN_VAR(16) uint8_t res[LP_NATIVE_VECTOR_WIDTH/8]; +         PIPE_ALIGN_VAR(16) uint8_t ref[LP_NATIVE_VECTOR_WIDTH/8];           int64_t start_counter = 0;           int64_t end_counter = 0; @@ -596,11 +596,11 @@ test_one(unsigned verbose,        if(mode == SoA) {           const unsigned stride = type.length*type.width/8; -         PIPE_ALIGN_VAR(16, uint8_t src[4*LP_NATIVE_VECTOR_WIDTH/8]); -         PIPE_ALIGN_VAR(16, uint8_t dst[4*LP_NATIVE_VECTOR_WIDTH/8]); -         PIPE_ALIGN_VAR(16, uint8_t con[4*LP_NATIVE_VECTOR_WIDTH/8]); -         PIPE_ALIGN_VAR(16, uint8_t res[4*LP_NATIVE_VECTOR_WIDTH/8]); -         PIPE_ALIGN_VAR(16, uint8_t ref[4*LP_NATIVE_VECTOR_WIDTH/8]); +         PIPE_ALIGN_VAR(16) uint8_t src[4*LP_NATIVE_VECTOR_WIDTH/8]; +         PIPE_ALIGN_VAR(16) uint8_t dst[4*LP_NATIVE_VECTOR_WIDTH/8]; +         PIPE_ALIGN_VAR(16) uint8_t con[4*LP_NATIVE_VECTOR_WIDTH/8]; +         PIPE_ALIGN_VAR(16) uint8_t res[4*LP_NATIVE_VECTOR_WIDTH/8]; +         PIPE_ALIGN_VAR(16) uint8_t ref[4*LP_NATIVE_VECTOR_WIDTH/8];           int64_t start_counter = 0;           int64_t end_counter = 0;           boolean mismatch; diff --git a/src/gallium/drivers/llvmpipe/lp_test_conv.c b/src/gallium/drivers/llvmpipe/lp_test_conv.c index 3a6353b916..3b48eac382 100644 --- a/src/gallium/drivers/llvmpipe/lp_test_conv.c +++ b/src/gallium/drivers/llvmpipe/lp_test_conv.c @@ -230,8 +230,8 @@ test_one(unsigned verbose,     for(i = 0; i < n && success; ++i) {        unsigned src_stride = src_type.length*src_type.width/8;        unsigned dst_stride = dst_type.length*dst_type.width/8; -      PIPE_ALIGN_VAR(16, uint8_t src[LP_MAX_VECTOR_LENGTH*LP_MAX_VECTOR_LENGTH]); -      PIPE_ALIGN_VAR(16, uint8_t dst[LP_MAX_VECTOR_LENGTH*LP_MAX_VECTOR_LENGTH]); +      PIPE_ALIGN_VAR(16) uint8_t src[LP_MAX_VECTOR_LENGTH*LP_MAX_VECTOR_LENGTH]; +      PIPE_ALIGN_VAR(16) uint8_t dst[LP_MAX_VECTOR_LENGTH*LP_MAX_VECTOR_LENGTH];        double fref[LP_MAX_VECTOR_LENGTH*LP_MAX_VECTOR_LENGTH];        uint8_t ref[LP_MAX_VECTOR_LENGTH*LP_MAX_VECTOR_LENGTH];        int64_t start_counter = 0; diff --git a/src/gallium/include/pipe/p_compiler.h b/src/gallium/include/pipe/p_compiler.h index 80610a07b6..5f15e8203d 100644 --- a/src/gallium/include/pipe/p_compiler.h +++ b/src/gallium/include/pipe/p_compiler.h @@ -146,7 +146,7 @@ typedef unsigned char boolean;  #define PIPE_ALIGN_TYPE(_alignment, _type) _type __attribute__((aligned(_alignment)))  /* See http://gcc.gnu.org/onlinedocs/gcc-4.4.2/gcc/Variable-Attributes.html */ -#define PIPE_ALIGN_VAR(_alignment, _decl) _decl __attribute__((aligned(_alignment))) +#define PIPE_ALIGN_VAR(_alignment) __attribute__((aligned(_alignment)))  #if (__GNUC__ > 4 || (__GNUC__ == 4 &&__GNUC_MINOR__>1)) && !defined(PIPE_ARCH_X86_64)  #define ALIGN_STACK __attribute__((force_align_arg_pointer)) @@ -158,7 +158,7 @@ typedef unsigned char boolean;  /* See http://msdn.microsoft.com/en-us/library/83ythb65.aspx */  #define PIPE_ALIGN_TYPE(_alignment, _type) __declspec(align(_alignment)) _type -#define PIPE_ALIGN_VAR(_alignment, _decl) __declspec(align(_alignment)) _decl +#define PIPE_ALIGN_VAR(_alignment) __declspec(align(_alignment))  #define ALIGN_STACK | 
