diff options
| -rw-r--r-- | src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c index 994bc537ce..4e640f5903 100644 --- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c +++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c @@ -405,6 +405,15 @@ static void lp_exec_mask_endsub(struct lp_exec_mask *mask, int *pc) lp_exec_mask_update(mask); } + +/** + * Return pointer to a temporary register channel (src or dest). + * \param index which temporary register + * \param chan which channel of the temp register. + * \param is_indirect if true, add 'addr' to the index + * \param addr indirect addressing offset (should already have been + * multiplied by four). + */ static LLVMValueRef get_temp_ptr(struct lp_build_tgsi_soa_context *bld, unsigned index, @@ -413,15 +422,16 @@ get_temp_ptr(struct lp_build_tgsi_soa_context *bld, LLVMValueRef addr) { assert(chan < 4); - if (!bld->has_indirect_addressing) { - return bld->temps[index][chan]; - } else { + if (bld->has_indirect_addressing) { LLVMValueRef lindex = LLVMConstInt(LLVMInt32Type(), index * 4 + chan, 0); if (is_indirect) lindex = lp_build_add(&bld->base, lindex, addr); return LLVMBuildGEP(bld->base.builder, bld->temps_array, &lindex, 1, ""); } + else { + return bld->temps[index][chan]; + } } |