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-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_build.c34
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_dump.c20
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_dump_c.c38
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_exec.c36
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_parse.c12
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_parse.h4
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_ppc.c18
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_sanity.c8
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_scan.c6
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_sse2.c14
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_text.c6
11 files changed, 98 insertions, 98 deletions
diff --git a/src/gallium/auxiliary/tgsi/tgsi_build.c b/src/gallium/auxiliary/tgsi/tgsi_build.c
index 094d8d52d8..91fb4f68e5 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_build.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_build.c
@@ -580,15 +580,15 @@ tgsi_build_full_instruction(
size++;
*dst_register = tgsi_build_dst_register(
- reg->DstRegister.File,
- reg->DstRegister.WriteMask,
- reg->DstRegister.Indirect,
- reg->DstRegister.Index,
+ reg->Register.File,
+ reg->Register.WriteMask,
+ reg->Register.Indirect,
+ reg->Register.Index,
instruction,
header );
prev_token = (struct tgsi_token *) dst_register;
- if( reg->DstRegister.Indirect ) {
+ if( reg->Register.Indirect ) {
struct tgsi_src_register *ind;
if( maxsize <= size )
@@ -597,16 +597,16 @@ tgsi_build_full_instruction(
size++;
*ind = tgsi_build_src_register(
- reg->DstRegisterInd.File,
- reg->DstRegisterInd.SwizzleX,
- reg->DstRegisterInd.SwizzleY,
- reg->DstRegisterInd.SwizzleZ,
- reg->DstRegisterInd.SwizzleW,
- reg->DstRegisterInd.Negate,
- reg->DstRegisterInd.Absolute,
- reg->DstRegisterInd.Indirect,
- reg->DstRegisterInd.Dimension,
- reg->DstRegisterInd.Index,
+ reg->Indirect.File,
+ reg->Indirect.SwizzleX,
+ reg->Indirect.SwizzleY,
+ reg->Indirect.SwizzleZ,
+ reg->Indirect.SwizzleW,
+ reg->Indirect.Negate,
+ reg->Indirect.Absolute,
+ reg->Indirect.Indirect,
+ reg->Indirect.Dimension,
+ reg->Indirect.Index,
instruction,
header );
}
@@ -980,8 +980,8 @@ tgsi_default_full_dst_register( void )
{
struct tgsi_full_dst_register full_dst_register;
- full_dst_register.DstRegister = tgsi_default_dst_register();
- full_dst_register.DstRegisterInd = tgsi_default_src_register();
+ full_dst_register.Register = tgsi_default_dst_register();
+ full_dst_register.Indirect = tgsi_default_src_register();
return full_dst_register;
}
diff --git a/src/gallium/auxiliary/tgsi/tgsi_dump.c b/src/gallium/auxiliary/tgsi/tgsi_dump.c
index 7791f9f4fc..6141865f03 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_dump.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_dump.c
@@ -358,23 +358,23 @@ iter_instruction(
CHR( ',' );
CHR( ' ' );
- if (dst->DstRegister.Indirect) {
+ if (dst->Register.Indirect) {
_dump_register_ind(
ctx,
- dst->DstRegister.File,
- dst->DstRegister.Index,
- dst->DstRegisterInd.File,
- dst->DstRegisterInd.Index,
- dst->DstRegisterInd.SwizzleX );
+ dst->Register.File,
+ dst->Register.Index,
+ dst->Indirect.File,
+ dst->Indirect.Index,
+ dst->Indirect.SwizzleX );
}
else {
_dump_register(
ctx,
- dst->DstRegister.File,
- dst->DstRegister.Index,
- dst->DstRegister.Index );
+ dst->Register.File,
+ dst->Register.Index,
+ dst->Register.Index );
}
- _dump_writemask( ctx, dst->DstRegister.WriteMask );
+ _dump_writemask( ctx, dst->Register.WriteMask );
first_reg = FALSE;
}
diff --git a/src/gallium/auxiliary/tgsi/tgsi_dump_c.c b/src/gallium/auxiliary/tgsi/tgsi_dump_c.c
index 5593942154..5fae5a225f 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_dump_c.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_dump_c.c
@@ -339,48 +339,48 @@ dump_instruction_verbose(
EOL();
TXT( "\nFile : " );
- ENM( dst->DstRegister.File, TGSI_FILES );
- if( deflt || fd->DstRegister.WriteMask != dst->DstRegister.WriteMask ) {
+ ENM( dst->Register.File, TGSI_FILES );
+ if( deflt || fd->Register.WriteMask != dst->Register.WriteMask ) {
TXT( "\nWriteMask: " );
- ENM( dst->DstRegister.WriteMask, TGSI_WRITEMASKS );
+ ENM( dst->Register.WriteMask, TGSI_WRITEMASKS );
}
if( ignored ) {
- if( deflt || fd->DstRegister.Indirect != dst->DstRegister.Indirect ) {
+ if( deflt || fd->Register.Indirect != dst->Register.Indirect ) {
TXT( "\nIndirect : " );
- UID( dst->DstRegister.Indirect );
+ UID( dst->Register.Indirect );
}
- if( deflt || fd->DstRegister.Dimension != dst->DstRegister.Dimension ) {
+ if( deflt || fd->Register.Dimension != dst->Register.Dimension ) {
TXT( "\nDimension: " );
- UID( dst->DstRegister.Dimension );
+ UID( dst->Register.Dimension );
}
}
- if( deflt || fd->DstRegister.Index != dst->DstRegister.Index ) {
+ if( deflt || fd->Register.Index != dst->Register.Index ) {
TXT( "\nIndex : " );
- SID( dst->DstRegister.Index );
+ SID( dst->Register.Index );
}
if( ignored ) {
TXT( "\nPadding : " );
- UIX( dst->DstRegister.Padding );
- if( deflt || fd->DstRegister.Extended != dst->DstRegister.Extended ) {
+ UIX( dst->Register.Padding );
+ if( deflt || fd->Register.Extended != dst->Register.Extended ) {
TXT( "\nExtended : " );
- UID( dst->DstRegister.Extended );
+ UID( dst->Register.Extended );
}
}
- if( deflt || tgsi_compare_dst_register_ext_modulate( dst->DstRegisterExtModulate, fd->DstRegisterExtModulate ) ) {
+ if( deflt || tgsi_compare_dst_register_ext_modulate( dst->RegisterExtModulate, fd->RegisterExtModulate ) ) {
EOL();
TXT( "\nType : " );
- ENM( dst->DstRegisterExtModulate.Type, TGSI_DST_REGISTER_EXTS );
- if( deflt || fd->DstRegisterExtModulate.Modulate != dst->DstRegisterExtModulate.Modulate ) {
+ ENM( dst->RegisterExtModulate.Type, TGSI_DST_REGISTER_EXTS );
+ if( deflt || fd->RegisterExtModulate.Modulate != dst->RegisterExtModulate.Modulate ) {
TXT( "\nModulate: " );
- ENM( dst->DstRegisterExtModulate.Modulate, TGSI_MODULATES );
+ ENM( dst->RegisterExtModulate.Modulate, TGSI_MODULATES );
}
if( ignored ) {
TXT( "\nPadding : " );
- UIX( dst->DstRegisterExtModulate.Padding );
- if( deflt || fd->DstRegisterExtModulate.Extended != dst->DstRegisterExtModulate.Extended ) {
+ UIX( dst->RegisterExtModulate.Padding );
+ if( deflt || fd->RegisterExtModulate.Extended != dst->RegisterExtModulate.Extended ) {
TXT( "\nExtended: " );
- UID( dst->DstRegisterExtModulate.Extended );
+ UID( dst->RegisterExtModulate.Extended );
}
}
}
diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.c b/src/gallium/auxiliary/tgsi/tgsi_exec.c
index 3f8d59e46a..a6bd1a784f 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_exec.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_exec.c
@@ -107,10 +107,10 @@
#define TEMP_P0 TGSI_EXEC_TEMP_P0
#define IS_CHANNEL_ENABLED(INST, CHAN)\
- ((INST).Dst[0].DstRegister.WriteMask & (1 << (CHAN)))
+ ((INST).Dst[0].Register.WriteMask & (1 << (CHAN)))
#define IS_CHANNEL_ENABLED2(INST, CHAN)\
- ((INST).Dst[1].DstRegister.WriteMask & (1 << (CHAN)))
+ ((INST).Dst[1].Register.WriteMask & (1 << (CHAN)))
#define FOR_EACH_ENABLED_CHANNEL(INST, CHAN)\
for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
@@ -188,7 +188,7 @@ tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst)
{
uint i, chan;
- uint writemask = inst->Dst[0].DstRegister.WriteMask;
+ uint writemask = inst->Dst[0].Register.WriteMask;
if (writemask == TGSI_WRITEMASK_X ||
writemask == TGSI_WRITEMASK_Y ||
writemask == TGSI_WRITEMASK_Z ||
@@ -201,9 +201,9 @@ tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst)
/* loop over src regs */
for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
if ((inst->Src[i].SrcRegister.File ==
- inst->Dst[0].DstRegister.File) &&
+ inst->Dst[0].Register.File) &&
(inst->Src[i].SrcRegister.Index ==
- inst->Dst[0].DstRegister.Index)) {
+ inst->Dst[0].Register.Index)) {
/* loop over dest channels */
uint channelsWritten = 0x0;
FOR_EACH_ENABLED_CHANNEL(*inst, chan) {
@@ -1424,11 +1424,11 @@ store_dest(
*
* file[ind[2].x+1],
* where:
- * ind = DstRegisterInd.File
- * [2] = DstRegisterInd.Index
- * .x = DstRegisterInd.SwizzleX
+ * ind = Indirect.File
+ * [2] = Indirect.Index
+ * .x = Indirect.SwizzleX
*/
- if (reg->DstRegister.Indirect) {
+ if (reg->Register.Indirect) {
union tgsi_exec_channel index;
union tgsi_exec_channel indir_index;
uint swizzle;
@@ -1437,15 +1437,15 @@ store_dest(
index.i[0] =
index.i[1] =
index.i[2] =
- index.i[3] = reg->DstRegisterInd.Index;
+ index.i[3] = reg->Indirect.Index;
/* get current value of address register[swizzle] */
- swizzle = tgsi_util_get_src_register_swizzle( &reg->DstRegisterInd, CHAN_X );
+ swizzle = tgsi_util_get_src_register_swizzle( &reg->Indirect, CHAN_X );
/* fetch values from the address/indirection register */
fetch_src_file_channel(
mach,
- reg->DstRegisterInd.File,
+ reg->Indirect.File,
swizzle,
&index,
&indir_index );
@@ -1454,37 +1454,37 @@ store_dest(
offset = (int) indir_index.f[0];
}
- switch (reg->DstRegister.File) {
+ switch (reg->Register.File) {
case TGSI_FILE_NULL:
dst = &null;
break;
case TGSI_FILE_OUTPUT:
index = mach->Temps[TEMP_OUTPUT_I].xyzw[TEMP_OUTPUT_C].u[0]
- + reg->DstRegister.Index;
+ + reg->Register.Index;
dst = &mach->Outputs[offset + index].xyzw[chan_index];
break;
case TGSI_FILE_TEMPORARY:
- index = reg->DstRegister.Index;
+ index = reg->Register.Index;
assert( index < TGSI_EXEC_NUM_TEMPS );
dst = &mach->Temps[offset + index].xyzw[chan_index];
break;
case TGSI_FILE_ADDRESS:
- index = reg->DstRegister.Index;
+ index = reg->Register.Index;
dst = &mach->Addrs[index].xyzw[chan_index];
break;
case TGSI_FILE_LOOP:
- assert(reg->DstRegister.Index == 0);
+ assert(reg->Register.Index == 0);
assert(mach->LoopCounterStackTop > 0);
assert(chan_index == CHAN_X);
dst = &mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[chan_index];
break;
case TGSI_FILE_PREDICATE:
- index = reg->DstRegister.Index;
+ index = reg->Register.Index;
assert(index < TGSI_EXEC_NUM_PREDS);
dst = &mach->Predicates[index].xyzw[chan_index];
break;
diff --git a/src/gallium/auxiliary/tgsi/tgsi_parse.c b/src/gallium/auxiliary/tgsi/tgsi_parse.c
index 7946fdd732..e3a6bc0f54 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_parse.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_parse.c
@@ -168,21 +168,21 @@ tgsi_parse_token(
for( i = 0; i < inst->Instruction.NumDstRegs; i++ ) {
- next_token( ctx, &inst->Dst[i].DstRegister );
+ next_token( ctx, &inst->Dst[i].Register );
/*
* No support for indirect or multi-dimensional addressing.
*/
- assert( !inst->Dst[i].DstRegister.Dimension );
+ assert( !inst->Dst[i].Register.Dimension );
- if( inst->Dst[i].DstRegister.Indirect ) {
- next_token( ctx, &inst->Dst[i].DstRegisterInd );
+ if( inst->Dst[i].Register.Indirect ) {
+ next_token( ctx, &inst->Dst[i].Indirect );
/*
* No support for indirect or multi-dimensional addressing.
*/
- assert( !inst->Dst[i].DstRegisterInd.Dimension );
- assert( !inst->Dst[i].DstRegisterInd.Indirect );
+ assert( !inst->Dst[i].Indirect.Dimension );
+ assert( !inst->Dst[i].Indirect.Indirect );
}
}
diff --git a/src/gallium/auxiliary/tgsi/tgsi_parse.h b/src/gallium/auxiliary/tgsi/tgsi_parse.h
index 1965c5181d..331a533dd9 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_parse.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_parse.h
@@ -47,8 +47,8 @@ struct tgsi_full_header
struct tgsi_full_dst_register
{
- struct tgsi_dst_register DstRegister;
- struct tgsi_src_register DstRegisterInd;
+ struct tgsi_dst_register Register;
+ struct tgsi_src_register Indirect;
};
struct tgsi_full_src_register
diff --git a/src/gallium/auxiliary/tgsi/tgsi_ppc.c b/src/gallium/auxiliary/tgsi/tgsi_ppc.c
index ec5f235143..adb16f6ac9 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_ppc.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_ppc.c
@@ -60,7 +60,7 @@ const float ppc_builtin_constants[] ALIGN16_ATTRIB = {
for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)
#define IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
- ((INST).Dst[0].DstRegister.WriteMask & (1 << (CHAN)))
+ ((INST).Dst[0].Register.WriteMask & (1 << (CHAN)))
#define IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
if (IS_DST0_CHANNEL_ENABLED( INST, CHAN ))
@@ -167,8 +167,8 @@ is_ppc_vec_temporary(const struct tgsi_full_src_register *reg)
static boolean
is_ppc_vec_temporary_dst(const struct tgsi_full_dst_register *reg)
{
- return (reg->DstRegister.File == TGSI_FILE_TEMPORARY &&
- reg->DstRegister.Index < MAX_PPC_TEMPS);
+ return (reg->Register.File == TGSI_FILE_TEMPORARY &&
+ reg->Register.Index < MAX_PPC_TEMPS);
}
@@ -485,7 +485,7 @@ get_dst_vec(struct gen_context *gen,
const struct tgsi_full_dst_register *reg = &inst->Dst[0];
if (is_ppc_vec_temporary_dst(reg)) {
- int vec = gen->temps_map[reg->DstRegister.Index][chan_index];
+ int vec = gen->temps_map[reg->Register.Index][chan_index];
return vec;
}
else {
@@ -507,10 +507,10 @@ emit_store(struct gen_context *gen,
{
const struct tgsi_full_dst_register *reg = &inst->Dst[0];
- switch (reg->DstRegister.File) {
+ switch (reg->Register.File) {
case TGSI_FILE_OUTPUT:
{
- int offset = (reg->DstRegister.Index * 4 + chan_index) * 16;
+ int offset = (reg->Register.Index * 4 + chan_index) * 16;
int offset_reg = emit_li_offset(gen, offset);
ppc_stvx(gen->f, src_vec, gen->outputs_reg, offset_reg);
}
@@ -518,14 +518,14 @@ emit_store(struct gen_context *gen,
case TGSI_FILE_TEMPORARY:
if (is_ppc_vec_temporary_dst(reg)) {
if (!free_vec) {
- int dst_vec = gen->temps_map[reg->DstRegister.Index][chan_index];
+ int dst_vec = gen->temps_map[reg->Register.Index][chan_index];
if (dst_vec != src_vec)
ppc_vmove(gen->f, dst_vec, src_vec);
}
free_vec = FALSE;
}
else {
- int offset = (reg->DstRegister.Index * 4 + chan_index) * 16;
+ int offset = (reg->Register.Index * 4 + chan_index) * 16;
int offset_reg = emit_li_offset(gen, offset);
ppc_stvx(gen->f, src_vec, gen->temps_reg, offset_reg);
}
@@ -535,7 +535,7 @@ emit_store(struct gen_context *gen,
emit_addrs(
func,
xmm,
- reg->DstRegister.Index,
+ reg->Register.Index,
chan_index );
break;
#endif
diff --git a/src/gallium/auxiliary/tgsi/tgsi_sanity.c b/src/gallium/auxiliary/tgsi/tgsi_sanity.c
index 005894e604..7e50e25353 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_sanity.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_sanity.c
@@ -212,8 +212,8 @@ iter_instruction(
for (i = 0; i < inst->Instruction.NumDstRegs; i++) {
check_register_usage(
ctx,
- inst->Dst[i].DstRegister.File,
- inst->Dst[i].DstRegister.Index,
+ inst->Dst[i].Register.File,
+ inst->Dst[i].Register.Index,
"destination",
FALSE );
}
@@ -245,8 +245,8 @@ iter_instruction(
switch (inst->Instruction.Opcode) {
case TGSI_OPCODE_BGNFOR:
case TGSI_OPCODE_ENDFOR:
- if (inst->Dst[0].DstRegister.File != TGSI_FILE_LOOP ||
- inst->Dst[0].DstRegister.Index != 0) {
+ if (inst->Dst[0].Register.File != TGSI_FILE_LOOP ||
+ inst->Dst[0].Register.Index != 0) {
report_error(ctx, "Destination register must be LOOP[0]");
}
break;
diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.c b/src/gallium/auxiliary/tgsi/tgsi_scan.c
index 6ca25c36ec..90832e71bb 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_scan.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_scan.c
@@ -212,8 +212,8 @@ tgsi_is_passthrough_shader(const struct tgsi_token *tokens)
/* Do a whole bunch of checks for a simple move */
if (fullinst->Instruction.Opcode != TGSI_OPCODE_MOV ||
src->SrcRegister.File != TGSI_FILE_INPUT ||
- dst->DstRegister.File != TGSI_FILE_OUTPUT ||
- src->SrcRegister.Index != dst->DstRegister.Index ||
+ dst->Register.File != TGSI_FILE_OUTPUT ||
+ src->SrcRegister.Index != dst->Register.Index ||
src->SrcRegister.Negate ||
src->SrcRegister.Absolute ||
@@ -223,7 +223,7 @@ tgsi_is_passthrough_shader(const struct tgsi_token *tokens)
src->SrcRegister.SwizzleZ != TGSI_SWIZZLE_Z ||
src->SrcRegister.SwizzleW != TGSI_SWIZZLE_W ||
- dst->DstRegister.WriteMask != TGSI_WRITEMASK_XYZW)
+ dst->Register.WriteMask != TGSI_WRITEMASK_XYZW)
{
tgsi_parse_free(&parse);
return FALSE;
diff --git a/src/gallium/auxiliary/tgsi/tgsi_sse2.c b/src/gallium/auxiliary/tgsi/tgsi_sse2.c
index c23b0cc343..785076a520 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_sse2.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_sse2.c
@@ -58,7 +58,7 @@
for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)
#define IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
- ((INST).Dst[0].DstRegister.WriteMask & (1 << (CHAN)))
+ ((INST).Dst[0].Register.WriteMask & (1 << (CHAN)))
#define IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
if (IS_DST0_CHANNEL_ENABLED( INST, CHAN ))
@@ -1371,12 +1371,12 @@ emit_store(
}
- switch( reg->DstRegister.File ) {
+ switch( reg->Register.File ) {
case TGSI_FILE_OUTPUT:
emit_output(
func,
xmm,
- reg->DstRegister.Index,
+ reg->Register.Index,
chan_index );
break;
@@ -1384,7 +1384,7 @@ emit_store(
emit_temps(
func,
xmm,
- reg->DstRegister.Index,
+ reg->Register.Index,
chan_index );
break;
@@ -1392,7 +1392,7 @@ emit_store(
emit_addrs(
func,
xmm,
- reg->DstRegister.Index,
+ reg->Register.Index,
chan_index );
break;
@@ -1727,8 +1727,8 @@ indirect_temp_reference(const struct tgsi_full_instruction *inst)
}
for (i = 0; i < inst->Instruction.NumDstRegs; i++) {
const struct tgsi_full_dst_register *reg = &inst->Dst[i];
- if (reg->DstRegister.File == TGSI_FILE_TEMPORARY &&
- reg->DstRegister.Indirect)
+ if (reg->Register.File == TGSI_FILE_TEMPORARY &&
+ reg->Register.Indirect)
return TRUE;
}
return FALSE;
diff --git a/src/gallium/auxiliary/tgsi/tgsi_text.c b/src/gallium/auxiliary/tgsi/tgsi_text.c
index 295ded9664..27b90f5ab7 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_text.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_text.c
@@ -506,9 +506,9 @@ parse_dst_operand(
if (!parse_opt_writemask( ctx, &writemask ))
return FALSE;
- dst->DstRegister.File = file;
- dst->DstRegister.Index = index;
- dst->DstRegister.WriteMask = writemask;
+ dst->Register.File = file;
+ dst->Register.Index = index;
+ dst->Register.WriteMask = writemask;
return TRUE;
}
generated by cgit v1.2.3 (git 2.39.1) at 2024-06-27 23:55:26 +0000