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-rw-r--r--src/gallium/drivers/cell/ppu/cell_gen_fp.c14
-rw-r--r--src/gallium/drivers/cell/spu/spu_exec.c36
-rw-r--r--src/gallium/drivers/cell/spu/spu_util.c10
3 files changed, 30 insertions, 30 deletions
diff --git a/src/gallium/drivers/cell/ppu/cell_gen_fp.c b/src/gallium/drivers/cell/ppu/cell_gen_fp.c
index f639c62605..4d43f65d29 100644
--- a/src/gallium/drivers/cell/ppu/cell_gen_fp.c
+++ b/src/gallium/drivers/cell/ppu/cell_gen_fp.c
@@ -237,8 +237,8 @@ is_register_src(struct codegen *gen, int channel,
if (swizzle > TGSI_SWIZZLE_W || sign_op != TGSI_UTIL_SIGN_KEEP) {
return FALSE;
}
- if (src->SrcRegister.File == TGSI_FILE_TEMPORARY ||
- src->SrcRegister.File == TGSI_FILE_IMMEDIATE) {
+ if (src->Register.File == TGSI_FILE_TEMPORARY ||
+ src->Register.File == TGSI_FILE_IMMEDIATE) {
return TRUE;
}
return FALSE;
@@ -279,15 +279,15 @@ get_src_reg(struct codegen *gen,
assert(swizzle <= TGSI_SWIZZLE_W);
{
- int index = src->SrcRegister.Index;
+ int index = src->Register.Index;
assert(swizzle < 4);
- if (src->SrcRegister.Indirect) {
+ if (src->Register.Indirect) {
/* XXX unfinished */
}
- switch (src->SrcRegister.File) {
+ switch (src->Register.File) {
case TGSI_FILE_TEMPORARY:
reg = gen->temp_regs[index][swizzle];
break;
@@ -1352,7 +1352,7 @@ static boolean
emit_TEX(struct codegen *gen, const struct tgsi_full_instruction *inst)
{
const uint target = inst->InstructionExtTexture.Texture;
- const uint unit = inst->Src[1].SrcRegister.Index;
+ const uint unit = inst->Src[1].Register.Index;
uint addr;
int ch;
int coord_regs[4], d_regs[4];
@@ -1373,7 +1373,7 @@ emit_TEX(struct codegen *gen, const struct tgsi_full_instruction *inst)
return FALSE;
}
- assert(inst->Src[1].SrcRegister.File == TGSI_FILE_SAMPLER);
+ assert(inst->Src[1].Register.File == TGSI_FILE_SAMPLER);
spe_comment(gen->f, -4, "CALL tex:");
diff --git a/src/gallium/drivers/cell/spu/spu_exec.c b/src/gallium/drivers/cell/spu/spu_exec.c
index 1b4792a316..5ed330aa6e 100644
--- a/src/gallium/drivers/cell/spu/spu_exec.c
+++ b/src/gallium/drivers/cell/spu/spu_exec.c
@@ -431,22 +431,22 @@ fetch_source(
index.i[0] =
index.i[1] =
index.i[2] =
- index.i[3] = reg->SrcRegister.Index;
+ index.i[3] = reg->Register.Index;
- if (reg->SrcRegister.Indirect) {
+ if (reg->Register.Indirect) {
union spu_exec_channel index2;
union spu_exec_channel indir_index;
index2.i[0] =
index2.i[1] =
index2.i[2] =
- index2.i[3] = reg->SrcRegisterInd.Index;
+ index2.i[3] = reg->Indirect.Index;
- swizzle = tgsi_util_get_src_register_swizzle(&reg->SrcRegisterInd,
+ swizzle = tgsi_util_get_src_register_swizzle(&reg->Indirect,
CHAN_X);
fetch_src_file_channel(
mach,
- reg->SrcRegisterInd.File,
+ reg->Indirect.File,
swizzle,
&index2,
&indir_index );
@@ -454,8 +454,8 @@ fetch_source(
index.q = si_a(index.q, indir_index.q);
}
- if( reg->SrcRegister.Dimension ) {
- switch( reg->SrcRegister.File ) {
+ if( reg->Register.Dimension ) {
+ switch( reg->Register.File ) {
case TGSI_FILE_INPUT:
index.q = si_mpyi(index.q, 17);
break;
@@ -466,24 +466,24 @@ fetch_source(
ASSERT( 0 );
}
- index.i[0] += reg->SrcRegisterDim.Index;
- index.i[1] += reg->SrcRegisterDim.Index;
- index.i[2] += reg->SrcRegisterDim.Index;
- index.i[3] += reg->SrcRegisterDim.Index;
+ index.i[0] += reg->Dimension.Index;
+ index.i[1] += reg->Dimension.Index;
+ index.i[2] += reg->Dimension.Index;
+ index.i[3] += reg->Dimension.Index;
- if (reg->SrcRegisterDim.Indirect) {
+ if (reg->Dimension.Indirect) {
union spu_exec_channel index2;
union spu_exec_channel indir_index;
index2.i[0] =
index2.i[1] =
index2.i[2] =
- index2.i[3] = reg->SrcRegisterDimInd.Index;
+ index2.i[3] = reg->DimIndirect.Index;
- swizzle = tgsi_util_get_src_register_swizzle( &reg->SrcRegisterDimInd, CHAN_X );
+ swizzle = tgsi_util_get_src_register_swizzle( &reg->DimIndirect, CHAN_X );
fetch_src_file_channel(
mach,
- reg->SrcRegisterDimInd.File,
+ reg->DimIndirect.File,
swizzle,
&index2,
&indir_index );
@@ -495,7 +495,7 @@ fetch_source(
swizzle = tgsi_util_get_full_src_register_swizzle( reg, chan_index );
fetch_src_file_channel(
mach,
- reg->SrcRegister.File,
+ reg->Register.File,
swizzle,
&index,
chan );
@@ -517,7 +517,7 @@ fetch_source(
break;
}
- if (reg->SrcRegisterExtMod.Complement) {
+ if (reg->RegisterExtMod.Complement) {
chan->q = si_fs(mach->Temps[TEMP_1_I].xyzw[TEMP_1_C].q, chan->q);
}
}
@@ -677,7 +677,7 @@ exec_tex(struct spu_exec_machine *mach,
const struct tgsi_full_instruction *inst,
boolean biasLod, boolean projected)
{
- const uint unit = inst->Src[1].SrcRegister.Index;
+ const uint unit = inst->Src[1].Register.Index;
union spu_exec_channel r[8];
uint chan_index;
float lodBias;
diff --git a/src/gallium/drivers/cell/spu/spu_util.c b/src/gallium/drivers/cell/spu/spu_util.c
index c2c32b22d5..24057e29e3 100644
--- a/src/gallium/drivers/cell/spu/spu_util.c
+++ b/src/gallium/drivers/cell/spu/spu_util.c
@@ -33,7 +33,7 @@ tgsi_util_get_full_src_register_swizzle(
unsigned component )
{
return tgsi_util_get_src_register_swizzle(
- reg->SrcRegister,
+ reg->Register,
component );
}
@@ -45,10 +45,10 @@ tgsi_util_get_full_src_register_sign_mode(
{
unsigned sign_mode;
- if( reg->SrcRegisterExtMod.Absolute ) {
+ if( reg->RegisterExtMod.Absolute ) {
/* Consider only the post-abs negation. */
- if( reg->SrcRegisterExtMod.Negate ) {
+ if( reg->RegisterExtMod.Negate ) {
sign_mode = TGSI_UTIL_SIGN_SET;
}
else {
@@ -60,8 +60,8 @@ tgsi_util_get_full_src_register_sign_mode(
unsigned negate;
- negate = reg->SrcRegister.Negate;
- if( reg->SrcRegisterExtMod.Negate ) {
+ negate = reg->Register.Negate;
+ if( reg->RegisterExtMod.Negate ) {
negate = !negate;
}