diff options
Diffstat (limited to 'src/gallium/drivers/i965simple')
21 files changed, 390 insertions, 251 deletions
diff --git a/src/gallium/drivers/i965simple/Makefile b/src/gallium/drivers/i965simple/Makefile index cc8580836c..e97146e57c 100644 --- a/src/gallium/drivers/i965simple/Makefile +++ b/src/gallium/drivers/i965simple/Makefile @@ -6,7 +6,7 @@ LIBNAME = i965simple C_SOURCES = \ brw_blit.c \ brw_flush.c \ - brw_strings.c \ + brw_screen.c \ brw_surface.c \ brw_cc.c \ brw_clip.c \ @@ -30,7 +30,6 @@ C_SOURCES = \ brw_sf.c \ brw_sf_emit.c \ brw_sf_state.c \ - brw_shader_info.c \ brw_state.c \ brw_state_batch.c \ brw_state_cache.c \ diff --git a/src/gallium/drivers/i965simple/SConscript b/src/gallium/drivers/i965simple/SConscript index 74621de84c..c0825c4de3 100644 --- a/src/gallium/drivers/i965simple/SConscript +++ b/src/gallium/drivers/i965simple/SConscript @@ -29,13 +29,11 @@ i965simple = env.ConvenienceLibrary( 'brw_sf.c', 'brw_sf_emit.c', 'brw_sf_state.c', - 'brw_shader_info.c', 'brw_state.c', 'brw_state_batch.c', 'brw_state_cache.c', 'brw_state_pool.c', 'brw_state_upload.c', - 'brw_strings.c', 'brw_surface.c', 'brw_tex_layout.c', 'brw_urb.c', diff --git a/src/gallium/drivers/i965simple/brw_context.c b/src/gallium/drivers/i965simple/brw_context.c index 6fb840708e..7c908da672 100644 --- a/src/gallium/drivers/i965simple/brw_context.c +++ b/src/gallium/drivers/i965simple/brw_context.c @@ -40,15 +40,14 @@ #include "pipe/p_winsys.h" #include "pipe/p_context.h" #include "pipe/p_util.h" +#include "pipe/p_screen.h" -/*************************************** - * Mesa's Driver Functions - ***************************************/ #ifndef BRW_DEBUG int BRW_DEBUG = (0); #endif + static void brw_destroy(struct pipe_context *pipe) { struct brw_context *brw = brw_context(pipe); @@ -56,6 +55,7 @@ static void brw_destroy(struct pipe_context *pipe) FREE(brw); } + static void brw_clear(struct pipe_context *pipe, struct pipe_surface *ps, unsigned clearValue) { @@ -71,163 +71,31 @@ static void brw_clear(struct pipe_context *pipe, struct pipe_surface *ps, } -static int -brw_get_param(struct pipe_context *pipe, int param) -{ - switch (param) { - case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS: - return 8; - case PIPE_CAP_NPOT_TEXTURES: - return 1; - case PIPE_CAP_TWO_SIDED_STENCIL: - return 1; - case PIPE_CAP_GLSL: - return 0; - case PIPE_CAP_S3TC: - return 0; - case PIPE_CAP_ANISOTROPIC_FILTER: - return 0; - case PIPE_CAP_POINT_SPRITE: - return 0; - case PIPE_CAP_MAX_RENDER_TARGETS: - return 1; - case PIPE_CAP_OCCLUSION_QUERY: - return 0; - case PIPE_CAP_TEXTURE_SHADOW_MAP: - return 1; - case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: - return 11; /* max 1024x1024 */ - case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: - return 8; /* max 128x128x128 */ - case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: - return 11; /* max 1024x1024 */ - default: - return 0; - } -} - - -static float -brw_get_paramf(struct pipe_context *pipe, int param) -{ - switch (param) { - case PIPE_CAP_MAX_LINE_WIDTH: - /* fall-through */ - case PIPE_CAP_MAX_LINE_WIDTH_AA: - return 7.5; - - case PIPE_CAP_MAX_POINT_WIDTH: - /* fall-through */ - case PIPE_CAP_MAX_POINT_WIDTH_AA: - return 255.0; - - case PIPE_CAP_MAX_TEXTURE_ANISOTROPY: - return 4.0; - - case PIPE_CAP_MAX_TEXTURE_LOD_BIAS: - return 16.0; - - default: - return 0; - } -} - -static boolean -brw_is_format_supported( struct pipe_context *pipe, - enum pipe_format format, uint type ) -{ -#if 0 - /* XXX: This is broken -- rewrite if still needed. */ - static const unsigned tex_supported[] = { - PIPE_FORMAT_U_R8_G8_B8_A8, - PIPE_FORMAT_U_A8_R8_G8_B8, - PIPE_FORMAT_U_R5_G6_B5, - PIPE_FORMAT_U_L8, - PIPE_FORMAT_U_A8, - PIPE_FORMAT_U_I8, - PIPE_FORMAT_U_L8_A8, - PIPE_FORMAT_YCBCR, - PIPE_FORMAT_YCBCR_REV, - PIPE_FORMAT_S8_Z24, - }; - - - /* Actually a lot more than this - add later: - */ - static const unsigned render_supported[] = { - PIPE_FORMAT_U_A8_R8_G8_B8, - PIPE_FORMAT_U_R5_G6_B5, - }; - - /* - */ - static const unsigned z_stencil_supported[] = { - PIPE_FORMAT_U_Z16, - PIPE_FORMAT_U_Z32, - PIPE_FORMAT_S8_Z24, - }; - - switch (type) { - case PIPE_RENDER_FORMAT: - *numFormats = Elements(render_supported); - return render_supported; - - case PIPE_TEX_FORMAT: - *numFormats = Elements(tex_supported); - return render_supported; - - case PIPE_Z_STENCIL_FORMAT: - *numFormats = Elements(render_supported); - return render_supported; - - default: - *numFormats = 0; - return NULL; - } -#else - switch (format) { - case PIPE_FORMAT_A8R8G8B8_UNORM: - case PIPE_FORMAT_R5G6B5_UNORM: - case PIPE_FORMAT_S8Z24_UNORM: - return TRUE; - default: - return FALSE; - }; - return FALSE; -#endif -} - - - - -struct pipe_context *brw_create(struct pipe_winsys *pipe_winsys, +struct pipe_context *brw_create(struct pipe_screen *screen, struct brw_winsys *brw_winsys, unsigned pci_id) { struct brw_context *brw; - pipe_winsys->printf(pipe_winsys, - "%s: creating brw_context with pci id 0x%x\n", - __FUNCTION__, pci_id); + screen->winsys->printf(screen->winsys, + "%s: creating brw_context with pci id 0x%x\n", + __FUNCTION__, pci_id); brw = CALLOC_STRUCT(brw_context); if (brw == NULL) return NULL; brw->winsys = brw_winsys; - brw->pipe.winsys = pipe_winsys; + brw->pipe.winsys = screen->winsys; + brw->pipe.screen = screen; brw->pipe.destroy = brw_destroy; - brw->pipe.is_format_supported = brw_is_format_supported; - brw->pipe.get_param = brw_get_param; - brw->pipe.get_paramf = brw_get_paramf; brw->pipe.clear = brw_clear; brw_init_surface_functions(brw); brw_init_texture_functions(brw); brw_init_state_functions(brw); brw_init_flush_functions(brw); - brw_init_string_functions(brw); brw_init_draw_functions( brw ); diff --git a/src/gallium/drivers/i965simple/brw_context.h b/src/gallium/drivers/i965simple/brw_context.h index 65664d853d..4da3a8cffc 100644 --- a/src/gallium/drivers/i965simple/brw_context.h +++ b/src/gallium/drivers/i965simple/brw_context.h @@ -38,6 +38,8 @@ #include "pipe/p_defines.h" #include "pipe/p_state.h" +#include "tgsi/util/tgsi_scan.h" + #include "brw_structs.h" #include "brw_winsys.h" @@ -195,33 +197,22 @@ struct brw_state_flags { }; -struct brw_shader_info { - int nr_regs[8]; /* TGSI_FILE_* */ -}; - - - struct brw_vertex_program { struct pipe_shader_state program; - struct brw_shader_info info; + struct tgsi_shader_info info; int id; }; - struct brw_fragment_program { struct pipe_shader_state program; - struct brw_shader_info info; + struct tgsi_shader_info info; - boolean UsesDepth; - boolean UsesKill; - boolean ComputesDepth; + boolean UsesDepth; /* XXX add this to tgsi_shader_info? */ int id; }; - - struct pipe_setup_linkage { struct { unsigned vp_output:5; @@ -502,7 +493,7 @@ struct brw_context /* Arrays with buffer objects to copy non-bufferobj arrays into * for upload: */ - struct pipe_vertex_buffer *vbo_array[PIPE_ATTRIB_MAX]; + const struct pipe_vertex_buffer *vbo_array[PIPE_ATTRIB_MAX]; struct brw_vertex_element_state inputs[PIPE_ATTRIB_MAX]; diff --git a/src/gallium/drivers/i965simple/brw_draw_upload.c b/src/gallium/drivers/i965simple/brw_draw_upload.c index aa85d93866..9c0c78c236 100644 --- a/src/gallium/drivers/i965simple/brw_draw_upload.c +++ b/src/gallium/drivers/i965simple/brw_draw_upload.c @@ -256,7 +256,7 @@ boolean brw_upload_vertex_elements( struct brw_context *brw ) struct brw_vertex_element_packet vep; unsigned i; - unsigned nr_enabled = brw->attribs.VertexProgram->program.num_inputs; + unsigned nr_enabled = brw->attribs.VertexProgram->info.num_inputs; memset(&vep, 0, sizeof(vep)); diff --git a/src/gallium/drivers/i965simple/brw_screen.c b/src/gallium/drivers/i965simple/brw_screen.c new file mode 100644 index 0000000000..5be369fe52 --- /dev/null +++ b/src/gallium/drivers/i965simple/brw_screen.c @@ -0,0 +1,235 @@ +/************************************************************************** + * + * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + + +#include "pipe/p_util.h" +#include "pipe/p_winsys.h" + +#include "brw_context.h" +#include "brw_screen.h" +#include "brw_tex_layout.h" + + +static const char * +brw_get_vendor( struct pipe_screen *screen ) +{ + return "Tungsten Graphics, Inc."; +} + + +static const char * +brw_get_name( struct pipe_screen *screen ) +{ + static char buffer[128]; + const char *chipset; + + switch (brw_screen(screen)->pci_id) { + case PCI_CHIP_I965_Q: + chipset = "Intel(R) 965Q"; + break; + case PCI_CHIP_I965_G: + case PCI_CHIP_I965_G_1: + chipset = "Intel(R) 965G"; + break; + case PCI_CHIP_I965_GM: + chipset = "Intel(R) 965GM"; + break; + case PCI_CHIP_I965_GME: + chipset = "Intel(R) 965GME/GLE"; + break; + default: + chipset = "unknown"; + break; + } + + sprintf(buffer, "i965 (chipset: %s)", chipset); + return buffer; +} + + +static int +brw_get_param(struct pipe_screen *screen, int param) +{ + switch (param) { + case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS: + return 8; + case PIPE_CAP_NPOT_TEXTURES: + return 1; + case PIPE_CAP_TWO_SIDED_STENCIL: + return 1; + case PIPE_CAP_GLSL: + return 0; + case PIPE_CAP_S3TC: + return 0; + case PIPE_CAP_ANISOTROPIC_FILTER: + return 0; + case PIPE_CAP_POINT_SPRITE: + return 0; + case PIPE_CAP_MAX_RENDER_TARGETS: + return 1; + case PIPE_CAP_OCCLUSION_QUERY: + return 0; + case PIPE_CAP_TEXTURE_SHADOW_MAP: + return 1; + case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: + return 11; /* max 1024x1024 */ + case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: + return 8; /* max 128x128x128 */ + case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: + return 11; /* max 1024x1024 */ + default: + return 0; + } +} + + +static float +brw_get_paramf(struct pipe_screen *screen, int param) +{ + switch (param) { + case PIPE_CAP_MAX_LINE_WIDTH: + /* fall-through */ + case PIPE_CAP_MAX_LINE_WIDTH_AA: + return 7.5; + + case PIPE_CAP_MAX_POINT_WIDTH: + /* fall-through */ + case PIPE_CAP_MAX_POINT_WIDTH_AA: + return 255.0; + + case PIPE_CAP_MAX_TEXTURE_ANISOTROPY: + return 4.0; + + case PIPE_CAP_MAX_TEXTURE_LOD_BIAS: + return 16.0; + + default: + return 0; + } +} + + +static boolean +brw_is_format_supported( struct pipe_screen *screen, + enum pipe_format format, uint type ) +{ +#if 0 + /* XXX: This is broken -- rewrite if still needed. */ + static const unsigned tex_supported[] = { + PIPE_FORMAT_U_R8_G8_B8_A8, + PIPE_FORMAT_U_A8_R8_G8_B8, + PIPE_FORMAT_U_R5_G6_B5, + PIPE_FORMAT_U_L8, + PIPE_FORMAT_U_A8, + PIPE_FORMAT_U_I8, + PIPE_FORMAT_U_L8_A8, + PIPE_FORMAT_YCBCR, + PIPE_FORMAT_YCBCR_REV, + PIPE_FORMAT_S8_Z24, + }; + + + /* Actually a lot more than this - add later: + */ + static const unsigned render_supported[] = { + PIPE_FORMAT_U_A8_R8_G8_B8, + PIPE_FORMAT_U_R5_G6_B5, + }; + + /* + */ + static const unsigned z_stencil_supported[] = { + PIPE_FORMAT_U_Z16, + PIPE_FORMAT_U_Z32, + PIPE_FORMAT_S8_Z24, + }; + + switch (type) { + case PIPE_RENDER_FORMAT: + *numFormats = Elements(render_supported); + return render_supported; + + case PIPE_TEX_FORMAT: + *numFormats = Elements(tex_supported); + return render_supported; + + case PIPE_Z_STENCIL_FORMAT: + *numFormats = Elements(render_supported); + return render_supported; + + default: + *numFormats = 0; + return NULL; + } +#else + switch (format) { + case PIPE_FORMAT_A8R8G8B8_UNORM: + case PIPE_FORMAT_R5G6B5_UNORM: + case PIPE_FORMAT_S8Z24_UNORM: + return TRUE; + default: + return FALSE; + }; + return FALSE; +#endif +} + + +static void +brw_destroy_screen( struct pipe_screen *screen ) +{ + FREE(screen); +} + + +/** + * Create a new brw_screen object + */ +struct pipe_screen * +brw_create_screen(struct pipe_winsys *winsys, uint pci_id) +{ + struct brw_screen *brwscreen = CALLOC_STRUCT(brw_screen); + + if (!brwscreen) + return NULL; + + brwscreen->pci_id = pci_id; + + brwscreen->screen.winsys = winsys; + + brwscreen->screen.destroy = brw_destroy_screen; + + brwscreen->screen.get_name = brw_get_name; + brwscreen->screen.get_vendor = brw_get_vendor; + brwscreen->screen.get_param = brw_get_param; + brwscreen->screen.get_paramf = brw_get_paramf; + brwscreen->screen.is_format_supported = brw_is_format_supported; + + brw_init_screen_texture_funcs(&brwscreen->screen); + + return &brwscreen->screen; +} diff --git a/src/gallium/drivers/i965simple/brw_strings.c b/src/gallium/drivers/i965simple/brw_screen.h index 3d9c50961f..d3c70387e6 100644 --- a/src/gallium/drivers/i965simple/brw_strings.c +++ b/src/gallium/drivers/i965simple/brw_screen.h @@ -1,6 +1,6 @@ /************************************************************************** * - * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. + * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a @@ -25,48 +25,44 @@ * **************************************************************************/ -#include "brw_context.h" -#include "brw_reg.h" +#ifndef BRW_SCREEN_H +#define BRW_SCREEN_H -static const char *brw_get_vendor( struct pipe_context *pipe ) + +#include "pipe/p_screen.h" + + +#ifdef __cplusplus +extern "C" { +#endif + + +/** + * Subclass of pipe_screen + */ +struct brw_screen { - return "Tungsten Graphics, Inc."; -} + struct pipe_screen screen; + uint pci_id; +}; -static const char *brw_get_name( struct pipe_context *pipe ) + +/** cast wrapper */ +static INLINE struct brw_screen * +brw_screen(struct pipe_screen *pscreen) { - static char buffer[128]; - const char *chipset; - - switch (brw_context(pipe)->pci_id) { - case PCI_CHIP_I965_Q: - chipset = "Intel(R) 965Q"; - break; - case PCI_CHIP_I965_G: - case PCI_CHIP_I965_G_1: - chipset = "Intel(R) 965G"; - break; - case PCI_CHIP_I965_GM: - chipset = "Intel(R) 965GM"; - break; - case PCI_CHIP_I965_GME: - chipset = "Intel(R) 965GME/GLE"; - break; - default: - chipset = "unknown"; - break; - } - - sprintf(buffer, "i965 (chipset: %s)", chipset); - return buffer; + return (struct brw_screen *) pscreen; } -void -brw_init_string_functions(struct brw_context *brw) -{ - brw->pipe.get_name = brw_get_name; - brw->pipe.get_vendor = brw_get_vendor; +extern struct pipe_screen * +brw_create_screen(struct pipe_winsys *winsys, uint pci_id); + + +#ifdef __cplusplus } +#endif + +#endif /* BRW_SCREEN_H */ diff --git a/src/gallium/drivers/i965simple/brw_sf.c b/src/gallium/drivers/i965simple/brw_sf.c index 7c83b81c85..c3b815a82b 100644 --- a/src/gallium/drivers/i965simple/brw_sf.c +++ b/src/gallium/drivers/i965simple/brw_sf.c @@ -133,7 +133,7 @@ static void upload_sf_prog( struct brw_context *brw ) key.vp_output_count = brw->vs.prog_data->outputs_written; /* BRW_NEW_FS */ - key.fp_input_count = brw->attribs.FragmentProgram->info.nr_regs[TGSI_FILE_INPUT]; + key.fp_input_count = brw->attribs.FragmentProgram->info.file_max[TGSI_FILE_INPUT] + 1; /* BRW_NEW_REDUCED_PRIMITIVE */ diff --git a/src/gallium/drivers/i965simple/brw_shader_info.c b/src/gallium/drivers/i965simple/brw_shader_info.c index a762a870fe..f4694a4433 100644 --- a/src/gallium/drivers/i965simple/brw_shader_info.c +++ b/src/gallium/drivers/i965simple/brw_shader_info.c @@ -6,8 +6,9 @@ #include "tgsi/util/tgsi_parse.h" - - +/** + * XXX this obsolete new and no longer compiled. + */ void brw_shader_info(const struct tgsi_token *tokens, struct brw_shader_info *info ) { diff --git a/src/gallium/drivers/i965simple/brw_state.c b/src/gallium/drivers/i965simple/brw_state.c index 2fc048bde0..6744a8aa4f 100644 --- a/src/gallium/drivers/i965simple/brw_state.c +++ b/src/gallium/drivers/i965simple/brw_state.c @@ -175,8 +175,12 @@ static void * brw_create_fs_state(struct pipe_context *pipe, brw_fp->program = *shader; brw_fp->id = brw_context(pipe)->program_id++; + tgsi_scan_shader(shader->tokens, &brw_fp->info); + +#if 0 brw_shader_info(shader->tokens, - &brw_fp->info); + &brw_fp->info2); +#endif tgsi_dump(shader->tokens, 0); @@ -211,9 +215,13 @@ static void *brw_create_vs_state(struct pipe_context *pipe, */ brw_vp->program = *shader; brw_vp->id = brw_context(pipe)->program_id++; - brw_shader_info(shader->tokens, - &brw_vp->info); + tgsi_scan_shader(shader->tokens, &brw_vp->info); + +#if 0 + brw_shader_info(shader->tokens, + &brw_vp->info2); +#endif tgsi_dump(shader->tokens, 0); return (void *)brw_vp; @@ -328,8 +336,7 @@ static void brw_set_sampler_texture(struct pipe_context *pipe, { struct brw_context *brw = brw_context(pipe); - pipe_texture_reference(pipe, - (struct pipe_texture **) &brw->attribs.Texture[unit], + pipe_texture_reference((struct pipe_texture **) &brw->attribs.Texture[unit], texture); brw->state.dirty.brw |= BRW_NEW_TEXTURE; diff --git a/src/gallium/drivers/i965simple/brw_state.h b/src/gallium/drivers/i965simple/brw_state.h index 258e9a556e..de0a6371b8 100644 --- a/src/gallium/drivers/i965simple/brw_state.h +++ b/src/gallium/drivers/i965simple/brw_state.h @@ -148,11 +148,4 @@ void brw_invalidate_pools( struct brw_context *brw ); void brw_clear_batch_cache_flush( struct brw_context *brw ); -/* brw_shader_info.c - */ - -void brw_shader_info(const struct tgsi_token *tokens, - struct brw_shader_info *info ); - - #endif diff --git a/src/gallium/drivers/i965simple/brw_surface.c b/src/gallium/drivers/i965simple/brw_surface.c index dc4846d39f..c99a91dcf7 100644 --- a/src/gallium/drivers/i965simple/brw_surface.c +++ b/src/gallium/drivers/i965simple/brw_surface.c @@ -164,6 +164,7 @@ brw_surface_fill(struct pipe_context *pipe, void brw_init_surface_functions(struct brw_context *brw) { + (void) brw_surface_data; /* silence warning */ brw->pipe.surface_copy = brw_surface_copy; brw->pipe.surface_fill = brw_surface_fill; } diff --git a/src/gallium/drivers/i965simple/brw_tex_layout.c b/src/gallium/drivers/i965simple/brw_tex_layout.c index 86ce3d0cc3..b24ac87c37 100644 --- a/src/gallium/drivers/i965simple/brw_tex_layout.c +++ b/src/gallium/drivers/i965simple/brw_tex_layout.c @@ -71,8 +71,6 @@ static unsigned minify( unsigned d ) } -static boolean brw_miptree_layout(struct pipe_context *, struct brw_texture *); - static void intel_miptree_set_image_offset(struct brw_texture *tex, unsigned level, unsigned img, @@ -199,7 +197,7 @@ static void i945_miptree_layout_2d(struct brw_texture *tex) } } -static boolean brw_miptree_layout(struct pipe_context *pipe, struct brw_texture *tex) +static boolean brw_miptree_layout(struct brw_texture *tex) { struct pipe_texture *pt = &tex->base; /* XXX: these vary depending on image format: @@ -301,20 +299,21 @@ static boolean brw_miptree_layout(struct pipe_context *pipe, struct brw_texture static struct pipe_texture * -brw_texture_create(struct pipe_context *pipe, - const struct pipe_texture *templat) +brw_texture_create_screen(struct pipe_screen *screen, + const struct pipe_texture *templat) { + struct pipe_winsys *ws = screen->winsys; struct brw_texture *tex = CALLOC_STRUCT(brw_texture); if (tex) { tex->base = *templat; tex->base.refcount = 1; - if (brw_miptree_layout(pipe, tex)) - tex->buffer = pipe->winsys->buffer_create(pipe->winsys, 64, - PIPE_BUFFER_USAGE_PIXEL, - tex->pitch * tex->base.cpp * - tex->total_height); + if (brw_miptree_layout(tex)) + tex->buffer = ws->buffer_create(ws, 64, + PIPE_BUFFER_USAGE_PIXEL, + tex->pitch * tex->base.cpp * + tex->total_height); if (!tex->buffer) { FREE(tex); @@ -327,7 +326,8 @@ brw_texture_create(struct pipe_context *pipe, static void -brw_texture_release(struct pipe_context *pipe, struct pipe_texture **pt) +brw_texture_release_screen(struct pipe_screen *screen, + struct pipe_texture **pt) { if (!*pt) return; @@ -337,6 +337,7 @@ brw_texture_release(struct pipe_context *pipe, struct pipe_texture **pt) __FUNCTION__, (void *) *pt, (*pt)->refcount - 1); */ if (--(*pt)->refcount <= 0) { + struct pipe_winsys *ws = screen->winsys; struct brw_texture *tex = (struct brw_texture *)*pt; uint i; @@ -344,7 +345,7 @@ brw_texture_release(struct pipe_context *pipe, struct pipe_texture **pt) DBG("%s deleting %p\n", __FUNCTION__, (void *) tex); */ - pipe_buffer_reference(pipe->winsys, &tex->buffer, NULL); + pipe_buffer_reference(ws, &tex->buffer, NULL); for (i = 0; i < PIPE_MAX_TEXTURE_LEVELS; i++) if (tex->image_offset[i]) @@ -363,14 +364,12 @@ brw_texture_update(struct pipe_context *pipe, struct pipe_texture *texture) } -/* - * XXX note: same as code in sp_surface.c - */ static struct pipe_surface * -brw_get_tex_surface(struct pipe_context *pipe, - struct pipe_texture *pt, - unsigned face, unsigned level, unsigned zslice) +brw_get_tex_surface_screen(struct pipe_screen *screen, + struct pipe_texture *pt, + unsigned face, unsigned level, unsigned zslice) { + struct pipe_winsys *ws = screen->winsys; struct brw_texture *tex = (struct brw_texture *)pt; struct pipe_surface *ps; unsigned offset; /* in bytes */ @@ -388,11 +387,11 @@ brw_get_tex_surface(struct pipe_context *pipe, assert(zslice == 0); } - ps = pipe->winsys->surface_alloc(pipe->winsys); + ps = ws->surface_alloc(ws); if (ps) { assert(ps->format); assert(ps->refcount); - pipe_buffer_reference(pipe->winsys, &ps->buffer, tex->buffer); + pipe_buffer_reference(ws, &ps->buffer, tex->buffer); ps->format = pt->format; ps->cpp = pt->cpp; ps->width = pt->width[level]; @@ -407,8 +406,15 @@ brw_get_tex_surface(struct pipe_context *pipe, void brw_init_texture_functions(struct brw_context *brw) { - brw->pipe.texture_create = brw_texture_create; - brw->pipe.texture_release = brw_texture_release; brw->pipe.texture_update = brw_texture_update; - brw->pipe.get_tex_surface = brw_get_tex_surface; } + + +void +brw_init_screen_texture_funcs(struct pipe_screen *screen) +{ + screen->texture_create = brw_texture_create_screen; + screen->texture_release = brw_texture_release_screen; + screen->get_tex_surface = brw_get_tex_surface_screen; +} + diff --git a/src/gallium/drivers/i965simple/brw_tex_layout.h b/src/gallium/drivers/i965simple/brw_tex_layout.h index ed49baeef8..a6b6ba8146 100644 --- a/src/gallium/drivers/i965simple/brw_tex_layout.h +++ b/src/gallium/drivers/i965simple/brw_tex_layout.h @@ -1,12 +1,44 @@ +/* + Copyright (C) Intel Corp. 2006. All Rights Reserved. + Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to + develop this 3D driver. + + Permission is hereby granted, free of charge, to any person obtaining + a copy of this software and associated documentation files (the + "Software"), to deal in the Software without restriction, including + without limitation the rights to use, copy, modify, merge, publish, + distribute, sublicense, and/or sell copies of the Software, and to + permit persons to whom the Software is furnished to do so, subject to + the following conditions: + + The above copyright notice and this permission notice (including the + next paragraph) shall be included in all copies or substantial + portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE + LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + + **********************************************************************/ + + #ifndef BRW_TEX_LAYOUT_H #define BRW_TEX_LAYOUT_H struct brw_context; +struct pipe_screen; extern void brw_init_texture_functions(struct brw_context *brw); +extern void +brw_init_screen_texture_funcs(struct pipe_screen *screen); + #endif diff --git a/src/gallium/drivers/i965simple/brw_vs.c b/src/gallium/drivers/i965simple/brw_vs.c index 738c6346d5..92327e896d 100644 --- a/src/gallium/drivers/i965simple/brw_vs.c +++ b/src/gallium/drivers/i965simple/brw_vs.c @@ -50,8 +50,8 @@ static void do_vs_prog( struct brw_context *brw, brw_init_compile(&c.func); c.vp = vp; - c.prog_data.outputs_written = vp->program.num_outputs; - c.prog_data.inputs_read = vp->program.num_inputs; + c.prog_data.outputs_written = vp->info.num_outputs; + c.prog_data.inputs_read = vp->info.num_inputs; #if 0 if (c.key.copy_edgeflag) { diff --git a/src/gallium/drivers/i965simple/brw_vs.h b/src/gallium/drivers/i965simple/brw_vs.h index 0e58f043b0..070f9dfcae 100644 --- a/src/gallium/drivers/i965simple/brw_vs.h +++ b/src/gallium/drivers/i965simple/brw_vs.h @@ -52,7 +52,7 @@ struct brw_vs_compile { struct brw_vs_prog_key key; struct brw_vs_prog_data prog_data; - struct brw_vertex_program *vp; + const struct brw_vertex_program *vp; unsigned nr_inputs; diff --git a/src/gallium/drivers/i965simple/brw_vs_emit.c b/src/gallium/drivers/i965simple/brw_vs_emit.c index 05df4860ed..9020fcc001 100644 --- a/src/gallium/drivers/i965simple/brw_vs_emit.c +++ b/src/gallium/drivers/i965simple/brw_vs_emit.c @@ -86,7 +86,7 @@ static void brw_vs_alloc_regs( struct brw_vs_compile *c, /* Allocate input regs: */ - c->nr_inputs = c->vp->program.num_inputs; + c->nr_inputs = c->vp->info.num_inputs; for (i = 0; i < c->nr_inputs; i++) { c->regs[TGSI_FILE_INPUT][i] = brw_vec8_grf(reg, 0); reg++; @@ -99,7 +99,7 @@ static void brw_vs_alloc_regs( struct brw_vs_compile *c, c->nr_outputs = 0; c->first_output = reg; mrf = 4; - for (i = 0; i < c->vp->program.num_outputs; i++) { + for (i = 0; i < c->vp->info.num_outputs; i++) { c->nr_outputs++; #if 0 if (i == VERT_RESULT_HPOS) { @@ -1051,7 +1051,7 @@ static void process_instruction(struct brw_vs_compile *c, { struct brw_reg args[3], dst; struct brw_compile *p = &c->func; - struct brw_indirect stack_index = brw_indirect(0, 0); + /*struct brw_indirect stack_index = brw_indirect(0, 0);*/ unsigned i; unsigned index; unsigned file; diff --git a/src/gallium/drivers/i965simple/brw_winsys.h b/src/gallium/drivers/i965simple/brw_winsys.h index 3523a58614..b67bd73750 100644 --- a/src/gallium/drivers/i965simple/brw_winsys.h +++ b/src/gallium/drivers/i965simple/brw_winsys.h @@ -53,6 +53,8 @@ struct pipe_buffer; struct pipe_fence_handle; struct pipe_winsys; +struct pipe_screen; + /* The pipe driver currently understands the following chipsets: */ @@ -181,7 +183,7 @@ struct brw_winsys { #define BRW_BUFFER_USAGE_LIT_VERTEX (PIPE_BUFFER_USAGE_CUSTOM << 0) -struct pipe_context *brw_create(struct pipe_winsys *, +struct pipe_context *brw_create(struct pipe_screen *, struct brw_winsys *, unsigned pci_id); diff --git a/src/gallium/drivers/i965simple/brw_wm.c b/src/gallium/drivers/i965simple/brw_wm.c index 539b170744..1c4b5b5ede 100644 --- a/src/gallium/drivers/i965simple/brw_wm.c +++ b/src/gallium/drivers/i965simple/brw_wm.c @@ -94,11 +94,11 @@ static void brw_wm_populate_key( struct brw_context *brw, /* Build the index for table lookup */ /* BRW_NEW_DEPTH_STENCIL */ - if (fp->UsesKill || + if (fp->info.uses_kill || brw->attribs.DepthStencil->alpha.enabled) lookup |= IZ_PS_KILL_ALPHATEST_BIT; - if (fp->ComputesDepth) + if (fp->info.writes_z) lookup |= IZ_PS_COMPUTES_DEPTH_BIT; if (brw->attribs.DepthStencil->depth.enabled) diff --git a/src/gallium/drivers/i965simple/brw_wm_decl.c b/src/gallium/drivers/i965simple/brw_wm_decl.c index 97418a52e7..74ccfd494a 100644 --- a/src/gallium/drivers/i965simple/brw_wm_decl.c +++ b/src/gallium/drivers/i965simple/brw_wm_decl.c @@ -259,9 +259,12 @@ static void prealloc_reg(struct brw_wm_compile *c) /* Then a copy of our part of the CURBE entry: */ { - int nr_constants = c->fp->info.nr_regs[TGSI_FILE_CONSTANT]; + int nr_constants = c->fp->info.file_max[TGSI_FILE_CONSTANT] + 1; int index = 0; + /* XXX number of constants, or highest numbered constant? */ + assert(nr_constants == c->fp->info.file_count[TGSI_FILE_CONSTANT]); + c->prog_data.max_const = 4*nr_constants; for (i = 0; i < nr_constants; i++) { for (j = 0; j < 4; j++, index++) @@ -282,13 +285,14 @@ static void prealloc_reg(struct brw_wm_compile *c) /* Next we receive the plane coefficients for parameter * interpolation: */ - for (i = 0; i < c->fp->info.nr_regs[TGSI_FILE_INPUT]; i++) { + assert(c->fp->info.file_max[TGSI_FILE_INPUT] == c->fp->info.num_inputs); + for (i = 0; i < c->fp->info.file_max[TGSI_FILE_INPUT] + 1; i++) { c->payload_coef[i] = brw_vec8_grf(c->reg_index, 0); c->reg_index += 2; } c->prog_data.first_curbe_grf = c->key.nr_depth_regs * 2; - c->prog_data.urb_read_length = (c->fp->program.num_inputs + 1) * 2; + c->prog_data.urb_read_length = (c->fp->info.num_inputs + 1) * 2; c->prog_data.curb_read_length = nr_curbe_regs; /* That's the end of the payload, now we can start allocating registers. @@ -302,11 +306,17 @@ static void prealloc_reg(struct brw_wm_compile *c) /* Now allocate room for the interpolated inputs and staging * registers for the outputs: */ - for (i = 0; i < c->fp->info.nr_regs[TGSI_FILE_INPUT]; i++) + /* XXX do we want to loop over the _number_ of inputs/outputs or loop + * to the highest input/output index that's used? + * Probably the same, actually. + */ + assert(c->fp->info.file_max[TGSI_FILE_INPUT] + 1 == c->fp->info.num_inputs); + assert(c->fp->info.file_max[TGSI_FILE_OUTPUT] + 1 == c->fp->info.num_outputs); + for (i = 0; i < c->fp->info.file_max[TGSI_FILE_INPUT] + 1; i++) for (j = 0; j < 4; j++) c->wm_regs[TGSI_FILE_INPUT][i][j] = brw_vec8_grf( c->reg_index++, 0 ); - for (i = 0; i < c->fp->info.nr_regs[TGSI_FILE_OUTPUT]; i++) + for (i = 0; i < c->fp->info.file_max[TGSI_FILE_OUTPUT] + 1; i++) for (j = 0; j < 4; j++) c->wm_regs[TGSI_FILE_OUTPUT][i][j] = brw_vec8_grf( c->reg_index++, 0 ); diff --git a/src/gallium/drivers/i965simple/brw_wm_state.c b/src/gallium/drivers/i965simple/brw_wm_state.c index 5ccd488842..f3aa36b07f 100644 --- a/src/gallium/drivers/i965simple/brw_wm_state.c +++ b/src/gallium/drivers/i965simple/brw_wm_state.c @@ -117,11 +117,11 @@ static void upload_wm_unit(struct brw_context *brw ) if (fp->UsesDepth) wm.wm5.program_uses_depth = 1; /* as far as we can tell */ - if (fp->ComputesDepth) + if (fp->info.writes_z) wm.wm5.program_computes_depth = 1; /* BRW_NEW_ALPHA_TEST */ - if (fp->UsesKill || + if (fp->info.uses_kill || brw->attribs.DepthStencil->alpha.enabled) wm.wm5.program_uses_killpixel = 1; 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