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-rw-r--r--src/gallium/drivers/i965simple/brw_context.h4
-rw-r--r--src/gallium/drivers/i965simple/brw_misc_state.c8
-rw-r--r--src/gallium/drivers/i965simple/brw_surface.c69
-rw-r--r--src/gallium/drivers/i965simple/brw_tex_layout.c117
-rw-r--r--src/gallium/drivers/i965simple/brw_wm_surface_state.c6
5 files changed, 79 insertions, 125 deletions
diff --git a/src/gallium/drivers/i965simple/brw_context.h b/src/gallium/drivers/i965simple/brw_context.h
index 8ac6b4e689..2cae7665f7 100644
--- a/src/gallium/drivers/i965simple/brw_context.h
+++ b/src/gallium/drivers/i965simple/brw_context.h
@@ -231,9 +231,9 @@ struct brw_texture {
/* Derived from the above:
*/
- unsigned pitch;
+ unsigned stride;
unsigned depth_pitch; /* per-image on i945? */
- unsigned total_height;
+ unsigned total_nblocksy;
unsigned nr_images[PIPE_MAX_TEXTURE_LEVELS];
diff --git a/src/gallium/drivers/i965simple/brw_misc_state.c b/src/gallium/drivers/i965simple/brw_misc_state.c
index 925049ecc1..be812c5da9 100644
--- a/src/gallium/drivers/i965simple/brw_misc_state.c
+++ b/src/gallium/drivers/i965simple/brw_misc_state.c
@@ -224,7 +224,9 @@ static void upload_depthbuffer(struct brw_context *brw)
} else {
unsigned int format;
- switch (depth_surface->cpp) {
+ assert(depth_surface->block.width == 1);
+ assert(depth_surface->block.height == 1);
+ switch (depth_surface->block.size) {
case 2:
format = BRW_DEPTHFORMAT_D16_UNORM;
break;
@@ -239,7 +241,7 @@ static void upload_depthbuffer(struct brw_context *brw)
return;
}
- OUT_BATCH(((depth_surface->pitch * depth_surface->cpp) - 1) |
+ OUT_BATCH((depth_surface->stride - 1) |
(format << 18) |
(BRW_TILEWALK_YMAJOR << 26) |
// (depth_surface->region->tiled << 27) |
@@ -247,7 +249,7 @@ static void upload_depthbuffer(struct brw_context *brw)
OUT_RELOC(depth_surface->buffer,
PIPE_BUFFER_USAGE_GPU_READ | PIPE_BUFFER_USAGE_GPU_WRITE, 0);
OUT_BATCH((BRW_SURFACE_MIPMAPLAYOUT_BELOW << 1) |
- ((depth_surface->pitch - 1) << 6) |
+ ((depth_surface->stride/depth_surface->block.size - 1) << 6) |
((depth_surface->height - 1) << 19));
OUT_BATCH(0);
}
diff --git a/src/gallium/drivers/i965simple/brw_surface.c b/src/gallium/drivers/i965simple/brw_surface.c
index 3d98a2bf19..0be3dfc743 100644
--- a/src/gallium/drivers/i965simple/brw_surface.c
+++ b/src/gallium/drivers/i965simple/brw_surface.c
@@ -47,8 +47,10 @@ brw_surface_copy(struct pipe_context *pipe,
struct pipe_surface *src,
unsigned srcx, unsigned srcy, unsigned width, unsigned height)
{
- assert(dst != src);
- assert(dst->cpp == src->cpp);
+ assert( dst != src );
+ assert( dst->block.size == src->block.size );
+ assert( dst->block.width == src->block.height );
+ assert( dst->block.height == src->block.height );
if (0) {
void *dst_map = pipe->screen->surface_map( pipe->screen,
@@ -60,37 +62,30 @@ brw_surface_copy(struct pipe_context *pipe,
PIPE_BUFFER_USAGE_CPU_READ );
pipe_copy_rect(dst_map,
- dst->cpp,
- dst->pitch,
+ &dst->block,
+ dst->stride,
dstx, dsty,
width, height,
src_map,
- do_flip ? -(int) src->pitch : src->pitch,
+ do_flip ? -(int) src->stride : src->stride,
srcx, do_flip ? height - 1 - srcy : srcy);
pipe->screen->surface_unmap(pipe->screen, src);
pipe->screen->surface_unmap(pipe->screen, dst);
}
else {
+ assert(dst->block.width == 1);
+ assert(dst->block.height == 1);
brw_copy_blit(brw_context(pipe),
do_flip,
- dst->cpp,
- (short) src->pitch, src->buffer, src->offset, FALSE,
- (short) dst->pitch, dst->buffer, dst->offset, FALSE,
+ dst->block.size,
+ (short) src->stride/src->block.size, src->buffer, src->offset, FALSE,
+ (short) dst->stride/dst->block.size, dst->buffer, dst->offset, FALSE,
(short) srcx, (short) srcy, (short) dstx, (short) dsty,
(short) width, (short) height, PIPE_LOGICOP_COPY);
}
}
-/* Fill a rectangular sub-region. Need better logic about when to
- * push buffers into AGP - will currently do so whenever possible.
- */
-static void *
-get_pointer(struct pipe_surface *dst, void *dst_map, unsigned x, unsigned y)
-{
- return (char *)dst_map + (y * dst->pitch + x) * dst->cpp;
-}
-
static void
brw_surface_fill(struct pipe_context *pipe,
@@ -99,50 +94,20 @@ brw_surface_fill(struct pipe_context *pipe,
unsigned width, unsigned height, unsigned value)
{
if (0) {
- unsigned i, j;
void *dst_map = pipe->screen->surface_map( pipe->screen,
dst,
PIPE_BUFFER_USAGE_CPU_WRITE );
-
- switch (dst->cpp) {
- case 1: {
- ubyte *row = get_pointer(dst, dst_map, dstx, dsty);
- for (i = 0; i < height; i++) {
- memset(row, value, width);
- row += dst->pitch;
- }
- }
- break;
- case 2: {
- ushort *row = get_pointer(dst, dst_map, dstx, dsty);
- for (i = 0; i < height; i++) {
- for (j = 0; j < width; j++)
- row[j] = (ushort) value;
- row += dst->pitch;
- }
- }
- break;
- case 4: {
- unsigned *row = get_pointer(dst, dst_map, dstx, dsty);
- for (i = 0; i < height; i++) {
- for (j = 0; j < width; j++)
- row[j] = value;
- row += dst->pitch;
- }
- }
- break;
- default:
- assert(0);
- break;
- }
+ pipe_fill_rect(dst_map, &dst->block, dst->stride, dstx, dsty, width, height, value);
pipe->screen->surface_unmap(pipe->screen, dst);
}
else {
+ assert(dst->block.width == 1);
+ assert(dst->block.height == 1);
brw_fill_blit(brw_context(pipe),
- dst->cpp,
- (short) dst->pitch,
+ dst->block.size,
+ (short) dst->stride/dst->block.size,
dst->buffer, dst->offset, FALSE,
(short) dstx, (short) dsty,
(short) width, (short) height,
diff --git a/src/gallium/drivers/i965simple/brw_tex_layout.c b/src/gallium/drivers/i965simple/brw_tex_layout.c
index 78ae0b1223..8c7725605b 100644
--- a/src/gallium/drivers/i965simple/brw_tex_layout.c
+++ b/src/gallium/drivers/i965simple/brw_tex_layout.c
@@ -81,7 +81,7 @@ static void intel_miptree_set_image_offset(struct brw_texture *tex,
assert(x == 0 && y == 0);
assert(img < tex->nr_images[level]);
- tex->image_offset[level][img] = (x + y * tex->pitch) * pt->cpp;
+ tex->image_offset[level][img] = y * tex->stride + x * pt->block.size;
}
static void intel_miptree_set_level_info(struct brw_texture *tex,
@@ -97,8 +97,11 @@ static void intel_miptree_set_level_info(struct brw_texture *tex,
pt->width[level] = w;
pt->height[level] = h;
pt->depth[level] = d;
+
+ pt->nblocksx[level] = pf_get_nblocksx(&pt->block, w);
+ pt->nblocksy[level] = pf_get_nblocksy(&pt->block, h);
- tex->level_offset[level] = (x + y * tex->pitch) * pt->cpp;
+ tex->level_offset[level] = y * tex->stride + x * tex->base.block.size;
tex->nr_images[level] = nr_images;
/*
@@ -123,77 +126,60 @@ static void intel_miptree_set_level_info(struct brw_texture *tex,
static void i945_miptree_layout_2d(struct brw_texture *tex)
{
struct pipe_texture *pt = &tex->base;
- unsigned align_h = 2, align_w = 4;
+ const int align_x = 2, align_y = 4;
unsigned level;
unsigned x = 0;
unsigned y = 0;
unsigned width = pt->width[0];
unsigned height = pt->height[0];
+ unsigned nblocksx = pt->nblocksx[0];
+ unsigned nblocksy = pt->nblocksy[0];
- tex->pitch = pt->width[0];
-
-#if 0
- if (pt->compressed) {
- align_w = intel_compressed_alignment(pt->internal_format);
- tex->pitch = ALIGN(pt->width[0], align_w);
- }
-#endif
+ tex->stride = align(pt->nblocksx[0] * pt->block.size, 4);
/* May need to adjust pitch to accomodate the placement of
- * the 2nd mipmap. This occurs when the alignment
+ * the 2nd mipmap level. This occurs when the alignment
* constraints of mipmap placement push the right edge of the
- * 2nd mipmap out past the width of its parent.
+ * 2nd mipmap level out past the width of its parent.
*/
if (pt->last_level > 0) {
- unsigned mip1_width;
-
- if (pt->compressed) {
- mip1_width = align(minify(pt->width[0]), align_w)
- + align(minify(minify(pt->width[0])), align_w);
- } else {
- mip1_width = align(minify(pt->width[0]), align_w)
- + minify(minify(pt->width[0]));
- }
+ unsigned mip1_nblocksx
+ = align_int(pf_get_nblocksx(&pt->block, minify(width)), align_x)
+ + pf_get_nblocksx(&pt->block, minify(minify(width)));
- if (mip1_width > tex->pitch) {
- tex->pitch = mip1_width;
- }
+ if (mip1_nblocksx > nblocksx)
+ tex->stride = mip1_nblocksx * pt->block.size;
}
- /* Pitch must be a whole number of dwords, even though we
- * express it in texels.
+ /* Pitch must be a whole number of dwords
*/
- tex->pitch = align(tex->pitch * pt->cpp, 4) / pt->cpp;
- tex->total_height = 0;
+ tex->stride = align_int(tex->stride, 64);
+ tex->total_nblocksy = 0;
for (level = 0; level <= pt->last_level; level++) {
- unsigned img_height;
-
intel_miptree_set_level_info(tex, level, 1, x, y, width,
height, 1);
- if (pt->compressed)
- img_height = MAX2(1, height/4);
- else
- img_height = align(height, align_h);
-
+ nblocksy = align_int(nblocksy, align_y);
/* Because the images are packed better, the final offset
* might not be the maximal one:
*/
- tex->total_height = MAX2(tex->total_height, y + img_height);
+ tex->total_nblocksy = MAX2(tex->total_nblocksy, y + nblocksy);
- /* Layout_below: step right after second mipmap.
+ /* Layout_below: step right after second mipmap level.
*/
if (level == 1) {
- x += align(width, align_w);
+ x += align_int(nblocksx, align_x);
}
else {
- y += img_height;
+ y += nblocksy;
}
width = minify(width);
height = minify(height);
+ nblocksx = pf_get_nblocksx(&pt->block, width);
+ nblocksy = pf_get_nblocksy(&pt->block, height);
}
}
@@ -210,26 +196,20 @@ static boolean brw_miptree_layout(struct brw_texture *tex)
unsigned width = pt->width[0];
unsigned height = pt->height[0];
unsigned depth = pt->depth[0];
+ unsigned nblocksx = pt->nblocksx[0];
+ unsigned nblocksy = pt->nblocksy[0];
unsigned pack_x_pitch, pack_x_nr;
unsigned pack_y_pitch;
unsigned level;
unsigned align_h = 2;
unsigned align_w = 4;
- tex->total_height = 0;
-#if 0
- if (pt->compressed) {
- align_w = intel_compressed_alignment(pt->internal_format);
- pt->pitch = align(width, align_w);
- pack_y_pitch = (height + 3) / 4;
- } else
-#endif
- {
- tex->pitch = align(pt->width[0] * pt->cpp, 4) / pt->cpp;
- pack_y_pitch = align(pt->height[0], align_h);
- }
+ tex->total_nblocksy = 0;
+
+ tex->stride = align(pt->nblocksx[0], 4);
+ pack_y_pitch = align(pt->nblocksy[0], align_h);
- pack_x_pitch = tex->pitch;
+ pack_x_pitch = tex->stride / pt->block.size;
pack_x_nr = 1;
for (level = 0; level <= pt->last_level; level++) {
@@ -239,7 +219,7 @@ static boolean brw_miptree_layout(struct brw_texture *tex)
uint q, j;
intel_miptree_set_level_info(tex, level, nr_images,
- 0, tex->total_height,
+ 0, tex->total_nblocksy,
width, height, depth);
for (q = 0; q < nr_images;) {
@@ -253,10 +233,12 @@ static boolean brw_miptree_layout(struct brw_texture *tex)
}
- tex->total_height += y;
+ tex->total_nblocksy += y;
width = minify(width);
height = minify(height);
depth = minify(depth);
+ nblocksx = pf_get_nblocksx(&pt->block, width);
+ nblocksy = pf_get_nblocksy(&pt->block, height);
if (pt->compressed) {
pack_y_pitch = (height + 3) / 4;
@@ -269,7 +251,7 @@ static boolean brw_miptree_layout(struct brw_texture *tex)
if (pack_x_pitch > 4) {
pack_x_pitch >>= 1;
pack_x_nr <<= 1;
- assert(pack_x_pitch * pack_x_nr <= tex->pitch);
+ assert(pack_x_pitch * pack_x_nr * pt->block.size <= tex->stride);
}
if (pack_y_pitch > 2) {
@@ -289,9 +271,9 @@ static boolean brw_miptree_layout(struct brw_texture *tex)
#if 0
PRINT("%s: %dx%dx%d - sz 0x%x\n", __FUNCTION__,
pt->pitch,
- pt->total_height,
- pt->cpp,
- pt->pitch * pt->total_height * pt->cpp );
+ pt->total_nblocksy,
+ pt->block.size,
+ pt->stride * pt->total_nblocksy );
#endif
return TRUE;
@@ -309,11 +291,14 @@ brw_texture_create_screen(struct pipe_screen *screen,
tex->base = *templat;
tex->base.refcount = 1;
+ tex->base.nblocksx[0] = pf_get_nblocksx(&tex->base.block, tex->base.width[0]);
+ tex->base.nblocksy[0] = pf_get_nblocksy(&tex->base.block, tex->base.height[0]);
+
if (brw_miptree_layout(tex))
tex->buffer = ws->buffer_create(ws, 64,
PIPE_BUFFER_USAGE_PIXEL,
- tex->pitch * tex->base.cpp *
- tex->total_height);
+ tex->stride *
+ tex->total_nblocksy);
if (!tex->buffer) {
FREE(tex);
@@ -370,10 +355,10 @@ brw_get_tex_surface_screen(struct pipe_screen *screen,
offset = tex->level_offset[level];
if (pt->target == PIPE_TEXTURE_CUBE) {
- offset += tex->image_offset[level][face] * pt->cpp;
+ offset += tex->image_offset[level][face];
}
else if (pt->target == PIPE_TEXTURE_3D) {
- offset += tex->image_offset[level][zslice] * pt->cpp;
+ offset += tex->image_offset[level][zslice];
}
else {
assert(face == 0);
@@ -386,10 +371,12 @@ brw_get_tex_surface_screen(struct pipe_screen *screen,
assert(ps->refcount);
pipe_buffer_reference(ws, &ps->buffer, tex->buffer);
ps->format = pt->format;
- ps->cpp = pt->cpp;
ps->width = pt->width[level];
ps->height = pt->height[level];
- ps->pitch = tex->pitch;
+ ps->block = pt->block;
+ ps->nblocksx = pt->nblocksx[level];
+ ps->nblocksy = pt->nblocksy[level];
+ ps->stride = tex->stride;
ps->offset = offset;
}
return ps;
diff --git a/src/gallium/drivers/i965simple/brw_wm_surface_state.c b/src/gallium/drivers/i965simple/brw_wm_surface_state.c
index 69e56dc8bd..1a326f9918 100644
--- a/src/gallium/drivers/i965simple/brw_wm_surface_state.c
+++ b/src/gallium/drivers/i965simple/brw_wm_surface_state.c
@@ -160,7 +160,7 @@ void brw_update_texture_surface( struct brw_context *brw,
surf.ss3.tile_walk = BRW_TILEWALK_XMAJOR;
surf.ss3.tiled_surface = 0; /* always zero */
- surf.ss3.pitch = tObj->pitch - 1;
+ surf.ss3.pitch = tObj->stride - 1;
surf.ss3.depth = tObj->base.depth[0] - 1;
surf.ss4.min_lod = 0;
@@ -197,7 +197,7 @@ static void upload_wm_surfaces(struct brw_context *brw )
memset(&surf, 0, sizeof(surf));
if (pipe_surface != NULL) {
- if (pipe_surface->cpp == 4)
+ if (pipe_surface->block.size == 4)
surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
else
surf.ss0.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM;
@@ -210,7 +210,7 @@ static void upload_wm_surfaces(struct brw_context *brw )
surf.ss2.height = pipe_surface->height - 1;
surf.ss3.tile_walk = BRW_TILEWALK_XMAJOR;
surf.ss3.tiled_surface = 0;
- surf.ss3.pitch = (pipe_surface->pitch * pipe_surface->cpp) - 1;
+ surf.ss3.pitch = pipe_surface->stride - 1;
} else {
surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
surf.ss0.surface_type = BRW_SURFACE_NULL;
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-29 10:10:44 +0000