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-rw-r--r--src/gallium/drivers/nv04/nv04_miptree.c3
-rw-r--r--src/gallium/drivers/nv04/nv04_screen.c99
-rw-r--r--src/gallium/drivers/nv04/nv04_screen.h4
-rw-r--r--src/gallium/drivers/nv04/nv04_state.c7
-rw-r--r--src/gallium/drivers/nv04/nv04_state.h2
-rw-r--r--src/gallium/drivers/nv04/nv04_surface_2d.c137
-rw-r--r--src/gallium/drivers/nv04/nv04_surface_2d.h3
-rw-r--r--src/gallium/drivers/nv04/nv04_vbo.c16
8 files changed, 182 insertions, 89 deletions
diff --git a/src/gallium/drivers/nv04/nv04_miptree.c b/src/gallium/drivers/nv04/nv04_miptree.c
index 4da833c25e..93f752faec 100644
--- a/src/gallium/drivers/nv04/nv04_miptree.c
+++ b/src/gallium/drivers/nv04/nv04_miptree.c
@@ -31,7 +31,8 @@ nv04_miptree_layout(struct nv04_miptree *nv04mt)
for (l = 0; l <= pt->last_level; l++) {
- nv04mt->level[l].image_offset = offset;
+ nv04mt->level[l].image_offset =
+ CALLOC(nr_faces, sizeof(unsigned));
offset += nv04mt->level[l].pitch * pt->height[l];
}
diff --git a/src/gallium/drivers/nv04/nv04_screen.c b/src/gallium/drivers/nv04/nv04_screen.c
index f9f6d97426..ff2febb668 100644
--- a/src/gallium/drivers/nv04/nv04_screen.c
+++ b/src/gallium/drivers/nv04/nv04_screen.c
@@ -1,27 +1,9 @@
#include "pipe/p_screen.h"
#include "pipe/p_inlines.h"
-#include "util/u_simple_screen.h"
#include "nv04_context.h"
#include "nv04_screen.h"
-static const char *
-nv04_screen_get_name(struct pipe_screen *screen)
-{
- struct nv04_screen *nv04screen = nv04_screen(screen);
- struct nouveau_device *dev = nv04screen->nvws->channel->device;
- static char buffer[128];
-
- snprintf(buffer, sizeof(buffer), "NV%02X", dev->chipset);
- return buffer;
-}
-
-static const char *
-nv04_screen_get_vendor(struct pipe_screen *screen)
-{
- return "nouveau";
-}
-
static int
nv04_screen_get_param(struct pipe_screen *screen, int param)
{
@@ -58,6 +40,10 @@ nv04_screen_get_param(struct pipe_screen *screen, int param)
return 0;
case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
return 1;
+ case PIPE_CAP_TGSI_CONT_SUPPORTED:
+ return 0;
+ case PIPE_CAP_BLEND_EQUATION_SEPARATE:
+ return 0;
case NOUVEAU_CAP_HW_VTXBUF:
case NOUVEAU_CAP_HW_IDXBUF:
return 0;
@@ -97,6 +83,13 @@ nv04_screen_is_format_supported(struct pipe_screen *screen,
switch (format) {
case PIPE_FORMAT_A8R8G8B8_UNORM:
case PIPE_FORMAT_R5G6B5_UNORM:
+ return TRUE;
+ default:
+ break;
+ }
+ } else
+ if (tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) {
+ switch (format) {
case PIPE_FORMAT_Z16_UNORM:
return TRUE;
default:
@@ -123,10 +116,9 @@ static void
nv04_screen_destroy(struct pipe_screen *pscreen)
{
struct nv04_screen *screen = nv04_screen(pscreen);
- struct nouveau_winsys *nvws = screen->nvws;
- nvws->notifier_free(&screen->sync);
- nvws->grobj_free(&screen->fahrenheit);
+ nouveau_notifier_free(&screen->sync);
+ nouveau_grobj_free(&screen->fahrenheit);
nv04_surface_2d_takedown(&screen->eng2d);
FREE(pscreen);
@@ -141,21 +133,38 @@ nv04_surface_buffer(struct pipe_surface *surf)
}
struct pipe_screen *
-nv04_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws)
+nv04_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
{
struct nv04_screen *screen = CALLOC_STRUCT(nv04_screen);
+ struct nouveau_channel *chan;
+ struct pipe_screen *pscreen;
unsigned fahrenheit_class = 0, sub3d_class = 0;
- unsigned chipset = nvws->channel->device->chipset;
int ret;
if (!screen)
return NULL;
- screen->nvws = nvws;
+ pscreen = &screen->base.base;
+
+ ret = nouveau_screen_init(&screen->base, dev);
+ if (ret) {
+ nv04_screen_destroy(pscreen);
+ return NULL;
+ }
+ chan = screen->base.channel;
+
+ pscreen->winsys = ws;
+ pscreen->destroy = nv04_screen_destroy;
+ pscreen->get_param = nv04_screen_get_param;
+ pscreen->get_paramf = nv04_screen_get_paramf;
+ pscreen->is_format_supported = nv04_screen_is_format_supported;
- if (chipset>=0x20) {
+ nv04_screen_init_miptree_functions(pscreen);
+ nv04_screen_init_transfer_functions(pscreen);
+
+ if (dev->chipset >= 0x20) {
fahrenheit_class = 0;
sub3d_class = 0;
- } else if (chipset>=0x10) {
+ } else if (dev->chipset >= 0x10) {
fahrenheit_class = NV10_DX5_TEXTURED_TRIANGLE;
sub3d_class = NV10_CONTEXT_SURFACES_3D;
} else {
@@ -164,50 +173,40 @@ nv04_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws)
}
if (!fahrenheit_class) {
- NOUVEAU_ERR("Unknown nv04 chipset: nv%02x\n", chipset);
+ NOUVEAU_ERR("Unknown nv04 chipset: nv%02x\n", dev->chipset);
return NULL;
}
- /* 2D engine setup */
- screen->eng2d = nv04_surface_2d_init(nvws);
- screen->eng2d->buf = nv04_surface_buffer;
-
/* 3D object */
- ret = nvws->grobj_alloc(nvws, fahrenheit_class, &screen->fahrenheit);
+ ret = nouveau_grobj_alloc(chan, 0xbeef0001, fahrenheit_class,
+ &screen->fahrenheit);
if (ret) {
NOUVEAU_ERR("Error creating 3D object: %d\n", ret);
return NULL;
}
+ BIND_RING(chan, screen->fahrenheit, 7);
/* 3D surface object */
- ret = nvws->grobj_alloc(nvws, sub3d_class, &screen->context_surfaces_3d);
+ ret = nouveau_grobj_alloc(chan, 0xbeef0002, sub3d_class,
+ &screen->context_surfaces_3d);
if (ret) {
NOUVEAU_ERR("Error creating 3D surface object: %d\n", ret);
return NULL;
}
+ BIND_RING(chan, screen->context_surfaces_3d, 6);
+
+ /* 2D engine setup */
+ screen->eng2d = nv04_surface_2d_init(&screen->base);
+ screen->eng2d->buf = nv04_surface_buffer;
/* Notifier for sync purposes */
- ret = nvws->notifier_alloc(nvws, 1, &screen->sync);
+ ret = nouveau_notifier_alloc(chan, 0xbeef0301, 1, &screen->sync);
if (ret) {
NOUVEAU_ERR("Error creating notifier object: %d\n", ret);
- nv04_screen_destroy(&screen->pipe);
+ nv04_screen_destroy(pscreen);
return NULL;
}
- screen->pipe.winsys = ws;
- screen->pipe.destroy = nv04_screen_destroy;
-
- screen->pipe.get_name = nv04_screen_get_name;
- screen->pipe.get_vendor = nv04_screen_get_vendor;
- screen->pipe.get_param = nv04_screen_get_param;
- screen->pipe.get_paramf = nv04_screen_get_paramf;
-
- screen->pipe.is_format_supported = nv04_screen_is_format_supported;
-
- nv04_screen_init_miptree_functions(&screen->pipe);
- nv04_screen_init_transfer_functions(&screen->pipe);
- u_simple_screen_init(&screen->pipe);
-
- return &screen->pipe;
+ return pscreen;
}
diff --git a/src/gallium/drivers/nv04/nv04_screen.h b/src/gallium/drivers/nv04/nv04_screen.h
index ee6fb6db44..11466b9442 100644
--- a/src/gallium/drivers/nv04/nv04_screen.h
+++ b/src/gallium/drivers/nv04/nv04_screen.h
@@ -1,11 +1,11 @@
#ifndef __NV04_SCREEN_H__
#define __NV04_SCREEN_H__
-#include "pipe/p_screen.h"
+#include "nouveau/nouveau_screen.h"
#include "nv04_surface_2d.h"
struct nv04_screen {
- struct pipe_screen pipe;
+ struct nouveau_screen base;
struct nouveau_winsys *nvws;
unsigned chipset;
diff --git a/src/gallium/drivers/nv04/nv04_state.c b/src/gallium/drivers/nv04/nv04_state.c
index 87c635f962..d356ebd8b3 100644
--- a/src/gallium/drivers/nv04/nv04_state.c
+++ b/src/gallium/drivers/nv04/nv04_state.c
@@ -2,6 +2,7 @@
#include "pipe/p_state.h"
#include "pipe/p_defines.h"
#include "pipe/p_shader_tokens.h"
+#include "pipe/p_inlines.h"
#include "tgsi/tgsi_parse.h"
@@ -334,7 +335,7 @@ nv04_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index,
const struct pipe_constant_buffer *buf )
{
struct nv04_context *nv04 = nv04_context(pipe);
- struct pipe_winsys *ws = pipe->winsys;
+ struct pipe_screen *pscreen = pipe->screen;
assert(shader < PIPE_SHADER_TYPES);
assert(index == 0);
@@ -342,12 +343,12 @@ nv04_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index,
if (buf) {
void *mapped;
if (buf->buffer && buf->buffer->size &&
- (mapped = ws->buffer_map(ws, buf->buffer, PIPE_BUFFER_USAGE_CPU_READ)))
+ (mapped = pipe_buffer_map(pscreen, buf->buffer, PIPE_BUFFER_USAGE_CPU_READ)))
{
memcpy(nv04->constbuf[shader], mapped, buf->buffer->size);
nv04->constbuf_nr[shader] =
buf->buffer->size / (4 * sizeof(float));
- ws->buffer_unmap(ws, buf->buffer);
+ pipe_buffer_unmap(pscreen, buf->buffer);
}
}
}
diff --git a/src/gallium/drivers/nv04/nv04_state.h b/src/gallium/drivers/nv04/nv04_state.h
index 0d51439e3f..399f750dbe 100644
--- a/src/gallium/drivers/nv04/nv04_state.h
+++ b/src/gallium/drivers/nv04/nv04_state.h
@@ -37,7 +37,7 @@ struct nv04_miptree {
struct {
uint pitch;
- uint image_offset;
+ uint *image_offset;
} level[PIPE_MAX_TEXTURE_LEVELS];
};
diff --git a/src/gallium/drivers/nv04/nv04_surface_2d.c b/src/gallium/drivers/nv04/nv04_surface_2d.c
index f3a8d7efee..f88e138c79 100644
--- a/src/gallium/drivers/nv04/nv04_surface_2d.c
+++ b/src/gallium/drivers/nv04/nv04_surface_2d.c
@@ -4,6 +4,7 @@
#include "nouveau/nouveau_winsys.h"
#include "nouveau/nouveau_util.h"
+#include "nouveau/nouveau_screen.h"
#include "nv04_surface_2d.h"
static INLINE int
@@ -14,11 +15,13 @@ nv04_surface_format(enum pipe_format format)
return NV04_CONTEXT_SURFACES_2D_FORMAT_Y8;
case PIPE_FORMAT_R16_SNORM:
case PIPE_FORMAT_R5G6B5_UNORM:
+ case PIPE_FORMAT_Z16_UNORM:
return NV04_CONTEXT_SURFACES_2D_FORMAT_R5G6B5;
case PIPE_FORMAT_X8R8G8B8_UNORM:
case PIPE_FORMAT_A8R8G8B8_UNORM:
return NV04_CONTEXT_SURFACES_2D_FORMAT_A8R8G8B8;
case PIPE_FORMAT_Z24S8_UNORM:
+ case PIPE_FORMAT_Z24X8_UNORM:
return NV04_CONTEXT_SURFACES_2D_FORMAT_Y32;
default:
return -1;
@@ -32,9 +35,11 @@ nv04_rect_format(enum pipe_format format)
case PIPE_FORMAT_A8_UNORM:
return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8;
case PIPE_FORMAT_R5G6B5_UNORM:
+ case PIPE_FORMAT_Z16_UNORM:
return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A16R5G6B5;
case PIPE_FORMAT_A8R8G8B8_UNORM:
case PIPE_FORMAT_Z24S8_UNORM:
+ case PIPE_FORMAT_Z24X8_UNORM:
return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8;
default:
return -1;
@@ -96,11 +101,11 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
struct pipe_surface *src, int sx, int sy,
int w, int h)
{
- struct nouveau_channel *chan = ctx->nvws->channel;
+ struct nouveau_channel *chan = ctx->swzsurf->channel;
struct nouveau_grobj *swzsurf = ctx->swzsurf;
struct nouveau_grobj *sifm = ctx->sifm;
- struct nouveau_bo *src_bo = ctx->nvws->get_bo(ctx->buf(src));
- struct nouveau_bo *dst_bo = ctx->nvws->get_bo(ctx->buf(dst));
+ struct nouveau_bo *src_bo = nouveau_bo(ctx->buf(src));
+ struct nouveau_bo *dst_bo = nouveau_bo(ctx->buf(dst));
const unsigned src_pitch = ((struct nv04_surface *)src)->pitch;
const unsigned max_w = 1024;
const unsigned max_h = 1024;
@@ -109,10 +114,10 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
unsigned cx;
unsigned cy;
- /* POT or GTFO */
- assert(!(w & (w - 1)) && !(h & (h - 1)));
+#if 0
/* That's the way she likes it */
assert(src_pitch == ((struct nv04_surface *)dst)->pitch);
+#endif
BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_DMA_IMAGE, 1);
OUT_RELOCo(chan, dst_bo,
@@ -132,7 +137,7 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
for (cy = 0; cy < h; cy += sub_h) {
for (cx = 0; cx < w; cx += sub_w) {
BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_OFFSET, 1);
- OUT_RELOCl(chan, dst_bo, dst->offset + nv04_swizzle_bits(cx, cy) *
+ OUT_RELOCl(chan, dst_bo, dst->offset + nv04_swizzle_bits(cx+dx, cy+dy) *
dst->texture->block.size, NOUVEAU_BO_GART |
NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
@@ -152,8 +157,8 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
OUT_RING (chan, src_pitch |
NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_CENTER |
NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_POINT_SAMPLE);
- OUT_RELOCl(chan, src_bo, src->offset + cy * src_pitch +
- cx * src->texture->block.size, NOUVEAU_BO_GART |
+ OUT_RELOCl(chan, src_bo, src->offset + (cy+sy) * src_pitch +
+ (cx+sx) * src->texture->block.size, NOUVEAU_BO_GART |
NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
OUT_RING (chan, 0);
}
@@ -167,10 +172,10 @@ nv04_surface_copy_m2mf(struct nv04_surface_2d *ctx,
struct pipe_surface *dst, int dx, int dy,
struct pipe_surface *src, int sx, int sy, int w, int h)
{
- struct nouveau_channel *chan = ctx->nvws->channel;
+ struct nouveau_channel *chan = ctx->m2mf->channel;
struct nouveau_grobj *m2mf = ctx->m2mf;
- struct nouveau_bo *src_bo = ctx->nvws->get_bo(ctx->buf(src));
- struct nouveau_bo *dst_bo = ctx->nvws->get_bo(ctx->buf(dst));
+ struct nouveau_bo *src_bo = nouveau_bo(ctx->buf(src));
+ struct nouveau_bo *dst_bo = nouveau_bo(ctx->buf(dst));
unsigned src_pitch = ((struct nv04_surface *)src)->pitch;
unsigned dst_pitch = ((struct nv04_surface *)dst)->pitch;
unsigned dst_offset = dst->offset + dy * dst_pitch +
@@ -209,15 +214,52 @@ nv04_surface_copy_m2mf(struct nv04_surface_2d *ctx,
}
static int
+nv04_surface_copy_m2mf_swizzle(struct nv04_surface_2d *ctx,
+ struct pipe_surface *dst, int dx, int dy,
+ struct pipe_surface *src, int sx, int sy)
+{
+ struct nouveau_channel *chan = ctx->m2mf->channel;
+ struct nouveau_grobj *m2mf = ctx->m2mf;
+ struct nouveau_bo *src_bo = nouveau_bo(ctx->buf(src));
+ struct nouveau_bo *dst_bo = nouveau_bo(ctx->buf(dst));
+ unsigned src_pitch = ((struct nv04_surface *)src)->pitch;
+ unsigned dst_pitch = ((struct nv04_surface *)dst)->pitch;
+ unsigned dst_offset = dst->offset + nv04_swizzle_bits(dx, dy) *
+ dst->texture->block.size;
+ unsigned src_offset = src->offset + sy * src_pitch +
+ sx * src->texture->block.size;
+
+ BEGIN_RING(chan, m2mf, NV04_MEMORY_TO_MEMORY_FORMAT_DMA_BUFFER_IN, 2);
+ OUT_RELOCo(chan, src_bo,
+ NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
+ OUT_RELOCo(chan, dst_bo,
+ NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
+
+ BEGIN_RING(chan, m2mf, NV04_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
+ OUT_RELOCl(chan, src_bo, src_offset,
+ NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD);
+ OUT_RELOCl(chan, dst_bo, dst_offset,
+ NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_WR);
+ OUT_RING (chan, src_pitch);
+ OUT_RING (chan, dst_pitch);
+ OUT_RING (chan, 1 * src->texture->block.size);
+ OUT_RING (chan, 1);
+ OUT_RING (chan, 0x0101);
+ OUT_RING (chan, 0);
+
+ return 0;
+}
+
+static int
nv04_surface_copy_blit(struct nv04_surface_2d *ctx, struct pipe_surface *dst,
int dx, int dy, struct pipe_surface *src, int sx, int sy,
int w, int h)
{
- struct nouveau_channel *chan = ctx->nvws->channel;
+ struct nouveau_channel *chan = ctx->surf2d->channel;
struct nouveau_grobj *surf2d = ctx->surf2d;
struct nouveau_grobj *blit = ctx->blit;
- struct nouveau_bo *src_bo = ctx->nvws->get_bo(ctx->buf(src));
- struct nouveau_bo *dst_bo = ctx->nvws->get_bo(ctx->buf(dst));
+ struct nouveau_bo *src_bo = nouveau_bo(ctx->buf(src));
+ struct nouveau_bo *dst_bo = nouveau_bo(ctx->buf(dst));
unsigned src_pitch = ((struct nv04_surface *)src)->pitch;
unsigned dst_pitch = ((struct nv04_surface *)dst)->pitch;
int format;
@@ -257,8 +299,59 @@ nv04_surface_copy(struct nv04_surface_2d *ctx, struct pipe_surface *dst,
assert(src->format == dst->format);
/* Setup transfer to swizzle the texture to vram if needed */
- if (src_linear && !dst_linear && w > 1 && h > 1) {
- nv04_surface_copy_swizzle(ctx, dst, dx, dy, src, sx, sy, w, h);
+ if (src_linear && !dst_linear) {
+ int x,y;
+
+ if ((w>1) && (h>1)) {
+ int potWidth = 1<<log2i(w);
+ int potHeight = 1<<log2i(h);
+ int remainWidth = w-potWidth;
+ int remainHeight = h-potHeight;
+ int squareDim = (potWidth>potHeight ? potHeight : potWidth);
+
+ /* top left is always POT, but we can only swizzle squares */
+ for (y=0; y<potHeight; y+=squareDim) {
+ for (x=0; x<potWidth; x+= squareDim) {
+ nv04_surface_copy_swizzle(ctx, dst, dx+x, dy+y,
+ src, sx+x, sy+y,
+ squareDim, squareDim);
+ }
+ }
+
+ /* top right */
+ if (remainWidth>0) {
+ nv04_surface_copy(ctx, dst, dx+potWidth, dy,
+ src, sx+potWidth, sy,
+ remainWidth, potHeight);
+ }
+
+ /* bottom left */
+ if (remainHeight>0) {
+ nv04_surface_copy(ctx, dst, dx, dy+potHeight,
+ src, sx, sy+potHeight,
+ potWidth, remainHeight);
+ }
+
+ /* bottom right */
+ if ((remainWidth>0) && (remainHeight>0)) {
+ nv04_surface_copy(ctx, dst, dx+potWidth, dy+potHeight,
+ src, sx+potWidth, sy+potHeight,
+ remainWidth, remainHeight);
+ }
+ } else if (w==1) {
+ /* We have a column to copy to a swizzled texture */
+ for (y=0; y<h; y++) {
+ nv04_surface_copy_m2mf_swizzle(ctx, dst, dx, dy+y,
+ src, sx, sy+y);
+ }
+ } else if (h==1) {
+ /* We have a row to copy to a swizzled texture */
+ for (x=0; x<w; x++) {
+ nv04_surface_copy_m2mf_swizzle(ctx, dst, dx+x, dy,
+ src, sx+x, sy);
+ }
+ }
+
return;
}
@@ -266,8 +359,7 @@ nv04_surface_copy(struct nv04_surface_2d *ctx, struct pipe_surface *dst,
* to NV_MEMORY_TO_MEMORY_FORMAT in this case.
*/
if ((src->offset & 63) || (dst->offset & 63) ||
- (src_pitch & 63) || (dst_pitch & 63) ||
- debug_get_bool_option("NOUVEAU_NO_COPYBLIT", FALSE)) {
+ (src_pitch & 63) || (dst_pitch & 63)) {
nv04_surface_copy_m2mf(ctx, dst, dx, dy, src, sx, sy, w, h);
return;
}
@@ -279,10 +371,10 @@ static void
nv04_surface_fill(struct nv04_surface_2d *ctx, struct pipe_surface *dst,
int dx, int dy, int w, int h, unsigned value)
{
- struct nouveau_channel *chan = ctx->nvws->channel;
+ struct nouveau_channel *chan = ctx->surf2d->channel;
struct nouveau_grobj *surf2d = ctx->surf2d;
struct nouveau_grobj *rect = ctx->rect;
- struct nouveau_bo *dst_bo = ctx->nvws->get_bo(ctx->buf(dst));
+ struct nouveau_bo *dst_bo = nouveau_bo(ctx->buf(dst));
unsigned dst_pitch = ((struct nv04_surface *)dst)->pitch;
int cs2d_format, gdirect_format;
@@ -334,10 +426,10 @@ nv04_surface_2d_takedown(struct nv04_surface_2d **pctx)
}
struct nv04_surface_2d *
-nv04_surface_2d_init(struct nouveau_winsys *nvws)
+nv04_surface_2d_init(struct nouveau_screen *screen)
{
struct nv04_surface_2d *ctx = CALLOC_STRUCT(nv04_surface_2d);
- struct nouveau_channel *chan = nvws->channel;
+ struct nouveau_channel *chan = screen->channel;
unsigned handle = 0x88000000, class;
int ret;
@@ -460,7 +552,6 @@ nv04_surface_2d_init(struct nouveau_winsys *nvws)
return NULL;
}
- ctx->nvws = nvws;
ctx->copy = nv04_surface_copy;
ctx->fill = nv04_surface_fill;
return ctx;
diff --git a/src/gallium/drivers/nv04/nv04_surface_2d.h b/src/gallium/drivers/nv04/nv04_surface_2d.h
index 82ce7189c8..02b3f56ba8 100644
--- a/src/gallium/drivers/nv04/nv04_surface_2d.h
+++ b/src/gallium/drivers/nv04/nv04_surface_2d.h
@@ -7,7 +7,6 @@ struct nv04_surface {
};
struct nv04_surface_2d {
- struct nouveau_winsys *nvws;
struct nouveau_notifier *ntfy;
struct nouveau_grobj *surf2d;
struct nouveau_grobj *swzsurf;
@@ -26,7 +25,7 @@ struct nv04_surface_2d {
};
struct nv04_surface_2d *
-nv04_surface_2d_init(struct nouveau_winsys *nvws);
+nv04_surface_2d_init(struct nouveau_screen *screen);
void
nv04_surface_2d_takedown(struct nv04_surface_2d **);
diff --git a/src/gallium/drivers/nv04/nv04_vbo.c b/src/gallium/drivers/nv04/nv04_vbo.c
index d21a0e34f7..e3167814f2 100644
--- a/src/gallium/drivers/nv04/nv04_vbo.c
+++ b/src/gallium/drivers/nv04/nv04_vbo.c
@@ -1,6 +1,7 @@
#include "draw/draw_context.h"
#include "pipe/p_context.h"
#include "pipe/p_state.h"
+#include "pipe/p_inlines.h"
#include "nv04_context.h"
#include "nv04_state.h"
@@ -13,6 +14,7 @@ boolean nv04_draw_elements( struct pipe_context *pipe,
unsigned indexSize,
unsigned prim, unsigned start, unsigned count)
{
+ struct pipe_screen *pscreen = pipe->screen;
struct nv04_context *nv04 = nv04_context( pipe );
struct draw_context *draw = nv04->draw;
unsigned i;
@@ -25,17 +27,17 @@ boolean nv04_draw_elements( struct pipe_context *pipe,
for (i = 0; i < PIPE_MAX_ATTRIBS; i++) {
if (nv04->vtxbuf[i].buffer) {
void *buf
- = pipe->winsys->buffer_map(pipe->winsys,
- nv04->vtxbuf[i].buffer,
- PIPE_BUFFER_USAGE_CPU_READ);
+ = pipe_buffer_map(pscreen,
+ nv04->vtxbuf[i].buffer,
+ PIPE_BUFFER_USAGE_CPU_READ);
draw_set_mapped_vertex_buffer(draw, i, buf);
}
}
/* Map index buffer, if present */
if (indexBuffer) {
void *mapped_indexes
- = pipe->winsys->buffer_map(pipe->winsys, indexBuffer,
- PIPE_BUFFER_USAGE_CPU_READ);
+ = pipe_buffer_map(pscreen, indexBuffer,
+ PIPE_BUFFER_USAGE_CPU_READ);
draw_set_mapped_element_buffer(draw, indexSize, mapped_indexes);
}
else {
@@ -55,12 +57,12 @@ boolean nv04_draw_elements( struct pipe_context *pipe,
*/
for (i = 0; i < PIPE_MAX_ATTRIBS; i++) {
if (nv04->vtxbuf[i].buffer) {
- pipe->winsys->buffer_unmap(pipe->winsys, nv04->vtxbuf[i].buffer);
+ pipe_buffer_unmap(pscreen, nv04->vtxbuf[i].buffer);
draw_set_mapped_vertex_buffer(draw, i, NULL);
}
}
if (indexBuffer) {
- pipe->winsys->buffer_unmap(pipe->winsys, indexBuffer);
+ pipe_buffer_unmap(pscreen, indexBuffer);
draw_set_mapped_element_buffer(draw, 0, NULL);
}
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-08 12:33:59 +0000