summaryrefslogtreecommitdiff
path: root/src/gallium/drivers/nv40
diff options
context:
space:
mode:
Diffstat (limited to 'src/gallium/drivers/nv40')
-rw-r--r--src/gallium/drivers/nv40/nv40_draw.c21
-rw-r--r--src/gallium/drivers/nv40/nv40_fragprog.c32
-rw-r--r--src/gallium/drivers/nv40/nv40_fragtex.c7
-rw-r--r--src/gallium/drivers/nv40/nv40_query.c25
-rw-r--r--src/gallium/drivers/nv40/nv40_screen.c147
-rw-r--r--src/gallium/drivers/nv40/nv40_screen.h4
-rw-r--r--src/gallium/drivers/nv40/nv40_state_emit.c11
-rw-r--r--src/gallium/drivers/nv40/nv40_state_fb.c97
-rw-r--r--src/gallium/drivers/nv40/nv40_surface.c5
-rw-r--r--src/gallium/drivers/nv40/nv40_transfer.c2
-rw-r--r--src/gallium/drivers/nv40/nv40_vbo.c42
-rw-r--r--src/gallium/drivers/nv40/nv40_vertprog.c36
12 files changed, 223 insertions, 206 deletions
diff --git a/src/gallium/drivers/nv40/nv40_draw.c b/src/gallium/drivers/nv40/nv40_draw.c
index c83ff91d7e..b2f19ecb69 100644
--- a/src/gallium/drivers/nv40/nv40_draw.c
+++ b/src/gallium/drivers/nv40/nv40_draw.c
@@ -1,4 +1,5 @@
#include "pipe/p_shader_tokens.h"
+#include "pipe/p_inlines.h"
#include "util/u_pack_color.h"
@@ -81,7 +82,7 @@ nv40_render_prim(struct draw_stage *stage, struct prim_header *prim,
{
struct nv40_render_stage *rs = nv40_render_stage(stage);
struct nv40_context *nv40 = rs->nv40;
- struct nouveau_pushbuf *pb = nv40->nvws->channel->pushbuf;
+ struct nouveau_pushbuf *pb = nv40->screen->base.channel->pushbuf;
unsigned i;
/* Ensure there's room for 4xfloat32 + potentially 3 begin/end */
@@ -231,7 +232,7 @@ nv40_draw_elements_swtnl(struct pipe_context *pipe,
unsigned mode, unsigned start, unsigned count)
{
struct nv40_context *nv40 = nv40_context(pipe);
- struct pipe_winsys *ws = pipe->winsys;
+ struct pipe_screen *pscreen = pipe->screen;
unsigned i;
void *map;
@@ -241,13 +242,14 @@ nv40_draw_elements_swtnl(struct pipe_context *pipe,
nv40_state_emit(nv40);
for (i = 0; i < nv40->vtxbuf_nr; i++) {
- map = ws->buffer_map(ws, nv40->vtxbuf[i].buffer,
+ map = pipe_buffer_map(pscreen, nv40->vtxbuf[i].buffer,
PIPE_BUFFER_USAGE_CPU_READ);
draw_set_mapped_vertex_buffer(nv40->draw, i, map);
}
if (idxbuf) {
- map = ws->buffer_map(ws, idxbuf, PIPE_BUFFER_USAGE_CPU_READ);
+ map = pipe_buffer_map(pscreen, idxbuf,
+ PIPE_BUFFER_USAGE_CPU_READ);
draw_set_mapped_element_buffer(nv40->draw, idxbuf_size, map);
} else {
draw_set_mapped_element_buffer(nv40->draw, 0, NULL);
@@ -256,21 +258,22 @@ nv40_draw_elements_swtnl(struct pipe_context *pipe,
if (nv40->constbuf[PIPE_SHADER_VERTEX]) {
const unsigned nr = nv40->constbuf_nr[PIPE_SHADER_VERTEX];
- map = ws->buffer_map(ws, nv40->constbuf[PIPE_SHADER_VERTEX],
- PIPE_BUFFER_USAGE_CPU_READ);
+ map = pipe_buffer_map(pscreen,
+ nv40->constbuf[PIPE_SHADER_VERTEX],
+ PIPE_BUFFER_USAGE_CPU_READ);
draw_set_mapped_constant_buffer(nv40->draw, map, nr);
}
draw_arrays(nv40->draw, mode, start, count);
for (i = 0; i < nv40->vtxbuf_nr; i++)
- ws->buffer_unmap(ws, nv40->vtxbuf[i].buffer);
+ pipe_buffer_unmap(pscreen, nv40->vtxbuf[i].buffer);
if (idxbuf)
- ws->buffer_unmap(ws, idxbuf);
+ pipe_buffer_unmap(pscreen, idxbuf);
if (nv40->constbuf[PIPE_SHADER_VERTEX])
- ws->buffer_unmap(ws, nv40->constbuf[PIPE_SHADER_VERTEX]);
+ pipe_buffer_unmap(pscreen, nv40->constbuf[PIPE_SHADER_VERTEX]);
draw_flush(nv40->draw);
pipe->flush(pipe, 0, NULL);
diff --git a/src/gallium/drivers/nv40/nv40_fragprog.c b/src/gallium/drivers/nv40/nv40_fragprog.c
index 16e40889ec..32d9ed1a7f 100644
--- a/src/gallium/drivers/nv40/nv40_fragprog.c
+++ b/src/gallium/drivers/nv40/nv40_fragprog.c
@@ -1,6 +1,7 @@
#include "pipe/p_context.h"
#include "pipe/p_defines.h"
#include "pipe/p_state.h"
+#include "pipe/p_inlines.h"
#include "pipe/p_shader_tokens.h"
#include "tgsi/tgsi_parse.h"
@@ -789,10 +790,10 @@ nv40_fragprog_prepare(struct nv40_fpc *fpc)
assert(imm->Immediate.DataType == TGSI_IMM_FLOAT32);
assert(fpc->nr_imm < MAX_IMM);
- vals[0] = imm->u.ImmediateFloat32[0].Float;
- vals[1] = imm->u.ImmediateFloat32[1].Float;
- vals[2] = imm->u.ImmediateFloat32[2].Float;
- vals[3] = imm->u.ImmediateFloat32[3].Float;
+ vals[0] = imm->u[0].Float;
+ vals[1] = imm->u[1].Float;
+ vals[2] = imm->u[2].Float;
+ vals[3] = imm->u[3].Float;
fpc->imm[fpc->nr_imm++] = constant(fpc, -1, vals);
}
break;
@@ -881,12 +882,12 @@ static void
nv40_fragprog_upload(struct nv40_context *nv40,
struct nv40_fragment_program *fp)
{
- struct pipe_winsys *ws = nv40->pipe.winsys;
+ struct pipe_screen *pscreen = nv40->pipe.screen;
const uint32_t le = 1;
uint32_t *map;
int i;
- map = ws->buffer_map(ws, fp->buffer, PIPE_BUFFER_USAGE_CPU_WRITE);
+ map = pipe_buffer_map(pscreen, fp->buffer, PIPE_BUFFER_USAGE_CPU_WRITE);
#if 0
for (i = 0; i < fp->insn_len; i++) {
@@ -908,7 +909,7 @@ nv40_fragprog_upload(struct nv40_context *nv40,
}
}
- ws->buffer_unmap(ws, fp->buffer);
+ pipe_buffer_unmap(pscreen, fp->buffer);
}
static boolean
@@ -917,8 +918,7 @@ nv40_fragprog_validate(struct nv40_context *nv40)
struct nv40_fragment_program *fp = nv40->fragprog;
struct pipe_buffer *constbuf =
nv40->constbuf[PIPE_SHADER_FRAGMENT];
- struct pipe_screen *screen = nv40->pipe.screen;
- struct pipe_winsys *ws = nv40->pipe.winsys;
+ struct pipe_screen *pscreen = nv40->pipe.screen;
struct nouveau_stateobj *so;
boolean new_consts = FALSE;
int i;
@@ -933,14 +933,15 @@ nv40_fragprog_validate(struct nv40_context *nv40)
return FALSE;
}
- fp->buffer = screen->buffer_create(screen, 0x100, 0, fp->insn_len * 4);
+ fp->buffer = pscreen->buffer_create(pscreen, 0x100, 0, fp->insn_len * 4);
nv40_fragprog_upload(nv40, fp);
so = so_new(4, 1);
so_method(so, nv40->screen->curie, NV40TCL_FP_ADDRESS, 1);
- so_reloc (so, fp->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
- NOUVEAU_BO_RD | NOUVEAU_BO_LOW | NOUVEAU_BO_OR,
- NV40TCL_FP_ADDRESS_DMA0, NV40TCL_FP_ADDRESS_DMA1);
+ so_reloc (so, nouveau_bo(fp->buffer), 0, NOUVEAU_BO_VRAM |
+ NOUVEAU_BO_GART | NOUVEAU_BO_RD | NOUVEAU_BO_LOW |
+ NOUVEAU_BO_OR, NV40TCL_FP_ADDRESS_DMA0,
+ NV40TCL_FP_ADDRESS_DMA1);
so_method(so, nv40->screen->curie, NV40TCL_FP_CONTROL, 1);
so_data (so, fp->fp_control);
so_ref(so, &fp->so);
@@ -950,7 +951,8 @@ update_constants:
if (fp->nr_consts) {
float *map;
- map = ws->buffer_map(ws, constbuf, PIPE_BUFFER_USAGE_CPU_READ);
+ map = pipe_buffer_map(pscreen, constbuf,
+ PIPE_BUFFER_USAGE_CPU_READ);
for (i = 0; i < fp->nr_consts; i++) {
struct nv40_fragment_program_data *fpd = &fp->consts[i];
uint32_t *p = &fp->insn[fpd->offset];
@@ -961,7 +963,7 @@ update_constants:
memcpy(p, cb, 4 * sizeof(float));
new_consts = TRUE;
}
- ws->buffer_unmap(ws, constbuf);
+ pipe_buffer_unmap(pscreen, constbuf);
if (new_consts)
nv40_fragprog_upload(nv40, fp);
diff --git a/src/gallium/drivers/nv40/nv40_fragtex.c b/src/gallium/drivers/nv40/nv40_fragtex.c
index eb3002dc05..f6cdf31dfe 100644
--- a/src/gallium/drivers/nv40/nv40_fragtex.c
+++ b/src/gallium/drivers/nv40/nv40_fragtex.c
@@ -62,6 +62,7 @@ nv40_fragtex_build(struct nv40_context *nv40, int unit)
{
struct nv40_sampler_state *ps = nv40->tex_sampler[unit];
struct nv40_miptree *nv40mt = nv40->tex_miptree[unit];
+ struct nouveau_bo *bo = nouveau_bo(nv40mt->buffer);
struct pipe_texture *pt = &nv40mt->base;
struct nv40_texture_format *tf;
struct nouveau_stateobj *so;
@@ -108,9 +109,9 @@ nv40_fragtex_build(struct nv40_context *nv40, int unit)
so = so_new(16, 2);
so_method(so, nv40->screen->curie, NV40TCL_TEX_OFFSET(unit), 8);
- so_reloc (so, nv40mt->buffer, 0, tex_flags | NOUVEAU_BO_LOW, 0, 0);
- so_reloc (so, nv40mt->buffer, txf, tex_flags | NOUVEAU_BO_OR,
- NV40TCL_TEX_FORMAT_DMA0, NV40TCL_TEX_FORMAT_DMA1);
+ so_reloc (so, bo, 0, tex_flags | NOUVEAU_BO_LOW, 0, 0);
+ so_reloc (so, bo, txf, tex_flags | NOUVEAU_BO_OR,
+ NV40TCL_TEX_FORMAT_DMA0, NV40TCL_TEX_FORMAT_DMA1);
so_data (so, ps->wrap);
so_data (so, NV40TCL_TEX_ENABLE_ENABLE | ps->en);
so_data (so, txs);
diff --git a/src/gallium/drivers/nv40/nv40_query.c b/src/gallium/drivers/nv40/nv40_query.c
index 9b9a43f49d..7874aedd42 100644
--- a/src/gallium/drivers/nv40/nv40_query.c
+++ b/src/gallium/drivers/nv40/nv40_query.c
@@ -29,11 +29,10 @@ nv40_query_create(struct pipe_context *pipe, unsigned query_type)
static void
nv40_query_destroy(struct pipe_context *pipe, struct pipe_query *pq)
{
- struct nv40_context *nv40 = nv40_context(pipe);
struct nv40_query *q = nv40_query(pq);
if (q->object)
- nv40->nvws->res_free(&q->object);
+ nouveau_resource_free(&q->object);
FREE(q);
}
@@ -54,9 +53,9 @@ nv40_query_begin(struct pipe_context *pipe, struct pipe_query *pq)
pipe->get_query_result(pipe, pq, 1, &tmp);
}
- if (nv40->nvws->res_alloc(nv40->screen->query_heap, 1, NULL, &q->object))
+ if (nouveau_resource_alloc(nv40->screen->query_heap, 1, NULL, &q->object))
assert(0);
- nv40->nvws->notifier_reset(nv40->screen->query, q->object->start);
+ nouveau_notifier_reset(nv40->screen->query, q->object->start);
BEGIN_RING(curie, NV40TCL_QUERY_RESET, 1);
OUT_RING (1);
@@ -84,27 +83,27 @@ nv40_query_result(struct pipe_context *pipe, struct pipe_query *pq,
{
struct nv40_context *nv40 = nv40_context(pipe);
struct nv40_query *q = nv40_query(pq);
- struct nouveau_winsys *nvws = nv40->nvws;
assert(q->object && q->type == PIPE_QUERY_OCCLUSION_COUNTER);
if (!q->ready) {
unsigned status;
- status = nvws->notifier_status(nv40->screen->query,
- q->object->start);
+ status = nouveau_notifier_status(nv40->screen->query,
+ q->object->start);
if (status != NV_NOTIFY_STATE_STATUS_COMPLETED) {
if (wait == FALSE)
return FALSE;
- nvws->notifier_wait(nv40->screen->query, q->object->start,
- NV_NOTIFY_STATE_STATUS_COMPLETED,
- 0);
+ nouveau_notifier_wait_status(nv40->screen->query,
+ q->object->start,
+ NV_NOTIFY_STATE_STATUS_COMPLETED,
+ 0);
}
- q->result = nvws->notifier_retval(nv40->screen->query,
- q->object->start);
+ q->result = nouveau_notifier_return_val(nv40->screen->query,
+ q->object->start);
q->ready = TRUE;
- nvws->res_free(&q->object);
+ nouveau_resource_free(&q->object);
}
*result = q->result;
diff --git a/src/gallium/drivers/nv40/nv40_screen.c b/src/gallium/drivers/nv40/nv40_screen.c
index 0d4baefaea..5d2a4216c5 100644
--- a/src/gallium/drivers/nv40/nv40_screen.c
+++ b/src/gallium/drivers/nv40/nv40_screen.c
@@ -1,5 +1,4 @@
#include "pipe/p_screen.h"
-#include "util/u_simple_screen.h"
#include "nv40_context.h"
#include "nv40_screen.h"
@@ -8,23 +7,6 @@
#define NV4X_GRCLASS4497_CHIPSETS 0x00005450
#define NV6X_GRCLASS4497_CHIPSETS 0x00000088
-static const char *
-nv40_screen_get_name(struct pipe_screen *pscreen)
-{
- struct nv40_screen *screen = nv40_screen(pscreen);
- struct nouveau_device *dev = screen->nvws->channel->device;
- static char buffer[128];
-
- snprintf(buffer, sizeof(buffer), "NV%02X", dev->chipset);
- return buffer;
-}
-
-static const char *
-nv40_screen_get_vendor(struct pipe_screen *pscreen)
-{
- return "nouveau";
-}
-
static int
nv40_screen_get_param(struct pipe_screen *pscreen, int param)
{
@@ -62,6 +44,10 @@ nv40_screen_get_param(struct pipe_screen *pscreen, int param)
return 1;
case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
return 0; /* We have 4 - but unsupported currently */
+ case PIPE_CAP_TGSI_CONT_SUPPORTED:
+ return 0;
+ case PIPE_CAP_BLEND_EQUATION_SEPARATE:
+ return 1;
case NOUVEAU_CAP_HW_VTXBUF:
return 1;
case NOUVEAU_CAP_HW_IDXBUF:
@@ -104,7 +90,15 @@ nv40_screen_surface_format_supported(struct pipe_screen *pscreen,
switch (format) {
case PIPE_FORMAT_A8R8G8B8_UNORM:
case PIPE_FORMAT_R5G6B5_UNORM:
+ return TRUE;
+ default:
+ break;
+ }
+ } else
+ if (tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) {
+ switch (format) {
case PIPE_FORMAT_Z24S8_UNORM:
+ case PIPE_FORMAT_Z24X8_UNORM:
case PIPE_FORMAT_Z16_UNORM:
return TRUE;
default:
@@ -148,88 +142,107 @@ static void
nv40_screen_destroy(struct pipe_screen *pscreen)
{
struct nv40_screen *screen = nv40_screen(pscreen);
- struct nouveau_winsys *nvws = screen->nvws;
- nvws->res_free(&screen->vp_exec_heap);
- nvws->res_free(&screen->vp_data_heap);
- nvws->res_free(&screen->query_heap);
- nvws->notifier_free(&screen->query);
- nvws->notifier_free(&screen->sync);
- nvws->grobj_free(&screen->curie);
+ nouveau_resource_free(&screen->vp_exec_heap);
+ nouveau_resource_free(&screen->vp_data_heap);
+ nouveau_resource_free(&screen->query_heap);
+ nouveau_notifier_free(&screen->query);
+ nouveau_notifier_free(&screen->sync);
+ nouveau_grobj_free(&screen->curie);
+
+ nouveau_screen_fini(&screen->base);
FREE(pscreen);
}
struct pipe_screen *
-nv40_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws)
+nv40_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
{
struct nv40_screen *screen = CALLOC_STRUCT(nv40_screen);
+ struct nouveau_channel *chan;
+ struct pipe_screen *pscreen;
struct nouveau_stateobj *so;
unsigned curie_class = 0;
- unsigned chipset = nvws->channel->device->chipset;
int ret;
if (!screen)
return NULL;
- screen->nvws = nvws;
+ pscreen = &screen->base.base;
- /* 2D engine setup */
- screen->eng2d = nv04_surface_2d_init(nvws);
- screen->eng2d->buf = nv40_surface_buffer;
+ ret = nouveau_screen_init(&screen->base, dev);
+ if (ret) {
+ nv40_screen_destroy(pscreen);
+ return NULL;
+ }
+ chan = screen->base.channel;
+
+ pscreen->winsys = ws;
+ pscreen->destroy = nv40_screen_destroy;
+ pscreen->get_param = nv40_screen_get_param;
+ pscreen->get_paramf = nv40_screen_get_paramf;
+ pscreen->is_format_supported = nv40_screen_surface_format_supported;
+
+ nv40_screen_init_miptree_functions(pscreen);
+ nv40_screen_init_transfer_functions(pscreen);
/* 3D object */
- switch (chipset & 0xf0) {
+ switch (dev->chipset & 0xf0) {
case 0x40:
- if (NV4X_GRCLASS4097_CHIPSETS & (1 << (chipset & 0x0f)))
+ if (NV4X_GRCLASS4097_CHIPSETS & (1 << (dev->chipset & 0x0f)))
curie_class = NV40TCL;
else
- if (NV4X_GRCLASS4497_CHIPSETS & (1 << (chipset & 0x0f)))
+ if (NV4X_GRCLASS4497_CHIPSETS & (1 << (dev->chipset & 0x0f)))
curie_class = NV44TCL;
break;
case 0x60:
- if (NV6X_GRCLASS4497_CHIPSETS & (1 << (chipset & 0x0f)))
+ if (NV6X_GRCLASS4497_CHIPSETS & (1 << (dev->chipset & 0x0f)))
curie_class = NV44TCL;
break;
}
if (!curie_class) {
- NOUVEAU_ERR("Unknown nv4x chipset: nv%02x\n", chipset);
+ NOUVEAU_ERR("Unknown nv4x chipset: nv%02x\n", dev->chipset);
return NULL;
}
- ret = nvws->grobj_alloc(nvws, curie_class, &screen->curie);
+ ret = nouveau_grobj_alloc(chan, 0xbeef3097, curie_class, &screen->curie);
if (ret) {
NOUVEAU_ERR("Error creating 3D object: %d\n", ret);
return FALSE;
}
+ BIND_RING(chan, screen->curie, 7);
+
+ /* 2D engine setup */
+ screen->eng2d = nv04_surface_2d_init(&screen->base);
+ screen->eng2d->buf = nv40_surface_buffer;
/* Notifier for sync purposes */
- ret = nvws->notifier_alloc(nvws, 1, &screen->sync);
+ ret = nouveau_notifier_alloc(chan, 0xbeef0301, 1, &screen->sync);
if (ret) {
NOUVEAU_ERR("Error creating notifier object: %d\n", ret);
- nv40_screen_destroy(&screen->pipe);
+ nv40_screen_destroy(pscreen);
return NULL;
}
/* Query objects */
- ret = nvws->notifier_alloc(nvws, 32, &screen->query);
+ ret = nouveau_notifier_alloc(chan, 0xbeef0302, 32, &screen->query);
if (ret) {
NOUVEAU_ERR("Error initialising query objects: %d\n", ret);
- nv40_screen_destroy(&screen->pipe);
+ nv40_screen_destroy(pscreen);
return NULL;
}
- ret = nvws->res_init(&screen->query_heap, 0, 32);
+ nouveau_resource_init(&screen->query_heap, 0, 32);
if (ret) {
NOUVEAU_ERR("Error initialising query object heap: %d\n", ret);
- nv40_screen_destroy(&screen->pipe);
+ nv40_screen_destroy(pscreen);
return NULL;
}
/* Vtxprog resources */
- if (nvws->res_init(&screen->vp_exec_heap, 0, 512) ||
- nvws->res_init(&screen->vp_data_heap, 0, 256)) {
- nv40_screen_destroy(&screen->pipe);
+ if (nouveau_resource_init(&screen->vp_exec_heap, 0, 512) ||
+ nouveau_resource_init(&screen->vp_data_heap, 0, 256)) {
+ nv40_screen_destroy(pscreen);
return NULL;
}
@@ -238,25 +251,25 @@ nv40_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws)
so_method(so, screen->curie, NV40TCL_DMA_NOTIFY, 1);
so_data (so, screen->sync->handle);
so_method(so, screen->curie, NV40TCL_DMA_TEXTURE0, 2);
- so_data (so, nvws->channel->vram->handle);
- so_data (so, nvws->channel->gart->handle);
+ so_data (so, chan->vram->handle);
+ so_data (so, chan->gart->handle);
so_method(so, screen->curie, NV40TCL_DMA_COLOR1, 1);
- so_data (so, nvws->channel->vram->handle);
+ so_data (so, chan->vram->handle);
so_method(so, screen->curie, NV40TCL_DMA_COLOR0, 2);
- so_data (so, nvws->channel->vram->handle);
- so_data (so, nvws->channel->vram->handle);
+ so_data (so, chan->vram->handle);
+ so_data (so, chan->vram->handle);
so_method(so, screen->curie, NV40TCL_DMA_VTXBUF0, 2);
- so_data (so, nvws->channel->vram->handle);
- so_data (so, nvws->channel->gart->handle);
+ so_data (so, chan->vram->handle);
+ so_data (so, chan->gart->handle);
so_method(so, screen->curie, NV40TCL_DMA_FENCE, 2);
so_data (so, 0);
so_data (so, screen->query->handle);
so_method(so, screen->curie, NV40TCL_DMA_UNK01AC, 2);
- so_data (so, nvws->channel->vram->handle);
- so_data (so, nvws->channel->vram->handle);
+ so_data (so, chan->vram->handle);
+ so_data (so, chan->vram->handle);
so_method(so, screen->curie, NV40TCL_DMA_COLOR2, 2);
- so_data (so, nvws->channel->vram->handle);
- so_data (so, nvws->channel->vram->handle);
+ so_data (so, chan->vram->handle);
+ so_data (so, chan->vram->handle);
so_method(so, screen->curie, 0x1ea4, 3);
so_data (so, 0x00000010);
@@ -281,24 +294,10 @@ nv40_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws)
so_method(so, screen->curie, 0x1e94, 1);
so_data (so, 0x00000001);
- so_emit(nvws, so);
+ so_emit(chan, so);
so_ref(NULL, &so);
- nvws->push_flush(nvws, 0, NULL);
-
- screen->pipe.winsys = ws;
- screen->pipe.destroy = nv40_screen_destroy;
-
- screen->pipe.get_name = nv40_screen_get_name;
- screen->pipe.get_vendor = nv40_screen_get_vendor;
- screen->pipe.get_param = nv40_screen_get_param;
- screen->pipe.get_paramf = nv40_screen_get_paramf;
-
- screen->pipe.is_format_supported = nv40_screen_surface_format_supported;
-
- nv40_screen_init_miptree_functions(&screen->pipe);
- nv40_screen_init_transfer_functions(&screen->pipe);
- u_simple_screen_init(&screen->pipe);
+ nouveau_pushbuf_flush(chan, 0);
- return &screen->pipe;
+ return pscreen;
}
diff --git a/src/gallium/drivers/nv40/nv40_screen.h b/src/gallium/drivers/nv40/nv40_screen.h
index 7b503bd207..57b4c8fc46 100644
--- a/src/gallium/drivers/nv40/nv40_screen.h
+++ b/src/gallium/drivers/nv40/nv40_screen.h
@@ -1,11 +1,11 @@
#ifndef __NV40_SCREEN_H__
#define __NV40_SCREEN_H__
-#include "pipe/p_screen.h"
+#include "nouveau/nouveau_screen.h"
#include "nv04/nv04_surface_2d.h"
struct nv40_screen {
- struct pipe_screen pipe;
+ struct nouveau_screen base;
struct nouveau_winsys *nvws;
diff --git a/src/gallium/drivers/nv40/nv40_state_emit.c b/src/gallium/drivers/nv40/nv40_state_emit.c
index 10aae29832..198692965d 100644
--- a/src/gallium/drivers/nv40/nv40_state_emit.c
+++ b/src/gallium/drivers/nv40/nv40_state_emit.c
@@ -54,6 +54,7 @@ nv40_state_do_validate(struct nv40_context *nv40,
void
nv40_state_emit(struct nv40_context *nv40)
{
+ struct nouveau_channel *chan = nv40->screen->base.channel;
struct nv40_state *state = &nv40->state;
struct nv40_screen *screen = nv40->screen;
unsigned i, samplers;
@@ -73,7 +74,7 @@ nv40_state_emit(struct nv40_context *nv40)
continue;
so_ref (state->hw[i], &nv40->screen->state[i]);
if (state->hw[i])
- so_emit(nv40->nvws, nv40->screen->state[i]);
+ so_emit(chan, nv40->screen->state[i]);
states &= ~(1ULL << i);
}
@@ -87,17 +88,17 @@ nv40_state_emit(struct nv40_context *nv40)
state->dirty = 0;
- so_emit_reloc_markers(nv40->nvws, state->hw[NV40_STATE_FB]);
+ so_emit_reloc_markers(chan, state->hw[NV40_STATE_FB]);
for (i = 0, samplers = state->fp_samplers; i < 16 && samplers; i++) {
if (!(samplers & (1 << i)))
continue;
- so_emit_reloc_markers(nv40->nvws,
+ so_emit_reloc_markers(chan,
state->hw[NV40_STATE_FRAGTEX0+i]);
samplers &= ~(1ULL << i);
}
- so_emit_reloc_markers(nv40->nvws, state->hw[NV40_STATE_FRAGPROG]);
+ so_emit_reloc_markers(chan, state->hw[NV40_STATE_FRAGPROG]);
if (state->hw[NV40_STATE_VTXBUF] && nv40->render_mode == HW)
- so_emit_reloc_markers(nv40->nvws, state->hw[NV40_STATE_VTXBUF]);
+ so_emit_reloc_markers(chan, state->hw[NV40_STATE_VTXBUF]);
}
boolean
diff --git a/src/gallium/drivers/nv40/nv40_state_fb.c b/src/gallium/drivers/nv40/nv40_state_fb.c
index be618a306b..c2f739157a 100644
--- a/src/gallium/drivers/nv40/nv40_state_fb.c
+++ b/src/gallium/drivers/nv40/nv40_state_fb.c
@@ -2,15 +2,19 @@
#include "nouveau/nouveau_util.h"
static struct pipe_buffer *
-nv40_surface_buffer(struct pipe_surface *surface)
+nv40_do_surface_buffer(struct pipe_surface *surface)
{
struct nv40_miptree *mt = (struct nv40_miptree *)surface->texture;
return mt->buffer;
}
+#define nv40_surface_buffer(ps) nouveau_bo(nv40_do_surface_buffer(ps))
+
static boolean
nv40_state_framebuffer_validate(struct nv40_context *nv40)
{
+ struct nouveau_channel *chan = nv40->screen->base.channel;
+ struct nouveau_grobj *curie = nv40->screen->curie;
struct pipe_framebuffer_state *fb = &nv40->framebuffer;
struct nv04_surface *rt[4], *zeta;
uint32_t rt_enable, rt_format;
@@ -69,6 +73,7 @@ nv40_state_framebuffer_validate(struct nv40_context *nv40)
rt_format |= NV40TCL_RT_FORMAT_ZETA_Z16;
break;
case PIPE_FORMAT_Z24S8_UNORM:
+ case PIPE_FORMAT_Z24X8_UNORM:
case 0:
rt_format |= NV40TCL_RT_FORMAT_ZETA_Z24S8;
break;
@@ -77,76 +82,80 @@ nv40_state_framebuffer_validate(struct nv40_context *nv40)
}
if (rt_enable & NV40TCL_RT_ENABLE_COLOR0) {
- so_method(so, nv40->screen->curie, NV40TCL_DMA_COLOR0, 1);
- so_reloc (so, nv40_surface_buffer(&rt[0]->base), 0, rt_flags | NOUVEAU_BO_OR,
- nv40->nvws->channel->vram->handle,
- nv40->nvws->channel->gart->handle);
- so_method(so, nv40->screen->curie, NV40TCL_COLOR0_PITCH, 2);
+ so_method(so, curie, NV40TCL_DMA_COLOR0, 1);
+ so_reloc (so, nv40_surface_buffer(&rt[0]->base), 0,
+ rt_flags | NOUVEAU_BO_OR,
+ chan->vram->handle, chan->gart->handle);
+ so_method(so, curie, NV40TCL_COLOR0_PITCH, 2);
so_data (so, rt[0]->pitch);
- so_reloc (so, nv40_surface_buffer(&rt[0]->base), rt[0]->base.offset, rt_flags |
- NOUVEAU_BO_LOW, 0, 0);
+ so_reloc (so, nv40_surface_buffer(&rt[0]->base),
+ rt[0]->base.offset, rt_flags | NOUVEAU_BO_LOW,
+ 0, 0);
}
if (rt_enable & NV40TCL_RT_ENABLE_COLOR1) {
- so_method(so, nv40->screen->curie, NV40TCL_DMA_COLOR1, 1);
- so_reloc (so, nv40_surface_buffer(&rt[1]->base), 0, rt_flags | NOUVEAU_BO_OR,
- nv40->nvws->channel->vram->handle,
- nv40->nvws->channel->gart->handle);
- so_method(so, nv40->screen->curie, NV40TCL_COLOR1_OFFSET, 2);
- so_reloc (so, nv40_surface_buffer(&rt[1]->base), rt[1]->base.offset, rt_flags |
- NOUVEAU_BO_LOW, 0, 0);
+ so_method(so, curie, NV40TCL_DMA_COLOR1, 1);
+ so_reloc (so, nv40_surface_buffer(&rt[1]->base), 0,
+ rt_flags | NOUVEAU_BO_OR,
+ chan->vram->handle, chan->gart->handle);
+ so_method(so, curie, NV40TCL_COLOR1_OFFSET, 2);
+ so_reloc (so, nv40_surface_buffer(&rt[1]->base),
+ rt[1]->base.offset, rt_flags | NOUVEAU_BO_LOW,
+ 0, 0);
so_data (so, rt[1]->pitch);
}
if (rt_enable & NV40TCL_RT_ENABLE_COLOR2) {
- so_method(so, nv40->screen->curie, NV40TCL_DMA_COLOR2, 1);
- so_reloc (so, nv40_surface_buffer(&rt[2]->base), 0, rt_flags | NOUVEAU_BO_OR,
- nv40->nvws->channel->vram->handle,
- nv40->nvws->channel->gart->handle);
- so_method(so, nv40->screen->curie, NV40TCL_COLOR2_OFFSET, 1);
- so_reloc (so, nv40_surface_buffer(&rt[2]->base), rt[2]->base.offset, rt_flags |
- NOUVEAU_BO_LOW, 0, 0);
- so_method(so, nv40->screen->curie, NV40TCL_COLOR2_PITCH, 1);
+ so_method(so, curie, NV40TCL_DMA_COLOR2, 1);
+ so_reloc (so, nv40_surface_buffer(&rt[2]->base), 0,
+ rt_flags | NOUVEAU_BO_OR,
+ chan->vram->handle, chan->gart->handle);
+ so_method(so, curie, NV40TCL_COLOR2_OFFSET, 1);
+ so_reloc (so, nv40_surface_buffer(&rt[2]->base),
+ rt[2]->base.offset, rt_flags | NOUVEAU_BO_LOW,
+ 0, 0);
+ so_method(so, curie, NV40TCL_COLOR2_PITCH, 1);
so_data (so, rt[2]->pitch);
}
if (rt_enable & NV40TCL_RT_ENABLE_COLOR3) {
- so_method(so, nv40->screen->curie, NV40TCL_DMA_COLOR3, 1);
- so_reloc (so, nv40_surface_buffer(&rt[3]->base), 0, rt_flags | NOUVEAU_BO_OR,
- nv40->nvws->channel->vram->handle,
- nv40->nvws->channel->gart->handle);
- so_method(so, nv40->screen->curie, NV40TCL_COLOR3_OFFSET, 1);
- so_reloc (so, nv40_surface_buffer(&rt[3]->base), rt[3]->base.offset, rt_flags |
- NOUVEAU_BO_LOW, 0, 0);
- so_method(so, nv40->screen->curie, NV40TCL_COLOR3_PITCH, 1);
+ so_method(so, curie, NV40TCL_DMA_COLOR3, 1);
+ so_reloc (so, nv40_surface_buffer(&rt[3]->base), 0,
+ rt_flags | NOUVEAU_BO_OR,
+ chan->vram->handle, chan->gart->handle);
+ so_method(so, curie, NV40TCL_COLOR3_OFFSET, 1);
+ so_reloc (so, nv40_surface_buffer(&rt[3]->base),
+ rt[3]->base.offset, rt_flags | NOUVEAU_BO_LOW,
+ 0, 0);
+ so_method(so, curie, NV40TCL_COLOR3_PITCH, 1);
so_data (so, rt[3]->pitch);
}
if (zeta_format) {
- so_method(so, nv40->screen->curie, NV40TCL_DMA_ZETA, 1);
- so_reloc (so, nv40_surface_buffer(&zeta->base), 0, rt_flags | NOUVEAU_BO_OR,
- nv40->nvws->channel->vram->handle,
- nv40->nvws->channel->gart->handle);
- so_method(so, nv40->screen->curie, NV40TCL_ZETA_OFFSET, 1);
- so_reloc (so, nv40_surface_buffer(&zeta->base), zeta->base.offset, rt_flags |
- NOUVEAU_BO_LOW, 0, 0);
- so_method(so, nv40->screen->curie, NV40TCL_ZETA_PITCH, 1);
+ so_method(so, curie, NV40TCL_DMA_ZETA, 1);
+ so_reloc (so, nv40_surface_buffer(&zeta->base), 0,
+ rt_flags | NOUVEAU_BO_OR,
+ chan->vram->handle, chan->gart->handle);
+ so_method(so, curie, NV40TCL_ZETA_OFFSET, 1);
+ so_reloc (so, nv40_surface_buffer(&zeta->base),
+ zeta->base.offset, rt_flags | NOUVEAU_BO_LOW, 0, 0);
+ so_method(so, curie, NV40TCL_ZETA_PITCH, 1);
so_data (so, zeta->pitch);
}
- so_method(so, nv40->screen->curie, NV40TCL_RT_ENABLE, 1);
+ so_method(so, curie, NV40TCL_RT_ENABLE, 1);
so_data (so, rt_enable);
- so_method(so, nv40->screen->curie, NV40TCL_RT_HORIZ, 3);
+ so_method(so, curie, NV40TCL_RT_HORIZ, 3);
so_data (so, (w << 16) | 0);
so_data (so, (h << 16) | 0);
so_data (so, rt_format);
- so_method(so, nv40->screen->curie, NV40TCL_VIEWPORT_HORIZ, 2);
+ so_method(so, curie, NV40TCL_VIEWPORT_HORIZ, 2);
so_data (so, (w << 16) | 0);
so_data (so, (h << 16) | 0);
- so_method(so, nv40->screen->curie, NV40TCL_VIEWPORT_CLIP_HORIZ(0), 2);
+ so_method(so, curie, NV40TCL_VIEWPORT_CLIP_HORIZ(0), 2);
so_data (so, ((w - 1) << 16) | 0);
so_data (so, ((h - 1) << 16) | 0);
- so_method(so, nv40->screen->curie, 0x1d88, 1);
+ so_method(so, curie, 0x1d88, 1);
so_data (so, (1 << 12) | h);
so_ref(so, &nv40->state.hw[NV40_STATE_FB]);
diff --git a/src/gallium/drivers/nv40/nv40_surface.c b/src/gallium/drivers/nv40/nv40_surface.c
index 1a849da32d..a596547974 100644
--- a/src/gallium/drivers/nv40/nv40_surface.c
+++ b/src/gallium/drivers/nv40/nv40_surface.c
@@ -26,12 +26,13 @@
*
**************************************************************************/
-#include "nv40_context.h"
#include "pipe/p_defines.h"
-#include "pipe/internal/p_winsys_screen.h"
#include "pipe/p_inlines.h"
+
#include "util/u_tile.h"
+#include "nv40_context.h"
+
static void
nv40_surface_copy(struct pipe_context *pipe,
struct pipe_surface *dest, unsigned destx, unsigned desty,
diff --git a/src/gallium/drivers/nv40/nv40_transfer.c b/src/gallium/drivers/nv40/nv40_transfer.c
index ce45055fe8..6d92ac3db9 100644
--- a/src/gallium/drivers/nv40/nv40_transfer.c
+++ b/src/gallium/drivers/nv40/nv40_transfer.c
@@ -136,7 +136,7 @@ nv40_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt,
}
static void
-nv40_transfer_del(struct pipe_screen *pscreen, struct pipe_transfer *ptx)
+nv40_transfer_del(struct pipe_transfer *ptx)
{
struct nv40_transfer *tx = (struct nv40_transfer *)ptx;
diff --git a/src/gallium/drivers/nv40/nv40_vbo.c b/src/gallium/drivers/nv40/nv40_vbo.c
index f3518b2e4f..b2753b8e2e 100644
--- a/src/gallium/drivers/nv40/nv40_vbo.c
+++ b/src/gallium/drivers/nv40/nv40_vbo.c
@@ -1,5 +1,6 @@
#include "pipe/p_context.h"
#include "pipe/p_state.h"
+#include "pipe/p_inlines.h"
#include "nv40_context.h"
#include "nv40_state.h"
@@ -70,7 +71,7 @@ static boolean
nv40_vbo_set_idxbuf(struct nv40_context *nv40, struct pipe_buffer *ib,
unsigned ib_size)
{
- struct pipe_screen *pscreen = &nv40->screen->pipe;
+ struct pipe_screen *pscreen = &nv40->screen->base.base;
unsigned type;
if (!ib) {
@@ -108,7 +109,7 @@ nv40_vbo_static_attrib(struct nv40_context *nv40, struct nouveau_stateobj *so,
int attrib, struct pipe_vertex_element *ve,
struct pipe_vertex_buffer *vb)
{
- struct pipe_winsys *ws = nv40->pipe.winsys;
+ struct pipe_screen *pscreen = nv40->pipe.screen;
struct nouveau_grobj *curie = nv40->screen->curie;
unsigned type, ncomp;
void *map;
@@ -116,7 +117,7 @@ nv40_vbo_static_attrib(struct nv40_context *nv40, struct nouveau_stateobj *so,
if (nv40_vbo_format_to_hw(ve->src_format, &type, &ncomp))
return FALSE;
- map = ws->buffer_map(ws, vb->buffer, PIPE_BUFFER_USAGE_CPU_READ);
+ map = pipe_buffer_map(pscreen, vb->buffer, PIPE_BUFFER_USAGE_CPU_READ);
map += vb->buffer_offset + ve->src_offset;
switch (type) {
@@ -148,17 +149,17 @@ nv40_vbo_static_attrib(struct nv40_context *nv40, struct nouveau_stateobj *so,
so_data (so, fui(v[0]));
break;
default:
- ws->buffer_unmap(ws, vb->buffer);
+ pipe_buffer_unmap(pscreen, vb->buffer);
return FALSE;
}
}
break;
default:
- ws->buffer_unmap(ws, vb->buffer);
+ pipe_buffer_unmap(pscreen, vb->buffer);
return FALSE;
}
- ws->buffer_unmap(ws, vb->buffer);
+ pipe_buffer_unmap(pscreen, vb->buffer);
return TRUE;
}
@@ -168,7 +169,7 @@ nv40_draw_arrays(struct pipe_context *pipe,
unsigned mode, unsigned start, unsigned count)
{
struct nv40_context *nv40 = nv40_context(pipe);
- struct nouveau_channel *chan = nv40->nvws->channel;
+ struct nouveau_channel *chan = nv40->screen->base.channel;
unsigned restart;
nv40_vbo_set_idxbuf(nv40, NULL, 0);
@@ -227,7 +228,7 @@ static INLINE void
nv40_draw_elements_u08(struct nv40_context *nv40, void *ib,
unsigned mode, unsigned start, unsigned count)
{
- struct nouveau_channel *chan = nv40->nvws->channel;
+ struct nouveau_channel *chan = nv40->screen->base.channel;
while (count) {
uint8_t *elts = (uint8_t *)ib + start;
@@ -276,7 +277,7 @@ static INLINE void
nv40_draw_elements_u16(struct nv40_context *nv40, void *ib,
unsigned mode, unsigned start, unsigned count)
{
- struct nouveau_channel *chan = nv40->nvws->channel;
+ struct nouveau_channel *chan = nv40->screen->base.channel;
while (count) {
uint16_t *elts = (uint16_t *)ib + start;
@@ -325,7 +326,7 @@ static INLINE void
nv40_draw_elements_u32(struct nv40_context *nv40, void *ib,
unsigned mode, unsigned start, unsigned count)
{
- struct nouveau_channel *chan = nv40->nvws->channel;
+ struct nouveau_channel *chan = nv40->screen->base.channel;
while (count) {
uint32_t *elts = (uint32_t *)ib + start;
@@ -367,10 +368,10 @@ nv40_draw_elements_inline(struct pipe_context *pipe,
unsigned mode, unsigned start, unsigned count)
{
struct nv40_context *nv40 = nv40_context(pipe);
- struct pipe_winsys *ws = pipe->winsys;
+ struct pipe_screen *pscreen = pipe->screen;
void *map;
- map = ws->buffer_map(ws, ib, PIPE_BUFFER_USAGE_CPU_READ);
+ map = pipe_buffer_map(pscreen, ib, PIPE_BUFFER_USAGE_CPU_READ);
if (!ib) {
NOUVEAU_ERR("failed mapping ib\n");
return FALSE;
@@ -391,7 +392,7 @@ nv40_draw_elements_inline(struct pipe_context *pipe,
break;
}
- ws->buffer_unmap(ws, ib);
+ pipe_buffer_unmap(pscreen, ib);
return TRUE;
}
@@ -400,7 +401,7 @@ nv40_draw_elements_vbo(struct pipe_context *pipe,
unsigned mode, unsigned start, unsigned count)
{
struct nv40_context *nv40 = nv40_context(pipe);
- struct nouveau_channel *chan = nv40->nvws->channel;
+ struct nouveau_channel *chan = nv40->screen->base.channel;
unsigned restart;
while (count) {
@@ -519,17 +520,20 @@ nv40_vbo_validate(struct nv40_context *nv40)
return FALSE;
}
- so_reloc(vtxbuf, vb->buffer, vb->buffer_offset + ve->src_offset,
- vb_flags | NOUVEAU_BO_LOW | NOUVEAU_BO_OR,
- 0, NV40TCL_VTXBUF_ADDRESS_DMA1);
+ so_reloc(vtxbuf, nouveau_bo(vb->buffer),
+ vb->buffer_offset + ve->src_offset,
+ vb_flags | NOUVEAU_BO_LOW | NOUVEAU_BO_OR,
+ 0, NV40TCL_VTXBUF_ADDRESS_DMA1);
so_data (vtxfmt, ((vb->stride << NV40TCL_VTXFMT_STRIDE_SHIFT) |
(ncomp << NV40TCL_VTXFMT_SIZE_SHIFT) | type));
}
if (ib) {
+ struct nouveau_bo *bo = nouveau_bo(ib);
+
so_method(vtxbuf, curie, NV40TCL_IDXBUF_ADDRESS, 2);
- so_reloc (vtxbuf, ib, 0, vb_flags | NOUVEAU_BO_LOW, 0, 0);
- so_reloc (vtxbuf, ib, ib_format, vb_flags | NOUVEAU_BO_OR,
+ so_reloc (vtxbuf, bo, 0, vb_flags | NOUVEAU_BO_LOW, 0, 0);
+ so_reloc (vtxbuf, bo, ib_format, vb_flags | NOUVEAU_BO_OR,
0, NV40TCL_IDXBUF_FORMAT_DMA1);
}
diff --git a/src/gallium/drivers/nv40/nv40_vertprog.c b/src/gallium/drivers/nv40/nv40_vertprog.c
index 7df9a4d326..0382dbba8f 100644
--- a/src/gallium/drivers/nv40/nv40_vertprog.c
+++ b/src/gallium/drivers/nv40/nv40_vertprog.c
@@ -1,6 +1,7 @@
#include "pipe/p_context.h"
#include "pipe/p_defines.h"
#include "pipe/p_state.h"
+#include "pipe/p_inlines.h"
#include "pipe/p_shader_tokens.h"
#include "tgsi/tgsi_parse.h"
@@ -787,10 +788,10 @@ nv40_vertprog_translate(struct nv40_context *nv40,
assert(imm->Immediate.NrTokens == 4 + 1);
vpc->imm[vpc->nr_imm++] =
constant(vpc, -1,
- imm->u.ImmediateFloat32[0].Float,
- imm->u.ImmediateFloat32[1].Float,
- imm->u.ImmediateFloat32[2].Float,
- imm->u.ImmediateFloat32[3].Float);
+ imm->u[0].Float,
+ imm->u[1].Float,
+ imm->u[2].Float,
+ imm->u[3].Float);
}
break;
case TGSI_TOKEN_TYPE_INSTRUCTION:
@@ -855,8 +856,7 @@ out_err:
static boolean
nv40_vertprog_validate(struct nv40_context *nv40)
{
- struct nouveau_winsys *nvws = nv40->nvws;
- struct pipe_winsys *ws = nv40->pipe.winsys;
+ struct pipe_screen *pscreen = nv40->pipe.screen;
struct nouveau_grobj *curie = nv40->screen->curie;
struct nv40_vertex_program *vp;
struct pipe_buffer *constbuf;
@@ -895,15 +895,15 @@ check_gpu_resources:
struct nouveau_stateobj *so;
uint vplen = vp->nr_insns;
- if (nvws->res_alloc(heap, vplen, vp, &vp->exec)) {
+ if (nouveau_resource_alloc(heap, vplen, vp, &vp->exec)) {
while (heap->next && heap->size < vplen) {
struct nv40_vertex_program *evict;
evict = heap->next->priv;
- nvws->res_free(&evict->exec);
+ nouveau_resource_free(&evict->exec);
}
- if (nvws->res_alloc(heap, vplen, vp, &vp->exec))
+ if (nouveau_resource_alloc(heap, vplen, vp, &vp->exec))
assert(0);
}
@@ -925,15 +925,15 @@ check_gpu_resources:
if (vp->nr_consts && !vp->data) {
struct nouveau_resource *heap = nv40->screen->vp_data_heap;
- if (nvws->res_alloc(heap, vp->nr_consts, vp, &vp->data)) {
+ if (nouveau_resource_alloc(heap, vp->nr_consts, vp, &vp->data)) {
while (heap->next && heap->size < vp->nr_consts) {
struct nv40_vertex_program *evict;
evict = heap->next->priv;
- nvws->res_free(&evict->data);
+ nouveau_resource_free(&evict->data);
}
- if (nvws->res_alloc(heap, vp->nr_consts, vp, &vp->data))
+ if (nouveau_resource_alloc(heap, vp->nr_consts, vp, &vp->data))
assert(0);
}
@@ -981,8 +981,8 @@ check_gpu_resources:
float *map = NULL;
if (constbuf) {
- map = ws->buffer_map(ws, constbuf,
- PIPE_BUFFER_USAGE_CPU_READ);
+ map = pipe_buffer_map(pscreen, constbuf,
+ PIPE_BUFFER_USAGE_CPU_READ);
}
for (i = 0; i < vp->nr_consts; i++) {
@@ -1003,7 +1003,7 @@ check_gpu_resources:
}
if (constbuf)
- ws->buffer_unmap(ws, constbuf);
+ pscreen->buffer_unmap(pscreen, constbuf);
}
/* Upload vtxprog */
@@ -1035,8 +1035,6 @@ check_gpu_resources:
void
nv40_vertprog_destroy(struct nv40_context *nv40, struct nv40_vertex_program *vp)
{
- struct nouveau_winsys *nvws = nv40->screen->nvws;
-
vp->translated = FALSE;
if (vp->nr_insns) {
@@ -1051,9 +1049,9 @@ nv40_vertprog_destroy(struct nv40_context *nv40, struct nv40_vertex_program *vp)
vp->nr_consts = 0;
}
- nvws->res_free(&vp->exec);
+ nouveau_resource_free(&vp->exec);
vp->exec_start = 0;
- nvws->res_free(&vp->data);
+ nouveau_resource_free(&vp->data);
vp->data_start = 0;
vp->data_start_min = 0;