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path: root/src/gallium/drivers/r300/r300_state_invariant.c
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Diffstat (limited to 'src/gallium/drivers/r300/r300_state_invariant.c')
-rw-r--r--src/gallium/drivers/r300/r300_state_invariant.c63
1 files changed, 21 insertions, 42 deletions
diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c
index 8bd9b41bd7..7d822fec48 100644
--- a/src/gallium/drivers/r300/r300_state_invariant.c
+++ b/src/gallium/drivers/r300/r300_state_invariant.c
@@ -34,42 +34,31 @@ void r300_emit_invariant_state(struct r300_context* r300)
struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps;
CS_LOCALS(r300);
- BEGIN_CS(30 + (caps->has_tcl ? 2: 0));
+ BEGIN_CS(24 + (caps->has_tcl ? 2: 0));
/*** Graphics Backend (GB) ***/
/* Various GB enables */
- OUT_CS_REG(R300_GB_ENABLE, 0x0);
- /* Subpixel multisampling for AA */
- OUT_CS_REG(R300_GB_MSPOS0, 0x66666666);
- OUT_CS_REG(R300_GB_MSPOS1, 0x66666666);
- /* GB tile config and pipe setup */
- OUT_CS_REG(R300_GB_TILE_CONFIG, R300_GB_TILE_DISABLE |
- r300_translate_gb_pipes(caps->num_frag_pipes));
+ OUT_CS_REG(R300_GB_ENABLE, R300_GB_POINT_STUFF_ENABLE |
+ R300_GB_LINE_STUFF_ENABLE |
+ R300_GB_TRIANGLE_STUFF_ENABLE);
+ /* Subpixel multisampling for AA
+ * These are commented out because glisse's CS checker doesn't like them.
+ * I presume these will be re-enabled later.
+ * OUT_CS_REG(R300_GB_MSPOS0, 0x66666666);
+ * OUT_CS_REG(R300_GB_MSPOS1, 0x6666666);
+ */
/* Source of fog depth */
OUT_CS_REG(R300_GB_SELECT, R300_GB_FOG_SELECT_1_1_W);
/* AA enable */
OUT_CS_REG(R300_GB_AA_CONFIG, 0x0);
- /*** Geometry Assembly (GA) ***/
- /* GA errata fixes. */
- if (caps->is_r500) {
- OUT_CS_REG(R300_GA_ENHANCE,
- R300_GA_ENHANCE_DEADLOCK_CNTL_PREVENT_TCL |
- R300_GA_ENHANCE_FASTSYNC_CNTL_ENABLE |
- R500_GA_ENHANCE_REG_READWRITE_ENABLE |
- R500_GA_ENHANCE_REG_NOSTALL_ENABLE);
- } else {
- OUT_CS_REG(R300_GA_ENHANCE,
- R300_GA_ENHANCE_DEADLOCK_CNTL_PREVENT_TCL |
- R300_GA_ENHANCE_FASTSYNC_CNTL_ENABLE);
- }
-
/*** Fog (FG) ***/
OUT_CS_REG(R300_FG_FOG_BLEND, 0x0);
OUT_CS_REG(R300_FG_FOG_COLOR_R, 0x0);
OUT_CS_REG(R300_FG_FOG_COLOR_G, 0x0);
OUT_CS_REG(R300_FG_FOG_COLOR_B, 0x0);
OUT_CS_REG(R300_FG_DEPTH_SRC, 0x0);
+ OUT_CS_REG(R300_US_W_FMT, 0x0);
/*** VAP ***/
/* Max and min vertex index clamp. */
@@ -86,7 +75,7 @@ void r300_emit_invariant_state(struct r300_context* r300)
END_CS;
/* XXX unsorted stuff from surface_fill */
- BEGIN_CS(79 + (caps->has_tcl ? 7 : 0));
+ BEGIN_CS(64 + (caps->has_tcl ? 5 : 0) + (caps->is_r500 ? 4 : 0));
/* Flush PVS. */
OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
@@ -94,30 +83,26 @@ void r300_emit_invariant_state(struct r300_context* r300)
R300_VPORT_X_OFFSET_ENA | R300_VPORT_Y_SCALE_ENA |
R300_VPORT_Y_OFFSET_ENA | R300_VPORT_Z_SCALE_ENA |
R300_VPORT_Z_OFFSET_ENA | R300_VTX_W0_FMT);
- /* XXX endian */
if (caps->has_tcl) {
- OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP);
- OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE |
- R300_PS_UCP_MODE_CLIP_AS_TRIFAN);
OUT_CS_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4);
OUT_CS_32F(1.0);
OUT_CS_32F(1.0);
OUT_CS_32F(1.0);
OUT_CS_32F(1.0);
- } else {
- OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP |
- R300_VAP_TCL_BYPASS);
}
/* XXX point tex stuffing */
OUT_CS_REG_SEQ(R300_GA_POINT_S0, 1);
OUT_CS_32F(0.0);
OUT_CS_REG_SEQ(R300_GA_POINT_S1, 1);
OUT_CS_32F(1.0);
+ /* XXX line tex stuffing */
+ OUT_CS_REG_SEQ(R300_GA_LINE_S0, 1);
+ OUT_CS_32F(0.0);
+ OUT_CS_REG_SEQ(R300_GA_LINE_S1, 1);
+ OUT_CS_32F(1.0);
OUT_CS_REG(R300_GA_TRIANGLE_STIPPLE, 0x5 |
(0x5 << R300_GA_TRIANGLE_STIPPLE_Y_SHIFT_SHIFT));
/* XXX this big chunk should be refactored into rs_state */
- OUT_CS_REG(R300_GA_LINE_S0, 0x00000000);
- OUT_CS_REG(R300_GA_LINE_S1, 0x3F800000);
OUT_CS_REG(R300_GA_SOLID_RG, 0x00000000);
OUT_CS_REG(R300_GA_SOLID_BA, 0x00000000);
OUT_CS_REG(R300_GA_POLY_MODE, 0x00000000);
@@ -133,8 +118,10 @@ void r300_emit_invariant_state(struct r300_context* r300)
OUT_CS_REG(R300_RB3D_CCTL, 0x00000000);
OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F);
OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, 0x00000000);
- OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x00000000);
- OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFFFFFFFF);
+ if (caps->is_r500) {
+ OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x00000000);
+ OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFFFFFFFF);
+ }
OUT_CS_REG(R300_ZB_FORMAT, 0x00000002);
OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, 0x00000003);
OUT_CS_REG(R300_ZB_BW_CNTL, 0x00000000);
@@ -144,17 +131,9 @@ void r300_emit_invariant_state(struct r300_context* r300)
OUT_CS_REG(R300_VAP_VTX_STATE_CNTL, 0x1);
OUT_CS_REG(R300_VAP_VSM_VTX_ASSM, 0x405);
OUT_CS_REG(R300_SE_VTE_CNTL, 0x0000043F);
- /* Vertex size. */
- OUT_CS_REG(R300_VAP_VTX_SIZE, 0x8);
/* XXX */
OUT_CS_REG(R300_SC_CLIP_RULE, 0xaaaa);
- OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4);
- OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A);
- OUT_CS(R300_US_OUT_FMT_UNUSED);
- OUT_CS(R300_US_OUT_FMT_UNUSED);
- OUT_CS(R300_US_OUT_FMT_UNUSED);
- OUT_CS_REG(R300_US_W_FMT, R300_W_FMT_W0);
END_CS;
}