diff options
Diffstat (limited to 'src/gallium/drivers')
53 files changed, 2669 insertions, 1269 deletions
diff --git a/src/gallium/drivers/cell/spu/spu_render.c b/src/gallium/drivers/cell/spu/spu_render.c index 7c225e2f27..5ffb7073ab 100644 --- a/src/gallium/drivers/cell/spu/spu_render.c +++ b/src/gallium/drivers/cell/spu/spu_render.c @@ -32,6 +32,7 @@ #include "spu_main.h" #include "spu_render.h" +#include "spu_shuffle.h" #include "spu_tri.h" #include "spu_tile.h" #include "cell/common.h" @@ -267,15 +268,75 @@ cmd_render(const struct cell_command_render *render, uint *pos_incr) uint drawn = 0; - /* loop over tris */ - for (j = 0; j < render->num_indexes; j += 3) { - const float *v0, *v1, *v2; - - v0 = (const float *) (vertices + indexes[j+0] * vertex_size); - v1 = (const float *) (vertices + indexes[j+1] * vertex_size); - v2 = (const float *) (vertices + indexes[j+2] * vertex_size); - - drawn += tri_draw(v0, v1, v2, tx, ty); + const qword vertex_sizes = (qword)spu_splats(vertex_size); + const qword verticess = (qword)spu_splats((uint)vertices); + + ASSERT_ALIGN16(&indexes[0]); + + const uint num_indexes = render->num_indexes; + + /* loop over tris + * &indexes[0] will be 16 byte aligned. This loop is heavily unrolled + * avoiding variable rotates when extracting vertex indices. + */ + for (j = 0; j < num_indexes; j += 24) { + /* Load three vectors, containing 24 ushort indices */ + const qword* lower_qword = (qword*)&indexes[j]; + const qword indices0 = lower_qword[0]; + const qword indices1 = lower_qword[1]; + const qword indices2 = lower_qword[2]; + + /* stores three indices for each tri n in slots 0, 1 and 2 of vsn */ + /* Straightforward rotates for these */ + qword vs0 = indices0; + qword vs1 = si_shlqbyi(indices0, 6); + qword vs3 = si_shlqbyi(indices1, 2); + qword vs4 = si_shlqbyi(indices1, 8); + qword vs6 = si_shlqbyi(indices2, 4); + qword vs7 = si_shlqbyi(indices2, 10); + + /* For tri 2 and 5, the three indices are split across two machine + * words - rotate and combine */ + const qword tmp2a = si_shlqbyi(indices0, 12); + const qword tmp2b = si_rotqmbyi(indices1, 12|16); + qword vs2 = si_selb(tmp2a, tmp2b, si_fsmh(si_from_uint(0x20))); + + const qword tmp5a = si_shlqbyi(indices1, 14); + const qword tmp5b = si_rotqmbyi(indices2, 14|16); + qword vs5 = si_selb(tmp5a, tmp5b, si_fsmh(si_from_uint(0x60))); + + /* unpack indices from halfword slots to word slots */ + vs0 = si_shufb(vs0, vs0, SHUFB8(0,A,0,B,0,C,0,0)); + vs1 = si_shufb(vs1, vs1, SHUFB8(0,A,0,B,0,C,0,0)); + vs2 = si_shufb(vs2, vs2, SHUFB8(0,A,0,B,0,C,0,0)); + vs3 = si_shufb(vs3, vs3, SHUFB8(0,A,0,B,0,C,0,0)); + vs4 = si_shufb(vs4, vs4, SHUFB8(0,A,0,B,0,C,0,0)); + vs5 = si_shufb(vs5, vs5, SHUFB8(0,A,0,B,0,C,0,0)); + vs6 = si_shufb(vs6, vs6, SHUFB8(0,A,0,B,0,C,0,0)); + vs7 = si_shufb(vs7, vs7, SHUFB8(0,A,0,B,0,C,0,0)); + + /* Calculate address of vertex in vertices[] */ + vs0 = si_mpya(vs0, vertex_sizes, verticess); + vs1 = si_mpya(vs1, vertex_sizes, verticess); + vs2 = si_mpya(vs2, vertex_sizes, verticess); + vs3 = si_mpya(vs3, vertex_sizes, verticess); + vs4 = si_mpya(vs4, vertex_sizes, verticess); + vs5 = si_mpya(vs5, vertex_sizes, verticess); + vs6 = si_mpya(vs6, vertex_sizes, verticess); + vs7 = si_mpya(vs7, vertex_sizes, verticess); + + /* Select the appropriate call based on the number of vertices + * remaining */ + switch(num_indexes - j) { + default: drawn += tri_draw(vs7, tx, ty); + case 21: drawn += tri_draw(vs6, tx, ty); + case 18: drawn += tri_draw(vs5, tx, ty); + case 15: drawn += tri_draw(vs4, tx, ty); + case 12: drawn += tri_draw(vs3, tx, ty); + case 9: drawn += tri_draw(vs2, tx, ty); + case 6: drawn += tri_draw(vs1, tx, ty); + case 3: drawn += tri_draw(vs0, tx, ty); + } } //printf("SPU %u: drew %u of %u\n", spu.init.id, drawn, render->num_indexes/3); diff --git a/src/gallium/drivers/cell/spu/spu_tri.c b/src/gallium/drivers/cell/spu/spu_tri.c index d727268475..58be001be4 100644 --- a/src/gallium/drivers/cell/spu/spu_tri.c +++ b/src/gallium/drivers/cell/spu/spu_tri.c @@ -133,7 +133,15 @@ struct setup_stage { uint tx, ty; /**< position of current tile (x, y) */ - int cliprect_minx, cliprect_maxx, cliprect_miny, cliprect_maxy; + union { + struct { + int cliprect_minx; + int cliprect_miny; + int cliprect_maxx; + int cliprect_maxy; + }; + qword cliprect; + }; struct interp_coef coef[PIPE_MAX_SHADER_INPUTS]; @@ -432,6 +440,41 @@ print_vertex(const struct vertex_header *v) } #endif +/* Returns the minimum of each slot of two vec_float4s as qwords. + * i.e. return[n] = min(q0[n],q1[n]); + */ +static qword +minfq(qword q0, qword q1) +{ + const qword q0q1m = si_fcgt(q0, q1); + return si_selb(q0, q1, q0q1m); +} + +/* Returns the minimum of each slot of three vec_float4s as qwords. + * i.e. return[n] = min(q0[n],q1[n],q2[n]); + */ +static qword +min3fq(qword q0, qword q1, qword q2) +{ + return minfq(minfq(q0, q1), q2); +} + +/* Returns the maximum of each slot of two vec_float4s as qwords. + * i.e. return[n] = min(q0[n],q1[n],q2[n]); + */ +static qword +maxfq(qword q0, qword q1) { + const qword q0q1m = si_fcgt(q0, q1); + return si_selb(q1, q0, q0q1m); +} + +/* Returns the maximum of each slot of three vec_float4s as qwords. + * i.e. return[n] = min(q0[n],q1[n],q2[n]); + */ +static qword +max3fq(qword q0, qword q1, qword q2) { + return maxfq(maxfq(q0, q1), q2); +} /** * Sort vertices from top to bottom. @@ -440,9 +483,7 @@ print_vertex(const struct vertex_header *v) * \return FALSE if tri is totally outside tile, TRUE otherwise */ static boolean -setup_sort_vertices(const struct vertex_header *v0, - const struct vertex_header *v1, - const struct vertex_header *v2) +setup_sort_vertices(const qword vs) { float area, sign; @@ -455,57 +496,57 @@ setup_sort_vertices(const struct vertex_header *v0, } #endif - /* determine bottom to top order of vertices */ { + /* Load the float values for various processing... */ + const qword f0 = (qword)(((const struct vertex_header*)si_to_ptr(vs))->data[0]); + const qword f1 = (qword)(((const struct vertex_header*)si_to_ptr(si_rotqbyi(vs, 4)))->data[0]); + const qword f2 = (qword)(((const struct vertex_header*)si_to_ptr(si_rotqbyi(vs, 8)))->data[0]); + + /* Check if triangle is completely outside the tile bounds + * Find the min and max x and y positions of the three poits */ + const qword minf = min3fq(f0, f1, f2); + const qword maxf = max3fq(f0, f1, f2); + + /* Compare min and max against cliprect vals */ + const qword maxsmins = si_shufb(maxf, minf, SHUFB4(A,B,a,b)); + const qword outside = si_fcgt(maxsmins, si_csflt(setup.cliprect, 0)); + + /* Use a little magic to work out of the tri is visible or not */ + if(si_to_uint(si_xori(si_gb(outside), 0xc))) return FALSE; + + /* determine bottom to top order of vertices */ /* A table of shuffle patterns for putting vertex_header pointers into correct order. Quite magical. */ - const vec_uchar16 sort_order_patterns[] = { - SHUFFLE4(A,B,C,C), - SHUFFLE4(C,A,B,C), - SHUFFLE4(A,C,B,C), - SHUFFLE4(B,C,A,C), - SHUFFLE4(B,A,C,C), - SHUFFLE4(C,B,A,C) }; - - /* The vertex_header pointers, packed for easy shuffling later */ - const vec_uint4 vs = {(unsigned)v0, (unsigned)v1, (unsigned)v2}; + const qword sort_order_patterns[] = { + SHUFB4(A,B,C,C), + SHUFB4(C,A,B,C), + SHUFB4(A,C,B,C), + SHUFB4(B,C,A,C), + SHUFB4(B,A,C,C), + SHUFB4(C,B,A,C) }; /* Collate y values into two vectors for comparison. Using only one shuffle constant! ;) */ - const vec_float4 y_02_ = spu_shuffle(v0->data[0], v2->data[0], SHUFFLE4(0,B,b,C)); - const vec_float4 y_10_ = spu_shuffle(v1->data[0], v0->data[0], SHUFFLE4(0,B,b,C)); - const vec_float4 y_012 = spu_shuffle(y_02_, v1->data[0], SHUFFLE4(0,B,b,C)); - const vec_float4 y_120 = spu_shuffle(y_10_, v2->data[0], SHUFFLE4(0,B,b,C)); + const qword y_02_ = si_shufb(f0, f2, SHUFB4(0,B,b,C)); + const qword y_10_ = si_shufb(f1, f0, SHUFB4(0,B,b,C)); + const qword y_012 = si_shufb(y_02_, f1, SHUFB4(0,B,b,C)); + const qword y_120 = si_shufb(y_10_, f2, SHUFB4(0,B,b,C)); /* Perform comparison: {y0,y1,y2} > {y1,y2,y0} */ - const vec_uint4 compare = spu_cmpgt(y_012, y_120); + const qword compare = si_fcgt(y_012, y_120); /* Compress the result of the comparison into 4 bits */ - const vec_uint4 gather = spu_gather(compare); + const qword gather = si_gb(compare); /* Subtract one to attain the index into the LUT. Magical. */ - const unsigned int index = spu_extract(gather, 0) - 1; + const unsigned int index = si_to_uint(gather) - 1; /* Load the appropriate pattern and construct the desired vector. */ - setup.vertex_headers = (qword)spu_shuffle(vs, vs, sort_order_patterns[index]); + setup.vertex_headers = si_shufb(vs, vs, sort_order_patterns[index]); /* Using the result of the comparison, set sign. Very magical. */ - sign = ((si_to_uint(si_cntb((qword)gather)) == 2) ? 1.0f : -1.0f); + sign = ((si_to_uint(si_cntb(gather)) == 2) ? 1.0f : -1.0f); } - /* Check if triangle is completely outside the tile bounds */ - if (spu_extract(setup.vmin->data[0], 1) > setup.cliprect_maxy) - return FALSE; - if (spu_extract(setup.vmax->data[0], 1) < setup.cliprect_miny) - return FALSE; - if (spu_extract(setup.vmin->data[0], 0) < setup.cliprect_minx && - spu_extract(setup.vmid->data[0], 0) < setup.cliprect_minx && - spu_extract(setup.vmax->data[0], 0) < setup.cliprect_minx) - return FALSE; - if (spu_extract(setup.vmin->data[0], 0) > setup.cliprect_maxx && - spu_extract(setup.vmid->data[0], 0) > setup.cliprect_maxx && - spu_extract(setup.vmax->data[0], 0) > setup.cliprect_maxx) - return FALSE; - setup.ebot.ds = spu_sub(setup.vmid->data[0], setup.vmin->data[0]); setup.emaj.ds = spu_sub(setup.vmax->data[0], setup.vmin->data[0]); setup.etop.ds = spu_sub(setup.vmax->data[0], setup.vmid->data[0]); @@ -761,21 +802,19 @@ subtriangle(struct edge *eleft, struct edge *eright, unsigned lines) * The tile data should have already been fetched. */ boolean -tri_draw(const float *v0, const float *v1, const float *v2, +tri_draw(const qword vs, uint tx, uint ty) { setup.tx = tx; setup.ty = ty; /* set clipping bounds to tile bounds */ - setup.cliprect_minx = tx * TILE_SIZE; - setup.cliprect_miny = ty * TILE_SIZE; - setup.cliprect_maxx = (tx + 1) * TILE_SIZE; - setup.cliprect_maxy = (ty + 1) * TILE_SIZE; - - if (!setup_sort_vertices((struct vertex_header *) v0, - (struct vertex_header *) v1, - (struct vertex_header *) v2)) { + const qword clipbase = (qword)((vec_uint4){tx, ty}); + const qword clipmin = si_mpyui(clipbase, TILE_SIZE); + const qword clipmax = si_ai(clipmin, TILE_SIZE); + setup.cliprect = si_shufb(clipmin, clipmax, SHUFB4(A,B,a,b)); + + if(!setup_sort_vertices(vs)) { return FALSE; /* totally clipped */ } diff --git a/src/gallium/drivers/cell/spu/spu_tri.h b/src/gallium/drivers/cell/spu/spu_tri.h index aa694dd7c9..82e3b19ad7 100644 --- a/src/gallium/drivers/cell/spu/spu_tri.h +++ b/src/gallium/drivers/cell/spu/spu_tri.h @@ -31,7 +31,7 @@ extern boolean -tri_draw(const float *v0, const float *v1, const float *v2, uint tx, uint ty); +tri_draw(const qword vs, uint tx, uint ty); #endif /* SPU_TRI_H */ diff --git a/src/gallium/drivers/nv04/nv04_miptree.c b/src/gallium/drivers/nv04/nv04_miptree.c index 4da833c25e..93f752faec 100644 --- a/src/gallium/drivers/nv04/nv04_miptree.c +++ b/src/gallium/drivers/nv04/nv04_miptree.c @@ -31,7 +31,8 @@ nv04_miptree_layout(struct nv04_miptree *nv04mt) for (l = 0; l <= pt->last_level; l++) { - nv04mt->level[l].image_offset = offset; + nv04mt->level[l].image_offset = + CALLOC(nr_faces, sizeof(unsigned)); offset += nv04mt->level[l].pitch * pt->height[l]; } diff --git a/src/gallium/drivers/nv04/nv04_state.h b/src/gallium/drivers/nv04/nv04_state.h index 0d51439e3f..399f750dbe 100644 --- a/src/gallium/drivers/nv04/nv04_state.h +++ b/src/gallium/drivers/nv04/nv04_state.h @@ -37,7 +37,7 @@ struct nv04_miptree { struct { uint pitch; - uint image_offset; + uint *image_offset; } level[PIPE_MAX_TEXTURE_LEVELS]; }; diff --git a/src/gallium/drivers/nv50/nv50_program.c b/src/gallium/drivers/nv50/nv50_program.c index 2d15868ae8..aada285f2c 100644 --- a/src/gallium/drivers/nv50/nv50_program.c +++ b/src/gallium/drivers/nv50/nv50_program.c @@ -85,6 +85,9 @@ struct nv50_reg { int hw; int neg; + + int rhw; /* result hw for FP outputs, or interpolant index */ + int acc; /* instruction where this reg is last read (first insn == 1) */ }; struct nv50_pc { @@ -108,12 +111,23 @@ struct nv50_pc { struct nv50_reg *temp_temp[16]; unsigned temp_temp_nr; + + unsigned interp_mode[32]; + /* perspective interpolation registers */ + struct nv50_reg *iv_p; + struct nv50_reg *iv_c; + + /* current instruction and total number of insns */ + unsigned insn_cur; + unsigned insn_nr; + + boolean allow32; }; static void alloc_reg(struct nv50_pc *pc, struct nv50_reg *reg) { - int i; + int i = 0; if (reg->type == P_RESULT) { if (pc->p->cfg.high_result < (reg->hw + 1)) @@ -131,7 +145,22 @@ alloc_reg(struct nv50_pc *pc, struct nv50_reg *reg) return; } - for (i = 0; i < NV50_SU_MAX_TEMP; i++) { + if (reg->rhw != -1) { + /* try to allocate temporary with index rhw first */ + if (!(pc->r_temp[reg->rhw])) { + pc->r_temp[reg->rhw] = reg; + reg->hw = reg->rhw; + if (pc->p->cfg.high_temp < (reg->rhw + 1)) + pc->p->cfg.high_temp = reg->rhw + 1; + return; + } + /* make sure we don't get things like $r0 needs to go + * in $r1 and $r1 in $r0 + */ + i = pc->result_nr * 4; + } + + for (; i < NV50_SU_MAX_TEMP; i++) { if (!(pc->r_temp[i])) { pc->r_temp[i] = reg; reg->hw = i; @@ -159,6 +188,7 @@ alloc_temp(struct nv50_pc *pc, struct nv50_reg *dst) r->type = P_TEMP; r->index = -1; r->hw = i; + r->rhw = -1; pc->r_temp[i] = r; return r; } @@ -168,6 +198,38 @@ alloc_temp(struct nv50_pc *pc, struct nv50_reg *dst) return NULL; } +/* Assign the hw of the discarded temporary register src + * to the tgsi register dst and free src. + */ +static void +assimilate_temp(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *src) +{ + assert(src->index == -1 && src->hw != -1); + + if (dst->hw != -1) + pc->r_temp[dst->hw] = NULL; + pc->r_temp[src->hw] = dst; + dst->hw = src->hw; + + FREE(src); +} + +/* release the hardware resource held by r */ +static void +release_hw(struct nv50_pc *pc, struct nv50_reg *r) +{ + assert(r->type == P_TEMP); + if (r->hw == -1) + return; + + assert(pc->r_temp[r->hw] == r); + pc->r_temp[r->hw] = NULL; + + r->acc = 0; + if (r->index == -1) + FREE(r); +} + static void free_temp(struct nv50_pc *pc, struct nv50_reg *r) { @@ -250,7 +312,13 @@ alloc_immd(struct nv50_pc *pc, float f) struct nv50_reg *r = CALLOC_STRUCT(nv50_reg); unsigned hw; - hw = ctor_immd(pc, f, 0, 0, 0) * 4; + for (hw = 0; hw < pc->immd_nr * 4; hw++) + if (pc->immd_buf[hw] == f) + break; + + if (hw == pc->immd_nr * 4) + hw = ctor_immd(pc, f, -f, 0.5 * f, 0) * 4; + r->type = P_IMMD; r->hw = hw; r->index = -1; @@ -341,7 +409,8 @@ set_dst(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_program_exec *e) static INLINE void set_immd(struct nv50_pc *pc, struct nv50_reg *imm, struct nv50_program_exec *e) { - unsigned val = fui(pc->immd_buf[imm->hw]); /* XXX */ + float f = pc->immd_buf[imm->hw]; + unsigned val = fui(imm->neg ? -f : f); set_long(pc, e); /*XXX: can't be predicated - bits overlap.. catch cases where both @@ -354,20 +423,35 @@ set_immd(struct nv50_pc *pc, struct nv50_reg *imm, struct nv50_program_exec *e) e->inst[1] |= (val >> 6) << 2; } + +#define INTERP_LINEAR 0 +#define INTERP_FLAT 1 +#define INTERP_PERSPECTIVE 2 +#define INTERP_CENTROID 4 + +/* interpolant index has been stored in dst->rhw */ static void -emit_interp(struct nv50_pc *pc, struct nv50_reg *dst, - struct nv50_reg *src, struct nv50_reg *iv) +emit_interp(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *iv, + unsigned mode) { + assert(dst->rhw != -1); struct nv50_program_exec *e = exec(pc); e->inst[0] |= 0x80000000; set_dst(pc, dst, e); - alloc_reg(pc, src); - e->inst[0] |= (src->hw << 16); - if (iv) { - e->inst[0] |= (1 << 25); - alloc_reg(pc, iv); - e->inst[0] |= (iv->hw << 9); + e->inst[0] |= (dst->rhw << 16); + + if (mode & INTERP_FLAT) { + e->inst[0] |= (1 << 8); + } else { + if (mode & INTERP_PERSPECTIVE) { + e->inst[0] |= (1 << 25); + alloc_reg(pc, iv); + e->inst[0] |= (iv->hw << 9); + } + + if (mode & INTERP_CENTROID) + e->inst[0] |= (1 << 24); } emit(pc, e); @@ -378,22 +462,12 @@ set_data(struct nv50_pc *pc, struct nv50_reg *src, unsigned m, unsigned s, struct nv50_program_exec *e) { set_long(pc, e); -#if 1 - e->inst[1] |= (1 << 22); -#else - if (src->type == P_IMMD) { - e->inst[1] |= (NV50_CB_PMISC << 22); - } else { - if (pc->p->type == PIPE_SHADER_VERTEX) - e->inst[1] |= (NV50_CB_PVP << 22); - else - e->inst[1] |= (NV50_CB_PFP << 22); - } -#endif e->param.index = src->hw; e->param.shift = s; e->param.mask = m << (s % 32); + + e->inst[1] |= (((src->type == P_IMMD) ? 0 : 1) << 22); } static void @@ -405,12 +479,11 @@ emit_mov(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *src) set_dst(pc, dst, e); - if (0 && dst->type != P_RESULT && src->type == P_IMMD) { + if (pc->allow32 && dst->type != P_RESULT && src->type == P_IMMD) { set_immd(pc, src, e); /*XXX: 32-bit, but steals part of "half" reg space - need to * catch and handle this case if/when we do half-regs */ - e->inst[0] |= 0x00008000; } else if (src->type == P_IMMD || src->type == P_CONST) { set_long(pc, e); @@ -426,18 +499,25 @@ emit_mov(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *src) e->inst[0] |= (src->hw << 9); } - /* We really should support "half" instructions here at some point, - * but I don't feel confident enough about them yet. - */ - set_long(pc, e); if (is_long(e) && !is_immd(e)) { e->inst[1] |= 0x04000000; /* 32-bit */ - e->inst[1] |= 0x0003c000; /* "subsubop" 0xf == mov */ - } + e->inst[1] |= 0x0000c000; /* "subsubop" 0x3 */ + if (!(e->inst[1] & 0x20000000)) + e->inst[1] |= 0x00030000; /* "subsubop" 0xf */ + } else + e->inst[0] |= 0x00008000; emit(pc, e); } +static INLINE void +emit_mov_immdval(struct nv50_pc *pc, struct nv50_reg *dst, float f) +{ + struct nv50_reg *imm = alloc_immd(pc, f); + emit_mov(pc, dst, imm); + FREE(imm); +} + static boolean check_swap_src_0_1(struct nv50_pc *pc, struct nv50_reg **s0, struct nv50_reg **s1) @@ -541,12 +621,26 @@ emit_mul(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *src0, struct nv50_program_exec *e = exec(pc); e->inst[0] |= 0xc0000000; - set_long(pc, e); + + if (!pc->allow32) + set_long(pc, e); check_swap_src_0_1(pc, &src0, &src1); set_dst(pc, dst, e); set_src_0(pc, src0, e); - set_src_1(pc, src1, e); + if (src1->type == P_IMMD && !is_long(e)) { + if (src0->neg) + e->inst[0] |= 0x00008000; + set_immd(pc, src1, e); + } else { + set_src_1(pc, src1, e); + if (src0->neg ^ src1->neg) { + if (is_long(e)) + e->inst[1] |= 0x08000000; + else + e->inst[0] |= 0x00008000; + } + } emit(pc, e); } @@ -560,11 +654,20 @@ emit_add(struct nv50_pc *pc, struct nv50_reg *dst, e->inst[0] |= 0xb0000000; check_swap_src_0_1(pc, &src0, &src1); + + if (!pc->allow32 || src0->neg || src1->neg) { + set_long(pc, e); + e->inst[1] |= (src0->neg << 26) | (src1->neg << 27); + } + set_dst(pc, dst, e); set_src_0(pc, src0, e); - if (is_long(e)) + if (src1->type == P_CONST || src1->type == P_ATTR || is_long(e)) set_src_2(pc, src1, e); else + if (src1->type == P_IMMD) + set_immd(pc, src1, e); + else set_src_1(pc, src1, e); emit(pc, e); @@ -588,25 +691,13 @@ emit_minmax(struct nv50_pc *pc, unsigned sub, struct nv50_reg *dst, emit(pc, e); } -static void +static INLINE void emit_sub(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *src0, struct nv50_reg *src1) { - struct nv50_program_exec *e = exec(pc); - - e->inst[0] |= 0xb0000000; - - set_long(pc, e); - if (check_swap_src_0_1(pc, &src0, &src1)) - e->inst[1] |= 0x04000000; - else - e->inst[1] |= 0x08000000; - - set_dst(pc, dst, e); - set_src_0(pc, src0, e); - set_src_2(pc, src1, e); - - emit(pc, e); + src1->neg ^= 1; + emit_add(pc, dst, src0, src1); + src1->neg ^= 1; } static void @@ -623,26 +714,21 @@ emit_mad(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *src0, set_src_1(pc, src1, e); set_src_2(pc, src2, e); + if (src0->neg ^ src1->neg) + e->inst[1] |= 0x04000000; + if (src2->neg) + e->inst[1] |= 0x08000000; + emit(pc, e); } -static void +static INLINE void emit_msb(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *src0, struct nv50_reg *src1, struct nv50_reg *src2) { - struct nv50_program_exec *e = exec(pc); - - e->inst[0] |= 0xe0000000; - set_long(pc, e); - e->inst[1] |= 0x08000000; /* src0 * src1 - src2 */ - - check_swap_src_0_1(pc, &src0, &src1); - set_dst(pc, dst, e); - set_src_0(pc, src0, e); - set_src_1(pc, src1, e); - set_src_2(pc, src2, e); - - emit(pc, e); + src2->neg ^= 1; + emit_mad(pc, dst, src0, src1, src2); + src2->neg ^= 1; } static void @@ -693,6 +779,48 @@ emit_precossin(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *src) emit(pc, e); } +#define CVTOP_RN 0x01 +#define CVTOP_FLOOR 0x03 +#define CVTOP_CEIL 0x05 +#define CVTOP_TRUNC 0x07 +#define CVTOP_SAT 0x08 +#define CVTOP_ABS 0x10 + +#define CVT_F32_F32 0xc4 +#define CVT_F32_S32 0x44 +#define CVT_F32_U32 0x64 +#define CVT_S32_F32 0x8c +#define CVT_S32_S32 0x0c +#define CVT_F32_F32_ROP 0xcc + +static void +emit_cvt(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *src, + int wp, unsigned cop, unsigned fmt) +{ + struct nv50_program_exec *e; + + e = exec(pc); + set_long(pc, e); + + e->inst[0] |= 0xa0000000; + e->inst[1] |= 0x00004000; + e->inst[1] |= (cop << 16); + e->inst[1] |= (fmt << 24); + set_src_0(pc, src, e); + + if (wp >= 0) + set_pred_wr(pc, 1, wp, e); + + if (dst) + set_dst(pc, dst, e); + else { + e->inst[0] |= 0x000001fc; + e->inst[1] |= 0x00000008; + } + + emit(pc, e); +} + static void emit_set(struct nv50_pc *pc, unsigned c_op, struct nv50_reg *dst, struct nv50_reg *src0, struct nv50_reg *src1) @@ -736,22 +864,10 @@ emit_set(struct nv50_pc *pc, unsigned c_op, struct nv50_reg *dst, free_temp(pc, dst); } -static void +static INLINE void emit_flr(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *src) { - struct nv50_program_exec *e = exec(pc); - - e->inst[0] = 0xa0000000; /* cvt */ - set_long(pc, e); - e->inst[1] |= (6 << 29); /* cvt */ - e->inst[1] |= 0x08000000; /* integer mode */ - e->inst[1] |= 0x04000000; /* 32 bit */ - e->inst[1] |= ((0x1 << 3)) << 14; /* .rn */ - e->inst[1] |= (1 << 14); /* src .f32 */ - set_dst(pc, dst, e); - set_src_0(pc, src, e); - - emit(pc, e); + emit_cvt(pc, dst, src, -1, CVTOP_FLOOR, CVT_F32_F32_ROP); } static void @@ -768,21 +884,10 @@ emit_pow(struct nv50_pc *pc, struct nv50_reg *dst, free_temp(pc, temp); } -static void +static INLINE void emit_abs(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *src) { - struct nv50_program_exec *e = exec(pc); - - e->inst[0] = 0xa0000000; /* cvt */ - set_long(pc, e); - e->inst[1] |= (6 << 29); /* cvt */ - e->inst[1] |= 0x04000000; /* 32 bit */ - e->inst[1] |= (1 << 14); /* src .f32 */ - e->inst[1] |= ((1 << 6) << 14); /* .abs */ - set_dst(pc, dst, e); - set_src_0(pc, src, e); - - emit(pc, e); + emit_cvt(pc, dst, src, -1, CVTOP_ABS, CVT_F32_F32); } static void @@ -794,18 +899,12 @@ emit_lit(struct nv50_pc *pc, struct nv50_reg **dst, unsigned mask, struct nv50_reg *neg128 = alloc_immd(pc, -127.999999); struct nv50_reg *pos128 = alloc_immd(pc, 127.999999); struct nv50_reg *tmp[4]; + boolean allow32 = pc->allow32; - if (mask & (1 << 0)) - emit_mov(pc, dst[0], one); - - if (mask & (1 << 3)) - emit_mov(pc, dst[3], one); + pc->allow32 = FALSE; if (mask & (3 << 1)) { - if (mask & (1 << 1)) - tmp[0] = dst[1]; - else - tmp[0] = temp_temp(pc); + tmp[0] = alloc_temp(pc, NULL); emit_minmax(pc, 4, tmp[0], src[0], zero); } @@ -823,6 +922,26 @@ emit_lit(struct nv50_pc *pc, struct nv50_reg **dst, unsigned mask, emit_mov(pc, dst[2], zero); set_pred(pc, 3, 0, pc->p->exec_tail); } + + if (mask & (1 << 1)) + assimilate_temp(pc, dst[1], tmp[0]); + else + if (mask & (1 << 2)) + free_temp(pc, tmp[0]); + + pc->allow32 = allow32; + + /* do this last, in case src[i,j] == dst[0,3] */ + if (mask & (1 << 0)) + emit_mov(pc, dst[0], one); + + if (mask & (1 << 3)) + emit_mov(pc, dst[3], one); + + FREE(pos128); + FREE(neg128); + FREE(zero); + FREE(one); } static void @@ -853,6 +972,8 @@ emit_kil(struct nv50_pc *pc, struct nv50_reg *src) e->inst[1] = 0xc4014788; set_src_0(pc, src, e); set_pred_wr(pc, 1, r_pred, e); + if (src->neg) + e->inst[1] |= 0x20000000; emit(pc, e); /* This is probably KILP */ @@ -863,6 +984,180 @@ emit_kil(struct nv50_pc *pc, struct nv50_reg *src) emit(pc, e); } +static void +emit_tex(struct nv50_pc *pc, struct nv50_reg **dst, unsigned mask, + struct nv50_reg **src, unsigned unit, unsigned type, boolean proj) +{ + struct nv50_reg *temp, *t[4]; + struct nv50_program_exec *e; + + unsigned c, mode, dim; + + switch (type) { + case TGSI_TEXTURE_1D: + dim = 1; + break; + case TGSI_TEXTURE_UNKNOWN: + case TGSI_TEXTURE_2D: + case TGSI_TEXTURE_SHADOW1D: /* XXX: x, z */ + case TGSI_TEXTURE_RECT: + dim = 2; + break; + case TGSI_TEXTURE_3D: + case TGSI_TEXTURE_CUBE: + case TGSI_TEXTURE_SHADOW2D: + case TGSI_TEXTURE_SHADOWRECT: /* XXX */ + dim = 3; + break; + default: + assert(0); + break; + } + + alloc_temp4(pc, t, 0); + + if (proj) { + if (src[0]->type == P_TEMP && src[0]->rhw != -1) { + mode = pc->interp_mode[src[0]->index]; + + t[3]->rhw = src[3]->rhw; + emit_interp(pc, t[3], NULL, (mode & INTERP_CENTROID)); + emit_flop(pc, 0, t[3], t[3]); + + for (c = 0; c < dim; c++) { + t[c]->rhw = src[c]->rhw; + emit_interp(pc, t[c], t[3], + (mode | INTERP_PERSPECTIVE)); + } + } else { + emit_flop(pc, 0, t[3], src[3]); + for (c = 0; c < dim; c++) + emit_mul(pc, t[c], src[c], t[3]); + + /* XXX: for some reason the blob sometimes uses MAD: + * emit_mad(pc, t[c], src[0][c], t[3], t[3]) + * pc->p->exec_tail->inst[1] |= 0x080fc000; + */ + } + } else { + if (type == TGSI_TEXTURE_CUBE) { + temp = temp_temp(pc); + emit_minmax(pc, 4, temp, src[0], src[1]); + emit_minmax(pc, 4, temp, temp, src[2]); + emit_flop(pc, 0, temp, temp); + for (c = 0; c < 3; c++) + emit_mul(pc, t[c], src[c], temp); + } else { + for (c = 0; c < dim; c++) + emit_mov(pc, t[c], src[c]); + } + } + + e = exec(pc); + set_long(pc, e); + e->inst[0] |= 0xf0000000; + e->inst[1] |= 0x00000004; + set_dst(pc, t[0], e); + e->inst[0] |= (unit << 9); + + if (dim == 2) + e->inst[0] |= 0x00400000; + else + if (dim == 3) + e->inst[0] |= 0x00800000; + + e->inst[0] |= (mask & 0x3) << 25; + e->inst[1] |= (mask & 0xc) << 12; + + emit(pc, e); + +#if 1 + if (mask & 1) emit_mov(pc, dst[0], t[0]); + if (mask & 2) emit_mov(pc, dst[1], t[1]); + if (mask & 4) emit_mov(pc, dst[2], t[2]); + if (mask & 8) emit_mov(pc, dst[3], t[3]); + + free_temp4(pc, t); +#else + /* XXX: if p.e. MUL is used directly after TEX, it would still use + * the texture coordinates, not the fetched values: latency ? */ + + for (c = 0; c < 4; c++) { + if (mask & (1 << c)) + assimilate_temp(pc, dst[c], t[c]); + else + free_temp(pc, t[c]); + } +#endif +} + +static void +convert_to_long(struct nv50_pc *pc, struct nv50_program_exec *e) +{ + unsigned q = 0, m = ~0; + + assert(!is_long(e)); + + switch (e->inst[0] >> 28) { + case 0x1: + /* MOV */ + q = 0x0403c000; + m = 0xffff7fff; + break; + case 0x8: + /* INTERP */ + m = ~0x02000000; + if (e->inst[0] & 0x02000000) + q = 0x00020000; + break; + case 0x9: + /* RCP */ + break; + case 0xB: + /* ADD */ + m = ~(127 << 16); + q = ((e->inst[0] & (~m)) >> 2); + break; + case 0xC: + /* MUL */ + m = ~0x00008000; + q = ((e->inst[0] & (~m)) << 12); + break; + case 0xE: + /* MAD (if src2 == dst) */ + q = ((e->inst[0] & 0x1fc) << 12); + break; + default: + assert(0); + break; + } + + set_long(pc, e); + pc->p->exec_size++; + + e->inst[0] &= m; + e->inst[1] |= q; +} + +static boolean +negate_supported(const struct tgsi_full_instruction *insn, int i) +{ + switch (insn->Instruction.Opcode) { + case TGSI_OPCODE_DP3: + case TGSI_OPCODE_DP4: + case TGSI_OPCODE_MUL: + case TGSI_OPCODE_KIL: + case TGSI_OPCODE_ADD: + case TGSI_OPCODE_SUB: + case TGSI_OPCODE_MAD: + return TRUE; + case TGSI_OPCODE_POW: + return (i == 1) ? TRUE : FALSE; + default: + return FALSE; + } +} + static struct nv50_reg * tgsi_dst(struct nv50_pc *pc, int c, const struct tgsi_full_dst_register *dst) { @@ -881,11 +1176,14 @@ tgsi_dst(struct nv50_pc *pc, int c, const struct tgsi_full_dst_register *dst) } static struct nv50_reg * -tgsi_src(struct nv50_pc *pc, int chan, const struct tgsi_full_src_register *src) +tgsi_src(struct nv50_pc *pc, int chan, const struct tgsi_full_src_register *src, + boolean neg) { struct nv50_reg *r = NULL; struct nv50_reg *temp; - unsigned c; + unsigned sgn, c; + + sgn = tgsi_util_get_full_src_register_sign_mode(src, chan); c = tgsi_util_get_full_src_register_extswizzle(src, chan); switch (c) { @@ -915,16 +1213,17 @@ tgsi_src(struct nv50_pc *pc, int chan, const struct tgsi_full_src_register *src) break; case TGSI_EXTSWIZZLE_ZERO: r = alloc_immd(pc, 0.0); - break; + return r; case TGSI_EXTSWIZZLE_ONE: - r = alloc_immd(pc, 1.0); - break; + if (sgn == TGSI_UTIL_SIGN_TOGGLE || sgn == TGSI_UTIL_SIGN_SET) + return alloc_immd(pc, -1.0); + return alloc_immd(pc, 1.0); default: assert(0); break; } - switch (tgsi_util_get_full_src_register_sign_mode(src, chan)) { + switch (sgn) { case TGSI_UTIL_SIGN_KEEP: break; case TGSI_UTIL_SIGN_CLEAR: @@ -933,14 +1232,21 @@ tgsi_src(struct nv50_pc *pc, int chan, const struct tgsi_full_src_register *src) r = temp; break; case TGSI_UTIL_SIGN_TOGGLE: - temp = temp_temp(pc); - emit_neg(pc, temp, r); - r = temp; + if (neg) + r->neg = 1; + else { + temp = temp_temp(pc); + emit_neg(pc, temp, r); + r = temp; + } break; case TGSI_UTIL_SIGN_SET: temp = temp_temp(pc); emit_abs(pc, temp, r); - emit_neg(pc, temp, r); + if (neg) + temp->neg = 1; + else + emit_neg(pc, temp, temp); r = temp; break; default: @@ -951,12 +1257,40 @@ tgsi_src(struct nv50_pc *pc, int chan, const struct tgsi_full_src_register *src) return r; } +/* returns TRUE if instruction can overwrite sources before they're read */ +static boolean +direct2dest_op(const struct tgsi_full_instruction *insn) +{ + if (insn->Instruction.Saturate) + return FALSE; + + switch (insn->Instruction.Opcode) { + case TGSI_OPCODE_COS: + case TGSI_OPCODE_DP3: + case TGSI_OPCODE_DP4: + case TGSI_OPCODE_DPH: + case TGSI_OPCODE_KIL: + case TGSI_OPCODE_LIT: + case TGSI_OPCODE_POW: + case TGSI_OPCODE_RCP: + case TGSI_OPCODE_RSQ: + case TGSI_OPCODE_SCS: + case TGSI_OPCODE_SIN: + case TGSI_OPCODE_TEX: + case TGSI_OPCODE_TXP: + return FALSE; + default: + return TRUE; + } +} + static boolean nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok) { const struct tgsi_full_instruction *inst = &tok->FullInstruction; struct nv50_reg *rdst[4], *dst[4], *src[3][4], *temp; unsigned mask, sat, unit; + boolean assimilate = FALSE; int i, c; mask = inst->FullDstRegisters[0].DstRegister.WriteMask; @@ -967,6 +1301,10 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok) dst[c] = tgsi_dst(pc, c, &inst->FullDstRegisters[0]); else dst[c] = NULL; + rdst[c] = NULL; + src[0][c] = NULL; + src[1][c] = NULL; + src[2][c] = NULL; } for (i = 0; i < inst->Instruction.NumSrcRegs; i++) { @@ -976,7 +1314,8 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok) unit = fs->SrcRegister.Index; for (c = 0; c < 4; c++) - src[i][c] = tgsi_src(pc, c, fs); + src[i][c] = tgsi_src(pc, c, fs, + negate_supported(inst, i)); } if (sat) { @@ -984,6 +1323,25 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok) rdst[c] = dst[c]; dst[c] = temp_temp(pc); } + } else + if (direct2dest_op(inst)) { + for (c = 0; c < 4; c++) { + if (!dst[c] || dst[c]->type != P_TEMP) + continue; + + for (i = c + 1; i < 4; i++) { + if (dst[c] == src[0][i] || + dst[c] == src[1][i] || + dst[c] == src[2][i]) + break; + } + if (i == 4) + continue; + + assimilate = TRUE; + rdst[c] = dst[c]; + dst[c] = alloc_temp(pc, NULL); + } } switch (inst->Instruction.Opcode) { @@ -1002,7 +1360,7 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok) } break; case TGSI_OPCODE_COS: - temp = alloc_temp(pc, NULL); + temp = temp_temp(pc); emit_precossin(pc, temp, src[0][0]); emit_flop(pc, 5, temp, temp); for (c = 0; c < 4; c++) { @@ -1012,7 +1370,7 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok) } break; case TGSI_OPCODE_DP3: - temp = alloc_temp(pc, NULL); + temp = temp_temp(pc); emit_mul(pc, temp, src[0][0], src[1][0]); emit_mad(pc, temp, src[0][1], src[1][1], temp); emit_mad(pc, temp, src[0][2], src[1][2], temp); @@ -1021,10 +1379,9 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok) continue; emit_mov(pc, dst[c], temp); } - free_temp(pc, temp); break; case TGSI_OPCODE_DP4: - temp = alloc_temp(pc, NULL); + temp = temp_temp(pc); emit_mul(pc, temp, src[0][0], src[1][0]); emit_mad(pc, temp, src[0][1], src[1][1], temp); emit_mad(pc, temp, src[0][2], src[1][2], temp); @@ -1034,10 +1391,9 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok) continue; emit_mov(pc, dst[c], temp); } - free_temp(pc, temp); break; case TGSI_OPCODE_DPH: - temp = alloc_temp(pc, NULL); + temp = temp_temp(pc); emit_mul(pc, temp, src[0][0], src[1][0]); emit_mad(pc, temp, src[0][1], src[1][1], temp); emit_mad(pc, temp, src[0][2], src[1][2], temp); @@ -1047,7 +1403,6 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok) continue; emit_mov(pc, dst[c], temp); } - free_temp(pc, temp); break; case TGSI_OPCODE_DST: { @@ -1064,7 +1419,7 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok) } break; case TGSI_OPCODE_EX2: - temp = alloc_temp(pc, NULL); + temp = temp_temp(pc); emit_preex2(pc, temp, src[0][0]); emit_flop(pc, 6, temp, temp); for (c = 0; c < 4; c++) { @@ -1072,7 +1427,6 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok) continue; emit_mov(pc, dst[c], temp); } - free_temp(pc, temp); break; case TGSI_OPCODE_FLR: for (c = 0; c < 4; c++) { @@ -1082,26 +1436,26 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok) } break; case TGSI_OPCODE_FRC: - temp = alloc_temp(pc, NULL); + temp = temp_temp(pc); for (c = 0; c < 4; c++) { if (!(mask & (1 << c))) continue; emit_flr(pc, temp, src[0][c]); emit_sub(pc, dst[c], src[0][c], temp); } - free_temp(pc, temp); break; case TGSI_OPCODE_KIL: emit_kil(pc, src[0][0]); emit_kil(pc, src[0][1]); emit_kil(pc, src[0][2]); emit_kil(pc, src[0][3]); + pc->p->cfg.fp.regs[2] |= 0x00100000; break; case TGSI_OPCODE_LIT: emit_lit(pc, &dst[0], mask, &src[0][0]); break; case TGSI_OPCODE_LG2: - temp = alloc_temp(pc, NULL); + temp = temp_temp(pc); emit_flop(pc, 3, temp, src[0][0]); for (c = 0; c < 4; c++) { if (!(mask & (1 << c))) @@ -1110,15 +1464,12 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok) } break; case TGSI_OPCODE_LRP: + temp = temp_temp(pc); for (c = 0; c < 4; c++) { if (!(mask & (1 << c))) continue; - /*XXX: we can do better than this */ - temp = alloc_temp(pc, NULL); - emit_neg(pc, temp, src[0][c]); - emit_mad(pc, temp, temp, src[2][c], src[2][c]); - emit_mad(pc, dst[c], src[0][c], src[1][c], temp); - free_temp(pc, temp); + emit_sub(pc, temp, src[1][c], src[2][c]); + emit_mad(pc, dst[c], temp, src[0][c], src[2][c]); } break; case TGSI_OPCODE_MAD: @@ -1157,36 +1508,39 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok) } break; case TGSI_OPCODE_POW: - temp = alloc_temp(pc, NULL); + temp = temp_temp(pc); emit_pow(pc, temp, src[0][0], src[1][0]); for (c = 0; c < 4; c++) { if (!(mask & (1 << c))) continue; emit_mov(pc, dst[c], temp); } - free_temp(pc, temp); break; case TGSI_OPCODE_RCP: - for (c = 0; c < 4; c++) { + for (c = 3; c >= 0; c--) { if (!(mask & (1 << c))) continue; emit_flop(pc, 0, dst[c], src[0][0]); } break; case TGSI_OPCODE_RSQ: - for (c = 0; c < 4; c++) { + for (c = 3; c >= 0; c--) { if (!(mask & (1 << c))) continue; emit_flop(pc, 2, dst[c], src[0][0]); } break; case TGSI_OPCODE_SCS: - temp = alloc_temp(pc, NULL); + temp = temp_temp(pc); emit_precossin(pc, temp, src[0][0]); if (mask & (1 << 0)) emit_flop(pc, 5, dst[0], temp); if (mask & (1 << 1)) emit_flop(pc, 4, dst[1], temp); + if (mask & (1 << 2)) + emit_mov_immdval(pc, dst[2], 0.0); + if (mask & (1 << 3)) + emit_mov_immdval(pc, dst[3], 1.0); break; case TGSI_OPCODE_SGE: for (c = 0; c < 4; c++) { @@ -1196,7 +1550,7 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok) } break; case TGSI_OPCODE_SIN: - temp = alloc_temp(pc, NULL); + temp = temp_temp(pc); emit_precossin(pc, temp, src[0][0]); emit_flop(pc, 4, temp, temp); for (c = 0; c < 4; c++) { @@ -1220,33 +1574,15 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok) } break; case TGSI_OPCODE_TEX: + emit_tex(pc, dst, mask, src[0], unit, + inst->InstructionExtTexture.Texture, FALSE); + break; case TGSI_OPCODE_TXP: - { - struct nv50_reg *t[4]; - struct nv50_program_exec *e; - - alloc_temp4(pc, t, 0); - emit_mov(pc, t[0], src[0][0]); - emit_mov(pc, t[1], src[0][1]); - - e = exec(pc); - e->inst[0] = 0xf6400000; - e->inst[0] |= (unit << 9); - set_long(pc, e); - e->inst[1] |= 0x0000c004; - set_dst(pc, t[0], e); - emit(pc, e); - - if (mask & (1 << 0)) emit_mov(pc, dst[0], t[0]); - if (mask & (1 << 1)) emit_mov(pc, dst[1], t[1]); - if (mask & (1 << 2)) emit_mov(pc, dst[2], t[2]); - if (mask & (1 << 3)) emit_mov(pc, dst[3], t[3]); - - free_temp4(pc, t); - } + emit_tex(pc, dst, mask, src[0], unit, + inst->InstructionExtTexture.Texture, TRUE); break; case TGSI_OPCODE_XPD: - temp = alloc_temp(pc, NULL); + temp = temp_temp(pc); if (mask & (1 << 0)) { emit_mul(pc, temp, src[0][2], src[1][1]); emit_msb(pc, dst[0], src[0][1], src[1][2], temp); @@ -1259,7 +1595,8 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok) emit_mul(pc, temp, src[0][1], src[1][0]); emit_msb(pc, dst[2], src[0][0], src[1][1], temp); } - free_temp(pc, temp); + if (mask & (1 << 3)) + emit_mov_immdval(pc, dst[3], 1.0); break; case TGSI_OPCODE_END: break; @@ -1270,21 +1607,26 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok) if (sat) { for (c = 0; c < 4; c++) { - struct nv50_program_exec *e; - if (!(mask & (1 << c))) continue; - e = exec(pc); + emit_cvt(pc, rdst[c], dst[c], -1, CVTOP_SAT, + CVT_F32_F32); + } + } else if (assimilate) { + for (c = 0; c < 4; c++) + if (rdst[c]) + assimilate_temp(pc, rdst[c], dst[c]); + } - e->inst[0] = 0xa0000000; /* cvt */ - set_long(pc, e); - e->inst[1] |= (6 << 29); /* cvt */ - e->inst[1] |= 0x04000000; /* 32 bit */ - e->inst[1] |= (1 << 14); /* src .f32 */ - e->inst[1] |= ((1 << 5) << 14); /* .sat */ - set_dst(pc, rdst[c], e); - set_src_0(pc, dst[c], e); - emit(pc, e); + for (i = 0; i < inst->Instruction.NumSrcRegs; i++) { + for (c = 0; c < 4; c++) { + if (!src[i][c]) + continue; + if (src[i][c]->index == -1 && src[i][c]->type == P_IMMD) + FREE(src[i][c]); + else + if (src[i][c]->acc == pc->insn_cur) + release_hw(pc, src[i][c]); } } @@ -1292,12 +1634,169 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok) return TRUE; } +/* Adjust a bitmask that indicates what components of a source are used, + * we use this in tx_prep so we only load interpolants that are needed. + */ +static void +insn_adjust_mask(const struct tgsi_full_instruction *insn, unsigned *mask) +{ + const struct tgsi_instruction_ext_texture *tex; + + switch (insn->Instruction.Opcode) { + case TGSI_OPCODE_DP3: + *mask = 0x7; + break; + case TGSI_OPCODE_DP4: + case TGSI_OPCODE_DPH: + *mask = 0xF; + break; + case TGSI_OPCODE_LIT: + *mask = 0xB; + break; + case TGSI_OPCODE_RCP: + case TGSI_OPCODE_RSQ: + *mask = 0x1; + break; + case TGSI_OPCODE_TEX: + case TGSI_OPCODE_TXP: + assert(insn->Instruction.Extended); + tex = &insn->InstructionExtTexture; + + *mask = 0x7; + if (tex->Texture == TGSI_TEXTURE_1D) + *mask = 0x1; + else + if (tex->Texture == TGSI_TEXTURE_2D) + *mask = 0x3; + + if (insn->Instruction.Opcode == TGSI_OPCODE_TXP) + *mask |= 0x8; + break; + default: + break; + } +} + +static void +prep_inspect_insn(struct nv50_pc *pc, const union tgsi_full_token *tok, + unsigned *r_usage[2]) +{ + const struct tgsi_full_instruction *insn; + const struct tgsi_full_src_register *src; + const struct tgsi_dst_register *dst; + + unsigned i, c, k, n, mask, *acc_p; + + insn = &tok->FullInstruction; + dst = &insn->FullDstRegisters[0].DstRegister; + mask = dst->WriteMask; + + if (!r_usage[0]) + r_usage[0] = CALLOC(pc->temp_nr * 4, sizeof(unsigned)); + if (!r_usage[1]) + r_usage[1] = CALLOC(pc->attr_nr * 4, sizeof(unsigned)); + + if (dst->File == TGSI_FILE_TEMPORARY) { + for (c = 0; c < 4; c++) { + if (!(mask & (1 << c))) + continue; + r_usage[0][dst->Index * 4 + c] = pc->insn_nr; + } + } + + for (i = 0; i < insn->Instruction.NumSrcRegs; i++) { + src = &insn->FullSrcRegisters[i]; + + switch (src->SrcRegister.File) { + case TGSI_FILE_TEMPORARY: + acc_p = r_usage[0]; + break; + case TGSI_FILE_INPUT: + acc_p = r_usage[1]; + break; + default: + continue; + } + + insn_adjust_mask(insn, &mask); + + for (c = 0; c < 4; c++) { + if (!(mask & (1 << c))) + continue; + + k = tgsi_util_get_full_src_register_extswizzle(src, c); + switch (k) { + case TGSI_EXTSWIZZLE_X: + case TGSI_EXTSWIZZLE_Y: + case TGSI_EXTSWIZZLE_Z: + case TGSI_EXTSWIZZLE_W: + n = src->SrcRegister.Index * 4 + k; + acc_p[n] = pc->insn_nr; + break; + default: + break; + } + } + } +} + +static unsigned +load_fp_attrib(struct nv50_pc *pc, int i, unsigned *acc, int *mid, + int *aid, int *p_oid) +{ + struct nv50_reg *iv; + int oid, c, n; + unsigned mask = 0; + + iv = (pc->interp_mode[i] & INTERP_CENTROID) ? pc->iv_c : pc->iv_p; + + for (c = 0, n = i * 4; c < 4; c++, n++) { + oid = (*p_oid)++; + pc->attr[n].type = P_TEMP; + pc->attr[n].index = i; + + if (pc->attr[n].acc == acc[n]) + continue; + mask |= (1 << c); + + pc->attr[n].acc = acc[n]; + pc->attr[n].rhw = pc->attr[n].hw = -1; + alloc_reg(pc, &pc->attr[n]); + + pc->attr[n].rhw = (*aid)++; + emit_interp(pc, &pc->attr[n], iv, pc->interp_mode[i]); + + pc->p->cfg.fp.map[(*mid) / 4] |= oid << (8 * ((*mid) % 4)); + (*mid)++; + pc->p->cfg.fp.regs[1] += 0x00010001; + } + + return mask; +} + static boolean nv50_program_tx_prep(struct nv50_pc *pc) { struct tgsi_parse_context p; boolean ret = FALSE; unsigned i, c; + unsigned fcol, bcol, fcrd, depr; + + /* count (centroid) perspective interpolations */ + unsigned centroid_loads = 0; + unsigned perspect_loads = 0; + + /* track register access for temps and attrs */ + unsigned *r_usage[2]; + r_usage[0] = NULL; + r_usage[1] = NULL; + + depr = fcol = bcol = fcrd = 0xffff; + + if (pc->p->type == PIPE_SHADER_FRAGMENT) { + pc->p->cfg.fp.regs[0] = 0x01000404; + pc->p->cfg.fp.regs[1] = 0x00000400; + } tgsi_parse_init(&p, pc->p->pipe.tokens); while (!tgsi_parse_end_of_tokens(&p)) { @@ -1319,9 +1818,10 @@ nv50_program_tx_prep(struct nv50_pc *pc) case TGSI_TOKEN_TYPE_DECLARATION: { const struct tgsi_full_declaration *d; - unsigned last; + unsigned last, first, mode; d = &p.FullToken.FullDeclaration; + first = d->DeclarationRange.First; last = d->DeclarationRange.Last; switch (d->Declaration.File) { @@ -1332,10 +1832,69 @@ nv50_program_tx_prep(struct nv50_pc *pc) case TGSI_FILE_OUTPUT: if (pc->result_nr < (last + 1)) pc->result_nr = last + 1; + + if (!d->Declaration.Semantic) + break; + + switch (d->Semantic.SemanticName) { + case TGSI_SEMANTIC_POSITION: + depr = first; + pc->p->cfg.fp.regs[2] |= 0x00000100; + pc->p->cfg.fp.regs[3] |= 0x00000011; + break; + default: + break; + } + break; case TGSI_FILE_INPUT: + { if (pc->attr_nr < (last + 1)) pc->attr_nr = last + 1; + + if (pc->p->type != PIPE_SHADER_FRAGMENT) + break; + + switch (d->Declaration.Interpolate) { + case TGSI_INTERPOLATE_CONSTANT: + mode = INTERP_FLAT; + break; + case TGSI_INTERPOLATE_PERSPECTIVE: + mode = INTERP_PERSPECTIVE; + break; + default: + mode = INTERP_LINEAR; + break; + } + + if (d->Declaration.Semantic) { + switch (d->Semantic.SemanticName) { + case TGSI_SEMANTIC_POSITION: + fcrd = first; + break; + case TGSI_SEMANTIC_COLOR: + fcol = first; + mode = INTERP_PERSPECTIVE; + break; + case TGSI_SEMANTIC_BCOLOR: + bcol = first; + mode = INTERP_PERSPECTIVE; + break; + } + } + + if (d->Declaration.Centroid) { + mode |= INTERP_CENTROID; + if (mode & INTERP_PERSPECTIVE) + centroid_loads++; + } else + if (mode & INTERP_PERSPECTIVE) + perspect_loads++; + + assert(last < 32); + for (i = first; i <= last; i++) + pc->interp_mode[i] = mode; + } break; case TGSI_FILE_CONSTANT: if (pc->param_nr < (last + 1)) @@ -1351,6 +1910,8 @@ nv50_program_tx_prep(struct nv50_pc *pc) } break; case TGSI_TOKEN_TYPE_INSTRUCTION: + pc->insn_nr++; + prep_inspect_insn(pc, tok, r_usage); break; default: break; @@ -1366,56 +1927,95 @@ nv50_program_tx_prep(struct nv50_pc *pc) for (c = 0; c < 4; c++) { pc->temp[i*4+c].type = P_TEMP; pc->temp[i*4+c].hw = -1; + pc->temp[i*4+c].rhw = -1; pc->temp[i*4+c].index = i; + pc->temp[i*4+c].acc = r_usage[0][i*4+c]; } } } if (pc->attr_nr) { - struct nv50_reg *iv = NULL; - int aid = 0; + int oid = 4, mid = 4, aid = 0; + /* oid = VP output id + * aid = FP attribute/interpolant id + * mid = VP output mapping field ID + */ pc->attr = CALLOC(pc->attr_nr * 4, sizeof(struct nv50_reg)); if (!pc->attr) goto out_err; if (pc->p->type == PIPE_SHADER_FRAGMENT) { - iv = alloc_temp(pc, NULL); - emit_interp(pc, iv, iv, NULL); - emit_flop(pc, 0, iv, iv); - aid++; - } + /* position should be loaded first */ + if (fcrd != 0xffff) { + unsigned mask; + mid = 0; + mask = load_fp_attrib(pc, fcrd, r_usage[1], + &mid, &aid, &oid); + oid = 0; + pc->p->cfg.fp.regs[1] |= (mask << 24); + pc->p->cfg.fp.map[0] = 0x04040404 * fcrd; + } + pc->p->cfg.fp.map[0] += 0x03020100; - for (i = 0; i < pc->attr_nr; i++) { - struct nv50_reg *a = &pc->attr[i*4]; + /* should do MAD fcrd.xy, fcrd, SOME_CONST, fcrd */ - for (c = 0; c < 4; c++) { - if (pc->p->type == PIPE_SHADER_FRAGMENT) { - struct nv50_reg *at = - alloc_temp(pc, NULL); - pc->attr[i*4+c].type = at->type; - pc->attr[i*4+c].hw = at->hw; - pc->attr[i*4+c].index = at->index; + if (perspect_loads) { + pc->iv_p = alloc_temp(pc, NULL); + + if (!(pc->p->cfg.fp.regs[1] & 0x08000000)) { + pc->p->cfg.fp.regs[1] |= 0x08000000; + pc->iv_p->rhw = aid++; + emit_interp(pc, pc->iv_p, NULL, + INTERP_LINEAR); + emit_flop(pc, 0, pc->iv_p, pc->iv_p); } else { - pc->p->cfg.vp.attr[aid/32] |= - (1 << (aid % 32)); - pc->attr[i*4+c].type = P_ATTR; - pc->attr[i*4+c].hw = aid++; - pc->attr[i*4+c].index = i; + pc->iv_p->rhw = aid - 1; + emit_flop(pc, 0, pc->iv_p, + &pc->attr[fcrd * 4 + 3]); } } - if (pc->p->type != PIPE_SHADER_FRAGMENT) - continue; + if (centroid_loads) { + pc->iv_c = alloc_temp(pc, NULL); + pc->iv_c->rhw = pc->iv_p ? aid - 1 : aid++; + emit_interp(pc, pc->iv_c, NULL, + INTERP_CENTROID); + emit_flop(pc, 0, pc->iv_c, pc->iv_c); + pc->p->cfg.fp.regs[1] |= 0x08000000; + } - emit_interp(pc, &a[0], &a[0], iv); - emit_interp(pc, &a[1], &a[1], iv); - emit_interp(pc, &a[2], &a[2], iv); - emit_interp(pc, &a[3], &a[3], iv); - } + for (c = 0; c < 4; c++) { + /* I don't know what these values do, but + * let's set them like the blob does: + */ + if (fcol != 0xffff && r_usage[1][fcol * 4 + c]) + pc->p->cfg.fp.regs[0] += 0x00010000; + if (bcol != 0xffff && r_usage[1][bcol * 4 + c]) + pc->p->cfg.fp.regs[0] += 0x00010000; + } + + for (i = 0; i < pc->attr_nr; i++) + load_fp_attrib(pc, i, r_usage[1], + &mid, &aid, &oid); - if (iv) - free_temp(pc, iv); + if (pc->iv_p) + free_temp(pc, pc->iv_p); + if (pc->iv_c) + free_temp(pc, pc->iv_c); + + pc->p->cfg.fp.high_map = (mid / 4); + pc->p->cfg.fp.high_map += ((mid % 4) ? 1 : 0); + } else { + /* vertex program */ + for (i = 0; i < pc->attr_nr * 4; i++) { + pc->p->cfg.vp.attr[aid / 32] |= + (1 << (aid % 32)); + pc->attr[i].type = P_ATTR; + pc->attr[i].hw = aid++; + pc->attr[i].index = i / 4; + } + } } if (pc->result_nr) { @@ -1430,12 +2030,20 @@ nv50_program_tx_prep(struct nv50_pc *pc) if (pc->p->type == PIPE_SHADER_FRAGMENT) { pc->result[i*4+c].type = P_TEMP; pc->result[i*4+c].hw = -1; + pc->result[i*4+c].rhw = (i == depr) ? + -1 : rid++; } else { pc->result[i*4+c].type = P_RESULT; pc->result[i*4+c].hw = rid++; } pc->result[i*4+c].index = i; } + + if (pc->p->type == PIPE_SHADER_FRAGMENT && + depr != 0xffff) { + pc->result[depr * 4 + 2].rhw = + (pc->result_nr - 1) * 4; + } } } @@ -1456,7 +2064,7 @@ nv50_program_tx_prep(struct nv50_pc *pc) } if (pc->immd_nr) { - int rid = pc->param_nr * 4; + int rid = 0; pc->immd = CALLOC(pc->immd_nr * 4, sizeof(struct nv50_reg)); if (!pc->immd) @@ -1473,15 +2081,38 @@ nv50_program_tx_prep(struct nv50_pc *pc) ret = TRUE; out_err: + if (r_usage[0]) + FREE(r_usage[0]); + if (r_usage[1]) + FREE(r_usage[1]); + tgsi_parse_free(&p); return ret; } +static void +free_nv50_pc(struct nv50_pc *pc) +{ + if (pc->immd) + FREE(pc->immd); + if (pc->param) + FREE(pc->param); + if (pc->result) + FREE(pc->result); + if (pc->attr) + FREE(pc->attr); + if (pc->temp) + FREE(pc->temp); + + FREE(pc); +} + static boolean nv50_program_tx(struct nv50_program *p) { struct tgsi_parse_context parse; struct nv50_pc *pc; + unsigned k; boolean ret; pc = CALLOC_STRUCT(nv50_pc); @@ -1498,10 +2129,16 @@ nv50_program_tx(struct nv50_program *p) while (!tgsi_parse_end_of_tokens(&parse)) { const union tgsi_full_token *tok = &parse.FullToken; + /* don't allow half insn/immd on first and last instruction */ + pc->allow32 = TRUE; + if (pc->insn_cur == 0 || pc->insn_cur + 2 == pc->insn_nr) + pc->allow32 = FALSE; + tgsi_parse_token(&parse); switch (tok->Token.Type) { case TGSI_TOKEN_TYPE_INSTRUCTION: + ++pc->insn_cur; ret = nv50_program_tx_insn(pc, tok); if (ret == FALSE) goto out_err; @@ -1515,8 +2152,40 @@ nv50_program_tx(struct nv50_program *p) struct nv50_reg out; out.type = P_TEMP; - for (out.hw = 0; out.hw < pc->result_nr * 4; out.hw++) - emit_mov(pc, &out, &pc->result[out.hw]); + for (k = 0; k < pc->result_nr * 4; k++) { + if (pc->result[k].rhw == -1) + continue; + if (pc->result[k].hw != pc->result[k].rhw) { + out.hw = pc->result[k].rhw; + emit_mov(pc, &out, &pc->result[k]); + } + if (pc->p->cfg.high_result < (pc->result[k].rhw + 1)) + pc->p->cfg.high_result = pc->result[k].rhw + 1; + } + } + + /* look for single half instructions and make them long */ + struct nv50_program_exec *e, *e_prev; + + for (k = 0, e = pc->p->exec_head, e_prev = NULL; e; e = e->next) { + if (!is_long(e)) + k++; + + if (!e->next || is_long(e->next)) { + if (k & 1) + convert_to_long(pc, e); + k = 0; + } + + if (e->next) + e_prev = e; + } + + if (!is_long(pc->p->exec_tail)) { + /* this may occur if moving FP results */ + assert(e_prev && !is_long(e_prev)); + convert_to_long(pc, e_prev); + convert_to_long(pc, pc->p->exec_tail); } assert(is_long(pc->p->exec_tail) && !is_immd(pc->p->exec_head)); @@ -1530,6 +2199,7 @@ out_err: tgsi_parse_free(&parse); out_cleanup: + free_nv50_pc(pc); return ret; } @@ -1543,7 +2213,7 @@ nv50_program_validate(struct nv50_context *nv50, struct nv50_program *p) static void nv50_program_upload_data(struct nv50_context *nv50, float *map, - unsigned start, unsigned count) + unsigned start, unsigned count, unsigned cbuf) { struct nouveau_channel *chan = nv50->screen->nvws->channel; struct nouveau_grobj *tesla = nv50->screen->tesla; @@ -1552,7 +2222,7 @@ nv50_program_upload_data(struct nv50_context *nv50, float *map, unsigned nr = count > 2047 ? 2047 : count; BEGIN_RING(chan, tesla, 0x00000f00, 1); - OUT_RING (chan, (NV50_CB_PMISC << 0) | (start << 8)); + OUT_RING (chan, (cbuf << 0) | (start << 8)); BEGIN_RING(chan, tesla, 0x40000f04, nr); OUT_RINGp (chan, map, nr); @@ -1567,35 +2237,50 @@ nv50_program_validate_data(struct nv50_context *nv50, struct nv50_program *p) { struct nouveau_winsys *nvws = nv50->screen->nvws; struct pipe_winsys *ws = nv50->pipe.winsys; - unsigned nr = p->param_nr + p->immd_nr; - if (!p->data && nr) { - struct nouveau_resource *heap = nv50->screen->vp_data_heap; + if (!p->data[0] && p->immd_nr) { + struct nouveau_resource *heap = nv50->screen->immd_heap[0]; - if (nvws->res_alloc(heap, nr, p, &p->data)) { - while (heap->next && heap->size < nr) { + if (nvws->res_alloc(heap, p->immd_nr, p, &p->data[0])) { + while (heap->next && heap->size < p->immd_nr) { struct nv50_program *evict = heap->next->priv; - nvws->res_free(&evict->data); + nvws->res_free(&evict->data[0]); } - if (nvws->res_alloc(heap, nr, p, &p->data)) + if (nvws->res_alloc(heap, p->immd_nr, p, &p->data[0])) + assert(0); + } + + /* immediates only need to be uploaded again when freed */ + nv50_program_upload_data(nv50, p->immd, p->data[0]->start, + p->immd_nr, NV50_CB_PMISC); + } + + if (!p->data[1] && p->param_nr) { + struct nouveau_resource *heap = + nv50->screen->parm_heap[p->type]; + + if (nvws->res_alloc(heap, p->param_nr, p, &p->data[1])) { + while (heap->next && heap->size < p->param_nr) { + struct nv50_program *evict = heap->next->priv; + nvws->res_free(&evict->data[1]); + } + + if (nvws->res_alloc(heap, p->param_nr, p, &p->data[1])) assert(0); } } if (p->param_nr) { + unsigned cbuf = NV50_CB_PVP; float *map = ws->buffer_map(ws, nv50->constbuf[p->type], PIPE_BUFFER_USAGE_CPU_READ); - nv50_program_upload_data(nv50, map, p->data->start, - p->param_nr); + if (p->type == PIPE_SHADER_FRAGMENT) + cbuf = NV50_CB_PFP; + nv50_program_upload_data(nv50, map, p->data[1]->start, + p->param_nr, cbuf); ws->buffer_unmap(ws, nv50->constbuf[p->type]); } - - if (p->immd_nr) { - nv50_program_upload_data(nv50, p->immd, - p->data->start + p->param_nr, - p->immd_nr); - } } static void @@ -1615,20 +2300,27 @@ nv50_program_validate_code(struct nv50_context *nv50, struct nv50_program *p) upload = TRUE; } - if (p->data && p->data->start != p->data_start) { + if ((p->data[0] && p->data[0]->start != p->data_start[0]) || + (p->data[1] && p->data[1]->start != p->data_start[1])) { for (e = p->exec_head; e; e = e->next) { - unsigned ei, ci; + unsigned ei, ci, bs; if (e->param.index < 0) continue; + bs = (e->inst[1] >> 22) & 0x07; + assert(bs < 2); ei = e->param.shift >> 5; - ci = e->param.index + p->data->start; + ci = e->param.index + p->data[bs]->start; e->inst[ei] &= ~e->param.mask; e->inst[ei] |= (ci << e->param.shift); } - p->data_start = p->data->start; + if (p->data[0]) + p->data_start[0] = p->data[0]->start; + if (p->data[1]) + p->data_start[1] = p->data[1]->start; + upload = TRUE; } @@ -1637,13 +2329,11 @@ nv50_program_validate_code(struct nv50_context *nv50, struct nv50_program *p) #ifdef NV50_PROGRAM_DUMP NOUVEAU_ERR("-------\n"); - up = ptr = MALLOC(p->exec_size * 4); for (e = p->exec_head; e; e = e->next) { NOUVEAU_ERR("0x%08x\n", e->inst[0]); if (is_long(e)) NOUVEAU_ERR("0x%08x\n", e->inst[1]); } - #endif up = ptr = MALLOC(p->exec_size * 4); @@ -1728,6 +2418,7 @@ nv50_fragprog_validate(struct nv50_context *nv50) struct nouveau_grobj *tesla = nv50->screen->tesla; struct nv50_program *p = nv50->fragprog; struct nouveau_stateobj *so; + unsigned i; if (!p->translated) { nv50_program_validate(nv50, p); @@ -1745,17 +2436,22 @@ nv50_fragprog_validate(struct nv50_context *nv50) so_reloc (so, p->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0); so_method(so, tesla, 0x1904, 4); - so_data (so, 0x00040404); /* p: 0x01000404 */ + so_data (so, p->cfg.fp.regs[0]); /* 0x01000404 / 0x00040404 */ so_data (so, 0x00000004); so_data (so, 0x00000000); so_data (so, 0x00000000); - so_method(so, tesla, 0x16bc, 3); /*XXX: fixme */ - so_data (so, 0x03020100); - so_data (so, 0x07060504); - so_data (so, 0x0b0a0908); + so_method(so, tesla, 0x16bc, p->cfg.fp.high_map); + for (i = 0; i < p->cfg.fp.high_map; i++) + so_data(so, p->cfg.fp.map[i]); so_method(so, tesla, 0x1988, 2); - so_data (so, 0x08080408); //0x08040404); /* p: 0x0f000401 */ + so_data (so, p->cfg.fp.regs[1]); /* 0x08040404 / 0x0f000401 */ so_data (so, p->cfg.high_temp); + so_method(so, tesla, 0x1298, 1); + so_data (so, p->cfg.high_result); + so_method(so, tesla, 0x19a8, 1); + so_data (so, p->cfg.fp.regs[2]); + so_method(so, tesla, 0x196c, 1); + so_data (so, p->cfg.fp.regs[3]); so_method(so, tesla, 0x1414, 1); so_data (so, 0); /* program start offset */ so_ref(so, &nv50->state.fragprog); @@ -1779,7 +2475,8 @@ nv50_program_destroy(struct nv50_context *nv50, struct nv50_program *p) if (p->buffer) pipe_buffer_reference(&p->buffer, NULL); - nv50->screen->nvws->res_free(&p->data); + nv50->screen->nvws->res_free(&p->data[0]); + nv50->screen->nvws->res_free(&p->data[1]); p->translated = 0; } diff --git a/src/gallium/drivers/nv50/nv50_program.h b/src/gallium/drivers/nv50/nv50_program.h index 78deed6a38..c650ecfc81 100644 --- a/src/gallium/drivers/nv50/nv50_program.h +++ b/src/gallium/drivers/nv50/nv50_program.h @@ -24,8 +24,8 @@ struct nv50_program { struct nv50_program_exec *exec_head; struct nv50_program_exec *exec_tail; unsigned exec_size; - struct nouveau_resource *data; - unsigned data_start; + struct nouveau_resource *data[2]; + unsigned data_start[2]; struct pipe_buffer *buffer; @@ -39,6 +39,11 @@ struct nv50_program { struct { unsigned attr[2]; } vp; + struct { + unsigned regs[4]; + unsigned map[5]; + unsigned high_map; + } fp; } cfg; }; diff --git a/src/gallium/drivers/nv50/nv50_screen.c b/src/gallium/drivers/nv50/nv50_screen.c index 2980564594..a7981a3615 100644 --- a/src/gallium/drivers/nv50/nv50_screen.c +++ b/src/gallium/drivers/nv50/nv50_screen.c @@ -290,20 +290,62 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws) so_method(so, screen->tesla, 0x16b8, 1); so_data (so, 8); - /* Shared constant buffer */ - screen->constbuf = screen->pipe.buffer_create(&screen->pipe, 0, 0, 128 * 4 * 4); - if (nvws->res_init(&screen->vp_data_heap, 0, 128)) { - NOUVEAU_ERR("Error initialising constant buffer\n"); + /* constant buffers for immediates and VP/FP parameters */ + screen->constbuf_misc[0] = + screen->pipe.buffer_create(&screen->pipe, 0, 0, 128 * 4 * 4); + + screen->constbuf_parm[0] = + screen->pipe.buffer_create(&screen->pipe, 0, 0, 128 * 4 * 4); + + screen->constbuf_parm[1] = + screen->pipe.buffer_create(&screen->pipe, 0, 0, 128 * 4 * 4); + + if (nvws->res_init(&screen->immd_heap[0], 0, 128) || + nvws->res_init(&screen->parm_heap[0], 0, 128) || + nvws->res_init(&screen->parm_heap[1], 0, 128)) + { + NOUVEAU_ERR("Error initialising constant buffers.\n"); nv50_screen_destroy(&screen->pipe); return NULL; } + /* + // map constant buffers: + // B = buffer ID (maybe more than 1 byte) + // N = CB index used in shader instruction + // P = program type (0 = VP, 2 = GP, 3 = FP) + so_method(so, screen->tesla, 0x1694, 1); + so_data (so, 0x000BBNP1); + */ + + so_method(so, screen->tesla, 0x1280, 3); + so_reloc (so, screen->constbuf_misc[0], 0, NOUVEAU_BO_VRAM | + NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0); + so_reloc (so, screen->constbuf_misc[0], 0, NOUVEAU_BO_VRAM | + NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0); + so_data (so, (NV50_CB_PMISC << 16) | 0x00000800); + so_method(so, screen->tesla, 0x1694, 1); + so_data (so, 0x00000001 | (NV50_CB_PMISC << 12)); + so_method(so, screen->tesla, 0x1694, 1); + so_data (so, 0x00000031 | (NV50_CB_PMISC << 12)); + + so_method(so, screen->tesla, 0x1280, 3); + so_reloc (so, screen->constbuf_parm[0], 0, NOUVEAU_BO_VRAM | + NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0); + so_reloc (so, screen->constbuf_parm[0], 0, NOUVEAU_BO_VRAM | + NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0); + so_data (so, (NV50_CB_PVP << 16) | 0x00000800); + so_method(so, screen->tesla, 0x1694, 1); + so_data (so, 0x00000101 | (NV50_CB_PVP << 12)); + so_method(so, screen->tesla, 0x1280, 3); - so_reloc (so, screen->constbuf, 0, NOUVEAU_BO_VRAM | + so_reloc (so, screen->constbuf_parm[1], 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0); - so_reloc (so, screen->constbuf, 0, NOUVEAU_BO_VRAM | + so_reloc (so, screen->constbuf_parm[1], 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0); - so_data (so, (NV50_CB_PMISC << 16) | 0x00001000); + so_data (so, (NV50_CB_PFP << 16) | 0x00000800); + so_method(so, screen->tesla, 0x1694, 1); + so_data (so, 0x00000131 | (NV50_CB_PFP << 12)); /* Texture sampler/image unit setup - we abuse the constant buffer * upload mechanism for the moment to upload data to the tex config diff --git a/src/gallium/drivers/nv50/nv50_screen.h b/src/gallium/drivers/nv50/nv50_screen.h index db567aaac8..31b8ef29c9 100644 --- a/src/gallium/drivers/nv50/nv50_screen.h +++ b/src/gallium/drivers/nv50/nv50_screen.h @@ -15,8 +15,11 @@ struct nv50_screen { struct nouveau_grobj *m2mf; struct nouveau_notifier *sync; - struct pipe_buffer *constbuf; - struct nouveau_resource *vp_data_heap; + struct pipe_buffer *constbuf_misc[1]; + struct pipe_buffer *constbuf_parm[2]; + + struct nouveau_resource *immd_heap[1]; + struct nouveau_resource *parm_heap[2]; struct pipe_buffer *tic; struct pipe_buffer *tsc; diff --git a/src/gallium/drivers/nv50/nv50_state.c b/src/gallium/drivers/nv50/nv50_state.c index ba852194cd..9d41ef55b0 100644 --- a/src/gallium/drivers/nv50/nv50_state.c +++ b/src/gallium/drivers/nv50/nv50_state.c @@ -137,8 +137,9 @@ nv50_sampler_state_create(struct pipe_context *pipe, const struct pipe_sampler_state *cso) { unsigned *tsc = CALLOC(8, sizeof(unsigned)); + float limit; - tsc[0] = (0x00024000 | + tsc[0] = (0x00026000 | (wrap_mode(cso->wrap_s) << 0) | (wrap_mode(cso->wrap_t) << 3) | (wrap_mode(cso->wrap_r) << 6)); @@ -202,6 +203,12 @@ nv50_sampler_state_create(struct pipe_context *pipe, tsc[0] |= (nvgl_comparison_op(cso->compare_func) & 0x7); } + limit = CLAMP(cso->lod_bias, -16.0, 15.0); + tsc[1] |= ((int)(limit * 256.0) & 0x1fff) << 11; + + tsc[2] |= ((int)CLAMP(cso->max_lod, 0.0, 15.0) << 20) | + ((int)CLAMP(cso->min_lod, 0.0, 15.0) << 8); + return (void *)tsc; } diff --git a/src/gallium/drivers/nv50/nv50_surface.c b/src/gallium/drivers/nv50/nv50_surface.c index 0cc5168144..c0f0efe158 100644 --- a/src/gallium/drivers/nv50/nv50_surface.c +++ b/src/gallium/drivers/nv50/nv50_surface.c @@ -57,7 +57,7 @@ nv50_surface_set(struct nv50_screen *screen, struct pipe_surface *ps, int dst) struct nouveau_bo *bo; int format, mthd = dst ? NV50_2D_DST_FORMAT : NV50_2D_SRC_FORMAT; int flags = NOUVEAU_BO_VRAM | (dst ? NOUVEAU_BO_WR : NOUVEAU_BO_RD); - + bo = screen->nvws->get_bo(nv50_miptree(ps->texture)->buffer); if (!bo) return 1; diff --git a/src/gallium/drivers/nv50/nv50_tex.c b/src/gallium/drivers/nv50/nv50_tex.c index 223c8a3a45..775e9f30ef 100644 --- a/src/gallium/drivers/nv50/nv50_tex.c +++ b/src/gallium/drivers/nv50/nv50_tex.c @@ -122,10 +122,10 @@ nv50_tex_construct(struct nouveau_stateobj *so, struct nv50_miptree *mt) so_data (so, 0xd0005000); so_data (so, 0x00300000); so_data (so, mt->base.width[0]); - so_data (so, (mt->base.depth[0] << 16) | mt->base.height[0]); + so_data (so, (mt->base.last_level << 28) | + (mt->base.depth[0] << 16) | mt->base.height[0]); so_data (so, 0x03000000); - so_reloc(so, mt->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_HIGH | - NOUVEAU_BO_RD, 0, 0); + so_data (so, mt->base.last_level << 4); return 0; } diff --git a/src/gallium/drivers/nv50/nv50_transfer.c b/src/gallium/drivers/nv50/nv50_transfer.c index 747195b4f6..28e7edd144 100644 --- a/src/gallium/drivers/nv50/nv50_transfer.c +++ b/src/gallium/drivers/nv50/nv50_transfer.c @@ -7,7 +7,7 @@ struct nv50_transfer { struct pipe_transfer base; struct pipe_buffer *buffer; - struct nv50_miptree_level *level; + unsigned level_offset; int level_pitch; int level_width; int level_height; @@ -17,8 +17,9 @@ struct nv50_transfer { static void nv50_transfer_rect_m2mf(struct pipe_screen *pscreen, struct pipe_buffer *src, - int src_pitch, int sx, int sy, int sw, int sh, - struct pipe_buffer *dst, int dst_pitch, int dx, int dy, + unsigned src_offset, int src_pitch, int sx, int sy, + int sw, int sh, struct pipe_buffer *dst, + unsigned dst_offset, int dst_pitch, int dx, int dy, int dw, int dh, int cpp, int width, int height, unsigned src_reloc, unsigned dst_reloc) { @@ -28,7 +29,6 @@ nv50_transfer_rect_m2mf(struct pipe_screen *pscreen, struct pipe_buffer *src, struct nouveau_grobj *m2mf = screen->m2mf; struct nouveau_bo *src_bo = nvws->get_bo(src); struct nouveau_bo *dst_bo = nvws->get_bo(dst); - unsigned src_offset = 0, dst_offset = 0; src_reloc |= NOUVEAU_BO_RD; dst_reloc |= NOUVEAU_BO_WR; @@ -40,7 +40,7 @@ nv50_transfer_rect_m2mf(struct pipe_screen *pscreen, struct pipe_buffer *src, OUT_RING (chan, 1); BEGIN_RING(chan, m2mf, 0x0314, 1); OUT_RING (chan, src_pitch); - src_offset = (sy * src_pitch) + (sx * cpp); + src_offset += (sy * src_pitch) + (sx * cpp); } else { BEGIN_RING(chan, m2mf, 0x0200, 6); OUT_RING (chan, 0); @@ -56,7 +56,7 @@ nv50_transfer_rect_m2mf(struct pipe_screen *pscreen, struct pipe_buffer *src, OUT_RING (chan, 1); BEGIN_RING(chan, m2mf, 0x0318, 1); OUT_RING (chan, dst_pitch); - dst_offset = (dy * dst_pitch) + (dx * cpp); + dst_offset += (dy * dst_pitch) + (dx * cpp); } else { BEGIN_RING(chan, m2mf, 0x021c, 6); OUT_RING (chan, 0); @@ -133,10 +133,10 @@ nv50_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt, tx->base.stride = (w * pt->block.size); tx->base.usage = usage; - tx->level = lvl; tx->level_pitch = lvl->pitch; tx->level_width = mt->base.width[level]; tx->level_height = mt->base.height[level]; + tx->level_offset = lvl->image_offset[image]; tx->level_x = x; tx->level_y = y; tx->buffer = @@ -144,9 +144,10 @@ nv50_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt, w * tx->base.block.size * h); if (usage != PIPE_TRANSFER_WRITE) { - nv50_transfer_rect_m2mf(pscreen, mt->buffer, tx->level_pitch, - x, y, tx->level_width, tx->level_height, - tx->buffer, tx->base.stride, 0, 0, + nv50_transfer_rect_m2mf(pscreen, mt->buffer, tx->level_offset, + tx->level_pitch, x, y, tx->level_width, + tx->level_height, tx->buffer, 0, + tx->base.stride, 0, 0, tx->base.width, tx->base.height, tx->base.block.size, w, h, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART, @@ -164,14 +165,15 @@ nv50_transfer_del(struct pipe_transfer *ptx) if (ptx->usage != PIPE_TRANSFER_READ) { struct pipe_screen *pscreen = ptx->texture->screen; - nv50_transfer_rect_m2mf(pscreen, tx->buffer, tx->base.stride, + nv50_transfer_rect_m2mf(pscreen, tx->buffer, 0, tx->base.stride, 0, 0, tx->base.width, tx->base.height, - mt->buffer, tx->level_pitch, - tx->level_x, tx->level_y, - tx->level_width, tx->level_height, - tx->base.block.size, tx->base.width, - tx->base.height, NOUVEAU_BO_GART, - NOUVEAU_BO_VRAM | NOUVEAU_BO_GART); + mt->buffer, tx->level_offset, + tx->level_pitch, tx->level_x, + tx->level_y, tx->level_width, + tx->level_height, tx->base.block.size, + tx->base.width, tx->base.height, + NOUVEAU_BO_GART, NOUVEAU_BO_VRAM | + NOUVEAU_BO_GART); } pipe_buffer_reference(&tx->buffer, NULL); diff --git a/src/gallium/drivers/r300/r300_chipset.c b/src/gallium/drivers/r300/r300_chipset.c index 9d95ad918c..00fae8d26f 100644 --- a/src/gallium/drivers/r300/r300_chipset.c +++ b/src/gallium/drivers/r300/r300_chipset.c @@ -34,7 +34,6 @@ void r300_parse_chipset(struct r300_capabilities* caps) caps->is_r500 = FALSE; caps->num_vert_fpus = 4; - /* Note: These are not ordered by PCI ID. I leave that task to GCC, * which will perform the ordering while collating jump tables. Instead, * I've tried to group them according to capabilities and age. */ @@ -150,6 +149,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) caps->num_vert_fpus = 6; break; + case 0x4B48: case 0x4B49: case 0x4B4A: case 0x4B4B: @@ -349,7 +349,4 @@ void r300_parse_chipset(struct r300_capabilities* caps) caps->pci_id); break; } - - /* XXX SW TCL is broken so no forcing it off right now - caps->has_tcl = FALSE; */ } diff --git a/src/gallium/drivers/r300/r300_chipset.h b/src/gallium/drivers/r300/r300_chipset.h index 21eebeae60..5b2e1f0568 100644 --- a/src/gallium/drivers/r300/r300_chipset.h +++ b/src/gallium/drivers/r300/r300_chipset.h @@ -34,8 +34,6 @@ struct r300_capabilities { int family; /* The number of vertex floating-point units */ int num_vert_fpus; - /* The number of fragment pipes */ - int num_frag_pipes; /* Whether or not TCL is physically present */ boolean has_tcl; /* Whether or not this is an RV515 or newer; R500s have many differences diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 6bdf544a05..21c0fe2b80 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -34,10 +34,6 @@ static boolean r300_draw_range_elements(struct pipe_context* pipe, struct r300_context* r300 = r300_context(pipe); int i; - if (r300->dirty_state) { - r300_emit_dirty_state(r300); - } - for (i = 0; i < r300->vertex_buffer_count; i++) { void* buf = pipe_buffer_map(pipe->screen, r300->vertex_buffers[i].buffer, @@ -133,7 +129,6 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, if (!r300) return NULL; - /* XXX this could be refactored now? */ r300->winsys = r300_winsys; r300->context.winsys = (struct pipe_winsys*)r300_winsys; @@ -150,8 +145,15 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300->context.is_texture_referenced = r300_is_texture_referenced; r300->context.is_buffer_referenced = r300_is_buffer_referenced; + /* Create a Draw. This is used for vert collation and SW TCL. */ r300->draw = draw_create(); + /* Enable our renderer. */ draw_set_rasterize_stage(r300->draw, r300_draw_stage(r300)); + /* Tell Draw that we can always do non-UCP clipping. */ + draw_set_driver_clipping(r300->draw, TRUE); + /* Force Draw to never do viewport transform, since (again) we can do + * transform in hardware, always. */ + draw_set_viewport_state(r300->draw, &r300_viewport_identity); r300->blend_color_state = CALLOC_STRUCT(r300_blend_color_state); r300->rs_block = CALLOC_STRUCT(r300_rs_block); diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 6f62998b35..a9dd041e08 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -63,6 +63,11 @@ struct r300_rs_state { /* Draw-specific rasterizer state */ struct pipe_rasterizer_state rs; + /* Whether or not to enable the VTE. This is referenced at the very + * last moment during emission of VTE state, to decide whether or not + * the VTE should be used for transformation. */ + boolean enable_vte; + uint32_t vap_control_status; /* R300_VAP_CNTL_STATUS: 0x2140 */ uint32_t point_size; /* R300_GA_POINT_SIZE: 0x421c */ uint32_t point_minmax; /* R300_GA_POINT_MINMAX: 0x4230 */ @@ -136,11 +141,11 @@ struct r300_viewport_state { struct r300_constant_buffer { /* Buffer of constants */ /* XXX first number should be raised */ - float constants[8][4]; + float constants[32][4]; /* Number of user-defined constants */ - int user_count; + unsigned user_count; /* Total number of constants */ - int count; + unsigned count; }; struct r3xx_fragment_shader { @@ -153,6 +158,10 @@ struct r3xx_fragment_shader { /* Pixel stack size */ int stack_size; + + /* Are there immediates in this shader? + * If not, we can heavily optimize recompilation. */ + boolean uses_imms; }; struct r300_fragment_shader { @@ -243,6 +252,10 @@ struct r300_vertex_shader { /* Has this shader been translated yet? */ boolean translated; + /* Are there immediates in this shader? + * If not, we can heavily optimize recompilation. */ + boolean uses_imms; + /* Number of used instructions */ int instruction_count; @@ -255,6 +268,11 @@ struct r300_vertex_shader { } instructions[128]; /*< XXX magic number */ }; +static struct pipe_viewport_state r300_viewport_identity = { + .scale = {1.0, 1.0, 1.0, 1.0}, + .translate = {0.0, 0.0, 0.0, 0.0}, +}; + struct r300_context { /* Parent class */ struct pipe_context context; @@ -264,6 +282,11 @@ struct r300_context { /* Draw module. Used mostly for SW TCL. */ struct draw_context* draw; + /* Vertex buffer for rendering. */ + struct pipe_buffer* vbo; + /* Offset into the VBO. */ + size_t vbo_offset; + /* Various CSO state objects. */ /* Blend state. */ struct r300_blend_state* blend_state; @@ -289,7 +312,7 @@ struct r300_context { /* Texture states. */ struct r300_texture* textures[8]; int texture_count; - /* Vertex buffers. */ + /* Vertex buffers for Gallium. */ struct pipe_vertex_buffer vertex_buffers[PIPE_MAX_ATTRIBS]; int vertex_buffer_count; /* Vertex information. */ diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 82a3942248..2abf04d27e 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -93,8 +93,9 @@ } while (0) #define OUT_CS_RELOC(bo, offset, rd, wd, flags) do { \ - debug_printf("r300: writing relocation for buffer %p, offset %d\n", \ - bo, offset); \ + debug_printf("r300: writing relocation for buffer %p, offset %d, " \ + "domains (%d, %d, %d)\n", \ + bo, offset, rd, wd, flags); \ assert(bo); \ OUT_CS(offset); \ cs_winsys->write_cs_reloc(cs_winsys, bo, rd, wd, flags); \ diff --git a/src/gallium/drivers/r300/r300_debug.c b/src/gallium/drivers/r300/r300_debug.c index dd63136c9d..ffc93eb591 100644 --- a/src/gallium/drivers/r300/r300_debug.c +++ b/src/gallium/drivers/r300/r300_debug.c @@ -30,81 +30,6 @@ static void r300_dump_fs(struct r300_fragment_shader* fs) } } -static char* r500_fs_swiz[] = { - " R", - " G", - " B", - " A", - " 0", - ".5", - " 1", - " U", -}; - -static char* r500_fs_op_rgb[] = { - "MAD", - "DP3", - "DP4", - "D2A", - "MIN", - "MAX", - "---", - "CND", - "CMP", - "FRC", - "SOP", - "MDH", - "MDV", -}; - -static char* r500_fs_op_alpha[] = { - "MAD", - " DP", - "MIN", - "MAX", - "---", - "CND", - "CMP", - "FRC", - "EX2", - "LN2", - "RCP", - "RSQ", - "SIN", - "COS", - "MDH", - "MDV", -}; - -static char* r500_fs_mask[] = { - "NONE", - "R ", - " G ", - "RG ", - " B ", - "R B ", - " GB ", - "RGB ", - " A", - "R A", - " G A", - "RG A", - " BA", - "R BA", - " GBA", - "RGBA", -}; - -static char* r500_fs_tex[] = { - " NOP", - " LD", - "TEXKILL", - " PROJ", - "LODBIAS", - " LOD", - " DXDY", -}; - void r500_fs_dump(struct r500_fragment_shader* fs) { int i; @@ -225,12 +150,27 @@ void r500_fs_dump(struct r500_fragment_shader* fs) } } +static void r300_vs_op_dump(uint32_t op) +{ + if (op & 0x80) { + if (op & 0x1) { + debug_printf("PVS_MACRO_OP_2CLK_M2X_ADD\n"); + } else { + debug_printf(" PVS_MACRO_OP_2CLK_MADD\n"); + } + } else if (op & 0x40) { + debug_printf("%s\n", r300_vs_me_ops[op & 0x1f]); + } else { + debug_printf("%s\n", r300_vs_ve_ops[op & 0x1f]); + } +} + void r300_vs_dump(struct r300_vertex_shader* vs) { int i; for (i = 0; i < vs->instruction_count; i++) { - debug_printf("inst0: 0x%x\n", vs->instructions[i].inst0); + r300_vs_op_dump(vs->instructions[i].inst0); debug_printf("inst1: 0x%x\n", vs->instructions[i].inst1); debug_printf("inst2: 0x%x\n", vs->instructions[i].inst2); debug_printf("inst3: 0x%x\n", vs->instructions[i].inst3); diff --git a/src/gallium/drivers/r300/r300_debug.h b/src/gallium/drivers/r300/r300_debug.h index a1f873656d..6306594099 100644 --- a/src/gallium/drivers/r300/r300_debug.h +++ b/src/gallium/drivers/r300/r300_debug.h @@ -27,6 +27,152 @@ #include "r300_state_shader.h" #include "r300_state_tcl.h" +static char* r500_fs_swiz[] = { + " R", + " G", + " B", + " A", + " 0", + ".5", + " 1", + " U", +}; + +static char* r500_fs_op_rgb[] = { + "MAD", + "DP3", + "DP4", + "D2A", + "MIN", + "MAX", + "---", + "CND", + "CMP", + "FRC", + "SOP", + "MDH", + "MDV", +}; + +static char* r500_fs_op_alpha[] = { + "MAD", + " DP", + "MIN", + "MAX", + "---", + "CND", + "CMP", + "FRC", + "EX2", + "LN2", + "RCP", + "RSQ", + "SIN", + "COS", + "MDH", + "MDV", +}; + +static char* r500_fs_mask[] = { + "NONE", + "R ", + " G ", + "RG ", + " B ", + "R B ", + " GB ", + "RGB ", + " A", + "R A", + " G A", + "RG A", + " BA", + "R BA", + " GBA", + "RGBA", +}; + +static char* r500_fs_tex[] = { + " NOP", + " LD", + "TEXKILL", + " PROJ", + "LODBIAS", + " LOD", + " DXDY", +}; + +static char* r300_vs_ve_ops[] = { + /* R300 vector ops */ + " VE_NO_OP", + " VE_DOT_PRODUCT", + " VE_MULTIPLY", + " VE_ADD", + " VE_MULTIPLY_ADD", + " VE_DISTANCE_FACTOR", + " VE_FRACTION", + " VE_MAXIMUM", + " VE_MINIMUM", + "VE_SET_GREATER_THAN_EQUAL", + " VE_SET_LESS_THAN", + " VE_MULTIPLYX2_ADD", + " VE_MULTIPLY_CLAMP", + " VE_FLT2FIX_DX", + " VE_FLT2FIX_DX_RND", + /* R500 vector ops */ + " VE_PRED_SET_EQ_PUSH", + " VE_PRED_SET_GT_PUSH", + " VE_PRED_SET_GTE_PUSH", + " VE_PRED_SET_NEQ_PUSH", + " VE_COND_WRITE_EQ", + " VE_COND_WRITE_GT", + " VE_COND_WRITE_GTE", + " VE_COND_WRITE_NEQ", + " VE_SET_GREATER_THAN", + " VE_SET_EQUAL", + " VE_SET_NOT_EQUAL", + " (reserved)", + " (reserved)", + " (reserved)", +}; + +static char* r300_vs_me_ops[] = { + /* R300 math ops */ + " ME_NO_OP", + " ME_EXP_BASE2_DX", + " ME_LOG_BASE2_DX", + " ME_EXP_BASEE_FF", + " ME_LIGHT_COEFF_DX", + " ME_POWER_FUNC_FF", + " ME_RECIP_DX", + " ME_RECIP_FF", + " ME_RECIP_SQRT_DX", + " ME_RECIP_SQRT_FF", + " ME_MULTIPLY", + " ME_EXP_BASE2_FULL_DX", + " ME_LOG_BASE2_FULL_DX", + " ME_POWER_FUNC_FF_CLAMP_B", + "ME_POWER_FUNC_FF_CLAMP_B1", + "ME_POWER_FUNC_FF_CLAMP_01", + " ME_SIN", + " ME_COS", + /* R500 math ops */ + " ME_LOG_BASE2_IEEE", + " ME_RECIP_IEEE", + " ME_RECIP_SQRT_IEEE", + " ME_PRED_SET_EQ", + " ME_PRED_SET_GT", + " ME_PRED_SET_GTE", + " ME_PRED_SET_NEQ", + " ME_PRED_SET_CLR", + " ME_PRED_SET_INV", + " ME_PRED_SET_POP", + " ME_PRED_SET_RESTORE", + " (reserved)", + " (reserved)", + " (reserved)", +}; + void r500_fs_dump(struct r500_fragment_shader* fs); void r300_vs_dump(struct r300_vertex_shader* vs); diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 01bac5f759..caeb73a8ed 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -163,6 +163,7 @@ void r300_emit_fb_state(struct r300_context* r300, BEGIN_CS((8 * fb->nr_cbufs) + (fb->zsbuf ? 8 : 0) + 4); for (i = 0; i < fb->nr_cbufs; i++) { tex = (struct r300_texture*)fb->cbufs[i]->texture; + assert(tex && tex->buffer && "cbuf is marked, but NULL!"); pixpitch = tex->stride / tex->tex.block.size; OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1); @@ -177,7 +178,8 @@ void r300_emit_fb_state(struct r300_context* r300, if (fb->zsbuf) { tex = (struct r300_texture*)fb->zsbuf->texture; - pixpitch = (tex->stride / tex->tex.block.size); + assert(tex && tex->buffer && "zsbuf is marked, but NULL!"); + pixpitch = tex->stride / tex->tex.block.size; OUT_CS_REG_SEQ(R300_ZB_DEPTHOFFSET, 1); OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); @@ -234,7 +236,7 @@ void r300_emit_rs_block_state(struct r300_context* r300, } for (i = 0; i < 8; i++) { OUT_CS(rs->ip[i]); - debug_printf("ip %d: 0x%08x\n", i, rs->ip[i]); + /* debug_printf("ip %d: 0x%08x\n", i, rs->ip[i]); */ } OUT_CS_REG_SEQ(R300_RS_COUNT, 2); @@ -248,11 +250,11 @@ void r300_emit_rs_block_state(struct r300_context* r300, } for (i = 0; i < 8; i++) { OUT_CS(rs->inst[i]); - debug_printf("inst %d: 0x%08x\n", i, rs->inst[i]); + /* debug_printf("inst %d: 0x%08x\n", i, rs->inst[i]); */ } - debug_printf("count: 0x%08x inst_count: 0x%08x\n", rs->count, - rs->inst_count); + /* debug_printf("count: 0x%08x inst_count: 0x%08x\n", rs->count, + * rs->inst_count); */ END_CS; } @@ -296,6 +298,30 @@ void r300_emit_texture(struct r300_context* r300, END_CS; } +void r300_emit_vertex_buffer(struct r300_context* r300) +{ + CS_LOCALS(r300); + + debug_printf("r300: Preparing vertex buffer %p for render, " + "vertex size %d\n", r300->vbo, + r300->vertex_info.vinfo.size); + /* Set the pointer to our vertex buffer. The emitted values are this: + * PACKET3 [3D_LOAD_VBPNTR] + * COUNT [1] + * FORMAT [size | stride << 8] + * OFFSET [offset into BO] + * VBPNTR [relocated BO] + */ + BEGIN_CS(7); + OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, 3); + OUT_CS(1); + OUT_CS(r300->vertex_info.vinfo.size | + (r300->vertex_info.vinfo.size << 8)); + OUT_CS(r300->vbo_offset); + OUT_CS_RELOC(r300->vbo, 0, RADEON_GEM_DOMAIN_GTT, 0, 0); + END_CS; +} + void r300_emit_vertex_format_state(struct r300_context* r300) { int i; @@ -310,22 +336,22 @@ void r300_emit_vertex_format_state(struct r300_context* r300) OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2); OUT_CS(r300->vertex_info.vinfo.hwfmt[2]); OUT_CS(r300->vertex_info.vinfo.hwfmt[3]); - for (i = 0; i < 4; i++) { - debug_printf("hwfmt%d: 0x%08x\n", i, - r300->vertex_info.vinfo.hwfmt[i]); - } + /* for (i = 0; i < 4; i++) { + * debug_printf("hwfmt%d: 0x%08x\n", i, + * r300->vertex_info.vinfo.hwfmt[i]); + * } */ OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, 8); for (i = 0; i < 8; i++) { OUT_CS(r300->vertex_info.vap_prog_stream_cntl[i]); - debug_printf("prog_stream_cntl%d: 0x%08x\n", i, - r300->vertex_info.vap_prog_stream_cntl[i]); + /* debug_printf("prog_stream_cntl%d: 0x%08x\n", i, + * r300->vertex_info.vap_prog_stream_cntl[i]); */ } OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0, 8); for (i = 0; i < 8; i++) { OUT_CS(r300->vertex_info.vap_prog_stream_cntl_ext[i]); - debug_printf("prog_stream_cntl_ext%d: 0x%08x\n", i, - r300->vertex_info.vap_prog_stream_cntl_ext[i]); + /* debug_printf("prog_stream_cntl_ext%d: 0x%08x\n", i, + * r300->vertex_info.vap_prog_stream_cntl_ext[i]); */ } END_CS; } @@ -403,7 +429,11 @@ void r300_emit_viewport_state(struct r300_context* r300, OUT_CS_32F(viewport->zscale); OUT_CS_32F(viewport->zoffset); - OUT_CS_REG(R300_VAP_VTE_CNTL, viewport->vte_control); + if (r300->rs_state->enable_vte) { + OUT_CS_REG(R300_VAP_VTE_CNTL, viewport->vte_control); + } else { + OUT_CS_REG(R300_VAP_VTE_CNTL, 0); + } END_CS; } @@ -421,23 +451,66 @@ void r300_flush_textures(struct r300_context* r300) void r300_emit_dirty_state(struct r300_context* r300) { struct r300_screen* r300screen = r300_screen(r300->context.screen); - int i; - int dirty_tex = 0; + struct r300_texture* tex; + int i, dirty_tex = 0; + boolean invalid = FALSE; - if (!(r300->dirty_hw)) { + if (!(r300->dirty_state)) { return; } r300_update_derived_state(r300); /* XXX check size */ - struct r300_texture* fb_tex = - (struct r300_texture*)r300->framebuffer_state.cbufs[0]; - r300->winsys->add_buffer(r300->winsys, fb_tex->buffer, - 0, RADEON_GEM_DOMAIN_VRAM); +validate: + /* Color buffers... */ + for (i = 0; i < r300->framebuffer_state.nr_cbufs; i++) { + tex = (struct r300_texture*)r300->framebuffer_state.cbufs[i]->texture; + assert(tex && tex->buffer && "cbuf is marked, but NULL!"); + if (!r300->winsys->add_buffer(r300->winsys, tex->buffer, + 0, RADEON_GEM_DOMAIN_VRAM)) { + r300->context.flush(&r300->context, 0, NULL); + goto validate; + } + } + /* ...depth buffer... */ + if (r300->framebuffer_state.zsbuf) { + tex = (struct r300_texture*)r300->framebuffer_state.zsbuf->texture; + assert(tex && tex->buffer && "zsbuf is marked, but NULL!"); + if (!r300->winsys->add_buffer(r300->winsys, tex->buffer, + 0, RADEON_GEM_DOMAIN_VRAM)) { + r300->context.flush(&r300->context, 0, NULL); + goto validate; + } + } + /* ...textures... */ + for (i = 0; i < r300->texture_count; i++) { + tex = r300->textures[i]; + assert(tex && tex->buffer && "texture is marked, but NULL!"); + if (!r300->winsys->add_buffer(r300->winsys, tex->buffer, + RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0)) { + r300->context.flush(&r300->context, 0, NULL); + goto validate; + } + } + /* ...and vertex buffer. */ + if (r300->vbo) { + if (!r300->winsys->add_buffer(r300->winsys, r300->vbo, + RADEON_GEM_DOMAIN_GTT, 0)) { + r300->context.flush(&r300->context, 0, NULL); + goto validate; + } + } else { + debug_printf("No VBO while emitting dirty state!\n"); + } if (r300->winsys->validate(r300->winsys)) { - /* XXX */ r300->context.flush(&r300->context, 0, NULL); + if (invalid) { + /* Well, hell. */ + exit(1); + } + invalid = TRUE; + goto validate; } if (r300->dirty_state & R300_NEW_BLEND) { @@ -519,4 +592,9 @@ void r300_emit_dirty_state(struct r300_context* r300) r300_emit_vertex_format_state(r300); r300->dirty_state &= ~R300_NEW_VERTEX_FORMAT; } + + /* Finally, emit the VBO. */ + r300_emit_vertex_buffer(r300); + + r300->dirty_hw++; } diff --git a/src/gallium/drivers/r300/r300_emit.h b/src/gallium/drivers/r300/r300_emit.h index 31dbc7ab85..36e14f69f7 100644 --- a/src/gallium/drivers/r300/r300_emit.h +++ b/src/gallium/drivers/r300/r300_emit.h @@ -62,6 +62,8 @@ void r300_emit_scissor_state(struct r300_context* r300, void r300_emit_texture(struct r300_context* r300, struct r300_texture* tex, unsigned offset); +void r300_emit_vertex_buffer(struct r300_context* r300); + void r300_emit_vertex_format_state(struct r300_context* r300); void r300_emit_vertex_shader(struct r300_context* r300, diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index 660816e1da..920584a59e 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -3040,6 +3040,7 @@ enum { # define R500_INST_RGB_WMASK_R (1 << 11) # define R500_INST_RGB_WMASK_G (1 << 12) # define R500_INST_RGB_WMASK_B (1 << 13) +# define R500_INST_RGB_WMASK_RGB (7 << 11) # define R500_INST_ALPHA_WMASK (1 << 14) # define R500_INST_RGB_OMASK_R (1 << 15) # define R500_INST_RGB_OMASK_G (1 << 16) diff --git a/src/gallium/drivers/r300/r300_render.c b/src/gallium/drivers/r300/r300_render.c index cbd84d7c56..29b66cee7e 100644 --- a/src/gallium/drivers/r300/r300_render.c +++ b/src/gallium/drivers/r300/r300_render.c @@ -180,27 +180,10 @@ static void prepare_render(struct r300_render* render, unsigned count) CS_LOCALS(r300); - /* Make sure that all possible state is emitted. */ - r300_emit_dirty_state(r300); + r300->vbo = render->vbo; + r300->vbo_offset = render->vbo_offset; - debug_printf("r300: Preparing vertex buffer %p for render, " - "vertex size %d, vertex count %d\n", render->vbo, - r300->vertex_info.vinfo.size, count); - /* Set the pointer to our vertex buffer. The emitted values are this: - * PACKET3 [3D_LOAD_VBPNTR] - * COUNT [1] - * FORMAT [size | stride << 8] - * OFFSET [0] - * VBPNTR [relocated BO] - */ - BEGIN_CS(7); - OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, 3); - OUT_CS(1); - OUT_CS(r300->vertex_info.vinfo.size | - (r300->vertex_info.vinfo.size << 8)); - OUT_CS(render->vbo_offset); - OUT_CS_RELOC(render->vbo, 0, RADEON_GEM_DOMAIN_GTT, 0, 0); - END_CS; + r300_emit_dirty_state(r300); } static void r300_render_draw_arrays(struct vbuf_render* render, diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index d2c5998c26..a6f1efe356 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -87,23 +87,25 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) } else { return 0; } - return 0; case PIPE_CAP_GLSL: - /* IN THEORY */ - return 0; + if (r300screen->caps->is_r500) { + return 1; + } else { + return 0; + } case PIPE_CAP_S3TC: /* IN THEORY */ return 0; case PIPE_CAP_ANISOTROPIC_FILTER: - /* IN THEORY */ - return 0; + return 1; case PIPE_CAP_POINT_SPRITE: /* IN THEORY */ return 0; case PIPE_CAP_MAX_RENDER_TARGETS: return 4; case PIPE_CAP_OCCLUSION_QUERY: - return 1; + /* IN THEORY */ + return 0; case PIPE_CAP_TEXTURE_SHADOW_MAP: /* IN THEORY */ return 0; @@ -152,17 +154,20 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) static float r300_get_paramf(struct pipe_screen* pscreen, int param) { + struct r300_screen* r300screen = r300_screen(pscreen); + switch (param) { case PIPE_CAP_MAX_LINE_WIDTH: case PIPE_CAP_MAX_LINE_WIDTH_AA: - /* XXX this is the biggest thing that will fit in that register. - * Perhaps the actual rendering limits are less? */ - return 10922.0f; case PIPE_CAP_MAX_POINT_WIDTH: case PIPE_CAP_MAX_POINT_WIDTH_AA: - /* XXX this is the biggest thing that will fit in that register. - * Perhaps the actual rendering limits are less? */ - return 10922.0f; + /* The maximum dimensions of the colorbuffer are our practical + * rendering limits. 2048 pixels should be enough for anybody. */ + if (r300screen->caps->is_r500) { + return 4096.0f; + } else { + return 2048.0f; + } case PIPE_CAP_MAX_TEXTURE_ANISOTROPY: return 16.0f; case PIPE_CAP_MAX_TEXTURE_LOD_BIAS: @@ -230,9 +235,16 @@ static boolean r300_is_format_supported(struct pipe_screen* pscreen, case PIPE_TEXTURE_2D: return check_tex_2d_format(format, r300_screen(pscreen)->caps->is_r500); + case PIPE_TEXTURE_1D: + case PIPE_TEXTURE_3D: + case PIPE_TEXTURE_CUBE: + debug_printf("r300: Implementation error: Unsupported format " + "target: %d\n", target); + break; default: - debug_printf("r300: Warning: Got unknown format target: %d\n", - format); + debug_printf("r300: Fatal: This is not a format target: %d\n", + target); + assert(0); break; } @@ -337,7 +349,6 @@ struct pipe_screen* r300_create_screen(struct r300_winsys* r300_winsys) return NULL; caps->pci_id = r300_winsys->pci_id; - caps->num_frag_pipes = r300_winsys->gb_pipes; r300_parse_chipset(caps); diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 184a23c9e6..0461ffd681 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -62,8 +62,6 @@ static void* r300_create_blend_state(struct pipe_context* pipe, } /* PIPE_LOGICOP_* don't need to be translated, fortunately. */ - /* XXX are logicops still allowed if blending's disabled? - * Does Gallium take care of it for us? */ if (state->logicop_enable) { blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE | (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT; @@ -121,7 +119,7 @@ static void r300_set_clip_state(struct pipe_context* pipe, const struct pipe_clip_state* state) { struct r300_context* r300 = r300_context(pipe); - /* XXX Draw */ + /* XXX add HW TCL clipping setup */ draw_flush(r300->draw); draw_set_clip_state(r300->draw, state); } @@ -153,10 +151,12 @@ static void /* If the number of constants have changed, invalidate the shader. */ if (r300->shader_constants[shader].user_count != i) { - if (shader == PIPE_SHADER_FRAGMENT && r300->fs) { + if (shader == PIPE_SHADER_FRAGMENT && r300->fs && + r300->fs->uses_imms) { r300->fs->translated = FALSE; r300_translate_fragment_shader(r300, r300->fs); - } else if (shader == PIPE_SHADER_VERTEX && r300->vs) { + } else if (shader == PIPE_SHADER_VERTEX && r300->vs && + r300->vs->uses_imms) { r300->vs->translated = FALSE; r300_translate_vertex_shader(r300, r300->vs); } @@ -257,6 +257,7 @@ static void r300_set_edgeflags(struct pipe_context* pipe, const unsigned* bitfield) { /* XXX you know it's bad when i915 has this blank too */ + /* XXX and even worse, I have no idea WTF the bitfield is */ } static void @@ -289,6 +290,7 @@ static void* r300_create_fs_state(struct pipe_context* pipe, /* Copy state directly into shader. */ fs->state = *shader; + fs->state.tokens = tgsi_dup_tokens(shader->tokens); tgsi_scan_shader(shader->tokens, &fs->info); @@ -317,13 +319,15 @@ static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) /* Delete fragment shader state. */ static void r300_delete_fs_state(struct pipe_context* pipe, void* shader) { + struct r3xx_fragment_shader* fs = (struct r3xx_fragment_shader*)shader; + FREE(fs->state.tokens); FREE(shader); } static void r300_set_polygon_stipple(struct pipe_context* pipe, const struct pipe_poly_stipple* state) { - /* XXX */ + /* XXX no idea how to set this up, but not terribly important */ } /* Create a new rasterizer state based on the CSO rasterizer state. @@ -341,6 +345,8 @@ static void* r300_create_rs_state(struct pipe_context* pipe, /* Copy rasterizer state for Draw. */ rs->rs = *state; + rs->enable_vte = !state->bypass_vs_clip_and_viewport; + /* If bypassing TCL, or if no TCL engine is present, turn off the HW TCL. * Else, enable HW TCL and force Draw's TCL off. */ if (state->bypass_vs_clip_and_viewport || @@ -555,40 +561,35 @@ static void r300_set_viewport_state(struct pipe_context* pipe, { struct r300_context* r300 = r300_context(pipe); - draw_flush(r300->draw); - - if (r300_screen(r300->context.screen)->caps->has_tcl) { - /* Do the transform in HW. */ - r300->viewport_state->vte_control = R300_VTX_W0_FMT; + /* Do the transform in HW. */ + r300->viewport_state->vte_control = R300_VTX_W0_FMT; - if (state->scale[0] != 1.0f) { - r300->viewport_state->xscale = state->scale[0]; - r300->viewport_state->vte_control |= R300_VPORT_X_SCALE_ENA; - } - if (state->scale[1] != 1.0f) { - r300->viewport_state->yscale = state->scale[1]; - r300->viewport_state->vte_control |= R300_VPORT_Y_SCALE_ENA; - } - if (state->scale[2] != 1.0f) { - r300->viewport_state->zscale = state->scale[2]; - r300->viewport_state->vte_control |= R300_VPORT_Z_SCALE_ENA; - } - if (state->translate[0] != 0.0f) { - r300->viewport_state->xoffset = state->translate[0]; - r300->viewport_state->vte_control |= R300_VPORT_X_OFFSET_ENA; - } - if (state->translate[1] != 0.0f) { - r300->viewport_state->yoffset = state->translate[1]; - r300->viewport_state->vte_control |= R300_VPORT_Y_OFFSET_ENA; - } - if (state->translate[2] != 0.0f) { - r300->viewport_state->zoffset = state->translate[2]; - r300->viewport_state->vte_control |= R300_VPORT_Z_OFFSET_ENA; - } - } else { - r300->viewport_state->vte_control = 0; - /* Have Draw do the actual transform. */ - draw_set_viewport_state(r300->draw, state); + if (state->scale[0] != 1.0f) { + assert(state->scale[0] != 0.0f); + r300->viewport_state->xscale = state->scale[0]; + r300->viewport_state->vte_control |= R300_VPORT_X_SCALE_ENA; + } + if (state->scale[1] != 1.0f) { + assert(state->scale[1] != 0.0f); + r300->viewport_state->yscale = state->scale[1]; + r300->viewport_state->vte_control |= R300_VPORT_Y_SCALE_ENA; + } + if (state->scale[2] != 1.0f) { + assert(state->scale[2] != 0.0f); + r300->viewport_state->zscale = state->scale[2]; + r300->viewport_state->vte_control |= R300_VPORT_Z_SCALE_ENA; + } + if (state->translate[0] != 0.0f) { + r300->viewport_state->xoffset = state->translate[0]; + r300->viewport_state->vte_control |= R300_VPORT_X_OFFSET_ENA; + } + if (state->translate[1] != 0.0f) { + r300->viewport_state->yoffset = state->translate[1]; + r300->viewport_state->vte_control |= R300_VPORT_Y_OFFSET_ENA; + } + if (state->translate[2] != 0.0f) { + r300->viewport_state->zoffset = state->translate[2]; + r300->viewport_state->vte_control |= R300_VPORT_Z_OFFSET_ENA; } r300->dirty_state |= R300_NEW_VIEWPORT; @@ -628,6 +629,7 @@ static void* r300_create_vs_state(struct pipe_context* pipe, struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader); /* Copy state directly into shader. */ vs->state = *shader; + vs->state.tokens = tgsi_dup_tokens(shader->tokens); tgsi_scan_shader(shader->tokens, &vs->info); @@ -673,6 +675,7 @@ static void r300_delete_vs_state(struct pipe_context* pipe, void* shader) struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; draw_delete_vertex_shader(r300->draw, vs->draw); + FREE(vs->state.tokens); FREE(shader); } else { draw_delete_vertex_shader(r300->draw, diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index c4c9784a00..7ae339cf97 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -64,6 +64,7 @@ static void r300_vs_tab_routes(struct r300_context* r300, break; case TGSI_SEMANTIC_FOG: fog = TRUE; + /* Fall through */ case TGSI_SEMANTIC_GENERIC: texs++; break; @@ -103,6 +104,9 @@ static void r300_vs_tab_routes(struct r300_context* r300, } } + /* XXX magic */ + assert(texs <= 8); + /* Do the actual vertex_info setup. * * vertex_info has four uints of hardware-specific data in it. @@ -140,17 +144,21 @@ static void r300_vs_tab_routes(struct r300_context* r300, vinfo->hwfmt[2] |= (R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << i); } - for (i = 0; i < texs; i++) { + /* Init i right here, increment it if fog is enabled. + * This gets around a double-increment problem. */ + i = 0; + + if (fog) { + i++; draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_PERSPECTIVE, - draw_find_vs_output(r300->draw, TGSI_SEMANTIC_GENERIC, i)); + draw_find_vs_output(r300->draw, TGSI_SEMANTIC_FOG, 0)); vinfo->hwfmt[1] |= (R300_INPUT_CNTL_TC0 << i); vinfo->hwfmt[3] |= (4 << (3 * i)); } - if (fog) { - i++; + for (i; i < texs; i++) { draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_PERSPECTIVE, - draw_find_vs_output(r300->draw, TGSI_SEMANTIC_FOG, 0)); + draw_find_vs_output(r300->draw, TGSI_SEMANTIC_GENERIC, i)); vinfo->hwfmt[1] |= (R300_INPUT_CNTL_TC0 << i); vinfo->hwfmt[3] |= (4 << (3 * i)); } @@ -162,26 +170,40 @@ static void r300_vs_tab_routes(struct r300_context* r300, static void r300_vertex_psc(struct r300_context* r300, struct r300_vertex_format* vformat) { + struct r300_screen* r300screen = r300_screen(r300->context.screen); struct vertex_info* vinfo = &vformat->vinfo; int* tab = vformat->vs_tab; uint32_t temp; - int i; + int i, attrib_count; - debug_printf("r300: attrib count: %d\n", vinfo->num_attribs); - for (i = 0; i < vinfo->num_attribs; i++) { - debug_printf("r300: attrib: offset %d, interp %d, size %d," - " tab %d\n", vinfo->attrib[i].src_index, - vinfo->attrib[i].interp_mode, vinfo->attrib[i].emit, - tab[i]); + /* Vertex shaders have no semantics on their inputs, + * so PSC should just route stuff based on their info, + * and not on attrib information. */ + if (r300screen->caps->has_tcl) { + attrib_count = r300->vs->info.num_inputs; + debug_printf("r300: routing %d attribs in psc for vs\n", + attrib_count); + } else { + attrib_count = vinfo->num_attribs; + debug_printf("r300: attrib count: %d\n", attrib_count); + for (i = 0; i < attrib_count; i++) { + debug_printf("r300: attrib: offset %d, interp %d, size %d," + " tab %d\n", vinfo->attrib[i].src_index, + vinfo->attrib[i].interp_mode, vinfo->attrib[i].emit, + tab[i]); + } } - for (i = 0; i < vinfo->num_attribs; i++) { + for (i = 0; i < attrib_count; i++) { /* Make sure we have a proper destination for our attribute */ assert(tab[i] != -1); /* Add the attribute to the PSC table. */ - temp = translate_vertex_data_type(vinfo->attrib[i].emit) | - (tab[i] << R300_DST_VEC_LOC_SHIFT); + temp = r300screen->caps->has_tcl ? + R300_DATA_TYPE_FLOAT_4 : + translate_vertex_data_type(vinfo->attrib[i].emit); + temp |= tab[i] << R300_DST_VEC_LOC_SHIFT; + if (i & 1) { vformat->vap_prog_stream_cntl[i >> 1] &= 0x0000ffff; vformat->vap_prog_stream_cntl[i >> 1] |= temp << 16; @@ -206,7 +228,6 @@ static void r300_vertex_psc(struct r300_context* r300, /* Update the vertex format. */ static void r300_update_vertex_format(struct r300_context* r300) { - struct r300_screen* r300screen = r300_screen(r300->context.screen); struct r300_vertex_format vformat; int i; diff --git a/src/gallium/drivers/r300/r300_state_inlines.h b/src/gallium/drivers/r300/r300_state_inlines.h index 91b93fc367..22c8e199ae 100644 --- a/src/gallium/drivers/r300/r300_state_inlines.h +++ b/src/gallium/drivers/r300/r300_state_inlines.h @@ -353,25 +353,6 @@ static INLINE uint32_t r300_translate_out_fmt(enum pipe_format format) /* Non-CSO state. (For now.) */ -static INLINE uint32_t r300_translate_gb_pipes(int pipe_count) -{ - switch (pipe_count) { - case 1: - return R300_GB_TILE_PIPE_COUNT_RV300; - break; - case 2: - return R300_GB_TILE_PIPE_COUNT_R300; - break; - case 3: - return R300_GB_TILE_PIPE_COUNT_R420_3P; - break; - case 4: - return R300_GB_TILE_PIPE_COUNT_R420; - break; - } - return 0; -} - static INLINE uint32_t translate_vertex_data_type(int type) { switch (type) { case EMIT_1F: diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c index 8bd9b41bd7..9dde662802 100644 --- a/src/gallium/drivers/r300/r300_state_invariant.c +++ b/src/gallium/drivers/r300/r300_state_invariant.c @@ -34,36 +34,19 @@ void r300_emit_invariant_state(struct r300_context* r300) struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps; CS_LOCALS(r300); - BEGIN_CS(30 + (caps->has_tcl ? 2: 0)); + BEGIN_CS(26 + (caps->has_tcl ? 2: 0)); /*** Graphics Backend (GB) ***/ /* Various GB enables */ OUT_CS_REG(R300_GB_ENABLE, 0x0); /* Subpixel multisampling for AA */ OUT_CS_REG(R300_GB_MSPOS0, 0x66666666); - OUT_CS_REG(R300_GB_MSPOS1, 0x66666666); - /* GB tile config and pipe setup */ - OUT_CS_REG(R300_GB_TILE_CONFIG, R300_GB_TILE_DISABLE | - r300_translate_gb_pipes(caps->num_frag_pipes)); + OUT_CS_REG(R300_GB_MSPOS1, 0x6666666); /* Source of fog depth */ OUT_CS_REG(R300_GB_SELECT, R300_GB_FOG_SELECT_1_1_W); /* AA enable */ OUT_CS_REG(R300_GB_AA_CONFIG, 0x0); - /*** Geometry Assembly (GA) ***/ - /* GA errata fixes. */ - if (caps->is_r500) { - OUT_CS_REG(R300_GA_ENHANCE, - R300_GA_ENHANCE_DEADLOCK_CNTL_PREVENT_TCL | - R300_GA_ENHANCE_FASTSYNC_CNTL_ENABLE | - R500_GA_ENHANCE_REG_READWRITE_ENABLE | - R500_GA_ENHANCE_REG_NOSTALL_ENABLE); - } else { - OUT_CS_REG(R300_GA_ENHANCE, - R300_GA_ENHANCE_DEADLOCK_CNTL_PREVENT_TCL | - R300_GA_ENHANCE_FASTSYNC_CNTL_ENABLE); - } - /*** Fog (FG) ***/ OUT_CS_REG(R300_FG_FOG_BLEND, 0x0); OUT_CS_REG(R300_FG_FOG_COLOR_R, 0x0); @@ -86,7 +69,7 @@ void r300_emit_invariant_state(struct r300_context* r300) END_CS; /* XXX unsorted stuff from surface_fill */ - BEGIN_CS(79 + (caps->has_tcl ? 7 : 0)); + BEGIN_CS(77 + (caps->has_tcl ? 7 : 0)); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); @@ -113,11 +96,14 @@ void r300_emit_invariant_state(struct r300_context* r300) OUT_CS_32F(0.0); OUT_CS_REG_SEQ(R300_GA_POINT_S1, 1); OUT_CS_32F(1.0); + /* XXX line tex stuffing */ + OUT_CS_REG_SEQ(R300_GA_LINE_S0, 1); + OUT_CS_32F(0.0); + OUT_CS_REG_SEQ(R300_GA_LINE_S1, 1); + OUT_CS_32F(1.0); OUT_CS_REG(R300_GA_TRIANGLE_STIPPLE, 0x5 | (0x5 << R300_GA_TRIANGLE_STIPPLE_Y_SHIFT_SHIFT)); /* XXX this big chunk should be refactored into rs_state */ - OUT_CS_REG(R300_GA_LINE_S0, 0x00000000); - OUT_CS_REG(R300_GA_LINE_S1, 0x3F800000); OUT_CS_REG(R300_GA_SOLID_RG, 0x00000000); OUT_CS_REG(R300_GA_SOLID_BA, 0x00000000); OUT_CS_REG(R300_GA_POLY_MODE, 0x00000000); @@ -144,8 +130,6 @@ void r300_emit_invariant_state(struct r300_context* r300) OUT_CS_REG(R300_VAP_VTX_STATE_CNTL, 0x1); OUT_CS_REG(R300_VAP_VSM_VTX_ASSM, 0x405); OUT_CS_REG(R300_SE_VTE_CNTL, 0x0000043F); - /* Vertex size. */ - OUT_CS_REG(R300_VAP_VTX_SIZE, 0x8); /* XXX */ OUT_CS_REG(R300_SC_CLIP_RULE, 0xaaaa); diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index 1b02239ee7..cc7f6a7c4b 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -22,24 +22,6 @@ #include "r300_state_shader.h" -static void r300_copy_passthrough_shader(struct r300_fragment_shader* fs) -{ - struct r300_fragment_shader* pt = &r300_passthrough_fragment_shader; - fs->shader.stack_size = pt->shader.stack_size; - fs->alu_instruction_count = pt->alu_instruction_count; - fs->tex_instruction_count = pt->tex_instruction_count; - fs->indirections = pt->indirections; - fs->instructions[0] = pt->instructions[0]; -} - -static void r500_copy_passthrough_shader(struct r500_fragment_shader* fs) -{ - struct r500_fragment_shader* pt = &r500_passthrough_fragment_shader; - fs->shader.stack_size = pt->shader.stack_size; - fs->instruction_count = pt->instruction_count; - fs->instructions[0] = pt->instructions[0]; -} - static void r300_fs_declare(struct r300_fs_asm* assembler, struct tgsi_full_declaration* decl) { @@ -49,6 +31,7 @@ static void r300_fs_declare(struct r300_fs_asm* assembler, case TGSI_SEMANTIC_COLOR: assembler->color_count++; break; + case TGSI_SEMANTIC_FOG: case TGSI_SEMANTIC_GENERIC: assembler->tex_count++; break; @@ -59,6 +42,12 @@ static void r300_fs_declare(struct r300_fs_asm* assembler, } break; case TGSI_FILE_OUTPUT: + /* Depth write. Mark the position of the output so we can + * identify it later. */ + if (decl->Semantic.SemanticName == TGSI_SEMANTIC_POSITION) { + assembler->depth_output = decl->DeclarationRange.First; + } + break; case TGSI_FILE_CONSTANT: break; case TGSI_FILE_TEMPORARY: @@ -120,6 +109,14 @@ static INLINE unsigned r300_fs_dst(struct r300_fs_asm* assembler, return 0; } +static INLINE boolean r300_fs_is_depr(struct r300_fs_asm* assembler, + struct tgsi_dst_register* dst) +{ + return (assembler->writes_depth && + (dst->File == TGSI_FILE_OUTPUT) && + (dst->Index == assembler->depth_output)); +} + static INLINE unsigned r500_fix_swiz(unsigned s) { /* For historical reasons, the swizzle values x, y, z, w, and 0 are @@ -194,11 +191,17 @@ static INLINE uint32_t r300_alpha_op(unsigned op) static INLINE uint32_t r500_rgba_op(unsigned op) { switch (op) { + case TGSI_OPCODE_COS: case TGSI_OPCODE_EX2: case TGSI_OPCODE_LG2: case TGSI_OPCODE_RCP: case TGSI_OPCODE_RSQ: + case TGSI_OPCODE_SIN: return R500_ALU_RGBA_OP_SOP; + case TGSI_OPCODE_DDX: + return R500_ALU_RGBA_OP_MDH; + case TGSI_OPCODE_DDY: + return R500_ALU_RGBA_OP_MDV; case TGSI_OPCODE_FRC: return R500_ALU_RGBA_OP_FRC; case TGSI_OPCODE_DP3: @@ -224,6 +227,8 @@ static INLINE uint32_t r500_rgba_op(unsigned op) static INLINE uint32_t r500_alpha_op(unsigned op) { switch (op) { + case TGSI_OPCODE_COS: + return R500_ALPHA_OP_COS; case TGSI_OPCODE_EX2: return R500_ALPHA_OP_EX2; case TGSI_OPCODE_LG2: @@ -234,6 +239,12 @@ static INLINE uint32_t r500_alpha_op(unsigned op) return R500_ALPHA_OP_RSQ; case TGSI_OPCODE_FRC: return R500_ALPHA_OP_FRC; + case TGSI_OPCODE_SIN: + return R500_ALPHA_OP_SIN; + case TGSI_OPCODE_DDX: + return R500_ALPHA_OP_MDH; + case TGSI_OPCODE_DDY: + return R500_ALPHA_OP_MDV; case TGSI_OPCODE_DP3: case TGSI_OPCODE_DP4: case TGSI_OPCODE_DPH: @@ -295,38 +306,34 @@ static INLINE void r300_emit_maths(struct r300_fragment_shader* fs, } /* Setup an ALU operation. */ -static INLINE void r500_emit_alu(struct r500_fragment_shader* fs, - struct r300_fs_asm* assembler, - struct tgsi_full_dst_register* dst) +static INLINE void r500_emit_maths(struct r500_fragment_shader* fs, + struct r300_fs_asm* assembler, + struct tgsi_full_src_register* src, + struct tgsi_full_dst_register* dst, + unsigned op, + unsigned count) { int i = fs->instruction_count; if (dst->DstRegister.File == TGSI_FILE_OUTPUT) { - fs->instructions[i].inst0 = R500_INST_TYPE_OUT | - R500_ALU_OMASK(dst->DstRegister.WriteMask); + fs->instructions[i].inst0 = R500_INST_TYPE_OUT; + if (r300_fs_is_depr(assembler, dst)) { + fs->instructions[i].inst4 = R500_W_OMASK; + } else { + fs->instructions[i].inst0 |= + R500_ALU_OMASK(dst->DstRegister.WriteMask); + } } else { fs->instructions[i].inst0 = R500_INST_TYPE_ALU | - R500_ALU_WMASK(dst->DstRegister.WriteMask); + R500_ALU_WMASK(dst->DstRegister.WriteMask); } fs->instructions[i].inst0 |= R500_INST_TEX_SEM_WAIT; - fs->instructions[i].inst4 = + fs->instructions[i].inst4 |= R500_ALPHA_ADDRD(r300_fs_dst(assembler, &dst->DstRegister)); fs->instructions[i].inst5 = R500_ALU_RGBA_ADDRD(r300_fs_dst(assembler, &dst->DstRegister)); -} - -static INLINE void r500_emit_maths(struct r500_fragment_shader* fs, - struct r300_fs_asm* assembler, - struct tgsi_full_src_register* src, - struct tgsi_full_dst_register* dst, - unsigned op, - unsigned count) -{ - int i = fs->instruction_count; - - r500_emit_alu(fs, assembler, dst); switch (count) { case 3: @@ -348,8 +355,8 @@ static INLINE void r500_emit_maths(struct r500_fragment_shader* fs, R500_ALU_RGB_SEL_B_SRC1 | R500_SWIZ_RGB_B(r500_rgb_swiz(&src[1])); fs->instructions[i].inst4 |= - R500_SWIZ_ALPHA_B(r500_alpha_swiz(&src[1])) | - R500_ALPHA_SEL_B_SRC1; + R500_ALPHA_SEL_B_SRC1 | + R500_SWIZ_ALPHA_B(r500_alpha_swiz(&src[1])); case 1: case 0: default: @@ -361,8 +368,8 @@ static INLINE void r500_emit_maths(struct r500_fragment_shader* fs, R500_ALU_RGB_SEL_A_SRC0 | R500_SWIZ_RGB_A(r500_rgb_swiz(&src[0])); fs->instructions[i].inst4 |= - R500_SWIZ_ALPHA_A(r500_alpha_swiz(&src[0])) | - R500_ALPHA_SEL_A_SRC0; + R500_ALPHA_SEL_A_SRC0 | + R500_SWIZ_ALPHA_A(r500_alpha_swiz(&src[0])); break; } @@ -441,6 +448,9 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, * AMD/ATI names for opcodes, please, as it facilitates using the * documentation. */ switch (inst->Instruction.Opcode) { + /* XXX trig needs extra prep */ + case TGSI_OPCODE_COS: + case TGSI_OPCODE_SIN: /* The simple scalar ops. */ case TGSI_OPCODE_EX2: case TGSI_OPCODE_LG2: @@ -452,6 +462,8 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, inst->FullSrcRegisters[0].SrcRegister.SwizzleW = inst->FullSrcRegisters[0].SrcRegister.SwizzleX; /* Fall through */ + case TGSI_OPCODE_DDX: + case TGSI_OPCODE_DDY: case TGSI_OPCODE_FRC: r500_emit_maths(fs, assembler, inst->FullSrcRegisters, &inst->FullDstRegisters[0], inst->Instruction.Opcode, 1); @@ -527,6 +539,60 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); break; + /* The compound and hybrid insts. */ + case TGSI_OPCODE_LRP: + /* LRP DST A, B, C -> MAD TMP -A, C, C; MAD DST A, B, TMP */ + inst->FullSrcRegisters[3] = inst->FullSrcRegisters[1]; + inst->FullSrcRegisters[1] = inst->FullSrcRegisters[2]; + inst->FullSrcRegisters[0].SrcRegister.Negate = + !(inst->FullSrcRegisters[0].SrcRegister.Negate); + inst->FullDstRegisters[1] = inst->FullDstRegisters[0]; + inst->FullDstRegisters[0].DstRegister.Index = + assembler->temp_count; + inst->FullDstRegisters[0].DstRegister.File = TGSI_FILE_TEMPORARY; + r500_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], TGSI_OPCODE_MAD, 3); + inst->FullSrcRegisters[2].SrcRegister.Index = + assembler->temp_count; + inst->FullSrcRegisters[2].SrcRegister.File = TGSI_FILE_TEMPORARY; + inst->FullSrcRegisters[2].SrcRegister.SwizzleX = TGSI_SWIZZLE_X; + inst->FullSrcRegisters[2].SrcRegister.SwizzleY = TGSI_SWIZZLE_Y; + inst->FullSrcRegisters[2].SrcRegister.SwizzleZ = TGSI_SWIZZLE_Z; + inst->FullSrcRegisters[2].SrcRegister.SwizzleW = TGSI_SWIZZLE_W; + inst->FullSrcRegisters[1] = inst->FullSrcRegisters[3]; + inst->FullSrcRegisters[0].SrcRegister.Negate = + !(inst->FullSrcRegisters[0].SrcRegister.Negate); + inst->FullDstRegisters[0] = inst->FullDstRegisters[1]; + r500_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], TGSI_OPCODE_MAD, 3); + break; + case TGSI_OPCODE_POW: + /* POW DST A, B -> LG2 TMP A; MUL TMP TMP, B; EX2 DST TMP */ + inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleW = + inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleX; + inst->FullSrcRegisters[0].SrcRegister.SwizzleW = + inst->FullSrcRegisters[0].SrcRegister.SwizzleX; + inst->FullDstRegisters[1] = inst->FullDstRegisters[0]; + inst->FullDstRegisters[0].DstRegister.Index = + assembler->temp_count; + inst->FullDstRegisters[0].DstRegister.File = TGSI_FILE_TEMPORARY; + r500_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], TGSI_OPCODE_LG2, 1); + inst->FullSrcRegisters[0].SrcRegister.Index = + assembler->temp_count; + inst->FullSrcRegisters[0].SrcRegister.File = TGSI_FILE_TEMPORARY; + inst->FullSrcRegisters[0].SrcRegister.SwizzleX = TGSI_SWIZZLE_X; + inst->FullSrcRegisters[0].SrcRegister.SwizzleY = TGSI_SWIZZLE_Y; + inst->FullSrcRegisters[0].SrcRegister.SwizzleZ = TGSI_SWIZZLE_Z; + inst->FullSrcRegisters[0].SrcRegister.SwizzleW = TGSI_SWIZZLE_W; + inst->FullSrcRegisters[2] = r500_constant_zero; + r500_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], TGSI_OPCODE_MUL, 3); + inst->FullDstRegisters[0] = inst->FullDstRegisters[1]; + r500_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], TGSI_OPCODE_EX2, 1); + break; + /* The texture instruction set. */ case TGSI_OPCODE_KIL: case TGSI_OPCODE_TEX: @@ -555,7 +621,7 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, static void r300_fs_finalize(struct r3xx_fragment_shader* fs, struct r300_fs_asm* assembler) { - fs->stack_size = assembler->temp_count + assembler->temp_offset; + fs->stack_size = assembler->temp_count + assembler->temp_offset + 1; } static void r500_fs_finalize(struct r500_fragment_shader* fs, @@ -581,6 +647,8 @@ void r300_translate_fragment_shader(struct r300_context* r300, } /* Setup starting offset for immediates. */ assembler->imm_offset = consts->user_count; + /* Enable depth writes, if needed. */ + assembler->writes_depth = fs->info.writes_z; /* Make sure we start at the beginning of the shader. */ if (is_r500) { @@ -630,6 +698,7 @@ void r300_translate_fragment_shader(struct r300_context* r300, assembler->tex_count + assembler->color_count); consts->count = consts->user_count + assembler->imm_count; + fs->uses_imms = assembler->imm_count; debug_printf("r300: fs: %d total constants, " "%d from user and %d from immediates\n", consts->count, consts->user_count, assembler->imm_count); diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h index 185fdd90f0..b6087404ce 100644 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -57,6 +57,7 @@ #define R500_TEX_WMASK(x) ((x) << 11) #define R500_ALU_WMASK(x) ((x) << 11) #define R500_ALU_OMASK(x) ((x) << 15) +#define R500_W_OMASK (1 << 31) /* TGSI constants. TGSI is like XML: If it can't solve your problems, you're * not using enough of it. */ @@ -99,20 +100,17 @@ struct r300_fs_asm { unsigned imm_offset; /* Number of immediate constants. */ unsigned imm_count; + /* Are depth writes enabled? */ + boolean writes_depth; + /* Depth write offset. This is the TGSI output that corresponds to + * depth writes. */ + unsigned depth_output; }; void r300_translate_fragment_shader(struct r300_context* r300, struct r3xx_fragment_shader* fs); static struct r300_fragment_shader r300_passthrough_fragment_shader = { - /* XXX This is the emission code. TODO: decode - OUT_CS_REG(R300_US_CONFIG, 0); - OUT_CS_REG(R300_US_CODE_OFFSET, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_3, 0x400000); -*/ .alu_instruction_count = 1, .tex_instruction_count = 0, .indirections = 0, @@ -159,14 +157,6 @@ static struct r500_fragment_shader r500_passthrough_fragment_shader = { }; static struct r300_fragment_shader r300_texture_fragment_shader = { - /* XXX This is the emission code. TODO: decode - OUT_CS_REG(R300_US_CONFIG, 0); - OUT_CS_REG(R300_US_CODE_OFFSET, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_3, 0x400000); -*/ .alu_instruction_count = 1, .tex_instruction_count = 0, .indirections = 0, @@ -191,7 +181,7 @@ static struct r500_fragment_shader r500_texture_fragment_shader = { .instruction_count = 2, .instructions[0].inst0 = R500_INST_TYPE_TEX | R500_INST_TEX_SEM_WAIT | - R500_INST_RGB_OMASK_RGB | R500_INST_ALPHA_OMASK | + R500_INST_RGB_WMASK_RGB | R500_INST_ALPHA_WMASK | R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP, .instructions[0].inst1 = R500_TEX_ID(0) | R500_TEX_INST_LD | R500_TEX_SEM_ACQUIRE | R500_TEX_IGNORE_UNCOVERED, diff --git a/src/gallium/drivers/r300/r300_state_tcl.c b/src/gallium/drivers/r300/r300_state_tcl.c index d84912de48..32e61bc1d7 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.c +++ b/src/gallium/drivers/r300/r300_state_tcl.c @@ -71,16 +71,13 @@ static INLINE unsigned r300_vs_src_type(struct r300_vs_asm* assembler, { switch (src->File) { case TGSI_FILE_NULL: - /* Probably a zero or one swizzle */ - return R300_PVS_SRC_REG_INPUT; - break; case TGSI_FILE_INPUT: + /* Probably a zero or one swizzle */ return R300_PVS_SRC_REG_INPUT; - break; case TGSI_FILE_TEMPORARY: return R300_PVS_SRC_REG_TEMPORARY; - break; case TGSI_FILE_CONSTANT: + case TGSI_FILE_IMMEDIATE: return R300_PVS_SRC_REG_CONSTANT; default: debug_printf("r300: vs: Unimplemented src type %d\n", src->File); @@ -89,16 +86,32 @@ static INLINE unsigned r300_vs_src_type(struct r300_vs_asm* assembler, return 0; } +static INLINE unsigned r300_vs_src(struct r300_vs_asm* assembler, + struct tgsi_src_register* src) +{ + switch (src->File) { + case TGSI_FILE_NULL: + case TGSI_FILE_INPUT: + case TGSI_FILE_TEMPORARY: + case TGSI_FILE_CONSTANT: + return src->Index; + case TGSI_FILE_IMMEDIATE: + return src->Index + assembler->imm_offset; + default: + debug_printf("r300: vs: Unimplemented src type %d\n", src->File); + break; + } + return 0; +} + static INLINE unsigned r300_vs_dst_type(struct r300_vs_asm* assembler, struct tgsi_dst_register* dst) { switch (dst->File) { case TGSI_FILE_TEMPORARY: return R300_PVS_DST_REG_TEMPORARY; - break; case TGSI_FILE_OUTPUT: return R300_PVS_DST_REG_OUT; - break; default: debug_printf("r300: vs: Unimplemented dst type %d\n", dst->File); break; @@ -112,10 +125,8 @@ static INLINE unsigned r300_vs_dst(struct r300_vs_asm* assembler, switch (dst->File) { case TGSI_FILE_TEMPORARY: return dst->Index; - break; case TGSI_FILE_OUTPUT: return assembler->tab[dst->Index]; - break; default: debug_printf("r300: vs: Unimplemented dst %d\n", dst->File); break; @@ -135,6 +146,12 @@ static uint32_t r300_vs_op(unsigned op) case TGSI_OPCODE_MOV: case TGSI_OPCODE_SWZ: return R300_VE_ADD; + case TGSI_OPCODE_MAX: + return R300_VE_MAXIMUM; + case TGSI_OPCODE_SLT: + return R300_VE_SET_LESS_THAN; + case TGSI_OPCODE_RSQ: + return R300_PVS_DST_MATH_INST | R300_ME_RECIP_DX; case TGSI_OPCODE_MAD: return R300_PVS_DST_MACRO_INST | R300_PVS_MACRO_OP_2CLK_MADD; default: @@ -158,39 +175,62 @@ static uint32_t r300_vs_swiz(struct tgsi_full_src_register* reg) } } +/* XXX icky icky icky icky */ +static uint32_t r300_vs_scalar_swiz(struct tgsi_full_src_register* reg) +{ + if (reg->SrcRegister.Extended) { + return reg->SrcRegisterExtSwz.ExtSwizzleX | + (reg->SrcRegisterExtSwz.ExtSwizzleX << 3) | + (reg->SrcRegisterExtSwz.ExtSwizzleX << 6) | + (reg->SrcRegisterExtSwz.ExtSwizzleX << 9); + } else { + return reg->SrcRegister.SwizzleX | + (reg->SrcRegister.SwizzleX << 3) | + (reg->SrcRegister.SwizzleX << 6) | + (reg->SrcRegister.SwizzleX << 9); + } +} + +/* XXX scalar stupidity */ static void r300_vs_emit_inst(struct r300_vertex_shader* vs, struct r300_vs_asm* assembler, struct tgsi_full_src_register* src, struct tgsi_full_dst_register* dst, unsigned op, - unsigned count) + unsigned count, + boolean is_scalar) { int i = vs->instruction_count; vs->instructions[i].inst0 = R300_PVS_DST_OPCODE(r300_vs_op(op)) | R300_PVS_DST_REG_TYPE(r300_vs_dst_type(assembler, &dst->DstRegister)) | R300_PVS_DST_OFFSET(r300_vs_dst(assembler, &dst->DstRegister)) | - R300_PVS_DST_WE_XYZW; + R300_PVS_DST_WE(dst->DstRegister.WriteMask); switch (count) { case 3: vs->instructions[i].inst3 = R300_PVS_SRC_REG_TYPE(r300_vs_src_type(assembler, &src[2].SrcRegister)) | - R300_PVS_SRC_OFFSET(src[2].SrcRegister.Index) | + R300_PVS_SRC_OFFSET(r300_vs_src(assembler, + &src[2].SrcRegister)) | R300_PVS_SRC_SWIZZLE(r300_vs_swiz(&src[2])); /* Fall through */ case 2: vs->instructions[i].inst2 = R300_PVS_SRC_REG_TYPE(r300_vs_src_type(assembler, &src[1].SrcRegister)) | - R300_PVS_SRC_OFFSET(src[1].SrcRegister.Index) | + R300_PVS_SRC_OFFSET(r300_vs_src(assembler, + &src[1].SrcRegister)) | R300_PVS_SRC_SWIZZLE(r300_vs_swiz(&src[1])); /* Fall through */ case 1: vs->instructions[i].inst1 = R300_PVS_SRC_REG_TYPE(r300_vs_src_type(assembler, &src[0].SrcRegister)) | - R300_PVS_SRC_OFFSET(src[0].SrcRegister.Index) | - R300_PVS_SRC_SWIZZLE(r300_vs_swiz(&src[0])); + R300_PVS_SRC_OFFSET(r300_vs_src(assembler, + &src[0].SrcRegister)) | + /* XXX the icky, it burns */ + R300_PVS_SRC_SWIZZLE(is_scalar ? r300_vs_scalar_swiz(&src[0]) + : r300_vs_swiz(&src[0])); break; } vs->instruction_count++; @@ -201,11 +241,18 @@ static void r300_vs_instruction(struct r300_vertex_shader* vs, struct tgsi_full_instruction* inst) { switch (inst->Instruction.Opcode) { + case TGSI_OPCODE_RSQ: + r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, + 1, TRUE); + break; case TGSI_OPCODE_ADD: case TGSI_OPCODE_MUL: + case TGSI_OPCODE_MAX: + case TGSI_OPCODE_SLT: r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, &inst->FullDstRegisters[0], inst->Instruction.Opcode, - 2); + 2, FALSE); break; case TGSI_OPCODE_DP3: /* Set alpha swizzle to zero for src0 and src1 */ @@ -235,19 +282,19 @@ static void r300_vs_instruction(struct r300_vertex_shader* vs, case TGSI_OPCODE_DP4: r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, &inst->FullDstRegisters[0], inst->Instruction.Opcode, - 2); + 2, FALSE); break; case TGSI_OPCODE_MOV: case TGSI_OPCODE_SWZ: inst->FullSrcRegisters[1] = r300_constant_zero; r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, &inst->FullDstRegisters[0], inst->Instruction.Opcode, - 2); + 2, FALSE); break; case TGSI_OPCODE_MAD: r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, &inst->FullDstRegisters[0], inst->Instruction.Opcode, - 3); + 3, FALSE); break; case TGSI_OPCODE_END: break; @@ -278,6 +325,8 @@ static void r300_vs_init(struct r300_vertex_shader* vs, break; } } + + vs->instruction_count = 0; } void r300_translate_vertex_shader(struct r300_context* r300, @@ -337,6 +386,7 @@ void r300_translate_vertex_shader(struct r300_context* r300, assembler->tex_count + assembler->color_count); consts->count = consts->user_count + assembler->imm_count; + vs->uses_imms = assembler->imm_count; debug_printf("r300: vs: %d total constants, " "%d from user and %d from immediates\n", consts->count, consts->user_count, assembler->imm_count); diff --git a/src/gallium/drivers/r300/r300_state_tcl.h b/src/gallium/drivers/r300/r300_state_tcl.h index e2e1357d43..d5d425e9d6 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.h +++ b/src/gallium/drivers/r300/r300_state_tcl.h @@ -35,6 +35,10 @@ # define R300_VE_DOT_PRODUCT 1 # define R300_VE_MULTIPLY 2 # define R300_VE_ADD 3 +# define R300_VE_MAXIMUM 7 +# define R300_VE_SET_LESS_THAN 10 +#define R300_PVS_DST_MATH_INST (1 << 6) +# define R300_ME_RECIP_DX 6 #define R300_PVS_DST_MACRO_INST (1 << 7) # define R300_PVS_MACRO_OP_2CLK_MADD 0 #define R300_PVS_DST_REG_TYPE(x) ((x) << 8) diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 4dd5b8af99..c9e2dff14e 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -23,30 +23,36 @@ #include "r300_surface.h" -static void r300_surface_setup(struct pipe_context* pipe, - struct pipe_surface* dest, +static void r300_surface_setup(struct r300_context* r300, + struct r300_texture* dest, unsigned x, unsigned y, unsigned w, unsigned h) { - struct r300_context* r300 = r300_context(pipe); - struct r300_capabilities* caps = r300_screen(pipe->screen)->caps; - struct r300_texture* tex = (struct r300_texture*)dest->texture; - unsigned pixpitch = tex->stride / tex->tex.block.size; + struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps; + unsigned pixpitch = dest->stride / dest->tex.block.size; CS_LOCALS(r300); - /* Make sure our target BO is okay. */ - r300->winsys->add_buffer(r300->winsys, tex->buffer, - 0, RADEON_GEM_DOMAIN_VRAM); - if (r300->winsys->validate(r300->winsys)) { - r300->context.flush(&r300->context, 0, NULL); - } - r300_emit_blend_state(r300, &blend_clear_state); r300_emit_blend_color_state(r300, &blend_color_clear_state); r300_emit_dsa_state(r300, &dsa_clear_state); r300_emit_rs_state(r300, &rs_clear_state); - BEGIN_CS(15); + BEGIN_CS(24); + + /* Viewport setup */ + OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6); + OUT_CS_32F((float)w); + OUT_CS_32F((float)x); + OUT_CS_32F((float)h); + OUT_CS_32F((float)y); + OUT_CS_32F(1.0); + OUT_CS_32F(0.0); + + OUT_CS_REG(R300_VAP_VTE_CNTL, R300_VPORT_X_SCALE_ENA | + R300_VPORT_X_OFFSET_ENA | + R300_VPORT_Y_SCALE_ENA | + R300_VPORT_Y_OFFSET_ENA | + R300_VTX_XY_FMT | R300_VTX_Z_FMT); /* Pixel scissors. */ OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2); @@ -71,9 +77,9 @@ static void r300_surface_setup(struct pipe_context* pipe, /* Setup colorbuffer. */ OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); - OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); + OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); OUT_CS_REG(R300_RB3D_COLORPITCH0, pixpitch | - r300_translate_colorformat(tex->tex.format)); + r300_translate_colorformat(dest->tex.format)); OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0xf); END_CS; @@ -93,6 +99,7 @@ static void r300_surface_fill(struct pipe_context* pipe, struct r300_capabilities* caps = r300_screen(pipe->screen)->caps; struct r300_texture* tex = (struct r300_texture*)dest->texture; unsigned pixpitch = tex->stride / tex->tex.block.size; + boolean invalid = FALSE; CS_LOCALS(r300); a = (float)((color >> 24) & 0xff) / 255.0f; @@ -105,12 +112,29 @@ static void r300_surface_fill(struct pipe_context* pipe, /* Fallback? */ if (FALSE) { +fallback: debug_printf("r300: Falling back on surface clear..."); util_surface_fill(pipe, dest, x, y, w, h, color); return; } - r300_surface_setup(r300, dest, x, y, w, h); + /* Make sure our target BO is okay. */ +validate: + if (!r300->winsys->add_buffer(r300->winsys, tex->buffer, + 0, RADEON_GEM_DOMAIN_VRAM)) { + r300->context.flush(&r300->context, 0, NULL); + goto validate; + } + if (r300->winsys->validate(r300->winsys)) { + r300->context.flush(&r300->context, 0, NULL); + if (invalid) { + goto fallback; + } + invalid = TRUE; + goto validate; + } + + r300_surface_setup(r300, tex, x, y, w, h); /* Vertex shader setup */ if (caps->has_tcl) { @@ -134,7 +158,7 @@ static void r300_surface_fill(struct pipe_context* pipe, r300_emit_rs_block_state(r300, &r300_rs_block_clear_state); } - BEGIN_CS(31); + BEGIN_CS(26); /* VAP stream control, mapping from input memory to PVS/RS memory */ if (caps->has_tcl) { @@ -161,27 +185,21 @@ static void r300_surface_fill(struct pipe_context* pipe, /* Disable textures */ OUT_CS_REG(R300_TX_ENABLE, 0x0); - /* Viewport setup */ - OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6); - OUT_CS_32F(1.0); - OUT_CS_32F((float)x); - OUT_CS_32F(1.0); - OUT_CS_32F((float)y); - OUT_CS_32F(1.0); - OUT_CS_32F(0.0); - /* The size of the point we're about to draw, in sixths of pixels */ OUT_CS_REG(R300_GA_POINT_SIZE, - ((h * 6) & R300_POINTSIZE_Y_MASK) | + ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); + /* Vertex size. */ + OUT_CS_REG(R300_VAP_VTX_SIZE, 0x8); + /* Packet3 with our point vertex */ OUT_CS_PKT3(R200_3D_DRAW_IMMD_2, 8); OUT_CS(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING | (1 << R300_PRIM_NUM_VERTICES_SHIFT)); /* Position */ - OUT_CS_32F(w / 2.0); - OUT_CS_32F(h / 2.0); + OUT_CS_32F(0.5); + OUT_CS_32F(0.5); OUT_CS_32F(1.0); OUT_CS_32F(1.0); /* Color */ @@ -190,11 +208,7 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_32F(b); OUT_CS_32F(a); - /* XXX figure out why this is 0xA and not 0x2 */ OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA); - /* XXX OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, - R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE | - R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE); */ END_CS; @@ -213,6 +227,7 @@ static void r300_surface_copy(struct pipe_context* pipe, struct r300_texture* srctex = (struct r300_texture*)src->texture; struct r300_texture* desttex = (struct r300_texture*)dest->texture; unsigned pixpitch = srctex->stride / srctex->tex.block.size; + boolean invalid = FALSE; CS_LOCALS(r300); debug_printf("r300: Copying surface %p at (%d,%d) to %p at (%d, %d)," @@ -222,18 +237,48 @@ static void r300_surface_copy(struct pipe_context* pipe, if ((srctex == desttex) && ((destx < srcx + w) || (srcx < destx + w)) && ((desty < srcy + h) || (srcy < desty + h))) { +fallback: debug_printf("r300: Falling back on surface_copy\n"); util_surface_copy(pipe, FALSE, dest, destx, desty, src, srcx, srcy, w, h); } + /* Add our target BOs to the list. */ +validate: + if (!r300->winsys->add_buffer(r300->winsys, srctex->buffer, + RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0)) { + r300->context.flush(&r300->context, 0, NULL); + goto validate; + } + if (!r300->winsys->add_buffer(r300->winsys, desttex->buffer, + 0, RADEON_GEM_DOMAIN_VRAM)) { + r300->context.flush(&r300->context, 0, NULL); + goto validate; + } + if (r300->winsys->validate(r300->winsys)) { + r300->context.flush(&r300->context, 0, NULL); + if (invalid) { + goto fallback; + } + invalid = TRUE; + goto validate; + } + + r300_surface_setup(r300, desttex, destx, desty, w, h); + + /* Setup the texture. */ r300_emit_sampler(r300, &r300_sampler_copy_state, 0); r300_emit_texture(r300, srctex, 0); - r300_flush_textures(r300); + + /* Flush and enable. */ + BEGIN_CS(4); + OUT_CS_REG(R300_TX_INVALTAGS, 0); + OUT_CS_REG(R300_TX_ENABLE, 0x1); + END_CS; /* Vertex shader setup */ if (caps->has_tcl) { - r300_emit_vertex_shader(r300, &r300_texture_vertex_shader); + r300_emit_vertex_shader(r300, &r300_passthrough_vertex_shader); } else { BEGIN_CS(4); OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VAP_TCL_BYPASS); @@ -253,6 +298,7 @@ static void r300_surface_copy(struct pipe_context* pipe, r300_emit_rs_block_state(r300, &r300_rs_block_copy_state); } + BEGIN_CS(30); /* VAP stream control, mapping from input memory to PVS/RS memory */ if (caps->has_tcl) { OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, @@ -275,33 +321,38 @@ static void r300_surface_copy(struct pipe_context* pipe, /* Two components of texture 0 */ OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_1, 0x2); + /* Vertex size. */ + OUT_CS_REG(R300_VAP_VTX_SIZE, 0x4); + /* Packet3 with our texcoords */ - OUT_CS_PKT3(R200_3D_DRAW_IMMD_2, 8); + OUT_CS_PKT3(R200_3D_DRAW_IMMD_2, 16); OUT_CS(R300_PRIM_TYPE_QUADS | R300_PRIM_WALK_RING | (4 << R300_PRIM_NUM_VERTICES_SHIFT)); /* (x , y ) */ - OUT_CS_32F((float)destx); - OUT_CS_32F((float)desty); - OUT_CS_32F((float)srcx); - OUT_CS_32F((float)srcy); + OUT_CS_32F((float)(destx / dest->width)); + OUT_CS_32F((float)(desty / dest->height)); + OUT_CS_32F((float)(srcx / dest->width)); + OUT_CS_32F((float)(srcy / dest->height)); /* (x , y + h) */ - OUT_CS_32F((float)destx); - OUT_CS_32F((float)(desty + h)); - OUT_CS_32F((float)srcx); - OUT_CS_32F((float)(srcy + h)); + OUT_CS_32F((float)(destx / dest->width)); + OUT_CS_32F((float)((desty + h) / dest->height)); + OUT_CS_32F((float)(srcx / dest->width)); + OUT_CS_32F((float)((srcy + h) / dest->height)); /* (x + w, y + h) */ - OUT_CS_32F((float)(destx + w)); - OUT_CS_32F((float)(desty + h)); - OUT_CS_32F((float)(srcx + w)); - OUT_CS_32F((float)(srcy + h)); + OUT_CS_32F((float)((destx + w) / dest->width)); + OUT_CS_32F((float)((desty + h) / dest->height)); + OUT_CS_32F((float)((srcx + w) / dest->width)); + OUT_CS_32F((float)((srcy + h) / dest->height)); /* (x + w, y ) */ - OUT_CS_32F((float)(destx + w)); - OUT_CS_32F((float)desty); - OUT_CS_32F((float)(srcx + w)); - OUT_CS_32F((float)srcy); + OUT_CS_32F((float)((destx + w) / dest->width)); + OUT_CS_32F((float)(desty / dest->height)); + OUT_CS_32F((float)((srcx + w) / dest->width)); + OUT_CS_32F((float)(srcy / dest->height)); OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA); + END_CS; + r300->dirty_hw++; } diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 894def07aa..9a4c39f58b 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -101,7 +101,7 @@ static struct r300_rs_block r300_rs_block_copy_state = { R500_RS_SEL_Q(R300_RS_SEL_K1), .inst[0] = R300_RS_INST_COL_CN_WRITE, .count = R300_IT_COUNT(2) | R300_IC_COUNT(0) | R300_HIRES_EN, - .inst_count = R300_RS_TX_OFFSET(6), + .inst_count = R300_RS_TX_OFFSET(0), }; static struct r300_rs_block r500_rs_block_copy_state = { @@ -111,7 +111,7 @@ static struct r300_rs_block r500_rs_block_copy_state = { R500_RS_SEL_Q(R500_RS_IP_PTR_K1), .inst[0] = R500_RS_INST_TEX_CN_WRITE, .count = R300_IT_COUNT(2) | R300_IC_COUNT(0) | R300_HIRES_EN, - .inst_count = R300_RS_TX_OFFSET(6), + .inst_count = R300_RS_TX_OFFSET(0), }; static struct r300_sampler_state r300_sampler_copy_state = { diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index fe91f4e184..5ea9f56247 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -86,8 +86,6 @@ static struct pipe_texture* r300_texture_create(struct pipe_screen* screen, const struct pipe_texture* template) { - /* XXX struct r300_screen* r300screen = r300_screen(screen); */ - struct r300_texture* tex = CALLOC_STRUCT(r300_texture); if (!tex) { diff --git a/src/gallium/drivers/r300/r300_winsys.h b/src/gallium/drivers/r300/r300_winsys.h index a833bb0399..d2893c3b9d 100644 --- a/src/gallium/drivers/r300/r300_winsys.h +++ b/src/gallium/drivers/r300/r300_winsys.h @@ -45,9 +45,6 @@ struct r300_winsys { /* PCI ID */ uint32_t pci_id; - /* GB pipe count */ - uint32_t gb_pipes; - /* GART size. */ uint32_t gart_size; @@ -55,10 +52,10 @@ struct r300_winsys { uint32_t vram_size; /* Add a pipe_buffer to the list of buffer objects to validate. */ - void (*add_buffer)(struct r300_winsys* winsys, - struct pipe_buffer* pbuffer, - uint32_t rd, - uint32_t wd); + boolean (*add_buffer)(struct r300_winsys* winsys, + struct pipe_buffer* pbuffer, + uint32_t rd, + uint32_t wd); /* Revalidate all currently setup pipe_buffers. * Returns TRUE if a flush is required. */ diff --git a/src/gallium/drivers/softpipe/sp_context.h b/src/gallium/drivers/softpipe/sp_context.h index 59d6df8f2d..b89a7292e5 100644 --- a/src/gallium/drivers/softpipe/sp_context.h +++ b/src/gallium/drivers/softpipe/sp_context.h @@ -92,6 +92,7 @@ struct softpipe_context { * queries. */ uint64_t occlusion_count; + unsigned active_query_count; /** Mapped vertex buffers */ ubyte *mapped_vbuffer[PIPE_MAX_ATTRIBS]; diff --git a/src/gallium/drivers/softpipe/sp_quad_pipe.c b/src/gallium/drivers/softpipe/sp_quad_pipe.c index 892ef87ee9..b5f69b7426 100644 --- a/src/gallium/drivers/softpipe/sp_quad_pipe.c +++ b/src/gallium/drivers/softpipe/sp_quad_pipe.c @@ -80,7 +80,7 @@ sp_build_quad_pipeline(struct softpipe_context *sp) sp_push_quad_first( sp, sp->quad[i].blend, i ); } - if (sp->depth_stencil->depth.occlusion_count) { + if (sp->active_query_count) { sp_push_quad_first( sp, sp->quad[i].occlusion, i ); } diff --git a/src/gallium/drivers/softpipe/sp_query.c b/src/gallium/drivers/softpipe/sp_query.c index 93dab236d6..379cf4ad06 100644 --- a/src/gallium/drivers/softpipe/sp_query.c +++ b/src/gallium/drivers/softpipe/sp_query.c @@ -34,6 +34,7 @@ #include "util/u_memory.h" #include "sp_context.h" #include "sp_query.h" +#include "sp_state.h" struct softpipe_query { uint64_t start; @@ -69,6 +70,8 @@ softpipe_begin_query(struct pipe_context *pipe, struct pipe_query *q) struct softpipe_query *sq = softpipe_query(q); sq->start = softpipe->occlusion_count; + softpipe->active_query_count++; + softpipe->dirty |= SP_NEW_QUERY; } @@ -78,7 +81,9 @@ softpipe_end_query(struct pipe_context *pipe, struct pipe_query *q) struct softpipe_context *softpipe = softpipe_context( pipe ); struct softpipe_query *sq = softpipe_query(q); + softpipe->active_query_count--; sq->end = softpipe->occlusion_count; + softpipe->dirty |= SP_NEW_QUERY; } diff --git a/src/gallium/drivers/softpipe/sp_screen.c b/src/gallium/drivers/softpipe/sp_screen.c index a32fd3a1ba..ce6d8ebd12 100644 --- a/src/gallium/drivers/softpipe/sp_screen.c +++ b/src/gallium/drivers/softpipe/sp_screen.c @@ -82,11 +82,11 @@ softpipe_get_param(struct pipe_screen *screen, int param) case PIPE_CAP_TEXTURE_SHADOW_MAP: return 1; case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: - return 12; /* max 2Kx2K */ + return 13; /* max 4Kx4K */ case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: return 8; /* max 128x128x128 */ case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: - return 12; /* max 2Kx2K */ + return 13; /* max 4Kx4K */ default: return 0; } diff --git a/src/gallium/drivers/softpipe/sp_setup.c b/src/gallium/drivers/softpipe/sp_setup.c index accc692b66..c6844a2649 100644 --- a/src/gallium/drivers/softpipe/sp_setup.c +++ b/src/gallium/drivers/softpipe/sp_setup.c @@ -504,6 +504,8 @@ static void print_vertex(const struct setup_context *setup, #endif /** + * Sort the vertices from top to bottom order, setting up the triangle + * edge fields (ebot, emaj, etop). * \return FALSE if coords are inf/nan (cull the tri), TRUE otherwise */ static boolean setup_sort_vertices( struct setup_context *setup, diff --git a/src/gallium/drivers/softpipe/sp_texture.c b/src/gallium/drivers/softpipe/sp_texture.c index 9e19745889..7a533dad9f 100644 --- a/src/gallium/drivers/softpipe/sp_texture.c +++ b/src/gallium/drivers/softpipe/sp_texture.c @@ -42,6 +42,7 @@ #include "sp_texture.h" #include "sp_tile_cache.h" #include "sp_screen.h" +#include "sp_winsys.h" /* Simple, maximally packed layout. diff --git a/src/gallium/drivers/trace/Makefile b/src/gallium/drivers/trace/Makefile index e087db169a..ecb69fb996 100644 --- a/src/gallium/drivers/trace/Makefile +++ b/src/gallium/drivers/trace/Makefile @@ -7,6 +7,7 @@ C_SOURCES = \ tr_buffer.c \ tr_context.c \ tr_dump.c \ + tr_dump_state.c \ tr_screen.c \ tr_state.c \ tr_texture.c diff --git a/src/gallium/drivers/trace/SConscript b/src/gallium/drivers/trace/SConscript index 4215215d1a..9b5af0d86f 100644 --- a/src/gallium/drivers/trace/SConscript +++ b/src/gallium/drivers/trace/SConscript @@ -8,6 +8,7 @@ trace = env.ConvenienceLibrary( 'tr_buffer.c', 'tr_context.c', 'tr_dump.c', + 'tr_dump_state.c', 'tr_screen.c', 'tr_state.c', 'tr_texture.c', diff --git a/src/gallium/drivers/trace/tr_context.c b/src/gallium/drivers/trace/tr_context.c index 47280459a7..2ad5ca4998 100644 --- a/src/gallium/drivers/trace/tr_context.c +++ b/src/gallium/drivers/trace/tr_context.c @@ -31,11 +31,11 @@ #include "pipe/p_screen.h" #include "tr_dump.h" +#include "tr_dump_state.h" #include "tr_state.h" #include "tr_buffer.h" #include "tr_screen.h" #include "tr_texture.h" -#include "tr_context.h" static INLINE struct pipe_buffer * @@ -121,6 +121,9 @@ trace_context_draw_arrays(struct pipe_context *_pipe, struct pipe_context *pipe = tr_ctx->pipe; boolean result; + if (tr_ctx->curr.fs->disabled || tr_ctx->curr.vs->disabled) + return 0; + trace_dump_call_begin("pipe_context", "draw_arrays"); trace_dump_arg(ptr, pipe); @@ -150,6 +153,9 @@ trace_context_draw_elements(struct pipe_context *_pipe, struct pipe_buffer *indexBuffer = tr_buf->buffer; boolean result; + if (tr_ctx->curr.fs->disabled || tr_ctx->curr.vs->disabled) + return 0; + trace_screen_user_buffer_update(_pipe->screen, indexBuffer); trace_dump_call_begin("pipe_context", "draw_elements"); @@ -187,6 +193,9 @@ trace_context_draw_range_elements(struct pipe_context *_pipe, struct pipe_buffer *indexBuffer = tr_buf->buffer; boolean result; + if (tr_ctx->curr.fs->disabled || tr_ctx->curr.vs->disabled) + return 0; + trace_screen_user_buffer_update(_pipe->screen, indexBuffer); trace_dump_call_begin("pipe_context", "draw_range_elements"); @@ -573,23 +582,32 @@ trace_context_create_fs_state(struct pipe_context *_pipe, trace_dump_call_end(); + result = trace_shader_create(tr_ctx, state, result, TRACE_SHADER_FRAGMENT); + return result; } static INLINE void trace_context_bind_fs_state(struct pipe_context *_pipe, - void *state) + void *_state) { struct trace_context *tr_ctx = trace_context(_pipe); + struct trace_shader *tr_shdr = trace_shader(_state); struct pipe_context *pipe = tr_ctx->pipe; + void *state = tr_shdr ? tr_shdr->state : NULL; trace_dump_call_begin("pipe_context", "bind_fs_state"); trace_dump_arg(ptr, pipe); trace_dump_arg(ptr, state); - pipe->bind_fs_state(pipe, state);; + tr_ctx->curr.fs = tr_shdr; + + if (tr_shdr && tr_shdr->replaced) + state = tr_shdr->replaced; + + pipe->bind_fs_state(pipe, state); trace_dump_call_end(); } @@ -597,19 +615,23 @@ trace_context_bind_fs_state(struct pipe_context *_pipe, static INLINE void trace_context_delete_fs_state(struct pipe_context *_pipe, - void *state) + void *_state) { struct trace_context *tr_ctx = trace_context(_pipe); + struct trace_shader *tr_shdr = trace_shader(_state); struct pipe_context *pipe = tr_ctx->pipe; + void *state = tr_shdr->state; trace_dump_call_begin("pipe_context", "delete_fs_state"); trace_dump_arg(ptr, pipe); trace_dump_arg(ptr, state); - pipe->delete_fs_state(pipe, state);; + pipe->delete_fs_state(pipe, state); trace_dump_call_end(); + + trace_shader_destroy(tr_ctx, tr_shdr); } @@ -626,28 +648,37 @@ trace_context_create_vs_state(struct pipe_context *_pipe, trace_dump_arg(ptr, pipe); trace_dump_arg(shader_state, state); - result = pipe->create_vs_state(pipe, state);; + result = pipe->create_vs_state(pipe, state); trace_dump_ret(ptr, result); trace_dump_call_end(); + result = trace_shader_create(tr_ctx, state, result, TRACE_SHADER_VERTEX); + return result; } static INLINE void trace_context_bind_vs_state(struct pipe_context *_pipe, - void *state) + void *_state) { struct trace_context *tr_ctx = trace_context(_pipe); + struct trace_shader *tr_shdr = trace_shader(_state); struct pipe_context *pipe = tr_ctx->pipe; + void *state = tr_shdr ? tr_shdr->state : NULL; trace_dump_call_begin("pipe_context", "bind_vs_state"); trace_dump_arg(ptr, pipe); trace_dump_arg(ptr, state); + tr_ctx->curr.vs = tr_shdr; + + if (tr_shdr && tr_shdr->replaced) + state = tr_shdr->replaced; + pipe->bind_vs_state(pipe, state);; trace_dump_call_end(); @@ -656,10 +687,12 @@ trace_context_bind_vs_state(struct pipe_context *_pipe, static INLINE void trace_context_delete_vs_state(struct pipe_context *_pipe, - void *state) + void *_state) { struct trace_context *tr_ctx = trace_context(_pipe); + struct trace_shader *tr_shdr = trace_shader(_state); struct pipe_context *pipe = tr_ctx->pipe; + void *state = tr_shdr->state; trace_dump_call_begin("pipe_context", "delete_vs_state"); @@ -669,6 +702,8 @@ trace_context_delete_vs_state(struct pipe_context *_pipe, pipe->delete_vs_state(pipe, state);; trace_dump_call_end(); + + trace_shader_destroy(tr_ctx, tr_shdr); } @@ -1089,7 +1124,7 @@ trace_context_create(struct pipe_screen *_screen, if(!pipe) goto error1; - if(!trace_dump_trace_enabled()) + if(!trace_enabled()) goto error1; tr_scr = trace_screen(_screen); @@ -1099,6 +1134,9 @@ trace_context_create(struct pipe_screen *_screen, if(!tr_ctx) goto error1; + pipe_mutex_init(tr_ctx->list_mutex); + make_empty_list(&tr_ctx->shaders); + tr_ctx->base.winsys = _screen->winsys; tr_ctx->base.screen = _screen; tr_ctx->base.destroy = trace_context_destroy; diff --git a/src/gallium/drivers/trace/tr_context.h b/src/gallium/drivers/trace/tr_context.h index 2512a0a232..86827f97b2 100644 --- a/src/gallium/drivers/trace/tr_context.h +++ b/src/gallium/drivers/trace/tr_context.h @@ -33,6 +33,7 @@ #include "util/u_debug.h" #include "pipe/p_context.h" +#include "tr_screen.h" #ifdef __cplusplus extern "C" { @@ -45,7 +46,19 @@ struct trace_context struct pipe_context *pipe; + /* current state */ + struct { + struct trace_shader *fs; + struct trace_shader *vs; + } curr; + + /* for list on screen */ struct tr_list list; + + /* list of state objects */ + pipe_mutex list_mutex; + unsigned num_shaders; + struct tr_list shaders; }; diff --git a/src/gallium/drivers/trace/tr_dump_state.c b/src/gallium/drivers/trace/tr_dump_state.c new file mode 100644 index 0000000000..23a2473b57 --- /dev/null +++ b/src/gallium/drivers/trace/tr_dump_state.c @@ -0,0 +1,490 @@ +/************************************************************************** + * + * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + + +#include "pipe/p_compiler.h" +#include "util/u_memory.h" +#include "tgsi/tgsi_dump.h" + +#include "tr_dump.h" +#include "tr_dump_state.h" + + +void trace_dump_format(enum pipe_format format) +{ + trace_dump_enum(pf_name(format) ); +} + + +void trace_dump_block(const struct pipe_format_block *block) +{ + trace_dump_struct_begin("pipe_format_block"); + trace_dump_member(uint, block, size); + trace_dump_member(uint, block, width); + trace_dump_member(uint, block, height); + trace_dump_struct_end(); +} + + +static void trace_dump_reference(const struct pipe_reference *reference) +{ + trace_dump_struct_begin("pipe_reference"); + trace_dump_member(int, &reference->count, count); + trace_dump_struct_end(); +} + + +void trace_dump_template(const struct pipe_texture *templat) +{ + if(!templat) { + trace_dump_null(); + return; + } + + trace_dump_struct_begin("pipe_texture"); + + trace_dump_member(int, templat, target); + trace_dump_member(format, templat, format); + + trace_dump_member_begin("width"); + trace_dump_array(uint, templat->width, 1); + trace_dump_member_end(); + + trace_dump_member_begin("height"); + trace_dump_array(uint, templat->height, 1); + trace_dump_member_end(); + + trace_dump_member_begin("depth"); + trace_dump_array(uint, templat->depth, 1); + trace_dump_member_end(); + + trace_dump_member_begin("block"); + trace_dump_block(&templat->block); + trace_dump_member_end(); + + trace_dump_member(uint, templat, last_level); + trace_dump_member(uint, templat, tex_usage); + + trace_dump_struct_end(); +} + + +void trace_dump_rasterizer_state(const struct pipe_rasterizer_state *state) +{ + if(!state) { + trace_dump_null(); + return; + } + + trace_dump_struct_begin("pipe_rasterizer_state"); + + trace_dump_member(bool, state, flatshade); + trace_dump_member(bool, state, light_twoside); + trace_dump_member(uint, state, front_winding); + trace_dump_member(uint, state, cull_mode); + trace_dump_member(uint, state, fill_cw); + trace_dump_member(uint, state, fill_ccw); + trace_dump_member(bool, state, offset_cw); + trace_dump_member(bool, state, offset_ccw); + trace_dump_member(bool, state, scissor); + trace_dump_member(bool, state, poly_smooth); + trace_dump_member(bool, state, poly_stipple_enable); + trace_dump_member(bool, state, point_smooth); + trace_dump_member(bool, state, point_sprite); + trace_dump_member(bool, state, point_size_per_vertex); + trace_dump_member(bool, state, multisample); + trace_dump_member(bool, state, line_smooth); + trace_dump_member(bool, state, line_stipple_enable); + trace_dump_member(uint, state, line_stipple_factor); + trace_dump_member(uint, state, line_stipple_pattern); + trace_dump_member(bool, state, line_last_pixel); + trace_dump_member(bool, state, bypass_vs_clip_and_viewport); + trace_dump_member(bool, state, flatshade_first); + trace_dump_member(bool, state, gl_rasterization_rules); + + trace_dump_member(float, state, line_width); + trace_dump_member(float, state, point_size); + trace_dump_member(float, state, point_size_min); + trace_dump_member(float, state, point_size_max); + trace_dump_member(float, state, offset_units); + trace_dump_member(float, state, offset_scale); + + trace_dump_member_array(uint, state, sprite_coord_mode); + + trace_dump_struct_end(); +} + + +void trace_dump_poly_stipple(const struct pipe_poly_stipple *state) +{ + if(!state) { + trace_dump_null(); + return; + } + + trace_dump_struct_begin("pipe_poly_stipple"); + + trace_dump_member_begin("stipple"); + trace_dump_array(uint, + state->stipple, + Elements(state->stipple)); + trace_dump_member_end(); + + trace_dump_struct_end(); +} + + +void trace_dump_viewport_state(const struct pipe_viewport_state *state) +{ + if(!state) { + trace_dump_null(); + return; + } + + trace_dump_struct_begin("pipe_viewport_state"); + + trace_dump_member_array(float, state, scale); + trace_dump_member_array(float, state, translate); + + trace_dump_struct_end(); +} + + +void trace_dump_scissor_state(const struct pipe_scissor_state *state) +{ + if(!state) { + trace_dump_null(); + return; + } + + trace_dump_struct_begin("pipe_scissor_state"); + + trace_dump_member(uint, state, minx); + trace_dump_member(uint, state, miny); + trace_dump_member(uint, state, maxx); + trace_dump_member(uint, state, maxy); + + trace_dump_struct_end(); +} + + +void trace_dump_clip_state(const struct pipe_clip_state *state) +{ + unsigned i; + + if(!state) { + trace_dump_null(); + return; + } + + trace_dump_struct_begin("pipe_clip_state"); + + trace_dump_member_begin("ucp"); + trace_dump_array_begin(); + for(i = 0; i < PIPE_MAX_CLIP_PLANES; ++i) { + trace_dump_elem_begin(); + trace_dump_array(float, state->ucp[i], 4); + trace_dump_elem_end(); + } + trace_dump_array_end(); + trace_dump_member_end(); + + trace_dump_member(uint, state, nr); + + trace_dump_struct_end(); +} + + +void trace_dump_constant_buffer(const struct pipe_constant_buffer *state) +{ + if(!state) { + trace_dump_null(); + return; + } + + trace_dump_struct_begin("pipe_constant_buffer"); + + trace_dump_member(buffer_ptr, state, buffer); + + trace_dump_struct_end(); +} + + +void trace_dump_shader_state(const struct pipe_shader_state *state) +{ + static char str[8192]; + + if(!state) { + trace_dump_null(); + return; + } + + tgsi_dump_str(state->tokens, 0, str, sizeof(str)); + + trace_dump_struct_begin("pipe_shader_state"); + + trace_dump_member_begin("tokens"); + trace_dump_string(str); + trace_dump_member_end(); + + trace_dump_struct_end(); +} + + +void trace_dump_depth_stencil_alpha_state(const struct pipe_depth_stencil_alpha_state *state) +{ + unsigned i; + + if(!state) { + trace_dump_null(); + return; + } + + trace_dump_struct_begin("pipe_depth_stencil_alpha_state"); + + trace_dump_member_begin("depth"); + trace_dump_struct_begin("pipe_depth_state"); + trace_dump_member(bool, &state->depth, enabled); + trace_dump_member(bool, &state->depth, writemask); + trace_dump_member(uint, &state->depth, func); + trace_dump_struct_end(); + trace_dump_member_end(); + + trace_dump_member_begin("stencil"); + trace_dump_array_begin(); + for(i = 0; i < Elements(state->stencil); ++i) { + trace_dump_elem_begin(); + trace_dump_struct_begin("pipe_stencil_state"); + trace_dump_member(bool, &state->stencil[i], enabled); + trace_dump_member(uint, &state->stencil[i], func); + trace_dump_member(uint, &state->stencil[i], fail_op); + trace_dump_member(uint, &state->stencil[i], zpass_op); + trace_dump_member(uint, &state->stencil[i], zfail_op); + trace_dump_member(uint, &state->stencil[i], ref_value); + trace_dump_member(uint, &state->stencil[i], valuemask); + trace_dump_member(uint, &state->stencil[i], writemask); + trace_dump_struct_end(); + trace_dump_elem_end(); + } + trace_dump_array_end(); + trace_dump_member_end(); + + trace_dump_member_begin("alpha"); + trace_dump_struct_begin("pipe_alpha_state"); + trace_dump_member(bool, &state->alpha, enabled); + trace_dump_member(uint, &state->alpha, func); + trace_dump_member(float, &state->alpha, ref_value); + trace_dump_struct_end(); + trace_dump_member_end(); + + trace_dump_struct_end(); +} + + +void trace_dump_blend_state(const struct pipe_blend_state *state) +{ + if(!state) { + trace_dump_null(); + return; + } + + trace_dump_struct_begin("pipe_blend_state"); + + trace_dump_member(bool, state, blend_enable); + + trace_dump_member(uint, state, rgb_func); + trace_dump_member(uint, state, rgb_src_factor); + trace_dump_member(uint, state, rgb_dst_factor); + + trace_dump_member(uint, state, alpha_func); + trace_dump_member(uint, state, alpha_src_factor); + trace_dump_member(uint, state, alpha_dst_factor); + + trace_dump_member(bool, state, logicop_enable); + trace_dump_member(uint, state, logicop_func); + + trace_dump_member(uint, state, colormask); + trace_dump_member(bool, state, dither); + + trace_dump_struct_end(); +} + + +void trace_dump_blend_color(const struct pipe_blend_color *state) +{ + if(!state) { + trace_dump_null(); + return; + } + + trace_dump_struct_begin("pipe_blend_color"); + + trace_dump_member_array(float, state, color); + + trace_dump_struct_end(); +} + + +void trace_dump_framebuffer_state(const struct pipe_framebuffer_state *state) +{ + trace_dump_struct_begin("pipe_framebuffer_state"); + + trace_dump_member(uint, state, width); + trace_dump_member(uint, state, height); + trace_dump_member(uint, state, nr_cbufs); + trace_dump_member_array(ptr, state, cbufs); + trace_dump_member(ptr, state, zsbuf); + + trace_dump_struct_end(); +} + + +void trace_dump_sampler_state(const struct pipe_sampler_state *state) +{ + if(!state) { + trace_dump_null(); + return; + } + + trace_dump_struct_begin("pipe_sampler_state"); + + trace_dump_member(uint, state, wrap_s); + trace_dump_member(uint, state, wrap_t); + trace_dump_member(uint, state, wrap_r); + trace_dump_member(uint, state, min_img_filter); + trace_dump_member(uint, state, min_mip_filter); + trace_dump_member(uint, state, mag_img_filter); + trace_dump_member(bool, state, compare_mode); + trace_dump_member(uint, state, compare_func); + trace_dump_member(bool, state, normalized_coords); + trace_dump_member(uint, state, prefilter); + trace_dump_member(float, state, shadow_ambient); + trace_dump_member(float, state, lod_bias); + trace_dump_member(float, state, min_lod); + trace_dump_member(float, state, max_lod); + trace_dump_member_array(float, state, border_color); + trace_dump_member(float, state, max_anisotropy); + + trace_dump_struct_end(); +} + + +void trace_dump_surface(const struct pipe_surface *state) +{ + if(!state) { + trace_dump_null(); + return; + } + + trace_dump_struct_begin("pipe_surface"); + + trace_dump_reference(&state->reference); + + trace_dump_member(format, state, format); + trace_dump_member(uint, state, width); + trace_dump_member(uint, state, height); + + trace_dump_member(uint, state, layout); + trace_dump_member(uint, state, offset); + trace_dump_member(uint, state, usage); + + trace_dump_member(ptr, state, texture); + trace_dump_member(uint, state, face); + trace_dump_member(uint, state, level); + trace_dump_member(uint, state, zslice); + + trace_dump_struct_end(); +} + + +void trace_dump_transfer(const struct pipe_transfer *state) +{ + if(!state) { + trace_dump_null(); + return; + } + + trace_dump_struct_begin("pipe_transfer"); + + trace_dump_member(format, state, format); + trace_dump_member(uint, state, width); + trace_dump_member(uint, state, height); + + trace_dump_member_begin("block"); + trace_dump_block(&state->block); + trace_dump_member_end(); + + trace_dump_member(uint, state, nblocksx); + trace_dump_member(uint, state, nblocksy); + trace_dump_member(uint, state, stride); + trace_dump_member(uint, state, usage); + + trace_dump_member(ptr, state, texture); + trace_dump_member(uint, state, face); + trace_dump_member(uint, state, level); + trace_dump_member(uint, state, zslice); + + trace_dump_struct_end(); +} + + +void trace_dump_vertex_buffer(const struct pipe_vertex_buffer *state) +{ + if(!state) { + trace_dump_null(); + return; + } + + trace_dump_struct_begin("pipe_vertex_buffer"); + + trace_dump_member(uint, state, stride); + trace_dump_member(uint, state, max_index); + trace_dump_member(uint, state, buffer_offset); + trace_dump_member(buffer_ptr, state, buffer); + + trace_dump_struct_end(); +} + + +void trace_dump_vertex_element(const struct pipe_vertex_element *state) +{ + if(!state) { + trace_dump_null(); + return; + } + + trace_dump_struct_begin("pipe_vertex_element"); + + trace_dump_member(uint, state, src_offset); + + trace_dump_member(uint, state, vertex_buffer_index); + trace_dump_member(uint, state, nr_components); + + trace_dump_member(format, state, src_format); + + trace_dump_struct_end(); +} diff --git a/src/gallium/drivers/trace/tr_dump_state.h b/src/gallium/drivers/trace/tr_dump_state.h new file mode 100644 index 0000000000..05b821adb6 --- /dev/null +++ b/src/gallium/drivers/trace/tr_dump_state.h @@ -0,0 +1,78 @@ +/************************************************************************** + * + * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#ifndef TR_DUMP_STATE_H_ +#define TR_DUMP_STATE_H_ + +#include "pipe/p_format.h" +#include "pipe/p_state.h" +#include "pipe/p_shader_tokens.h" + + +void trace_dump_format(enum pipe_format format); + +void trace_dump_block(const struct pipe_format_block *block); + +void trace_dump_template(const struct pipe_texture *templat); + + +void trace_dump_rasterizer_state(const struct pipe_rasterizer_state *state); + +void trace_dump_poly_stipple(const struct pipe_poly_stipple *state); + +void trace_dump_viewport_state(const struct pipe_viewport_state *state); + +void trace_dump_scissor_state(const struct pipe_scissor_state *state); + +void trace_dump_clip_state(const struct pipe_clip_state *state); + +void trace_dump_constant_buffer(const struct pipe_constant_buffer *state); + +void trace_dump_token(const struct tgsi_token *token); + +void trace_dump_shader_state(const struct pipe_shader_state *state); + +void trace_dump_depth_stencil_alpha_state(const struct pipe_depth_stencil_alpha_state *state); + +void trace_dump_blend_state(const struct pipe_blend_state *state); + +void trace_dump_blend_color(const struct pipe_blend_color *state); + +void trace_dump_framebuffer_state(const struct pipe_framebuffer_state *state); + +void trace_dump_sampler_state(const struct pipe_sampler_state *state); + +void trace_dump_surface(const struct pipe_surface *state); + +void trace_dump_transfer(const struct pipe_transfer *state); + +void trace_dump_vertex_buffer(const struct pipe_vertex_buffer *state); + +void trace_dump_vertex_element(const struct pipe_vertex_element *state); + + +#endif /* TR_STATE_H */ diff --git a/src/gallium/drivers/trace/tr_screen.c b/src/gallium/drivers/trace/tr_screen.c index 12a8535342..bc14248eeb 100644 --- a/src/gallium/drivers/trace/tr_screen.c +++ b/src/gallium/drivers/trace/tr_screen.c @@ -30,13 +30,15 @@ #include "tr_buffer.h" #include "tr_dump.h" -#include "tr_state.h" +#include "tr_dump_state.h" #include "tr_texture.h" #include "tr_screen.h" #include "pipe/p_inlines.h" +static boolean trace = FALSE; + static const char * trace_screen_get_name(struct pipe_screen *_screen) { @@ -212,10 +214,12 @@ static struct pipe_texture * trace_screen_texture_blanket(struct pipe_screen *_screen, const struct pipe_texture *templat, const unsigned *ppitch, - struct pipe_buffer *buffer) + struct pipe_buffer *_buffer) { struct trace_screen *tr_scr = trace_screen(_screen); + struct trace_buffer *tr_buf = trace_buffer(_buffer); struct pipe_screen *screen = tr_scr->screen; + struct pipe_buffer *buffer = tr_buf->buffer; unsigned pitch = *ppitch; struct pipe_texture *result; @@ -818,16 +822,20 @@ trace_screen_destroy(struct pipe_screen *_screen) struct pipe_screen *screen = tr_scr->screen; trace_dump_call_begin("pipe_screen", "destroy"); - trace_dump_arg(ptr, screen); + trace_dump_call_end(); + trace_dump_trace_end(); screen->destroy(screen); - trace_dump_call_end(); + FREE(tr_scr); +} - trace_dump_trace_end(); - FREE(tr_scr); +boolean +trace_enabled(void) +{ + return trace; } @@ -842,10 +850,13 @@ trace_screen_create(struct pipe_screen *screen) trace_dump_init(); - if(!trace_dump_trace_begin()) - goto error1; + if(trace_dump_trace_begin()) { + trace_dumping_start(); + trace = TRUE; + } - trace_dumping_start(); + if (!trace) + goto error1; trace_dump_call_begin("", "pipe_screen_create"); diff --git a/src/gallium/drivers/trace/tr_screen.h b/src/gallium/drivers/trace/tr_screen.h index 59f254166d..7fae182985 100644 --- a/src/gallium/drivers/trace/tr_screen.h +++ b/src/gallium/drivers/trace/tr_screen.h @@ -71,6 +71,13 @@ struct trace_screen }; +/* + * tr_screen.c + */ + +boolean +trace_enabled(void); + struct trace_screen * trace_screen(struct pipe_screen *screen); diff --git a/src/gallium/drivers/trace/tr_state.c b/src/gallium/drivers/trace/tr_state.c index a9570c1aeb..d8c11640bf 100644 --- a/src/gallium/drivers/trace/tr_state.c +++ b/src/gallium/drivers/trace/tr_state.c @@ -1,491 +1,66 @@ -/************************************************************************** - * - * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas. +/* + * Copyright 2009 VMware, Inc. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE - * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. * - **************************************************************************/ - + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * VMWARE AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + */ -#include "pipe/p_compiler.h" -#include "util/u_memory.h" -#include "tgsi/tgsi_dump.h" - -#include "tr_dump.h" #include "tr_state.h" +#include "util/u_memory.h" +#include "util/u_simple_list.h" -void trace_dump_format(enum pipe_format format) -{ - trace_dump_enum(pf_name(format) ); -} - - -void trace_dump_block(const struct pipe_format_block *block) -{ - trace_dump_struct_begin("pipe_format_block"); - trace_dump_member(uint, block, size); - trace_dump_member(uint, block, width); - trace_dump_member(uint, block, height); - trace_dump_struct_end(); -} - - -static void trace_dump_reference(const struct pipe_reference *reference) -{ - trace_dump_struct_begin("pipe_reference"); - trace_dump_member(int, &reference->count, count); - trace_dump_struct_end(); -} - - -void trace_dump_template(const struct pipe_texture *templat) -{ - if(!templat) { - trace_dump_null(); - return; - } - - trace_dump_struct_begin("pipe_texture"); - - trace_dump_member(int, templat, target); - trace_dump_member(format, templat, format); - - trace_dump_member_begin("width"); - trace_dump_array(uint, templat->width, 1); - trace_dump_member_end(); - - trace_dump_member_begin("height"); - trace_dump_array(uint, templat->height, 1); - trace_dump_member_end(); - - trace_dump_member_begin("depth"); - trace_dump_array(uint, templat->depth, 1); - trace_dump_member_end(); - - trace_dump_member_begin("block"); - trace_dump_block(&templat->block); - trace_dump_member_end(); - - trace_dump_member(uint, templat, last_level); - trace_dump_member(uint, templat, tex_usage); - - trace_dump_struct_end(); -} - - -void trace_dump_rasterizer_state(const struct pipe_rasterizer_state *state) -{ - if(!state) { - trace_dump_null(); - return; - } - - trace_dump_struct_begin("pipe_rasterizer_state"); - - trace_dump_member(bool, state, flatshade); - trace_dump_member(bool, state, light_twoside); - trace_dump_member(uint, state, front_winding); - trace_dump_member(uint, state, cull_mode); - trace_dump_member(uint, state, fill_cw); - trace_dump_member(uint, state, fill_ccw); - trace_dump_member(bool, state, offset_cw); - trace_dump_member(bool, state, offset_ccw); - trace_dump_member(bool, state, scissor); - trace_dump_member(bool, state, poly_smooth); - trace_dump_member(bool, state, poly_stipple_enable); - trace_dump_member(bool, state, point_smooth); - trace_dump_member(bool, state, point_sprite); - trace_dump_member(bool, state, point_size_per_vertex); - trace_dump_member(bool, state, multisample); - trace_dump_member(bool, state, line_smooth); - trace_dump_member(bool, state, line_stipple_enable); - trace_dump_member(uint, state, line_stipple_factor); - trace_dump_member(uint, state, line_stipple_pattern); - trace_dump_member(bool, state, line_last_pixel); - trace_dump_member(bool, state, bypass_vs_clip_and_viewport); - trace_dump_member(bool, state, flatshade_first); - trace_dump_member(bool, state, gl_rasterization_rules); - - trace_dump_member(float, state, line_width); - trace_dump_member(float, state, point_size); - trace_dump_member(float, state, point_size_min); - trace_dump_member(float, state, point_size_max); - trace_dump_member(float, state, offset_units); - trace_dump_member(float, state, offset_scale); - - trace_dump_member_array(uint, state, sprite_coord_mode); - - trace_dump_struct_end(); -} - - -void trace_dump_poly_stipple(const struct pipe_poly_stipple *state) -{ - if(!state) { - trace_dump_null(); - return; - } - - trace_dump_struct_begin("pipe_poly_stipple"); - - trace_dump_member_begin("stipple"); - trace_dump_array(uint, - state->stipple, - Elements(state->stipple)); - trace_dump_member_end(); - - trace_dump_struct_end(); -} - - -void trace_dump_viewport_state(const struct pipe_viewport_state *state) -{ - if(!state) { - trace_dump_null(); - return; - } - - trace_dump_struct_begin("pipe_viewport_state"); - - trace_dump_member_array(float, state, scale); - trace_dump_member_array(float, state, translate); - - trace_dump_struct_end(); -} - - -void trace_dump_scissor_state(const struct pipe_scissor_state *state) -{ - if(!state) { - trace_dump_null(); - return; - } - - trace_dump_struct_begin("pipe_scissor_state"); - - trace_dump_member(uint, state, minx); - trace_dump_member(uint, state, miny); - trace_dump_member(uint, state, maxx); - trace_dump_member(uint, state, maxy); - - trace_dump_struct_end(); -} - - -void trace_dump_clip_state(const struct pipe_clip_state *state) -{ - unsigned i; - - if(!state) { - trace_dump_null(); - return; - } - - trace_dump_struct_begin("pipe_clip_state"); - - trace_dump_member_begin("ucp"); - trace_dump_array_begin(); - for(i = 0; i < PIPE_MAX_CLIP_PLANES; ++i) { - trace_dump_elem_begin(); - trace_dump_array(float, state->ucp[i], 4); - trace_dump_elem_end(); - } - trace_dump_array_end(); - trace_dump_member_end(); - - trace_dump_member(uint, state, nr); - - trace_dump_struct_end(); -} - - -void trace_dump_constant_buffer(const struct pipe_constant_buffer *state) -{ - if(!state) { - trace_dump_null(); - return; - } - - trace_dump_struct_begin("pipe_constant_buffer"); - - trace_dump_member(buffer_ptr, state, buffer); - - trace_dump_struct_end(); -} - - -void trace_dump_shader_state(const struct pipe_shader_state *state) -{ - static char str[8192]; - - if(!state) { - trace_dump_null(); - return; - } - - tgsi_dump_str(state->tokens, 0, str, sizeof(str)); - - trace_dump_struct_begin("pipe_shader_state"); - - trace_dump_member_begin("tokens"); - trace_dump_string(str); - trace_dump_member_end(); - - trace_dump_struct_end(); -} - - -void trace_dump_depth_stencil_alpha_state(const struct pipe_depth_stencil_alpha_state *state) -{ - unsigned i; - - if(!state) { - trace_dump_null(); - return; - } - - trace_dump_struct_begin("pipe_depth_stencil_alpha_state"); - - trace_dump_member_begin("depth"); - trace_dump_struct_begin("pipe_depth_state"); - trace_dump_member(bool, &state->depth, enabled); - trace_dump_member(bool, &state->depth, writemask); - trace_dump_member(uint, &state->depth, func); - trace_dump_member(bool, &state->depth, occlusion_count); - trace_dump_struct_end(); - trace_dump_member_end(); - - trace_dump_member_begin("stencil"); - trace_dump_array_begin(); - for(i = 0; i < Elements(state->stencil); ++i) { - trace_dump_elem_begin(); - trace_dump_struct_begin("pipe_stencil_state"); - trace_dump_member(bool, &state->stencil[i], enabled); - trace_dump_member(uint, &state->stencil[i], func); - trace_dump_member(uint, &state->stencil[i], fail_op); - trace_dump_member(uint, &state->stencil[i], zpass_op); - trace_dump_member(uint, &state->stencil[i], zfail_op); - trace_dump_member(uint, &state->stencil[i], ref_value); - trace_dump_member(uint, &state->stencil[i], valuemask); - trace_dump_member(uint, &state->stencil[i], writemask); - trace_dump_struct_end(); - trace_dump_elem_end(); - } - trace_dump_array_end(); - trace_dump_member_end(); - - trace_dump_member_begin("alpha"); - trace_dump_struct_begin("pipe_alpha_state"); - trace_dump_member(bool, &state->alpha, enabled); - trace_dump_member(uint, &state->alpha, func); - trace_dump_member(float, &state->alpha, ref_value); - trace_dump_struct_end(); - trace_dump_member_end(); - - trace_dump_struct_end(); -} - - -void trace_dump_blend_state(const struct pipe_blend_state *state) -{ - if(!state) { - trace_dump_null(); - return; - } - - trace_dump_struct_begin("pipe_blend_state"); - - trace_dump_member(bool, state, blend_enable); - - trace_dump_member(uint, state, rgb_func); - trace_dump_member(uint, state, rgb_src_factor); - trace_dump_member(uint, state, rgb_dst_factor); - - trace_dump_member(uint, state, alpha_func); - trace_dump_member(uint, state, alpha_src_factor); - trace_dump_member(uint, state, alpha_dst_factor); - - trace_dump_member(bool, state, logicop_enable); - trace_dump_member(uint, state, logicop_func); - - trace_dump_member(uint, state, colormask); - trace_dump_member(bool, state, dither); - - trace_dump_struct_end(); -} - - -void trace_dump_blend_color(const struct pipe_blend_color *state) -{ - if(!state) { - trace_dump_null(); - return; - } - - trace_dump_struct_begin("pipe_blend_color"); - - trace_dump_member_array(float, state, color); - - trace_dump_struct_end(); -} - - -void trace_dump_framebuffer_state(const struct pipe_framebuffer_state *state) -{ - trace_dump_struct_begin("pipe_framebuffer_state"); - - trace_dump_member(uint, state, width); - trace_dump_member(uint, state, height); - trace_dump_member(uint, state, nr_cbufs); - trace_dump_member_array(ptr, state, cbufs); - trace_dump_member(ptr, state, zsbuf); - - trace_dump_struct_end(); -} - - -void trace_dump_sampler_state(const struct pipe_sampler_state *state) -{ - if(!state) { - trace_dump_null(); - return; - } - - trace_dump_struct_begin("pipe_sampler_state"); - - trace_dump_member(uint, state, wrap_s); - trace_dump_member(uint, state, wrap_t); - trace_dump_member(uint, state, wrap_r); - trace_dump_member(uint, state, min_img_filter); - trace_dump_member(uint, state, min_mip_filter); - trace_dump_member(uint, state, mag_img_filter); - trace_dump_member(bool, state, compare_mode); - trace_dump_member(uint, state, compare_func); - trace_dump_member(bool, state, normalized_coords); - trace_dump_member(uint, state, prefilter); - trace_dump_member(float, state, shadow_ambient); - trace_dump_member(float, state, lod_bias); - trace_dump_member(float, state, min_lod); - trace_dump_member(float, state, max_lod); - trace_dump_member_array(float, state, border_color); - trace_dump_member(float, state, max_anisotropy); - - trace_dump_struct_end(); -} - - -void trace_dump_surface(const struct pipe_surface *state) -{ - if(!state) { - trace_dump_null(); - return; - } - - trace_dump_struct_begin("pipe_surface"); - - trace_dump_reference(&state->reference); - - trace_dump_member(format, state, format); - trace_dump_member(uint, state, width); - trace_dump_member(uint, state, height); - - trace_dump_member(uint, state, layout); - trace_dump_member(uint, state, offset); - trace_dump_member(uint, state, usage); - - trace_dump_member(ptr, state, texture); - trace_dump_member(uint, state, face); - trace_dump_member(uint, state, level); - trace_dump_member(uint, state, zslice); - - trace_dump_struct_end(); -} - +#include "tgsi/tgsi_parse.h" -void trace_dump_transfer(const struct pipe_transfer *state) +struct trace_shader * trace_shader_create(struct trace_context *tr_ctx, + const struct pipe_shader_state *state, + void *result, + enum trace_shader_type type) { - if(!state) { - trace_dump_null(); - return; - } + struct trace_shader *tr_shdr = CALLOC_STRUCT(trace_shader); - trace_dump_struct_begin("pipe_transfer"); + tr_shdr->state = result; + tr_shdr->type = type; + tr_shdr->tokens = tgsi_dup_tokens(state->tokens); - trace_dump_member(format, state, format); - trace_dump_member(uint, state, width); - trace_dump_member(uint, state, height); + /* works on context as well */ + trace_screen_add_to_list(tr_ctx, shaders, tr_shdr); - trace_dump_member_begin("block"); - trace_dump_block(&state->block); - trace_dump_member_end(); - - trace_dump_member(uint, state, nblocksx); - trace_dump_member(uint, state, nblocksy); - trace_dump_member(uint, state, stride); - trace_dump_member(uint, state, usage); - - trace_dump_member(ptr, state, texture); - trace_dump_member(uint, state, face); - trace_dump_member(uint, state, level); - trace_dump_member(uint, state, zslice); - - trace_dump_struct_end(); + return tr_shdr; } - -void trace_dump_vertex_buffer(const struct pipe_vertex_buffer *state) +void trace_shader_destroy(struct trace_context *tr_ctx, + struct trace_shader *tr_shdr) { - if(!state) { - trace_dump_null(); - return; - } + trace_screen_remove_from_list(tr_ctx, shaders, tr_shdr); - trace_dump_struct_begin("pipe_vertex_buffer"); - - trace_dump_member(uint, state, stride); - trace_dump_member(uint, state, max_index); - trace_dump_member(uint, state, buffer_offset); - trace_dump_member(buffer_ptr, state, buffer); - - trace_dump_struct_end(); -} - - -void trace_dump_vertex_element(const struct pipe_vertex_element *state) -{ - if(!state) { - trace_dump_null(); - return; + if (tr_shdr->replaced) { + if (tr_shdr->type == TRACE_SHADER_FRAGMENT) + tr_ctx->pipe->delete_fs_state(tr_ctx->pipe, tr_shdr->replaced); + else if (tr_shdr->type == TRACE_SHADER_VERTEX) + tr_ctx->pipe->delete_vs_state(tr_ctx->pipe, tr_shdr->replaced); + else + assert(0); } - trace_dump_struct_begin("pipe_vertex_element"); - - trace_dump_member(uint, state, src_offset); - - trace_dump_member(uint, state, vertex_buffer_index); - trace_dump_member(uint, state, nr_components); - - trace_dump_member(format, state, src_format); - - trace_dump_struct_end(); + FREE(tr_shdr->replaced_tokens); + FREE(tr_shdr->tokens); + FREE(tr_shdr); } diff --git a/src/gallium/drivers/trace/tr_state.h b/src/gallium/drivers/trace/tr_state.h index 513ed0ac98..1c16042ee5 100644 --- a/src/gallium/drivers/trace/tr_state.h +++ b/src/gallium/drivers/trace/tr_state.h @@ -1,78 +1,68 @@ -/************************************************************************** - * - * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas. +/* + * Copyright 2009 VMware, Inc. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE - * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. * - **************************************************************************/ - -#ifndef TR_STATE_H -#define TR_STATE_H - -#include "pipe/p_format.h" -#include "pipe/p_state.h" -#include "pipe/p_shader_tokens.h" - - -void trace_dump_format(enum pipe_format format); - -void trace_dump_block(const struct pipe_format_block *block); - -void trace_dump_template(const struct pipe_texture *templat); - - -void trace_dump_rasterizer_state(const struct pipe_rasterizer_state *state); - -void trace_dump_poly_stipple(const struct pipe_poly_stipple *state); - -void trace_dump_viewport_state(const struct pipe_viewport_state *state); - -void trace_dump_scissor_state(const struct pipe_scissor_state *state); - -void trace_dump_clip_state(const struct pipe_clip_state *state); + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * VMWARE AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + */ -void trace_dump_constant_buffer(const struct pipe_constant_buffer *state); +#ifndef TR_STATE_H_ +#define TR_STATE_H_ -void trace_dump_token(const struct tgsi_token *token); +#include "tr_context.h" -void trace_dump_shader_state(const struct pipe_shader_state *state); +struct tgsi_token; -void trace_dump_depth_stencil_alpha_state(const struct pipe_depth_stencil_alpha_state *state); +enum trace_shader_type { + TRACE_SHADER_FRAGMENT = 0, + TRACE_SHADER_VERTEX = 1, + TRACE_SHADER_GEOMETRY = 2, +}; -void trace_dump_blend_state(const struct pipe_blend_state *state); +struct trace_shader +{ + struct tr_list list; -void trace_dump_blend_color(const struct pipe_blend_color *state); + enum trace_shader_type type; -void trace_dump_framebuffer_state(const struct pipe_framebuffer_state *state); + void *state; + void *replaced; -void trace_dump_sampler_state(const struct pipe_sampler_state *state); + struct tgsi_token *tokens; + struct tgsi_token *replaced_tokens; -void trace_dump_surface(const struct pipe_surface *state); + boolean disabled; +}; -void trace_dump_transfer(const struct pipe_transfer *state); -void trace_dump_vertex_buffer(const struct pipe_vertex_buffer *state); +static INLINE struct trace_shader * +trace_shader(void *state) +{ + return (struct trace_shader *)state; +} -void trace_dump_vertex_element(const struct pipe_vertex_element *state); +struct trace_shader * trace_shader_create(struct trace_context *tr_ctx, + const struct pipe_shader_state *state, + void *result, + enum trace_shader_type type); +void trace_shader_destroy(struct trace_context *tr_ctx, + struct trace_shader *tr_shdr); -#endif /* TR_STATE_H */ +#endif |