diff options
Diffstat (limited to 'src/gallium/winsys/drm/radeon/core/radeon_buffer.c')
-rw-r--r-- | src/gallium/winsys/drm/radeon/core/radeon_buffer.c | 135 |
1 files changed, 71 insertions, 64 deletions
diff --git a/src/gallium/winsys/drm/radeon/core/radeon_buffer.c b/src/gallium/winsys/drm/radeon/core/radeon_buffer.c index 385fa857b5..3b1c3860a4 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_buffer.c +++ b/src/gallium/winsys/drm/radeon/core/radeon_buffer.c @@ -33,7 +33,6 @@ #include "radeon_buffer.h" #include "radeon_bo_gem.h" -#include "softpipe/sp_texture.h" #include "r300_context.h" #include "util/u_format.h" #include "util/u_math.h" @@ -51,6 +50,26 @@ static const char *radeon_get_name(struct pipe_winsys *ws) return "Radeon/GEM+KMS"; } +static uint32_t radeon_domain_from_usage(unsigned usage) +{ + uint32_t domain = 0; + + if (usage & PIPE_BUFFER_USAGE_GPU_WRITE) { + domain |= RADEON_GEM_DOMAIN_VRAM; + } + if (usage & PIPE_BUFFER_USAGE_PIXEL) { + domain |= RADEON_GEM_DOMAIN_VRAM; + } + if (usage & PIPE_BUFFER_USAGE_VERTEX) { + domain |= RADEON_GEM_DOMAIN_GTT; + } + if (usage & PIPE_BUFFER_USAGE_INDEX) { + domain |= RADEON_GEM_DOMAIN_GTT; + } + + return domain; +} + static struct pipe_buffer *radeon_buffer_create(struct pipe_winsys *ws, unsigned alignment, unsigned usage, @@ -58,6 +77,7 @@ static struct pipe_buffer *radeon_buffer_create(struct pipe_winsys *ws, { struct radeon_winsys *radeon_ws = (struct radeon_winsys *)ws; struct radeon_pipe_buffer *radeon_buffer; + struct pb_desc desc; uint32_t domain; radeon_buffer = CALLOC_STRUCT(radeon_pipe_buffer); @@ -70,18 +90,16 @@ static struct pipe_buffer *radeon_buffer_create(struct pipe_winsys *ws, radeon_buffer->base.usage = usage; radeon_buffer->base.size = size; - domain = 0; - - if (usage & PIPE_BUFFER_USAGE_PIXEL) { - domain |= RADEON_GEM_DOMAIN_VRAM; - } - if (usage & PIPE_BUFFER_USAGE_VERTEX) { - domain |= RADEON_GEM_DOMAIN_GTT; - } - if (usage & PIPE_BUFFER_USAGE_INDEX) { - domain |= RADEON_GEM_DOMAIN_GTT; + if (usage & PIPE_BUFFER_USAGE_CONSTANT && is_r3xx(radeon_ws->pci_id)) { + /* Don't bother allocating a BO, as it'll never get to the card. */ + desc.alignment = alignment; + desc.usage = usage; + radeon_buffer->pb = pb_malloc_buffer_create(size, &desc); + return &radeon_buffer->base; } + domain = radeon_domain_from_usage(usage); + radeon_buffer->bo = radeon_bo_open(radeon_ws->priv->bom, 0, size, alignment, domain, 0); if (radeon_buffer->bo == NULL) { @@ -133,8 +151,16 @@ static void radeon_buffer_del(struct pipe_buffer *buffer) struct radeon_pipe_buffer *radeon_buffer = (struct radeon_pipe_buffer*)buffer; - radeon_bo_unref(radeon_buffer->bo); - free(radeon_buffer); + if (radeon_buffer->pb) { + pipe_reference_init(&radeon_buffer->pb->base.reference, 0); + pb_destroy(radeon_buffer->pb); + } + + if (radeon_buffer->bo) { + radeon_bo_unref(radeon_buffer->bo); + } + + FREE(radeon_buffer); } static void *radeon_buffer_map(struct pipe_winsys *ws, @@ -146,6 +172,10 @@ static void *radeon_buffer_map(struct pipe_winsys *ws, (struct radeon_pipe_buffer*)buffer; int write = 0; + if (radeon_buffer->pb) { + return pb_map(radeon_buffer->pb, flags); + } + if (flags & PIPE_BUFFER_USAGE_DONTBLOCK) { uint32_t domain; @@ -174,7 +204,31 @@ static void radeon_buffer_unmap(struct pipe_winsys *ws, struct radeon_pipe_buffer *radeon_buffer = (struct radeon_pipe_buffer*)buffer; - radeon_bo_unmap(radeon_buffer->bo); + if (radeon_buffer->pb) { + pb_unmap(radeon_buffer->pb); + } else { + radeon_bo_unmap(radeon_buffer->bo); + } +} + +static void radeon_buffer_set_tiling(struct radeon_winsys *ws, + struct pipe_buffer *buffer, + uint32_t pitch, + boolean microtiled, + boolean macrotiled) +{ + struct radeon_pipe_buffer *radeon_buffer = + (struct radeon_pipe_buffer*)buffer; + uint32_t flags = 0; + + if (microtiled) { + flags |= RADEON_BO_FLAGS_MICRO_TILE; + } + if (macrotiled) { + flags |= RADEON_BO_FLAGS_MACRO_TILE; + } + + radeon_bo_set_tiling(radeon_buffer->bo, flags, pitch); } static void radeon_fence_reference(struct pipe_winsys *ws, @@ -197,55 +251,6 @@ static int radeon_fence_finish(struct pipe_winsys *ws, return 0; } -static void radeon_display_surface(struct pipe_winsys *pws, - struct pipe_surface *psurf, - struct radeon_vl_context *rvl_ctx) -{ - struct r300_texture *r300tex = (struct r300_texture *)(psurf->texture); - XImage *ximage; - void *data; - - ximage = XCreateImage(rvl_ctx->display, - XDefaultVisual(rvl_ctx->display, rvl_ctx->screen), - XDefaultDepth(rvl_ctx->display, rvl_ctx->screen), - ZPixmap, 0, /* format, offset */ - NULL, /* data */ - 0, 0, /* size */ - 32, /* bitmap_pad */ - 0); /* bytes_per_line */ - - assert(ximage->format); - assert(ximage->bitmap_unit); - - data = pws->buffer_map(pws, r300tex->buffer, 0); - - /* update XImage's fields */ - ximage->data = data; - ximage->width = psurf->width; - ximage->height = psurf->height; - ximage->bytes_per_line = psurf->width * (ximage->bits_per_pixel >> 3); - - XPutImage(rvl_ctx->display, rvl_ctx->drawable, - XDefaultGC(rvl_ctx->display, rvl_ctx->screen), - ximage, 0, 0, 0, 0, psurf->width, psurf->height); - - XSync(rvl_ctx->display, 0); - - ximage->data = NULL; - XDestroyImage(ximage); - - pws->buffer_unmap(pws, r300tex->buffer); -} - -static void radeon_flush_frontbuffer(struct pipe_winsys *pipe_winsys, - struct pipe_surface *pipe_surface, - void *context_private) -{ - struct radeon_vl_context *rvl_ctx; - rvl_ctx = (struct radeon_vl_context *) context_private; - radeon_display_surface(pipe_winsys, pipe_surface, rvl_ctx); -} - struct radeon_winsys* radeon_pipe_winsys(int fd) { struct radeon_winsys* radeon_ws; @@ -264,7 +269,7 @@ struct radeon_winsys* radeon_pipe_winsys(int fd) radeon_ws->priv->fd = fd; radeon_ws->priv->bom = radeon_bo_manager_gem_ctor(fd); - radeon_ws->base.flush_frontbuffer = radeon_flush_frontbuffer; + radeon_ws->base.flush_frontbuffer = NULL; /* overriden by co-state tracker */ radeon_ws->base.buffer_create = radeon_buffer_create; radeon_ws->base.user_buffer_create = radeon_buffer_user_create; @@ -279,5 +284,7 @@ struct radeon_winsys* radeon_pipe_winsys(int fd) radeon_ws->base.get_name = radeon_get_name; + radeon_ws->buffer_set_tiling = radeon_buffer_set_tiling; + return radeon_ws; } |