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-rw-r--r--src/gallium/winsys/drm/radeon/core/Makefile2
-rw-r--r--src/gallium/winsys/drm/radeon/core/radeon_buffer.h66
-rw-r--r--src/gallium/winsys/drm/radeon/core/radeon_drm.c41
-rw-r--r--src/gallium/winsys/drm/radeon/core/radeon_drm.h16
-rw-r--r--src/gallium/winsys/drm/radeon/core/radeon_drm_buffer.c368
-rw-r--r--src/gallium/winsys/drm/radeon/core/radeon_r300.c301
-rw-r--r--src/gallium/winsys/drm/radeon/core/radeon_r300.h2
-rw-r--r--src/gallium/winsys/drm/radeon/core/radeon_winsys.h99
8 files changed, 720 insertions, 175 deletions
diff --git a/src/gallium/winsys/drm/radeon/core/Makefile b/src/gallium/winsys/drm/radeon/core/Makefile
index 860cbb6dbf..13bbbf730d 100644
--- a/src/gallium/winsys/drm/radeon/core/Makefile
+++ b/src/gallium/winsys/drm/radeon/core/Makefile
@@ -5,7 +5,7 @@ include $(TOP)/configs/current
LIBNAME = radeonwinsys
C_SOURCES = \
- radeon_buffer.c \
+ radeon_drm_buffer.c \
radeon_drm.c \
radeon_r300.c
diff --git a/src/gallium/winsys/drm/radeon/core/radeon_buffer.h b/src/gallium/winsys/drm/radeon/core/radeon_buffer.h
index f776e2d900..e1fcfcfcca 100644
--- a/src/gallium/winsys/drm/radeon/core/radeon_buffer.h
+++ b/src/gallium/winsys/drm/radeon/core/radeon_buffer.h
@@ -30,48 +30,56 @@
#ifndef RADEON_BUFFER_H
#define RADEON_BUFFER_H
+#include <stdio.h>
+
+#include "pipe/p_defines.h"
+#include "util/u_inlines.h"
+
#include "pipebuffer/pb_buffer.h"
+#include "pipebuffer/pb_bufmgr.h"
#include "radeon_bo.h"
#include "radeon_cs.h"
#include "radeon_winsys.h"
-struct radeon_pipe_buffer {
- struct pipe_buffer base;
- /* Pointer to GPU-backed BO. */
- struct radeon_bo *bo;
- /* Pointer to fallback PB buffer. */
- struct pb_buffer *pb;
- boolean flinked;
- uint32_t flink;
-};
#define RADEON_MAX_BOS 24
-struct radeon_winsys_priv {
- /* DRM FD */
- int fd;
+static INLINE struct pb_buffer *
+radeon_pb_buffer(struct r300_winsys_buffer *buffer)
+{
+ return (struct pb_buffer *)buffer;
+}
- /* Radeon BO manager. */
- struct radeon_bo_manager* bom;
+static INLINE struct r300_winsys_buffer *
+radeon_libdrm_winsys_buffer(struct pb_buffer *buffer)
+{
+ return (struct r300_winsys_buffer *)buffer;
+}
- /* Radeon CS manager. */
- struct radeon_cs_manager* csm;
+struct pb_manager *
+radeon_drm_bufmgr_create(struct radeon_libdrm_winsys *rws);
- /* Current CS. */
- struct radeon_cs* cs;
+boolean radeon_drm_bufmgr_add_buffer(struct pb_buffer *_buf,
+ uint32_t rd, uint32_t wd);
- /* Flush CB */
- void (*flush_cb)(void *);
- void *flush_data;
-};
-struct radeon_winsys* radeon_pipe_winsys(int fb);
-#if 0
-struct pipe_surface *radeon_surface_from_handle(struct radeon_context *radeon_context,
- uint32_t handle,
- enum pipe_format format,
- int w, int h, int pitch);
-#endif
+void radeon_drm_bufmgr_write_reloc(struct pb_buffer *_buf,
+ uint32_t rd, uint32_t wd,
+ uint32_t flags);
+
+struct radeon_libdrm_winsys* radeon_pipe_winsys(int fd);
+
+struct pb_buffer *radeon_drm_bufmgr_create_buffer_from_handle(struct pb_manager *_mgr,
+ uint32_t handle);
+
+void radeon_drm_bufmgr_set_tiling(struct pb_buffer *_buf, boolean microtiled, boolean macrotiled, uint32_t pitch);
+
+void radeon_drm_bufmgr_flush_maps(struct pb_manager *_mgr);
+
+boolean radeon_drm_bufmgr_get_handle(struct pb_buffer *_buf,
+ struct winsys_handle *whandle);
+
+boolean radeon_drm_bufmgr_is_buffer_referenced(struct pb_buffer *_buf);
#endif
diff --git a/src/gallium/winsys/drm/radeon/core/radeon_drm.c b/src/gallium/winsys/drm/radeon/core/radeon_drm.c
index 97edb6a47e..d70173e805 100644
--- a/src/gallium/winsys/drm/radeon/core/radeon_drm.c
+++ b/src/gallium/winsys/drm/radeon/core/radeon_drm.c
@@ -41,8 +41,22 @@
#include "xf86drm.h"
#include <sys/ioctl.h>
+static struct radeon_libdrm_winsys *
+radeon_winsys_create(int fd)
+{
+ struct radeon_libdrm_winsys *rws;
+
+ rws = CALLOC_STRUCT(radeon_libdrm_winsys);
+ if (rws == NULL) {
+ return NULL;
+ }
+
+ rws->fd = fd;
+ return rws;
+}
+
/* Helper function to do the ioctls needed for setup and init. */
-static void do_ioctls(int fd, struct radeon_winsys* winsys)
+static void do_ioctls(int fd, struct radeon_libdrm_winsys* winsys)
{
struct drm_radeon_gem_info gem_info = {0};
struct drm_radeon_info info = {0};
@@ -133,19 +147,28 @@ struct pipe_screen* radeon_create_screen(struct drm_api* api,
int drmFB,
struct drm_create_screen_arg *arg)
{
- struct radeon_winsys* rwinsys = radeon_pipe_winsys(drmFB);
- do_ioctls(drmFB, rwinsys);
+ struct radeon_libdrm_winsys* rws;
+ boolean ret;
+
+ rws = radeon_winsys_create(drmFB);
+ if (!rws)
+ return NULL;
+
+ do_ioctls(drmFB, rws);
/* The state tracker can organize a softpipe fallback if no hw
* driver is found.
*/
- if (is_r3xx(rwinsys->pci_id)) {
- radeon_setup_winsys(drmFB, rwinsys);
- return r300_create_screen(rwinsys);
- } else {
- FREE(rwinsys);
- return NULL;
+ if (is_r3xx(rws->pci_id)) {
+ ret = radeon_setup_winsys(drmFB, rws);
+ if (ret == FALSE)
+ goto fail;
+ return r300_create_screen(&rws->base);
}
+
+fail:
+ FREE(rws);
+ return NULL;
}
static void radeon_drm_api_destroy(struct drm_api *api)
diff --git a/src/gallium/winsys/drm/radeon/core/radeon_drm.h b/src/gallium/winsys/drm/radeon/core/radeon_drm.h
index 78451b6f01..2dc077c052 100644
--- a/src/gallium/winsys/drm/radeon/core/radeon_drm.h
+++ b/src/gallium/winsys/drm/radeon/core/radeon_drm.h
@@ -37,6 +37,22 @@ struct pipe_screen* radeon_create_screen(struct drm_api* api,
int drmFB,
struct drm_create_screen_arg *arg);
+boolean radeon_buffer_from_texture(struct drm_api* api,
+ struct pipe_screen* screen,
+ struct pipe_texture* texture,
+ struct pipe_buffer** buffer,
+ unsigned* stride);
+
+boolean radeon_handle_from_buffer(struct drm_api* api,
+ struct pipe_screen* screen,
+ struct pipe_buffer* buffer,
+ unsigned* handle);
+
+boolean radeon_global_handle_from_buffer(struct drm_api* api,
+ struct pipe_screen* screen,
+ struct pipe_buffer* buffer,
+ unsigned* handle);
+
void radeon_destroy_drm_api(struct drm_api* api);
/* Guess at whether this chipset should use r300g.
diff --git a/src/gallium/winsys/drm/radeon/core/radeon_drm_buffer.c b/src/gallium/winsys/drm/radeon/core/radeon_drm_buffer.c
new file mode 100644
index 0000000000..cc56a2bb8f
--- /dev/null
+++ b/src/gallium/winsys/drm/radeon/core/radeon_drm_buffer.c
@@ -0,0 +1,368 @@
+
+#include <sys/ioctl.h>
+#include "radeon_drm.h"
+#include "radeon_bo_gem.h"
+#include "radeon_cs_gem.h"
+#include "radeon_buffer.h"
+
+#include "util/u_inlines.h"
+#include "util/u_memory.h"
+#include "util/u_simple_list.h"
+#include "pipebuffer/pb_buffer.h"
+#include "pipebuffer/pb_bufmgr.h"
+
+#include "radeon_winsys.h"
+struct radeon_drm_bufmgr;
+
+struct radeon_drm_buffer {
+ struct pb_buffer base;
+ struct radeon_drm_bufmgr *mgr;
+
+ struct radeon_bo *bo;
+
+ boolean flinked;
+ uint32_t flink;
+
+ boolean mapped;
+ struct radeon_drm_buffer *next, *prev;
+};
+
+extern const struct pb_vtbl radeon_drm_buffer_vtbl;
+
+
+static INLINE struct radeon_drm_buffer *
+radeon_drm_buffer(struct pb_buffer *buf)
+{
+ assert(buf);
+ assert(buf->vtbl == &radeon_drm_buffer_vtbl);
+ return (struct radeon_drm_buffer *)buf;
+}
+
+struct radeon_drm_bufmgr {
+ struct pb_manager base;
+ struct radeon_libdrm_winsys *rws;
+ struct radeon_drm_buffer buffer_map_list;
+};
+
+static INLINE struct radeon_drm_bufmgr *
+radeon_drm_bufmgr(struct pb_manager *mgr)
+{
+ assert(mgr);
+ return (struct radeon_drm_bufmgr *)mgr;
+}
+
+static void
+radeon_drm_buffer_destroy(struct pb_buffer *_buf)
+{
+ struct radeon_drm_buffer *buf = radeon_drm_buffer(_buf);
+
+ if (buf->mapped) {
+ remove_from_list(buf);
+ radeon_bo_unmap(buf->bo);
+ buf->mapped = false;
+ }
+ radeon_bo_unref(buf->bo);
+
+ FREE(buf);
+}
+
+static void *
+radeon_drm_buffer_map(struct pb_buffer *_buf,
+ unsigned flags)
+{
+ struct radeon_drm_buffer *buf = radeon_drm_buffer(_buf);
+ int write;
+
+ if (buf->mapped)
+ return buf->bo->ptr;
+
+ if (flags & PIPE_BUFFER_USAGE_DONTBLOCK) {
+ uint32_t domain;
+
+ if (radeon_bo_is_busy(buf->bo, &domain))
+ return NULL;
+ }
+
+
+ if (radeon_bo_is_referenced_by_cs(buf->bo, buf->mgr->rws->cs)) {
+ buf->mgr->rws->flush_cb(buf->mgr->rws->flush_data);
+ }
+
+ if (flags & PIPE_BUFFER_USAGE_CPU_WRITE) {
+ write = 1;
+ }
+
+ if (radeon_bo_map(buf->bo, write)) {
+ return NULL;
+ }
+ buf->mapped = true;
+ insert_at_tail(&buf->mgr->buffer_map_list, buf);
+ return buf->bo->ptr;
+}
+
+static void
+radeon_drm_buffer_unmap(struct pb_buffer *_buf)
+{
+ (void)_buf;
+}
+
+static void
+radeon_drm_buffer_get_base_buffer(struct pb_buffer *buf,
+ struct pb_buffer **base_buf,
+ unsigned *offset)
+{
+ *base_buf = buf;
+ *offset = 0;
+}
+
+
+static enum pipe_error
+radeon_drm_buffer_validate(struct pb_buffer *_buf,
+ struct pb_validate *vl,
+ unsigned flags)
+{
+ /* Always pinned */
+ return PIPE_OK;
+}
+
+static void
+radeon_drm_buffer_fence(struct pb_buffer *buf,
+ struct pipe_fence_handle *fence)
+{
+}
+
+const struct pb_vtbl radeon_drm_buffer_vtbl = {
+ radeon_drm_buffer_destroy,
+ radeon_drm_buffer_map,
+ radeon_drm_buffer_unmap,
+ radeon_drm_buffer_validate,
+ radeon_drm_buffer_fence,
+ radeon_drm_buffer_get_base_buffer,
+};
+
+
+static uint32_t radeon_domain_from_usage(unsigned usage)
+{
+ uint32_t domain = 0;
+
+ if (usage & PIPE_BUFFER_USAGE_GPU_WRITE) {
+ domain |= RADEON_GEM_DOMAIN_VRAM;
+ }
+ if (usage & PIPE_BUFFER_USAGE_PIXEL) {
+ domain |= RADEON_GEM_DOMAIN_VRAM;
+ }
+ if (usage & PIPE_BUFFER_USAGE_VERTEX) {
+ domain |= RADEON_GEM_DOMAIN_GTT;
+ }
+ if (usage & PIPE_BUFFER_USAGE_INDEX) {
+ domain |= RADEON_GEM_DOMAIN_GTT;
+ }
+
+ return domain;
+}
+
+struct pb_buffer *radeon_drm_bufmgr_create_buffer_from_handle(struct pb_manager *_mgr,
+ uint32_t handle)
+{
+ struct radeon_drm_bufmgr *mgr = radeon_drm_bufmgr(_mgr);
+ struct radeon_libdrm_winsys *rws = mgr->rws;
+ struct radeon_drm_buffer *buf;
+ struct radeon_bo *bo;
+
+ bo = radeon_bo_open(rws->bom, handle, 0,
+ 0, 0, 0);
+ if (bo == NULL)
+ return NULL;
+
+ buf = CALLOC_STRUCT(radeon_drm_buffer);
+ if (!buf) {
+ radeon_bo_unref(bo);
+ return NULL;
+ }
+
+ make_empty_list(buf);
+
+ pipe_reference_init(&buf->base.base.reference, 1);
+ buf->base.base.alignment = 0;
+ buf->base.base.usage = PIPE_BUFFER_USAGE_PIXEL;
+ buf->base.base.size = 0;
+ buf->base.vtbl = &radeon_drm_buffer_vtbl;
+ buf->mgr = mgr;
+
+ buf->bo = bo;
+
+ return &buf->base;
+}
+
+static struct pb_buffer *
+radeon_drm_bufmgr_create_buffer(struct pb_manager *_mgr,
+ pb_size size,
+ const struct pb_desc *desc)
+{
+ struct radeon_drm_bufmgr *mgr = radeon_drm_bufmgr(_mgr);
+ struct radeon_libdrm_winsys *rws = mgr->rws;
+ struct radeon_drm_buffer *buf;
+ uint32_t domain;
+
+ buf = CALLOC_STRUCT(radeon_drm_buffer);
+ if (!buf)
+ goto error1;
+
+ pipe_reference_init(&buf->base.base.reference, 1);
+ buf->base.base.alignment = desc->alignment;
+ buf->base.base.usage = desc->usage;
+ buf->base.base.size = size;
+ buf->base.vtbl = &radeon_drm_buffer_vtbl;
+ buf->mgr = mgr;
+
+ make_empty_list(buf);
+ domain = radeon_domain_from_usage(desc->usage);
+ buf->bo = radeon_bo_open(rws->bom, 0, size,
+ desc->alignment, domain, 0);
+ if (buf->bo == NULL)
+ goto error2;
+
+ return &buf->base;
+
+ error2:
+ FREE(buf);
+ error1:
+ return NULL;
+}
+
+static void
+radeon_drm_bufmgr_flush(struct pb_manager *mgr)
+{
+ /* NOP */
+}
+
+static void
+radeon_drm_bufmgr_destroy(struct pb_manager *_mgr)
+{
+ struct radeon_drm_bufmgr *mgr = radeon_drm_bufmgr(_mgr);
+ FREE(mgr);
+}
+
+struct pb_manager *
+radeon_drm_bufmgr_create(struct radeon_libdrm_winsys *rws)
+{
+ struct radeon_drm_bufmgr *mgr;
+
+ mgr = CALLOC_STRUCT(radeon_drm_bufmgr);
+ if (!mgr)
+ return NULL;
+
+ mgr->base.destroy = radeon_drm_bufmgr_destroy;
+ mgr->base.create_buffer = radeon_drm_bufmgr_create_buffer;
+ mgr->base.flush = radeon_drm_bufmgr_flush;
+
+ mgr->rws = rws;
+ make_empty_list(&mgr->buffer_map_list);
+ return &mgr->base;
+}
+
+static struct radeon_drm_buffer *get_drm_buffer(struct pb_buffer *_buf)
+{
+ struct radeon_drm_buffer *buf;
+ if (_buf->vtbl == &radeon_drm_buffer_vtbl) {
+ buf = radeon_drm_buffer(_buf);
+ } else {
+ struct pb_buffer *base_buf;
+ pb_size offset;
+ pb_get_base_buffer(_buf, &base_buf, &offset);
+
+ buf = radeon_drm_buffer(base_buf);
+ }
+ return buf;
+}
+
+boolean radeon_drm_bufmgr_get_handle(struct pb_buffer *_buf,
+ struct winsys_handle *whandle)
+{
+ int retval, fd;
+ struct drm_gem_flink flink;
+ struct radeon_drm_buffer *buf = get_drm_buffer(_buf);
+ if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) {
+ if (!buf->flinked) {
+ fd = buf->mgr->rws->fd;
+ flink.handle = buf->bo->handle;
+
+ retval = ioctl(fd, DRM_IOCTL_GEM_FLINK, &flink);
+ if (retval) {
+ return false;
+ }
+
+ buf->flinked = TRUE;
+ buf->flink = flink.name;
+ }
+ whandle->handle = buf->flink;
+ } else if (whandle->type == DRM_API_HANDLE_TYPE_KMS) {
+ whandle->handle = buf->bo->handle;
+ }
+ return TRUE;
+}
+
+
+void radeon_drm_bufmgr_set_tiling(struct pb_buffer *_buf, boolean microtiled, boolean macrotiled, uint32_t pitch)
+{
+ struct radeon_drm_buffer *buf = get_drm_buffer(_buf);
+ uint32_t flags = 0;
+
+ if (microtiled)
+ flags |= RADEON_BO_FLAGS_MICRO_TILE;
+ if (macrotiled)
+ flags |= RADEON_BO_FLAGS_MACRO_TILE;
+
+ radeon_bo_set_tiling(buf->bo, flags, pitch);
+
+}
+
+boolean radeon_drm_bufmgr_add_buffer(struct pb_buffer *_buf,
+ uint32_t rd, uint32_t wd)
+{
+ struct radeon_drm_buffer *buf = get_drm_buffer(_buf);
+ radeon_cs_space_add_persistent_bo(buf->mgr->rws->cs, buf->bo,
+ rd, wd);
+ return true;
+}
+
+void radeon_drm_bufmgr_write_reloc(struct pb_buffer *_buf,
+ uint32_t rd, uint32_t wd,
+ uint32_t flags)
+{
+ struct radeon_drm_buffer *buf = get_drm_buffer(_buf);
+ int retval;
+
+ retval = radeon_cs_write_reloc(buf->mgr->rws->cs,
+ buf->bo, rd, wd, flags);
+ if (retval) {
+ debug_printf("radeon: Relocation of %p (%d, %d, %d) failed!\n",
+ buf, rd, wd, flags);
+ }
+}
+
+boolean radeon_drm_bufmgr_is_buffer_referenced(struct pb_buffer *_buf)
+{
+ struct radeon_drm_buffer *buf = get_drm_buffer(_buf);
+ uint32_t domain;
+
+ return (radeon_bo_is_referenced_by_cs(buf->bo, buf->mgr->rws->cs) ||
+ radeon_bo_is_busy(buf->bo, &domain));
+}
+
+
+void radeon_drm_bufmgr_flush_maps(struct pb_manager *_mgr)
+{
+ struct radeon_drm_bufmgr *mgr = radeon_drm_bufmgr(_mgr);
+ struct radeon_drm_buffer *rpb, *t_rpb;
+
+ foreach_s(rpb, t_rpb, &mgr->buffer_map_list) {
+ rpb->mapped = 0;
+ radeon_bo_unmap(rpb->bo);
+ remove_from_list(rpb);
+ }
+
+ make_empty_list(&mgr->buffer_map_list);
+
+
+}
diff --git a/src/gallium/winsys/drm/radeon/core/radeon_r300.c b/src/gallium/winsys/drm/radeon/core/radeon_r300.c
index 122bd21354..5b82a776a8 100644
--- a/src/gallium/winsys/drm/radeon/core/radeon_r300.c
+++ b/src/gallium/winsys/drm/radeon/core/radeon_r300.c
@@ -23,31 +23,139 @@
#include "radeon_r300.h"
#include "radeon_buffer.h"
+#include "radeon_bo_gem.h"
#include "radeon_cs_gem.h"
+#include "state_tracker/drm_api.h"
-static void radeon_set_flush_cb(struct radeon_winsys *winsys,
+static struct r300_winsys_buffer *
+radeon_r300_winsys_buffer_create(struct r300_winsys_screen *rws,
+ unsigned alignment,
+ unsigned usage,
+ unsigned size)
+{
+ struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws);
+ struct pb_desc desc;
+ struct pb_manager *provider;
+ struct pb_buffer *buffer;
+
+ memset(&desc, 0, sizeof(desc));
+ desc.alignment = alignment;
+ desc.usage = usage;
+
+ if (usage & PIPE_BUFFER_USAGE_CONSTANT)
+ provider = ws->mman;
+ else
+ provider = ws->kman;
+ buffer = provider->create_buffer(provider, size, &desc);
+ if (!buffer)
+ return NULL;
+
+ return radeon_libdrm_winsys_buffer(buffer);
+}
+
+static void radeon_r300_winsys_buffer_destroy(struct r300_winsys_buffer *buf)
+{
+ struct pb_buffer *_buf = radeon_pb_buffer(buf);
+
+ pb_destroy(_buf);
+}
+static void radeon_r300_winsys_buffer_set_tiling(struct r300_winsys_screen *rws,
+ struct r300_winsys_buffer *buf,
+ uint32_t pitch,
+ boolean microtiled,
+ boolean macrotiled)
+{
+ struct pb_buffer *_buf = radeon_pb_buffer(buf);
+ radeon_drm_bufmgr_set_tiling(_buf, microtiled, macrotiled, pitch);
+}
+
+static void *radeon_r300_winsys_buffer_map(struct r300_winsys_screen *ws,
+ struct r300_winsys_buffer *buf,
+ unsigned usage)
+{
+ struct pb_buffer *_buf = radeon_pb_buffer(buf);
+
+ return pb_map(_buf, usage);
+}
+
+static void radeon_r300_winsys_buffer_unmap(struct r300_winsys_screen *ws,
+ struct r300_winsys_buffer *buf)
+{
+ struct pb_buffer *_buf = radeon_pb_buffer(buf);
+
+ pb_unmap(_buf);
+}
+
+static void radeon_r300_winsys_buffer_reference(struct r300_winsys_screen *rws,
+ struct r300_winsys_buffer **pdst,
+ struct r300_winsys_buffer *src)
+{
+ struct pb_buffer *_src = radeon_pb_buffer(src);
+ struct pb_buffer *_dst = radeon_pb_buffer(*pdst);
+
+ pb_reference(&_dst, _src);
+
+ *pdst = radeon_libdrm_winsys_buffer(_dst);
+}
+
+static boolean radeon_r300_winsys_is_buffer_referenced(struct r300_winsys_screen *rws,
+ struct r300_winsys_buffer *buf)
+{
+ struct pb_buffer *_buf = radeon_pb_buffer(buf);
+
+ return radeon_drm_bufmgr_is_buffer_referenced(_buf);
+}
+
+static struct r300_winsys_buffer *radeon_r300_winsys_buffer_from_handle(struct r300_winsys_screen *rws,
+ struct pipe_screen *screen,
+ struct winsys_handle *whandle,
+ unsigned *stride)
+{
+ struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws);
+ struct pb_buffer *_buf;
+
+ _buf = radeon_drm_bufmgr_create_buffer_from_handle(ws->kman, whandle->handle);
+ *stride = whandle->stride;
+ return radeon_libdrm_winsys_buffer(_buf);
+}
+
+static boolean radeon_r300_winsys_buffer_get_handle(struct r300_winsys_screen *rws,
+ struct r300_winsys_buffer *buffer,
+ unsigned stride,
+ struct winsys_handle *whandle)
+{
+ struct pb_buffer *_buf = radeon_pb_buffer(buffer);
+ boolean ret;
+ ret = radeon_drm_bufmgr_get_handle(_buf, whandle);
+ if (ret)
+ whandle->stride = stride;
+ return ret;
+}
+
+static void radeon_set_flush_cb(struct r300_winsys_screen *rws,
void (*flush_cb)(void *),
void *data)
{
- winsys->priv->flush_cb = flush_cb;
- winsys->priv->flush_data = data;
- radeon_cs_space_set_flush(winsys->priv->cs, flush_cb, data);
+ struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws);
+ ws->flush_cb = flush_cb;
+ ws->flush_data = data;
+ radeon_cs_space_set_flush(ws->cs, flush_cb, data);
}
-static boolean radeon_add_buffer(struct radeon_winsys* winsys,
- struct pipe_buffer* pbuffer,
+static boolean radeon_add_buffer(struct r300_winsys_screen *rws,
+ struct r300_winsys_buffer *buf,
uint32_t rd,
uint32_t wd)
{
- struct radeon_bo* bo = ((struct radeon_pipe_buffer*)pbuffer)->bo;
+ struct pb_buffer *_buf = radeon_pb_buffer(buf);
- radeon_cs_space_add_persistent_bo(winsys->priv->cs, bo, rd, wd);
- return TRUE;
+ return radeon_drm_bufmgr_add_buffer(_buf, rd, wd);
}
-static boolean radeon_validate(struct radeon_winsys* winsys)
+static boolean radeon_validate(struct r300_winsys_screen *rws)
{
- if (radeon_cs_space_check(winsys->priv->cs) < 0) {
+ struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws);
+ if (radeon_cs_space_check(ws->cs) < 0) {
return FALSE;
}
@@ -55,108 +163,175 @@ static boolean radeon_validate(struct radeon_winsys* winsys)
return TRUE;
}
-static boolean radeon_check_cs(struct radeon_winsys* winsys, int size)
+static boolean radeon_check_cs(struct r300_winsys_screen *rws, int size)
{
- struct radeon_cs* cs = winsys->priv->cs;
+ struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws);
+ struct radeon_cs *cs = ws->cs;
- return radeon_validate(winsys) && cs->cdw + size <= cs->ndw;
+ return radeon_validate(rws) && cs->cdw + size <= cs->ndw;
}
-static void radeon_begin_cs(struct radeon_winsys* winsys,
+static void radeon_begin_cs(struct r300_winsys_screen *rws,
int size,
const char* file,
const char* function,
int line)
{
- radeon_cs_begin(winsys->priv->cs, size, file, function, line);
+ struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws);
+ radeon_cs_begin(ws->cs, size, file, function, line);
}
-static void radeon_write_cs_dword(struct radeon_winsys* winsys,
+static void radeon_write_cs_dword(struct r300_winsys_screen *rws,
uint32_t dword)
{
- radeon_cs_write_dword(winsys->priv->cs, dword);
+ struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws);
+ radeon_cs_write_dword(ws->cs, dword);
}
-static void radeon_write_cs_reloc(struct radeon_winsys* winsys,
- struct pipe_buffer* pbuffer,
+static void radeon_write_cs_reloc(struct r300_winsys_screen *rws,
+ struct r300_winsys_buffer *buf,
uint32_t rd,
uint32_t wd,
uint32_t flags)
{
- int retval = 0;
- struct radeon_pipe_buffer* radeon_buffer =
- (struct radeon_pipe_buffer*)pbuffer;
-
- assert(!radeon_buffer->pb);
-
- retval = radeon_cs_write_reloc(winsys->priv->cs, radeon_buffer->bo,
- rd, wd, flags);
-
- if (retval) {
- debug_printf("radeon: Relocation of %p (%d, %d, %d) failed!\n",
- pbuffer, rd, wd, flags);
- }
+ struct pb_buffer *_buf = radeon_pb_buffer(buf);
+ radeon_drm_bufmgr_write_reloc(_buf, rd, wd, flags);
}
-static void radeon_reset_bos(struct radeon_winsys *winsys)
+static void radeon_reset_bos(struct r300_winsys_screen *rws)
{
- radeon_cs_space_reset_bos(winsys->priv->cs);
+ struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws);
+ radeon_cs_space_reset_bos(ws->cs);
}
-static void radeon_end_cs(struct radeon_winsys* winsys,
+static void radeon_end_cs(struct r300_winsys_screen *rws,
const char* file,
const char* function,
int line)
{
- radeon_cs_end(winsys->priv->cs, file, function, line);
+ struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws);
+ radeon_cs_end(ws->cs, file, function, line);
}
-static void radeon_flush_cs(struct radeon_winsys* winsys)
+static void radeon_flush_cs(struct r300_winsys_screen *rws)
{
+ struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws);
int retval;
/* Don't flush a zero-sized CS. */
- if (!winsys->priv->cs->cdw) {
+ if (!ws->cs->cdw) {
return;
}
+ radeon_drm_bufmgr_flush_maps(ws->kman);
/* Emit the CS. */
- retval = radeon_cs_emit(winsys->priv->cs);
+ retval = radeon_cs_emit(ws->cs);
if (retval) {
debug_printf("radeon: Bad CS, dumping...\n");
- radeon_cs_print(winsys->priv->cs, stderr);
+ radeon_cs_print(ws->cs, stderr);
}
/* Reset CS.
* Someday, when we care about performance, we should really find a way
* to rotate between two or three CS objects so that the GPU can be
* spinning through one CS while another one is being filled. */
- radeon_cs_erase(winsys->priv->cs);
+ radeon_cs_erase(ws->cs);
}
-void
-radeon_setup_winsys(int fd, struct radeon_winsys* winsys)
+static uint32_t radeon_get_value(struct r300_winsys_screen *rws,
+ enum r300_value_id id)
{
- struct radeon_winsys_priv* priv = winsys->priv;
+ struct radeon_libdrm_winsys *ws = (struct radeon_libdrm_winsys *)rws;
- priv->csm = radeon_cs_manager_gem_ctor(fd);
+ switch(id) {
+ case R300_VID_PCI_ID:
+ return ws->pci_id;
+ case R300_VID_GB_PIPES:
+ return ws->gb_pipes;
+ case R300_VID_Z_PIPES:
+ return ws->z_pipes;
+ }
+ return 0;
+}
+
+static void
+radeon_winsys_destroy(struct r300_winsys_screen *rws)
+{
+ struct radeon_libdrm_winsys *ws = (struct radeon_libdrm_winsys *)rws;
+ radeon_cs_destroy(ws->cs);
+
+ ws->kman->destroy(ws->kman);
+ ws->mman->destroy(ws->mman);
+
+ radeon_bo_manager_gem_dtor(ws->bom);
+ radeon_cs_manager_gem_dtor(ws->csm);
+}
+
+boolean
+radeon_setup_winsys(int fd, struct radeon_libdrm_winsys* ws)
+{
+
+ ws->csm = radeon_cs_manager_gem_ctor(fd);
+ if (!ws->csm)
+ goto fail;
+ ws->bom = radeon_bo_manager_gem_ctor(fd);
+ if (!ws->bom)
+ goto fail;
+ ws->kman = radeon_drm_bufmgr_create(ws);
+ if (!ws->kman)
+ goto fail;
+
+ ws->mman = pb_malloc_bufmgr_create();
+ if (!ws->mman)
+ goto fail;
/* Size limit on IBs is 64 kibibytes. */
- priv->cs = radeon_cs_create(priv->csm, 1024 * 64 / 4);
- radeon_cs_set_limit(priv->cs,
- RADEON_GEM_DOMAIN_GTT, winsys->gart_size);
- radeon_cs_set_limit(priv->cs,
- RADEON_GEM_DOMAIN_VRAM, winsys->vram_size);
-
- winsys->add_buffer = radeon_add_buffer;
- winsys->validate = radeon_validate;
-
- winsys->check_cs = radeon_check_cs;
- winsys->begin_cs = radeon_begin_cs;
- winsys->write_cs_dword = radeon_write_cs_dword;
- winsys->write_cs_reloc = radeon_write_cs_reloc;
- winsys->end_cs = radeon_end_cs;
- winsys->flush_cs = radeon_flush_cs;
- winsys->reset_bos = radeon_reset_bos;
- winsys->set_flush_cb = radeon_set_flush_cb;
+ ws->cs = radeon_cs_create(ws->csm, 1024 * 64 / 4);
+ if (!ws->cs)
+ goto fail;
+ radeon_cs_set_limit(ws->cs,
+ RADEON_GEM_DOMAIN_GTT, ws->gart_size);
+ radeon_cs_set_limit(ws->cs,
+ RADEON_GEM_DOMAIN_VRAM, ws->vram_size);
+
+ ws->base.add_buffer = radeon_add_buffer;
+ ws->base.validate = radeon_validate;
+ ws->base.destroy = radeon_winsys_destroy;
+ ws->base.check_cs = radeon_check_cs;
+ ws->base.begin_cs = radeon_begin_cs;
+ ws->base.write_cs_dword = radeon_write_cs_dword;
+ ws->base.write_cs_reloc = radeon_write_cs_reloc;
+ ws->base.end_cs = radeon_end_cs;
+ ws->base.flush_cs = radeon_flush_cs;
+ ws->base.reset_bos = radeon_reset_bos;
+ ws->base.set_flush_cb = radeon_set_flush_cb;
+ ws->base.get_value = radeon_get_value;
+
+ ws->base.buffer_create = radeon_r300_winsys_buffer_create;
+ ws->base.buffer_destroy = radeon_r300_winsys_buffer_destroy;
+ ws->base.buffer_set_tiling = radeon_r300_winsys_buffer_set_tiling;
+ ws->base.buffer_map = radeon_r300_winsys_buffer_map;
+ ws->base.buffer_unmap = radeon_r300_winsys_buffer_unmap;
+ ws->base.buffer_reference = radeon_r300_winsys_buffer_reference;
+ ws->base.buffer_from_handle = radeon_r300_winsys_buffer_from_handle;
+ ws->base.buffer_get_handle = radeon_r300_winsys_buffer_get_handle;
+ ws->base.is_buffer_referenced = radeon_r300_winsys_is_buffer_referenced;
+ return TRUE;
+
+fail:
+ if (ws->csm)
+ radeon_cs_manager_gem_dtor(ws->csm);
+
+ if (ws->bom)
+ radeon_bo_manager_gem_dtor(ws->bom);
+
+
+ if (ws->kman)
+ ws->kman->destroy(ws->kman);
+ if (ws->mman)
+ ws->mman->destroy(ws->mman);
+
+ if (ws->cs)
+ radeon_cs_destroy(ws->cs);
+ return FALSE;
}
diff --git a/src/gallium/winsys/drm/radeon/core/radeon_r300.h b/src/gallium/winsys/drm/radeon/core/radeon_r300.h
index e655dc32c8..2703464ad8 100644
--- a/src/gallium/winsys/drm/radeon/core/radeon_r300.h
+++ b/src/gallium/winsys/drm/radeon/core/radeon_r300.h
@@ -25,6 +25,6 @@
#include "radeon_winsys.h"
-void radeon_setup_winsys(int fd, struct radeon_winsys* winsys);
+boolean radeon_setup_winsys(int fd, struct radeon_libdrm_winsys* winsys);
#endif /* RADEON_R300_H */
diff --git a/src/gallium/winsys/drm/radeon/core/radeon_winsys.h b/src/gallium/winsys/drm/radeon/core/radeon_winsys.h
index 887a381cc4..16cc701ad6 100644
--- a/src/gallium/winsys/drm/radeon/core/radeon_winsys.h
+++ b/src/gallium/winsys/drm/radeon/core/radeon_winsys.h
@@ -30,16 +30,15 @@
#ifndef RADEON_WINSYS_H
#define RADEON_WINSYS_H
-#include "util/u_simple_screen.h"
+#include "r300_winsys.h"
-struct radeon_winsys_priv;
-
-struct radeon_winsys {
+struct radeon_libdrm_winsys {
/* Parent class. */
- struct pipe_winsys base;
+ struct r300_winsys_screen base;
+
+ struct pb_manager *kman;
- /* Winsys private */
- struct radeon_winsys_priv* priv;
+ struct pb_manager *mman;
/* PCI ID */
uint32_t pci_id;
@@ -56,71 +55,27 @@ struct radeon_winsys {
/* VRAM size. */
uint32_t vram_size;
- /* Create a buffer from a winsys handle. */
- struct pipe_buffer *(*buffer_from_handle)(struct radeon_winsys *winsys,
- struct pipe_screen *screen,
- struct winsys_handle *whandle,
- unsigned *stride);
-
- /* Get the handle from a buffer. */
- boolean (*buffer_get_handle)(struct radeon_winsys *winsys,
- struct pipe_buffer *buffer,
- unsigned stride,
- struct winsys_handle *whandle);
-
- /* Add a pipe_buffer to the list of buffer objects to validate. */
- boolean (*add_buffer)(struct radeon_winsys* winsys,
- struct pipe_buffer* pbuffer,
- uint32_t rd,
- uint32_t wd);
-
- /* Revalidate all currently setup pipe_buffers.
- * Returns TRUE if a flush is required. */
- boolean (*validate)(struct radeon_winsys* winsys);
-
- /* Check to see if there's room for commands. */
- boolean (*check_cs)(struct radeon_winsys* winsys, int size);
-
- /* Start a command emit. */
- void (*begin_cs)(struct radeon_winsys* winsys,
- int size,
- const char* file,
- const char* function,
- int line);
-
- /* Write a dword to the command buffer. */
- void (*write_cs_dword)(struct radeon_winsys* winsys, uint32_t dword);
-
- /* Write a relocated dword to the command buffer. */
- void (*write_cs_reloc)(struct radeon_winsys* winsys,
- struct pipe_buffer* bo,
- uint32_t rd,
- uint32_t wd,
- uint32_t flags);
-
- /* Finish a command emit. */
- void (*end_cs)(struct radeon_winsys* winsys,
- const char* file,
- const char* function,
- int line);
-
- /* Flush the CS. */
- void (*flush_cs)(struct radeon_winsys* winsys);
-
- /* winsys flush - callback from winsys when flush required */
- void (*set_flush_cb)(struct radeon_winsys *winsys,
- void (*flush_cb)(void *), void *data);
-
- void (*reset_bos)(struct radeon_winsys *winsys);
-
- void (*buffer_set_tiling)(struct radeon_winsys* winsys,
- struct pipe_buffer* buffer,
- uint32_t pitch,
- boolean microtiled,
- boolean macrotiled);
-
- boolean (*is_buffer_referenced)(struct radeon_winsys *winsys,
- struct pipe_buffer *buffer);
+ /* DRM FD */
+ int fd;
+
+ /* Radeon BO manager. */
+ struct radeon_bo_manager *bom;
+
+ /* Radeon CS manager. */
+ struct radeon_cs_manager *csm;
+
+ /* Current CS. */
+ struct radeon_cs *cs;
+
+ /* Flush CB */
+ void (*flush_cb)(void *);
+ void *flush_data;
};
+static INLINE struct radeon_libdrm_winsys *
+radeon_winsys_screen(struct r300_winsys_screen *base)
+{
+ return (struct radeon_libdrm_winsys *)base;
+}
+
#endif