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-rw-r--r--src/mesa/drivers/dri/i915/i830_state.c4
-rw-r--r--src/mesa/drivers/dri/i915/i830_texstate.c10
-rw-r--r--src/mesa/drivers/dri/i915/i830_vtbl.c5
-rw-r--r--src/mesa/drivers/dri/i915/i915_context.c3
-rw-r--r--src/mesa/drivers/dri/i915/i915_fragprog.c4
-rw-r--r--src/mesa/drivers/dri/i915/i915_state.c4
-rw-r--r--src/mesa/drivers/dri/i915/i915_texstate.c17
-rw-r--r--src/mesa/drivers/dri/i915/i915_vtbl.c5
-rw-r--r--src/mesa/drivers/dri/i915/intel_tris.c82
9 files changed, 27 insertions, 107 deletions
diff --git a/src/mesa/drivers/dri/i915/i830_state.c b/src/mesa/drivers/dri/i915/i830_state.c
index 645ebe3057..acda7e70de 100644
--- a/src/mesa/drivers/dri/i915/i830_state.c
+++ b/src/mesa/drivers/dri/i915/i830_state.c
@@ -620,7 +620,7 @@ i830LineWidth(GLcontext * ctx, GLfloat widthf)
DBG("%s\n", __FUNCTION__);
width = (int) (widthf * 2);
- CLAMP_SELF(width, 1, 15);
+ width = CLAMP(width, 1, 15);
state5 = i830->state.Ctx[I830_CTXREG_STATE5] & ~FIXED_LINE_WIDTH_MASK;
state5 |= (ENABLE_FIXED_LINE_WIDTH | FIXED_LINE_WIDTH(width));
@@ -639,7 +639,7 @@ i830PointSize(GLcontext * ctx, GLfloat size)
DBG("%s\n", __FUNCTION__);
- CLAMP_SELF(point_size, 1, 256);
+ point_size = CLAMP(point_size, 1, 256);
I830_STATECHANGE(i830, I830_UPLOAD_CTX);
i830->state.Ctx[I830_CTXREG_STATE5] &= ~FIXED_POINT_WIDTH_MASK;
i830->state.Ctx[I830_CTXREG_STATE5] |= (ENABLE_FIXED_POINT_WIDTH |
diff --git a/src/mesa/drivers/dri/i915/i830_texstate.c b/src/mesa/drivers/dri/i915/i830_texstate.c
index ce409b3a60..27c5aa1e08 100644
--- a/src/mesa/drivers/dri/i915/i830_texstate.c
+++ b/src/mesa/drivers/dri/i915/i830_texstate.c
@@ -27,6 +27,7 @@
#include "main/mtypes.h"
#include "main/enums.h"
+#include "main/colormac.h"
#include "intel_mipmap_tree.h"
#include "intel_tex.h"
@@ -308,11 +309,10 @@ i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
CLAMPED_FLOAT_TO_UBYTE(border[2], tObj->BorderColor[2]);
CLAMPED_FLOAT_TO_UBYTE(border[3], tObj->BorderColor[3]);
- state[I830_TEXREG_TM0S4] = INTEL_PACKCOLOR8888(border[0],
- border[1],
- border[2],
- border[3]);
-
+ state[I830_TEXREG_TM0S4] = PACK_COLOR_8888(border[3],
+ border[0],
+ border[1],
+ border[2]);
I830_ACTIVESTATE(i830, I830_UPLOAD_TEX(unit), GL_TRUE);
/* memcmp was already disabled, but definitely won't work as the
diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c
index e8c8d5a048..1e3c8301d8 100644
--- a/src/mesa/drivers/dri/i915/i830_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i830_vtbl.c
@@ -126,7 +126,7 @@ i830_render_start(struct intel_context *intel)
for (i = 0; i < I830_TEX_UNITS; i++) {
if (RENDERINPUTS_TEST(index_bitset, _TNL_ATTRIB_TEX(i))) {
- GLuint sz = VB->TexCoordPtr[i]->size;
+ GLuint sz = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size;
GLuint emit;
GLuint mcs = (i830->state.Tex[i][I830_TEXREG_MCS] &
~TEXCOORDTYPE_MASK);
@@ -714,9 +714,6 @@ i830_new_batch(struct intel_context *intel)
{
struct i830_context *i830 = i830_context(&intel->ctx);
i830->state.emitted = 0;
-
- /* Check that we didn't just wrap our batchbuffer at a bad time. */
- assert(!intel->no_batch_wrap);
}
static void
diff --git a/src/mesa/drivers/dri/i915/i915_context.c b/src/mesa/drivers/dri/i915/i915_context.c
index 7d4c7cfbab..0485be2cc1 100644
--- a/src/mesa/drivers/dri/i915/i915_context.c
+++ b/src/mesa/drivers/dri/i915/i915_context.c
@@ -143,6 +143,9 @@ i915CreateContext(const __GLcontextModes * mesaVis,
ctx->Const.MaxTextureImageUnits = I915_TEX_UNITS;
ctx->Const.MaxTextureCoordUnits = I915_TEX_UNITS;
ctx->Const.MaxVarying = I915_TEX_UNITS;
+ ctx->Const.MaxCombinedTextureImageUnits =
+ ctx->Const.MaxVertexTextureImageUnits +
+ ctx->Const.MaxTextureImageUnits;
/* Advertise the full hardware capabilities. The new memory
* manager should cope much better with overload situations:
diff --git a/src/mesa/drivers/dri/i915/i915_fragprog.c b/src/mesa/drivers/dri/i915/i915_fragprog.c
index d9c61446f5..a273bd28ea 100644
--- a/src/mesa/drivers/dri/i915/i915_fragprog.c
+++ b/src/mesa/drivers/dri/i915/i915_fragprog.c
@@ -663,7 +663,7 @@ upload_program(struct i915_fragment_program *p)
A0_MOV,
get_result_vector(p, inst),
get_result_flags(inst), 0,
- swizzle(src0, ZERO, ZERO, ZERO, ZERO), 0, 0);
+ swizzle(tmp, ZERO, ZERO, ZERO, ZERO), 0, 0);
case OPCODE_POW:
src0 = src_vector(p, &inst->SrcReg[0], program);
@@ -1301,7 +1301,7 @@ i915ValidateFragmentProgram(struct i915_context *i915)
for (i = 0; i < p->ctx->Const.MaxTextureCoordUnits; i++) {
if (inputsRead & FRAG_BIT_TEX(i)) {
- int sz = VB->TexCoordPtr[i]->size;
+ int sz = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size;
s2 &= ~S2_TEXCOORD_FMT(i, S2_TEXCOORD_FMT0_MASK);
s2 |= S2_TEXCOORD_FMT(i, SZ_TO_HW(sz));
diff --git a/src/mesa/drivers/dri/i915/i915_state.c b/src/mesa/drivers/dri/i915/i915_state.c
index cc98d125db..9d7a9e1dfe 100644
--- a/src/mesa/drivers/dri/i915/i915_state.c
+++ b/src/mesa/drivers/dri/i915/i915_state.c
@@ -571,7 +571,7 @@ i915LineWidth(GLcontext * ctx, GLfloat widthf)
DBG("%s\n", __FUNCTION__);
width = (int) (widthf * 2);
- CLAMP_SELF(width, 1, 0xf);
+ width = CLAMP(width, 1, 0xf);
lis4 |= width << S4_LINE_WIDTH_SHIFT;
if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
@@ -589,7 +589,7 @@ i915PointSize(GLcontext * ctx, GLfloat size)
DBG("%s\n", __FUNCTION__);
- CLAMP_SELF(point_size, 1, 255);
+ point_size = CLAMP(point_size, 1, 255);
lis4 |= point_size << S4_POINT_WIDTH_SHIFT;
if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c
index 825f1dbbe3..db71c00941 100644
--- a/src/mesa/drivers/dri/i915/i915_texstate.c
+++ b/src/mesa/drivers/dri/i915/i915_texstate.c
@@ -28,6 +28,7 @@
#include "main/mtypes.h"
#include "main/enums.h"
#include "main/macros.h"
+#include "main/colormac.h"
#include "intel_mipmap_tree.h"
#include "intel_tex.h"
@@ -357,15 +358,15 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
* R channel, while the hardware uses A. Spam R into all the channels
* for safety.
*/
- state[I915_TEXREG_SS4] = INTEL_PACKCOLOR8888(border[0],
- border[0],
- border[0],
- border[0]);
+ state[I915_TEXREG_SS4] = PACK_COLOR_8888(border[0],
+ border[0],
+ border[0],
+ border[0]);
} else {
- state[I915_TEXREG_SS4] = INTEL_PACKCOLOR8888(border[0],
- border[1],
- border[2],
- border[3]);
+ state[I915_TEXREG_SS4] = PACK_COLOR_8888(border[3],
+ border[0],
+ border[1],
+ border[2]);
}
diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c
index ff97e5a944..9f7635a953 100644
--- a/src/mesa/drivers/dri/i915/i915_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i915_vtbl.c
@@ -611,7 +611,7 @@ i915_state_draw_region(struct intel_context *intel,
* the value of this bit, the pipeline needs to be MI_FLUSHed. And it
* can only be set when a depth buffer is already defined.
*/
- if (IS_945(intel->intelScreen->deviceID) && intel->use_early_z &&
+ if (intel->is_945 && intel->use_early_z &&
depth_region->tiling != I915_TILING_NONE)
value |= CLASSIC_EARLY_DEPTH;
@@ -667,9 +667,6 @@ i915_new_batch(struct intel_context *intel)
* difficulties associated with them (physical address requirements).
*/
i915->state.emitted = 0;
-
- /* Check that we didn't just wrap our batchbuffer at a bad time. */
- assert(!intel->no_batch_wrap);
}
static void
diff --git a/src/mesa/drivers/dri/i915/intel_tris.c b/src/mesa/drivers/dri/i915/intel_tris.c
index bc527aae47..63c5ae96dc 100644
--- a/src/mesa/drivers/dri/i915/intel_tris.c
+++ b/src/mesa/drivers/dri/i915/intel_tris.c
@@ -221,7 +221,7 @@ void intel_flush_prim(struct intel_context *intel)
intel->prim.count = 0;
offset = intel->prim.start_offset;
intel->prim.start_offset = intel->prim.current_offset;
- if (!IS_9XX(intel->intelScreen->deviceID))
+ if (!intel->gen >= 3)
intel->prim.start_offset = ALIGN(intel->prim.start_offset, 128);
intel->prim.flush = NULL;
@@ -251,7 +251,7 @@ void intel_flush_prim(struct intel_context *intel)
intel->vertex_size * 4);
#endif
- if (IS_9XX(intel->intelScreen->deviceID)) {
+ if (intel->gen >= 3) {
BEGIN_BATCH(5, LOOP_CLIPRECTS);
OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
I1_LOAD_S(0) | I1_LOAD_S(1) | 1);
@@ -1250,81 +1250,6 @@ union fi
GLint i;
};
-
-/**********************************************************************/
-/* Used only with the metaops callbacks. */
-/**********************************************************************/
-static void
-intel_meta_draw_poly(struct intel_context *intel,
- GLuint n,
- GLfloat xy[][2],
- GLfloat z, GLuint color, GLfloat tex[][2])
-{
- union fi *vb;
- GLint i;
- unsigned int saved_vertex_size = intel->vertex_size;
-
- LOCK_HARDWARE(intel);
-
- intel->vertex_size = 6;
-
- /* All 3d primitives should be emitted with LOOP_CLIPRECTS,
- * otherwise the drawing origin (DR4) might not be set correctly.
- */
- intel_set_prim(intel, PRIM3D_TRIFAN);
- vb = (union fi *) intel_get_prim_space(intel, n);
-
- for (i = 0; i < n; i++) {
- vb[0].f = xy[i][0];
- vb[1].f = xy[i][1];
- vb[2].f = z;
- vb[3].i = color;
- vb[4].f = tex[i][0];
- vb[5].f = tex[i][1];
- vb += 6;
- }
-
- INTEL_FIREVERTICES(intel);
-
- intel->vertex_size = saved_vertex_size;
-
- UNLOCK_HARDWARE(intel);
-}
-
-static void
-intel_meta_draw_quad(struct intel_context *intel,
- GLfloat x0, GLfloat x1,
- GLfloat y0, GLfloat y1,
- GLfloat z,
- GLuint color,
- GLfloat s0, GLfloat s1, GLfloat t0, GLfloat t1)
-{
- GLfloat xy[4][2];
- GLfloat tex[4][2];
-
- xy[0][0] = x0;
- xy[0][1] = y0;
- xy[1][0] = x1;
- xy[1][1] = y0;
- xy[2][0] = x1;
- xy[2][1] = y1;
- xy[3][0] = x0;
- xy[3][1] = y1;
-
- tex[0][0] = s0;
- tex[0][1] = t0;
- tex[1][0] = s1;
- tex[1][1] = t0;
- tex[2][0] = s1;
- tex[2][1] = t1;
- tex[3][0] = s0;
- tex[3][1] = t1;
-
- intel_meta_draw_poly(intel, 4, xy, z, color, tex);
-}
-
-
-
/**********************************************************************/
/* Initialization. */
/**********************************************************************/
@@ -1333,7 +1258,6 @@ intel_meta_draw_quad(struct intel_context *intel,
void
intelInitTriFuncs(GLcontext * ctx)
{
- struct intel_context *intel = intel_context(ctx);
TNLcontext *tnl = TNL_CONTEXT(ctx);
static int firsttime = 1;
@@ -1350,6 +1274,4 @@ intelInitTriFuncs(GLcontext * ctx)
tnl->Driver.Render.BuildVertices = _tnl_build_vertices;
tnl->Driver.Render.CopyPV = _tnl_copy_pv;
tnl->Driver.Render.Interp = _tnl_interp;
-
- intel->vtbl.meta_draw_quad = intel_meta_draw_quad;
}
generated by cgit v1.2.3 (git 2.39.1) at 2024-09-15 10:13:24 +0000