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-rw-r--r--src/mesa/drivers/dri/i915/Makefile2
-rw-r--r--src/mesa/drivers/dri/i915/i830_context.h3
-rw-r--r--src/mesa/drivers/dri/i915/i830_texstate.c49
-rw-r--r--src/mesa/drivers/dri/i915/i830_vtbl.c43
-rw-r--r--src/mesa/drivers/dri/i915/i915_context.h1
-rw-r--r--src/mesa/drivers/dri/i915/i915_texstate.c36
-rw-r--r--src/mesa/drivers/dri/i915/i915_vtbl.c50
-rw-r--r--src/mesa/drivers/dri/i915/intel_tris.c3
l---------src/mesa/drivers/dri/i915/server/intel_dri.c1
9 files changed, 99 insertions, 89 deletions
diff --git a/src/mesa/drivers/dri/i915/Makefile b/src/mesa/drivers/dri/i915/Makefile
index dc15ae425c..5b49d0c77c 100644
--- a/src/mesa/drivers/dri/i915/Makefile
+++ b/src/mesa/drivers/dri/i915/Makefile
@@ -4,8 +4,6 @@ include $(TOP)/configs/current
LIBNAME = i915_dri.so
-MINIGLX_SOURCES = server/intel_dri.c
-
DRIVER_SOURCES = \
i830_context.c \
i830_state.c \
diff --git a/src/mesa/drivers/dri/i915/i830_context.h b/src/mesa/drivers/dri/i915/i830_context.h
index b755d48678..d7eb9c2d44 100644
--- a/src/mesa/drivers/dri/i915/i830_context.h
+++ b/src/mesa/drivers/dri/i915/i830_context.h
@@ -34,7 +34,8 @@
#define I830_FALLBACK_COLORMASK 0x2000
#define I830_FALLBACK_STENCIL 0x4000
#define I830_FALLBACK_STIPPLE 0x8000
-#define I830_FALLBACK_LOGICOP 0x10000
+#define I830_FALLBACK_LOGICOP 0x20000
+#define I830_FALLBACK_DRAW_OFFSET 0x200000
#define I830_UPLOAD_CTX 0x1
#define I830_UPLOAD_BUFFERS 0x2
diff --git a/src/mesa/drivers/dri/i915/i830_texstate.c b/src/mesa/drivers/dri/i915/i830_texstate.c
index 7525f9f2e0..e8f7e378ec 100644
--- a/src/mesa/drivers/dri/i915/i830_texstate.c
+++ b/src/mesa/drivers/dri/i915/i830_texstate.c
@@ -122,6 +122,7 @@ i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
GLuint *state = i830->state.Tex[unit], format, pitch;
GLint lodbias;
GLubyte border[4];
+ GLuint dst_x, dst_y;
memset(state, 0, sizeof(state));
@@ -132,7 +133,7 @@ i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
i830->state.tex_buffer[unit] = NULL;
}
- if (!intelObj->imageOverride && !intel_finalize_mipmap_tree(intel, unit))
+ if (!intel_finalize_mipmap_tree(intel, unit))
return GL_FALSE;
/* Get first image here, since intelObj->firstLevel will get set in
@@ -140,42 +141,20 @@ i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
*/
firstImage = tObj->Image[0][intelObj->firstLevel];
- if (intelObj->imageOverride) {
- i830->state.tex_buffer[unit] = NULL;
- i830->state.tex_offset[unit] = intelObj->textureOffset;
+ intel_miptree_get_image_offset(intelObj->mt, intelObj->firstLevel, 0, 0,
+ &dst_x, &dst_y);
- switch (intelObj->depthOverride) {
- case 32:
- format = MAPSURF_32BIT | MT_32BIT_ARGB8888;
- break;
- case 24:
- default:
- format = MAPSURF_32BIT | MT_32BIT_XRGB8888;
- break;
- case 16:
- format = MAPSURF_16BIT | MT_16BIT_RGB565;
- break;
- }
-
- pitch = intelObj->pitchOverride;
- } else {
- GLuint dst_x, dst_y;
-
- intel_miptree_get_image_offset(intelObj->mt, intelObj->firstLevel, 0, 0,
- &dst_x, &dst_y);
-
- dri_bo_reference(intelObj->mt->region->buffer);
- i830->state.tex_buffer[unit] = intelObj->mt->region->buffer;
- /* XXX: This calculation is probably broken for tiled images with
- * a non-page-aligned offset.
- */
- i830->state.tex_offset[unit] = (dst_x + dst_y * intelObj->mt->pitch) *
- intelObj->mt->cpp;
+ dri_bo_reference(intelObj->mt->region->buffer);
+ i830->state.tex_buffer[unit] = intelObj->mt->region->buffer;
+ /* XXX: This calculation is probably broken for tiled images with
+ * a non-page-aligned offset.
+ */
+ i830->state.tex_offset[unit] = (dst_x + dst_y * intelObj->mt->pitch) *
+ intelObj->mt->cpp;
- format = translate_texture_format(firstImage->TexFormat,
- firstImage->InternalFormat);
- pitch = intelObj->mt->pitch * intelObj->mt->cpp;
- }
+ format = translate_texture_format(firstImage->TexFormat,
+ firstImage->InternalFormat);
+ pitch = intelObj->mt->pitch * intelObj->mt->cpp;
state[I830_TEXREG_TM0LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_2 |
(LOAD_TEXTURE_MAP0 << unit) | 4);
diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c
index a8df77c600..be96419ff1 100644
--- a/src/mesa/drivers/dri/i915/i830_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i830_vtbl.c
@@ -496,15 +496,13 @@ i830_emit_state(struct intel_context *intel)
OUT_BATCH(state->Buffer[I830_DESTREG_CBUFADDR0]);
OUT_BATCH(state->Buffer[I830_DESTREG_CBUFADDR1]);
OUT_RELOC(state->draw_region->buffer,
- I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
- state->draw_region->draw_offset);
+ I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
if (state->depth_region) {
OUT_BATCH(state->Buffer[I830_DESTREG_DBUFADDR0]);
OUT_BATCH(state->Buffer[I830_DESTREG_DBUFADDR1]);
OUT_RELOC(state->depth_region->buffer,
- I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
- state->depth_region->draw_offset);
+ I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
}
OUT_BATCH(state->Buffer[I830_DESTREG_DV0]);
@@ -598,6 +596,7 @@ i830_set_draw_region(struct intel_context *intel,
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
GLuint value;
struct i830_hw_state *state = &i830->state;
+ uint32_t draw_x, draw_y;
if (state->draw_region != color_regions[0]) {
intel_region_release(&state->draw_region);
@@ -652,14 +651,40 @@ i830_set_draw_region(struct intel_context *intel,
}
state->Buffer[I830_DESTREG_DV1] = value;
+ /* We set up the drawing rectangle to be offset into the color
+ * region's location in the miptree. If it doesn't match with
+ * depth's offsets, we can't render to it.
+ *
+ * (Well, not actually true -- the hw grew a bit to let depth's
+ * offset get forced to 0,0. We may want to use that if people are
+ * hitting that case. Also, some configurations may be supportable
+ * by tweaking the start offset of the buffers around, which we
+ * can't do in general due to tiling)
+ */
+ FALLBACK(intel, I830_FALLBACK_DRAW_OFFSET,
+ (depth_region && color_regions[0]) &&
+ (depth_region->draw_x != color_regions[0]->draw_x ||
+ depth_region->draw_y != color_regions[0]->draw_y));
+
+ if (color_regions[0]) {
+ draw_x = color_regions[0]->draw_x;
+ draw_y = color_regions[0]->draw_y;
+ } else if (depth_region) {
+ draw_x = depth_region->draw_x;
+ draw_y = depth_region->draw_y;
+ } else {
+ draw_x = 0;
+ draw_y = 0;
+ }
+
state->Buffer[I830_DESTREG_DRAWRECT0] = _3DSTATE_DRAWRECT_INFO;
state->Buffer[I830_DESTREG_DRAWRECT1] = 0;
- state->Buffer[I830_DESTREG_DRAWRECT2] = 0; /* xmin, ymin */
+ state->Buffer[I830_DESTREG_DRAWRECT2] = (draw_y << 16) | draw_x;
state->Buffer[I830_DESTREG_DRAWRECT3] =
- (ctx->DrawBuffer->Width & 0xffff) |
- (ctx->DrawBuffer->Height << 16);
- state->Buffer[I830_DESTREG_DRAWRECT4] = 0; /* xoff, yoff */
- state->Buffer[I830_DESTREG_DRAWRECT5] = 0;
+ ((ctx->DrawBuffer->Width + draw_x) & 0xffff) |
+ ((ctx->DrawBuffer->Height + draw_y) << 16);
+ state->Buffer[I830_DESTREG_DRAWRECT4] = (draw_y << 16) | draw_x;
+ state->Buffer[I830_DESTREG_DRAWRECT5] = MI_NOOP;
I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS);
}
diff --git a/src/mesa/drivers/dri/i915/i915_context.h b/src/mesa/drivers/dri/i915/i915_context.h
index 60b357ec28..b5169280f6 100644
--- a/src/mesa/drivers/dri/i915/i915_context.h
+++ b/src/mesa/drivers/dri/i915/i915_context.h
@@ -40,6 +40,7 @@
#define I915_FALLBACK_POLYGON_SMOOTH 0x40000
#define I915_FALLBACK_POINT_SMOOTH 0x80000
#define I915_FALLBACK_POINT_SPRITE_COORD_ORIGIN 0x100000
+#define I915_FALLBACK_DRAW_OFFSET 0x200000
#define I915_UPLOAD_CTX 0x1
#define I915_UPLOAD_BUFFERS 0x2
diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c
index 3ee4c8653a..a1ab8f8b6d 100644
--- a/src/mesa/drivers/dri/i915/i915_texstate.c
+++ b/src/mesa/drivers/dri/i915/i915_texstate.c
@@ -150,7 +150,7 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
i915->state.tex_buffer[unit] = NULL;
}
- if (!intelObj->imageOverride && !intel_finalize_mipmap_tree(intel, unit))
+ if (!intel_finalize_mipmap_tree(intel, unit))
return GL_FALSE;
/* Get first image here, since intelObj->firstLevel will get set in
@@ -158,34 +158,14 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
*/
firstImage = tObj->Image[0][intelObj->firstLevel];
- if (intelObj->imageOverride) {
- i915->state.tex_buffer[unit] = NULL;
- i915->state.tex_offset[unit] = intelObj->textureOffset;
+ dri_bo_reference(intelObj->mt->region->buffer);
+ i915->state.tex_buffer[unit] = intelObj->mt->region->buffer;
+ i915->state.tex_offset[unit] = 0; /* Always the origin of the miptree */
- switch (intelObj->depthOverride) {
- case 32:
- format = MAPSURF_32BIT | MT_32BIT_ARGB8888;
- break;
- case 24:
- default:
- format = MAPSURF_32BIT | MT_32BIT_XRGB8888;
- break;
- case 16:
- format = MAPSURF_16BIT | MT_16BIT_RGB565;
- break;
- }
-
- pitch = intelObj->pitchOverride;
- } else {
- dri_bo_reference(intelObj->mt->region->buffer);
- i915->state.tex_buffer[unit] = intelObj->mt->region->buffer;
- i915->state.tex_offset[unit] = 0; /* Always the origin of the miptree */
-
- format = translate_texture_format(firstImage->TexFormat,
- firstImage->InternalFormat,
- tObj->DepthMode);
- pitch = intelObj->mt->pitch * intelObj->mt->cpp;
- }
+ format = translate_texture_format(firstImage->TexFormat,
+ firstImage->InternalFormat,
+ tObj->DepthMode);
+ pitch = intelObj->mt->pitch * intelObj->mt->cpp;
state[I915_TEXREG_MS3] =
(((firstImage->Height - 1) << MS3_HEIGHT_SHIFT) |
diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c
index 30aaab78c8..0a93e64b1f 100644
--- a/src/mesa/drivers/dri/i915/i915_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i915_vtbl.c
@@ -378,15 +378,13 @@ i915_emit_state(struct intel_context *intel)
OUT_BATCH(state->Buffer[I915_DESTREG_CBUFADDR0]);
OUT_BATCH(state->Buffer[I915_DESTREG_CBUFADDR1]);
OUT_RELOC(state->draw_region->buffer,
- I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
- state->draw_region->draw_offset);
+ I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
if (state->depth_region) {
OUT_BATCH(state->Buffer[I915_DESTREG_DBUFADDR0]);
OUT_BATCH(state->Buffer[I915_DESTREG_DBUFADDR1]);
OUT_RELOC(state->depth_region->buffer,
- I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
- state->depth_region->draw_offset);
+ I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
}
OUT_BATCH(state->Buffer[I915_DESTREG_DV0]);
@@ -534,6 +532,7 @@ i915_set_draw_region(struct intel_context *intel,
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
GLuint value;
struct i915_hw_state *state = &i915->state;
+ uint32_t draw_x, draw_y;
if (state->draw_region != color_regions[0]) {
intel_region_release(&state->draw_region);
@@ -596,14 +595,41 @@ i915_set_draw_region(struct intel_context *intel,
}
state->Buffer[I915_DESTREG_DV1] = value;
- state->Buffer[I915_DESTREG_DRAWRECT0] = _3DSTATE_DRAWRECT_INFO;
- state->Buffer[I915_DESTREG_DRAWRECT1] = 0;
- state->Buffer[I915_DESTREG_DRAWRECT2] = 0; /* xmin, ymin */
- state->Buffer[I915_DESTREG_DRAWRECT3] =
- (ctx->DrawBuffer->Width & 0xffff) |
- (ctx->DrawBuffer->Height << 16);
- state->Buffer[I915_DESTREG_DRAWRECT4] = 0; /* xoff, yoff */
- state->Buffer[I915_DESTREG_DRAWRECT5] = 0;
+ /* We set up the drawing rectangle to be offset into the color
+ * region's location in the miptree. If it doesn't match with
+ * depth's offsets, we can't render to it.
+ *
+ * (Well, not actually true -- the hw grew a bit to let depth's
+ * offset get forced to 0,0. We may want to use that if people are
+ * hitting that case. Also, some configurations may be supportable
+ * by tweaking the start offset of the buffers around, which we
+ * can't do in general due to tiling)
+ */
+ FALLBACK(intel, I915_FALLBACK_DRAW_OFFSET,
+ (depth_region && color_regions[0]) &&
+ (depth_region->draw_x != color_regions[0]->draw_x ||
+ depth_region->draw_y != color_regions[0]->draw_y));
+
+ if (color_regions[0]) {
+ draw_x = color_regions[0]->draw_x;
+ draw_y = color_regions[0]->draw_y;
+ } else if (depth_region) {
+ draw_x = depth_region->draw_x;
+ draw_y = depth_region->draw_y;
+ } else {
+ draw_x = 0;
+ draw_y = 0;
+ }
+
+ /* When changing drawing rectangle offset, an MI_FLUSH is first required. */
+ state->Buffer[I915_DESTREG_DRAWRECT0] = MI_FLUSH;
+ state->Buffer[I915_DESTREG_DRAWRECT1] = _3DSTATE_DRAWRECT_INFO;
+ state->Buffer[I915_DESTREG_DRAWRECT2] = 0;
+ state->Buffer[I915_DESTREG_DRAWRECT3] = (draw_y << 16) | draw_x;
+ state->Buffer[I915_DESTREG_DRAWRECT4] =
+ ((ctx->DrawBuffer->Width + draw_x) & 0xffff) |
+ ((ctx->DrawBuffer->Height + draw_y) << 16);
+ state->Buffer[I915_DESTREG_DRAWRECT5] = (draw_y << 16) | draw_x;
I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
}
diff --git a/src/mesa/drivers/dri/i915/intel_tris.c b/src/mesa/drivers/dri/i915/intel_tris.c
index 0afbda2436..fb191fe346 100644
--- a/src/mesa/drivers/dri/i915/intel_tris.c
+++ b/src/mesa/drivers/dri/i915/intel_tris.c
@@ -603,7 +603,6 @@ static struct
#define DO_POINTS 1
#define DO_FULL_QUAD 1
-#define HAVE_RGBA 1
#define HAVE_SPEC 1
#define HAVE_BACK_COLORS 0
#define HAVE_HW_FLATSHADE 1
@@ -1177,6 +1176,8 @@ static char *fallbackStrings[] = {
[17] = "Logic op",
[18] = "Smooth polygon",
[19] = "Smooth point",
+ [20] = "point sprite coord origin",
+ [21] = "depth/color drawing offset",
};
diff --git a/src/mesa/drivers/dri/i915/server/intel_dri.c b/src/mesa/drivers/dri/i915/server/intel_dri.c
deleted file mode 120000
index effdd26448..0000000000
--- a/src/mesa/drivers/dri/i915/server/intel_dri.c
+++ /dev/null
@@ -1 +0,0 @@
-../../intel/server/intel_dri.c \ No newline at end of file
generated by cgit v1.2.3 (git 2.39.1) at 2024-08-10 03:48:18 +0000