diff options
Diffstat (limited to 'src/mesa/drivers/dri/i915')
-rw-r--r-- | src/mesa/drivers/dri/i915/i830_vtbl.c | 7 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i915/i915_context.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i915/i915_context.h | 3 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i915/i915_program.c | 25 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i915/i915_texstate.c | 19 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i915/i915_vtbl.c | 7 |
6 files changed, 54 insertions, 9 deletions
diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c index 0ab27704d5..773a8b4dd0 100644 --- a/src/mesa/drivers/dri/i915/i830_vtbl.c +++ b/src/mesa/drivers/dri/i915/i830_vtbl.c @@ -566,6 +566,13 @@ i830_destroy_context(struct intel_context *intel) GLuint i; struct i830_context *i830 = i830_context(&intel->ctx); + intel_region_release(&i830->state.draw_region); + intel_region_release(&i830->state.depth_region); + intel_region_release(&i830->meta.draw_region); + intel_region_release(&i830->meta.depth_region); + intel_region_release(&i830->initial.draw_region); + intel_region_release(&i830->initial.depth_region); + for (i = 0; i < I830_TEX_UNITS; i++) { if (i830->state.tex_buffer[i] != NULL) { dri_bo_unreference(i830->state.tex_buffer[i]); diff --git a/src/mesa/drivers/dri/i915/i915_context.c b/src/mesa/drivers/dri/i915/i915_context.c index efcac911aa..e0ddc7fd61 100644 --- a/src/mesa/drivers/dri/i915/i915_context.c +++ b/src/mesa/drivers/dri/i915/i915_context.c @@ -56,8 +56,6 @@ static const struct dri_extension i915_extensions[] = { {"GL_ARB_shadow", NULL}, {"GL_ARB_texture_non_power_of_two", NULL}, {"GL_EXT_shadow_funcs", NULL}, - /* ARB extn won't work if not enabled */ - {"GL_SGIX_depth_texture", NULL}, {NULL, NULL} }; diff --git a/src/mesa/drivers/dri/i915/i915_context.h b/src/mesa/drivers/dri/i915/i915_context.h index c6958dd8d4..a2376e50e1 100644 --- a/src/mesa/drivers/dri/i915/i915_context.h +++ b/src/mesa/drivers/dri/i915/i915_context.h @@ -125,6 +125,9 @@ struct i915_fragment_program GLboolean on_hardware; GLboolean error; /* If program is malformed for any reason. */ + /** Record of which phases R registers were last written in. */ + GLuint register_phases[16]; + GLuint indirections; GLuint nr_tex_indirect; GLuint nr_tex_insn; GLuint nr_alu_insn; diff --git a/src/mesa/drivers/dri/i915/i915_program.c b/src/mesa/drivers/dri/i915/i915_program.c index 49193297a8..350da5e169 100644 --- a/src/mesa/drivers/dri/i915/i915_program.c +++ b/src/mesa/drivers/dri/i915/i915_program.c @@ -190,6 +190,9 @@ i915_emit_arith(struct i915_fragment_program * p, *(p->csr++) = (A1_SRC0(src0) | A1_SRC1(src1)); *(p->csr++) = (A2_SRC1(src1) | A2_SRC2(src2)); + if (GET_UREG_TYPE(dest) == REG_TYPE_R) + p->register_phases[GET_UREG_NR(dest)] = p->nr_tex_indirect; + p->nr_alu_insn++; return dest; } @@ -237,10 +240,22 @@ GLuint i915_emit_texld( struct i915_fragment_program *p, else { assert(GET_UREG_TYPE(dest) != REG_TYPE_CONST); assert(dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest))); + /* Can't use unsaved temps for coords, as the phase boundary would result + * in the contents becoming undefined. + */ + assert(GET_UREG_TYPE(coord) != REG_TYPE_U); + + /* Output register being oC or oD defines a phase boundary */ + if (GET_UREG_TYPE(dest) == REG_TYPE_OC || + GET_UREG_TYPE(dest) == REG_TYPE_OD) + p->nr_tex_indirect++; - if (GET_UREG_TYPE(coord) != REG_TYPE_T) { + /* Reading from an r# register whose contents depend on output of the + * current phase defines a phase boundary. + */ + if (GET_UREG_TYPE(coord) == REG_TYPE_R && + p->register_phases[GET_UREG_NR(coord)] == p->nr_tex_indirect) p->nr_tex_indirect++; - } *(p->csr++) = (op | T0_DEST( dest ) | @@ -249,6 +264,9 @@ GLuint i915_emit_texld( struct i915_fragment_program *p, *(p->csr++) = T1_ADDRESS_REG( coord ); *(p->csr++) = T2_MBZ; + if (GET_UREG_TYPE(dest) == REG_TYPE_R) + p->register_phases[GET_UREG_NR(dest)] = p->nr_tex_indirect; + p->nr_tex_insn++; return dest; } @@ -413,7 +431,8 @@ i915_init_program(struct i915_context *i915, struct i915_fragment_program *p) p->on_hardware = 0; p->error = 0; - p->nr_tex_indirect = 1; /* correct? */ + memset(&p->register_phases, 0, sizeof(p->register_phases)); + p->nr_tex_indirect = 1; p->nr_tex_insn = 0; p->nr_alu_insn = 0; p->nr_decl_insn = 0; diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c index ae42b102db..d1b0dcdf31 100644 --- a/src/mesa/drivers/dri/i915/i915_texstate.c +++ b/src/mesa/drivers/dri/i915/i915_texstate.c @@ -307,10 +307,21 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3) } - state[I915_TEXREG_SS4] = INTEL_PACKCOLOR8888(tObj->_BorderChan[0], - tObj->_BorderChan[1], - tObj->_BorderChan[2], - tObj->_BorderChan[3]); + if (firstImage->_BaseFormat == GL_DEPTH_COMPONENT) { + /* GL specs that border color for depth textures is taken from the + * R channel, while the hardware uses A. Spam R into all the channels + * for safety. + */ + state[I915_TEXREG_SS4] = INTEL_PACKCOLOR8888(tObj->_BorderChan[0], + tObj->_BorderChan[0], + tObj->_BorderChan[0], + tObj->_BorderChan[0]); + } else { + state[I915_TEXREG_SS4] = INTEL_PACKCOLOR8888(tObj->_BorderChan[0], + tObj->_BorderChan[1], + tObj->_BorderChan[2], + tObj->_BorderChan[3]); + } I915_ACTIVESTATE(i915, I915_UPLOAD_TEX(unit), GL_TRUE); diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c index edbbe23e09..7431a9cf76 100644 --- a/src/mesa/drivers/dri/i915/i915_vtbl.c +++ b/src/mesa/drivers/dri/i915/i915_vtbl.c @@ -490,6 +490,13 @@ i915_destroy_context(struct intel_context *intel) GLuint i; struct i915_context *i915 = i915_context(&intel->ctx); + intel_region_release(&i915->state.draw_region); + intel_region_release(&i915->state.depth_region); + intel_region_release(&i915->meta.draw_region); + intel_region_release(&i915->meta.depth_region); + intel_region_release(&i915->initial.draw_region); + intel_region_release(&i915->initial.depth_region); + for (i = 0; i < I915_TEX_UNITS; i++) { if (i915->state.tex_buffer[i] != NULL) { dri_bo_unreference(i915->state.tex_buffer[i]); |