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-rw-r--r--src/mesa/drivers/dri/i915/Makefile2
-rw-r--r--src/mesa/drivers/dri/i915/i830_texstate.c6
-rw-r--r--src/mesa/drivers/dri/i915/i915_state.c2
-rw-r--r--src/mesa/drivers/dri/i915/i915_tex_layout.c32
-rw-r--r--src/mesa/drivers/dri/i915/i915_texstate.c2
-rw-r--r--src/mesa/drivers/dri/i915/intel_tris.c12
l---------src/mesa/drivers/dri/i915/server/intel_dri.c1
7 files changed, 26 insertions, 31 deletions
diff --git a/src/mesa/drivers/dri/i915/Makefile b/src/mesa/drivers/dri/i915/Makefile
index dc15ae425c..5b49d0c77c 100644
--- a/src/mesa/drivers/dri/i915/Makefile
+++ b/src/mesa/drivers/dri/i915/Makefile
@@ -4,8 +4,6 @@ include $(TOP)/configs/current
LIBNAME = i915_dri.so
-MINIGLX_SOURCES = server/intel_dri.c
-
DRIVER_SOURCES = \
i830_context.c \
i830_state.c \
diff --git a/src/mesa/drivers/dri/i915/i830_texstate.c b/src/mesa/drivers/dri/i915/i830_texstate.c
index e8f7e378ec..a28073919c 100644
--- a/src/mesa/drivers/dri/i915/i830_texstate.c
+++ b/src/mesa/drivers/dri/i915/i830_texstate.c
@@ -146,15 +146,15 @@ i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
dri_bo_reference(intelObj->mt->region->buffer);
i830->state.tex_buffer[unit] = intelObj->mt->region->buffer;
+ pitch = intelObj->mt->region->pitch * intelObj->mt->cpp;
+
/* XXX: This calculation is probably broken for tiled images with
* a non-page-aligned offset.
*/
- i830->state.tex_offset[unit] = (dst_x + dst_y * intelObj->mt->pitch) *
- intelObj->mt->cpp;
+ i830->state.tex_offset[unit] = dst_x * intelObj->mt->cpp + dst_y * pitch;
format = translate_texture_format(firstImage->TexFormat,
firstImage->InternalFormat);
- pitch = intelObj->mt->pitch * intelObj->mt->cpp;
state[I830_TEXREG_TM0LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_2 |
(LOAD_TEXTURE_MAP0 << unit) | 4);
diff --git a/src/mesa/drivers/dri/i915/i915_state.c b/src/mesa/drivers/dri/i915/i915_state.c
index 7275617a6f..91b228d52b 100644
--- a/src/mesa/drivers/dri/i915/i915_state.c
+++ b/src/mesa/drivers/dri/i915/i915_state.c
@@ -374,7 +374,7 @@ intelCalcViewport(GLcontext * ctx)
else {
/* window buffer, y=0=top */
yScale = -1.0;
- yBias = (intel->driDrawable) ? intel->driDrawable->h : 0.0F;
+ yBias = ctx->DrawBuffer->Height;
}
m[MAT_SX] = v[MAT_SX];
diff --git a/src/mesa/drivers/dri/i915/i915_tex_layout.c b/src/mesa/drivers/dri/i915/i915_tex_layout.c
index fe3908f580..af9c7ee9b6 100644
--- a/src/mesa/drivers/dri/i915/i915_tex_layout.c
+++ b/src/mesa/drivers/dri/i915/i915_tex_layout.c
@@ -67,7 +67,8 @@ static GLint bottom_offsets[6] = {
/**
- * Cube texture map layout for i830M-GM915.
+ * Cube texture map layout for i830M-GM915 and
+ * non-compressed cube texture map on GM945.
*
* Hardware layout looks like:
*
@@ -123,13 +124,12 @@ i915_miptree_layout_cube(struct intel_context *intel,
assert(lvlWidth == lvlHeight); /* cubemap images are square */
/* double pitch for cube layouts */
- mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, dim * 2);
+ mt->total_width = dim * 2;
mt->total_height = dim * 4;
for (level = mt->first_level; level <= mt->last_level; level++) {
intel_miptree_set_level_info(mt, level, 6,
0, 0,
- /*OLD: mt->pitch, mt->total_height,*/
lvlWidth, lvlHeight,
1);
lvlWidth /= 2;
@@ -167,7 +167,7 @@ i915_miptree_layout_3d(struct intel_context *intel,
GLint level;
/* Calculate the size of a single slice. */
- mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, mt->width0);
+ mt->total_width = mt->width0;
/* XXX: hardware expects/requires 9 levels at minimum. */
for (level = mt->first_level; level <= MAX2(8, mt->last_level); level++) {
@@ -210,7 +210,7 @@ i915_miptree_layout_2d(struct intel_context *intel,
GLuint img_height;
GLint level;
- mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, mt->width0);
+ mt->total_width = mt->width0;
mt->total_height = 0;
for (level = mt->first_level; level <= mt->last_level; level++) {
@@ -251,16 +251,15 @@ i915_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree * mt,
break;
}
- DBG("%s: %dx%dx%d - sz 0x%x\n", __FUNCTION__,
- mt->pitch,
- mt->total_height, mt->cpp, mt->pitch * mt->total_height * mt->cpp);
+ DBG("%s: %dx%dx%d\n", __FUNCTION__,
+ mt->total_width, mt->total_height, mt->cpp);
return GL_TRUE;
}
/**
- * Cube texture map layout for GM945 and later.
+ * Compressed cube texture map layout for GM945 and later.
*
* The hardware layout looks like the 830-915 layout, except for the small
* sizes. A zoomed in view of the layout for 945 is:
@@ -336,9 +335,9 @@ i945_miptree_layout_cube(struct intel_context *intel,
* or the final row of 4x4, 2x2 and 1x1 faces below this.
*/
if (dim > 32)
- mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, dim * 2);
+ mt->total_width = dim * 2;
else
- mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, 14 * 8);
+ mt->total_width = 14 * 8;
if (dim >= 4)
mt->total_height = dim * 4 + 4;
@@ -423,11 +422,11 @@ i945_miptree_layout_3d(struct intel_context *intel,
GLuint pack_y_pitch;
GLuint level;
- mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, mt->width0);
+ mt->total_width = mt->width0;
mt->total_height = 0;
pack_y_pitch = MAX2(mt->height0, 2);
- pack_x_pitch = mt->pitch;
+ pack_x_pitch = mt->total_width;
pack_x_nr = 1;
for (level = mt->first_level; level <= mt->last_level; level++) {
@@ -454,7 +453,7 @@ i945_miptree_layout_3d(struct intel_context *intel,
if (pack_x_pitch > 4) {
pack_x_pitch >>= 1;
pack_x_nr <<= 1;
- assert(pack_x_pitch * pack_x_nr <= mt->pitch);
+ assert(pack_x_pitch * pack_x_nr <= mt->total_width);
}
if (pack_y_pitch > 2) {
@@ -491,9 +490,8 @@ i945_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree * mt,
break;
}
- DBG("%s: %dx%dx%d - sz 0x%x\n", __FUNCTION__,
- mt->pitch,
- mt->total_height, mt->cpp, mt->pitch * mt->total_height * mt->cpp);
+ DBG("%s: %dx%dx%d\n", __FUNCTION__,
+ mt->total_width, mt->total_height, mt->cpp);
return GL_TRUE;
}
diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c
index a1ab8f8b6d..ff9ab88c5a 100644
--- a/src/mesa/drivers/dri/i915/i915_texstate.c
+++ b/src/mesa/drivers/dri/i915/i915_texstate.c
@@ -165,7 +165,7 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
format = translate_texture_format(firstImage->TexFormat,
firstImage->InternalFormat,
tObj->DepthMode);
- pitch = intelObj->mt->pitch * intelObj->mt->cpp;
+ pitch = intelObj->mt->region->pitch * intelObj->mt->cpp;
state[I915_TEXREG_MS3] =
(((firstImage->Height - 1) << MS3_HEIGHT_SHIFT) |
diff --git a/src/mesa/drivers/dri/i915/intel_tris.c b/src/mesa/drivers/dri/i915/intel_tris.c
index 81c4adeaf3..9449a158dc 100644
--- a/src/mesa/drivers/dri/i915/intel_tris.c
+++ b/src/mesa/drivers/dri/i915/intel_tris.c
@@ -488,9 +488,9 @@ intel_wpos_triangle(struct intel_context *intel,
__memcpy(v1_wpos, v1, size);
__memcpy(v2_wpos, v2, size);
- v0_wpos[1] = -v0_wpos[1] + intel->driDrawable->h;
- v1_wpos[1] = -v1_wpos[1] + intel->driDrawable->h;
- v2_wpos[1] = -v2_wpos[1] + intel->driDrawable->h;
+ v0_wpos[1] = -v0_wpos[1] + intel->ctx.DrawBuffer->Height;
+ v1_wpos[1] = -v1_wpos[1] + intel->ctx.DrawBuffer->Height;
+ v2_wpos[1] = -v2_wpos[1] + intel->ctx.DrawBuffer->Height;
intel_draw_triangle(intel, v0, v1, v2);
@@ -509,8 +509,8 @@ intel_wpos_line(struct intel_context *intel,
__memcpy(v0_wpos, v0, size);
__memcpy(v1_wpos, v1, size);
- v0_wpos[1] = -v0_wpos[1] + intel->driDrawable->h;
- v1_wpos[1] = -v1_wpos[1] + intel->driDrawable->h;
+ v0_wpos[1] = -v0_wpos[1] + intel->ctx.DrawBuffer->Height;
+ v1_wpos[1] = -v1_wpos[1] + intel->ctx.DrawBuffer->Height;
intel_draw_line(intel, v0, v1);
}
@@ -524,7 +524,7 @@ intel_wpos_point(struct intel_context *intel, intelVertexPtr v0)
GLfloat *v0_wpos = (GLfloat *)((char *)v0 + offset);
__memcpy(v0_wpos, v0, size);
- v0_wpos[1] = -v0_wpos[1] + intel->driDrawable->h;
+ v0_wpos[1] = -v0_wpos[1] + intel->ctx.DrawBuffer->Height;
intel_draw_point(intel, v0);
}
diff --git a/src/mesa/drivers/dri/i915/server/intel_dri.c b/src/mesa/drivers/dri/i915/server/intel_dri.c
deleted file mode 120000
index effdd26448..0000000000
--- a/src/mesa/drivers/dri/i915/server/intel_dri.c
+++ /dev/null
@@ -1 +0,0 @@
-../../intel/server/intel_dri.c \ No newline at end of file