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-rw-r--r--src/mesa/drivers/dri/i915pipe/intel_context.c26
-rw-r--r--src/mesa/drivers/dri/i915pipe/intel_mipmap_tree.c54
-rw-r--r--src/mesa/drivers/dri/i915pipe/intel_mipmap_tree.h114
-rw-r--r--src/mesa/drivers/dri/i915pipe/intel_tex.h4
-rw-r--r--src/mesa/drivers/dri/i915pipe/intel_tex_image.c2
-rw-r--r--src/mesa/drivers/dri/i915pipe/intel_tex_validate.c2
6 files changed, 63 insertions, 139 deletions
diff --git a/src/mesa/drivers/dri/i915pipe/intel_context.c b/src/mesa/drivers/dri/i915pipe/intel_context.c
index d43b784112..df34c360e5 100644
--- a/src/mesa/drivers/dri/i915pipe/intel_context.c
+++ b/src/mesa/drivers/dri/i915pipe/intel_context.c
@@ -53,6 +53,7 @@
#include "intel_blit.h"
#include "intel_buffer_objects.h"
#include "intel_fbo.h"
+#include "intel_mipmap_tree.h"
#include "state_tracker/st_public.h"
#include "state_tracker/st_context.h"
@@ -61,6 +62,11 @@
#include "vblank.h"
#include "utils.h"
#include "xmlpool.h" /* for symbolic values of enum-type options */
+
+#include "pipe/p_context.h"
+
+
+
#ifndef INTEL_DEBUG
int INTEL_DEBUG = (0);
#endif
@@ -377,6 +383,26 @@ intelCreateContext(const __GLcontextModes * mesaVis,
// intel->pipe->glctx = ctx;
// intel_init_region_functions(intel->pipe);
+ switch (intel->intelScreen->deviceID) {
+ case PCI_CHIP_I945_G:
+ case PCI_CHIP_I945_GM:
+ case PCI_CHIP_I945_GME:
+ case PCI_CHIP_G33_G:
+ case PCI_CHIP_Q33_G:
+ case PCI_CHIP_Q35_G:
+ intel->pipe->mipmap_tree_layout = i945_miptree_layout;
+ break;
+ case PCI_CHIP_I915_G:
+ case PCI_CHIP_I915_GM:
+ case PCI_CHIP_I830_M:
+ case PCI_CHIP_I855_GM:
+ case PCI_CHIP_I865_G:
+ intel->pipe->mipmap_tree_layout = i915_miptree_layout;
+ default:
+ assert(0); /*FIX*/
+ }
+
+
/*
* memory pools
*/
diff --git a/src/mesa/drivers/dri/i915pipe/intel_mipmap_tree.c b/src/mesa/drivers/dri/i915pipe/intel_mipmap_tree.c
index 6717984f7d..50e830281c 100644
--- a/src/mesa/drivers/dri/i915pipe/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i915pipe/intel_mipmap_tree.c
@@ -51,7 +51,7 @@ target_to_target(GLenum target)
}
}
-struct intel_mipmap_tree *
+struct pipe_mipmap_tree *
intel_miptree_create(struct intel_context *intel,
GLenum target,
GLenum internal_format,
@@ -62,7 +62,7 @@ intel_miptree_create(struct intel_context *intel,
GLuint depth0, GLuint cpp, GLuint compress_byte)
{
GLboolean ok;
- struct intel_mipmap_tree *mt = calloc(sizeof(*mt), 1);
+ struct pipe_mipmap_tree *mt = calloc(sizeof(*mt), 1);
DBG("%s target %s format %s level %d..%d\n", __FUNCTION__,
_mesa_lookup_enum_by_nr(target),
@@ -79,29 +79,7 @@ intel_miptree_create(struct intel_context *intel,
mt->compressed = compress_byte ? 1 : 0;
mt->refcount = 1;
- switch (intel->intelScreen->deviceID) {
- case PCI_CHIP_I945_G:
- case PCI_CHIP_I945_GM:
- case PCI_CHIP_I945_GME:
- case PCI_CHIP_G33_G:
- case PCI_CHIP_Q33_G:
- case PCI_CHIP_Q35_G:
-// ok = i945_miptree_layout(mt);
- break;
- case PCI_CHIP_I915_G:
- case PCI_CHIP_I915_GM:
- case PCI_CHIP_I830_M:
- case PCI_CHIP_I855_GM:
- case PCI_CHIP_I865_G:
- default:
- /* All the i830 chips and the i915 use this layout:
- */
-// ok = i915_miptree_layout(mt);
- break;
- }
-
- ok = 0; /* TODO */
-
+ ok = intel->pipe->mipmap_tree_layout(intel->pipe, mt);
if (ok)
mt->region = intel->pipe->region_alloc(intel->pipe,
mt->cpp, mt->pitch, mt->total_height);
@@ -116,8 +94,8 @@ intel_miptree_create(struct intel_context *intel,
void
-intel_miptree_reference(struct intel_mipmap_tree **dst,
- struct intel_mipmap_tree *src)
+intel_miptree_reference(struct pipe_mipmap_tree **dst,
+ struct pipe_mipmap_tree *src)
{
src->refcount++;
*dst = src;
@@ -126,7 +104,7 @@ intel_miptree_reference(struct intel_mipmap_tree **dst,
void
intel_miptree_release(struct intel_context *intel,
- struct intel_mipmap_tree **mt)
+ struct pipe_mipmap_tree **mt)
{
if (!*mt)
return;
@@ -157,7 +135,7 @@ intel_miptree_release(struct intel_context *intel,
* Not sure whether I want to pass gl_texture_image here.
*/
GLboolean
-intel_miptree_match_image(struct intel_mipmap_tree *mt,
+intel_miptree_match_image(struct pipe_mipmap_tree *mt,
struct gl_texture_image *image,
GLuint face, GLuint level)
{
@@ -184,7 +162,7 @@ intel_miptree_match_image(struct intel_mipmap_tree *mt,
void
-intel_miptree_set_level_info(struct intel_mipmap_tree *mt,
+intel_miptree_set_level_info(struct pipe_mipmap_tree *mt,
GLuint level,
GLuint nr_images,
GLuint x, GLuint y, GLuint w, GLuint h, GLuint d)
@@ -215,7 +193,7 @@ intel_miptree_set_level_info(struct intel_mipmap_tree *mt,
void
-intel_miptree_set_image_offset(struct intel_mipmap_tree *mt,
+intel_miptree_set_image_offset(struct pipe_mipmap_tree *mt,
GLuint level, GLuint img, GLuint x, GLuint y)
{
if (img == 0 && level == 0)
@@ -237,7 +215,7 @@ intel_miptree_set_image_offset(struct intel_mipmap_tree *mt,
* These functions present that view to mesa:
*/
const GLuint *
-intel_miptree_depth_offsets(struct intel_mipmap_tree *mt, GLuint level)
+intel_miptree_depth_offsets(struct pipe_mipmap_tree *mt, GLuint level)
{
static const GLuint zero = 0;
@@ -249,7 +227,7 @@ intel_miptree_depth_offsets(struct intel_mipmap_tree *mt, GLuint level)
GLuint
-intel_miptree_image_offset(struct intel_mipmap_tree * mt,
+intel_miptree_image_offset(struct pipe_mipmap_tree * mt,
GLuint face, GLuint level)
{
if (mt->target == GL_TEXTURE_CUBE_MAP_ARB)
@@ -269,7 +247,7 @@ intel_miptree_image_offset(struct intel_mipmap_tree * mt,
*/
GLubyte *
intel_miptree_image_map(struct intel_context * intel,
- struct intel_mipmap_tree * mt,
+ struct pipe_mipmap_tree * mt,
GLuint face,
GLuint level,
GLuint * row_stride, GLuint * image_offsets)
@@ -291,7 +269,7 @@ intel_miptree_image_map(struct intel_context * intel,
void
intel_miptree_image_unmap(struct intel_context *intel,
- struct intel_mipmap_tree *mt)
+ struct pipe_mipmap_tree *mt)
{
DBG("%s\n", __FUNCTION__);
intel->pipe->region_unmap(intel->pipe, mt->region);
@@ -303,7 +281,7 @@ intel_miptree_image_unmap(struct intel_context *intel,
*/
void
intel_miptree_image_data(struct intel_context *intel,
- struct intel_mipmap_tree *dst,
+ struct pipe_mipmap_tree *dst,
GLuint face,
GLuint level,
void *src,
@@ -336,9 +314,9 @@ intel_miptree_image_data(struct intel_context *intel,
*/
void
intel_miptree_image_copy(struct intel_context *intel,
- struct intel_mipmap_tree *dst,
+ struct pipe_mipmap_tree *dst,
GLuint face, GLuint level,
- struct intel_mipmap_tree *src)
+ struct pipe_mipmap_tree *src)
{
GLuint width = src->level[level].width;
GLuint height = src->level[level].height;
diff --git a/src/mesa/drivers/dri/i915pipe/intel_mipmap_tree.h b/src/mesa/drivers/dri/i915pipe/intel_mipmap_tree.h
index 09b2e362fc..94fb21372c 100644
--- a/src/mesa/drivers/dri/i915pipe/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i915pipe/intel_mipmap_tree.h
@@ -34,89 +34,7 @@
struct pipe_region;
-/* A layer on top of the pipe_regions code which adds:
- *
- * - Code to size and layout a region to hold a set of mipmaps.
- * - Query to determine if a new image fits in an existing tree.
- * - More refcounting
- * - maybe able to remove refcounting from pipe_region?
- * - ?
- *
- * The fixed mipmap layout of intel hardware where one offset
- * specifies the position of all images in a mipmap hierachy
- * complicates the implementation of GL texture image commands,
- * compared to hardware where each image is specified with an
- * independent offset.
- *
- * In an ideal world, each texture object would be associated with a
- * single bufmgr buffer or 2d pipe_region, and all the images within
- * the texture object would slot into the tree as they arrive. The
- * reality can be a little messier, as images can arrive from the user
- * with sizes that don't fit in the existing tree, or in an order
- * where the tree layout cannot be guessed immediately.
- *
- * This structure encodes an idealized mipmap tree. The GL image
- * commands build these where possible, otherwise store the images in
- * temporary system buffers.
- */
-
-
-/**
- * Describes the location of each texture image within a texture region.
- */
-struct intel_mipmap_level
-{
- GLuint level_offset;
- GLuint width;
- GLuint height;
- GLuint depth;
- GLuint nr_images;
-
- /* Explicitly store the offset of each image for each cube face or
- * depth value. Pretty much have to accept that hardware formats
- * are going to be so diverse that there is no unified way to
- * compute the offsets of depth/cube images within a mipmap level,
- * so have to store them as a lookup table:
- */
- GLuint *image_offset;
-};
-
-struct intel_mipmap_tree
-{
- /* Effectively the key:
- */
- GLenum target;
- GLenum internal_format;
-
- GLuint first_level;
- GLuint last_level;
-
- GLuint width0, height0, depth0; /**< Level zero image dimensions */
- GLuint cpp;
- GLboolean compressed;
-
- /* Derived from the above:
- */
- GLuint pitch;
- GLuint depth_pitch; /* per-image on i945? */
- GLuint total_height;
-
- /* Includes image offset tables:
- */
- struct intel_mipmap_level level[MAX_TEXTURE_LEVELS];
-
- /* The data is held here:
- */
- struct pipe_region *region;
-
- /* These are also refcounted:
- */
- GLuint refcount;
-};
-
-
-
-struct intel_mipmap_tree *intel_miptree_create(struct intel_context *intel,
+struct pipe_mipmap_tree *intel_miptree_create(struct intel_context *intel,
GLenum target,
GLenum internal_format,
GLuint first_level,
@@ -127,15 +45,15 @@ struct intel_mipmap_tree *intel_miptree_create(struct intel_context *intel,
GLuint cpp,
GLuint compress_byte);
-void intel_miptree_reference(struct intel_mipmap_tree **dst,
- struct intel_mipmap_tree *src);
+void intel_miptree_reference(struct pipe_mipmap_tree **dst,
+ struct pipe_mipmap_tree *src);
void intel_miptree_release(struct intel_context *intel,
- struct intel_mipmap_tree **mt);
+ struct pipe_mipmap_tree **mt);
/* Check if an image fits an existing mipmap tree layout
*/
-GLboolean intel_miptree_match_image(struct intel_mipmap_tree *mt,
+GLboolean intel_miptree_match_image(struct pipe_mipmap_tree *mt,
struct gl_texture_image *image,
GLuint face, GLuint level);
@@ -143,35 +61,35 @@ GLboolean intel_miptree_match_image(struct intel_mipmap_tree *mt,
* well.
*/
GLubyte *intel_miptree_image_map(struct intel_context *intel,
- struct intel_mipmap_tree *mt,
+ struct pipe_mipmap_tree *mt,
GLuint face,
GLuint level,
GLuint * row_stride, GLuint * image_stride);
void intel_miptree_image_unmap(struct intel_context *intel,
- struct intel_mipmap_tree *mt);
+ struct pipe_mipmap_tree *mt);
/* Return the linear offset of an image relative to the start of the
* tree:
*/
-GLuint intel_miptree_image_offset(struct intel_mipmap_tree *mt,
+GLuint intel_miptree_image_offset(struct pipe_mipmap_tree *mt,
GLuint face, GLuint level);
/* Return pointers to each 2d slice within an image. Indexed by depth
* value.
*/
-const GLuint *intel_miptree_depth_offsets(struct intel_mipmap_tree *mt,
+const GLuint *intel_miptree_depth_offsets(struct pipe_mipmap_tree *mt,
GLuint level);
-void intel_miptree_set_level_info(struct intel_mipmap_tree *mt,
+void intel_miptree_set_level_info(struct pipe_mipmap_tree *mt,
GLuint level,
GLuint nr_images,
GLuint x, GLuint y,
GLuint w, GLuint h, GLuint d);
-void intel_miptree_set_image_offset(struct intel_mipmap_tree *mt,
+void intel_miptree_set_image_offset(struct pipe_mipmap_tree *mt,
GLuint level,
GLuint img, GLuint x, GLuint y);
@@ -179,7 +97,7 @@ void intel_miptree_set_image_offset(struct intel_mipmap_tree *mt,
/* Upload an image into a tree
*/
void intel_miptree_image_data(struct intel_context *intel,
- struct intel_mipmap_tree *dst,
+ struct pipe_mipmap_tree *dst,
GLuint face,
GLuint level,
void *src,
@@ -188,14 +106,14 @@ void intel_miptree_image_data(struct intel_context *intel,
/* Copy an image between two trees
*/
void intel_miptree_image_copy(struct intel_context *intel,
- struct intel_mipmap_tree *dst,
+ struct pipe_mipmap_tree *dst,
GLuint face, GLuint level,
- struct intel_mipmap_tree *src);
+ struct pipe_mipmap_tree *src);
/* i915_mipmap_tree.c:
*/
-GLboolean i915_miptree_layout(struct intel_mipmap_tree *mt);
-GLboolean i945_miptree_layout(struct intel_mipmap_tree *mt);
+GLboolean i915_miptree_layout(struct pipe_context *, struct pipe_mipmap_tree *);
+GLboolean i945_miptree_layout(struct pipe_context *, struct pipe_mipmap_tree *);
diff --git a/src/mesa/drivers/dri/i915pipe/intel_tex.h b/src/mesa/drivers/dri/i915pipe/intel_tex.h
index 4a5081eee7..1ee239402e 100644
--- a/src/mesa/drivers/dri/i915pipe/intel_tex.h
+++ b/src/mesa/drivers/dri/i915pipe/intel_tex.h
@@ -49,7 +49,7 @@ struct intel_texture_object
/* On validation any active images held in main memory or in other
* regions will be copied to this region and the old storage freed.
*/
- struct intel_mipmap_tree *mt;
+ struct pipe_mipmap_tree *mt;
GLboolean imageOverride;
GLint depthOverride;
@@ -71,7 +71,7 @@ struct intel_texture_image
* Else if intelImage->base.Data != NULL, image is stored there.
* Else there is no image data.
*/
- struct intel_mipmap_tree *mt;
+ struct pipe_mipmap_tree *mt;
};
diff --git a/src/mesa/drivers/dri/i915pipe/intel_tex_image.c b/src/mesa/drivers/dri/i915pipe/intel_tex_image.c
index 9f8e115533..596493f45a 100644
--- a/src/mesa/drivers/dri/i915pipe/intel_tex_image.c
+++ b/src/mesa/drivers/dri/i915pipe/intel_tex_image.c
@@ -16,9 +16,9 @@
#include "texstore.h"
#include "intel_context.h"
-#include "intel_mipmap_tree.h"
#include "intel_buffer_objects.h"
#include "intel_batchbuffer.h"
+#include "intel_mipmap_tree.h"
#include "intel_tex.h"
#include "intel_ioctl.h"
#include "intel_blit.h"
diff --git a/src/mesa/drivers/dri/i915pipe/intel_tex_validate.c b/src/mesa/drivers/dri/i915pipe/intel_tex_validate.c
index af18c26d55..242fe1237b 100644
--- a/src/mesa/drivers/dri/i915pipe/intel_tex_validate.c
+++ b/src/mesa/drivers/dri/i915pipe/intel_tex_validate.c
@@ -6,6 +6,8 @@
#include "intel_mipmap_tree.h"
#include "intel_tex.h"
+#include "pipe/p_state.h"
+
#define FILE_DEBUG_FLAG DEBUG_TEXTURE
/**