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path: root/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c
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Diffstat (limited to 'src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c')
-rw-r--r--src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c21
1 files changed, 18 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c b/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c
index 843a78eb82..74f6b2d851 100644
--- a/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c
@@ -97,9 +97,19 @@ intel_miptree_create(struct intel_context *intel,
break;
}
- if (ok)
+ if (ok) {
+ if (!mt->compressed) {
+ /* XXX: Align pitch to multiple of 64 bytes for now to allow
+ * render-to-texture to work in all cases. This should probably be
+ * replaced at some point by some scheme to only do this when really
+ * necessary.
+ */
+ mt->pitch = ((mt->pitch * cpp + 63) & ~63) / cpp;
+ }
+
mt->region = intel_region_alloc(intel->intelScreen,
mt->cpp, mt->pitch, mt->total_height);
+ }
if (!mt->region) {
free(mt);
@@ -325,6 +335,7 @@ intel_miptree_image_data(struct intel_context *intel,
}
}
+extern GLuint intel_compressed_alignment(GLenum);
/* Copy mipmap image between trees
*/
void
@@ -342,8 +353,12 @@ intel_miptree_image_copy(struct intel_context *intel,
const GLuint *src_depth_offset = intel_miptree_depth_offsets(src, level);
GLuint i;
- if (dst->compressed)
- height /= 4;
+ if (dst->compressed) {
+ GLuint alignment = intel_compressed_alignment(dst->internal_format);
+ height = (height + 3) / 4;
+ width = ((width + alignment - 1) & ~(alignment - 1));
+ }
+
for (i = 0; i < depth; i++) {
intel_region_copy(intel->intelScreen,
dst->region, dst_offset + dst_depth_offset[i],