1 files changed, 461 insertions, 151 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 174f622d59..edb02fabb2 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -89,8 +89,6 @@ brw_compile_shader(struct gl_context *ctx, struct gl_shader *shader)
 GLboolean
 brw_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
 {
-   struct intel_context *intel = intel_context(ctx);
-
    struct brw_shader *shader =
       (struct brw_shader *)prog->_LinkedShaders[MESA_SHADER_FRAGMENT];
    if (shader != NULL) {
@@ -103,10 +101,12 @@ brw_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
       clone_ir_list(mem_ctx, shader->ir, shader->base.ir);
 
       do_mat_op_to_vec(shader->ir);
-      do_mod_to_fract(shader->ir);
-      do_div_to_mul_rcp(shader->ir);
-      do_sub_to_add_neg(shader->ir);
-      do_explog_to_explog2(shader->ir);
+      lower_instructions(shader->ir,
+			 MOD_TO_FRACT |
+			 DIV_TO_MUL_RCP |
+			 SUB_TO_ADD_NEG |
+			 EXP_TO_EXP2 |
+			 LOG_TO_LOG2);
       do_lower_texture_projection(shader->ir);
       brw_do_cubemap_normalize(shader->ir);
 
@@ -132,9 +132,7 @@ brw_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
 						GL_TRUE, /* temp */
 						GL_TRUE /* uniform */
 						) || progress;
-	 if (intel->gen == 6) {
-	    progress = do_if_to_cond_assign(shader->ir) || progress;
-	 }
+	 progress = lower_quadop_vector(shader->ir, false) || progress;
       } while (progress);
 
       validate_ir_tree(shader->ir);
@@ -179,6 +177,46 @@ type_size(const struct glsl_type *type)
    }
 }
 
+/**
+ * Returns how many MRFs an FS opcode will write over.
+ *
+ * Note that this is not the 0 or 1 implied writes in an actual gen
+ * instruction -- the FS opcodes often generate MOVs in addition.
+ */
+int
+fs_visitor::implied_mrf_writes(fs_inst *inst)
+{
+   if (inst->mlen == 0)
+      return 0;
+
+   switch (inst->opcode) {
+   case FS_OPCODE_RCP:
+   case FS_OPCODE_RSQ:
+   case FS_OPCODE_SQRT:
+   case FS_OPCODE_EXP2:
+   case FS_OPCODE_LOG2:
+   case FS_OPCODE_SIN:
+   case FS_OPCODE_COS:
+      return 1;
+   case FS_OPCODE_POW:
+      return 2;
+   case FS_OPCODE_TEX:
+   case FS_OPCODE_TXB:
+   case FS_OPCODE_TXL:
+      return 1;
+   case FS_OPCODE_FB_WRITE:
+      return 2;
+   case FS_OPCODE_PULL_CONSTANT_LOAD:
+   case FS_OPCODE_UNSPILL:
+      return 1;
+   case FS_OPCODE_SPILL:
+      return 2;
+   default:
+      assert(!"not reached");
+      return inst->mlen;
+   }
+}
+
 int
 fs_visitor::virtual_grf_alloc(int size)
 {
@@ -228,6 +266,7 @@ brw_type_for_base_type(const struct glsl_type *type)
       return BRW_REGISTER_TYPE_UD;
    case GLSL_TYPE_ARRAY:
    case GLSL_TYPE_STRUCT:
+   case GLSL_TYPE_SAMPLER:
       /* These should be overridden with the type of the member when
        * dereferenced into.  BRW_REGISTER_TYPE_UD seems like a likely
        * way to trip up if we don't.
@@ -286,7 +325,30 @@ fs_visitor::setup_uniform_values(int loc, const glsl_type *type)
    case GLSL_TYPE_BOOL:
       vec_values = fp->Base.Parameters->ParameterValues[loc];
       for (unsigned int i = 0; i < type->vector_elements; i++) {
-	 c->prog_data.param[c->prog_data.nr_params++] = &vec_values[i];
+	 unsigned int param = c->prog_data.nr_params++;
+
+	 assert(param < ARRAY_SIZE(c->prog_data.param));
+
+	 switch (type->base_type) {
+	 case GLSL_TYPE_FLOAT:
+	    c->prog_data.param_convert[param] = PARAM_NO_CONVERT;
+	    break;
+	 case GLSL_TYPE_UINT:
+	    c->prog_data.param_convert[param] = PARAM_CONVERT_F2U;
+	    break;
+	 case GLSL_TYPE_INT:
+	    c->prog_data.param_convert[param] = PARAM_CONVERT_F2I;
+	    break;
+	 case GLSL_TYPE_BOOL:
+	    c->prog_data.param_convert[param] = PARAM_CONVERT_F2B;
+	    break;
+	 default:
+	    assert(!"not reached");
+	    c->prog_data.param_convert[param] = PARAM_NO_CONVERT;
+	    break;
+	 }
+
+	 c->prog_data.param[param] = &vec_values[i];
       }
       return 1;
 
@@ -370,6 +432,8 @@ fs_visitor::setup_builtin_uniform_values(ir_variable *ir)
 	       break;
 	    last_swiz = swiz;
 
+	    c->prog_data.param_convert[c->prog_data.nr_params] =
+	       PARAM_NO_CONVERT;
 	    c->prog_data.param[c->prog_data.nr_params++] = &vec_values[swiz];
 	 }
       }
@@ -383,6 +447,7 @@ fs_visitor::emit_fragcoord_interpolation(ir_variable *ir)
    fs_reg wpos = *reg;
    fs_reg neg_y = this->pixel_y;
    neg_y.negate = true;
+   bool flip = !ir->origin_upper_left ^ c->key.render_to_fbo;
 
    /* gl_FragCoord.x */
    if (ir->pixel_center_integer) {
@@ -393,13 +458,13 @@ fs_visitor::emit_fragcoord_interpolation(ir_variable *ir)
    wpos.reg_offset++;
 
    /* gl_FragCoord.y */
-   if (ir->origin_upper_left && ir->pixel_center_integer) {
+   if (!flip && ir->pixel_center_integer) {
       emit(fs_inst(BRW_OPCODE_MOV, wpos, this->pixel_y));
    } else {
       fs_reg pixel_y = this->pixel_y;
       float offset = (ir->pixel_center_integer ? 0.0 : 0.5);
 
-      if (!ir->origin_upper_left) {
+      if (flip) {
 	 pixel_y.negate = true;
 	 offset += c->key.drawable_height - 1.0;
       }
@@ -624,6 +689,7 @@ fs_visitor::visit(ir_variable *ir)
       }
 
       reg = new(this->mem_ctx) fs_reg(UNIFORM, param_index);
+      reg->type = brw_type_for_base_type(ir->type);
    }
 
    if (!reg)
@@ -678,6 +744,27 @@ fs_visitor::visit(ir_dereference_array *ir)
    }
 }
 
+/* Instruction selection: Produce a MOV.sat instead of
+ * MIN(MAX(val, 0), 1) when possible.
+ */
+bool
+fs_visitor::try_emit_saturate(ir_expression *ir)
+{
+   ir_rvalue *sat_val = ir->as_rvalue_to_saturate();
+
+   if (!sat_val)
+      return false;
+
+   sat_val->accept(this);
+   fs_reg src = this->result;
+
+   this->result = fs_reg(this, ir->type);
+   fs_inst *inst = emit(fs_inst(BRW_OPCODE_MOV, this->result, src));
+   inst->saturate = true;
+
+   return true;
+}
+
 void
 fs_visitor::visit(ir_expression *ir)
 {
@@ -685,6 +772,11 @@ fs_visitor::visit(ir_expression *ir)
    fs_reg op[2], temp;
    fs_inst *inst;
 
+   assert(ir->get_num_operands() <= 2);
+
+   if (try_emit_saturate(ir))
+      return;
+
    for (operand = 0; operand < ir->get_num_operands(); operand++) {
       ir->operands[operand]->accept(this);
       if (this->result.file == BAD_FILE) {
@@ -755,9 +847,11 @@ fs_visitor::visit(ir_expression *ir)
       assert(!"not reached: should be handled by ir_explog_to_explog2");
       break;
    case ir_unop_sin:
+   case ir_unop_sin_reduced:
       emit_math(FS_OPCODE_SIN, this->result, op[0]);
       break;
    case ir_unop_cos:
+   case ir_unop_cos_reduced:
       emit_math(FS_OPCODE_COS, this->result, op[0]);
       break;
 
@@ -831,7 +925,6 @@ fs_visitor::visit(ir_expression *ir)
       break;
 
    case ir_binop_dot:
-   case ir_binop_cross:
    case ir_unop_any:
       assert(!"not reached: should be handled by brw_fs_channel_expressions");
       break;
@@ -900,12 +993,21 @@ fs_visitor::visit(ir_expression *ir)
       break;
 
    case ir_unop_bit_not:
-   case ir_unop_u2f:
-   case ir_binop_lshift:
-   case ir_binop_rshift:
+      inst = emit(fs_inst(BRW_OPCODE_NOT, this->result, op[0]));
+      break;
    case ir_binop_bit_and:
+      inst = emit(fs_inst(BRW_OPCODE_AND, this->result, op[0], op[1]));
+      break;
    case ir_binop_bit_xor:
+      inst = emit(fs_inst(BRW_OPCODE_XOR, this->result, op[0], op[1]));
+      break;
    case ir_binop_bit_or:
+      inst = emit(fs_inst(BRW_OPCODE_OR, this->result, op[0], op[1]));
+      break;
+
+   case ir_unop_u2f:
+   case ir_binop_lshift:
+   case ir_binop_rshift:
       assert(!"GLSL 1.30 features unsupported");
       break;
    }
@@ -1185,7 +1287,7 @@ fs_visitor::visit(ir_texture *ir)
    assert(!ir->projector);
 
    sampler = _mesa_get_sampler_uniform_value(ir->sampler,
-					     ctx->Shader.CurrentProgram,
+					     ctx->Shader.CurrentFragmentProgram,
 					     &brw->fragment_program->Base);
    sampler = c->fp->program.Base.SamplerUnits[sampler];
 
@@ -1203,6 +1305,11 @@ fs_visitor::visit(ir_texture *ir)
 	 0
       };
 
+      c->prog_data.param_convert[c->prog_data.nr_params] =
+	 PARAM_NO_CONVERT;
+      c->prog_data.param_convert[c->prog_data.nr_params + 1] =
+	 PARAM_NO_CONVERT;
+
       fs_reg scale_x = fs_reg(UNIFORM, c->prog_data.nr_params);
       fs_reg scale_y = fs_reg(UNIFORM, c->prog_data.nr_params + 1);
       GLuint index = _mesa_add_state_reference(params,
@@ -1349,6 +1456,7 @@ fs_visitor::emit_bool_to_cond_code(ir_rvalue *ir)
       fs_reg op[2];
       fs_inst *inst;
 
+      assert(expr->get_num_operands() <= 2);
       for (unsigned int i = 0; i < expr->get_num_operands(); i++) {
 	 assert(expr->operands[i]->type->is_scalar());
 
@@ -1456,6 +1564,7 @@ fs_visitor::emit_if_gen6(ir_if *ir)
       fs_inst *inst;
       fs_reg temp;
 
+      assert(expr->get_num_operands() <= 2);
       for (unsigned int i = 0; i < expr->get_num_operands(); i++) {
 	 assert(expr->operands[i]->type->is_scalar());
 
@@ -1960,6 +2069,20 @@ fs_visitor::generate_fb_write(fs_inst *inst)
 	 brw_MOV(p,
 		 brw_message_reg(inst->base_mrf),
 		 brw_vec8_grf(0, 0));
+
+	 if (inst->target > 0) {
+	    /* Set the render target index for choosing BLEND_STATE. */
+	    brw_MOV(p, retype(brw_vec1_reg(BRW_MESSAGE_REGISTER_FILE, 0, 2),
+			      BRW_REGISTER_TYPE_UD),
+		    brw_imm_ud(inst->target));
+	 }
+
+	 /* Clear viewport index, render target array index. */
+	 brw_AND(p, retype(brw_vec1_reg(BRW_MESSAGE_REGISTER_FILE, 0, 0),
+			   BRW_REGISTER_TYPE_UD),
+		 retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UD),
+		 brw_imm_ud(0xf7ff));
+
 	 implied_header = brw_null_reg();
       } else {
 	 implied_header = retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UW);
@@ -2204,22 +2327,53 @@ fs_visitor::generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src)
 void
 fs_visitor::generate_discard_not(fs_inst *inst, struct brw_reg mask)
 {
-   brw_push_insn_state(p);
-   brw_set_mask_control(p, BRW_MASK_DISABLE);
-   brw_NOT(p, mask, brw_mask_reg(1)); /* IMASK */
-   brw_pop_insn_state(p);
+   if (intel->gen >= 6) {
+      /* Gen6 no longer has the mask reg for us to just read the
+       * active channels from.  However, cmp updates just the channels
+       * of the flag reg that are enabled, so we can get at the
+       * channel enables that way.  In this step, make a reg of ones
+       * we'll compare to.
+       */
+      brw_MOV(p, mask, brw_imm_ud(1));
+   } else {
+      brw_push_insn_state(p);
+      brw_set_mask_control(p, BRW_MASK_DISABLE);
+      brw_NOT(p, mask, brw_mask_reg(1)); /* IMASK */
+      brw_pop_insn_state(p);
+   }
 }
 
 void
 fs_visitor::generate_discard_and(fs_inst *inst, struct brw_reg mask)
 {
-   struct brw_reg g0 = retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UW);
-   mask = brw_uw1_reg(mask.file, mask.nr, 0);
+   if (intel->gen >= 6) {
+      struct brw_reg f0 = brw_flag_reg();
+      struct brw_reg g1 = retype(brw_vec1_grf(1, 7), BRW_REGISTER_TYPE_UW);
+
+      brw_push_insn_state(p);
+      brw_set_mask_control(p, BRW_MASK_DISABLE);
+      brw_MOV(p, f0, brw_imm_uw(0xffff)); /* inactive channels undiscarded */
+      brw_pop_insn_state(p);
+
+      brw_CMP(p, retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
+	      BRW_CONDITIONAL_Z, mask, brw_imm_ud(0)); /* active channels fail test */
+      /* Undo CMP's whacking of predication*/
+      brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+
+      brw_push_insn_state(p);
+      brw_set_mask_control(p, BRW_MASK_DISABLE);
+      brw_AND(p, g1, f0, g1);
+      brw_pop_insn_state(p);
+   } else {
+      struct brw_reg g0 = retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UW);
 
-   brw_push_insn_state(p);
-   brw_set_mask_control(p, BRW_MASK_DISABLE);
-   brw_AND(p, g0, mask, g0);
-   brw_pop_insn_state(p);
+      mask = brw_uw1_reg(mask.file, mask.nr, 0);
+
+      brw_push_insn_state(p);
+      brw_set_mask_control(p, BRW_MASK_DISABLE);
+      brw_AND(p, g0, mask, g0);
+      brw_pop_insn_state(p);
+   }
 }
 
 void
@@ -2230,7 +2384,8 @@ fs_visitor::generate_spill(fs_inst *inst, struct brw_reg src)
    brw_MOV(p,
 	   retype(brw_message_reg(inst->base_mrf + 1), BRW_REGISTER_TYPE_UD),
 	   retype(src, BRW_REGISTER_TYPE_UD));
-   brw_oword_block_write(p, brw_message_reg(inst->base_mrf), 1, inst->offset);
+   brw_oword_block_write_scratch(p, brw_message_reg(inst->base_mrf), 1,
+				 inst->offset);
 }
 
 void
@@ -2251,8 +2406,39 @@ fs_visitor::generate_unspill(fs_inst *inst, struct brw_reg dst)
    if (intel->gen == 4 && !intel->is_g4x)
       brw_MOV(p, brw_null_reg(), dst);
 
-   brw_oword_block_read(p, dst, brw_message_reg(inst->base_mrf), 1,
-			inst->offset);
+   brw_oword_block_read_scratch(p, dst, brw_message_reg(inst->base_mrf), 1,
+				inst->offset);
+
+   if (intel->gen == 4 && !intel->is_g4x) {
+      /* gen4 errata: destination from a send can't be used as a
+       * destination until it's been read.  Just read it so we don't
+       * have to worry.
+       */
+      brw_MOV(p, brw_null_reg(), dst);
+   }
+}
+
+
+void
+fs_visitor::generate_pull_constant_load(fs_inst *inst, struct brw_reg dst)
+{
+   assert(inst->mlen != 0);
+
+   /* Clear any post destination dependencies that would be ignored by
+    * the block read.  See the B-Spec for pre-gen5 send instruction.
+    *
+    * This could use a better solution, since texture sampling and
+    * math reads could potentially run into it as well -- anywhere
+    * that we have a SEND with a destination that is a register that
+    * was written but not read within the last N instructions (what's
+    * N?  unsure).  This is rare because of dead code elimination, but
+    * not impossible.
+    */
+   if (intel->gen == 4 && !intel->is_g4x)
+      brw_MOV(p, brw_null_reg(), dst);
+
+   brw_oword_block_read(p, dst, brw_message_reg(inst->base_mrf),
+			inst->offset, SURF_INDEX_FRAG_CONST_BUFFER);
 
    if (intel->gen == 4 && !intel->is_g4x) {
       /* gen4 errata: destination from a send can't be used as a
@@ -2281,7 +2467,7 @@ fs_visitor::assign_curb_setup()
 						  constant_nr % 8);
 
 	    inst->src[i].file = FIXED_HW_REG;
-	    inst->src[i].fixed_hw_reg = brw_reg;
+	    inst->src[i].fixed_hw_reg = retype(brw_reg, inst->src[i].type);
 	 }
       }
    }
@@ -2406,6 +2592,7 @@ fs_visitor::split_virtual_grfs()
 	 for (int j = 2; j < this->virtual_grf_sizes[i]; j++) {
 	    int reg = virtual_grf_alloc(1);
 	    assert(reg == new_virtual_grf[i] + j - 1);
+	    (void) reg;
 	 }
 	 this->virtual_grf_sizes[i] = 1;
       }
@@ -2433,6 +2620,68 @@ fs_visitor::split_virtual_grfs()
    }
 }
 
+/**
+ * Choose accesses from the UNIFORM file to demote to using the pull
+ * constant buffer.
+ *
+ * We allow a fragment shader to have more than the specified minimum
+ * maximum number of fragment shader uniform components (64).  If
+ * there are too many of these, they'd fill up all of register space.
+ * So, this will push some of them out to the pull constant buffer and
+ * update the program to load them.
+ */
+void
+fs_visitor::setup_pull_constants()
+{
+   /* Only allow 16 registers (128 uniform components) as push constants. */
+   unsigned int max_uniform_components = 16 * 8;
+   if (c->prog_data.nr_params <= max_uniform_components)
+      return;
+
+   /* Just demote the end of the list.  We could probably do better
+    * here, demoting things that are rarely used in the program first.
+    */
+   int pull_uniform_base = max_uniform_components;
+   int pull_uniform_count = c->prog_data.nr_params - pull_uniform_base;
+
+   foreach_iter(exec_list_iterator, iter, this->instructions) {
+      fs_inst *inst = (fs_inst *)iter.get();
+
+      for (int i = 0; i < 3; i++) {
+	 if (inst->src[i].file != UNIFORM)
+	    continue;
+
+	 int uniform_nr = inst->src[i].hw_reg + inst->src[i].reg_offset;
+	 if (uniform_nr < pull_uniform_base)
+	    continue;
+
+	 fs_reg dst = fs_reg(this, glsl_type::float_type);
+	 fs_inst *pull = new(mem_ctx) fs_inst(FS_OPCODE_PULL_CONSTANT_LOAD,
+					      dst);
+	 pull->offset = ((uniform_nr - pull_uniform_base) * 4) & ~15;
+	 pull->ir = inst->ir;
+	 pull->annotation = inst->annotation;
+	 pull->base_mrf = 14;
+	 pull->mlen = 1;
+
+	 inst->insert_before(pull);
+
+	 inst->src[i].file = GRF;
+	 inst->src[i].reg = dst.reg;
+	 inst->src[i].reg_offset = 0;
+	 inst->src[i].smear = (uniform_nr - pull_uniform_base) & 3;
+      }
+   }
+
+   for (int i = 0; i < pull_uniform_count; i++) {
+      c->prog_data.pull_param[i] = c->prog_data.param[pull_uniform_base + i];
+      c->prog_data.pull_param_convert[i] =
+	 c->prog_data.param_convert[pull_uniform_base + i];
+   }
+   c->prog_data.nr_params -= pull_uniform_count;
+   c->prog_data.nr_pull_params = pull_uniform_count;
+}
+
 void
 fs_visitor::calculate_live_intervals()
 {
@@ -2597,6 +2846,7 @@ fs_visitor::propagate_constants()
 	       }
 	       break;
 	    case BRW_OPCODE_CMP:
+	    case BRW_OPCODE_SEL:
 	       if (i == 1) {
 		  scan_inst->src[i] = inst->src[0];
 		  progress = true;
@@ -2625,26 +2875,17 @@ bool
 fs_visitor::dead_code_eliminate()
 {
    bool progress = false;
-   int num_vars = this->virtual_grf_next;
-   bool dead[num_vars];
-
-   for (int i = 0; i < num_vars; i++) {
-      dead[i] = this->virtual_grf_def[i] >= this->virtual_grf_use[i];
-
-      if (dead[i]) {
-	 /* Mark off its interval so it won't interfere with anything. */
-	 this->virtual_grf_def[i] = -1;
-	 this->virtual_grf_use[i] = -1;
-      }
-   }
+   int pc = 0;
 
    foreach_iter(exec_list_iterator, iter, this->instructions) {
       fs_inst *inst = (fs_inst *)iter.get();
 
-      if (inst->dst.file == GRF && dead[inst->dst.reg]) {
+      if (inst->dst.file == GRF && this->virtual_grf_use[inst->dst.reg] <= pc) {
 	 inst->remove();
 	 progress = true;
       }
+
+      pc++;
    }
 
    return progress;
@@ -2721,6 +2962,7 @@ fs_visitor::register_coalesce()
 	       scan_inst->src[i].reg_offset = inst->src[0].reg_offset;
 	       scan_inst->src[i].abs |= inst->src[0].abs;
 	       scan_inst->src[i].negate ^= inst->src[0].negate;
+	       scan_inst->src[i].smear = inst->src[0].smear;
 	    }
 	 }
       }
@@ -2749,7 +2991,7 @@ fs_visitor::compute_to_mrf()
 	  inst->predicated ||
 	  inst->dst.file != MRF || inst->src[0].file != GRF ||
 	  inst->dst.type != inst->src[0].type ||
-	  inst->src[0].abs || inst->src[0].negate)
+	  inst->src[0].abs || inst->src[0].negate || inst->src[0].smear != -1)
 	 continue;
 
       /* Can't compute-to-MRF this GRF if someone else was going to
@@ -2761,11 +3003,60 @@ fs_visitor::compute_to_mrf()
       /* Found a move of a GRF to a MRF.  Let's see if we can go
        * rewrite the thing that made this GRF to write into the MRF.
        */
-      bool found = false;
       fs_inst *scan_inst;
       for (scan_inst = (fs_inst *)inst->prev;
 	   scan_inst->prev != NULL;
 	   scan_inst = (fs_inst *)scan_inst->prev) {
+	 if (scan_inst->dst.file == GRF &&
+	     scan_inst->dst.reg == inst->src[0].reg) {
+	    /* Found the last thing to write our reg we want to turn
+	     * into a compute-to-MRF.
+	     */
+
+	    if (scan_inst->opcode == FS_OPCODE_TEX) {
+	       /* texturing writes several continuous regs, so we can't
+		* compute-to-mrf that.
+		*/
+	       break;
+	    }
+
+	    /* If it's predicated, it (probably) didn't populate all
+	     * the channels.
+	     */
+	    if (scan_inst->predicated)
+	       break;
+
+	    /* SEND instructions can't have MRF as a destination. */
+	    if (scan_inst->mlen)
+	       break;
+
+	    if (intel->gen >= 6) {
+	       /* gen6 math instructions must have the destination be
+		* GRF, so no compute-to-MRF for them.
+		*/
+	       if (scan_inst->opcode == FS_OPCODE_RCP ||
+		   scan_inst->opcode == FS_OPCODE_RSQ ||
+		   scan_inst->opcode == FS_OPCODE_SQRT ||
+		   scan_inst->opcode == FS_OPCODE_EXP2 ||
+		   scan_inst->opcode == FS_OPCODE_LOG2 ||
+		   scan_inst->opcode == FS_OPCODE_SIN ||
+		   scan_inst->opcode == FS_OPCODE_COS ||
+		   scan_inst->opcode == FS_OPCODE_POW) {
+		  break;
+	       }
+	    }
+
+	    if (scan_inst->dst.reg_offset == inst->src[0].reg_offset) {
+	       /* Found the creator of our MRF's source value. */
+	       scan_inst->dst.file = MRF;
+	       scan_inst->dst.hw_reg = inst->dst.hw_reg;
+	       scan_inst->saturate |= inst->saturate;
+	       inst->remove();
+	       progress = true;
+	    }
+	    break;
+	 }
+
 	 /* We don't handle flow control here.  Most computation of
 	  * values that end up in MRFs are shortly before the MRF
 	  * write anyway.
@@ -2799,71 +3090,88 @@ fs_visitor::compute_to_mrf()
 	 }
 
 	 if (scan_inst->mlen > 0) {
-	    /* Found a SEND instruction, which will do some amount of
-	     * implied write that may overwrite our MRF that we were
-	     * hoping to compute-to-MRF somewhere above it.  Nothing
-	     * we have implied-writes more than 2 MRFs from base_mrf,
-	     * though.
+	    /* Found a SEND instruction, which means that there are
+	     * live values in MRFs from base_mrf to base_mrf +
+	     * scan_inst->mlen - 1.  Don't go pushing our MRF write up
+	     * above it.
 	     */
-	    int implied_write_len = MIN2(scan_inst->mlen, 2);
 	    if (inst->dst.hw_reg >= scan_inst->base_mrf &&
-		inst->dst.hw_reg < scan_inst->base_mrf + implied_write_len) {
+		inst->dst.hw_reg < scan_inst->base_mrf + scan_inst->mlen) {
 	       break;
 	    }
 	 }
+      }
+   }
 
-	 if (scan_inst->dst.file == GRF &&
-	     scan_inst->dst.reg == inst->src[0].reg) {
-	    /* Found the last thing to write our reg we want to turn
-	     * into a compute-to-MRF.
-	     */
+   return progress;
+}
 
-	    if (scan_inst->opcode == FS_OPCODE_TEX) {
-	       /* texturing writes several continuous regs, so we can't
-		* compute-to-mrf that.
-		*/
-	       break;
-	    }
+/**
+ * Walks through basic blocks, locking for repeated MRF writes and
+ * removing the later ones.
+ */
+bool
+fs_visitor::remove_duplicate_mrf_writes()
+{
+   fs_inst *last_mrf_move[16];
+   bool progress = false;
 
-	    /* If it's predicated, it (probably) didn't populate all
-	     * the channels.
-	     */
-	    if (scan_inst->predicated)
-	       break;
+   memset(last_mrf_move, 0, sizeof(last_mrf_move));
 
-	    /* SEND instructions can't have MRF as a destination. */
-	    if (scan_inst->mlen)
-	       break;
+   foreach_iter(exec_list_iterator, iter, this->instructions) {
+      fs_inst *inst = (fs_inst *)iter.get();
 
-	    if (intel->gen >= 6) {
-	       /* gen6 math instructions must have the destination be
-		* GRF, so no compute-to-MRF for them.
-		*/
-	       if (scan_inst->opcode == FS_OPCODE_RCP ||
-		   scan_inst->opcode == FS_OPCODE_RSQ ||
-		   scan_inst->opcode == FS_OPCODE_SQRT ||
-		   scan_inst->opcode == FS_OPCODE_EXP2 ||
-		   scan_inst->opcode == FS_OPCODE_LOG2 ||
-		   scan_inst->opcode == FS_OPCODE_SIN ||
-		   scan_inst->opcode == FS_OPCODE_COS ||
-		   scan_inst->opcode == FS_OPCODE_POW) {
-		  break;
-	       }
-	    }
+      switch (inst->opcode) {
+      case BRW_OPCODE_DO:
+      case BRW_OPCODE_WHILE:
+      case BRW_OPCODE_IF:
+      case BRW_OPCODE_ELSE:
+      case BRW_OPCODE_ENDIF:
+	 memset(last_mrf_move, 0, sizeof(last_mrf_move));
+	 continue;
+      default:
+	 break;
+      }
 
-	    if (scan_inst->dst.reg_offset == inst->src[0].reg_offset) {
-	       /* Found the creator of our MRF's source value. */
-	       found = true;
-	       break;
+      if (inst->opcode == BRW_OPCODE_MOV &&
+	  inst->dst.file == MRF) {
+	 fs_inst *prev_inst = last_mrf_move[inst->dst.hw_reg];
+	 if (prev_inst && inst->equals(prev_inst)) {
+	    inst->remove();
+	    progress = true;
+	    continue;
+	 }
+      }
+
+      /* Clear out the last-write records for MRFs that were overwritten. */
+      if (inst->dst.file == MRF) {
+	 last_mrf_move[inst->dst.hw_reg] = NULL;
+      }
+
+      if (inst->mlen > 0) {
+	 /* Found a SEND instruction, which will include two of fewer
+	  * implied MRF writes.  We could do better here.
+	  */
+	 for (int i = 0; i < implied_mrf_writes(inst); i++) {
+	    last_mrf_move[inst->base_mrf + i] = NULL;
+	 }
+      }
+
+      /* Clear out any MRF move records whose sources got overwritten. */
+      if (inst->dst.file == GRF) {
+	 for (unsigned int i = 0; i < Elements(last_mrf_move); i++) {
+	    if (last_mrf_move[i] &&
+		last_mrf_move[i]->src[0].reg == inst->dst.reg) {
+	       last_mrf_move[i] = NULL;
 	    }
 	 }
       }
-      if (found) {
-	 scan_inst->dst.file = MRF;
-	 scan_inst->dst.hw_reg = inst->dst.hw_reg;
-	 scan_inst->saturate |= inst->saturate;
-	 inst->remove();
-	 progress = true;
+
+      if (inst->opcode == BRW_OPCODE_MOV &&
+	  inst->dst.file == MRF &&
+	  inst->src[0].file == GRF &&
+	  !inst->predicated) {
+	 last_mrf_move[inst->dst.hw_reg] = inst;
       }
    }
 
@@ -2897,8 +3205,13 @@ static struct brw_reg brw_reg_from_fs_reg(fs_reg *reg)
    case GRF:
    case ARF:
    case MRF:
-      brw_reg = brw_vec8_reg(reg->file,
-			    reg->hw_reg, 0);
+      if (reg->smear == -1) {
+	 brw_reg = brw_vec8_reg(reg->file,
+				reg->hw_reg, 0);
+      } else {
+	 brw_reg = brw_vec1_reg(reg->file,
+				reg->hw_reg, reg->smear);
+      }
       brw_reg = retype(brw_reg, reg->type);
       break;
    case IMM:
@@ -2940,11 +3253,17 @@ static struct brw_reg brw_reg_from_fs_reg(fs_reg *reg)
 void
 fs_visitor::generate_code()
 {
-   unsigned int annotation_len = 0;
    int last_native_inst = 0;
    struct brw_instruction *if_stack[16], *loop_stack[16];
    int if_stack_depth = 0, loop_stack_depth = 0;
    int if_depth_in_loop[16];
+   const char *last_annotation_string = NULL;
+   ir_instruction *last_annotation_ir = NULL;
+
+   if (unlikely(INTEL_DEBUG & DEBUG_WM)) {
+      printf("Native code for fragment shader %d:\n",
+	     ctx->Shader.CurrentFragmentProgram->Name);
+   }
 
    if_depth_in_loop[loop_stack_depth] = 0;
 
@@ -2953,6 +3272,22 @@ fs_visitor::generate_code()
       fs_inst *inst = (fs_inst *)iter.get();
       struct brw_reg src[3], dst;
 
+      if (unlikely(INTEL_DEBUG & DEBUG_WM)) {
+	 if (last_annotation_ir != inst->ir) {
+	    last_annotation_ir = inst->ir;
+	    if (last_annotation_ir) {
+	       printf("   ");
+	       last_annotation_ir->print();
+	       printf("\n");
+	    }
+	 }
+	 if (last_annotation_string != inst->annotation) {
+	    last_annotation_string = inst->annotation;
+	    if (last_annotation_string)
+	       printf("   %s\n", last_annotation_string);
+	 }
+      }
+
       for (unsigned int i = 0; i < 3; i++) {
 	 src[i] = brw_reg_from_fs_reg(&inst->src[i]);
       }
@@ -2960,6 +3295,7 @@ fs_visitor::generate_code()
 
       brw_set_conditionalmod(p, inst->conditional_mod);
       brw_set_predicate_control(p, inst->predicated);
+      brw_set_saturate(p, inst->saturate);
 
       switch (inst->opcode) {
       case BRW_OPCODE_MOV:
@@ -3037,6 +3373,10 @@ fs_visitor::generate_code()
 	 break;
 
       case BRW_OPCODE_DO:
+	 /* FINISHME: We need to write the loop instruction support still. */
+	 if (intel->gen >= 6)
+	    this->fail = true;
+
 	 loop_stack[loop_stack_depth++] = brw_DO(p, BRW_EXECUTE_8);
 	 if_depth_in_loop[loop_stack_depth] = 0;
 	 break;
@@ -3114,6 +3454,10 @@ fs_visitor::generate_code()
 	 generate_unspill(inst, dst);
 	 break;
 
+      case FS_OPCODE_PULL_CONSTANT_LOAD:
+	 generate_pull_constant_load(inst, dst);
+	 break;
+
       case FS_OPCODE_FB_WRITE:
 	 generate_fb_write(inst);
 	 break;
@@ -3127,25 +3471,19 @@ fs_visitor::generate_code()
 	 this->fail = true;
       }
 
-      if (annotation_len < p->nr_insn) {
-	 annotation_len *= 2;
-	 if (annotation_len < 16)
-	    annotation_len = 16;
-
-	 this->annotation_string = talloc_realloc(this->mem_ctx,
-						  annotation_string,
-						  const char *,
-						  annotation_len);
-	 this->annotation_ir = talloc_realloc(this->mem_ctx,
-					      annotation_ir,
-					      ir_instruction *,
-					      annotation_len);
+      if (unlikely(INTEL_DEBUG & DEBUG_WM)) {
+	 for (unsigned int i = last_native_inst; i < p->nr_insn; i++) {
+	    if (0) {
+	       printf("0x%08x 0x%08x 0x%08x 0x%08x ",
+		      ((uint32_t *)&p->store[i])[3],
+		      ((uint32_t *)&p->store[i])[2],
+		      ((uint32_t *)&p->store[i])[1],
+		      ((uint32_t *)&p->store[i])[0]);
+	    }
+	    brw_disasm(stdout, &p->store[i], intel->gen);
+	 }
       }
 
-      for (unsigned int i = last_native_inst; i < p->nr_insn; i++) {
-	 this->annotation_string[i] = inst->annotation;
-	 this->annotation_ir[i] = inst->ir;
-      }
       last_native_inst = p->nr_insn;
    }
 }
@@ -3153,10 +3491,9 @@ fs_visitor::generate_code()
 GLboolean
 brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c)
 {
-   struct brw_compile *p = &c->func;
    struct intel_context *intel = &brw->intel;
    struct gl_context *ctx = &intel->ctx;
-   struct gl_shader_program *prog = ctx->Shader.CurrentProgram;
+   struct gl_shader_program *prog = ctx->Shader.CurrentFragmentProgram;
 
    if (!prog)
       return GL_FALSE;
@@ -3174,7 +3511,7 @@ brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c)
     */
    c->dispatch_width = 8;
 
-   if (INTEL_DEBUG & DEBUG_WM) {
+   if (unlikely(INTEL_DEBUG & DEBUG_WM)) {
       printf("GLSL IR for native fragment shader %d:\n", prog->Name);
       _mesa_print_ir(shader->ir, NULL);
       printf("\n");
@@ -3205,6 +3542,7 @@ brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c)
       v.emit_fb_writes();
 
       v.split_virtual_grfs();
+      v.setup_pull_constants();
 
       v.assign_curb_setup();
       v.assign_urb_setup();
@@ -3212,6 +3550,9 @@ brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c)
       bool progress;
       do {
 	 progress = false;
+
+	 progress = v.remove_duplicate_mrf_writes() || progress;
+
 	 v.calculate_live_intervals();
 	 progress = v.propagate_constants() || progress;
 	 progress = v.register_coalesce() || progress;
@@ -3248,37 +3589,6 @@ brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c)
    if (v.fail)
       return GL_FALSE;
 
-   if (INTEL_DEBUG & DEBUG_WM) {
-      const char *last_annotation_string = NULL;
-      ir_instruction *last_annotation_ir = NULL;
-
-      printf("Native code for fragment shader %d:\n", prog->Name);
-      for (unsigned int i = 0; i < p->nr_insn; i++) {
-	 if (last_annotation_ir != v.annotation_ir[i]) {
-	    last_annotation_ir = v.annotation_ir[i];
-	    if (last_annotation_ir) {
-	       printf("   ");
-	       last_annotation_ir->print();
-	       printf("\n");
-	    }
-	 }
-	 if (last_annotation_string != v.annotation_string[i]) {
-	    last_annotation_string = v.annotation_string[i];
-	    if (last_annotation_string)
-	       printf("   %s\n", last_annotation_string);
-	 }
-	 if (0) {
-	    printf("0x%08x 0x%08x 0x%08x 0x%08x ",
-		   ((uint32_t *)&p->store[i])[3],
-		   ((uint32_t *)&p->store[i])[2],
-		   ((uint32_t *)&p->store[i])[1],
-		   ((uint32_t *)&p->store[i])[0]);
-	 }
-	 brw_disasm(stdout, &p->store[i], intel->gen);
-      }
-      printf("\n");
-   }
-
    c->prog_data.total_grf = v.grf_used;
 
    return GL_TRUE;