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path: root/src/mesa/drivers/dri/i965/brw_wm_pass2.c
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Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_wm_pass2.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_pass2.c14
1 files changed, 11 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass2.c b/src/mesa/drivers/dri/i965/brw_wm_pass2.c
index a1edbd6168..6fca9ad220 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_pass2.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_pass2.c
@@ -69,7 +69,8 @@ static void prealloc_reg(struct brw_wm_compile *c,
*/
static void init_registers( struct brw_wm_compile *c )
{
- GLuint inputs = FRAG_BIT_WPOS | c->fp_interp_emitted;
+ struct brw_context *brw = c->func.brw;
+ GLuint inputs = (brw->vs.prog_data->outputs_written & DO_SETUP_BITS);
GLuint nr_interp_regs = 0;
GLuint i = 0;
GLuint j;
@@ -85,8 +86,15 @@ static void init_registers( struct brw_wm_compile *c )
for (j = 0; j < FRAG_ATTRIB_MAX; j++)
if (inputs & (1<<j)) {
+ /* index for vs output and ps input are not the same
+ in shader varying */
+ GLuint index;
+ if (j > FRAG_ATTRIB_VAR0)
+ index = j - (VERT_RESULT_VAR0 - FRAG_ATTRIB_VAR0);
+ else
+ index = j;
nr_interp_regs++;
- prealloc_reg(c, &c->payload.input_interp[j], i++);
+ prealloc_reg(c, &c->payload.input_interp[index], i++);
}
assert(nr_interp_regs >= 1);
@@ -328,7 +336,7 @@ void brw_wm_pass2( struct brw_wm_compile *c )
c->state = PASS2_DONE;
if (INTEL_DEBUG & DEBUG_WM) {
- brw_wm_print_program(c, "pass2/done");
+ brw_wm_print_program(c, "pass2/done");
}
}