diff options
Diffstat (limited to 'src/mesa/drivers/dri/i965')
45 files changed, 1298 insertions, 1681 deletions
diff --git a/src/mesa/drivers/dri/i965/Makefile b/src/mesa/drivers/dri/i965/Makefile index 005460f354..2934414d99 100644 --- a/src/mesa/drivers/dri/i965/Makefile +++ b/src/mesa/drivers/dri/i965/Makefile @@ -9,9 +9,10 @@ DRIVER_SOURCES = \ intel_blit.c \ intel_buffer_objects.c \ intel_buffers.c \ + intel_clear.c \ intel_context.c \ intel_decode.c \ - intel_depthstencil.c \ + intel_extensions.c \ intel_fbo.c \ intel_mipmap_tree.c \ intel_regions.c \ @@ -22,6 +23,7 @@ DRIVER_SOURCES = \ intel_pixel_copy.c \ intel_pixel_draw.c \ intel_state.c \ + intel_swapbuffers.c \ intel_tex.c \ intel_tex_copy.c \ intel_tex_format.c \ @@ -49,7 +51,6 @@ DRIVER_SOURCES = \ brw_gs.c \ brw_gs_emit.c \ brw_gs_state.c \ - brw_metaops.c \ brw_misc_state.c \ brw_program.c \ brw_queryobj.c \ @@ -68,7 +69,6 @@ DRIVER_SOURCES = \ brw_vs_constval.c \ brw_vs_emit.c \ brw_vs_state.c \ - brw_vs_tnl.c \ brw_vtbl.c \ brw_wm.c \ brw_wm_debug.c \ diff --git a/src/mesa/drivers/dri/i965/brw_cc.c b/src/mesa/drivers/dri/i965/brw_cc.c index fa8121e02d..82370162f5 100644 --- a/src/mesa/drivers/dri/i965/brw_cc.c +++ b/src/mesa/drivers/dri/i965/brw_cc.c @@ -83,59 +83,60 @@ struct brw_cc_unit_key { static void cc_unit_populate_key(struct brw_context *brw, struct brw_cc_unit_key *key) { - struct gl_stencil_attrib *stencil = brw->attribs.Stencil; + GLcontext *ctx = &brw->intel.ctx; + const unsigned back = ctx->Stencil._BackFace; memset(key, 0, sizeof(*key)); - key->stencil = stencil->Enabled; - key->stencil_two_side = stencil->_TestTwoSide; + key->stencil = ctx->Stencil.Enabled; + key->stencil_two_side = ctx->Stencil._TestTwoSide; if (key->stencil) { - key->stencil_func[0] = stencil->Function[0]; - key->stencil_fail_op[0] = stencil->FailFunc[0]; - key->stencil_pass_depth_fail_op[0] = stencil->ZFailFunc[0]; - key->stencil_pass_depth_pass_op[0] = stencil->ZPassFunc[0]; - key->stencil_ref[0] = stencil->Ref[0]; - key->stencil_write_mask[0] = stencil->WriteMask[0]; - key->stencil_test_mask[0] = stencil->ValueMask[0]; + key->stencil_func[0] = ctx->Stencil.Function[0]; + key->stencil_fail_op[0] = ctx->Stencil.FailFunc[0]; + key->stencil_pass_depth_fail_op[0] = ctx->Stencil.ZFailFunc[0]; + key->stencil_pass_depth_pass_op[0] = ctx->Stencil.ZPassFunc[0]; + key->stencil_ref[0] = ctx->Stencil.Ref[0]; + key->stencil_write_mask[0] = ctx->Stencil.WriteMask[0]; + key->stencil_test_mask[0] = ctx->Stencil.ValueMask[0]; } if (key->stencil_two_side) { - key->stencil_func[1] = stencil->Function[1]; - key->stencil_fail_op[1] = stencil->FailFunc[1]; - key->stencil_pass_depth_fail_op[1] = stencil->ZFailFunc[1]; - key->stencil_pass_depth_pass_op[1] = stencil->ZPassFunc[1]; - key->stencil_ref[1] = stencil->Ref[1]; - key->stencil_write_mask[1] = stencil->WriteMask[1]; - key->stencil_test_mask[1] = stencil->ValueMask[1]; + key->stencil_func[1] = ctx->Stencil.Function[back]; + key->stencil_fail_op[1] = ctx->Stencil.FailFunc[back]; + key->stencil_pass_depth_fail_op[1] = ctx->Stencil.ZFailFunc[back]; + key->stencil_pass_depth_pass_op[1] = ctx->Stencil.ZPassFunc[back]; + key->stencil_ref[1] = ctx->Stencil.Ref[back]; + key->stencil_write_mask[1] = ctx->Stencil.WriteMask[back]; + key->stencil_test_mask[1] = ctx->Stencil.ValueMask[back]; } - if (brw->attribs.Color->_LogicOpEnabled) - key->logic_op = brw->attribs.Color->LogicOp; + if (ctx->Color._LogicOpEnabled) + key->logic_op = ctx->Color.LogicOp; else key->logic_op = GL_COPY; - key->color_blend = brw->attribs.Color->BlendEnabled; + key->color_blend = ctx->Color.BlendEnabled; if (key->color_blend) { - key->blend_eq_rgb = brw->attribs.Color->BlendEquationRGB; - key->blend_eq_a = brw->attribs.Color->BlendEquationA; - key->blend_src_rgb = brw->attribs.Color->BlendSrcRGB; - key->blend_dst_rgb = brw->attribs.Color->BlendDstRGB; - key->blend_src_a = brw->attribs.Color->BlendSrcA; - key->blend_dst_a = brw->attribs.Color->BlendDstA; + key->blend_eq_rgb = ctx->Color.BlendEquationRGB; + key->blend_eq_a = ctx->Color.BlendEquationA; + key->blend_src_rgb = ctx->Color.BlendSrcRGB; + key->blend_dst_rgb = ctx->Color.BlendDstRGB; + key->blend_src_a = ctx->Color.BlendSrcA; + key->blend_dst_a = ctx->Color.BlendDstA; } - key->alpha_enabled = brw->attribs.Color->AlphaEnabled; + key->alpha_enabled = ctx->Color.AlphaEnabled; if (key->alpha_enabled) { - key->alpha_func = brw->attribs.Color->AlphaFunc; - key->alpha_ref = brw->attribs.Color->AlphaRef; + key->alpha_func = ctx->Color.AlphaFunc; + key->alpha_ref = ctx->Color.AlphaRef; } - key->dither = brw->attribs.Color->DitherFlag; + key->dither = ctx->Color.DitherFlag; - key->depth_test = brw->attribs.Depth->Test; + key->depth_test = ctx->Depth.Test; if (key->depth_test) { - key->depth_func = brw->attribs.Depth->Func; - key->depth_write = brw->attribs.Depth->Mask; + key->depth_func = ctx->Depth.Func; + key->depth_write = ctx->Depth.Mask; } } diff --git a/src/mesa/drivers/dri/i965/brw_clip.c b/src/mesa/drivers/dri/i965/brw_clip.c index 38d8b704d7..5cffcebde4 100644 --- a/src/mesa/drivers/dri/i965/brw_clip.c +++ b/src/mesa/drivers/dri/i965/brw_clip.c @@ -145,14 +145,14 @@ static void upload_clip_prog(struct brw_context *brw) /* CACHE_NEW_VS_PROG */ key.attrs = brw->vs.prog_data->outputs_written; /* _NEW_LIGHT */ - key.do_flat_shading = (brw->attribs.Light->ShadeModel == GL_FLAT); + key.do_flat_shading = (ctx->Light.ShadeModel == GL_FLAT); /* _NEW_TRANSFORM */ - key.nr_userclip = brw_count_bits(brw->attribs.Transform->ClipPlanesEnabled); + key.nr_userclip = brw_count_bits(ctx->Transform.ClipPlanesEnabled); key.clip_mode = BRW_CLIPMODE_NORMAL; /* _NEW_POLYGON */ if (key.primitive == GL_TRIANGLES) { - if (brw->attribs.Polygon->CullFaceMode == GL_FRONT_AND_BACK) + if (ctx->Polygon.CullFaceMode == GL_FRONT_AND_BACK) key.clip_mode = BRW_CLIPMODE_REJECT_ALL; else { GLuint fill_front = CLIP_CULL; @@ -160,44 +160,44 @@ static void upload_clip_prog(struct brw_context *brw) GLuint offset_front = 0; GLuint offset_back = 0; - if (!brw->attribs.Polygon->CullFlag || - brw->attribs.Polygon->CullFaceMode != GL_FRONT) { - switch (brw->attribs.Polygon->FrontMode) { + if (!ctx->Polygon.CullFlag || + ctx->Polygon.CullFaceMode != GL_FRONT) { + switch (ctx->Polygon.FrontMode) { case GL_FILL: fill_front = CLIP_FILL; offset_front = 0; break; case GL_LINE: fill_front = CLIP_LINE; - offset_front = brw->attribs.Polygon->OffsetLine; + offset_front = ctx->Polygon.OffsetLine; break; case GL_POINT: fill_front = CLIP_POINT; - offset_front = brw->attribs.Polygon->OffsetPoint; + offset_front = ctx->Polygon.OffsetPoint; break; } } - if (!brw->attribs.Polygon->CullFlag || - brw->attribs.Polygon->CullFaceMode != GL_BACK) { - switch (brw->attribs.Polygon->BackMode) { + if (!ctx->Polygon.CullFlag || + ctx->Polygon.CullFaceMode != GL_BACK) { + switch (ctx->Polygon.BackMode) { case GL_FILL: fill_back = CLIP_FILL; offset_back = 0; break; case GL_LINE: fill_back = CLIP_LINE; - offset_back = brw->attribs.Polygon->OffsetLine; + offset_back = ctx->Polygon.OffsetLine; break; case GL_POINT: fill_back = CLIP_POINT; - offset_back = brw->attribs.Polygon->OffsetPoint; + offset_back = ctx->Polygon.OffsetPoint; break; } } - if (brw->attribs.Polygon->BackMode != GL_FILL || - brw->attribs.Polygon->FrontMode != GL_FILL) { + if (ctx->Polygon.BackMode != GL_FILL || + ctx->Polygon.FrontMode != GL_FILL) { key.do_unfilled = 1; /* Most cases the fixed function units will handle. Cases where @@ -207,17 +207,17 @@ static void upload_clip_prog(struct brw_context *brw) if (offset_back || offset_front) { /* _NEW_POLYGON, _NEW_BUFFERS */ - key.offset_units = brw->attribs.Polygon->OffsetUnits * brw->intel.polygon_offset_scale; - key.offset_factor = brw->attribs.Polygon->OffsetFactor * ctx->DrawBuffer->_MRD; + key.offset_units = ctx->Polygon.OffsetUnits * brw->intel.polygon_offset_scale; + key.offset_factor = ctx->Polygon.OffsetFactor * ctx->DrawBuffer->_MRD; } - switch (brw->attribs.Polygon->FrontFace) { + switch (ctx->Polygon.FrontFace) { case GL_CCW: key.fill_ccw = fill_front; key.fill_cw = fill_back; key.offset_ccw = offset_front; key.offset_cw = offset_back; - if (brw->attribs.Light->Model.TwoSide && + if (ctx->Light.Model.TwoSide && key.fill_cw != CLIP_CULL) key.copy_bfc_cw = 1; break; @@ -226,7 +226,7 @@ static void upload_clip_prog(struct brw_context *brw) key.fill_ccw = fill_back; key.offset_cw = offset_front; key.offset_ccw = offset_back; - if (brw->attribs.Light->Model.TwoSide && + if (ctx->Light.Model.TwoSide && key.fill_ccw != CLIP_CULL) key.copy_bfc_ccw = 1; break; diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index e2bc08a6cb..eaac6224f6 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -32,6 +32,7 @@ #include "main/imports.h" #include "main/api_noop.h" +#include "main/macros.h" #include "main/vtxfmt.h" #include "main/simple_list.h" #include "shader/shader_api.h" @@ -71,32 +72,10 @@ static void brwInitDriverFunctions( struct dd_function_table *functions ) brwInitFragProgFuncs( functions ); brwInitProgFuncs( functions ); brw_init_queryobj_functions(functions); -} - -static void brw_init_attribs( struct brw_context *brw ) -{ - GLcontext *ctx = &brw->intel.ctx; - - brw->attribs.Color = &ctx->Color; - brw->attribs.Depth = &ctx->Depth; - brw->attribs.Fog = &ctx->Fog; - brw->attribs.Hint = &ctx->Hint; - brw->attribs.Light = &ctx->Light; - brw->attribs.Line = &ctx->Line; - brw->attribs.Point = &ctx->Point; - brw->attribs.Polygon = &ctx->Polygon; - brw->attribs.Scissor = &ctx->Scissor; - brw->attribs.Stencil = &ctx->Stencil; - brw->attribs.Texture = &ctx->Texture; - brw->attribs.Transform = &ctx->Transform; - brw->attribs.Viewport = &ctx->Viewport; - brw->attribs.VertexProgram = &ctx->VertexProgram; - brw->attribs.FragmentProgram = &ctx->FragmentProgram; - brw->attribs.PolygonStipple = &ctx->PolygonStipple[0]; + functions->Viewport = intel_viewport; } - GLboolean brwCreateContext( const __GLcontextModes *mesaVis, __DRIcontextPrivate *driContextPriv, void *sharedContextPrivate) @@ -126,23 +105,24 @@ GLboolean brwCreateContext( const __GLcontextModes *mesaVis, TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline; - ctx->Const.MaxTextureUnits = BRW_MAX_TEX_UNIT; ctx->Const.MaxTextureImageUnits = BRW_MAX_TEX_UNIT; - ctx->Const.MaxTextureCoordUnits = BRW_MAX_TEX_UNIT; + ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */ + ctx->Const.MaxTextureUnits = MIN2(ctx->Const.MaxTextureCoordUnits, + ctx->Const.MaxTextureImageUnits); ctx->Const.MaxVertexTextureImageUnits = 0; /* no vertex shader textures */ - /* Advertise the full hardware capabilities. The new memory - * manager should cope much better with overload situations: + /* Mesa limits textures to 4kx4k; it would be nice to fix that someday */ - ctx->Const.MaxTextureLevels = 12; + ctx->Const.MaxTextureLevels = 13; ctx->Const.Max3DTextureLevels = 9; ctx->Const.MaxCubeTextureLevels = 12; - ctx->Const.MaxTextureRectSize = (1<<11); + ctx->Const.MaxTextureRectSize = (1<<12); + /* if conformance mode is set, swrast can handle any size AA point */ + ctx->Const.MaxPointSizeAA = 255.0; + /* ctx->Const.MaxNativeVertexProgramTemps = 32; */ - brw_init_attribs( brw ); - brw_init_metaops( brw ); brw_init_state( brw ); brw->state.dirty.mesa = ~0; diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index e3904be977..df90c2027f 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -131,18 +131,17 @@ struct brw_context; #define BRW_NEW_WM_INPUT_DIMENSIONS 0x100 #define BRW_NEW_INPUT_VARYING 0x200 #define BRW_NEW_PSP 0x800 -#define BRW_NEW_METAOPS 0x1000 #define BRW_NEW_FENCE 0x2000 -#define BRW_NEW_LOCK 0x4000 -#define BRW_NEW_INDICES 0x8000 -#define BRW_NEW_VERTICES 0x10000 +#define BRW_NEW_INDICES 0x4000 +#define BRW_NEW_VERTICES 0x8000 /** * Used for any batch entry with a relocated pointer that will be used * by any 3D rendering. */ -#define BRW_NEW_BATCH 0x8000 +#define BRW_NEW_BATCH 0x10000 /** brw->depth_region updated */ -#define BRW_NEW_DEPTH_BUFFER 0x10000 +#define BRW_NEW_DEPTH_BUFFER 0x20000 +#define BRW_NEW_NR_SURFACES 0x40000 struct brw_state_flags { /** State update flags signalled by mesa internals */ @@ -158,7 +157,6 @@ struct brw_state_flags { struct brw_vertex_program { struct gl_vertex_program program; GLuint id; - GLuint param_state; /* flags indicating state tracked by params */ }; @@ -166,7 +164,6 @@ struct brw_vertex_program { struct brw_fragment_program { struct gl_fragment_program program; GLuint id; - GLuint param_state; /* flags indicating state tracked by params */ }; @@ -240,7 +237,7 @@ struct brw_vs_ouput_sizes { }; -#define BRW_MAX_TEX_UNIT 8 +#define BRW_MAX_TEX_UNIT 16 #define BRW_WM_MAX_SURF BRW_MAX_TEX_UNIT + MAX_DRAW_BUFFERS enum brw_cache_id { @@ -305,26 +302,6 @@ struct brw_cache { }; - -struct brw_state_pointers { - struct gl_colorbuffer_attrib *Color; - struct gl_depthbuffer_attrib *Depth; - struct gl_fog_attrib *Fog; - struct gl_hint_attrib *Hint; - struct gl_light_attrib *Light; - struct gl_line_attrib *Line; - struct gl_point_attrib *Point; - struct gl_polygon_attrib *Polygon; - GLuint *PolygonStipple; - struct gl_scissor_attrib *Scissor; - struct gl_stencil_attrib *Stencil; - struct gl_texture_attrib *Texture; - struct gl_transform_attrib *Transform; - struct gl_viewport_attrib *Viewport; - struct gl_vertex_program_state *VertexProgram; - struct gl_fragment_program_state *FragmentProgram; -}; - /* Considered adding a member to this struct to document which flags * an update might raise so that ordering of the state atoms can be * checked or derived at runtime. Dropped the idea in favor of having @@ -459,7 +436,6 @@ struct brw_context int validated_bo_count; } state; - struct brw_state_pointers attribs; struct brw_cache cache; struct brw_cached_batch_item *cached_batch_items; @@ -493,28 +469,6 @@ struct brw_context unsigned int offset; } ib; - struct { - /* Will be allocated on demand if needed. - */ - struct brw_state_pointers attribs; - struct gl_vertex_program *vp; - struct gl_fragment_program *fp, *fp_tex; - - struct gl_buffer_object *vbo; - - struct intel_region *saved_draw_region; - GLuint saved_nr_draw_regions; - struct intel_region *saved_depth_region; - - GLuint restore_draw_buffers[MAX_DRAW_BUFFERS]; - GLuint restore_num_draw_buffers; - - struct gl_fragment_program *restore_fp; - - GLboolean active; - } metaops; - - /* Active vertex program: */ const struct gl_vertex_program *vertex_program; @@ -705,13 +659,6 @@ void brw_FrameBufferTexInit( struct brw_context *brw, void brw_FrameBufferTexDestroy( struct brw_context *brw ); void brw_validate_textures( struct brw_context *brw ); -/*====================================================================== - * brw_metaops.c - */ - -void brw_init_metaops( struct brw_context *brw ); -void brw_destroy_metaops( struct brw_context *brw ); - /*====================================================================== * brw_program.c diff --git a/src/mesa/drivers/dri/i965/brw_curbe.c b/src/mesa/drivers/dri/i965/brw_curbe.c index c7bac7b0c5..4eaaa5f871 100644 --- a/src/mesa/drivers/dri/i965/brw_curbe.c +++ b/src/mesa/drivers/dri/i965/brw_curbe.c @@ -48,6 +48,7 @@ */ static void calculate_curbe_offsets( struct brw_context *brw ) { + GLcontext *ctx = &brw->intel.ctx; /* CACHE_NEW_WM_PROG */ GLuint nr_fp_regs = (brw->wm.prog_data->nr_params + 15) / 16; @@ -58,8 +59,8 @@ static void calculate_curbe_offsets( struct brw_context *brw ) GLuint total_regs; /* _NEW_TRANSFORM */ - if (brw->attribs.Transform->ClipPlanesEnabled) { - GLuint nr_planes = 6 + brw_count_bits(brw->attribs.Transform->ClipPlanesEnabled); + if (ctx->Transform.ClipPlanesEnabled) { + GLuint nr_planes = 6 + brw_count_bits(ctx->Transform.ClipPlanesEnabled); nr_clip_regs = (nr_planes * 4 + 15) / 16; } @@ -184,8 +185,8 @@ static void prepare_constant_buffer(struct brw_context *brw) * function will also be called whenever fp or vp changes. */ brw->curbe.tracked_state.dirty.mesa = (_NEW_TRANSFORM|_NEW_PROJECTION); - brw->curbe.tracked_state.dirty.mesa |= vp->param_state; - brw->curbe.tracked_state.dirty.mesa |= fp->param_state; + brw->curbe.tracked_state.dirty.mesa |= vp->program.Base.Parameters->StateFlags; + brw->curbe.tracked_state.dirty.mesa |= fp->program.Base.Parameters->StateFlags; if (sz == 0) { @@ -233,11 +234,11 @@ static void prepare_constant_buffer(struct brw_context *brw) */ assert(MAX_CLIP_PLANES == 6); for (j = 0; j < MAX_CLIP_PLANES; j++) { - if (brw->attribs.Transform->ClipPlanesEnabled & (1<<j)) { - buf[offset + i * 4 + 0] = brw->attribs.Transform->_ClipUserPlane[j][0]; - buf[offset + i * 4 + 1] = brw->attribs.Transform->_ClipUserPlane[j][1]; - buf[offset + i * 4 + 2] = brw->attribs.Transform->_ClipUserPlane[j][2]; - buf[offset + i * 4 + 3] = brw->attribs.Transform->_ClipUserPlane[j][3]; + if (ctx->Transform.ClipPlanesEnabled & (1<<j)) { + buf[offset + i * 4 + 0] = ctx->Transform._ClipUserPlane[j][0]; + buf[offset + i * 4 + 1] = ctx->Transform._ClipUserPlane[j][1]; + buf[offset + i * 4 + 2] = ctx->Transform._ClipUserPlane[j][2]; + buf[offset + i * 4 + 3] = ctx->Transform._ClipUserPlane[j][3]; i++; } } diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index f893dd6742..99fd587e9f 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b/src/mesa/drivers/dri/i965/brw_draw.c @@ -49,7 +49,7 @@ #define FILE_DEBUG_FLAG DEBUG_BATCH -static GLuint hw_prim[GL_POLYGON+1] = { +static GLuint prim_to_hw_prim[GL_POLYGON+1] = { _3DPRIM_POINTLIST, _3DPRIM_LINELIST, _3DPRIM_LINELOOP, @@ -84,15 +84,17 @@ static const GLenum reduced_prim[GL_POLYGON+1] = { */ static GLuint brw_set_prim(struct brw_context *brw, GLenum prim) { + GLcontext *ctx = &brw->intel.ctx; + if (INTEL_DEBUG & DEBUG_PRIMS) _mesa_printf("PRIM: %s\n", _mesa_lookup_enum_by_nr(prim)); /* Slight optimization to avoid the GS program when not needed: */ if (prim == GL_QUAD_STRIP && - brw->attribs.Light->ShadeModel != GL_FLAT && - brw->attribs.Polygon->FrontMode == GL_FILL && - brw->attribs.Polygon->BackMode == GL_FILL) + ctx->Light.ShadeModel != GL_FLAT && + ctx->Polygon.FrontMode == GL_FILL && + ctx->Polygon.BackMode == GL_FILL) prim = GL_TRIANGLE_STRIP; if (prim != brw->primitive) { @@ -103,12 +105,9 @@ static GLuint brw_set_prim(struct brw_context *brw, GLenum prim) brw->intel.reduced_primitive = reduced_prim[prim]; brw->state.dirty.brw |= BRW_NEW_REDUCED_PRIMITIVE; } - - brw_validate_state(brw); - brw_upload_state(brw); } - return hw_prim[prim]; + return prim_to_hw_prim[prim]; } @@ -123,9 +122,9 @@ static GLuint trim(GLenum prim, GLuint length) } -static void brw_emit_prim( struct brw_context *brw, - const struct _mesa_prim *prim ) - +static void brw_emit_prim(struct brw_context *brw, + const struct _mesa_prim *prim, + uint32_t hw_prim) { struct brw_3d_primitive prim_packet; @@ -136,7 +135,7 @@ static void brw_emit_prim( struct brw_context *brw, prim_packet.header.opcode = CMD_3D_PRIM; prim_packet.header.length = sizeof(prim_packet)/4 - 2; prim_packet.header.pad = 0; - prim_packet.header.topology = brw_set_prim(brw, prim->mode); + prim_packet.header.topology = hw_prim; prim_packet.header.indexed = prim->indexed; prim_packet.verts_per_instance = trim(prim->mode, prim->count); @@ -169,14 +168,11 @@ static void brw_merge_inputs( struct brw_context *brw, for (i = 0; i < VERT_ATTRIB_MAX; i++) { brw->vb.inputs[i].glarray = arrays[i]; - /* XXX: metaops passes null arrays */ - if (arrays[i]) { - if (arrays[i]->StrideB != 0) - brw->vb.info.varying |= 1 << i; + if (arrays[i]->StrideB != 0) + brw->vb.info.varying |= 1 << i; brw->vb.info.sizes[i/16] |= (brw->vb.inputs[i].glarray->Size - 1) << ((i%16) * 2); - } } /* Raise statechanges if input sizes and varying have changed: @@ -195,12 +191,13 @@ static GLboolean check_fallbacks( struct brw_context *brw, const struct _mesa_prim *prim, GLuint nr_prims ) { + GLcontext *ctx = &brw->intel.ctx; GLuint i; if (!brw->intel.strict_conformance) return GL_FALSE; - if (brw->attribs.Polygon->SmoothFlag) { + if (ctx->Polygon.SmoothFlag) { for (i = 0; i < nr_prims; i++) if (reduced_prim[prim[i].mode] == GL_TRIANGLES) return GL_TRUE; @@ -209,7 +206,7 @@ static GLboolean check_fallbacks( struct brw_context *brw, /* BRW hardware will do AA lines, but they are non-conformant it * seems. TBD whether we keep this fallback: */ - if (brw->attribs.Line->SmoothFlag) { + if (ctx->Line.SmoothFlag) { for (i = 0; i < nr_prims; i++) if (reduced_prim[prim[i].mode] == GL_LINES) return GL_TRUE; @@ -218,7 +215,7 @@ static GLboolean check_fallbacks( struct brw_context *brw, /* Stipple -- these fallbacks could be resolved with a little * bit of work? */ - if (brw->attribs.Line->StippleFlag) { + if (ctx->Line.StippleFlag) { for (i = 0; i < nr_prims; i++) { /* GS doesn't get enough information to know when to reset * the stipple counter?!? @@ -227,14 +224,14 @@ static GLboolean check_fallbacks( struct brw_context *brw, return GL_TRUE; if (prim[i].mode == GL_POLYGON && - (brw->attribs.Polygon->FrontMode == GL_LINE || - brw->attribs.Polygon->BackMode == GL_LINE)) + (ctx->Polygon.FrontMode == GL_LINE || + ctx->Polygon.BackMode == GL_LINE)) return GL_TRUE; } } - if (brw->attribs.Point->SmoothFlag) { + if (ctx->Point.SmoothFlag) { for (i = 0; i < nr_prims; i++) if (prim[i].mode == GL_POINTS) return GL_TRUE; @@ -258,11 +255,15 @@ static GLboolean brw_try_draw_prims( GLcontext *ctx, struct brw_context *brw = brw_context(ctx); GLboolean retval = GL_FALSE; GLboolean warn = GL_FALSE; + GLboolean first_time = GL_TRUE; GLuint i; if (ctx->NewState) _mesa_update_state( ctx ); + if (check_fallbacks(brw, prim, nr_prims)) + return GL_FALSE; + brw_validate_textures( brw ); /* Bind all inputs, derive varying and size information: @@ -275,6 +276,7 @@ static GLboolean brw_try_draw_prims( GLcontext *ctx, brw->vb.min_index = min_index; brw->vb.max_index = max_index; brw->state.dirty.brw |= BRW_NEW_VERTICES; + /* Have to validate state quite late. Will rebuild tnl_program, * which depends on varying information. * @@ -289,59 +291,58 @@ static GLboolean brw_try_draw_prims( GLcontext *ctx, return GL_TRUE; } - /* Flush the batch if it's approaching full, so that we don't wrap while - * we've got validated state that needs to be in the same batch as the - * primitives. This fraction is just a guess (minimal full state plus - * a primitive is around 512 bytes), and would be better if we had - * an upper bound of how much we might emit in a single - * brw_try_draw_prims(). - */ - intel_batchbuffer_require_space(intel->batch, intel->batch->size / 4, - LOOP_CLIPRECTS); - { - /* Set the first primitive early, ahead of validate_state: + for (i = 0; i < nr_prims; i++) { + uint32_t hw_prim; + + /* Flush the batch if it's approaching full, so that we don't wrap while + * we've got validated state that needs to be in the same batch as the + * primitives. This fraction is just a guess (minimal full state plus + * a primitive is around 512 bytes), and would be better if we had + * an upper bound of how much we might emit in a single + * brw_try_draw_prims(). */ - brw_set_prim(brw, prim[0].mode); + intel_batchbuffer_require_space(intel->batch, intel->batch->size / 4, + LOOP_CLIPRECTS); - brw_validate_state( brw ); + hw_prim = brw_set_prim(brw, prim[i].mode); - /* Various fallback checks: - */ - if (brw->intel.Fallback) - goto out; + if (first_time || (brw->state.dirty.brw & BRW_NEW_PRIMITIVE)) { + first_time = GL_FALSE; - if (check_fallbacks( brw, prim, nr_prims )) - goto out; + brw_validate_state(brw); - /* Check that we can fit our state in with our existing batchbuffer, or - * flush otherwise. - */ - if (dri_bufmgr_check_aperture_space(brw->state.validated_bos, - brw->state.validated_bo_count)) { - static GLboolean warned; - intel_batchbuffer_flush(intel->batch); - - /* Validate the state after we flushed the batch (which would have - * changed the set of dirty state). If we still fail to - * check_aperture, warn of what's happening, but attempt to continue - * on since it may succeed anyway, and the user would probably rather - * see a failure and a warning than a fallback. + /* Various fallback checks: */ + if (brw->intel.Fallback) + goto out; + + /* Check that we can fit our state in with our existing batchbuffer, or + * flush otherwise. */ - brw_validate_state(brw); - if (!warned && - dri_bufmgr_check_aperture_space(brw->state.validated_bos, + if (dri_bufmgr_check_aperture_space(brw->state.validated_bos, brw->state.validated_bo_count)) { - warn = GL_TRUE; - warned = GL_TRUE; + static GLboolean warned; + intel_batchbuffer_flush(intel->batch); + + /* Validate the state after we flushed the batch (which would have + * changed the set of dirty state). If we still fail to + * check_aperture, warn of what's happening, but attempt to continue + * on since it may succeed anyway, and the user would probably rather + * see a failure and a warning than a fallback. + */ + brw_validate_state(brw); + if (!warned && + dri_bufmgr_check_aperture_space(brw->state.validated_bos, + brw->state.validated_bo_count)) { + warn = GL_TRUE; + warned = GL_TRUE; + } } - } - - brw_upload_state(brw); - for (i = 0; i < nr_prims; i++) { - brw_emit_prim(brw, &prim[i]); + brw_upload_state(brw); } + brw_emit_prim(brw, &prim[i], hw_prim); + retval = GL_TRUE; } diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c index 73d6dea01e..02998d5957 100644 --- a/src/mesa/drivers/dri/i965/brw_draw_upload.c +++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c @@ -156,7 +156,13 @@ static GLuint byte_types_scale[5] = { }; -static GLuint get_surface_type( GLenum type, GLuint size, GLboolean normalized ) +/** + * Given vertex array type/size/format/normalized info, return + * the appopriate hardware surface type. + * Format will be GL_RGBA or possibly GL_BGRA for GLubyte[4] color arrays. + */ +static GLuint get_surface_type( GLenum type, GLuint size, + GLenum format, GLboolean normalized ) { if (INTEL_DEBUG & DEBUG_VERTS) _mesa_printf("type %s size %d normalized %d\n", @@ -171,11 +177,20 @@ static GLuint get_surface_type( GLenum type, GLuint size, GLboolean normalized ) case GL_BYTE: return byte_types_norm[size]; case GL_UNSIGNED_INT: return uint_types_norm[size]; case GL_UNSIGNED_SHORT: return ushort_types_norm[size]; - case GL_UNSIGNED_BYTE: return ubyte_types_norm[size]; + case GL_UNSIGNED_BYTE: + if (format == GL_BGRA) { + /* See GL_EXT_vertex_array_bgra */ + assert(size == 4); + return BRW_SURFACEFORMAT_B8G8R8A8_UNORM; + } + else { + return ubyte_types_norm[size]; + } default: assert(0); return 0; } } else { + assert(format == GL_RGBA); /* sanity check */ switch (type) { case GL_DOUBLE: return double_types[size]; case GL_FLOAT: return float_types[size]; @@ -281,7 +296,7 @@ copy_array_to_vbo_array( struct brw_context *brw, } else { void *data; char *dest; - const char *src = element->glarray->Ptr; + const unsigned char *src = element->glarray->Ptr; int i; data = _mesa_malloc(dst_stride * element->count); @@ -484,6 +499,7 @@ static void brw_emit_vertices(struct brw_context *brw) struct brw_vertex_element *input = enabled[i]; uint32_t format = get_surface_type(input->glarray->Type, input->glarray->Size, + input->glarray->Format, input->glarray->Normalized); uint32_t comp0 = BRW_VE1_COMPONENT_STORE_SRC; uint32_t comp1 = BRW_VE1_COMPONENT_STORE_SRC; @@ -549,7 +565,7 @@ static void brw_prepare_indices(struct brw_context *brw) */ dri_bo_subdata(bo, offset, ib_size, index_buffer->ptr); } else { - offset = (GLuint)index_buffer->ptr; + offset = (GLuint) (unsigned long) index_buffer->ptr; /* If the index buffer isn't aligned to its element size, we have to * rebase it into a temporary. diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h index 49b422ee2f..9e2b39af9b 100644 --- a/src/mesa/drivers/dri/i965/brw_eu.h +++ b/src/mesa/drivers/dri/i965/brw_eu.h @@ -129,17 +129,28 @@ static INLINE int type_sz( GLuint type ) } } +/** + * Construct a brw_reg. + * \param file one of the BRW_x_REGISTER_FILE values + * \param nr register number/index + * \param subnr register sub number + * \param type one of BRW_REGISTER_TYPE_x + * \param vstride one of BRW_VERTICAL_STRIDE_x + * \param width one of BRW_WIDTH_x + * \param hstride one of BRW_HORIZONTAL_STRIDE_x + * \param swizzle one of BRW_SWIZZLE_x + * \param writemask WRITEMASK_X/Y/Z/W bitfield + */ static INLINE struct brw_reg brw_reg( GLuint file, - GLuint nr, - GLuint subnr, - GLuint type, - GLuint vstride, - GLuint width, - GLuint hstride, - GLuint swizzle, - GLuint writemask) -{ - + GLuint nr, + GLuint subnr, + GLuint type, + GLuint vstride, + GLuint width, + GLuint hstride, + GLuint swizzle, + GLuint writemask ) +{ struct brw_reg reg; reg.type = type; reg.file = file; @@ -166,6 +177,7 @@ static INLINE struct brw_reg brw_reg( GLuint file, return reg; } +/** Construct float[16] register */ static INLINE struct brw_reg brw_vec16_reg( GLuint file, GLuint nr, GLuint subnr ) @@ -181,6 +193,7 @@ static INLINE struct brw_reg brw_vec16_reg( GLuint file, WRITEMASK_XYZW); } +/** Construct float[8] register */ static INLINE struct brw_reg brw_vec8_reg( GLuint file, GLuint nr, GLuint subnr ) @@ -196,7 +209,7 @@ static INLINE struct brw_reg brw_vec8_reg( GLuint file, WRITEMASK_XYZW); } - +/** Construct float[4] register */ static INLINE struct brw_reg brw_vec4_reg( GLuint file, GLuint nr, GLuint subnr ) @@ -212,7 +225,7 @@ static INLINE struct brw_reg brw_vec4_reg( GLuint file, WRITEMASK_XYZW); } - +/** Construct float[2] register */ static INLINE struct brw_reg brw_vec2_reg( GLuint file, GLuint nr, GLuint subnr ) @@ -228,6 +241,7 @@ static INLINE struct brw_reg brw_vec2_reg( GLuint file, WRITEMASK_XY); } +/** Construct float[1] register */ static INLINE struct brw_reg brw_vec1_reg( GLuint file, GLuint nr, GLuint subnr ) @@ -277,6 +291,7 @@ static INLINE struct brw_reg byte_offset( struct brw_reg reg, } +/** Construct unsigned word[16] register */ static INLINE struct brw_reg brw_uw16_reg( GLuint file, GLuint nr, GLuint subnr ) @@ -284,6 +299,7 @@ static INLINE struct brw_reg brw_uw16_reg( GLuint file, return suboffset(retype(brw_vec16_reg(file, nr, 0), BRW_REGISTER_TYPE_UW), subnr); } +/** Construct unsigned word[8] register */ static INLINE struct brw_reg brw_uw8_reg( GLuint file, GLuint nr, GLuint subnr ) @@ -291,6 +307,7 @@ static INLINE struct brw_reg brw_uw8_reg( GLuint file, return suboffset(retype(brw_vec8_reg(file, nr, 0), BRW_REGISTER_TYPE_UW), subnr); } +/** Construct unsigned word[1] register */ static INLINE struct brw_reg brw_uw1_reg( GLuint file, GLuint nr, GLuint subnr ) @@ -311,6 +328,7 @@ static INLINE struct brw_reg brw_imm_reg( GLuint type ) 0); } +/** Construct float immediate register */ static INLINE struct brw_reg brw_imm_f( GLfloat f ) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_F); @@ -318,6 +336,7 @@ static INLINE struct brw_reg brw_imm_f( GLfloat f ) return imm; } +/** Construct integer immediate register */ static INLINE struct brw_reg brw_imm_d( GLint d ) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_D); @@ -325,6 +344,7 @@ static INLINE struct brw_reg brw_imm_d( GLint d ) return imm; } +/** Construct uint immediate register */ static INLINE struct brw_reg brw_imm_ud( GLuint ud ) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_UD); @@ -332,6 +352,7 @@ static INLINE struct brw_reg brw_imm_ud( GLuint ud ) return imm; } +/** Construct ushort immediate register */ static INLINE struct brw_reg brw_imm_uw( GLushort uw ) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_UW); @@ -339,6 +360,7 @@ static INLINE struct brw_reg brw_imm_uw( GLushort uw ) return imm; } +/** Construct short immediate register */ static INLINE struct brw_reg brw_imm_w( GLshort w ) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_W); @@ -350,8 +372,7 @@ static INLINE struct brw_reg brw_imm_w( GLshort w ) * numbers alias with _V and _VF below: */ -/* Vector of eight signed half-byte values: - */ +/** Construct vector of eight signed half-byte values */ static INLINE struct brw_reg brw_imm_v( GLuint v ) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_V); @@ -362,8 +383,7 @@ static INLINE struct brw_reg brw_imm_v( GLuint v ) return imm; } -/* Vector of four 8-bit float values: - */ +/** Construct vector of four 8-bit float values */ static INLINE struct brw_reg brw_imm_vf( GLuint v ) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); @@ -400,44 +420,43 @@ static INLINE struct brw_reg brw_address( struct brw_reg reg ) return brw_imm_uw(reg.nr * REG_SIZE + reg.subnr); } - -static INLINE struct brw_reg brw_vec1_grf( GLuint nr, - GLuint subnr ) +/** Construct float[1] general-purpose register */ +static INLINE struct brw_reg brw_vec1_grf( GLuint nr, GLuint subnr ) { return brw_vec1_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); } -static INLINE struct brw_reg brw_vec8_grf( GLuint nr, - GLuint subnr ) +/** Construct float[2] general-purpose register */ +static INLINE struct brw_reg brw_vec2_grf( GLuint nr, GLuint subnr ) { - return brw_vec8_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); + return brw_vec2_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); } -static INLINE struct brw_reg brw_vec4_grf( GLuint nr, - GLuint subnr ) +/** Construct float[4] general-purpose register */ +static INLINE struct brw_reg brw_vec4_grf( GLuint nr, GLuint subnr ) { return brw_vec4_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); } - -static INLINE struct brw_reg brw_vec2_grf( GLuint nr, - GLuint subnr ) +/** Construct float[8] general-purpose register */ +static INLINE struct brw_reg brw_vec8_grf( GLuint nr, GLuint subnr ) { - return brw_vec2_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); + return brw_vec8_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); } -static INLINE struct brw_reg brw_uw8_grf( GLuint nr, - GLuint subnr ) + +static INLINE struct brw_reg brw_uw8_grf( GLuint nr, GLuint subnr ) { return brw_uw8_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); } -static INLINE struct brw_reg brw_uw16_grf( GLuint nr, - GLuint subnr ) +static INLINE struct brw_reg brw_uw16_grf( GLuint nr, GLuint subnr ) { return brw_uw16_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); } + +/** Construct null register (usually used for setting condition codes) */ static INLINE struct brw_reg brw_null_reg( void ) { return brw_vec8_reg(BRW_ARCHITECTURE_REGISTER_FILE, @@ -524,13 +543,13 @@ static INLINE struct brw_reg stride( struct brw_reg reg, GLuint width, GLuint hstride ) { - reg.vstride = cvt(vstride); reg.width = cvt(width) - 1; reg.hstride = cvt(hstride); return reg; } + static INLINE struct brw_reg vec16( struct brw_reg reg ) { return stride(reg, 16,16,1); @@ -556,6 +575,7 @@ static INLINE struct brw_reg vec1( struct brw_reg reg ) return stride(reg, 0,1,0); } + static INLINE struct brw_reg get_element( struct brw_reg reg, GLuint elt ) { return vec1(suboffset(reg, elt)); @@ -687,7 +707,7 @@ static INLINE struct brw_indirect brw_indirect( GLuint addr_subnr, GLint offset static INLINE struct brw_instruction *current_insn( struct brw_compile *p) { - return &p->store[p->nr_insn]; + return &p->store[p->nr_insn]; } void brw_pop_insn_state( struct brw_compile *p ); @@ -733,6 +753,7 @@ ALU2(ADD) ALU2(MUL) ALU1(FRC) ALU1(RNDD) +ALU1(RNDZ) ALU2(MAC) ALU2(MACH) ALU1(LZD) diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index ce4cf46cfa..4e099b5945 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c @@ -439,6 +439,7 @@ ALU2(ADD) ALU2(MUL) ALU1(FRC) ALU1(RNDD) +ALU1(RNDZ) ALU2(MAC) ALU2(MACH) ALU1(LZD) diff --git a/src/mesa/drivers/dri/i965/brw_fallback.c b/src/mesa/drivers/dri/i965/brw_fallback.c index 4ea660a51a..e63098fdd4 100644 --- a/src/mesa/drivers/dri/i965/brw_fallback.c +++ b/src/mesa/drivers/dri/i965/brw_fallback.c @@ -47,20 +47,12 @@ static GLboolean do_check_fallback(struct brw_context *brw) GLcontext *ctx = &brw->intel.ctx; GLuint i; - /* BRW_NEW_METAOPS - */ - if (brw->metaops.active) - return GL_FALSE; - if (brw->intel.no_rast) { DBG("FALLBACK: rasterization disabled\n"); return GL_TRUE; } /* _NEW_RENDERMODE - * - * XXX: need to save/restore RenderMode in metaops state, or - * somehow move to a new attribs pointer: */ if (ctx->RenderMode != GL_RENDER) { DBG("FALLBACK: render mode\n"); @@ -70,7 +62,7 @@ static GLboolean do_check_fallback(struct brw_context *brw) /* _NEW_TEXTURE: */ for (i = 0; i < BRW_MAX_TEX_UNIT; i++) { - struct gl_texture_unit *texUnit = &brw->attribs.Texture->Unit[i]; + struct gl_texture_unit *texUnit = &ctx->Texture.Unit[i]; if (texUnit->_ReallyEnabled) { struct intel_texture_object *intelObj = intel_texture_object(texUnit->_Current); struct gl_texture_image *texImage = intelObj->base.Image[0][intelObj->firstLevel]; @@ -83,7 +75,7 @@ static GLboolean do_check_fallback(struct brw_context *brw) /* _NEW_STENCIL */ - if (brw->attribs.Stencil->Enabled && + if (ctx->Stencil.Enabled && !brw->intel.hw_stencil) { DBG("FALLBACK: stencil\n"); return GL_TRUE; @@ -101,7 +93,7 @@ static void check_fallback(struct brw_context *brw) const struct brw_tracked_state brw_check_fallback = { .dirty = { .mesa = _NEW_BUFFERS | _NEW_RENDERMODE | _NEW_TEXTURE | _NEW_STENCIL, - .brw = BRW_NEW_METAOPS, + .brw = 0, .cache = 0 }, .prepare = check_fallback diff --git a/src/mesa/drivers/dri/i965/brw_metaops.c b/src/mesa/drivers/dri/i965/brw_metaops.c deleted file mode 100644 index 41bfa2e256..0000000000 --- a/src/mesa/drivers/dri/i965/brw_metaops.c +++ /dev/null @@ -1,583 +0,0 @@ -/* - Copyright (C) Intel Corp. 2006. All Rights Reserved. - Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to - develop this 3D driver. - - Permission is hereby granted, free of charge, to any person obtaining - a copy of this software and associated documentation files (the - "Software"), to deal in the Software without restriction, including - without limitation the rights to use, copy, modify, merge, publish, - distribute, sublicense, and/or sell copies of the Software, and to - permit persons to whom the Software is furnished to do so, subject to - the following conditions: - - The above copyright notice and this permission notice (including the - next paragraph) shall be included in all copies or substantial - portions of the Software. - - THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE - LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION - OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - - **********************************************************************/ - /* - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - * frame buffer texture by Gary Wong <gtw@gnu.org> - */ - - - -#include "main/glheader.h" -#include "main/context.h" -#include "main/macros.h" - -#include "shader/arbprogparse.h" - -#include "intel_screen.h" -#include "intel_batchbuffer.h" -#include "intel_regions.h" -#include "intel_buffers.h" - -#include "brw_context.h" -#include "brw_defines.h" -#include "brw_draw.h" -#include "brw_fallback.h" - -#define INIT(brw, STRUCT, ATTRIB) \ -do { \ - brw->attribs.ATTRIB = &ctx->ATTRIB; \ -} while (0) - -#define DUP(brw, STRUCT, ATTRIB) \ -do { \ - brw->metaops.attribs.ATTRIB = MALLOC_STRUCT(STRUCT); \ - memcpy(brw->metaops.attribs.ATTRIB, \ - brw->attribs.ATTRIB, \ - sizeof(struct STRUCT)); \ -} while (0) - - -#define INSTALL(brw, ATTRIB, STATE) \ -do { \ - brw->attribs.ATTRIB = brw->metaops.attribs.ATTRIB; \ - brw->state.dirty.mesa |= STATE; \ -} while (0) - -#define RESTORE(brw, ATTRIB, STATE) \ -do { \ - brw->attribs.ATTRIB = &brw->intel.ctx.ATTRIB; \ - brw->state.dirty.mesa |= STATE; \ -} while (0) - -static void init_attribs( struct brw_context *brw ) -{ - DUP(brw, gl_colorbuffer_attrib, Color); - DUP(brw, gl_depthbuffer_attrib, Depth); - DUP(brw, gl_fog_attrib, Fog); - DUP(brw, gl_hint_attrib, Hint); - DUP(brw, gl_light_attrib, Light); - DUP(brw, gl_line_attrib, Line); - DUP(brw, gl_point_attrib, Point); - DUP(brw, gl_polygon_attrib, Polygon); - DUP(brw, gl_scissor_attrib, Scissor); - DUP(brw, gl_stencil_attrib, Stencil); - DUP(brw, gl_texture_attrib, Texture); - DUP(brw, gl_transform_attrib, Transform); - DUP(brw, gl_viewport_attrib, Viewport); - DUP(brw, gl_vertex_program_state, VertexProgram); - DUP(brw, gl_fragment_program_state, FragmentProgram); -} - -static void install_attribs( struct brw_context *brw ) -{ - INSTALL(brw, Color, _NEW_COLOR); - INSTALL(brw, Depth, _NEW_DEPTH); - INSTALL(brw, Fog, _NEW_FOG); - INSTALL(brw, Hint, _NEW_HINT); - INSTALL(brw, Light, _NEW_LIGHT); - INSTALL(brw, Line, _NEW_LINE); - INSTALL(brw, Point, _NEW_POINT); - INSTALL(brw, Polygon, _NEW_POLYGON); - INSTALL(brw, Scissor, _NEW_SCISSOR); - INSTALL(brw, Stencil, _NEW_STENCIL); - INSTALL(brw, Texture, _NEW_TEXTURE); - INSTALL(brw, Transform, _NEW_TRANSFORM); - INSTALL(brw, Viewport, _NEW_VIEWPORT); - INSTALL(brw, VertexProgram, _NEW_PROGRAM); - INSTALL(brw, FragmentProgram, _NEW_PROGRAM); -} - -static void restore_attribs( struct brw_context *brw ) -{ - RESTORE(brw, Color, _NEW_COLOR); - RESTORE(brw, Depth, _NEW_DEPTH); - RESTORE(brw, Fog, _NEW_FOG); - RESTORE(brw, Hint, _NEW_HINT); - RESTORE(brw, Light, _NEW_LIGHT); - RESTORE(brw, Line, _NEW_LINE); - RESTORE(brw, Point, _NEW_POINT); - RESTORE(brw, Polygon, _NEW_POLYGON); - RESTORE(brw, Scissor, _NEW_SCISSOR); - RESTORE(brw, Stencil, _NEW_STENCIL); - RESTORE(brw, Texture, _NEW_TEXTURE); - RESTORE(brw, Transform, _NEW_TRANSFORM); - RESTORE(brw, Viewport, _NEW_VIEWPORT); - RESTORE(brw, VertexProgram, _NEW_PROGRAM); - RESTORE(brw, FragmentProgram, _NEW_PROGRAM); -} - - -static const char *vp_prog = - "!!ARBvp1.0\n" - "MOV result.color, vertex.color;\n" - "MOV result.position, vertex.position;\n" - "END\n"; - -static const char *fp_prog = - "!!ARBfp1.0\n" - "MOV result.color, fragment.color;\n" - "END\n"; - -static const char *fp_tex_prog = - "!!ARBfp1.0\n" - "TEMP a;\n" - "ADD a, fragment.position, program.local[0];\n" - "MUL a, a, program.local[1];\n" - "TEX result.color, a, texture[0], 2D;\n" - "MOV result.depth.z, fragment.position;\n" - "END\n"; - -/* Derived values of importance: - * - * FragmentProgram->_Current - * VertexProgram->_Enabled - * brw->vertex_program - * DrawBuffer->_ColorDrawBufferIndexes[0] - * - * - * More if drawpixels-through-texture is added. - */ -static void init_metaops_state( struct brw_context *brw ) -{ - GLcontext *ctx = &brw->intel.ctx; - - brw->metaops.vbo = ctx->Driver.NewBufferObject(ctx, 1, GL_ARRAY_BUFFER_ARB); - - ctx->Driver.BufferData(ctx, - GL_ARRAY_BUFFER_ARB, - 4096, - NULL, - GL_DYNAMIC_DRAW_ARB, - brw->metaops.vbo); - - brw->metaops.fp = (struct gl_fragment_program *) - ctx->Driver.NewProgram(ctx, GL_FRAGMENT_PROGRAM_ARB, 1 ); - - brw->metaops.fp_tex = (struct gl_fragment_program *) - ctx->Driver.NewProgram(ctx, GL_FRAGMENT_PROGRAM_ARB, 1 ); - - brw->metaops.vp = (struct gl_vertex_program *) - ctx->Driver.NewProgram(ctx, GL_VERTEX_PROGRAM_ARB, 1 ); - - _mesa_parse_arb_fragment_program(ctx, GL_FRAGMENT_PROGRAM_ARB, - fp_prog, strlen(fp_prog), - brw->metaops.fp); - - _mesa_parse_arb_fragment_program(ctx, GL_FRAGMENT_PROGRAM_ARB, - fp_tex_prog, strlen(fp_tex_prog), - brw->metaops.fp_tex); - - _mesa_parse_arb_vertex_program(ctx, GL_VERTEX_PROGRAM_ARB, - vp_prog, strlen(vp_prog), - brw->metaops.vp); - - brw->metaops.attribs.VertexProgram->_Current = brw->metaops.vp; - brw->metaops.attribs.VertexProgram->_Enabled = GL_TRUE; - - brw->metaops.attribs.FragmentProgram->_Current = brw->metaops.fp; -} - -static void meta_flat_shade( struct intel_context *intel ) -{ - struct brw_context *brw = brw_context(&intel->ctx); - - brw->metaops.attribs.Light->ShadeModel = GL_FLAT; - brw->state.dirty.mesa |= _NEW_LIGHT; -} - - -static void meta_no_stencil_write( struct intel_context *intel ) -{ - struct brw_context *brw = brw_context(&intel->ctx); - - brw->metaops.attribs.Stencil->Enabled = GL_FALSE; - brw->metaops.attribs.Stencil->WriteMask[0] = GL_FALSE; - brw->state.dirty.mesa |= _NEW_STENCIL; -} - -static void meta_no_depth_write( struct intel_context *intel ) -{ - struct brw_context *brw = brw_context(&intel->ctx); - - brw->metaops.attribs.Depth->Test = GL_FALSE; - brw->metaops.attribs.Depth->Mask = GL_FALSE; - brw->state.dirty.mesa |= _NEW_DEPTH; -} - - -static void meta_depth_replace( struct intel_context *intel ) -{ - struct brw_context *brw = brw_context(&intel->ctx); - - /* ctx->Driver.Enable( ctx, GL_DEPTH_TEST, GL_TRUE ) - * ctx->Driver.DepthMask( ctx, GL_TRUE ) - */ - brw->metaops.attribs.Depth->Test = GL_TRUE; - brw->metaops.attribs.Depth->Mask = GL_TRUE; - brw->state.dirty.mesa |= _NEW_DEPTH; - - /* ctx->Driver.DepthFunc( ctx, GL_ALWAYS ) - */ - brw->metaops.attribs.Depth->Func = GL_ALWAYS; - - brw->state.dirty.mesa |= _NEW_DEPTH; -} - - -static void meta_stencil_replace( struct intel_context *intel, - GLuint s_mask, - GLuint s_clear) -{ - struct brw_context *brw = brw_context(&intel->ctx); - - brw->metaops.attribs.Stencil->Enabled = GL_TRUE; - brw->metaops.attribs.Stencil->WriteMask[0] = s_mask; - brw->metaops.attribs.Stencil->ValueMask[0] = 0xff; - brw->metaops.attribs.Stencil->Ref[0] = s_clear; - brw->metaops.attribs.Stencil->Function[0] = GL_ALWAYS; - brw->metaops.attribs.Stencil->FailFunc[0] = GL_REPLACE; - brw->metaops.attribs.Stencil->ZPassFunc[0] = GL_REPLACE; - brw->metaops.attribs.Stencil->ZFailFunc[0] = GL_REPLACE; - brw->state.dirty.mesa |= _NEW_STENCIL; -} - - -static void meta_color_mask( struct intel_context *intel, GLboolean state ) -{ - struct brw_context *brw = brw_context(&intel->ctx); - - if (state) - COPY_4V(brw->metaops.attribs.Color->ColorMask, - brw->intel.ctx.Color.ColorMask); - else - ASSIGN_4V(brw->metaops.attribs.Color->ColorMask, 0, 0, 0, 0); - - brw->state.dirty.mesa |= _NEW_COLOR; -} - -static void meta_no_texture( struct intel_context *intel ) -{ - struct brw_context *brw = brw_context(&intel->ctx); - - brw->metaops.attribs.FragmentProgram->_Current = brw->metaops.fp; - - brw->metaops.attribs.Texture->CurrentUnit = 0; - brw->metaops.attribs.Texture->_EnabledUnits = 0; - brw->metaops.attribs.Texture->_EnabledCoordUnits = 0; - brw->metaops.attribs.Texture->Unit[ 0 ].Enabled = 0; - brw->metaops.attribs.Texture->Unit[ 0 ]._ReallyEnabled = 0; - - brw->state.dirty.mesa |= _NEW_TEXTURE | _NEW_PROGRAM; -} - -static void meta_texture_blend_replace(struct intel_context *intel) -{ - struct brw_context *brw = brw_context(&intel->ctx); - - brw->metaops.attribs.Texture->CurrentUnit = 0; - brw->metaops.attribs.Texture->_EnabledUnits = 1; - brw->metaops.attribs.Texture->_EnabledCoordUnits = 1; - brw->metaops.attribs.Texture->Unit[ 0 ].Enabled = TEXTURE_2D_BIT; - brw->metaops.attribs.Texture->Unit[ 0 ]._ReallyEnabled = TEXTURE_2D_BIT; - brw->metaops.attribs.Texture->Unit[ 0 ].Current2D = - intel->frame_buffer_texobj; - brw->metaops.attribs.Texture->Unit[ 0 ]._Current = - intel->frame_buffer_texobj; - - brw->state.dirty.mesa |= _NEW_TEXTURE | _NEW_PROGRAM; -} - -static void meta_import_pixel_state(struct intel_context *intel) -{ - struct brw_context *brw = brw_context(&intel->ctx); - - RESTORE(brw, Color, _NEW_COLOR); - RESTORE(brw, Depth, _NEW_DEPTH); - RESTORE(brw, Fog, _NEW_FOG); - RESTORE(brw, Scissor, _NEW_SCISSOR); - RESTORE(brw, Stencil, _NEW_STENCIL); - RESTORE(brw, Texture, _NEW_TEXTURE); - RESTORE(brw, FragmentProgram, _NEW_PROGRAM); -} - -static void meta_frame_buffer_texture( struct intel_context *intel, - GLint xoff, GLint yoff ) -{ - struct brw_context *brw = brw_context(&intel->ctx); - struct intel_region *region = intel_drawbuf_region( intel ); - - INSTALL(brw, FragmentProgram, _NEW_PROGRAM); - - brw->metaops.attribs.FragmentProgram->_Current = brw->metaops.fp_tex; - /* This is unfortunate, but seems to be necessary, since later on we - will end up calling _mesa_load_state_parameters to lookup the - local params (below), and that will want to look in ctx.FragmentProgram - instead of brw->attribs.FragmentProgram. */ - intel->ctx.FragmentProgram.Current = brw->metaops.fp_tex; - - brw->metaops.fp_tex->Base.LocalParams[ 0 ][ 0 ] = xoff; - brw->metaops.fp_tex->Base.LocalParams[ 0 ][ 1 ] = yoff; - brw->metaops.fp_tex->Base.LocalParams[ 0 ][ 2 ] = 0.0; - brw->metaops.fp_tex->Base.LocalParams[ 0 ][ 3 ] = 0.0; - brw->metaops.fp_tex->Base.LocalParams[ 1 ][ 0 ] = - 1.0 / region->pitch; - brw->metaops.fp_tex->Base.LocalParams[ 1 ][ 1 ] = - -1.0 / region->height; - brw->metaops.fp_tex->Base.LocalParams[ 1 ][ 2 ] = 0.0; - brw->metaops.fp_tex->Base.LocalParams[ 1 ][ 3 ] = 1.0; - - brw->state.dirty.mesa |= _NEW_PROGRAM; -} - - -static void meta_draw_region( struct intel_context *intel, - struct intel_region *draw_region, - struct intel_region *depth_region ) -{ - struct brw_context *brw = brw_context(&intel->ctx); - - if (!brw->metaops.saved_draw_region) { - brw->metaops.saved_draw_region = brw->state.draw_regions[0]; - brw->metaops.saved_nr_draw_regions = brw->state.nr_draw_regions; - brw->metaops.saved_depth_region = brw->state.depth_region; - } - - brw->state.draw_regions[0] = draw_region; - brw->state.nr_draw_regions = 1; - brw->state.depth_region = depth_region; - - if (intel->frame_buffer_texobj != NULL) - brw_FrameBufferTexDestroy(brw); - - if (draw_region) - brw_FrameBufferTexInit(brw, draw_region); - - brw->state.dirty.mesa |= _NEW_BUFFERS; -} - - -static void meta_draw_quad(struct intel_context *intel, - GLfloat x0, GLfloat x1, - GLfloat y0, GLfloat y1, - GLfloat z, - GLuint color, - GLfloat s0, GLfloat s1, - GLfloat t0, GLfloat t1) -{ - GLcontext *ctx = &intel->ctx; - struct brw_context *brw = brw_context(&intel->ctx); - struct gl_client_array pos_array; - struct gl_client_array color_array; - struct gl_client_array *attribs[VERT_ATTRIB_MAX]; - struct _mesa_prim prim[1]; - GLfloat pos[4][3]; - - ctx->Driver.BufferData(ctx, - GL_ARRAY_BUFFER_ARB, - sizeof(pos) + sizeof(color), - NULL, - GL_DYNAMIC_DRAW_ARB, - brw->metaops.vbo); - - pos[0][0] = x0; - pos[0][1] = y0; - pos[0][2] = z; - - pos[1][0] = x1; - pos[1][1] = y0; - pos[1][2] = z; - - pos[2][0] = x1; - pos[2][1] = y1; - pos[2][2] = z; - - pos[3][0] = x0; - pos[3][1] = y1; - pos[3][2] = z; - - ctx->Driver.BufferSubData(ctx, - GL_ARRAY_BUFFER_ARB, - 0, - sizeof(pos), - pos, - brw->metaops.vbo); - - /* Convert incoming ARGB to required RGBA */ - /* Note this color is stored as GL_UNSIGNED_BYTE */ - color = (color & 0xff00ff00) | (((color >> 16) | (color << 16)) & 0xff00ff); - - ctx->Driver.BufferSubData(ctx, - GL_ARRAY_BUFFER_ARB, - sizeof(pos), - sizeof(color), - &color, - brw->metaops.vbo); - - /* Ignoring texture coords. - */ - - memset(attribs, 0, VERT_ATTRIB_MAX * sizeof(*attribs)); - - attribs[VERT_ATTRIB_POS] = &pos_array; - attribs[VERT_ATTRIB_POS]->Ptr = 0; - attribs[VERT_ATTRIB_POS]->Type = GL_FLOAT; - attribs[VERT_ATTRIB_POS]->Enabled = 1; - attribs[VERT_ATTRIB_POS]->Size = 3; - attribs[VERT_ATTRIB_POS]->StrideB = 3 * sizeof(GLfloat); - attribs[VERT_ATTRIB_POS]->Stride = 3 * sizeof(GLfloat); - attribs[VERT_ATTRIB_POS]->_MaxElement = 4; - attribs[VERT_ATTRIB_POS]->Normalized = 0; - attribs[VERT_ATTRIB_POS]->BufferObj = brw->metaops.vbo; - - attribs[VERT_ATTRIB_COLOR0] = &color_array; - attribs[VERT_ATTRIB_COLOR0]->Ptr = (const GLubyte *)sizeof(pos); - attribs[VERT_ATTRIB_COLOR0]->Type = GL_UNSIGNED_BYTE; - attribs[VERT_ATTRIB_COLOR0]->Enabled = 1; - attribs[VERT_ATTRIB_COLOR0]->Size = 4; - attribs[VERT_ATTRIB_COLOR0]->StrideB = 0; - attribs[VERT_ATTRIB_COLOR0]->Stride = 0; - attribs[VERT_ATTRIB_COLOR0]->_MaxElement = 1; - attribs[VERT_ATTRIB_COLOR0]->Normalized = 1; - attribs[VERT_ATTRIB_COLOR0]->BufferObj = brw->metaops.vbo; - - /* Just ignoring texture coordinates for now. - */ - - memset(prim, 0, sizeof(*prim)); - - prim[0].mode = GL_TRIANGLE_FAN; - prim[0].begin = 1; - prim[0].end = 1; - prim[0].weak = 0; - prim[0].pad = 0; - prim[0].start = 0; - prim[0].count = 4; - - brw_draw_prims(&brw->intel.ctx, - (const struct gl_client_array **)attribs, - prim, 1, - NULL, - 0, - 3 ); -} - - -static void install_meta_state( struct intel_context *intel ) -{ - GLcontext *ctx = &intel->ctx; - struct brw_context *brw = brw_context(ctx); - GLuint i; - - if (!brw->metaops.vbo) { - init_metaops_state(brw); - } - - install_attribs(brw); - - meta_no_texture(&brw->intel); - meta_flat_shade(&brw->intel); - for (i = 0; i < ctx->Const.MaxDrawBuffers; i++) { - brw->metaops.restore_draw_buffers[i] - = ctx->DrawBuffer->_ColorDrawBufferIndexes[i]; - } - brw->metaops.restore_num_draw_buffers = ctx->DrawBuffer->_NumColorDrawBuffers; - - brw->metaops.restore_fp = ctx->FragmentProgram.Current; - - /* This works without adjusting refcounts. Fix later? - */ - brw->metaops.saved_draw_region = brw->state.draw_regions[0]; - brw->metaops.saved_nr_draw_regions = brw->state.nr_draw_regions; - brw->metaops.saved_depth_region = brw->state.depth_region; - brw->metaops.active = 1; - - brw->state.dirty.brw |= BRW_NEW_METAOPS; -} - -static void leave_meta_state( struct intel_context *intel ) -{ - GLcontext *ctx = &intel->ctx; - struct brw_context *brw = brw_context(ctx); - GLuint i; - - restore_attribs(brw); - - for (i = 0; i < ctx->Const.MaxDrawBuffers; i++) { - ctx->DrawBuffer->_ColorDrawBufferIndexes[i] - = brw->metaops.restore_draw_buffers[i]; - } - ctx->DrawBuffer->_NumColorDrawBuffers = brw->metaops.restore_num_draw_buffers; - - ctx->FragmentProgram.Current = brw->metaops.restore_fp; - - brw->state.draw_regions[0] = brw->metaops.saved_draw_region; - brw->state.nr_draw_regions = brw->metaops.saved_nr_draw_regions; - brw->state.depth_region = brw->metaops.saved_depth_region; - brw->metaops.saved_draw_region = NULL; - brw->metaops.saved_depth_region = NULL; - brw->metaops.active = 0; - - brw->state.dirty.mesa |= _NEW_BUFFERS; - brw->state.dirty.brw |= BRW_NEW_METAOPS; -} - - - -void brw_init_metaops( struct brw_context *brw ) -{ - init_attribs(brw); - - - brw->intel.vtbl.install_meta_state = install_meta_state; - brw->intel.vtbl.leave_meta_state = leave_meta_state; - brw->intel.vtbl.meta_no_depth_write = meta_no_depth_write; - brw->intel.vtbl.meta_no_stencil_write = meta_no_stencil_write; - brw->intel.vtbl.meta_stencil_replace = meta_stencil_replace; - brw->intel.vtbl.meta_depth_replace = meta_depth_replace; - brw->intel.vtbl.meta_color_mask = meta_color_mask; - brw->intel.vtbl.meta_no_texture = meta_no_texture; - brw->intel.vtbl.meta_import_pixel_state = meta_import_pixel_state; - brw->intel.vtbl.meta_frame_buffer_texture = meta_frame_buffer_texture; - brw->intel.vtbl.meta_draw_region = meta_draw_region; - brw->intel.vtbl.meta_draw_quad = meta_draw_quad; - brw->intel.vtbl.meta_texture_blend_replace = meta_texture_blend_replace; -/* brw->intel.vtbl.meta_tex_rect_source = meta_tex_rect_source; */ -/* brw->intel.vtbl.meta_draw_format = set_draw_format; */ -} - -void brw_destroy_metaops( struct brw_context *brw ) -{ - GLcontext *ctx = &brw->intel.ctx; - - if (brw->metaops.vbo) - ctx->Driver.DeleteBuffer( ctx, brw->metaops.vbo ); - -/* ctx->Driver.DeleteProgram( ctx, brw->metaops.fp ); */ -/* ctx->Driver.DeleteProgram( ctx, brw->metaops.fp_tex ); */ -/* ctx->Driver.DeleteProgram( ctx, brw->metaops.vp ); */ -} diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index 627705fa9b..9dcdad7b4e 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -48,15 +48,16 @@ static void upload_blend_constant_color(struct brw_context *brw) { + GLcontext *ctx = &brw->intel.ctx; struct brw_blend_constant_color bcc; memset(&bcc, 0, sizeof(bcc)); bcc.header.opcode = CMD_BLEND_CONSTANT_COLOR; bcc.header.length = sizeof(bcc)/4-2; - bcc.blend_constant_color[0] = brw->attribs.Color->BlendColor[0]; - bcc.blend_constant_color[1] = brw->attribs.Color->BlendColor[1]; - bcc.blend_constant_color[2] = brw->attribs.Color->BlendColor[2]; - bcc.blend_constant_color[3] = brw->attribs.Color->BlendColor[3]; + bcc.blend_constant_color[0] = ctx->Color.BlendColor[0]; + bcc.blend_constant_color[1] = ctx->Color.BlendColor[1]; + bcc.blend_constant_color[2] = ctx->Color.BlendColor[2]; + bcc.blend_constant_color[3] = ctx->Color.BlendColor[3]; BRW_CACHED_BATCH_STRUCT(brw, &bcc); } @@ -154,10 +155,7 @@ static void upload_pipelined_state_pointers(struct brw_context *brw ) OUT_RELOC(brw->gs.state_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 1); else OUT_BATCH(0); - if (!brw->metaops.active) - OUT_RELOC(brw->clip.state_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 1); - else - OUT_BATCH(0); + OUT_RELOC(brw->clip.state_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 1); OUT_RELOC(brw->sf.state_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); OUT_RELOC(brw->wm.state_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); OUT_RELOC(brw->cc.state_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); @@ -186,7 +184,7 @@ static void upload_psp_urb_cbs(struct brw_context *brw ) const struct brw_tracked_state brw_psp_urb_cbs = { .dirty = { .mesa = 0, - .brw = BRW_NEW_URB_FENCE | BRW_NEW_METAOPS | BRW_NEW_BATCH, + .brw = BRW_NEW_URB_FENCE | BRW_NEW_BATCH, .cache = (CACHE_NEW_VS_UNIT | CACHE_NEW_GS_UNIT | CACHE_NEW_GS_PROG | @@ -284,6 +282,7 @@ const struct brw_tracked_state brw_depthbuffer = { static void upload_polygon_stipple(struct brw_context *brw) { + GLcontext *ctx = &brw->intel.ctx; struct brw_polygon_stipple bps; GLuint i; @@ -292,7 +291,7 @@ static void upload_polygon_stipple(struct brw_context *brw) bps.header.length = sizeof(bps)/4-2; for (i = 0; i < 32; i++) - bps.stipple[i] = brw->attribs.PolygonStipple[31 - i]; /* invert */ + bps.stipple[i] = ctx->PolygonStipple[31 - i]; /* invert */ BRW_CACHED_BATCH_STRUCT(brw, &bps); } @@ -370,6 +369,7 @@ const struct brw_tracked_state brw_aa_line_parameters = { static void upload_line_stipple(struct brw_context *brw) { + GLcontext *ctx = &brw->intel.ctx; struct brw_line_stipple bls; GLfloat tmp; GLint tmpi; @@ -378,10 +378,10 @@ static void upload_line_stipple(struct brw_context *brw) bls.header.opcode = CMD_LINE_STIPPLE_PATTERN; bls.header.length = sizeof(bls)/4 - 2; - bls.bits0.pattern = brw->attribs.Line->StipplePattern; - bls.bits1.repeat_count = brw->attribs.Line->StippleFactor; + bls.bits0.pattern = ctx->Line.StipplePattern; + bls.bits1.repeat_count = ctx->Line.StippleFactor; - tmp = 1.0 / (GLfloat) brw->attribs.Line->StippleFactor; + tmp = 1.0 / (GLfloat) ctx->Line.StippleFactor; tmpi = tmp * (1<<13); diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c index c38610b24e..0c86911044 100644 --- a/src/mesa/drivers/dri/i965/brw_program.c +++ b/src/mesa/drivers/dri/i965/brw_program.c @@ -111,13 +111,18 @@ static void brwProgramStringNotify( GLcontext *ctx, struct gl_program *prog ) { if (target == GL_FRAGMENT_PROGRAM_ARB) { + struct gl_fragment_program *fprog = (struct gl_fragment_program *) prog; struct brw_context *brw = brw_context(ctx); struct brw_fragment_program *p = (struct brw_fragment_program *)prog; struct brw_fragment_program *fp = (struct brw_fragment_program *)brw->fragment_program; + if (fprog->FogOption) { + _mesa_append_fog_code(ctx, fprog); + fprog->FogOption = GL_NONE; + } + if (p == fp) brw->state.dirty.brw |= BRW_NEW_FRAGMENT_PROGRAM; p->id = brw->program_id++; - p->param_state = p->program.Base.Parameters->StateFlags; } else if (target == GL_VERTEX_PROGRAM_ARB) { struct brw_context *brw = brw_context(ctx); @@ -129,7 +134,6 @@ static void brwProgramStringNotify( GLcontext *ctx, _mesa_insert_mvp_code(ctx, &p->program); } p->id = brw->program_id++; - p->param_state = p->program.Base.Parameters->StateFlags; /* Also tell tnl about it: */ diff --git a/src/mesa/drivers/dri/i965/brw_sf.c b/src/mesa/drivers/dri/i965/brw_sf.c index 9dce6cd8e6..8c1711538a 100644 --- a/src/mesa/drivers/dri/i965/brw_sf.c +++ b/src/mesa/drivers/dri/i965/brw_sf.c @@ -46,6 +46,7 @@ static void compile_sf_prog( struct brw_context *brw, struct brw_sf_prog_key *key ) { + GLcontext *ctx = &brw->intel.ctx; struct brw_sf_compile c; const GLuint *program; GLuint program_size; @@ -73,10 +74,12 @@ static void compile_sf_prog( struct brw_context *brw, c.attr_to_idx[i] = idx; c.idx_to_attr[idx] = i; if (i >= VERT_RESULT_TEX0 && i <= VERT_RESULT_TEX7) { - c.point_attrs[i].CoordReplace = - brw->attribs.Point->CoordReplace[i - VERT_RESULT_TEX0]; - } else - c.point_attrs[i].CoordReplace = GL_FALSE; + c.point_attrs[i].CoordReplace = + ctx->Point.CoordReplace[i - VERT_RESULT_TEX0]; + } + else { + c.point_attrs[i].CoordReplace = GL_FALSE; + } idx++; } @@ -106,7 +109,6 @@ static void compile_sf_prog( struct brw_context *brw, assert(0); return; } - /* get the program */ @@ -127,6 +129,7 @@ static void compile_sf_prog( struct brw_context *brw, */ static void upload_sf_prog(struct brw_context *brw) { + GLcontext *ctx = &brw->intel.ctx; struct brw_sf_prog_key key; memset(&key, 0, sizeof(key)); @@ -157,15 +160,15 @@ static void upload_sf_prog(struct brw_context *brw) break; } - key.do_point_sprite = brw->attribs.Point->PointSprite; - key.SpriteOrigin = brw->attribs.Point->SpriteOrigin; + key.do_point_sprite = ctx->Point.PointSprite; + key.SpriteOrigin = ctx->Point.SpriteOrigin; /* _NEW_LIGHT */ - key.do_flat_shading = (brw->attribs.Light->ShadeModel == GL_FLAT); - key.do_twoside_color = (brw->attribs.Light->Enabled && brw->attribs.Light->Model.TwoSide); + key.do_flat_shading = (ctx->Light.ShadeModel == GL_FLAT); + key.do_twoside_color = (ctx->Light.Enabled && ctx->Light.Model.TwoSide); /* _NEW_POLYGON */ if (key.do_twoside_color) - key.frontface_ccw = (brw->attribs.Polygon->FrontFace == GL_CCW); + key.frontface_ccw = (ctx->Polygon.FrontFace == GL_CCW); dri_bo_unreference(brw->sf.prog_bo); brw->sf.prog_bo = brw_search_cache(&brw->cache, BRW_SF_PROG, diff --git a/src/mesa/drivers/dri/i965/brw_sf_state.c b/src/mesa/drivers/dri/i965/brw_sf_state.c index 506126fcfb..e96d5354b3 100644 --- a/src/mesa/drivers/dri/i965/brw_sf_state.c +++ b/src/mesa/drivers/dri/i965/brw_sf_state.c @@ -42,45 +42,30 @@ static void upload_sf_vp(struct brw_context *brw) GLcontext *ctx = &brw->intel.ctx; const GLfloat depth_scale = 1.0F / ctx->DrawBuffer->_DepthMaxF; struct brw_sf_viewport sfv; - struct intel_renderbuffer *irb = - intel_renderbuffer(ctx->DrawBuffer->_ColorDrawBuffers[0]); GLfloat y_scale, y_bias; + const GLboolean render_to_fbo = (ctx->DrawBuffer->Name != 0); memset(&sfv, 0, sizeof(sfv)); - if (ctx->DrawBuffer->Name) { - /* User-created FBO */ - if (irb && !irb->RenderToTexture) { - y_scale = -1.0; - y_bias = ctx->DrawBuffer->Height; - } else { - y_scale = 1.0; - y_bias = 0; - } - } else { + if (render_to_fbo) { + y_scale = 1.0; + y_bias = 0; + } + else { y_scale = -1.0; y_bias = ctx->DrawBuffer->Height; } - /* _NEW_VIEWPORT, BRW_NEW_METAOPS */ - - if (!brw->metaops.active) { - const GLfloat *v = ctx->Viewport._WindowMap.m; - - sfv.viewport.m00 = v[MAT_SX]; - sfv.viewport.m11 = v[MAT_SY] * y_scale; - sfv.viewport.m22 = v[MAT_SZ] * depth_scale; - sfv.viewport.m30 = v[MAT_TX]; - sfv.viewport.m31 = v[MAT_TY] * y_scale + y_bias; - sfv.viewport.m32 = v[MAT_TZ] * depth_scale; - } else { - sfv.viewport.m00 = 1; - sfv.viewport.m11 = - 1; - sfv.viewport.m22 = 1; - sfv.viewport.m30 = 0; - sfv.viewport.m31 = ctx->DrawBuffer->Height; - sfv.viewport.m32 = 0; - } + /* _NEW_VIEWPORT */ + + const GLfloat *v = ctx->Viewport._WindowMap.m; + + sfv.viewport.m00 = v[MAT_SX]; + sfv.viewport.m11 = v[MAT_SY] * y_scale; + sfv.viewport.m22 = v[MAT_SZ] * depth_scale; + sfv.viewport.m30 = v[MAT_TX]; + sfv.viewport.m31 = v[MAT_TY] * y_scale + y_bias; + sfv.viewport.m32 = v[MAT_TZ] * depth_scale; /* _NEW_SCISSOR */ @@ -91,10 +76,20 @@ static void upload_sf_vp(struct brw_context *brw) * Note that the hardware's coordinates are inclusive, while Mesa's min is * inclusive but max is exclusive. */ - sfv.scissor.xmin = ctx->DrawBuffer->_Xmin; - sfv.scissor.xmax = ctx->DrawBuffer->_Xmax - 1; - sfv.scissor.ymin = ctx->DrawBuffer->Height - ctx->DrawBuffer->_Ymax; - sfv.scissor.ymax = ctx->DrawBuffer->Height - ctx->DrawBuffer->_Ymin - 1; + if (render_to_fbo) { + /* texmemory: Y=0=bottom */ + sfv.scissor.xmin = ctx->DrawBuffer->_Xmin; + sfv.scissor.xmax = ctx->DrawBuffer->_Xmax - 1; + sfv.scissor.ymin = ctx->DrawBuffer->_Ymin; + sfv.scissor.ymax = ctx->DrawBuffer->_Ymax - 1; + } + else { + /* memory: Y=0=top */ + sfv.scissor.xmin = ctx->DrawBuffer->_Xmin; + sfv.scissor.xmax = ctx->DrawBuffer->_Xmax - 1; + sfv.scissor.ymin = ctx->DrawBuffer->Height - ctx->DrawBuffer->_Ymax; + sfv.scissor.ymax = ctx->DrawBuffer->Height - ctx->DrawBuffer->_Ymin - 1; + } dri_bo_unreference(brw->sf.vp_bo); brw->sf.vp_bo = brw_cache_data( &brw->cache, BRW_SF_VP, &sfv, NULL, 0 ); @@ -104,7 +99,7 @@ const struct brw_tracked_state brw_sf_vp = { .dirty = { .mesa = (_NEW_VIEWPORT | _NEW_SCISSOR), - .brw = BRW_NEW_METAOPS, + .brw = 0, .cache = 0 }, .prepare = upload_sf_vp @@ -117,7 +112,11 @@ struct brw_sf_unit_key { unsigned int nr_urb_entries, urb_size, sfsize; GLenum front_face, cull_face; - GLboolean scissor, line_smooth, point_sprite, point_attenuated; + unsigned scissor:1; + unsigned line_smooth:1; + unsigned point_sprite:1; + unsigned point_attenuated:1; + unsigned render_to_fbo:1; float line_width; float point_size; }; @@ -125,6 +124,7 @@ struct brw_sf_unit_key { static void sf_unit_populate_key(struct brw_context *brw, struct brw_sf_unit_key *key) { + GLcontext *ctx = &brw->intel.ctx; memset(key, 0, sizeof(*key)); /* CACHE_NEW_SF_PROG */ @@ -136,20 +136,22 @@ sf_unit_populate_key(struct brw_context *brw, struct brw_sf_unit_key *key) key->urb_size = brw->urb.vsize; key->sfsize = brw->urb.sfsize; - key->scissor = brw->attribs.Scissor->Enabled; - key->front_face = brw->attribs.Polygon->FrontFace; + key->scissor = ctx->Scissor.Enabled; + key->front_face = ctx->Polygon.FrontFace; - if (brw->attribs.Polygon->CullFlag) - key->cull_face = brw->attribs.Polygon->CullFaceMode; + if (ctx->Polygon.CullFlag) + key->cull_face = ctx->Polygon.CullFaceMode; else key->cull_face = GL_NONE; - key->line_width = brw->attribs.Line->Width; - key->line_smooth = brw->attribs.Line->SmoothFlag; + key->line_width = ctx->Line.Width; + key->line_smooth = ctx->Line.SmoothFlag; + + key->point_sprite = ctx->Point.PointSprite; + key->point_size = ctx->Point.Size; + key->point_attenuated = ctx->Point._Attenuated; - key->point_sprite = brw->attribs.Point->PointSprite; - key->point_size = brw->attribs.Point->Size; - key->point_attenuated = brw->attribs.Point->_Attenuated; + key->render_to_fbo = brw->intel.ctx.DrawBuffer->Name != 0; } static dri_bo * @@ -196,6 +198,11 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key, else sf.sf5.front_winding = BRW_FRONTWINDING_CW; + /* The viewport is inverted for rendering to a FBO, and that inverts + * polygon front/back orientation. + */ + sf.sf5.front_winding ^= key->render_to_fbo; + switch (key->cull_face) { case GL_FRONT: sf.sf6.cull_mode = BRW_CULLMODE_FRONT; @@ -229,7 +236,7 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key, /* XXX clamp max depends on AA vs. non-AA */ sf.sf7.sprite_point = key->point_sprite; - sf.sf7.point_size = CLAMP(nearbyint(key->point_size), 1, 255) * (1<<3); + sf.sf7.point_size = CLAMP(rint(key->point_size), 1, 255) * (1<<3); sf.sf7.use_point_size_state = !key->point_attenuated; sf.sf7.aa_line_distance_mode = 0; @@ -294,8 +301,7 @@ const struct brw_tracked_state brw_sf_unit = { _NEW_LINE | _NEW_POINT | _NEW_SCISSOR), - .brw = (BRW_NEW_URB_FENCE | - BRW_NEW_METAOPS), + .brw = BRW_NEW_URB_FENCE, .cache = (CACHE_NEW_SF_VP | CACHE_NEW_SF_PROG) }, diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h index bb22c03eeb..df839c5b30 100644 --- a/src/mesa/drivers/dri/i965/brw_state.h +++ b/src/mesa/drivers/dri/i965/brw_state.h @@ -83,7 +83,6 @@ const struct brw_tracked_state brw_wm_unit; const struct brw_tracked_state brw_psp_urb_cbs; -const struct brw_tracked_state brw_active_vertprog; const struct brw_tracked_state brw_pipe_control; const struct brw_tracked_state brw_clear_surface_cache; diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index 7a642bd2a8..5de1450e61 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -181,11 +181,123 @@ brw_clear_validated_bos(struct brw_context *brw) brw->state.validated_bo_count = 0; } +struct dirty_bit_map { + uint32_t bit; + char *name; + uint32_t count; +}; + +#define DEFINE_BIT(name) {name, #name, 0} + +static struct dirty_bit_map mesa_bits[] = { + DEFINE_BIT(_NEW_MODELVIEW), + DEFINE_BIT(_NEW_PROJECTION), + DEFINE_BIT(_NEW_TEXTURE_MATRIX), + DEFINE_BIT(_NEW_COLOR_MATRIX), + DEFINE_BIT(_NEW_ACCUM), + DEFINE_BIT(_NEW_COLOR), + DEFINE_BIT(_NEW_DEPTH), + DEFINE_BIT(_NEW_EVAL), + DEFINE_BIT(_NEW_FOG), + DEFINE_BIT(_NEW_HINT), + DEFINE_BIT(_NEW_LIGHT), + DEFINE_BIT(_NEW_LINE), + DEFINE_BIT(_NEW_PIXEL), + DEFINE_BIT(_NEW_POINT), + DEFINE_BIT(_NEW_POLYGON), + DEFINE_BIT(_NEW_POLYGONSTIPPLE), + DEFINE_BIT(_NEW_SCISSOR), + DEFINE_BIT(_NEW_STENCIL), + DEFINE_BIT(_NEW_TEXTURE), + DEFINE_BIT(_NEW_TRANSFORM), + DEFINE_BIT(_NEW_VIEWPORT), + DEFINE_BIT(_NEW_PACKUNPACK), + DEFINE_BIT(_NEW_ARRAY), + DEFINE_BIT(_NEW_RENDERMODE), + DEFINE_BIT(_NEW_BUFFERS), + DEFINE_BIT(_NEW_MULTISAMPLE), + DEFINE_BIT(_NEW_TRACK_MATRIX), + DEFINE_BIT(_NEW_PROGRAM), + {0, 0, 0} +}; + +static struct dirty_bit_map brw_bits[] = { + DEFINE_BIT(BRW_NEW_URB_FENCE), + DEFINE_BIT(BRW_NEW_FRAGMENT_PROGRAM), + DEFINE_BIT(BRW_NEW_VERTEX_PROGRAM), + DEFINE_BIT(BRW_NEW_INPUT_DIMENSIONS), + DEFINE_BIT(BRW_NEW_CURBE_OFFSETS), + DEFINE_BIT(BRW_NEW_REDUCED_PRIMITIVE), + DEFINE_BIT(BRW_NEW_PRIMITIVE), + DEFINE_BIT(BRW_NEW_CONTEXT), + DEFINE_BIT(BRW_NEW_WM_INPUT_DIMENSIONS), + DEFINE_BIT(BRW_NEW_INPUT_VARYING), + DEFINE_BIT(BRW_NEW_PSP), + DEFINE_BIT(BRW_NEW_FENCE), + DEFINE_BIT(BRW_NEW_INDICES), + DEFINE_BIT(BRW_NEW_VERTICES), + DEFINE_BIT(BRW_NEW_BATCH), + DEFINE_BIT(BRW_NEW_DEPTH_BUFFER), + {0, 0, 0} +}; + +static struct dirty_bit_map cache_bits[] = { + DEFINE_BIT(CACHE_NEW_CC_VP), + DEFINE_BIT(CACHE_NEW_CC_UNIT), + DEFINE_BIT(CACHE_NEW_WM_PROG), + DEFINE_BIT(CACHE_NEW_SAMPLER_DEFAULT_COLOR), + DEFINE_BIT(CACHE_NEW_SAMPLER), + DEFINE_BIT(CACHE_NEW_WM_UNIT), + DEFINE_BIT(CACHE_NEW_SF_PROG), + DEFINE_BIT(CACHE_NEW_SF_VP), + DEFINE_BIT(CACHE_NEW_SF_UNIT), + DEFINE_BIT(CACHE_NEW_VS_UNIT), + DEFINE_BIT(CACHE_NEW_VS_PROG), + DEFINE_BIT(CACHE_NEW_GS_UNIT), + DEFINE_BIT(CACHE_NEW_GS_PROG), + DEFINE_BIT(CACHE_NEW_CLIP_VP), + DEFINE_BIT(CACHE_NEW_CLIP_UNIT), + DEFINE_BIT(CACHE_NEW_CLIP_PROG), + DEFINE_BIT(CACHE_NEW_SURFACE), + DEFINE_BIT(CACHE_NEW_SURF_BIND), + {0, 0, 0} +}; + + +static void +brw_update_dirty_count(struct dirty_bit_map *bit_map, int32_t bits) +{ + int i; + + for (i = 0; i < 32; i++) { + if (bit_map[i].bit == 0) + return; + + if (bit_map[i].bit & bits) + bit_map[i].count++; + } +} + +static void +brw_print_dirty_count(struct dirty_bit_map *bit_map, int32_t bits) +{ + int i; + + for (i = 0; i < 32; i++) { + if (bit_map[i].bit == 0) + return; + + fprintf(stderr, "0x%08x: %12d (%s)\n", + bit_map[i].bit, bit_map[i].count, bit_map[i].name); + } +} + /*********************************************************************** * Emit all state: */ void brw_validate_state( struct brw_context *brw ) { + GLcontext *ctx = &brw->intel.ctx; struct intel_context *intel = &brw->intel; struct brw_state_flags *state = &brw->state.dirty; GLuint i; @@ -202,17 +314,13 @@ void brw_validate_state( struct brw_context *brw ) state->brw |= ~0; } - /* texenv program needs to notify us somehow when this happens: - * Some confusion about which state flag should represent this change. - */ - if (brw->fragment_program != brw->attribs.FragmentProgram->_Current) { - brw->fragment_program = brw->attribs.FragmentProgram->_Current; - brw->state.dirty.mesa |= _NEW_PROGRAM; + if (brw->fragment_program != ctx->FragmentProgram._Current) { + brw->fragment_program = ctx->FragmentProgram._Current; brw->state.dirty.brw |= BRW_NEW_FRAGMENT_PROGRAM; } - if (brw->vertex_program != brw->attribs.VertexProgram->_Current) { - brw->vertex_program = brw->attribs.VertexProgram->_Current; + if (brw->vertex_program != ctx->VertexProgram._Current) { + brw->vertex_program = ctx->VertexProgram._Current; brw->state.dirty.brw |= BRW_NEW_VERTEX_PROGRAM; } @@ -246,6 +354,7 @@ void brw_upload_state(struct brw_context *brw) { struct brw_state_flags *state = &brw->state.dirty; int i; + static int dirty_count = 0; brw_clear_validated_bos(brw); @@ -301,6 +410,18 @@ void brw_upload_state(struct brw_context *brw) } } + if (INTEL_DEBUG & DEBUG_STATE) { + brw_update_dirty_count(mesa_bits, state->mesa); + brw_update_dirty_count(brw_bits, state->brw); + brw_update_dirty_count(cache_bits, state->cache); + if (dirty_count++ % 1000 == 0) { + brw_print_dirty_count(mesa_bits, state->mesa); + brw_print_dirty_count(brw_bits, state->brw); + brw_print_dirty_count(cache_bits, state->cache); + fprintf(stderr, "\n"); + } + } + if (!brw->intel.Fallback) memset(state, 0, sizeof(*state)); } diff --git a/src/mesa/drivers/dri/i965/brw_structs.h b/src/mesa/drivers/dri/i965/brw_structs.h index 4e577d0f6a..d97ff27f0a 100644 --- a/src/mesa/drivers/dri/i965/brw_structs.h +++ b/src/mesa/drivers/dri/i965/brw_structs.h @@ -1031,10 +1031,10 @@ struct brw_surface_state GLuint writedisable_green:1; GLuint writedisable_red:1; GLuint writedisable_alpha:1; - GLuint surface_format:9; + GLuint surface_format:9; /**< BRW_SURFACEFORMAT_x */ GLuint data_return_format:1; GLuint pad0:1; - GLuint surface_type:3; + GLuint surface_type:3; /**< BRW_SURFACE_1D/2D/3D/CUBE */ } ss0; struct { diff --git a/src/mesa/drivers/dri/i965/brw_tex.c b/src/mesa/drivers/dri/i965/brw_tex.c index 0bb6f176a0..ef99e9c1ae 100644 --- a/src/mesa/drivers/dri/i965/brw_tex.c +++ b/src/mesa/drivers/dri/i965/brw_tex.c @@ -86,11 +86,12 @@ void brw_FrameBufferTexDestroy( struct brw_context *brw ) */ void brw_validate_textures( struct brw_context *brw ) { + GLcontext *ctx = &brw->intel.ctx; struct intel_context *intel = &brw->intel; int i; for (i = 0; i < BRW_MAX_TEX_UNIT; i++) { - struct gl_texture_unit *texUnit = &brw->attribs.Texture->Unit[i]; + struct gl_texture_unit *texUnit = &ctx->Texture.Unit[i]; if (texUnit->_ReallyEnabled) { intel_finalize_mipmap_tree(intel, i); diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c index 1db7ceebcf..e3111c6680 100644 --- a/src/mesa/drivers/dri/i965/brw_vs.c +++ b/src/mesa/drivers/dri/i965/brw_vs.c @@ -85,6 +85,7 @@ static void do_vs_prog( struct brw_context *brw, static void brw_upload_vs_prog(struct brw_context *brw) { + GLcontext *ctx = &brw->intel.ctx; struct brw_vs_prog_key key; struct brw_vertex_program *vp = (struct brw_vertex_program *)brw->vertex_program; @@ -97,14 +98,9 @@ static void brw_upload_vs_prog(struct brw_context *brw) * the inputs it asks for, whether they are varying or not. */ key.program_string_id = vp->id; - key.nr_userclip = brw_count_bits(brw->attribs.Transform->ClipPlanesEnabled); - key.copy_edgeflag = (brw->attribs.Polygon->FrontMode != GL_FILL || - brw->attribs.Polygon->BackMode != GL_FILL); - - /* BRW_NEW_METAOPS - */ - if (brw->metaops.active) - key.know_w_is_one = 1; + key.nr_userclip = brw_count_bits(ctx->Transform.ClipPlanesEnabled); + key.copy_edgeflag = (ctx->Polygon.FrontMode != GL_FILL || + ctx->Polygon.BackMode != GL_FILL); /* Make an early check for the key. */ @@ -123,7 +119,7 @@ static void brw_upload_vs_prog(struct brw_context *brw) const struct brw_tracked_state brw_vs_prog = { .dirty = { .mesa = _NEW_TRANSFORM | _NEW_POLYGON, - .brw = BRW_NEW_VERTEX_PROGRAM | BRW_NEW_METAOPS, + .brw = BRW_NEW_VERTEX_PROGRAM, .cache = 0 }, .prepare = brw_upload_vs_prog diff --git a/src/mesa/drivers/dri/i965/brw_vs.h b/src/mesa/drivers/dri/i965/brw_vs.h index 22388ec99d..99d0e93722 100644 --- a/src/mesa/drivers/dri/i965/brw_vs.h +++ b/src/mesa/drivers/dri/i965/brw_vs.h @@ -43,7 +43,6 @@ struct brw_vs_prog_key { GLuint program_string_id; GLuint nr_userclip:4; GLuint copy_edgeflag:1; - GLuint know_w_is_one:1; GLuint pad:26; }; diff --git a/src/mesa/drivers/dri/i965/brw_vs_constval.c b/src/mesa/drivers/dri/i965/brw_vs_constval.c index 6fbac02de6..9977677fd7 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_constval.c +++ b/src/mesa/drivers/dri/i965/brw_vs_constval.c @@ -168,6 +168,7 @@ static GLuint get_input_size(struct brw_context *brw, */ static void calc_wm_input_sizes( struct brw_context *brw ) { + GLcontext *ctx = &brw->intel.ctx; /* BRW_NEW_VERTEX_PROGRAM */ struct brw_vertex_program *vp = (struct brw_vertex_program *)brw->vertex_program; @@ -179,7 +180,7 @@ static void calc_wm_input_sizes( struct brw_context *brw ) memset(&t, 0, sizeof(t)); /* _NEW_LIGHT */ - if (brw->attribs.Light->Model.TwoSide) + if (ctx->Light.Model.TwoSide) t.twoside = 1; for (i = 0; i < VERT_ATTRIB_MAX; i++) diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c index 25b4ee85cb..24b7dc30fe 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_emit.c +++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c @@ -73,8 +73,6 @@ static void brw_vs_alloc_regs( struct brw_vs_compile *c ) c->prog_data.curb_read_length = reg - 1; - - /* Allocate input regs: */ c->nr_inputs = 0; @@ -84,8 +82,7 @@ static void brw_vs_alloc_regs( struct brw_vs_compile *c ) c->regs[PROGRAM_INPUT][i] = brw_vec8_grf(reg, 0); reg++; } - } - + } /* Allocate outputs: TODO: could organize the non-position outputs * to go straight into message regs. @@ -196,6 +193,7 @@ static void unalias1( struct brw_vs_compile *c, struct brw_reg tmp = brw_writemask(get_tmp(c), dst.dw1.bits.writemask); func(c, tmp, arg0); brw_MOV(p, dst, tmp); + release_tmp(c, tmp); } else { func(c, dst, arg0); @@ -217,12 +215,38 @@ static void unalias2( struct brw_vs_compile *c, struct brw_reg tmp = brw_writemask(get_tmp(c), dst.dw1.bits.writemask); func(c, tmp, arg0, arg1); brw_MOV(p, dst, tmp); + release_tmp(c, tmp); } else { func(c, dst, arg0, arg1); } } +static void unalias3( struct brw_vs_compile *c, + struct brw_reg dst, + struct brw_reg arg0, + struct brw_reg arg1, + struct brw_reg arg2, + void (*func)( struct brw_vs_compile *, + struct brw_reg, + struct brw_reg, + struct brw_reg, + struct brw_reg )) +{ + if ((dst.file == arg0.file && dst.nr == arg0.nr) || + (dst.file == arg1.file && dst.nr == arg1.nr) || + (dst.file == arg2.file && dst.nr == arg2.nr)) { + struct brw_compile *p = &c->func; + struct brw_reg tmp = brw_writemask(get_tmp(c), dst.dw1.bits.writemask); + func(c, tmp, arg0, arg1, arg2); + brw_MOV(p, dst, tmp); + release_tmp(c, tmp); + } + else { + func(c, dst, arg0, arg1, arg2); + } +} + static void emit_sop( struct brw_compile *p, struct brw_reg dst, struct brw_reg arg0, @@ -339,6 +363,7 @@ static void emit_math1( struct brw_vs_compile *c, } } + static void emit_math2( struct brw_vs_compile *c, GLuint function, struct brw_reg dst, @@ -370,7 +395,6 @@ static void emit_math2( struct brw_vs_compile *c, release_tmp(c, tmp); } } - static void emit_exp_noalias( struct brw_vs_compile *c, @@ -420,7 +444,7 @@ static void emit_exp_noalias( struct brw_vs_compile *c, BRW_MATH_FUNCTION_EXP, brw_writemask(dst, WRITEMASK_Z), brw_swizzle1(arg0, 0), - BRW_MATH_PRECISION_PARTIAL); + BRW_MATH_PRECISION_FULL); } if (dst.dw1.bits.writemask & WRITEMASK_W) { @@ -521,8 +545,6 @@ static void emit_log_noalias( struct brw_vs_compile *c, } - - /* Need to unalias - consider swizzles: r0 = DST r0.xxxx r1 */ static void emit_dst_noalias( struct brw_vs_compile *c, @@ -544,6 +566,7 @@ static void emit_dst_noalias( struct brw_vs_compile *c, brw_MOV(p, brw_writemask(dst, WRITEMASK_W), arg1); } + static void emit_xpd( struct brw_compile *p, struct brw_reg dst, struct brw_reg t, @@ -554,7 +577,6 @@ static void emit_xpd( struct brw_compile *p, } - static void emit_lit_noalias( struct brw_vs_compile *c, struct brw_reg dst, struct brw_reg arg0 ) @@ -595,8 +617,42 @@ static void emit_lit_noalias( struct brw_vs_compile *c, brw_ENDIF(p, if_insn); } +static void emit_lrp_noalias(struct brw_vs_compile *c, + struct brw_reg dst, + struct brw_reg arg0, + struct brw_reg arg1, + struct brw_reg arg2) +{ + struct brw_compile *p = &c->func; + + brw_ADD(p, dst, negate(arg0), brw_imm_f(1.0)); + brw_MUL(p, brw_null_reg(), dst, arg2); + brw_MAC(p, dst, arg0, arg1); +} + +/** 3 or 4-component vector normalization */ +static void emit_nrm( struct brw_vs_compile *c, + struct brw_reg dst, + struct brw_reg arg0, + int num_comps) +{ + struct brw_compile *p = &c->func; + struct brw_reg tmp = get_tmp(c); + + /* tmp = dot(arg0, arg0) */ + if (num_comps == 3) + brw_DP3(p, tmp, arg0, arg0); + else + brw_DP4(p, tmp, arg0, arg0); + + /* tmp = 1 / sqrt(tmp) */ + emit_math1(c, BRW_MATH_FUNCTION_RSQ, tmp, tmp, BRW_MATH_PRECISION_FULL); + /* dst = arg0 * tmp */ + brw_MUL(p, dst, arg0, tmp); + release_tmp(c, tmp); +} /* TODO: relative addressing! @@ -634,7 +690,6 @@ static struct brw_reg get_reg( struct brw_vs_compile *c, } - static struct brw_reg deref( struct brw_vs_compile *c, struct brw_reg arg, GLint offset) @@ -728,8 +783,6 @@ static struct brw_reg get_dst( struct brw_vs_compile *c, } - - static void emit_swz( struct brw_vs_compile *c, struct brw_reg dst, struct prog_src_register src ) @@ -801,8 +854,8 @@ static void emit_swz( struct brw_vs_compile *c, } - -/* Post-vertex-program processing. Send the results to the URB. +/** + * Post-vertex-program processing. Send the results to the URB. */ static void emit_vertex_write( struct brw_vs_compile *c) { @@ -817,23 +870,16 @@ static void emit_vertex_write( struct brw_vs_compile *c) get_reg(c, PROGRAM_INPUT, VERT_ATTRIB_EDGEFLAG)); } - /* Build ndc coords */ - if (!c->key.know_w_is_one) { - ndc = get_tmp(c); - emit_math1(c, BRW_MATH_FUNCTION_INV, ndc, brw_swizzle1(pos, 3), BRW_MATH_PRECISION_FULL); - brw_MUL(p, brw_writemask(ndc, WRITEMASK_XYZ), pos, ndc); - } - else { - ndc = pos; - } + ndc = get_tmp(c); + emit_math1(c, BRW_MATH_FUNCTION_INV, ndc, brw_swizzle1(pos, 3), BRW_MATH_PRECISION_FULL); + brw_MUL(p, brw_writemask(ndc, WRITEMASK_XYZ), pos, ndc); /* Update the header for point size, user clipping flags, and -ve rhw * workaround. */ if ((c->prog_data.outputs_written & (1<<VERT_RESULT_PSIZ)) || - c->key.nr_userclip || - (!BRW_IS_G4X(p->brw) && !c->key.know_w_is_one)) + c->key.nr_userclip || !BRW_IS_G4X(p->brw)) { struct brw_reg header1 = retype(get_tmp(c), BRW_REGISTER_TYPE_UD); GLuint i; @@ -848,7 +894,6 @@ static void emit_vertex_write( struct brw_vs_compile *c) brw_AND(p, brw_writemask(header1, WRITEMASK_W), header1, brw_imm_ud(0x7ff<<8)); } - for (i = 0; i < c->key.nr_userclip; i++) { brw_set_conditionalmod(p, BRW_CONDITIONAL_L); brw_DP4(p, brw_null_reg(), pos, c->userplane[i]); @@ -856,7 +901,6 @@ static void emit_vertex_write( struct brw_vs_compile *c) brw_set_predicate_control(p, BRW_PREDICATE_NONE); } - /* i965 clipping workaround: * 1) Test for -ve rhw * 2) If set, @@ -866,7 +910,7 @@ static void emit_vertex_write( struct brw_vs_compile *c) * Later, clipping will detect ucp[6] and ensure the primitive is * clipped against all fixed planes. */ - if (!BRW_IS_G4X(p->brw) && !c->key.know_w_is_one) { + if (!BRW_IS_G4X(p->brw)) { brw_CMP(p, vec8(brw_null_reg()), BRW_CONDITIONAL_L, @@ -888,14 +932,12 @@ static void emit_vertex_write( struct brw_vs_compile *c) brw_MOV(p, retype(brw_message_reg(1), BRW_REGISTER_TYPE_UD), brw_imm_ud(0)); } - /* Emit the (interleaved) headers for the two vertices - an 8-reg * of zeros followed by two sets of NDC coordinates: */ brw_set_access_mode(p, BRW_ALIGN_1); brw_MOV(p, offset(m0, 2), ndc); brw_MOV(p, offset(m0, 3), pos); - brw_urb_WRITE(p, brw_null_reg(), /* dest */ @@ -909,9 +951,9 @@ static void emit_vertex_write( struct brw_vs_compile *c) 1, /* writes complete */ 0, /* urb destination offset */ BRW_URB_SWIZZLE_INTERLEAVE); - } + static void post_vs_emit( struct brw_vs_compile *c, struct brw_instruction *end_inst ) { @@ -958,7 +1000,7 @@ void brw_vs_emit(struct brw_vs_compile *c ) GLuint file; if (INTEL_DEBUG & DEBUG_VS) { - _mesa_printf("\n\n\nvs-emit:\n"); + _mesa_printf("vs-emit:\n"); _mesa_print_program(&c->vp->program.Base); _mesa_printf("\n"); } @@ -1016,6 +1058,11 @@ void brw_vs_emit(struct brw_vs_compile *c ) else dst = get_dst(c, inst->DstReg); + if (inst->SaturateMode != SATURATE_OFF) { + _mesa_problem(NULL, "Unsupported saturate %d in vertex shader", + inst->SaturateMode); + } + switch (inst->Opcode) { case OPCODE_ABS: brw_MOV(p, dst, brw_abs(args[0])); @@ -1035,6 +1082,12 @@ void brw_vs_emit(struct brw_vs_compile *c ) case OPCODE_DPH: brw_DPH(p, dst, args[0], args[1]); break; + case OPCODE_NRM3: + emit_nrm(c, dst, args[0], 3); + break; + case OPCODE_NRM4: + emit_nrm(c, dst, args[0], 4); + break; case OPCODE_DST: unalias2(c, dst, args[0], args[1], emit_dst_noalias); break; @@ -1062,6 +1115,9 @@ void brw_vs_emit(struct brw_vs_compile *c ) case OPCODE_LIT: unalias1(c, dst, args[0], emit_lit_noalias); break; + case OPCODE_LRP: + unalias3(c, dst, args[0], args[1], args[2], emit_lrp_noalias); + break; case OPCODE_MAD: brw_MOV(p, brw_acc_reg(), args[2]); brw_MAC(p, dst, args[0], args[1]); @@ -1102,7 +1158,7 @@ void brw_vs_emit(struct brw_vs_compile *c ) break; case OPCODE_SGT: emit_sgt(p, dst, args[0], args[1]); - break; + break; case OPCODE_SLT: emit_slt(p, dst, args[0], args[1]); break; @@ -1118,6 +1174,10 @@ void brw_vs_emit(struct brw_vs_compile *c ) */ emit_swz(c, dst, inst->SrcReg[0] ); break; + case OPCODE_TRUNC: + /* round toward zero */ + brw_RNDZ(p, dst, args[0]); + break; case OPCODE_XPD: emit_xpd(p, dst, args[0], args[1]); break; @@ -1136,7 +1196,7 @@ void brw_vs_emit(struct brw_vs_compile *c ) brw_set_predicate_control(p, BRW_PREDICATE_NORMAL); brw_ADD(p, brw_ip_reg(), brw_ip_reg(), brw_imm_d(1*16)); brw_set_predicate_control_flag_value(p, 0xff); - break; + break; case OPCODE_CAL: brw_set_access_mode(p, BRW_ALIGN_1); brw_ADD(p, deref_1d(stack_index, 0), brw_ip_reg(), brw_imm_d(3*16)); @@ -1145,7 +1205,7 @@ void brw_vs_emit(struct brw_vs_compile *c ) get_addr_reg(stack_index), brw_imm_d(4)); inst->Data = &p->store[p->nr_insn]; brw_ADD(p, brw_ip_reg(), brw_ip_reg(), brw_imm_d(1*16)); - break; + break; case OPCODE_RET: brw_ADD(p, get_addr_reg(stack_index), get_addr_reg(stack_index), brw_imm_d(-4)); @@ -1154,17 +1214,17 @@ void brw_vs_emit(struct brw_vs_compile *c ) brw_set_access_mode(p, BRW_ALIGN_16); case OPCODE_END: brw_ADD(p, brw_ip_reg(), brw_ip_reg(), brw_imm_d(1*16)); - break; + break; case OPCODE_PRINT: case OPCODE_BGNSUB: case OPCODE_ENDSUB: + /* no-op instructions */ break; default: - _mesa_printf("Unsupported opcode %i (%s) in vertex shader\n", - inst->Opcode, inst->Opcode < MAX_OPCODE ? + _mesa_problem(NULL, "Unsupported opcode %i (%s) in vertex shader", + inst->Opcode, inst->Opcode < MAX_OPCODE ? _mesa_opcode_string(inst->Opcode) : "unknown"); - break; } if ((inst->DstReg.File == PROGRAM_OUTPUT) diff --git a/src/mesa/drivers/dri/i965/brw_vs_state.c b/src/mesa/drivers/dri/i965/brw_vs_state.c index 942581696d..1a63766ea1 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_state.c +++ b/src/mesa/drivers/dri/i965/brw_vs_state.c @@ -49,6 +49,8 @@ struct brw_vs_unit_key { static void vs_unit_populate_key(struct brw_context *brw, struct brw_vs_unit_key *key) { + GLcontext *ctx = &brw->intel.ctx; + memset(key, 0, sizeof(*key)); /* CACHE_NEW_VS_PROG */ @@ -61,7 +63,7 @@ vs_unit_populate_key(struct brw_context *brw, struct brw_vs_unit_key *key) key->urb_size = brw->urb.vsize; /* BRW_NEW_CURBE_OFFSETS, _NEW_TRANSFORM */ - if (brw->attribs.Transform->ClipPlanesEnabled) { + if (ctx->Transform.ClipPlanesEnabled) { /* Note that we read in the userclip planes as well, hence * clip_start: */ diff --git a/src/mesa/drivers/dri/i965/brw_vs_tnl.c b/src/mesa/drivers/dri/i965/brw_vs_tnl.c deleted file mode 100644 index eacc289f1f..0000000000 --- a/src/mesa/drivers/dri/i965/brw_vs_tnl.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - * Mesa 3-D graphics library - * Version: 6.3 - * - * Copyright (C) 2005 Tungsten Graphics All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included - * in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * TUNGSTEN GRAPHICS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN - * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - */ - -/** - * \file t_vp_build.c - * Create a vertex program to execute the current fixed function T&L pipeline. - * \author Keith Whitwell - */ - - -#include "main/glheader.h" -#include "main/macros.h" -#include "main/enums.h" -#include "brw_vs.h" -#include "brw_state.h" - - -static void prepare_active_vertprog( struct brw_context *brw ) -{ - const struct gl_vertex_program *prev = brw->vertex_program; - - brw->vertex_program = brw->attribs.VertexProgram->_Current; - - if (brw->vertex_program != prev) - brw->state.dirty.brw |= BRW_NEW_VERTEX_PROGRAM; -} - - - -const struct brw_tracked_state brw_active_vertprog = { - .dirty = { - .mesa = _NEW_PROGRAM, - .brw = 0, - .cache = 0 - }, - .prepare = prepare_active_vertprog -}; diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c b/src/mesa/drivers/dri/i965/brw_vtbl.c index 2d4c81274e..b501a59ccd 100644 --- a/src/mesa/drivers/dri/i965/brw_vtbl.c +++ b/src/mesa/drivers/dri/i965/brw_vtbl.c @@ -23,14 +23,12 @@ OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - **********************************************************************/ - /* - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - */ - - +**********************************************************************/ +/* + * Authors: + * Keith Whitwell <keith@tungstengraphics.com> + */ #include "main/glheader.h" #include "main/mtypes.h" @@ -44,12 +42,11 @@ #include "brw_context.h" #include "brw_defines.h" #include "brw_state.h" - #include "brw_draw.h" #include "brw_state.h" #include "brw_fallback.h" #include "brw_vs.h" -#include <stdarg.h> + static void dri_bo_release(dri_bo **bo) @@ -58,21 +55,22 @@ dri_bo_release(dri_bo **bo) *bo = NULL; } -/* called from intelDestroyContext() + +/** + * called from intelDestroyContext() */ static void brw_destroy_context( struct intel_context *intel ) { struct brw_context *brw = brw_context(&intel->ctx); int i; - brw_destroy_metaops(brw); brw_destroy_state(brw); brw_draw_destroy( brw ); brw_FrameBufferTexDestroy( brw ); for (i = 0; i < brw->state.nr_draw_regions; i++) - intel_region_release(&brw->state.draw_regions[i]); + intel_region_release(&brw->state.draw_regions[i]); brw->state.nr_draw_regions = 0; intel_region_release(&brw->state.depth_region); @@ -99,37 +97,46 @@ static void brw_destroy_context( struct intel_context *intel ) dri_bo_release(&brw->cc.vp_bo); } -/* called from intelDrawBuffer() + +/** + * called from intelDrawBuffer() */ static void brw_set_draw_region( struct intel_context *intel, - struct intel_region *draw_regions[], - struct intel_region *depth_region, - GLuint num_regions) + struct intel_region *draw_regions[], + struct intel_region *depth_region, + GLuint num_regions) { struct brw_context *brw = brw_context(&intel->ctx); int i; + + /* release old color/depth regions */ if (brw->state.depth_region != depth_region) brw->state.dirty.brw |= BRW_NEW_DEPTH_BUFFER; for (i = 0; i < brw->state.nr_draw_regions; i++) intel_region_release(&brw->state.draw_regions[i]); intel_region_release(&brw->state.depth_region); + + /* reference new color/depth regions */ for (i = 0; i < num_regions; i++) intel_region_reference(&brw->state.draw_regions[i], draw_regions[i]); intel_region_reference(&brw->state.depth_region, depth_region); brw->state.nr_draw_regions = num_regions; } -/* called from intel_batchbuffer_flush and children before sending a + +/** + * called from intel_batchbuffer_flush and children before sending a * batchbuffer off. */ static void brw_finish_batch(struct intel_context *intel) { struct brw_context *brw = brw_context(&intel->ctx); - brw_emit_query_end(brw); } -/* called from intelFlushBatchLocked + +/** + * called from intelFlushBatchLocked */ static void brw_new_batch( struct intel_context *intel ) { @@ -160,24 +167,21 @@ static void brw_new_batch( struct intel_context *intel ) } } -static void brw_note_fence( struct intel_context *intel, - GLuint fence ) + +static void brw_note_fence( struct intel_context *intel, GLuint fence ) { brw_context(&intel->ctx)->state.dirty.brw |= BRW_NEW_FENCE; } - + + static void brw_note_unlock( struct intel_context *intel ) { struct brw_context *brw = brw_context(&intel->ctx); - brw_state_cache_check_size(brw); - - brw_context(&intel->ctx)->state.dirty.brw |= BRW_NEW_LOCK; } -void brw_do_flush( struct brw_context *brw, - GLuint flags ) +void brw_do_flush( struct brw_context *brw, GLuint flags ) { struct brw_mi_flush flush; memset(&flush, 0, sizeof(flush)); @@ -187,8 +191,7 @@ void brw_do_flush( struct brw_context *brw, } -static void brw_emit_flush( struct intel_context *intel, - GLuint unused ) +static void brw_emit_flush( struct intel_context *intel, GLuint unused ) { brw_do_flush(brw_context(&intel->ctx), BRW_FLUSH_STATE_CACHE|BRW_FLUSH_READ_CACHE); @@ -208,6 +211,7 @@ static GLuint brw_flush_cmd( void ) return *(GLuint *)&flush; } + static void brw_invalidate_state( struct intel_context *intel, GLuint new_state ) { /* nothing */ @@ -217,14 +221,14 @@ static void brw_invalidate_state( struct intel_context *intel, GLuint new_state void brwInitVtbl( struct brw_context *brw ) { brw->intel.vtbl.check_vertex_size = 0; - brw->intel.vtbl.emit_state = 0; - brw->intel.vtbl.reduced_primitive_state = 0; + brw->intel.vtbl.emit_state = 0; + brw->intel.vtbl.reduced_primitive_state = 0; brw->intel.vtbl.render_start = 0; - brw->intel.vtbl.update_texture_state = 0; + brw->intel.vtbl.update_texture_state = 0; - brw->intel.vtbl.invalidate_state = brw_invalidate_state; - brw->intel.vtbl.note_fence = brw_note_fence; - brw->intel.vtbl.note_unlock = brw_note_unlock; + brw->intel.vtbl.invalidate_state = brw_invalidate_state; + brw->intel.vtbl.note_fence = brw_note_fence; + brw->intel.vtbl.note_unlock = brw_note_unlock; brw->intel.vtbl.new_batch = brw_new_batch; brw->intel.vtbl.finish_batch = brw_finish_batch; brw->intel.vtbl.destroy = brw_destroy_context; @@ -233,4 +237,3 @@ void brwInitVtbl( struct brw_context *brw ) brw->intel.vtbl.emit_flush = brw_emit_flush; brw->intel.vtbl.debug_batch = brw_debug_batch; } - diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c index 361312c2ca..ea708a0681 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.c +++ b/src/mesa/drivers/dri/i965/brw_wm.c @@ -36,63 +36,24 @@ #include "brw_state.h" +/** Return number of src args for given instruction */ GLuint brw_wm_nr_args( GLuint opcode ) { switch (opcode) { - case WM_PIXELXY: - case OPCODE_ABS: - case OPCODE_FLR: - case OPCODE_FRC: - case OPCODE_SWZ: - case OPCODE_MOV: - case OPCODE_COS: - case OPCODE_EX2: - case OPCODE_LG2: - case OPCODE_RCP: - case OPCODE_RSQ: - case OPCODE_SIN: - case OPCODE_SCS: - case OPCODE_TEX: - case OPCODE_TXB: - case OPCODE_TXP: - case OPCODE_KIL: - case OPCODE_LIT: - case WM_CINTERP: - case WM_WPOSXY: + case WM_CINTERP: + case WM_WPOSXY: return 1; - - case OPCODE_POW: - case OPCODE_SUB: - case OPCODE_SGE: - case OPCODE_SGT: - case OPCODE_SLE: - case OPCODE_SLT: - case OPCODE_SEQ: - case OPCODE_SNE: - case OPCODE_ADD: - case OPCODE_MAX: - case OPCODE_MIN: - case OPCODE_MUL: - case OPCODE_XPD: - case OPCODE_DP3: - case OPCODE_DP4: - case OPCODE_DPH: - case OPCODE_DST: - case WM_LINTERP: + case WM_LINTERP: case WM_DELTAXY: case WM_PIXELW: return 2; - case WM_FB_WRITE: - case WM_PINTERP: - case OPCODE_MAD: - case OPCODE_CMP: - case OPCODE_LRP: + case WM_PINTERP: return 3; - default: - return 0; + assert(opcode < MAX_OPCODE); + return _mesa_num_inst_src_regs(opcode); } } @@ -175,6 +136,9 @@ static void do_wm_prog( struct brw_context *brw, */ brw_wm_emit(c); } + if (INTEL_DEBUG & DEBUG_WM) + fprintf(stderr, "\n"); + /* get the program */ program = brw_get_program(&c->func, &program_size); @@ -193,6 +157,7 @@ static void do_wm_prog( struct brw_context *brw, static void brw_wm_populate_key( struct brw_context *brw, struct brw_wm_prog_key *key ) { + GLcontext *ctx = &brw->intel.ctx; /* BRW_NEW_FRAGMENT_PROGRAM */ struct brw_fragment_program *fp = (struct brw_fragment_program *)brw->fragment_program; @@ -206,57 +171,50 @@ static void brw_wm_populate_key( struct brw_context *brw, */ /* _NEW_COLOR */ if (fp->program.UsesKill || - brw->attribs.Color->AlphaEnabled) + ctx->Color.AlphaEnabled) lookup |= IZ_PS_KILL_ALPHATEST_BIT; if (fp->program.Base.OutputsWritten & (1<<FRAG_RESULT_DEPR)) lookup |= IZ_PS_COMPUTES_DEPTH_BIT; /* _NEW_DEPTH */ - if (brw->attribs.Depth->Test) + if (ctx->Depth.Test) lookup |= IZ_DEPTH_TEST_ENABLE_BIT; - if (brw->attribs.Depth->Test && - brw->attribs.Depth->Mask) /* ?? */ + if (ctx->Depth.Test && + ctx->Depth.Mask) /* ?? */ lookup |= IZ_DEPTH_WRITE_ENABLE_BIT; /* _NEW_STENCIL */ - if (brw->attribs.Stencil->Enabled) { + if (ctx->Stencil.Enabled) { lookup |= IZ_STENCIL_TEST_ENABLE_BIT; - if (brw->attribs.Stencil->WriteMask[0] || - (brw->attribs.Stencil->_TestTwoSide && - brw->attribs.Stencil->WriteMask[1])) + if (ctx->Stencil.WriteMask[0] || + ctx->Stencil.WriteMask[ctx->Stencil._BackFace]) lookup |= IZ_STENCIL_WRITE_ENABLE_BIT; } - /* XXX: when should this be disabled? - */ - if (1) - lookup |= IZ_EARLY_DEPTH_TEST_BIT; - - line_aa = AA_NEVER; /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */ - if (brw->attribs.Line->SmoothFlag) { + if (ctx->Line.SmoothFlag) { if (brw->intel.reduced_primitive == GL_LINES) { line_aa = AA_ALWAYS; } else if (brw->intel.reduced_primitive == GL_TRIANGLES) { - if (brw->attribs.Polygon->FrontMode == GL_LINE) { + if (ctx->Polygon.FrontMode == GL_LINE) { line_aa = AA_SOMETIMES; - if (brw->attribs.Polygon->BackMode == GL_LINE || - (brw->attribs.Polygon->CullFlag && - brw->attribs.Polygon->CullFaceMode == GL_BACK)) + if (ctx->Polygon.BackMode == GL_LINE || + (ctx->Polygon.CullFlag && + ctx->Polygon.CullFaceMode == GL_BACK)) line_aa = AA_ALWAYS; } - else if (brw->attribs.Polygon->BackMode == GL_LINE) { + else if (ctx->Polygon.BackMode == GL_LINE) { line_aa = AA_SOMETIMES; - if ((brw->attribs.Polygon->CullFlag && - brw->attribs.Polygon->CullFaceMode == GL_FRONT)) + if ((ctx->Polygon.CullFlag && + ctx->Polygon.CullFaceMode == GL_FRONT)) line_aa = AA_ALWAYS; } } @@ -271,20 +229,25 @@ static void brw_wm_populate_key( struct brw_context *brw, key->projtex_mask = brw->wm.input_size_masks[4-1] >> (FRAG_ATTRIB_TEX0 - FRAG_ATTRIB_WPOS); /* _NEW_LIGHT */ - key->flat_shade = (brw->attribs.Light->ShadeModel == GL_FLAT); + key->flat_shade = (ctx->Light.ShadeModel == GL_FLAT); /* _NEW_TEXTURE */ for (i = 0; i < BRW_MAX_TEX_UNIT; i++) { - const struct gl_texture_unit *unit = &brw->attribs.Texture->Unit[i]; - const struct gl_texture_object *t = unit->_Current; + const struct gl_texture_unit *unit = &ctx->Texture.Unit[i]; if (unit->_ReallyEnabled) { - if (t->Image[0][t->BaseLevel]->InternalFormat == GL_YCBCR_MESA) { - key->yuvtex_mask |= 1<<i; - if (t->Image[0][t->BaseLevel]->TexFormat->MesaFormat == - MESA_FORMAT_YCBCR) - key->yuvtex_swap_mask |= 1<< i; + const struct gl_texture_object *t = unit->_Current; + const struct gl_texture_image *img = t->Image[0][t->BaseLevel]; + if (img->InternalFormat == GL_YCBCR_MESA) { + key->yuvtex_mask |= 1 << i; + if (img->TexFormat->MesaFormat == MESA_FORMAT_YCBCR) + key->yuvtex_swap_mask |= 1 << i; } + + key->tex_swizzles[i] = t->_Swizzle; + } + else { + key->tex_swizzles[i] = SWIZZLE_NOOP; } } diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h index 896390c17b..0f46a25b1a 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.h +++ b/src/mesa/drivers/dri/i965/brw_wm.h @@ -49,8 +49,7 @@ #define IZ_DEPTH_TEST_ENABLE_BIT 0x8 #define IZ_STENCIL_WRITE_ENABLE_BIT 0x10 #define IZ_STENCIL_TEST_ENABLE_BIT 0x20 -#define IZ_EARLY_DEPTH_TEST_BIT 0x40 -#define IZ_BIT_MAX 0x80 +#define IZ_BIT_MAX 0x40 #define AA_NEVER 0 #define AA_SOMETIMES 1 @@ -61,16 +60,17 @@ struct brw_wm_prog_key { GLuint aa_dest_stencil_reg:3; GLuint dest_depth_reg:3; GLuint nr_depth_regs:3; - GLuint projtex_mask:8; - GLuint shadowtex_mask:8; GLuint computes_depth:1; /* could be derived from program string */ GLuint source_depth_to_render_target:1; GLuint flat_shade:1; GLuint runtime_check_aads_emit:1; - GLuint yuvtex_mask:8; - GLuint yuvtex_swap_mask:8; /* UV swaped */ - GLuint pad1:16; + GLuint projtex_mask:16; + GLuint shadowtex_mask:16; + GLuint yuvtex_mask:16; + GLuint yuvtex_swap_mask:16; /* UV swaped */ + + GLuint tex_swizzles[BRW_MAX_TEX_UNIT]; GLuint program_string_id:32; GLuint origin_x, origin_y; diff --git a/src/mesa/drivers/dri/i965/brw_wm_debug.c b/src/mesa/drivers/dri/i965/brw_wm_debug.c index f31d0974ec..8f07f89ebc 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_debug.c +++ b/src/mesa/drivers/dri/i965/brw_wm_debug.c @@ -163,9 +163,9 @@ void brw_wm_print_program( struct brw_wm_compile *c, { GLuint insn; - _mesa_printf("\n\n\n%s:\n", stage); + _mesa_printf("%s:\n", stage); for (insn = 0; insn < c->nr_insns; insn++) brw_wm_print_insn(c, &c->instruction[insn]); - _mesa_printf("\n\n\n"); + _mesa_printf("\n"); } diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c index 58c78c4b2c..b5050a3e40 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_emit.c +++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c @@ -194,7 +194,7 @@ static void emit_linterp( struct brw_compile *p, interp[2] = brw_vec1_grf(nr+1, 0); interp[3] = brw_vec1_grf(nr+1, 4); - for(i = 0; i < 4; i++ ) { + for (i = 0; i < 4; i++) { if (mask & (1<<i)) { brw_LINE(p, brw_null_reg(), interp[i], deltas[0]); brw_MAC(p, dst[i], suboffset(interp[i],1), deltas[1]); @@ -219,42 +219,40 @@ static void emit_pinterp( struct brw_compile *p, interp[2] = brw_vec1_grf(nr+1, 0); interp[3] = brw_vec1_grf(nr+1, 4); - for(i = 0; i < 4; i++ ) { + for (i = 0; i < 4; i++) { if (mask & (1<<i)) { brw_LINE(p, brw_null_reg(), interp[i], deltas[0]); brw_MAC(p, dst[i], suboffset(interp[i],1), deltas[1]); } } - for(i = 0; i < 4; i++ ) { + for (i = 0; i < 4; i++) { if (mask & (1<<i)) { brw_MUL(p, dst[i], dst[i], w[3]); } } } + static void emit_cinterp( struct brw_compile *p, const struct brw_reg *dst, GLuint mask, const struct brw_reg *arg0 ) { - struct brw_reg interp[4]; - GLuint nr = arg0[0].nr; - GLuint i; - - interp[0] = brw_vec1_grf(nr, 0); - interp[1] = brw_vec1_grf(nr, 4); - interp[2] = brw_vec1_grf(nr+1, 0); - interp[3] = brw_vec1_grf(nr+1, 4); - - for(i = 0; i < 4; i++ ) { - if (mask & (1<<i)) { - brw_MOV(p, dst[i], suboffset(interp[i],3)); /* TODO: optimize away like other moves */ - } - } -} - + struct brw_reg interp[4]; + GLuint nr = arg0[0].nr; + GLuint i; + interp[0] = brw_vec1_grf(nr, 0); + interp[1] = brw_vec1_grf(nr, 4); + interp[2] = brw_vec1_grf(nr+1, 0); + interp[3] = brw_vec1_grf(nr+1, 4); + for (i = 0; i < 4; i++) { + if (mask & (1<<i)) { + brw_MOV(p, dst[i], suboffset(interp[i],3)); /* TODO: optimize away like other moves */ + } + } +} static void emit_alu1( struct brw_compile *p, @@ -280,6 +278,7 @@ static void emit_alu1( struct brw_compile *p, brw_set_saturate(p, 0); } + static void emit_alu2( struct brw_compile *p, struct brw_instruction *(*func)(struct brw_compile *, struct brw_reg, @@ -351,6 +350,7 @@ static void emit_lrp( struct brw_compile *p, } } } + static void emit_sop( struct brw_compile *p, const struct brw_reg *dst, GLuint mask, @@ -376,7 +376,7 @@ static void emit_slt( struct brw_compile *p, const struct brw_reg *arg0, const struct brw_reg *arg1 ) { - emit_sop(p, dst, mask, BRW_CONDITIONAL_L, arg0, arg1); + emit_sop(p, dst, mask, BRW_CONDITIONAL_L, arg0, arg1); } static void emit_sle( struct brw_compile *p, @@ -385,7 +385,7 @@ static void emit_sle( struct brw_compile *p, const struct brw_reg *arg0, const struct brw_reg *arg1 ) { - emit_sop(p, dst, mask, BRW_CONDITIONAL_LE, arg0, arg1); + emit_sop(p, dst, mask, BRW_CONDITIONAL_LE, arg0, arg1); } static void emit_sgt( struct brw_compile *p, @@ -394,7 +394,7 @@ static void emit_sgt( struct brw_compile *p, const struct brw_reg *arg0, const struct brw_reg *arg1 ) { - emit_sop(p, dst, mask, BRW_CONDITIONAL_G, arg0, arg1); + emit_sop(p, dst, mask, BRW_CONDITIONAL_G, arg0, arg1); } static void emit_sge( struct brw_compile *p, @@ -403,7 +403,7 @@ static void emit_sge( struct brw_compile *p, const struct brw_reg *arg0, const struct brw_reg *arg1 ) { - emit_sop(p, dst, mask, BRW_CONDITIONAL_GE, arg0, arg1); + emit_sop(p, dst, mask, BRW_CONDITIONAL_GE, arg0, arg1); } static void emit_seq( struct brw_compile *p, @@ -412,7 +412,7 @@ static void emit_seq( struct brw_compile *p, const struct brw_reg *arg0, const struct brw_reg *arg1 ) { - emit_sop(p, dst, mask, BRW_CONDITIONAL_EQ, arg0, arg1); + emit_sop(p, dst, mask, BRW_CONDITIONAL_EQ, arg0, arg1); } static void emit_sne( struct brw_compile *p, @@ -421,7 +421,7 @@ static void emit_sne( struct brw_compile *p, const struct brw_reg *arg0, const struct brw_reg *arg1 ) { - emit_sop(p, dst, mask, BRW_CONDITIONAL_NEQ, arg0, arg1); + emit_sop(p, dst, mask, BRW_CONDITIONAL_NEQ, arg0, arg1); } static void emit_cmp( struct brw_compile *p, @@ -505,7 +505,7 @@ static void emit_dp3( struct brw_compile *p, const struct brw_reg *arg1 ) { if (!(mask & WRITEMASK_XYZW)) - return; /* Do not emit dead code*/ + return; /* Do not emit dead code */ assert((mask & WRITEMASK_XYZW) == WRITEMASK_X); @@ -525,7 +525,7 @@ static void emit_dp4( struct brw_compile *p, const struct brw_reg *arg1 ) { if (!(mask & WRITEMASK_XYZW)) - return; /* Do not emit dead code*/ + return; /* Do not emit dead code */ assert((mask & WRITEMASK_XYZW) == WRITEMASK_X); @@ -546,7 +546,7 @@ static void emit_dph( struct brw_compile *p, const struct brw_reg *arg1 ) { if (!(mask & WRITEMASK_XYZW)) - return; /* Do not emit dead code*/ + return; /* Do not emit dead code */ assert((mask & WRITEMASK_XYZW) == WRITEMASK_X); @@ -592,7 +592,7 @@ static void emit_math1( struct brw_compile *p, const struct brw_reg *arg0 ) { if (!(mask & WRITEMASK_XYZW)) - return; /* Do not emit dead code*/ + return; /* Do not emit dead code */ //assert((mask & WRITEMASK_XYZW) == WRITEMASK_X || // function == BRW_MATH_FUNCTION_SINCOS); @@ -619,7 +619,7 @@ static void emit_math2( struct brw_compile *p, const struct brw_reg *arg1) { if (!(mask & WRITEMASK_XYZW)) - return; /* Do not emit dead code*/ + return; /* Do not emit dead code */ assert((mask & WRITEMASK_XYZW) == WRITEMASK_X); @@ -760,7 +760,6 @@ static void emit_txb( struct brw_wm_compile *c, brw_MOV(p, brw_message_reg(8), arg[3]); msgLength = 9; - brw_SAMPLE(p, retype(vec16(dst[0]), BRW_REGISTER_TYPE_UW), 1, @@ -772,7 +771,6 @@ static void emit_txb( struct brw_wm_compile *c, 8, /* responseLength */ msgLength, 0); - } @@ -823,7 +821,6 @@ static void emit_kil( struct brw_wm_compile *c, struct brw_reg r0uw = retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UW); GLuint i; - /* XXX - usually won't need 4 compares! */ for (i = 0; i < 4; i++) { @@ -836,6 +833,7 @@ static void emit_kil( struct brw_wm_compile *c, } } + static void fire_fb_write( struct brw_wm_compile *c, GLuint base_reg, GLuint nr, @@ -869,6 +867,7 @@ static void fire_fb_write( struct brw_wm_compile *c, eot); } + static void emit_aa( struct brw_wm_compile *c, struct brw_reg *arg1, GLuint reg ) @@ -962,7 +961,6 @@ static void emit_fb_write( struct brw_wm_compile *c, nr += 2; } - if (!c->key.runtime_check_aads_emit) { if (c->key.aa_dest_stencil_reg) emit_aa(c, arg1, 2); @@ -996,8 +994,6 @@ static void emit_fb_write( struct brw_wm_compile *c, } - - /* Post-fragment-program processing. Send the results to the * framebuffer. */ @@ -1022,6 +1018,7 @@ static void emit_spill( struct brw_wm_compile *c, slot); } + static void emit_unspill( struct brw_wm_compile *c, struct brw_reg reg, GLuint slot ) @@ -1047,7 +1044,6 @@ static void emit_unspill( struct brw_wm_compile *c, } - /** * Retrieve upto 4 GEN4 register pairs for the given wm reg: */ @@ -1073,6 +1069,7 @@ static void get_argument_regs( struct brw_wm_compile *c, } } + static void spill_values( struct brw_wm_compile *c, struct brw_wm_value *values, GLuint nr ) @@ -1085,7 +1082,6 @@ static void spill_values( struct brw_wm_compile *c, } - /* Emit the fragment program instructions here. */ void brw_wm_emit( struct brw_wm_compile *c ) @@ -1176,7 +1172,7 @@ void brw_wm_emit( struct brw_wm_compile *c ) emit_alu1(p, brw_RNDD, dst, dst_flags, args[0]); break; - case OPCODE_DP3: /* */ + case OPCODE_DP3: emit_dp3(p, dst, dst_flags, args[0], args[1]); break; @@ -1188,7 +1184,7 @@ void brw_wm_emit( struct brw_wm_compile *c ) emit_dph(p, dst, dst_flags, args[0], args[1]); break; - case OPCODE_LRP: /* */ + case OPCODE_LRP: emit_lrp(p, dst, dst_flags, args[0], args[1], args[2]); break; @@ -1315,8 +1311,3 @@ void brw_wm_emit( struct brw_wm_compile *c ) inst->dst[i]->spill_slot); } } - - - - - diff --git a/src/mesa/drivers/dri/i965/brw_wm_fp.c b/src/mesa/drivers/dri/i965/brw_wm_fp.c index d3e926c328..ea3f3fc678 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_fp.c +++ b/src/mesa/drivers/dri/i965/brw_wm_fp.c @@ -111,6 +111,12 @@ static struct prog_src_register src_swizzle1( struct prog_src_register reg, int return src_swizzle(reg, x, x, x, x); } +static struct prog_src_register src_swizzle4( struct prog_src_register reg, uint swizzle ) +{ + reg.Swizzle = swizzle; + return reg; +} + /*********************************************************************** * Dest regs @@ -122,10 +128,11 @@ static struct prog_dst_register dst_reg(GLuint file, GLuint idx) reg.File = file; reg.Index = idx; reg.WriteMask = WRITEMASK_XYZW; + reg.RelAddr = 0; reg.CondMask = 0; reg.CondSwizzle = 0; - reg.pad = 0; reg.CondSrc = 0; + reg.pad = 0; return reg; } @@ -426,10 +433,6 @@ static struct prog_src_register search_or_add_param5(struct brw_wm_compile *c, idx = _mesa_add_state_reference( paramList, tokens ); - /* Recalculate state dependency: - */ - c->fp->param_state = paramList->StateFlags; - return src_reg(PROGRAM_STATE_VAR, idx); } @@ -557,12 +560,19 @@ static void precalc_lit( struct brw_wm_compile *c, } } + +/** + * Some TEX instructions require extra code, cube map coordinate + * normalization, or coordinate scaling for RECT textures, etc. + * This function emits those extra instructions and the TEX + * instruction itself. + */ static void precalc_tex( struct brw_wm_compile *c, const struct prog_instruction *inst ) { struct prog_src_register coord; struct prog_dst_register tmpcoord; - GLuint unit = c->fp->program.Base.SamplerUnits[inst->TexSrcUnit]; + const GLuint unit = c->fp->program.Base.SamplerUnits[inst->TexSrcUnit]; if (inst->TexSrcTarget == TEXTURE_CUBE_INDEX) { struct prog_instruction *out; @@ -572,9 +582,11 @@ static void precalc_tex( struct brw_wm_compile *c, struct prog_src_register tmp1src = src_reg_from_dst(tmp1); struct prog_src_register src0 = inst->SrcReg[0]; + /* find longest component of coord vector and normalize it */ tmpcoord = get_temp(c); coord = src_reg_from_dst(tmpcoord); + /* tmpcoord = src0 (i.e.: coord = src0) */ out = emit_op(c, OPCODE_MOV, tmpcoord, 0, 0, 0, @@ -584,6 +596,7 @@ static void precalc_tex( struct brw_wm_compile *c, out->SrcReg[0].NegateBase = 0; out->SrcReg[0].Abs = 1; + /* tmp0 = MAX(coord.X, coord.Y) */ emit_op(c, OPCODE_MAX, tmp0, 0, 0, 0, @@ -591,6 +604,7 @@ static void precalc_tex( struct brw_wm_compile *c, src_swizzle1(coord, Y), src_undef()); + /* tmp1 = MAX(tmp0, coord.Z) */ emit_op(c, OPCODE_MAX, tmp1, 0, 0, 0, @@ -598,6 +612,7 @@ static void precalc_tex( struct brw_wm_compile *c, src_swizzle1(coord, Z), src_undef()); + /* tmp0 = 1 / tmp1 */ emit_op(c, OPCODE_RCP, tmp0, 0, 0, 0, @@ -605,6 +620,7 @@ static void precalc_tex( struct brw_wm_compile *c, src_undef(), src_undef()); + /* tmpCoord = src0 * tmp0 */ emit_op(c, OPCODE_MUL, tmpcoord, 0, 0, 0, @@ -614,7 +630,8 @@ static void precalc_tex( struct brw_wm_compile *c, release_temp(c, tmp0); release_temp(c, tmp1); - } else if (inst->TexSrcTarget == TEXTURE_RECT_INDEX) { + } + else if (inst->TexSrcTarget == TEXTURE_RECT_INDEX) { struct prog_src_register scale = search_or_add_param5( c, STATE_INTERNAL, @@ -645,19 +662,9 @@ static void precalc_tex( struct brw_wm_compile *c, * conversion requires allocating a temporary variable which we * don't have the facility to do that late in the compilation. */ - if (!(c->key.yuvtex_mask & (1<<unit))) { - emit_op(c, - OPCODE_TEX, - inst->DstReg, - inst->SaturateMode, - unit, - inst->TexSrcTarget, - coord, - src_undef(), - src_undef()); - } - else { - GLboolean swap_uv = c->key.yuvtex_swap_mask & (1<<unit); + if (c->key.yuvtex_mask & (1 << unit)) { + /* convert ycbcr to RGBA */ + GLboolean swap_uv = c->key.yuvtex_swap_mask & (1<<unit); /* CONST C0 = { -.5, -.0625, -.5, 1.164 } @@ -737,6 +744,31 @@ static void precalc_tex( struct brw_wm_compile *c, release_temp(c, tmp); } + else { + /* ordinary RGBA tex instruction */ + emit_op(c, + OPCODE_TEX, + inst->DstReg, + inst->SaturateMode, + unit, + inst->TexSrcTarget, + coord, + src_undef(), + src_undef()); + } + + /* For GL_EXT_texture_swizzle: */ + if (c->key.tex_swizzles[unit] != SWIZZLE_NOOP) { + /* swizzle the result of the TEX instruction */ + struct prog_src_register tmpsrc = src_reg_from_dst(inst->DstReg); + emit_op(c, OPCODE_SWZ, + inst->DstReg, + SATURATE_OFF, /* saturate already done above */ + 0, 0, /* tex unit, target N/A */ + src_swizzle4(tmpsrc, c->key.tex_swizzles[unit]), + src_undef(), + src_undef()); + } if ((inst->TexSrcTarget == TEXTURE_RECT_INDEX) || (inst->TexSrcTarget == TEXTURE_CUBE_INDEX)) @@ -814,62 +846,11 @@ static void precalc_txp( struct brw_wm_compile *c, - - -/*********************************************************************** - * Add instructions to perform fog blending - */ - -static void fog_blend( struct brw_wm_compile *c, - struct prog_src_register fog_factor ) -{ - struct prog_dst_register outcolor = dst_reg(PROGRAM_OUTPUT, FRAG_RESULT_COLR); - struct prog_src_register fogcolor = search_or_add_param5( c, STATE_FOG_COLOR, 0,0,0,0 ); - - /* color.xyz = LRP fog_factor.xxxx, output_color, fog_color */ - - emit_op(c, - OPCODE_LRP, - dst_mask(outcolor, WRITEMASK_XYZ), - 0, 0, 0, - fog_factor, - src_reg_from_dst(outcolor), - fogcolor); -} - - - -/* This one is simple - just take the interpolated fog coordinate and - * use it as the fog blend factor. - */ -static void fog_interpolated( struct brw_wm_compile *c ) -{ - struct prog_src_register fogc = src_reg(PROGRAM_INPUT, FRAG_ATTRIB_FOGC); - - if (!(c->fp_interp_emitted & (1<<FRAG_ATTRIB_FOGC))) - emit_interp(c, FRAG_ATTRIB_FOGC); - - fog_blend( c, src_swizzle1(fogc, GET_SWZ(fogc.Swizzle,X))); -} - -static void emit_fog( struct brw_wm_compile *c ) -{ - if (!c->fp->program.FogOption) - return; - - if (1) - fog_interpolated( c ); - else { - /* TODO: per-pixel fog */ - assert(0); - } -} - static void emit_fb_write( struct brw_wm_compile *c ) { - struct prog_src_register outcolor = src_reg(PROGRAM_OUTPUT, FRAG_RESULT_COLR); struct prog_src_register payload_r0_depth = src_reg(PROGRAM_PAYLOAD, PAYLOAD_DEPTH); struct prog_src_register outdepth = src_reg(PROGRAM_OUTPUT, FRAG_RESULT_DEPR); + struct prog_src_register outcolor; GLuint i; struct prog_instruction *inst, *last_inst; @@ -893,7 +874,14 @@ static void emit_fb_write( struct brw_wm_compile *c ) } } last_inst->Sampler |= 1; //eot - }else { + } + else { + /* if gl_FragData[0] is written, use it, else use gl_FragColor */ + if (c->fp->program.Base.OutputsWritten & (1 << FRAG_RESULT_DATA0)) + outcolor = src_reg(PROGRAM_OUTPUT, FRAG_RESULT_DATA0); + else + outcolor = src_reg(PROGRAM_OUTPUT, FRAG_RESULT_COLR); + inst = emit_op(c, WM_FB_WRITE, dst_mask(dst_undef(),0), 0, 0, 0, outcolor, payload_r0_depth, outdepth); inst->Sampler = 1|(0<<1); @@ -960,7 +948,7 @@ void brw_wm_pass_fp( struct brw_wm_compile *c ) GLuint insn; if (INTEL_DEBUG & DEBUG_WM) { - _mesa_printf("\n\n\npre-fp:\n"); + _mesa_printf("pre-fp:\n"); _mesa_print_program(&fp->program.Base); _mesa_printf("\n"); } @@ -1055,7 +1043,6 @@ void brw_wm_pass_fp( struct brw_wm_compile *c ) emit_ddy(c, inst); break; case OPCODE_END: - emit_fog(c); emit_fb_write(c); break; case OPCODE_PRINT: @@ -1068,7 +1055,7 @@ void brw_wm_pass_fp( struct brw_wm_compile *c ) } if (INTEL_DEBUG & DEBUG_WM) { - _mesa_printf("\n\n\npass_fp:\n"); + _mesa_printf("pass_fp:\n"); print_insns( c->prog_instructions, c->nr_fp_insns ); _mesa_printf("\n"); } diff --git a/src/mesa/drivers/dri/i965/brw_wm_glsl.c b/src/mesa/drivers/dri/i965/brw_wm_glsl.c index cb728190f5..8fd776ac39 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_glsl.c +++ b/src/mesa/drivers/dri/i965/brw_wm_glsl.c @@ -267,7 +267,7 @@ static void emit_trunc( struct brw_wm_compile *c, struct brw_reg src, dst; dst = get_dst_reg(c, inst, i, 1) ; src = get_src_reg(c, &inst->SrcReg[0], i, 1); - brw_RNDD(p, dst, src); + brw_RNDZ(p, dst, src); } } brw_set_saturate(p, 0); @@ -623,7 +623,7 @@ static void emit_dph(struct brw_wm_compile *c, brw_MAC(p, brw_null_reg(), src0[1], src1[1]); brw_MAC(p, dst, src0[2], src1[2]); brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0); - brw_ADD(p, dst, src0[3], src1[3]); + brw_ADD(p, dst, dst, src1[3]); brw_set_saturate(p, 0); } @@ -892,15 +892,19 @@ static void emit_lrp(struct brw_wm_compile *c, } } +/** + * For GLSL shaders, this KIL will be unconditional. + * It may be contained inside an IF/ENDIF structure of course. + */ static void emit_kil(struct brw_wm_compile *c) { - struct brw_compile *p = &c->func; - struct brw_reg depth = retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UW); - brw_push_insn_state(p); - brw_set_mask_control(p, BRW_MASK_DISABLE); - brw_NOT(p, c->emit_mask_reg, brw_mask_reg(1)); //IMASK - brw_AND(p, depth, c->emit_mask_reg, depth); - brw_pop_insn_state(p); + struct brw_compile *p = &c->func; + struct brw_reg depth = retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UW); + brw_push_insn_state(p); + brw_set_mask_control(p, BRW_MASK_DISABLE); + brw_NOT(p, c->emit_mask_reg, brw_mask_reg(1)); //IMASK + brw_AND(p, depth, c->emit_mask_reg, depth); + brw_pop_insn_state(p); } static void emit_mad(struct brw_wm_compile *c, @@ -1095,7 +1099,7 @@ static void noise1_sub( struct brw_wm_compile *c ) { /* Arrange the two end coordinates into scalars (itmp0/itmp1) to be hashed. Also compute the remainder (offset within the unit length), interleaved to reduce register dependency penalties. */ - brw_RNDD( p, itmp[ 0 ], param ); + brw_RNDD( p, retype( itmp[ 0 ], BRW_REGISTER_TYPE_D ), param ); brw_FRC( p, param, param ); brw_ADD( p, itmp[ 1 ], itmp[ 0 ], brw_imm_ud( 1 ) ); brw_MOV( p, itmp[ 3 ], brw_imm_ud( 0x79D9 ) ); /* constant used later */ @@ -1220,8 +1224,8 @@ static void noise2_sub( struct brw_wm_compile *c ) { /* Arrange the four corner coordinates into scalars (itmp0..itmp3) to be hashed. Also compute the remainders (offsets within the unit square), interleaved to reduce register dependency penalties. */ - brw_RNDD( p, itmp[ 0 ], param0 ); - brw_RNDD( p, itmp[ 1 ], param1 ); + brw_RNDD( p, retype( itmp[ 0 ], BRW_REGISTER_TYPE_D ), param0 ); + brw_RNDD( p, retype( itmp[ 1 ], BRW_REGISTER_TYPE_D ), param1 ); brw_FRC( p, param0, param0 ); brw_FRC( p, param1, param1 ); brw_MOV( p, itmp[ 4 ], brw_imm_ud( 0xBA97 ) ); /* constant used later */ @@ -1400,21 +1404,19 @@ static void noise3_sub( struct brw_wm_compile *c ) { /* Arrange the eight corner coordinates into scalars (itmp0..itmp3) to be hashed. Also compute the remainders (offsets within the unit cube), interleaved to reduce register dependency penalties. */ - brw_RNDD( p, itmp[ 0 ], param0 ); - brw_RNDD( p, itmp[ 1 ], param1 ); - brw_RNDD( p, itmp[ 2 ], param2 ); - brw_MOV( p, itmp[ 4 ], brw_imm_ud( 0xBC8F ) ); /* constant used later */ - brw_MOV( p, itmp[ 5 ], brw_imm_ud( 0xD0BD ) ); /* constant used later */ - brw_MOV( p, itmp[ 6 ], brw_imm_ud( 0x9B93 ) ); /* constant used later */ + brw_RNDD( p, retype( itmp[ 0 ], BRW_REGISTER_TYPE_D ), param0 ); + brw_RNDD( p, retype( itmp[ 1 ], BRW_REGISTER_TYPE_D ), param1 ); + brw_RNDD( p, retype( itmp[ 2 ], BRW_REGISTER_TYPE_D ), param2 ); brw_FRC( p, param0, param0 ); brw_FRC( p, param1, param1 ); brw_FRC( p, param2, param2 ); /* Since we now have only 16 bits of precision in the hash, we must be more careful about thorough mixing to maintain entropy as we squash the input vector into a small scalar. */ - brw_MUL( p, brw_acc_reg(), itmp[ 4 ], itmp[ 0 ] ); - brw_MAC( p, brw_acc_reg(), itmp[ 5 ], itmp[ 1 ] ); - brw_MAC( p, itmp[ 0 ], itmp[ 6 ], itmp[ 2 ] ); + brw_MUL( p, brw_null_reg(), low_words( itmp[ 0 ] ), brw_imm_uw( 0xBC8F ) ); + brw_MAC( p, brw_null_reg(), low_words( itmp[ 1 ] ), brw_imm_uw( 0xD0BD ) ); + brw_MAC( p, low_words( itmp[ 0 ] ), low_words( itmp[ 2 ] ), + brw_imm_uw( 0x9B93 ) ); brw_ADD( p, high_words( itmp[ 0 ] ), low_words( itmp[ 0 ] ), brw_imm_uw( 0xBC8F ) ); @@ -1668,6 +1670,430 @@ static void emit_noise3( struct brw_wm_compile *c, release_tmps( c, mark ); } +/* For the four-dimensional case, the little micro-optimisation benefits + we obtain by unrolling all the loops aren't worth the massive bloat it + now causes. Instead, we loop twice around performing a similar operation + to noise3, once for the w=0 cube and once for the w=1, with a bit more + code to glue it all together. */ +static void noise4_sub( struct brw_wm_compile *c ) { + + struct brw_compile *p = &c->func; + struct brw_reg param[ 4 ], + x0y0, x0y1, x1y0, x1y1, /* gradients at four of the corners */ + w0, /* noise for the w=0 cube */ + floors[ 2 ], /* integer coordinates of base corner of hypercube */ + interp[ 4 ], /* interpolation coefficients */ + t, tmp[ 8 ], /* float temporaries */ + itmp[ 8 ], /* unsigned integer temporaries (aliases of floats above) */ + wtmp[ 8 ]; /* 16-way unsigned word temporaries (aliases of above) */ + int i, j; + int mark = mark_tmps( c ); + GLuint loop, origin; + + x0y0 = alloc_tmp( c ); + x0y1 = alloc_tmp( c ); + x1y0 = alloc_tmp( c ); + x1y1 = alloc_tmp( c ); + t = alloc_tmp( c ); + w0 = alloc_tmp( c ); + floors[ 0 ] = retype( alloc_tmp( c ), BRW_REGISTER_TYPE_UD ); + floors[ 1 ] = retype( alloc_tmp( c ), BRW_REGISTER_TYPE_UD ); + + for( i = 0; i < 4; i++ ) { + param[ i ] = lookup_tmp( c, mark - 5 + i ); + interp[ i ] = alloc_tmp( c ); + } + + for( i = 0; i < 8; i++ ) { + tmp[ i ] = alloc_tmp( c ); + itmp[ i ] = retype( tmp[ i ], BRW_REGISTER_TYPE_UD ); + wtmp[ i ] = brw_uw16_grf( tmp[ i ].nr, 0 ); + } + + brw_set_access_mode( p, BRW_ALIGN_1 ); + + /* We only want 16 bits of precision from the integral part of each + co-ordinate, but unfortunately the RNDD semantics would saturate + at 16 bits if we performed the operation directly to a 16-bit + destination. Therefore, we round to 32-bit temporaries where + appropriate, and then store only the lower 16 bits. */ + brw_RNDD( p, retype( floors[ 0 ], BRW_REGISTER_TYPE_D ), param[ 0 ] ); + brw_RNDD( p, retype( itmp[ 0 ], BRW_REGISTER_TYPE_D ), param[ 1 ] ); + brw_RNDD( p, retype( floors[ 1 ], BRW_REGISTER_TYPE_D ), param[ 2 ] ); + brw_RNDD( p, retype( itmp[ 1 ], BRW_REGISTER_TYPE_D ), param[ 3 ] ); + brw_MOV( p, high_words( floors[ 0 ] ), low_words( itmp[ 0 ] ) ); + brw_MOV( p, high_words( floors[ 1 ] ), low_words( itmp[ 1 ] ) ); + + /* Modify the flag register here, because the side effect is useful + later (see below). We know for certain that all flags will be + cleared, since the FRC instruction cannot possibly generate + negative results. Even for exceptional inputs (infinities, denormals, + NaNs), the architecture guarantees that the L conditional is false. */ + brw_set_conditionalmod( p, BRW_CONDITIONAL_L ); + brw_FRC( p, param[ 0 ], param[ 0 ] ); + brw_set_predicate_control( p, BRW_PREDICATE_NONE ); + for( i = 1; i < 4; i++ ) + brw_FRC( p, param[ i ], param[ i ] ); + + /* Calculate the interpolation coefficients (6t^5 - 15t^4 + 10t^3) first + of all. */ + for( i = 0; i < 4; i++ ) + brw_MUL( p, interp[ i ], param[ i ], brw_imm_f( 6.0 ) ); + for( i = 0; i < 4; i++ ) + brw_ADD( p, interp[ i ], interp[ i ], brw_imm_f( -15.0 ) ); + for( i = 0; i < 4; i++ ) + brw_MUL( p, interp[ i ], interp[ i ], param[ i ] ); + for( i = 0; i < 4; i++ ) + brw_ADD( p, interp[ i ], interp[ i ], brw_imm_f( 10.0 ) ); + for( j = 0; j < 3; j++ ) + for( i = 0; i < 4; i++ ) + brw_MUL( p, interp[ i ], interp[ i ], param[ i ] ); + + /* Mark the current address, as it will be a jump destination. The + following code will be executed twice: first, with the flag + register clear indicating the w=0 case, and second with flags + set for w=1. */ + loop = p->nr_insn; + + /* Arrange the eight corner coordinates into scalars (itmp0..itmp3) to + be hashed. Since we have only 16 bits of precision in the hash, we + must be careful about thorough mixing to maintain entropy as we + squash the input vector into a small scalar. */ + brw_MUL( p, brw_null_reg(), low_words( floors[ 0 ] ), + brw_imm_uw( 0xBC8F ) ); + brw_MAC( p, brw_null_reg(), high_words( floors[ 0 ] ), + brw_imm_uw( 0xD0BD ) ); + brw_MAC( p, brw_null_reg(), low_words( floors[ 1 ] ), + brw_imm_uw( 0x9B93 ) ); + brw_MAC( p, low_words( itmp[ 0 ] ), high_words( floors[ 1 ] ), + brw_imm_uw( 0xA359 ) ); + brw_ADD( p, high_words( itmp[ 0 ] ), low_words( itmp[ 0 ] ), + brw_imm_uw( 0xBC8F ) ); + + /* Temporarily disable the execution mask while we work with ExecSize=16 + channels (the mask is set for ExecSize=8 and is probably incorrect). + Although this might cause execution of unwanted channels, the code + writes only to temporary registers and has no side effects, so + disabling the mask is harmless. */ + brw_push_insn_state( p ); + brw_set_mask_control( p, BRW_MASK_DISABLE ); + brw_ADD( p, wtmp[ 1 ], wtmp[ 0 ], brw_imm_uw( 0xD0BD ) ); + brw_ADD( p, wtmp[ 2 ], wtmp[ 0 ], brw_imm_uw( 0x9B93 ) ); + brw_ADD( p, wtmp[ 3 ], wtmp[ 1 ], brw_imm_uw( 0x9B93 ) ); + + /* We're now ready to perform the hashing. The eight hashes are + interleaved for performance. The hash function used is + designed to rapidly achieve avalanche and require only 16x16 + bit multiplication, and 8-bit swizzles (which we get for + free). */ + for( i = 0; i < 4; i++ ) + brw_MUL( p, wtmp[ i ], wtmp[ i ], brw_imm_uw( 0x28D9 ) ); + for( i = 0; i < 4; i++ ) + brw_XOR( p, even_bytes( wtmp[ i ] ), even_bytes( wtmp[ i ] ), + odd_bytes( wtmp[ i ] ) ); + for( i = 0; i < 4; i++ ) + brw_MUL( p, wtmp[ i ], wtmp[ i ], brw_imm_uw( 0xC6D5 ) ); + for( i = 0; i < 4; i++ ) + brw_XOR( p, even_bytes( wtmp[ i ] ), even_bytes( wtmp[ i ] ), + odd_bytes( wtmp[ i ] ) ); + brw_pop_insn_state( p ); + + /* Now we want to initialise the four rear gradients based on the + hashes. Format conversion from signed integer to float leaves + everything scaled too high by a factor of pow( 2, 15 ), but + we correct for that right at the end. */ + /* x component */ + brw_ADD( p, t, param[ 0 ], brw_imm_f( -1.0 ) ); + brw_MOV( p, x0y0, low_words( tmp[ 0 ] ) ); + brw_MOV( p, x0y1, low_words( tmp[ 1 ] ) ); + brw_MOV( p, x1y0, high_words( tmp[ 0 ] ) ); + brw_MOV( p, x1y1, high_words( tmp[ 1 ] ) ); + + brw_push_insn_state( p ); + brw_set_mask_control( p, BRW_MASK_DISABLE ); + brw_SHL( p, wtmp[ 0 ], wtmp[ 0 ], brw_imm_uw( 4 ) ); + brw_SHL( p, wtmp[ 1 ], wtmp[ 1 ], brw_imm_uw( 4 ) ); + brw_pop_insn_state( p ); + + brw_MUL( p, x1y0, x1y0, t ); + brw_MUL( p, x1y1, x1y1, t ); + brw_ADD( p, t, param[ 1 ], brw_imm_f( -1.0 ) ); + brw_MUL( p, x0y0, x0y0, param[ 0 ] ); + brw_MUL( p, x0y1, x0y1, param[ 0 ] ); + + /* y component */ + brw_MOV( p, tmp[ 5 ], low_words( tmp[ 1 ] ) ); + brw_MOV( p, tmp[ 7 ], high_words( tmp[ 1 ] ) ); + brw_MOV( p, tmp[ 4 ], low_words( tmp[ 0 ] ) ); + brw_MOV( p, tmp[ 6 ], high_words( tmp[ 0 ] ) ); + + brw_push_insn_state( p ); + brw_set_mask_control( p, BRW_MASK_DISABLE ); + brw_SHL( p, wtmp[ 0 ], wtmp[ 0 ], brw_imm_uw( 4 ) ); + brw_SHL( p, wtmp[ 1 ], wtmp[ 1 ], brw_imm_uw( 4 ) ); + brw_pop_insn_state( p ); + + brw_MUL( p, tmp[ 5 ], tmp[ 5 ], t ); + brw_MUL( p, tmp[ 7 ], tmp[ 7 ], t ); + /* prepare t for the w component (used below): w the first time through + the loop; w - 1 the second time) */ + brw_set_predicate_control( p, BRW_PREDICATE_NORMAL ); + brw_ADD( p, t, param[ 3 ], brw_imm_f( -1.0 ) ); + p->current->header.predicate_inverse = 1; + brw_MOV( p, t, param[ 3 ] ); + p->current->header.predicate_inverse = 0; + brw_set_predicate_control( p, BRW_PREDICATE_NONE ); + brw_MUL( p, tmp[ 4 ], tmp[ 4 ], param[ 1 ] ); + brw_MUL( p, tmp[ 6 ], tmp[ 6 ], param[ 1 ] ); + + brw_ADD( p, x0y1, x0y1, tmp[ 5 ] ); + brw_ADD( p, x1y1, x1y1, tmp[ 7 ] ); + brw_ADD( p, x0y0, x0y0, tmp[ 4 ] ); + brw_ADD( p, x1y0, x1y0, tmp[ 6 ] ); + + /* z component */ + brw_MOV( p, tmp[ 4 ], low_words( tmp[ 0 ] ) ); + brw_MOV( p, tmp[ 5 ], low_words( tmp[ 1 ] ) ); + brw_MOV( p, tmp[ 6 ], high_words( tmp[ 0 ] ) ); + brw_MOV( p, tmp[ 7 ], high_words( tmp[ 1 ] ) ); + + brw_push_insn_state( p ); + brw_set_mask_control( p, BRW_MASK_DISABLE ); + brw_SHL( p, wtmp[ 0 ], wtmp[ 0 ], brw_imm_uw( 4 ) ); + brw_SHL( p, wtmp[ 1 ], wtmp[ 1 ], brw_imm_uw( 4 ) ); + brw_pop_insn_state( p ); + + brw_MUL( p, tmp[ 4 ], tmp[ 4 ], param[ 2 ] ); + brw_MUL( p, tmp[ 5 ], tmp[ 5 ], param[ 2 ] ); + brw_MUL( p, tmp[ 6 ], tmp[ 6 ], param[ 2 ] ); + brw_MUL( p, tmp[ 7 ], tmp[ 7 ], param[ 2 ] ); + + brw_ADD( p, x0y0, x0y0, tmp[ 4 ] ); + brw_ADD( p, x0y1, x0y1, tmp[ 5 ] ); + brw_ADD( p, x1y0, x1y0, tmp[ 6 ] ); + brw_ADD( p, x1y1, x1y1, tmp[ 7 ] ); + + /* w component */ + brw_MOV( p, tmp[ 4 ], low_words( tmp[ 0 ] ) ); + brw_MOV( p, tmp[ 5 ], low_words( tmp[ 1 ] ) ); + brw_MOV( p, tmp[ 6 ], high_words( tmp[ 0 ] ) ); + brw_MOV( p, tmp[ 7 ], high_words( tmp[ 1 ] ) ); + + brw_MUL( p, tmp[ 4 ], tmp[ 4 ], t ); + brw_MUL( p, tmp[ 5 ], tmp[ 5 ], t ); + brw_MUL( p, tmp[ 6 ], tmp[ 6 ], t ); + brw_MUL( p, tmp[ 7 ], tmp[ 7 ], t ); + brw_ADD( p, t, param[ 0 ], brw_imm_f( -1.0 ) ); + + brw_ADD( p, x0y0, x0y0, tmp[ 4 ] ); + brw_ADD( p, x0y1, x0y1, tmp[ 5 ] ); + brw_ADD( p, x1y0, x1y0, tmp[ 6 ] ); + brw_ADD( p, x1y1, x1y1, tmp[ 7 ] ); + + /* Here we interpolate in the y dimension... */ + brw_ADD( p, x0y1, x0y1, negate( x0y0 ) ); + brw_ADD( p, x1y1, x1y1, negate( x1y0 ) ); + brw_MUL( p, x0y1, x0y1, interp[ 1 ] ); + brw_MUL( p, x1y1, x1y1, interp[ 1 ] ); + brw_ADD( p, x0y0, x0y0, x0y1 ); + brw_ADD( p, x1y0, x1y0, x1y1 ); + + /* And now in x. Leave the result in tmp[ 0 ] (see below)... */ + brw_ADD( p, x1y0, x1y0, negate( x0y0 ) ); + brw_MUL( p, x1y0, x1y0, interp[ 0 ] ); + brw_ADD( p, tmp[ 0 ], x0y0, x1y0 ); + + /* Now do the same thing for the front four gradients... */ + /* x component */ + brw_MOV( p, x0y0, low_words( tmp[ 2 ] ) ); + brw_MOV( p, x0y1, low_words( tmp[ 3 ] ) ); + brw_MOV( p, x1y0, high_words( tmp[ 2 ] ) ); + brw_MOV( p, x1y1, high_words( tmp[ 3 ] ) ); + + brw_push_insn_state( p ); + brw_set_mask_control( p, BRW_MASK_DISABLE ); + brw_SHL( p, wtmp[ 2 ], wtmp[ 2 ], brw_imm_uw( 4 ) ); + brw_SHL( p, wtmp[ 3 ], wtmp[ 3 ], brw_imm_uw( 4 ) ); + brw_pop_insn_state( p ); + + brw_MUL( p, x1y0, x1y0, t ); + brw_MUL( p, x1y1, x1y1, t ); + brw_ADD( p, t, param[ 1 ], brw_imm_f( -1.0 ) ); + brw_MUL( p, x0y0, x0y0, param[ 0 ] ); + brw_MUL( p, x0y1, x0y1, param[ 0 ] ); + + /* y component */ + brw_MOV( p, tmp[ 5 ], low_words( tmp[ 3 ] ) ); + brw_MOV( p, tmp[ 7 ], high_words( tmp[ 3 ] ) ); + brw_MOV( p, tmp[ 4 ], low_words( tmp[ 2 ] ) ); + brw_MOV( p, tmp[ 6 ], high_words( tmp[ 2 ] ) ); + + brw_push_insn_state( p ); + brw_set_mask_control( p, BRW_MASK_DISABLE ); + brw_SHL( p, wtmp[ 2 ], wtmp[ 2 ], brw_imm_uw( 4 ) ); + brw_SHL( p, wtmp[ 3 ], wtmp[ 3 ], brw_imm_uw( 4 ) ); + brw_pop_insn_state( p ); + + brw_MUL( p, tmp[ 5 ], tmp[ 5 ], t ); + brw_MUL( p, tmp[ 7 ], tmp[ 7 ], t ); + brw_ADD( p, t, param[ 2 ], brw_imm_f( -1.0 ) ); + brw_MUL( p, tmp[ 4 ], tmp[ 4 ], param[ 1 ] ); + brw_MUL( p, tmp[ 6 ], tmp[ 6 ], param[ 1 ] ); + + brw_ADD( p, x0y1, x0y1, tmp[ 5 ] ); + brw_ADD( p, x1y1, x1y1, tmp[ 7 ] ); + brw_ADD( p, x0y0, x0y0, tmp[ 4 ] ); + brw_ADD( p, x1y0, x1y0, tmp[ 6 ] ); + + /* z component */ + brw_MOV( p, tmp[ 4 ], low_words( tmp[ 2 ] ) ); + brw_MOV( p, tmp[ 5 ], low_words( tmp[ 3 ] ) ); + brw_MOV( p, tmp[ 6 ], high_words( tmp[ 2 ] ) ); + brw_MOV( p, tmp[ 7 ], high_words( tmp[ 3 ] ) ); + + brw_push_insn_state( p ); + brw_set_mask_control( p, BRW_MASK_DISABLE ); + brw_SHL( p, wtmp[ 2 ], wtmp[ 2 ], brw_imm_uw( 4 ) ); + brw_SHL( p, wtmp[ 3 ], wtmp[ 3 ], brw_imm_uw( 4 ) ); + brw_pop_insn_state( p ); + + brw_MUL( p, tmp[ 4 ], tmp[ 4 ], t ); + brw_MUL( p, tmp[ 5 ], tmp[ 5 ], t ); + brw_MUL( p, tmp[ 6 ], tmp[ 6 ], t ); + brw_MUL( p, tmp[ 7 ], tmp[ 7 ], t ); + /* prepare t for the w component (used below): w the first time through + the loop; w - 1 the second time) */ + brw_set_predicate_control( p, BRW_PREDICATE_NORMAL ); + brw_ADD( p, t, param[ 3 ], brw_imm_f( -1.0 ) ); + p->current->header.predicate_inverse = 1; + brw_MOV( p, t, param[ 3 ] ); + p->current->header.predicate_inverse = 0; + brw_set_predicate_control( p, BRW_PREDICATE_NONE ); + + brw_ADD( p, x0y0, x0y0, tmp[ 4 ] ); + brw_ADD( p, x0y1, x0y1, tmp[ 5 ] ); + brw_ADD( p, x1y0, x1y0, tmp[ 6 ] ); + brw_ADD( p, x1y1, x1y1, tmp[ 7 ] ); + + /* w component */ + brw_MOV( p, tmp[ 4 ], low_words( tmp[ 2 ] ) ); + brw_MOV( p, tmp[ 5 ], low_words( tmp[ 3 ] ) ); + brw_MOV( p, tmp[ 6 ], high_words( tmp[ 2 ] ) ); + brw_MOV( p, tmp[ 7 ], high_words( tmp[ 3 ] ) ); + + brw_MUL( p, tmp[ 4 ], tmp[ 4 ], t ); + brw_MUL( p, tmp[ 5 ], tmp[ 5 ], t ); + brw_MUL( p, tmp[ 6 ], tmp[ 6 ], t ); + brw_MUL( p, tmp[ 7 ], tmp[ 7 ], t ); + + brw_ADD( p, x0y0, x0y0, tmp[ 4 ] ); + brw_ADD( p, x0y1, x0y1, tmp[ 5 ] ); + brw_ADD( p, x1y0, x1y0, tmp[ 6 ] ); + brw_ADD( p, x1y1, x1y1, tmp[ 7 ] ); + + /* Interpolate in the y dimension: */ + brw_ADD( p, x0y1, x0y1, negate( x0y0 ) ); + brw_ADD( p, x1y1, x1y1, negate( x1y0 ) ); + brw_MUL( p, x0y1, x0y1, interp[ 1 ] ); + brw_MUL( p, x1y1, x1y1, interp[ 1 ] ); + brw_ADD( p, x0y0, x0y0, x0y1 ); + brw_ADD( p, x1y0, x1y0, x1y1 ); + + /* And now in x. The rear face is in tmp[ 0 ] (see above), so this + time put the front face in tmp[ 1 ] and we're nearly there... */ + brw_ADD( p, x1y0, x1y0, negate( x0y0 ) ); + brw_MUL( p, x1y0, x1y0, interp[ 0 ] ); + brw_ADD( p, tmp[ 1 ], x0y0, x1y0 ); + + /* Another interpolation, in the z dimension: */ + brw_ADD( p, tmp[ 1 ], tmp[ 1 ], negate( tmp[ 0 ] ) ); + brw_MUL( p, tmp[ 1 ], tmp[ 1 ], interp[ 2 ] ); + brw_ADD( p, tmp[ 0 ], tmp[ 0 ], tmp[ 1 ] ); + + /* Exit the loop if we've computed both cubes... */ + origin = p->nr_insn; + brw_push_insn_state( p ); + brw_set_predicate_control( p, BRW_PREDICATE_NORMAL ); + brw_set_mask_control( p, BRW_MASK_DISABLE ); + brw_ADD( p, brw_ip_reg(), brw_ip_reg(), brw_imm_d( 0 ) ); + brw_pop_insn_state( p ); + + /* Save the result for the w=0 case, and increment the w coordinate: */ + brw_MOV( p, w0, tmp[ 0 ] ); + brw_ADD( p, high_words( floors[ 1 ] ), high_words( floors[ 1 ] ), + brw_imm_uw( 1 ) ); + + /* Loop around for the other cube. Explicitly set the flag register + (unfortunately we must spend an extra instruction to do this: we + can't rely on a side effect of the previous MOV or ADD because + conditional modifiers which are normally true might be false in + exceptional circumstances, e.g. given a NaN input; the add to + brw_ip_reg() is not suitable because the IP is not an 8-vector). */ + brw_push_insn_state( p ); + brw_set_mask_control( p, BRW_MASK_DISABLE ); + brw_MOV( p, brw_flag_reg(), brw_imm_uw( 0xFF ) ); + brw_ADD( p, brw_ip_reg(), brw_ip_reg(), + brw_imm_d( ( loop - p->nr_insn ) << 4 ) ); + brw_pop_insn_state( p ); + + /* Patch the previous conditional branch now that we know the + destination address. */ + brw_set_src1( p->store + origin, + brw_imm_d( ( p->nr_insn - origin ) << 4 ) ); + + /* The very last interpolation. */ + brw_ADD( p, tmp[ 0 ], tmp[ 0 ], negate( w0 ) ); + brw_MUL( p, tmp[ 0 ], tmp[ 0 ], interp[ 3 ] ); + brw_ADD( p, tmp[ 0 ], tmp[ 0 ], w0 ); + + /* scale by pow( 2, -15 ), as described above */ + brw_MUL( p, param[ 0 ], tmp[ 0 ], brw_imm_f( 0.000030517578125 ) ); + + release_tmps( c, mark ); +} + +static void emit_noise4( struct brw_wm_compile *c, + struct prog_instruction *inst ) +{ + struct brw_compile *p = &c->func; + struct brw_reg src0, src1, src2, src3, param0, param1, param2, param3, dst; + GLuint mask = inst->DstReg.WriteMask; + int i; + int mark = mark_tmps( c ); + + assert( mark == 0 ); + + src0 = get_src_reg( c, inst->SrcReg, 0, 1 ); + src1 = get_src_reg( c, inst->SrcReg, 1, 1 ); + src2 = get_src_reg( c, inst->SrcReg, 2, 1 ); + src3 = get_src_reg( c, inst->SrcReg, 3, 1 ); + + param0 = alloc_tmp( c ); + param1 = alloc_tmp( c ); + param2 = alloc_tmp( c ); + param3 = alloc_tmp( c ); + + brw_MOV( p, param0, src0 ); + brw_MOV( p, param1, src1 ); + brw_MOV( p, param2, src2 ); + brw_MOV( p, param3, src3 ); + + invoke_subroutine( c, SUB_NOISE4, noise4_sub ); + + /* Fill in the result: */ + brw_set_saturate( p, inst->SaturateMode == SATURATE_ZERO_ONE ); + for (i = 0 ; i < 4; i++) { + if (mask & (1<<i)) { + dst = get_dst_reg(c, inst, i, 1); + brw_MOV( p, dst, param0 ); + } + } + if( inst->SaturateMode == SATURATE_ZERO_ONE ) + brw_set_saturate( p, 0 ); + + release_tmps( c, mark ); +} + static void emit_wpos_xy(struct brw_wm_compile *c, struct prog_instruction *inst) { @@ -1996,8 +2422,9 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c) case OPCODE_NOISE3: emit_noise3(c, inst); break; - /* case OPCODE_NOISE4: */ - /* not yet implemented */ + case OPCODE_NOISE4: + emit_noise4(c, inst); + break; case OPCODE_TEX: emit_tex(c, inst); break; diff --git a/src/mesa/drivers/dri/i965/brw_wm_iz.c b/src/mesa/drivers/dri/i965/brw_wm_iz.c index 0bb5d5ba83..bd60ac9b31 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_iz.c +++ b/src/mesa/drivers/dri/i965/brw_wm_iz.c @@ -52,70 +52,6 @@ const struct { { { P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 }, - { C, 0, 1, 0, 0 }, - { C, 0, 1, 0, 0 }, - { C, 1, 1, 0, 0 }, - { C, 1, 1, 0, 0 }, - { C, 0, 1, 0, 0 }, - { C, 0, 1, 0, 0 }, - { C, 1, 1, 1, 0 }, - { C, 1, 1, 1, 0 }, - { C, 0, 1, 1, 0 }, - { C, 0, 1, 1, 0 }, - { C, 1, 1, 1, 0 }, - { C, 1, 1, 1, 0 }, - { C, 0, 1, 1, 0 }, - { C, 0, 1, 1, 0 }, - { P, 0, 0, 0, 0 }, - { P, 0, 0, 0, 0 }, - { C, 0, 1, 0, 0 }, - { C, 0, 1, 0, 0 }, - { C, 1, 1, 0, 0 }, - { C, 1, 1, 0, 0 }, - { C, 0, 1, 0, 0 }, - { C, 0, 1, 0, 0 }, - { C, 1, 1, 1, 0 }, - { C, 1, 1, 1, 0 }, - { C, 0, 1, 1, 0 }, - { C, 0, 1, 1, 0 }, - { C, 1, 1, 1, 0 }, - { C, 1, 1, 1, 0 }, - { C, 0, 1, 1, 0 }, - { C, 0, 1, 1, 0 }, - { C, 0, 0, 0, 1 }, - { C, 0, 0, 0, 1 }, - { C, 0, 1, 0, 1 }, - { C, 0, 1, 0, 1 }, - { C, 1, 1, 0, 1 }, - { C, 1, 1, 0, 1 }, - { C, 0, 1, 0, 1 }, - { C, 0, 1, 0, 1 }, - { C, 1, 1, 1, 1 }, - { C, 1, 1, 1, 1 }, - { C, 0, 1, 1, 1 }, - { C, 0, 1, 1, 1 }, - { C, 1, 1, 1, 1 }, - { C, 1, 1, 1, 1 }, - { C, 0, 1, 1, 1 }, - { C, 0, 1, 1, 1 }, - { C, 0, 0, 0, 1 }, - { C, 0, 0, 0, 1 }, - { C, 0, 1, 0, 1 }, - { C, 0, 1, 0, 1 }, - { C, 1, 1, 0, 1 }, - { C, 1, 1, 0, 1 }, - { C, 0, 1, 0, 1 }, - { C, 0, 1, 0, 1 }, - { C, 1, 1, 1, 1 }, - { C, 1, 1, 1, 1 }, - { C, 0, 1, 1, 1 }, - { C, 0, 1, 1, 1 }, - { C, 1, 1, 1, 1 }, - { C, 1, 1, 1, 1 }, - { C, 0, 1, 1, 1 }, - { C, 0, 1, 1, 1 }, - { P, 0, 0, 0, 0 }, - { P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 }, diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass0.c b/src/mesa/drivers/dri/i965/brw_wm_pass0.c index 205a7160d3..590cd946ec 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_pass0.c +++ b/src/mesa/drivers/dri/i965/brw_wm_pass0.c @@ -51,6 +51,7 @@ static struct brw_wm_value *get_value( struct brw_wm_compile *c) return &c->vreg[c->nr_vreg++]; } +/** return pointer to a newly allocated instruction */ static struct brw_wm_instruction *get_instruction( struct brw_wm_compile *c ) { assert(c->nr_insns < BRW_WM_MAX_INSN); @@ -60,6 +61,7 @@ static struct brw_wm_instruction *get_instruction( struct brw_wm_compile *c ) /*********************************************************************** */ +/** Init the "undef" register */ static void pass0_init_undef( struct brw_wm_compile *c) { struct brw_wm_ref *ref = &c->undef_ref; @@ -69,6 +71,7 @@ static void pass0_init_undef( struct brw_wm_compile *c) ref->prevuse = NULL; } +/** Set a FP register to a value */ static void pass0_set_fpreg_value( struct brw_wm_compile *c, GLuint file, GLuint idx, @@ -83,6 +86,7 @@ static void pass0_set_fpreg_value( struct brw_wm_compile *c, c->pass0_fp_reg[file][idx][component] = ref; } +/** Set a FP register to a ref */ static void pass0_set_fpreg_ref( struct brw_wm_compile *c, GLuint file, GLuint idx, @@ -115,12 +119,13 @@ static const struct brw_wm_ref *get_param_ref( struct brw_wm_compile *c, ref->value = &c->creg[i/16]; ref->insn = 0; ref->prevuse = NULL; - + return ref; } } +/** Return a ref to a constant/literal value */ static const struct brw_wm_ref *get_const_ref( struct brw_wm_compile *c, const GLfloat *constval ) { @@ -142,7 +147,7 @@ static const struct brw_wm_ref *get_const_ref( struct brw_wm_compile *c, */ c->constref[i].constval = *constval; c->constref[i].ref = get_param_ref(c, constval); - + return c->constref[i].ref; } else { @@ -187,7 +192,7 @@ static const struct brw_wm_ref *pass0_get_reg( struct brw_wm_compile *c, /* There's something really hokey about parameters parsed in * arb programs - they all end up in here, whether they be - * state values, paramters or constants. This duplicates the + * state values, parameters or constants. This duplicates the * structure above & also seems to subvert the limits set for * each type of constant/param. */ @@ -198,7 +203,7 @@ static const struct brw_wm_ref *pass0_get_reg( struct brw_wm_compile *c, */ ref = get_const_ref(c, &plist->ParameterValues[idx][component]); break; - + case PROGRAM_STATE_VAR: case PROGRAM_UNIFORM: /* These may change from run to run: @@ -229,14 +234,13 @@ static const struct brw_wm_ref *pass0_get_reg( struct brw_wm_compile *c, - /*********************************************************************** * Straight translation to internal instruction format */ static void pass0_set_dst( struct brw_wm_compile *c, - struct brw_wm_instruction *out, - const struct prog_instruction *inst, + struct brw_wm_instruction *out, + const struct prog_instruction *inst, GLuint writemask ) { const struct prog_dst_register *dst = &inst->DstReg; @@ -245,18 +249,17 @@ static void pass0_set_dst( struct brw_wm_compile *c, for (i = 0; i < 4; i++) { if (writemask & (1<<i)) { out->dst[i] = get_value(c); - pass0_set_fpreg_value(c, dst->File, dst->Index, i, out->dst[i]); } } - + out->writemask = writemask; } static void pass0_set_dst_scalar( struct brw_wm_compile *c, - struct brw_wm_instruction *out, - const struct prog_instruction *inst, + struct brw_wm_instruction *out, + const struct prog_instruction *inst, GLuint writemask ) { if (writemask) { @@ -282,7 +285,6 @@ static void pass0_set_dst_scalar( struct brw_wm_compile *c, } - static const struct brw_wm_ref *get_fp_src_reg_ref( struct brw_wm_compile *c, struct prog_src_register src, GLuint i ) @@ -292,14 +294,13 @@ static const struct brw_wm_ref *get_fp_src_reg_ref( struct brw_wm_compile *c, static const GLfloat const_zero = 0.0; static const GLfloat const_one = 1.0; - if (component == SWIZZLE_ZERO) src_ref = get_const_ref(c, &const_zero); else if (component == SWIZZLE_ONE) src_ref = get_const_ref(c, &const_one); else src_ref = pass0_get_reg(c, src.File, src.Index, component); - + return src_ref; } @@ -311,19 +312,19 @@ static struct brw_wm_ref *get_new_ref( struct brw_wm_compile *c, { const struct brw_wm_ref *ref = get_fp_src_reg_ref(c, src, i); struct brw_wm_ref *newref = get_ref(c); - + newref->value = ref->value; newref->hw_reg = ref->hw_reg; - if (insn) { + if (insn) { newref->insn = insn - c->instruction; newref->prevuse = newref->value->lastuse; newref->value->lastuse = newref; } - if (src.NegateBase & (1<<i)) + if (src.NegateBase & (1<<i)) newref->hw_reg.negate ^= 1; - + if (src.Abs) { newref->hw_reg.negate = 0; newref->hw_reg.abs = 1; @@ -333,7 +334,6 @@ static struct brw_wm_ref *get_new_ref( struct brw_wm_compile *c, } - static struct brw_wm_instruction *translate_insn( struct brw_wm_compile *c, const struct prog_instruction *inst ) { @@ -379,14 +379,22 @@ static void pass0_precalc_mov( struct brw_wm_compile *c, { const struct prog_dst_register *dst = &inst->DstReg; GLuint writemask = inst->DstReg.WriteMask; + struct brw_wm_ref *refs[4]; GLuint i; /* Get the effect of a MOV by manipulating our register table: + * First get all refs, then assign refs. This ensures that "in-place" + * swizzles such as: + * MOV t, t.xxyx + * are handled correctly. Previously, these two steps were done in + * one loop and the above case was incorrectly handled. */ for (i = 0; i < 4; i++) { - if (writemask & (1<<i)) { - pass0_set_fpreg_ref( c, dst->File, dst->Index, i, - get_new_ref(c, inst->SrcReg[0], i, NULL)); + refs[i] = get_new_ref(c, inst->SrcReg[0], i, NULL); + } + for (i = 0; i < 4; i++) { + if (writemask & (1 << i)) { + pass0_set_fpreg_ref( c, dst->File, dst->Index, i, refs[i]); } } } @@ -418,6 +426,7 @@ static void pass0_init_payload( struct brw_wm_compile *c ) &c->payload.input_interp[i] ); } + /*********************************************************************** * PASS 0 * @@ -440,7 +449,6 @@ void brw_wm_pass0( struct brw_wm_compile *c ) for (insn = 0; insn < c->nr_fp_insns; insn++) { const struct prog_instruction *inst = &c->prog_instructions[insn]; - /* Optimize away moves, otherwise emit translated instruction: */ switch (inst->Opcode) { @@ -453,8 +461,6 @@ void brw_wm_pass0( struct brw_wm_compile *c ) translate_insn(c, inst); } break; - - default: translate_insn(c, inst); break; @@ -465,4 +471,3 @@ void brw_wm_pass0( struct brw_wm_compile *c ) brw_wm_print_program(c, "pass0"); } } - diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass1.c b/src/mesa/drivers/dri/i965/brw_wm_pass1.c index f6f3a38e9e..6eaed8a665 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_pass1.c +++ b/src/mesa/drivers/dri/i965/brw_wm_pass1.c @@ -58,7 +58,8 @@ static void unlink_ref(struct brw_wm_ref *ref) if (ref == value->lastuse) { value->lastuse = ref->prevuse; - } else { + } + else { struct brw_wm_ref *i = value->lastuse; while (i->prevuse != ref) i = i->prevuse; i->prevuse = ref->prevuse; @@ -75,8 +76,9 @@ static void track_arg(struct brw_wm_compile *c, for (i = 0; i < 4; i++) { struct brw_wm_ref *ref = inst->src[arg][i]; if (ref) { - if (readmask & (1<<i)) + if (readmask & (1<<i)) { ref->value->contributes_to_output = 1; + } else { unlink_ref(ref); inst->src[arg][i] = NULL; @@ -88,15 +90,21 @@ static void track_arg(struct brw_wm_compile *c, static GLuint get_texcoord_mask( GLuint tex_idx ) { switch (tex_idx) { - case TEXTURE_1D_INDEX: return WRITEMASK_X; - case TEXTURE_2D_INDEX: return WRITEMASK_XY; - case TEXTURE_3D_INDEX: return WRITEMASK_XYZ; - case TEXTURE_CUBE_INDEX: return WRITEMASK_XYZ; - case TEXTURE_RECT_INDEX: return WRITEMASK_XY; + case TEXTURE_1D_INDEX: + return WRITEMASK_X; + case TEXTURE_2D_INDEX: + return WRITEMASK_XY; + case TEXTURE_3D_INDEX: + return WRITEMASK_XYZ; + case TEXTURE_CUBE_INDEX: + return WRITEMASK_XYZ; + case TEXTURE_RECT_INDEX: + return WRITEMASK_XY; default: return 0; } } + /* Step two: Basically this is dead code elimination. * * Iterate backwards over instructions, noting which values @@ -273,6 +281,3 @@ void brw_wm_pass1( struct brw_wm_compile *c ) brw_wm_print_program(c, "pass1"); } } - - - diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass2.c b/src/mesa/drivers/dri/i965/brw_wm_pass2.c index 6fca9ad220..780edbc42e 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_pass2.c +++ b/src/mesa/drivers/dri/i965/brw_wm_pass2.c @@ -84,7 +84,7 @@ static void init_registers( struct brw_wm_compile *c ) for (j = 0; j < c->nr_creg; j++) prealloc_reg(c, &c->creg[j], i++); - for (j = 0; j < FRAG_ATTRIB_MAX; j++) + for (j = 0; j < FRAG_ATTRIB_MAX; j++) { if (inputs & (1<<j)) { /* index for vs output and ps input are not the same in shader varying */ @@ -96,6 +96,7 @@ static void init_registers( struct brw_wm_compile *c ) nr_interp_regs++; prealloc_reg(c, &c->payload.input_interp[index], i++); } + } assert(nr_interp_regs >= 1); @@ -120,7 +121,7 @@ static void update_register_usage(struct brw_wm_compile *c, /* Only search those which can change: */ if (grf->nextuse < thisinsn) { - struct brw_wm_ref *ref = grf->value->lastuse; + const struct brw_wm_ref *ref = grf->value->lastuse; /* Has last use of value been passed? */ @@ -148,7 +149,7 @@ static void spill_value(struct brw_wm_compile *c, /* Allocate a spill slot. Note that allocations start from 0x40 - * the first slot is reserved to mean "undef" in brw_wm_emit.c */ - if (!value->spill_slot) { + if (!value->spill_slot) { c->last_scratch += 0x40; value->spill_slot = c->last_scratch; } @@ -189,7 +190,7 @@ static GLuint search_contiguous_regs(struct brw_wm_compile *c, if (grf[i+j].nextuse < group_nextuse) group_nextuse = grf[i+j].nextuse; } - + if (group_nextuse > furthest) { furthest = group_nextuse; reg = i; @@ -197,7 +198,7 @@ static GLuint search_contiguous_regs(struct brw_wm_compile *c, } assert(furthest != thisinsn); - + /* Any non-empty regs will need to be spilled: */ for (j = 0; j < nr; j++) @@ -243,7 +244,7 @@ static void alloc_contiguous_dest(struct brw_wm_compile *c, static void load_args(struct brw_wm_compile *c, struct brw_wm_instruction *inst) -{ +{ GLuint thisinsn = inst - c->instruction; GLuint i,j; @@ -258,17 +259,17 @@ static void load_args(struct brw_wm_compile *c, * register allocation and mark the ref as requiring a fill. */ GLuint reg = search_contiguous_regs(c, 1, thisinsn); - + c->pass2_grf[reg].value = ref->value; c->pass2_grf[reg].nextuse = thisinsn; - + ref->value->resident = &c->pass2_grf[reg]; /* Note that a fill is required: */ ref->unspill_reg = reg*2; } - + /* Adjust the hw_reg to point at the value's current location: */ assert(ref->value == ref->value->resident->value); @@ -294,7 +295,7 @@ void brw_wm_pass2( struct brw_wm_compile *c ) for (insn = 0; insn < c->nr_insns; insn++) { struct brw_wm_instruction *inst = &c->instruction[insn]; - + /* Update registers' nextuse values: */ update_register_usage(c, insn); @@ -322,11 +323,11 @@ void brw_wm_pass2( struct brw_wm_compile *c ) break; } - if (TEST_DST_SPILLS && inst->opcode != WM_PIXELXY) + if (TEST_DST_SPILLS && inst->opcode != WM_PIXELXY) { for (i = 0; i < 4; i++) if (inst->dst[i]) spill_value(c, inst->dst[i]); - + } } if (INTEL_DEBUG & DEBUG_WM) { @@ -339,6 +340,3 @@ void brw_wm_pass2( struct brw_wm_compile *c ) brw_wm_print_program(c, "pass2/done"); } } - - - diff --git a/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c b/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c index f12ef47a7d..b6dac0d698 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c @@ -220,14 +220,15 @@ static void brw_wm_sampler_populate_key(struct brw_context *brw, struct wm_sampler_key *key) { + GLcontext *ctx = &brw->intel.ctx; int unit; memset(key, 0, sizeof(*key)); for (unit = 0; unit < BRW_MAX_TEX_UNIT; unit++) { - if (brw->attribs.Texture->Unit[unit]._ReallyEnabled) { + if (ctx->Texture.Unit[unit]._ReallyEnabled) { struct wm_sampler_entry *entry = &key->sampler[unit]; - struct gl_texture_unit *texUnit = &brw->attribs.Texture->Unit[unit]; + struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit]; struct gl_texture_object *texObj = texUnit->_Current; struct intel_texture_object *intelObj = intel_texture_object(texObj); struct gl_texture_image *firstImage = @@ -244,7 +245,7 @@ brw_wm_sampler_populate_key(struct brw_context *brw, entry->minfilter = texObj->MinFilter; entry->magfilter = texObj->MagFilter; entry->comparemode = texObj->CompareMode; - entry->comparefunc = texObj->CompareFunc; + entry->comparefunc = texObj->CompareFunc; dri_bo_unreference(brw->wm.sdc_bo[unit]); if (firstImage->_BaseFormat == GL_DEPTH_COMPONENT) { @@ -274,6 +275,7 @@ brw_wm_sampler_populate_key(struct brw_context *brw, */ static void upload_wm_samplers( struct brw_context *brw ) { + GLcontext *ctx = &brw->intel.ctx; struct wm_sampler_key key; int i; @@ -317,7 +319,7 @@ static void upload_wm_samplers( struct brw_context *brw ) /* Emit SDC relocations */ for (i = 0; i < BRW_MAX_TEX_UNIT; i++) { - if (!brw->attribs.Texture->Unit[i]._ReallyEnabled) + if (!ctx->Texture.Unit[i]._ReallyEnabled) continue; dri_bo_emit_reloc(brw->wm.sampler_bo, diff --git a/src/mesa/drivers/dri/i965/brw_wm_state.c b/src/mesa/drivers/dri/i965/brw_wm_state.c index fd461618bc..3c3b3473d6 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_state.c @@ -60,6 +60,7 @@ struct brw_wm_unit_key { static void wm_unit_populate_key(struct brw_context *brw, struct brw_wm_unit_key *key) { + GLcontext *ctx = &brw->intel.ctx; const struct gl_fragment_program *fp = brw->fragment_program; struct intel_context *intel = &brw->intel; @@ -88,14 +89,14 @@ wm_unit_populate_key(struct brw_context *brw, struct brw_wm_unit_key *key) /* BRW_NEW_CURBE_OFFSETS */ key->curbe_offset = brw->curbe.wm_start; - /* CACHE_NEW_SURFACE */ + /* BRW_NEW_NR_SURFACEs */ key->nr_surfaces = brw->wm.nr_surfaces; /* CACHE_NEW_SAMPLER */ key->sampler_count = brw->wm.sampler_count; /* _NEW_POLYGONSTIPPLE */ - key->polygon_stipple = brw->attribs.Polygon->StippleFlag; + key->polygon_stipple = ctx->Polygon.StippleFlag; /* BRW_NEW_FRAGMENT_PROGRAM */ key->uses_depth = (fp->Base.InputsRead & (1 << FRAG_ATTRIB_WPOS)) != 0; @@ -105,19 +106,19 @@ wm_unit_populate_key(struct brw_context *brw, struct brw_wm_unit_key *key) (fp->Base.OutputsWritten & (1 << FRAG_RESULT_DEPR)) != 0; /* _NEW_COLOR */ - key->uses_kill = fp->UsesKill || brw->attribs.Color->AlphaEnabled; + key->uses_kill = fp->UsesKill || ctx->Color.AlphaEnabled; key->is_glsl = brw_wm_is_glsl(fp); /* XXX: This needs a flag to indicate when it changes. */ key->stats_wm = intel->stats_wm; /* _NEW_LINE */ - key->line_stipple = brw->attribs.Line->StippleFlag; + key->line_stipple = ctx->Line.StippleFlag; /* _NEW_POLYGON */ - key->offset_enable = brw->attribs.Polygon->OffsetFill; - key->offset_units = brw->attribs.Polygon->OffsetUnits; - key->offset_factor = brw->attribs.Polygon->OffsetFactor; + key->offset_enable = ctx->Polygon.OffsetFill; + key->offset_units = ctx->Polygon.OffsetUnits; + key->offset_factor = ctx->Polygon.OffsetFactor; } static dri_bo * @@ -281,10 +282,9 @@ const struct brw_tracked_state brw_wm_unit = { .brw = (BRW_NEW_FRAGMENT_PROGRAM | BRW_NEW_CURBE_OFFSETS | - BRW_NEW_LOCK), + BRW_NEW_NR_SURFACES), - .cache = (CACHE_NEW_SURFACE | - CACHE_NEW_WM_PROG | + .cache = (CACHE_NEW_WM_PROG | CACHE_NEW_SAMPLER) }, .prepare = upload_wm_unit, diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 3790b50c97..d70f9c646c 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -192,21 +192,27 @@ brw_create_texture_surface( struct brw_context *brw, if (key->bo) surf.ss0.surface_format = translate_tex_format(key->format, key->depthmode); else { - switch(key->depth) { - case 32: surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM; break; - default: - case 24: surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8X8_UNORM; break; - case 16: surf.ss0.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM; break; - } + switch (key->depth) { + case 32: + surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM; + break; + default: + case 24: + surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8X8_UNORM; + break; + case 16: + surf.ss0.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM; + break; + } } /* This is ok for all textures with channel width 8bit or less: */ /* surf.ss0.data_return_format = BRW_SURFACERETURNFORMAT_S1; */ if (key->bo) - surf.ss1.base_addr = key->bo->offset; /* reloc */ + surf.ss1.base_addr = key->bo->offset; /* reloc */ else - surf.ss1.base_addr = key->offset; + surf.ss1.base_addr = key->offset; surf.ss2.mip_count = key->last_level - key->first_level; surf.ss2.width = key->width - 1; @@ -247,7 +253,7 @@ static void brw_update_texture_surface( GLcontext *ctx, GLuint unit ) { struct brw_context *brw = brw_context(ctx); - struct gl_texture_object *tObj = brw->attribs.Texture->Unit[unit]._Current; + struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current; struct intel_texture_object *intelObj = intel_texture_object(tObj); struct gl_texture_image *firstImage = tObj->Image[0][intelObj->firstLevel]; struct brw_wm_surface_key key; @@ -295,6 +301,7 @@ static void brw_update_region_surface(struct brw_context *brw, struct intel_region *region, unsigned int unit, GLboolean cached) { + GLcontext *ctx = &brw->intel.ctx; dri_bo *region_bo = NULL; struct { unsigned int surface_type; @@ -327,10 +334,10 @@ brw_update_region_surface(struct brw_context *brw, struct intel_region *region, key.height = 1; key.cpp = 4; } - memcpy(key.color_mask, brw->attribs.Color->ColorMask, + memcpy(key.color_mask, ctx->Color.ColorMask, sizeof(key.color_mask)); - key.color_blend = (!brw->attribs.Color->_LogicOpEnabled && - brw->attribs.Color->BlendEnabled); + key.color_blend = (!ctx->Color._LogicOpEnabled && + ctx->Color.BlendEnabled); dri_bo_unreference(brw->wm.surf_bo[unit]); brw->wm.surf_bo[unit] = NULL; @@ -438,6 +445,7 @@ static void prepare_wm_surfaces(struct brw_context *brw ) GLcontext *ctx = &brw->intel.ctx; struct intel_context *intel = &brw->intel; GLuint i; + int old_nr_surfaces; if (brw->state.nr_draw_regions > 1) { for (i = 0; i < brw->state.nr_draw_regions; i++) { @@ -448,10 +456,11 @@ static void prepare_wm_surfaces(struct brw_context *brw ) brw_update_region_surface(brw, brw->state.draw_regions[0], 0, GL_TRUE); } + old_nr_surfaces = brw->wm.nr_surfaces; brw->wm.nr_surfaces = MAX_DRAW_BUFFERS; for (i = 0; i < BRW_MAX_TEX_UNIT; i++) { - struct gl_texture_unit *texUnit = &brw->attribs.Texture->Unit[i]; + struct gl_texture_unit *texUnit = &ctx->Texture.Unit[i]; /* _NEW_TEXTURE, BRW_NEW_TEXDATA */ if(texUnit->_ReallyEnabled) { @@ -473,6 +482,9 @@ static void prepare_wm_surfaces(struct brw_context *brw ) dri_bo_unreference(brw->wm.bind_bo); brw->wm.bind_bo = brw_wm_get_binding_table(brw); + + if (brw->wm.nr_surfaces != old_nr_surfaces) + brw->state.dirty.brw |= BRW_NEW_NR_SURFACES; } diff --git a/src/mesa/drivers/dri/i965/intel_clear.c b/src/mesa/drivers/dri/i965/intel_clear.c new file mode 120000 index 0000000000..9a2a742a0d --- /dev/null +++ b/src/mesa/drivers/dri/i965/intel_clear.c @@ -0,0 +1 @@ +../intel/intel_clear.c
\ No newline at end of file diff --git a/src/mesa/drivers/dri/i965/intel_depthstencil.c b/src/mesa/drivers/dri/i965/intel_depthstencil.c deleted file mode 120000 index 4ac4ae690a..0000000000 --- a/src/mesa/drivers/dri/i965/intel_depthstencil.c +++ /dev/null @@ -1 +0,0 @@ -../intel/intel_depthstencil.c
\ No newline at end of file diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c new file mode 120000 index 0000000000..a2f3e8cd20 --- /dev/null +++ b/src/mesa/drivers/dri/i965/intel_extensions.c @@ -0,0 +1 @@ +../intel/intel_extensions.c
\ No newline at end of file diff --git a/src/mesa/drivers/dri/i965/intel_state.c b/src/mesa/drivers/dri/i965/intel_state.c index 67ef5f78c1..519672fc35 100644..120000 --- a/src/mesa/drivers/dri/i965/intel_state.c +++ b/src/mesa/drivers/dri/i965/intel_state.c @@ -1,225 +1 @@ -/************************************************************************** - * - * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE - * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ - - -#include "main/glheader.h" -#include "main/context.h" -#include "main/macros.h" -#include "main/enums.h" -#include "main/colormac.h" -#include "main/dd.h" - -#include "intel_screen.h" -#include "intel_context.h" -#include "intel_regions.h" -#include "swrast/swrast.h" - -int intel_translate_shadow_compare_func( GLenum func ) -{ - switch(func) { - case GL_NEVER: - return COMPAREFUNC_ALWAYS; - case GL_LESS: - return COMPAREFUNC_LEQUAL; - case GL_LEQUAL: - return COMPAREFUNC_LESS; - case GL_GREATER: - return COMPAREFUNC_GEQUAL; - case GL_GEQUAL: - return COMPAREFUNC_GREATER; - case GL_NOTEQUAL: - return COMPAREFUNC_EQUAL; - case GL_EQUAL: - return COMPAREFUNC_NOTEQUAL; - case GL_ALWAYS: - return COMPAREFUNC_NEVER; - } - - fprintf(stderr, "Unknown value in %s: %x\n", __FUNCTION__, func); - return COMPAREFUNC_NEVER; -} - -int intel_translate_compare_func( GLenum func ) -{ - switch(func) { - case GL_NEVER: - return COMPAREFUNC_NEVER; - case GL_LESS: - return COMPAREFUNC_LESS; - case GL_LEQUAL: - return COMPAREFUNC_LEQUAL; - case GL_GREATER: - return COMPAREFUNC_GREATER; - case GL_GEQUAL: - return COMPAREFUNC_GEQUAL; - case GL_NOTEQUAL: - return COMPAREFUNC_NOTEQUAL; - case GL_EQUAL: - return COMPAREFUNC_EQUAL; - case GL_ALWAYS: - return COMPAREFUNC_ALWAYS; - } - - fprintf(stderr, "Unknown value in %s: %x\n", __FUNCTION__, func); - return COMPAREFUNC_ALWAYS; -} - -int intel_translate_stencil_op( GLenum op ) -{ - switch(op) { - case GL_KEEP: - return STENCILOP_KEEP; - case GL_ZERO: - return STENCILOP_ZERO; - case GL_REPLACE: - return STENCILOP_REPLACE; - case GL_INCR: - return STENCILOP_INCRSAT; - case GL_DECR: - return STENCILOP_DECRSAT; - case GL_INCR_WRAP: - return STENCILOP_INCR; - case GL_DECR_WRAP: - return STENCILOP_DECR; - case GL_INVERT: - return STENCILOP_INVERT; - default: - return STENCILOP_ZERO; - } -} - -int intel_translate_blend_factor( GLenum factor ) -{ - switch(factor) { - case GL_ZERO: - return BLENDFACT_ZERO; - case GL_SRC_ALPHA: - return BLENDFACT_SRC_ALPHA; - case GL_ONE: - return BLENDFACT_ONE; - case GL_SRC_COLOR: - return BLENDFACT_SRC_COLR; - case GL_ONE_MINUS_SRC_COLOR: - return BLENDFACT_INV_SRC_COLR; - case GL_DST_COLOR: - return BLENDFACT_DST_COLR; - case GL_ONE_MINUS_DST_COLOR: - return BLENDFACT_INV_DST_COLR; - case GL_ONE_MINUS_SRC_ALPHA: - return BLENDFACT_INV_SRC_ALPHA; - case GL_DST_ALPHA: - return BLENDFACT_DST_ALPHA; - case GL_ONE_MINUS_DST_ALPHA: - return BLENDFACT_INV_DST_ALPHA; - case GL_SRC_ALPHA_SATURATE: - return BLENDFACT_SRC_ALPHA_SATURATE; - case GL_CONSTANT_COLOR: - return BLENDFACT_CONST_COLOR; - case GL_ONE_MINUS_CONSTANT_COLOR: - return BLENDFACT_INV_CONST_COLOR; - case GL_CONSTANT_ALPHA: - return BLENDFACT_CONST_ALPHA; - case GL_ONE_MINUS_CONSTANT_ALPHA: - return BLENDFACT_INV_CONST_ALPHA; - } - - fprintf(stderr, "Unknown value in %s: %x\n", __FUNCTION__, factor); - return BLENDFACT_ZERO; -} - -int intel_translate_logic_op( GLenum opcode ) -{ - switch(opcode) { - case GL_CLEAR: - return LOGICOP_CLEAR; - case GL_AND: - return LOGICOP_AND; - case GL_AND_REVERSE: - return LOGICOP_AND_RVRSE; - case GL_COPY: - return LOGICOP_COPY; - case GL_COPY_INVERTED: - return LOGICOP_COPY_INV; - case GL_AND_INVERTED: - return LOGICOP_AND_INV; - case GL_NOOP: - return LOGICOP_NOOP; - case GL_XOR: - return LOGICOP_XOR; - case GL_OR: - return LOGICOP_OR; - case GL_OR_INVERTED: - return LOGICOP_OR_INV; - case GL_NOR: - return LOGICOP_NOR; - case GL_EQUIV: - return LOGICOP_EQUIV; - case GL_INVERT: - return LOGICOP_INV; - case GL_OR_REVERSE: - return LOGICOP_OR_RVRSE; - case GL_NAND: - return LOGICOP_NAND; - case GL_SET: - return LOGICOP_SET; - default: - return LOGICOP_SET; - } -} - - -static void intelClearColor(GLcontext *ctx, const GLfloat color[4]) -{ - struct intel_context *intel = intel_context(ctx); - - UNCLAMPED_FLOAT_TO_RGBA_CHAN(intel->clear_chan, color); - - intel->ClearColor8888 = INTEL_PACKCOLOR8888(intel->clear_chan[0], - intel->clear_chan[1], - intel->clear_chan[2], - intel->clear_chan[3]); - intel->ClearColor565 = INTEL_PACKCOLOR565(intel->clear_chan[0], - intel->clear_chan[1], - intel->clear_chan[2]); -} - - - -/* Fallback to swrast for select and feedback. - */ -static void intelRenderMode( GLcontext *ctx, GLenum mode ) -{ - struct intel_context *intel = intel_context(ctx); - FALLBACK( intel, INTEL_FALLBACK_RENDERMODE, (mode != GL_RENDER) ); -} - - -void intelInitStateFuncs( struct dd_function_table *functions ) -{ - functions->RenderMode = intelRenderMode; - functions->ClearColor = intelClearColor; -} +../intel/intel_state.c
\ No newline at end of file diff --git a/src/mesa/drivers/dri/i965/intel_swapbuffers.c b/src/mesa/drivers/dri/i965/intel_swapbuffers.c new file mode 120000 index 0000000000..148d5215aa --- /dev/null +++ b/src/mesa/drivers/dri/i965/intel_swapbuffers.c @@ -0,0 +1 @@ +../intel/intel_swapbuffers.c
\ No newline at end of file |