diff options
Diffstat (limited to 'src/mesa/drivers/dri/i965')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.c | 3 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_program.c | 6 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_sf.c | 11 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_sf_state.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_fp.c | 52 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_glsl.c | 18 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_sampler_state.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 22 |
8 files changed, 42 insertions, 74 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index a415e378ff..d7a2bd95ee 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -143,6 +143,9 @@ GLboolean brwCreateContext( const __GLcontextModes *mesaVis, ctx->Const.MaxCubeTextureLevels = 12; ctx->Const.MaxTextureRectSize = (1<<11); + /* if conformance mode is set, swrast can handle any size AA point */ + ctx->Const.MaxPointSizeAA = 255.0; + /* ctx->Const.MaxNativeVertexProgramTemps = 32; */ brw_init_attribs( brw ); diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c index a18dee85e8..0c86911044 100644 --- a/src/mesa/drivers/dri/i965/brw_program.c +++ b/src/mesa/drivers/dri/i965/brw_program.c @@ -111,9 +111,15 @@ static void brwProgramStringNotify( GLcontext *ctx, struct gl_program *prog ) { if (target == GL_FRAGMENT_PROGRAM_ARB) { + struct gl_fragment_program *fprog = (struct gl_fragment_program *) prog; struct brw_context *brw = brw_context(ctx); struct brw_fragment_program *p = (struct brw_fragment_program *)prog; struct brw_fragment_program *fp = (struct brw_fragment_program *)brw->fragment_program; + if (fprog->FogOption) { + _mesa_append_fog_code(ctx, fprog); + fprog->FogOption = GL_NONE; + } + if (p == fp) brw->state.dirty.brw |= BRW_NEW_FRAGMENT_PROGRAM; p->id = brw->program_id++; diff --git a/src/mesa/drivers/dri/i965/brw_sf.c b/src/mesa/drivers/dri/i965/brw_sf.c index 9dce6cd8e6..1a11d54621 100644 --- a/src/mesa/drivers/dri/i965/brw_sf.c +++ b/src/mesa/drivers/dri/i965/brw_sf.c @@ -73,10 +73,12 @@ static void compile_sf_prog( struct brw_context *brw, c.attr_to_idx[i] = idx; c.idx_to_attr[idx] = i; if (i >= VERT_RESULT_TEX0 && i <= VERT_RESULT_TEX7) { - c.point_attrs[i].CoordReplace = - brw->attribs.Point->CoordReplace[i - VERT_RESULT_TEX0]; - } else - c.point_attrs[i].CoordReplace = GL_FALSE; + c.point_attrs[i].CoordReplace = + brw->attribs.Point->CoordReplace[i - VERT_RESULT_TEX0]; + } + else { + c.point_attrs[i].CoordReplace = GL_FALSE; + } idx++; } @@ -106,7 +108,6 @@ static void compile_sf_prog( struct brw_context *brw, assert(0); return; } - /* get the program */ diff --git a/src/mesa/drivers/dri/i965/brw_sf_state.c b/src/mesa/drivers/dri/i965/brw_sf_state.c index 506126fcfb..741a7c53c4 100644 --- a/src/mesa/drivers/dri/i965/brw_sf_state.c +++ b/src/mesa/drivers/dri/i965/brw_sf_state.c @@ -229,7 +229,7 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key, /* XXX clamp max depends on AA vs. non-AA */ sf.sf7.sprite_point = key->point_sprite; - sf.sf7.point_size = CLAMP(nearbyint(key->point_size), 1, 255) * (1<<3); + sf.sf7.point_size = CLAMP(rint(key->point_size), 1, 255) * (1<<3); sf.sf7.use_point_size_state = !key->point_attenuated; sf.sf7.aa_line_distance_mode = 0; diff --git a/src/mesa/drivers/dri/i965/brw_wm_fp.c b/src/mesa/drivers/dri/i965/brw_wm_fp.c index f4583877aa..1a00b69825 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_fp.c +++ b/src/mesa/drivers/dri/i965/brw_wm_fp.c @@ -811,57 +811,6 @@ static void precalc_txp( struct brw_wm_compile *c, - - -/*********************************************************************** - * Add instructions to perform fog blending - */ - -static void fog_blend( struct brw_wm_compile *c, - struct prog_src_register fog_factor ) -{ - struct prog_dst_register outcolor = dst_reg(PROGRAM_OUTPUT, FRAG_RESULT_COLR); - struct prog_src_register fogcolor = search_or_add_param5( c, STATE_FOG_COLOR, 0,0,0,0 ); - - /* color.xyz = LRP fog_factor.xxxx, output_color, fog_color */ - - emit_op(c, - OPCODE_LRP, - dst_mask(outcolor, WRITEMASK_XYZ), - 0, 0, 0, - fog_factor, - src_reg_from_dst(outcolor), - fogcolor); -} - - - -/* This one is simple - just take the interpolated fog coordinate and - * use it as the fog blend factor. - */ -static void fog_interpolated( struct brw_wm_compile *c ) -{ - struct prog_src_register fogc = src_reg(PROGRAM_INPUT, FRAG_ATTRIB_FOGC); - - if (!(c->fp_interp_emitted & (1<<FRAG_ATTRIB_FOGC))) - emit_interp(c, FRAG_ATTRIB_FOGC); - - fog_blend( c, src_swizzle1(fogc, GET_SWZ(fogc.Swizzle,X))); -} - -static void emit_fog( struct brw_wm_compile *c ) -{ - if (!c->fp->program.FogOption) - return; - - if (1) - fog_interpolated( c ); - else { - /* TODO: per-pixel fog */ - assert(0); - } -} - static void emit_fb_write( struct brw_wm_compile *c ) { struct prog_src_register payload_r0_depth = src_reg(PROGRAM_PAYLOAD, PAYLOAD_DEPTH); @@ -1059,7 +1008,6 @@ void brw_wm_pass_fp( struct brw_wm_compile *c ) emit_ddy(c, inst); break; case OPCODE_END: - emit_fog(c); emit_fb_write(c); break; case OPCODE_PRINT: diff --git a/src/mesa/drivers/dri/i965/brw_wm_glsl.c b/src/mesa/drivers/dri/i965/brw_wm_glsl.c index 942ebe1ed4..8fd776ac39 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_glsl.c +++ b/src/mesa/drivers/dri/i965/brw_wm_glsl.c @@ -892,15 +892,19 @@ static void emit_lrp(struct brw_wm_compile *c, } } +/** + * For GLSL shaders, this KIL will be unconditional. + * It may be contained inside an IF/ENDIF structure of course. + */ static void emit_kil(struct brw_wm_compile *c) { - struct brw_compile *p = &c->func; - struct brw_reg depth = retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UW); - brw_push_insn_state(p); - brw_set_mask_control(p, BRW_MASK_DISABLE); - brw_NOT(p, c->emit_mask_reg, brw_mask_reg(1)); //IMASK - brw_AND(p, depth, c->emit_mask_reg, depth); - brw_pop_insn_state(p); + struct brw_compile *p = &c->func; + struct brw_reg depth = retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UW); + brw_push_insn_state(p); + brw_set_mask_control(p, BRW_MASK_DISABLE); + brw_NOT(p, c->emit_mask_reg, brw_mask_reg(1)); //IMASK + brw_AND(p, depth, c->emit_mask_reg, depth); + brw_pop_insn_state(p); } static void emit_mad(struct brw_wm_compile *c, diff --git a/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c b/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c index f12ef47a7d..8c9cb78945 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c @@ -244,7 +244,7 @@ brw_wm_sampler_populate_key(struct brw_context *brw, entry->minfilter = texObj->MinFilter; entry->magfilter = texObj->MagFilter; entry->comparemode = texObj->CompareMode; - entry->comparefunc = texObj->CompareFunc; + entry->comparefunc = texObj->CompareFunc; dri_bo_unreference(brw->wm.sdc_bo[unit]); if (firstImage->_BaseFormat == GL_DEPTH_COMPONENT) { diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 63e14cc390..06e71e6d69 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -192,21 +192,27 @@ brw_create_texture_surface( struct brw_context *brw, if (key->bo) surf.ss0.surface_format = translate_tex_format(key->format, key->depthmode); else { - switch(key->depth) { - case 32: surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM; break; - default: - case 24: surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8X8_UNORM; break; - case 16: surf.ss0.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM; break; - } + switch (key->depth) { + case 32: + surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM; + break; + default: + case 24: + surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8X8_UNORM; + break; + case 16: + surf.ss0.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM; + break; + } } /* This is ok for all textures with channel width 8bit or less: */ /* surf.ss0.data_return_format = BRW_SURFACERETURNFORMAT_S1; */ if (key->bo) - surf.ss1.base_addr = key->bo->offset; /* reloc */ + surf.ss1.base_addr = key->bo->offset; /* reloc */ else - surf.ss1.base_addr = key->offset; + surf.ss1.base_addr = key->offset; surf.ss2.mip_count = key->last_level - key->first_level; surf.ss2.width = key->width - 1; |