diff options
Diffstat (limited to 'src/mesa/drivers/dri/i965')
24 files changed, 49 insertions, 54 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_cc.c b/src/mesa/drivers/dri/i965/brw_cc.c index 00418760da..a8369b07c3 100644 --- a/src/mesa/drivers/dri/i965/brw_cc.c +++ b/src/mesa/drivers/dri/i965/brw_cc.c @@ -204,7 +204,7 @@ static void upload_cc_unit(struct brw_context *brw) cc.cc2.depth_write_enable = ctx->Depth.Mask; } - if (intel->stats_wm || (INTEL_DEBUG & DEBUG_STATS)) + if (intel->stats_wm || unlikely(INTEL_DEBUG & DEBUG_STATS)) cc.cc5.statistics_enable = 1; /* CACHE_NEW_CC_VP */ diff --git a/src/mesa/drivers/dri/i965/brw_clip.c b/src/mesa/drivers/dri/i965/brw_clip.c index 15e60bf3ce..1be165cc9a 100644 --- a/src/mesa/drivers/dri/i965/brw_clip.c +++ b/src/mesa/drivers/dri/i965/brw_clip.c @@ -133,13 +133,13 @@ static void compile_clip_prog( struct brw_context *brw, */ program = brw_get_program(&c.func, &program_size); - if (INTEL_DEBUG & DEBUG_CLIP) { + if (unlikely(INTEL_DEBUG & DEBUG_CLIP)) { printf("clip:\n"); for (i = 0; i < program_size / sizeof(struct brw_instruction); i++) brw_disasm(stdout, &((struct brw_instruction *)program)[i], intel->gen); printf("\n"); - } + } /* Upload */ diff --git a/src/mesa/drivers/dri/i965/brw_clip_state.c b/src/mesa/drivers/dri/i965/brw_clip_state.c index 885167da90..60fd5fa7d9 100644 --- a/src/mesa/drivers/dri/i965/brw_clip_state.c +++ b/src/mesa/drivers/dri/i965/brw_clip_state.c @@ -114,10 +114,10 @@ clip_unit_create_from_key(struct brw_context *brw, clip.thread4.max_threads = 1 - 1; } - if (INTEL_DEBUG & DEBUG_SINGLE_THREAD) + if (unlikely(INTEL_DEBUG & DEBUG_SINGLE_THREAD)) clip.thread4.max_threads = 0; - if (INTEL_DEBUG & DEBUG_STATS) + if (unlikely(INTEL_DEBUG & DEBUG_STATS)) clip.thread4.stats_enable = 1; clip.clip5.userclip_enable_flags = 0x7f; diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index 04bc8cb2db..a1f403ca4e 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b/src/mesa/drivers/dri/i965/brw_draw.c @@ -42,7 +42,7 @@ #include "intel_batchbuffer.h" -#define FILE_DEBUG_FLAG DEBUG_BATCH +#define FILE_DEBUG_FLAG DEBUG_PRIMS static GLuint prim_to_hw_prim[GL_POLYGON+1] = { _3DPRIM_POINTLIST, @@ -83,8 +83,7 @@ static GLuint brw_set_prim(struct brw_context *brw, struct gl_context *ctx = &brw->intel.ctx; GLenum mode = prim->mode; - if (INTEL_DEBUG & DEBUG_PRIMS) - printf("PRIM: %s\n", _mesa_lookup_enum_by_nr(prim->mode)); + DBG("PRIM: %s\n", _mesa_lookup_enum_by_nr(prim->mode)); /* Slight optimization to avoid the GS program when not needed: */ @@ -133,9 +132,8 @@ static void brw_emit_prim(struct brw_context *brw, struct brw_3d_primitive prim_packet; struct intel_context *intel = &brw->intel; - if (INTEL_DEBUG & DEBUG_PRIMS) - printf("PRIM: %s %d %d\n", _mesa_lookup_enum_by_nr(prim->mode), - prim->start, prim->count); + DBG("PRIM: %s %d %d\n", _mesa_lookup_enum_by_nr(prim->mode), + prim->start, prim->count); prim_packet.header.opcode = CMD_3D_PRIM; prim_packet.header.length = sizeof(prim_packet)/4 - 2; diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c index c4654360d4..2cefe614dd 100644 --- a/src/mesa/drivers/dri/i965/brw_draw_upload.c +++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c @@ -168,7 +168,7 @@ static GLuint byte_types_scale[5] = { static GLuint get_surface_type( GLenum type, GLuint size, GLenum format, GLboolean normalized ) { - if (INTEL_DEBUG & DEBUG_VERTS) + if (unlikely(INTEL_DEBUG & DEBUG_VERTS)) printf("type %s size %d normalized %d\n", _mesa_lookup_enum_by_nr(type), size, normalized); diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 2ed59d3f5d..3caddae4a1 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -3129,7 +3129,7 @@ fs_visitor::generate_code() const char *last_annotation_string = NULL; ir_instruction *last_annotation_ir = NULL; - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { printf("Native code for fragment shader %d:\n", ctx->Shader.CurrentFragmentProgram->Name); } @@ -3141,7 +3141,7 @@ fs_visitor::generate_code() fs_inst *inst = (fs_inst *)iter.get(); struct brw_reg src[3], dst; - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { if (last_annotation_ir != inst->ir) { last_annotation_ir = inst->ir; if (last_annotation_ir) { @@ -3335,7 +3335,7 @@ fs_visitor::generate_code() this->fail = true; } - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { for (unsigned int i = last_native_inst; i < p->nr_insn; i++) { if (0) { printf("0x%08x 0x%08x 0x%08x 0x%08x ", @@ -3376,7 +3376,7 @@ brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c) */ c->dispatch_width = 8; - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { printf("GLSL IR for native fragment shader %d:\n", prog->Name); _mesa_print_ir(shader->ir, NULL); printf("\n"); diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c index cfcc8ea4d6..b0c76f4094 100644 --- a/src/mesa/drivers/dri/i965/brw_gs.c +++ b/src/mesa/drivers/dri/i965/brw_gs.c @@ -127,8 +127,8 @@ static void compile_gs_prog( struct brw_context *brw, */ program = brw_get_program(&c.func, &program_size); - if (INTEL_DEBUG & DEBUG_GS) { - int i; + if (unlikely(INTEL_DEBUG & DEBUG_GS)) { + int i; printf("gs:\n"); for (i = 0; i < program_size / sizeof(struct brw_instruction); i++) diff --git a/src/mesa/drivers/dri/i965/brw_gs_state.c b/src/mesa/drivers/dri/i965/brw_gs_state.c index 63562ebcfc..69a5f7a666 100644 --- a/src/mesa/drivers/dri/i965/brw_gs_state.c +++ b/src/mesa/drivers/dri/i965/brw_gs_state.c @@ -101,7 +101,7 @@ gs_unit_create_from_key(struct brw_context *brw, struct brw_gs_unit_key *key) if (intel->gen == 5) gs.thread4.rendering_enable = 1; - if (INTEL_DEBUG & DEBUG_STATS) + if (unlikely(INTEL_DEBUG & DEBUG_STATS)) gs.thread4.stats_enable = 1; bo = brw_upload_cache(&brw->cache, BRW_GS_UNIT, diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index 24041e57b0..1d350bc041 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -555,7 +555,7 @@ static void upload_invarient_state( struct brw_context *brw ) memset(&vfs, 0, sizeof(vfs)); vfs.opcode = brw->CMD_VF_STATISTICS; - if (INTEL_DEBUG & DEBUG_STATS) + if (unlikely(INTEL_DEBUG & DEBUG_STATS)) vfs.statistics_enable = 1; BRW_BATCH_STRUCT(brw, &vfs); diff --git a/src/mesa/drivers/dri/i965/brw_sf.c b/src/mesa/drivers/dri/i965/brw_sf.c index 7dbd70daae..6da155b1a9 100644 --- a/src/mesa/drivers/dri/i965/brw_sf.c +++ b/src/mesa/drivers/dri/i965/brw_sf.c @@ -108,7 +108,7 @@ static void compile_sf_prog( struct brw_context *brw, */ program = brw_get_program(&c.func, &program_size); - if (INTEL_DEBUG & DEBUG_SF) { + if (unlikely(INTEL_DEBUG & DEBUG_SF)) { printf("sf:\n"); for (i = 0; i < program_size / sizeof(struct brw_instruction); i++) brw_disasm(stdout, &((struct brw_instruction *)program)[i], diff --git a/src/mesa/drivers/dri/i965/brw_sf_state.c b/src/mesa/drivers/dri/i965/brw_sf_state.c index 6ad9e1b48a..bd3a21ed9e 100644 --- a/src/mesa/drivers/dri/i965/brw_sf_state.c +++ b/src/mesa/drivers/dri/i965/brw_sf_state.c @@ -210,10 +210,10 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key, sf.thread4.max_threads = MIN2(chipset_max_threads, key->nr_urb_entries) - 1; - if (INTEL_DEBUG & DEBUG_SINGLE_THREAD) + if (unlikely(INTEL_DEBUG & DEBUG_SINGLE_THREAD)) sf.thread4.max_threads = 0; - if (INTEL_DEBUG & DEBUG_STATS) + if (unlikely(INTEL_DEBUG & DEBUG_STATS)) sf.thread4.stats_enable = 1; /* CACHE_NEW_SF_VP */ diff --git a/src/mesa/drivers/dri/i965/brw_state_cache.c b/src/mesa/drivers/dri/i965/brw_state_cache.c index b31d84953a..58ff528d44 100644 --- a/src/mesa/drivers/dri/i965/brw_state_cache.c +++ b/src/mesa/drivers/dri/i965/brw_state_cache.c @@ -61,6 +61,7 @@ #include "intel_batchbuffer.h" #include "brw_wm.h" +#define FILE_DEBUG_FLAG DEBUG_STATE static GLuint hash_key(struct brw_cache_item *item) @@ -265,10 +266,9 @@ brw_upload_cache_with_auxdata(struct brw_cache *cache, *(void **)aux_return = (void *)((char *)item->key + item->key_size); } - if (INTEL_DEBUG & DEBUG_STATE) - printf("upload %s: %d bytes to cache id %d\n", - cache->name[cache_id], - data_size, cache_id); + DBG("upload %s: %d bytes to cache id %d\n", + cache->name[cache_id], + data_size, cache_id); /* Copy data to the buffer */ drm_intel_bo_subdata(bo, 0, data_size, data); @@ -407,8 +407,7 @@ brw_clear_cache(struct brw_context *brw, struct brw_cache *cache) struct brw_cache_item *c, *next; GLuint i; - if (INTEL_DEBUG & DEBUG_STATE) - printf("%s\n", __FUNCTION__); + DBG("%s\n", __FUNCTION__); for (i = 0; i < cache->size; i++) { for (c = cache->items[i]; c; c = next) { @@ -434,8 +433,7 @@ brw_clear_cache(struct brw_context *brw, struct brw_cache *cache) void brw_state_cache_check_size(struct brw_context *brw) { - if (INTEL_DEBUG & DEBUG_STATE) - printf("%s (n_items=%d)\n", __FUNCTION__, brw->cache.n_items); + DBG("%s (n_items=%d)\n", __FUNCTION__, brw->cache.n_items); /* un-tuned guess. Each object is generally a page, so 1000 of them is 4 MB of * state cache. @@ -450,8 +448,7 @@ brw_destroy_cache(struct brw_context *brw, struct brw_cache *cache) { GLuint i; - if (INTEL_DEBUG & DEBUG_STATE) - printf("%s\n", __FUNCTION__); + DBG("%s\n", __FUNCTION__); brw_clear_cache(brw, cache); for (i = 0; i < BRW_MAX_CACHE; i++) { diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index f3b6a90f61..338f3876b3 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -435,7 +435,7 @@ void brw_upload_state(struct brw_context *brw) brw_clear_validated_bos(brw); - if (INTEL_DEBUG) { + if (unlikely(INTEL_DEBUG)) { /* Debug version which enforces various sanity checks on the * state flags which are generated and checked to help ensure * state atoms are ordered correctly in the list. @@ -487,7 +487,7 @@ void brw_upload_state(struct brw_context *brw) } } - if (INTEL_DEBUG & DEBUG_STATE) { + if (unlikely(INTEL_DEBUG & DEBUG_STATE)) { brw_update_dirty_count(mesa_bits, state->mesa); brw_update_dirty_count(brw_bits, state->brw); brw_update_dirty_count(cache_bits, state->cache); diff --git a/src/mesa/drivers/dri/i965/brw_urb.c b/src/mesa/drivers/dri/i965/brw_urb.c index 0f597184b4..dfc1551aca 100644 --- a/src/mesa/drivers/dri/i965/brw_urb.c +++ b/src/mesa/drivers/dri/i965/brw_urb.c @@ -190,12 +190,12 @@ static void recalculate_urb_fence( struct brw_context *brw ) exit(1); } - if (INTEL_DEBUG & (DEBUG_URB|DEBUG_FALLBACKS)) + if (unlikely(INTEL_DEBUG & (DEBUG_URB|DEBUG_FALLBACKS))) printf("URB CONSTRAINED\n"); } done: - if (INTEL_DEBUG & DEBUG_URB) + if (unlikely(INTEL_DEBUG & DEBUG_URB)) printf("URB fence: %d ..VS.. %d ..GS.. %d ..CLP.. %d ..SF.. %d ..CS.. %d\n", brw->urb.vs_start, brw->urb.gs_start, diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c index e560cdac1f..aa8048c9fc 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_emit.c +++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c @@ -394,7 +394,7 @@ static void brw_vs_alloc_regs( struct brw_vs_compile *c ) c->prog_data.total_grf = reg; - if (INTEL_DEBUG & DEBUG_VS) { + if (unlikely(INTEL_DEBUG & DEBUG_VS)) { printf("%s NumAddrRegs %d\n", __FUNCTION__, c->vp->program.Base.NumAddressRegs); printf("%s NumTemps %d\n", __FUNCTION__, c->vp->program.Base.NumTemporaries); printf("%s reg = %d\n", __FUNCTION__, reg); @@ -1678,7 +1678,7 @@ void brw_vs_emit(struct brw_vs_compile *c ) GLuint index; GLuint file; - if (INTEL_DEBUG & DEBUG_VS) { + if (unlikely(INTEL_DEBUG & DEBUG_VS)) { printf("vs-mesa:\n"); _mesa_fprint_program_opt(stdout, &c->vp->program.Base, PROG_PRINT_DEBUG, GL_TRUE); @@ -2048,7 +2048,7 @@ void brw_vs_emit(struct brw_vs_compile *c ) brw_optimize(p); - if (INTEL_DEBUG & DEBUG_VS) { + if (unlikely(INTEL_DEBUG & DEBUG_VS)) { int i; printf("vs-native:\n"); diff --git a/src/mesa/drivers/dri/i965/brw_vs_state.c b/src/mesa/drivers/dri/i965/brw_vs_state.c index ebae94269f..be92313861 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_state.c +++ b/src/mesa/drivers/dri/i965/brw_vs_state.c @@ -154,7 +154,7 @@ vs_unit_create_from_key(struct brw_context *brw, struct brw_vs_unit_key *key) */ vs.vs5.sampler_count = 0; - if (INTEL_DEBUG & DEBUG_STATS) + if (unlikely(INTEL_DEBUG & DEBUG_STATS)) vs.thread4.stats_enable = 1; /* Vertex program always enabled: diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c index 7f3ba5f058..a6d2a2377f 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.c +++ b/src/mesa/drivers/dri/i965/brw_wm.c @@ -198,7 +198,7 @@ static void do_wm_prog( struct brw_context *brw, c->prog_data.total_scratch = 0; } - if (INTEL_DEBUG & DEBUG_WM) + if (unlikely(INTEL_DEBUG & DEBUG_WM)) fprintf(stderr, "\n"); /* get the program diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c index d06c49fd5b..272476219a 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_emit.c +++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c @@ -1920,7 +1920,7 @@ void brw_wm_emit( struct brw_wm_compile *c ) brw_remove_grf_to_mrf_moves(p); } - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { int i; printf("wm-native:\n"); diff --git a/src/mesa/drivers/dri/i965/brw_wm_fp.c b/src/mesa/drivers/dri/i965/brw_wm_fp.c index 15a238cda6..938fb80857 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_fp.c +++ b/src/mesa/drivers/dri/i965/brw_wm_fp.c @@ -1058,7 +1058,7 @@ void brw_wm_pass_fp( struct brw_wm_compile *c ) struct brw_fragment_program *fp = c->fp; GLuint insn; - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { printf("pre-fp:\n"); _mesa_fprint_program_opt(stdout, &fp->program.Base, PROG_PRINT_DEBUG, GL_TRUE); @@ -1174,7 +1174,7 @@ void brw_wm_pass_fp( struct brw_wm_compile *c ) } } - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { printf("pass_fp:\n"); print_insns( c->prog_instructions, c->nr_fp_insns ); printf("\n"); diff --git a/src/mesa/drivers/dri/i965/brw_wm_glsl.c b/src/mesa/drivers/dri/i965/brw_wm_glsl.c index d325f85ce0..7fe8ab1f33 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_glsl.c +++ b/src/mesa/drivers/dri/i965/brw_wm_glsl.c @@ -19,7 +19,7 @@ GLboolean brw_wm_is_glsl(const struct gl_fragment_program *fp) { int i; - if (INTEL_DEBUG & DEBUG_GLSL_FORCE) + if (unlikely(INTEL_DEBUG & DEBUG_GLSL_FORCE)) return GL_TRUE; for (i = 0; i < fp->Base.NumInstructions; i++) { @@ -1002,7 +1002,7 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c) } post_wm_emit(c); - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { printf("wm-native:\n"); for (i = 0; i < p->nr_insn; i++) brw_disasm(stdout, &p->store[i], intel->gen); @@ -1016,7 +1016,7 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c) */ void brw_wm_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c) { - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { printf("brw_wm_glsl_emit:\n"); } @@ -1026,7 +1026,7 @@ void brw_wm_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c) /* actual code generation */ brw_wm_emit_glsl(brw, c); - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { brw_wm_print_program(c, "brw_wm_glsl_emit done"); } diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass0.c b/src/mesa/drivers/dri/i965/brw_wm_pass0.c index d6aa9f957a..83152526b3 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_pass0.c +++ b/src/mesa/drivers/dri/i965/brw_wm_pass0.c @@ -440,7 +440,7 @@ void brw_wm_pass0( struct brw_wm_compile *c ) } } - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { brw_wm_print_program(c, "pass0"); } } diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass1.c b/src/mesa/drivers/dri/i965/brw_wm_pass1.c index 962515a99e..3a2874b6dd 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_pass1.c +++ b/src/mesa/drivers/dri/i965/brw_wm_pass1.c @@ -291,7 +291,7 @@ void brw_wm_pass1( struct brw_wm_compile *c ) track_arg(c, inst, 2, read2); } - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { brw_wm_print_program(c, "pass1"); } } diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass2.c b/src/mesa/drivers/dri/i965/brw_wm_pass2.c index 54acb3038b..44e3953814 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_pass2.c +++ b/src/mesa/drivers/dri/i965/brw_wm_pass2.c @@ -331,13 +331,13 @@ void brw_wm_pass2( struct brw_wm_compile *c ) } } - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { brw_wm_print_program(c, "pass2"); } c->state = PASS2_DONE; - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { brw_wm_print_program(c, "pass2/done"); } } diff --git a/src/mesa/drivers/dri/i965/brw_wm_state.c b/src/mesa/drivers/dri/i965/brw_wm_state.c index 9a27b93710..76de7b7b6f 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_state.c @@ -249,7 +249,7 @@ wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key, wm.wm5.line_stipple = key->line_stipple; - if (INTEL_DEBUG & DEBUG_STATS || key->stats_wm) + if (unlikely(INTEL_DEBUG & DEBUG_STATS) || key->stats_wm) wm.wm4.stats_enable = 1; bo = brw_upload_cache(&brw->cache, BRW_WM_UNIT, |