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Diffstat (limited to 'src/mesa/drivers/dri/intel/intel_context.c')
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.c26
1 files changed, 22 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index d7ccfa0605..888bb3f18f 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -123,6 +123,10 @@ intelGetString(GLcontext * ctx, GLenum name)
case PCI_CHIP_Q33_G:
chipset = "Intel(R) Q33";
break;
+ case PCI_CHIP_IGD_GM:
+ case PCI_CHIP_IGD_G:
+ chipset = "Intel(R) IGD";
+ break;
case PCI_CHIP_I965_Q:
chipset = "Intel(R) 965Q";
break;
@@ -502,10 +506,16 @@ intelInitContext(struct intel_context *intel,
* start.
*/
if (getenv("INTEL_STRICT_CONFORMANCE")) {
- intel->strict_conformance = 1;
+ unsigned int value = atoi(getenv("INTEL_STRICT_CONFORMANCE"));
+ if (value > 0) {
+ intel->conformance_mode = value;
+ }
+ else {
+ intel->conformance_mode = 1;
+ }
}
- if (intel->strict_conformance) {
+ if (intel->conformance_mode > 0) {
ctx->Const.MinLineWidth = 1.0;
ctx->Const.MinLineWidthAA = 1.0;
ctx->Const.MaxLineWidth = 1.0;
@@ -573,8 +583,6 @@ intelInitContext(struct intel_context *intel,
intel->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
- _math_matrix_ctr(&intel->ViewportMatrix);
-
if (IS_965(intelScreen->deviceID) && !intel->intelScreen->irq_active) {
_mesa_printf("IRQs not active. Exiting\n");
exit(1);
@@ -610,6 +618,16 @@ intelInitContext(struct intel_context *intel,
intel->no_rast = 1;
}
+ if (driQueryOptionb(&intel->optionCache, "always_flush_batch")) {
+ fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
+ intel->always_flush_batch = 1;
+ }
+
+ if (driQueryOptionb(&intel->optionCache, "always_flush_cache")) {
+ fprintf(stderr, "flushing GPU caches before/after each draw call\n");
+ intel->always_flush_cache = 1;
+ }
+
/* Disable all hardware rendering (skip emitting batches and fences/waits
* to the kernel)
*/