diff options
Diffstat (limited to 'src/mesa/drivers/dri/intel')
25 files changed, 404 insertions, 270 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_batchbuffer.c b/src/mesa/drivers/dri/intel/intel_batchbuffer.c index 9d9937289a..29dc05c518 100644 --- a/src/mesa/drivers/dri/intel/intel_batchbuffer.c +++ b/src/mesa/drivers/dri/intel/intel_batchbuffer.c @@ -207,7 +207,7 @@ _intel_batchbuffer_flush(struct intel_batchbuffer *batch, const char *file, used); /* Emit a flush if the bufmgr doesn't do it for us. */ - if (!intel->ttm) { + if (intel->always_flush_cache || !intel->ttm) { *(GLuint *) (batch->ptr) = intel->vtbl.flush_cmd(); batch->ptr += 4; used = batch->ptr - batch->map; diff --git a/src/mesa/drivers/dri/intel/intel_blit.c b/src/mesa/drivers/dri/intel/intel_blit.c index 208f90c0ab..4e033082b4 100644 --- a/src/mesa/drivers/dri/intel/intel_blit.c +++ b/src/mesa/drivers/dri/intel/intel_blit.c @@ -332,6 +332,8 @@ intelEmitCopyBlit(struct intel_context *intel, switch (cpp) { case 1: + CMD = XY_SRC_COPY_BLT_CMD; + break; case 2: case 3: BR13 |= (1 << 24); @@ -562,7 +564,6 @@ intelClearWithBlit(GLcontext *ctx, GLbitfield mask) } } } - intel_batchbuffer_emit_mi_flush(intel->batch); } UNLOCK_HARDWARE(intel); diff --git a/src/mesa/drivers/dri/intel/intel_buffer_objects.c b/src/mesa/drivers/dri/intel/intel_buffer_objects.c index 60d7bb3770..b7c7eeb368 100644 --- a/src/mesa/drivers/dri/intel/intel_buffer_objects.c +++ b/src/mesa/drivers/dri/intel/intel_buffer_objects.c @@ -35,9 +35,6 @@ #include "intel_batchbuffer.h" #include "intel_regions.h" -static GLboolean intel_bufferobj_unmap(GLcontext * ctx, - GLenum target, - struct gl_buffer_object *obj); /** Allocates a new dri_bo to store the data for the buffer object. */ static void @@ -103,12 +100,7 @@ intel_bufferobj_free(GLcontext * ctx, struct gl_buffer_object *obj) struct intel_buffer_object *intel_obj = intel_buffer_object(obj); assert(intel_obj); - - /* Buffer objects are automatically unmapped when deleting according - * to the spec. - */ - if (obj->Pointer) - intel_bufferobj_unmap(ctx, 0, obj); + assert(!obj->Pointer); /* Mesa should have unmapped it */ if (intel_obj->region) { intel_bufferobj_release_region(intel, intel_obj); @@ -141,11 +133,7 @@ intel_bufferobj_data(GLcontext * ctx, intel_obj->Base.Size = size; intel_obj->Base.Usage = usage; - /* Buffer objects are automatically unmapped when creating new data buffers - * according to the spec. - */ - if (obj->Pointer) - intel_bufferobj_unmap(ctx, 0, obj); + assert(!obj->Pointer); /* Mesa should have unmapped it */ if (intel_obj->region) intel_bufferobj_release_region(intel, intel_obj); diff --git a/src/mesa/drivers/dri/intel/intel_buffers.c b/src/mesa/drivers/dri/intel/intel_buffers.c index 7f2144abd4..0929a2c223 100644 --- a/src/mesa/drivers/dri/intel/intel_buffers.c +++ b/src/mesa/drivers/dri/intel/intel_buffers.c @@ -263,7 +263,7 @@ intel_draw_buffer(GLcontext * ctx, struct gl_framebuffer *fb) } } else { - /* XXX FBO: instead of FALSE, pass ctx->Stencil.Enabled ??? */ + /* XXX FBO: instead of FALSE, pass ctx->Stencil._Enabled ??? */ FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, GL_FALSE); } @@ -274,9 +274,14 @@ intel_draw_buffer(GLcontext * ctx, struct gl_framebuffer *fb) ctx->Driver.Enable(ctx, GL_DEPTH_TEST, (ctx->Depth.Test && fb->Visual.depthBits > 0)); ctx->Driver.Enable(ctx, GL_STENCIL_TEST, - (ctx->Stencil.Enabled && fb->Visual.stencilBits > 0)); + (ctx->Stencil._Enabled && fb->Visual.stencilBits > 0)); } else { + /* Mesa's Stencil._Enabled field is updated when + * _NEW_BUFFERS | _NEW_STENCIL, but i965 code assumes that the value + * only changes with _NEW_STENCIL (which seems sensible). So flag it + * here since this is the _NEW_BUFFERS path. + */ ctx->NewState |= (_NEW_DEPTH | _NEW_STENCIL); } diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h b/src/mesa/drivers/dri/intel/intel_chipset.h index d1b4941601..4593d90df3 100644 --- a/src/mesa/drivers/dri/intel/intel_chipset.h +++ b/src/mesa/drivers/dri/intel/intel_chipset.h @@ -46,6 +46,13 @@ #define PCI_CHIP_G33_G 0x29C2 #define PCI_CHIP_Q33_G 0x29D2 +#define PCI_CHIP_IGD_GM 0xA011 +#define PCI_CHIP_IGD_G 0xA001 + +#define IS_IGDGM(devid) (devid == PCI_CHIP_IGD_GM) +#define IS_IGDG(devid) (devid == PCI_CHIP_IGD_G) +#define IS_IGD(devid) (IS_IGDG(devid) || IS_IGDGM(devid)) + #define PCI_CHIP_I965_G 0x29A2 #define PCI_CHIP_I965_Q 0x2992 #define PCI_CHIP_I965_G_1 0x2982 @@ -66,7 +73,7 @@ devid == PCI_CHIP_I945_GME || \ devid == PCI_CHIP_I965_GM || \ devid == PCI_CHIP_I965_GME || \ - devid == PCI_CHIP_GM45_GM) + devid == PCI_CHIP_GM45_GM || IS_IGD(devid)) #define IS_G45(devid) (devid == PCI_CHIP_IGD_E_G || \ devid == PCI_CHIP_Q45_G || \ @@ -84,7 +91,7 @@ devid == PCI_CHIP_I945_GME || \ devid == PCI_CHIP_G33_G || \ devid == PCI_CHIP_Q33_G || \ - devid == PCI_CHIP_Q35_G) + devid == PCI_CHIP_Q35_G || IS_IGD(devid)) #define IS_965(devid) (devid == PCI_CHIP_I965_G || \ devid == PCI_CHIP_I965_Q || \ diff --git a/src/mesa/drivers/dri/intel/intel_clear.c b/src/mesa/drivers/dri/intel/intel_clear.c index b229136316..28281b3861 100644 --- a/src/mesa/drivers/dri/intel/intel_clear.c +++ b/src/mesa/drivers/dri/intel/intel_clear.c @@ -54,6 +54,17 @@ #define FILE_DEBUG_FLAG DEBUG_BLIT +#define TRI_CLEAR_COLOR_BITS (BUFFER_BIT_BACK_LEFT | \ + BUFFER_BIT_FRONT_LEFT | \ + BUFFER_BIT_COLOR0 | \ + BUFFER_BIT_COLOR1 | \ + BUFFER_BIT_COLOR2 | \ + BUFFER_BIT_COLOR3 | \ + BUFFER_BIT_COLOR4 | \ + BUFFER_BIT_COLOR5 | \ + BUFFER_BIT_COLOR6 | \ + BUFFER_BIT_COLOR7) + /** * Perform glClear where mask contains only color, depth, and/or stencil. * @@ -72,11 +83,11 @@ intel_clear_tris(GLcontext *ctx, GLbitfield mask) struct gl_framebuffer *fb = ctx->DrawBuffer; int i; GLboolean saved_fp_enable = GL_FALSE, saved_vp_enable = GL_FALSE; - GLboolean saved_shader_program = 0; + GLuint saved_shader_program = 0; unsigned int saved_active_texture; - assert((mask & ~(BUFFER_BIT_BACK_LEFT | BUFFER_BIT_FRONT_LEFT | - BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL)) == 0); + assert((mask & ~(TRI_CLEAR_COLOR_BITS | BUFFER_BIT_DEPTH | + BUFFER_BIT_STENCIL)) == 0); _mesa_PushAttrib(GL_COLOR_BUFFER_BIT | GL_CURRENT_BIT | @@ -170,11 +181,11 @@ intel_clear_tris(GLcontext *ctx, GLbitfield mask) while (mask != 0) { GLuint this_mask = 0; + GLuint color_bit; - if (mask & BUFFER_BIT_BACK_LEFT) - this_mask = BUFFER_BIT_BACK_LEFT; - else if (mask & BUFFER_BIT_FRONT_LEFT) - this_mask = BUFFER_BIT_FRONT_LEFT; + color_bit = _mesa_ffs(mask & TRI_CLEAR_COLOR_BITS); + if (color_bit != 0) + this_mask |= (1 << (color_bit - 1)); /* Clear depth/stencil in the same pass as color. */ this_mask |= (mask & (BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL)); @@ -186,6 +197,9 @@ intel_clear_tris(GLcontext *ctx, GLbitfield mask) _mesa_DrawBuffer(GL_FRONT_LEFT); else if (this_mask & BUFFER_BIT_BACK_LEFT) _mesa_DrawBuffer(GL_BACK_LEFT); + else if (color_bit != 0) + _mesa_DrawBuffer(GL_COLOR_ATTACHMENT0 + + (color_bit - BUFFER_COLOR0 - 1)); else _mesa_ColorMask(GL_FALSE, GL_FALSE, GL_FALSE, GL_FALSE); @@ -233,13 +247,10 @@ static const char *buffer_names[] = { [BUFFER_BACK_LEFT] = "back", [BUFFER_FRONT_RIGHT] = "front right", [BUFFER_BACK_RIGHT] = "back right", - [BUFFER_AUX0] = "aux0", - [BUFFER_AUX1] = "aux1", - [BUFFER_AUX2] = "aux2", - [BUFFER_AUX3] = "aux3", [BUFFER_DEPTH] = "depth", [BUFFER_STENCIL] = "stencil", [BUFFER_ACCUM] = "accum", + [BUFFER_AUX0] = "aux0", [BUFFER_COLOR0] = "color0", [BUFFER_COLOR1] = "color1", [BUFFER_COLOR2] = "color2", @@ -313,8 +324,11 @@ intelClear(GLcontext *ctx, GLbitfield mask) * buffer with it. */ if (mask & (BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL)) { - tri_mask |= blit_mask & BUFFER_BIT_BACK_LEFT; - blit_mask &= ~BUFFER_BIT_BACK_LEFT; + int color_bit = _mesa_ffs(mask & TRI_CLEAR_COLOR_BITS); + if (color_bit != 0) { + tri_mask |= blit_mask & (1 << (color_bit - 1)); + blit_mask &= ~(1 << (color_bit - 1)); + } } /* SW fallback clearing */ diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c index d7ccfa0605..888bb3f18f 100644 --- a/src/mesa/drivers/dri/intel/intel_context.c +++ b/src/mesa/drivers/dri/intel/intel_context.c @@ -123,6 +123,10 @@ intelGetString(GLcontext * ctx, GLenum name) case PCI_CHIP_Q33_G: chipset = "Intel(R) Q33"; break; + case PCI_CHIP_IGD_GM: + case PCI_CHIP_IGD_G: + chipset = "Intel(R) IGD"; + break; case PCI_CHIP_I965_Q: chipset = "Intel(R) 965Q"; break; @@ -502,10 +506,16 @@ intelInitContext(struct intel_context *intel, * start. */ if (getenv("INTEL_STRICT_CONFORMANCE")) { - intel->strict_conformance = 1; + unsigned int value = atoi(getenv("INTEL_STRICT_CONFORMANCE")); + if (value > 0) { + intel->conformance_mode = value; + } + else { + intel->conformance_mode = 1; + } } - if (intel->strict_conformance) { + if (intel->conformance_mode > 0) { ctx->Const.MinLineWidth = 1.0; ctx->Const.MinLineWidthAA = 1.0; ctx->Const.MaxLineWidth = 1.0; @@ -573,8 +583,6 @@ intelInitContext(struct intel_context *intel, intel->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS); - _math_matrix_ctr(&intel->ViewportMatrix); - if (IS_965(intelScreen->deviceID) && !intel->intelScreen->irq_active) { _mesa_printf("IRQs not active. Exiting\n"); exit(1); @@ -610,6 +618,16 @@ intelInitContext(struct intel_context *intel, intel->no_rast = 1; } + if (driQueryOptionb(&intel->optionCache, "always_flush_batch")) { + fprintf(stderr, "flushing batchbuffer before/after each draw call\n"); + intel->always_flush_batch = 1; + } + + if (driQueryOptionb(&intel->optionCache, "always_flush_cache")) { + fprintf(stderr, "flushing GPU caches before/after each draw call\n"); + intel->always_flush_cache = 1; + } + /* Disable all hardware rendering (skip emitting batches and fences/waits * to the kernel) */ diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h index 18dc43c4a4..e520ecf220 100644 --- a/src/mesa/drivers/dri/intel/intel_context.h +++ b/src/mesa/drivers/dri/intel/intel_context.h @@ -100,7 +100,6 @@ struct intel_context GLuint num_regions); GLuint (*flush_cmd) (void); - void (*emit_flush) (struct intel_context *intel, GLuint unused); void (*reduced_primitive_state) (struct intel_context * intel, GLenum rprim); @@ -229,7 +228,14 @@ struct intel_context GLboolean hw_stipple; GLboolean depth_buffer_is_float; GLboolean no_rast; - GLboolean strict_conformance; + GLboolean always_flush_batch; + GLboolean always_flush_cache; + + /* 0 - nonconformant, best performance; + * 1 - fallback to sw for known conformance bugs + * 2 - always fallback to sw + */ + GLuint conformance_mode; /* State for intelvb.c and inteltris.c. */ diff --git a/src/mesa/drivers/dri/intel/intel_decode.c b/src/mesa/drivers/dri/intel/intel_decode.c index 136221c37f..f2e2e61935 100644 --- a/src/mesa/drivers/dri/intel/intel_decode.c +++ b/src/mesa/drivers/dri/intel/intel_decode.c @@ -1595,7 +1595,7 @@ decode_3d_965(uint32_t *data, int count, uint32_t hw_offset, int *failures) "3DPRIMITIVE: %s %s\n", get_965_prim_type(data[0]), (data[0] & (1 << 15)) ? "random" : "sequential"); - instr_out(data, hw_offset, 1, "primitive count\n"); + instr_out(data, hw_offset, 1, "vertex count\n"); instr_out(data, hw_offset, 2, "start vertex\n"); instr_out(data, hw_offset, 3, "instance count\n"); instr_out(data, hw_offset, 4, "start instance\n"); diff --git a/src/mesa/drivers/dri/intel/intel_depthtmp.h b/src/mesa/drivers/dri/intel/intel_depthtmp.h new file mode 100644 index 0000000000..16d7708453 --- /dev/null +++ b/src/mesa/drivers/dri/intel/intel_depthtmp.h @@ -0,0 +1,54 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Eric Anholt <eric@anholt.net> + * + */ + +/** + * Wrapper around the depthtmp.h macrofest to generate spans code for + * all the tiling styles. + */ + +#define VALUE_TYPE INTEL_VALUE_TYPE +#define WRITE_DEPTH(_x, _y, d) INTEL_WRITE_DEPTH(NO_TILE(_x, _y), d) +#define READ_DEPTH(d, _x, _y) d = INTEL_READ_DEPTH(NO_TILE(_x, _y)) +#define TAG(x) INTEL_TAG(intel##x) +#include "depthtmp.h" + +#define VALUE_TYPE INTEL_VALUE_TYPE +#define WRITE_DEPTH(_x, _y, d) INTEL_WRITE_DEPTH(X_TILE(_x, _y), d) +#define READ_DEPTH(d, _x, _y) d = INTEL_READ_DEPTH(X_TILE(_x, _y)) +#define TAG(x) INTEL_TAG(intel_XTile_##x) +#include "depthtmp.h" + +#define VALUE_TYPE INTEL_VALUE_TYPE +#define WRITE_DEPTH(_x, _y, d) INTEL_WRITE_DEPTH(Y_TILE(_x, _y), d) +#define READ_DEPTH(d, _x, _y) d = INTEL_READ_DEPTH(Y_TILE(_x, _y)) +#define TAG(x) INTEL_TAG(intel_YTile_##x) +#include "depthtmp.h" + +#undef INTEL_VALUE_TYPE +#undef INTEL_WRITE_DEPTH +#undef INTEL_READ_DEPTH +#undef INTEL_TAG diff --git a/src/mesa/drivers/dri/intel/intel_extensions.c b/src/mesa/drivers/dri/intel/intel_extensions.c index 28223ca141..8dd0b2461b 100644 --- a/src/mesa/drivers/dri/intel/intel_extensions.c +++ b/src/mesa/drivers/dri/intel/intel_extensions.c @@ -49,6 +49,7 @@ #define need_GL_EXT_secondary_color #define need_GL_EXT_stencil_two_side #define need_GL_ATI_separate_stencil +#define need_GL_ATI_envmap_bumpmap #define need_GL_NV_point_sprite #define need_GL_NV_vertex_program #define need_GL_VERSION_2_0 @@ -129,11 +130,7 @@ static const struct dri_extension brw_extensions[] = { { "GL_ARB_point_sprite", NULL }, { "GL_ARB_shader_objects", GL_ARB_shader_objects_functions }, { "GL_ARB_shading_language_100", GL_VERSION_2_0_functions }, -#if 0 - /* Support for GLSL 1.20 is currently broken in core Mesa. - */ { "GL_ARB_shading_language_120", GL_VERSION_2_1_functions }, -#endif { "GL_ARB_shadow", NULL }, { "GL_ARB_texture_non_power_of_two", NULL }, { "GL_ARB_vertex_shader", GL_ARB_vertex_shader_functions }, @@ -142,6 +139,7 @@ static const struct dri_extension brw_extensions[] = { { "GL_EXT_texture_sRGB", NULL }, { "GL_EXT_texture_swizzle", NULL }, { "GL_EXT_vertex_array_bgra", NULL }, + { "GL_ATI_envmap_bumpmap", GL_ATI_envmap_bumpmap_functions }, { "GL_ATI_separate_stencil", GL_ATI_separate_stencil_functions }, { "GL_ATI_texture_env_combine3", NULL }, { "GL_NV_texture_env_combine4", NULL }, diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c index 54d6044ad3..a401f730ba 100644 --- a/src/mesa/drivers/dri/intel/intel_fbo.c +++ b/src/mesa/drivers/dri/intel/intel_fbo.c @@ -210,7 +210,8 @@ intel_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb, DBG("Allocating %d x %d Intel RBO (pitch %d)\n", width, height, pitch); - irb->region = intel_region_alloc(intel, cpp, width, height, pitch); + irb->region = intel_region_alloc(intel, cpp, width, height, pitch, + GL_TRUE); if (!irb->region) return GL_FALSE; /* out of memory? */ @@ -322,6 +323,15 @@ intel_create_renderbuffer(GLenum intFormat) irb->Base.BlueBits = 5; irb->Base.DataType = GL_UNSIGNED_BYTE; break; + case GL_RGB8: + irb->Base._ActualFormat = GL_RGB8; + irb->Base._BaseFormat = GL_RGB; + irb->Base.RedBits = 8; + irb->Base.GreenBits = 8; + irb->Base.BlueBits = 8; + irb->Base.AlphaBits = 0; + irb->Base.DataType = GL_UNSIGNED_BYTE; + break; case GL_RGBA8: irb->Base._ActualFormat = GL_RGBA8; irb->Base._BaseFormat = GL_RGBA; @@ -602,19 +612,16 @@ static void intel_finish_render_texture(GLcontext * ctx, struct gl_renderbuffer_attachment *att) { - struct intel_renderbuffer *irb = intel_renderbuffer(att->Renderbuffer); - - DBG("End render texture (tid %x) tex %u\n", _glthread_GetID(), att->Texture->Name); - - if (irb) { - /* just release the region */ - intel_region_release(&irb->region); - } - else if (att->Renderbuffer) { - /* software fallback */ - _mesa_finish_render_texture(ctx, att); - /* XXX FBO: Need to unmap the buffer (or in intelSpanRenderStart???) */ - } + /* no-op + * Previously we released the renderbuffer's intel_region but + * that's not necessary and actually caused problems when trying + * to do a glRead/CopyPixels from the renderbuffer later. + * The region will be released later if the texture is replaced + * or the renderbuffer deleted. + * + * The intention of this driver hook is more of a "done rendering + * to texture, please re-twiddle/etc if necessary". + */ } @@ -624,6 +631,7 @@ intel_finish_render_texture(GLcontext * ctx, static void intel_validate_framebuffer(GLcontext *ctx, struct gl_framebuffer *fb) { + struct intel_context *intel = intel_context(ctx); const struct intel_renderbuffer *depthRb = intel_get_renderbuffer(fb, BUFFER_DEPTH); const struct intel_renderbuffer *stencilRb = @@ -635,6 +643,35 @@ intel_validate_framebuffer(GLcontext *ctx, struct gl_framebuffer *fb) */ fb->_Status = GL_FRAMEBUFFER_UNSUPPORTED_EXT; } + + /* check that texture color buffers are a format we can render into */ + { + const struct gl_texture_format *supportedFormat; + GLuint i; + + /* The texture format we can render into seems to depend on the + * screen depth. There currently seems to be a problem when + * rendering into a rgb565 texture when the screen is abgr8888. + */ + + if (intel->ctx.Visual.rgbBits >= 24) + supportedFormat = &_mesa_texformat_argb8888; + else + supportedFormat = &_mesa_texformat_rgb565; + + for (i = 0; i < ctx->Const.MaxDrawBuffers; i++) { + const struct gl_texture_object *texObj = + fb->Attachment[BUFFER_COLOR0 + i].Texture; + if (texObj) { + const struct gl_texture_image *texImg = + texObj->Image[0][texObj->BaseLevel]; + if (texImg && texImg->TexFormat != supportedFormat) { + fb->_Status = GL_FRAMEBUFFER_UNSUPPORTED_EXT; + break; + } + } + } + } } diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c index bf1c3f03f0..6e1e034e53 100644 --- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c @@ -103,7 +103,8 @@ intel_miptree_create(struct intel_context *intel, GLuint last_level, GLuint width0, GLuint height0, - GLuint depth0, GLuint cpp, GLuint compress_byte) + GLuint depth0, GLuint cpp, GLuint compress_byte, + GLboolean expect_accelerated_upload) { struct intel_mipmap_tree *mt; @@ -120,7 +121,8 @@ intel_miptree_create(struct intel_context *intel, mt->cpp, mt->pitch, mt->total_height, - mt->pitch); + mt->pitch, + expect_accelerated_upload); if (!mt->region) { free(mt); diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h b/src/mesa/drivers/dri/intel/intel_mipmap_tree.h index c9537dbb9a..4060b9df78 100644 --- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h +++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.h @@ -133,7 +133,8 @@ struct intel_mipmap_tree *intel_miptree_create(struct intel_context *intel, GLuint height0, GLuint depth0, GLuint cpp, - GLuint compress_byte); + GLuint compress_byte, + GLboolean expect_accelerated_upload); struct intel_mipmap_tree * intel_miptree_create_for_region(struct intel_context *intel, diff --git a/src/mesa/drivers/dri/intel/intel_pixel.c b/src/mesa/drivers/dri/intel/intel_pixel.c index 5e32288844..7041ff389a 100644 --- a/src/mesa/drivers/dri/intel/intel_pixel.c +++ b/src/mesa/drivers/dri/intel/intel_pixel.c @@ -30,6 +30,7 @@ #include "main/context.h" #include "main/enable.h" #include "main/matrix.h" +#include "main/viewport.h" #include "swrast/swrast.h" #include "shader/arbprogram.h" #include "shader/program.h" @@ -112,7 +113,7 @@ intel_check_blit_fragment_ops(GLcontext * ctx, GLboolean src_alpha_is_one) return GL_FALSE; } - if (ctx->Stencil.Enabled) { + if (ctx->Stencil._Enabled) { DBG("fallback due to image stencil\n"); return GL_FALSE; } diff --git a/src/mesa/drivers/dri/intel/intel_pixel_copy.c b/src/mesa/drivers/dri/intel/intel_pixel_copy.c index 7c7aa6097c..d50dd68092 100644 --- a/src/mesa/drivers/dri/intel/intel_pixel_copy.c +++ b/src/mesa/drivers/dri/intel/intel_pixel_copy.c @@ -87,7 +87,7 @@ intel_check_copypixel_blit_fragment_ops(GLcontext * ctx) ctx->Color.AlphaEnabled || ctx->Depth.Test || ctx->Fog.Enabled || - ctx->Stencil.Enabled || + ctx->Stencil._Enabled || !ctx->Color.ColorMask[0] || !ctx->Color.ColorMask[1] || !ctx->Color.ColorMask[2] || diff --git a/src/mesa/drivers/dri/intel/intel_pixel_draw.c b/src/mesa/drivers/dri/intel/intel_pixel_draw.c index 7be7ea82b3..e8d5ac8569 100644 --- a/src/mesa/drivers/dri/intel/intel_pixel_draw.c +++ b/src/mesa/drivers/dri/intel/intel_pixel_draw.c @@ -233,7 +233,7 @@ intel_stencil_drawpixels(GLcontext * ctx, } /* We don't support stencil testing/ops here */ - if (ctx->Stencil.Enabled) + if (ctx->Stencil._Enabled) return GL_FALSE; /* We use FBOs for our wrapping of the depthbuffer into a color diff --git a/src/mesa/drivers/dri/intel/intel_regions.c b/src/mesa/drivers/dri/intel/intel_regions.c index ec85c4131a..0aa5b8c02c 100644 --- a/src/mesa/drivers/dri/intel/intel_regions.c +++ b/src/mesa/drivers/dri/intel/intel_regions.c @@ -109,12 +109,18 @@ intel_region_alloc_internal(struct intel_context *intel, struct intel_region * intel_region_alloc(struct intel_context *intel, - GLuint cpp, GLuint width, GLuint height, GLuint pitch) + GLuint cpp, GLuint width, GLuint height, GLuint pitch, + GLboolean expect_accelerated_upload) { dri_bo *buffer; - buffer = dri_bo_alloc(intel->bufmgr, "region", - pitch * cpp * height, 64); + if (expect_accelerated_upload) { + buffer = drm_intel_bo_alloc_for_render(intel->bufmgr, "region", + pitch * cpp * height, 64); + } else { + buffer = drm_intel_bo_alloc(intel->bufmgr, "region", + pitch * cpp * height, 64); + } return intel_region_alloc_internal(intel, cpp, width, height, pitch, buffer); } @@ -460,7 +466,8 @@ intel_recreate_static(struct intel_context *intel, else region->cpp = intel->ctx.Visual.rgbBits / 8; region->pitch = intelScreen->pitch; - region->height = intelScreen->height; /* needed? */ + region->width = intelScreen->width; + region->height = intelScreen->height; if (region->buffer != NULL) { dri_bo_unreference(region->buffer); diff --git a/src/mesa/drivers/dri/intel/intel_regions.h b/src/mesa/drivers/dri/intel/intel_regions.h index 4b120ba4ce..45e2bf4e77 100644 --- a/src/mesa/drivers/dri/intel/intel_regions.h +++ b/src/mesa/drivers/dri/intel/intel_regions.h @@ -74,7 +74,8 @@ struct intel_region */ struct intel_region *intel_region_alloc(struct intel_context *intel, GLuint cpp, GLuint width, - GLuint height, GLuint pitch); + GLuint height, GLuint pitch, + GLboolean expect_accelerated_upload); struct intel_region * intel_region_alloc_for_handle(struct intel_context *intel, diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c index a52271158c..e8c074712c 100644 --- a/src/mesa/drivers/dri/intel/intel_screen.c +++ b/src/mesa/drivers/dri/intel/intel_screen.c @@ -71,10 +71,12 @@ PUBLIC const char __driConfigOptions[] = DRI_CONF_SECTION_END DRI_CONF_SECTION_DEBUG DRI_CONF_NO_RAST(false) + DRI_CONF_ALWAYS_FLUSH_BATCH(false) + DRI_CONF_ALWAYS_FLUSH_CACHE(false) DRI_CONF_SECTION_END DRI_CONF_END; -const GLuint __driNConfigOptions = 6; +const GLuint __driNConfigOptions = 8; #ifdef USE_NEW_INTERFACE static PFNGLXCREATECONTEXTMODES create_context_modes = NULL; @@ -302,6 +304,7 @@ intelDestroyScreen(__DRIscreenPrivate * sPriv) dri_bufmgr_destroy(intelScreen->bufmgr); intelUnmapScreenRegions(intelScreen); + driDestroyOptionCache(&intelScreen->optionCache); FREE(intelScreen); sPriv->private = NULL; @@ -322,7 +325,7 @@ intelCreateBuffer(__DRIscreenPrivate * driScrnPriv, else { GLboolean swStencil = (mesaVis->stencilBits > 0 && mesaVis->depthBits != 24); - GLenum rgbFormat = (mesaVis->redBits == 5 ? GL_RGB5 : GL_RGBA8); + GLenum rgbFormat; struct intel_framebuffer *intel_fb = CALLOC_STRUCT(intel_framebuffer); @@ -331,6 +334,13 @@ intelCreateBuffer(__DRIscreenPrivate * driScrnPriv, _mesa_initialize_framebuffer(&intel_fb->Base, mesaVis); + if (mesaVis->redBits == 5) + rgbFormat = GL_RGB5; + else if (mesaVis->alphaBits == 0) + rgbFormat = GL_RGB8; + else + rgbFormat = GL_RGBA8; + /* setup the hardware-based renderbuffers */ intel_fb->color_rb[0] = intel_create_renderbuffer(rgbFormat); _mesa_add_renderbuffer(&intel_fb->Base, BUFFER_FRONT_LEFT, @@ -384,7 +394,7 @@ intelCreateBuffer(__DRIscreenPrivate * driScrnPriv, static void intelDestroyBuffer(__DRIdrawablePrivate * driDrawPriv) { - _mesa_unreference_framebuffer((GLframebuffer **)(&(driDrawPriv->driverPrivate))); + _mesa_reference_framebuffer((GLframebuffer **)(&(driDrawPriv->driverPrivate)), NULL); } @@ -757,13 +767,34 @@ __DRIconfig **intelInitScreen2(__DRIscreenPrivate *psp) fb_format[2] = GL_BGRA; fb_type[2] = GL_UNSIGNED_INT_8_8_8_8_REV; + depth_bits[0] = 0; + stencil_bits[0] = 0; + for (color = 0; color < ARRAY_SIZE(fb_format); color++) { __DRIconfig **new_configs; + int depth_factor; + /* With DRI2 right now, GetBuffers always returns a depth/stencil buffer + * with the same cpp as the drawable. So we can't support depth cpp != + * color cpp currently. + */ + if (fb_type[color] == GL_UNSIGNED_SHORT_5_6_5) { + depth_bits[1] = 16; + stencil_bits[1] = 0; + + depth_factor = 2; + } else { + depth_bits[1] = 24; + stencil_bits[1] = 0; + depth_bits[2] = 24; + stencil_bits[2] = 8; + + depth_factor = 3; + } new_configs = driCreateConfigs(fb_format[color], fb_type[color], depth_bits, stencil_bits, - ARRAY_SIZE(depth_bits), + depth_factor, back_buffer_modes, ARRAY_SIZE(back_buffer_modes), msaa_samples_array, diff --git a/src/mesa/drivers/dri/intel/intel_span.c b/src/mesa/drivers/dri/intel/intel_span.c index bdd2fd9e85..c3a873f1ab 100644 --- a/src/mesa/drivers/dri/intel/intel_span.c +++ b/src/mesa/drivers/dri/intel/intel_span.c @@ -131,6 +131,18 @@ pwrite_8(struct intel_renderbuffer *irb, uint32_t offset, uint8_t val) dri_bo_subdata(irb->region->buffer, offset, 1, &val); } +static uint32_t +z24s8_to_s8z24(uint32_t val) +{ + return (val << 24) | (val >> 8); +} + +static uint32_t +s8z24_to_z24s8(uint32_t val) +{ + return (val >> 24) | (val << 8); +} + static uint32_t no_tile_swizzle(struct intel_renderbuffer *irb, int x, int y) { @@ -293,101 +305,29 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb, #define X_TILE(_X, _Y) x_tile_swizzle(irb, (_X) + x_off, (_Y) + y_off) #define Y_TILE(_X, _Y) y_tile_swizzle(irb, (_X) + x_off, (_Y) + y_off) -/* 16 bit, RGB565 color spanline and pixel functions - */ -#define SPANTMP_PIXEL_FMT GL_RGB -#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_SHORT_5_6_5 - -#define TAG(x) intel##x##_RGB565 -#define TAG2(x,y) intel##x##_RGB565##y -#define GET_VALUE(X, Y) pread_16(irb, NO_TILE(X, Y)) -#define PUT_VALUE(X, Y, V) pwrite_16(irb, NO_TILE(X, Y), V) -#include "spantmp2.h" - -/* 32 bit, ARGB8888 color spanline and pixel functions - */ -#define SPANTMP_PIXEL_FMT GL_BGRA -#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV - -#define TAG(x) intel##x##_ARGB8888 -#define TAG2(x,y) intel##x##_ARGB8888##y -#define GET_VALUE(X, Y) pread_32(irb, NO_TILE(X, Y)) -#define PUT_VALUE(X, Y, V) pwrite_32(irb, NO_TILE(X, Y), V) -#include "spantmp2.h" - -/* 32 bit, xRGB8888 color spanline and pixel functions - */ -#define SPANTMP_PIXEL_FMT GL_BGRA -#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV - -#define TAG(x) intel##x##_xRGB8888 -#define TAG2(x,y) intel##x##_xRGB8888##y -#define GET_VALUE(X, Y) pread_xrgb8888(irb, NO_TILE(X, Y)) -#define PUT_VALUE(X, Y, V) pwrite_xrgb8888(irb, NO_TILE(X, Y), V) -#include "spantmp2.h" - -/* 16 bit RGB565 color tile spanline and pixel functions - */ - -#define SPANTMP_PIXEL_FMT GL_RGB -#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_SHORT_5_6_5 - -#define TAG(x) intel_XTile_##x##_RGB565 -#define TAG2(x,y) intel_XTile_##x##_RGB565##y -#define GET_VALUE(X, Y) pread_16(irb, X_TILE(X, Y)) -#define PUT_VALUE(X, Y, V) pwrite_16(irb, X_TILE(X, Y), V) -#include "spantmp2.h" - -#define SPANTMP_PIXEL_FMT GL_RGB -#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_SHORT_5_6_5 - -#define TAG(x) intel_YTile_##x##_RGB565 -#define TAG2(x,y) intel_YTile_##x##_RGB565##y -#define GET_VALUE(X, Y) pread_16(irb, Y_TILE(X, Y)) -#define PUT_VALUE(X, Y, V) pwrite_16(irb, Y_TILE(X, Y), V) -#include "spantmp2.h" - -/* 32 bit ARGB888 color tile spanline and pixel functions - */ - -#define SPANTMP_PIXEL_FMT GL_BGRA -#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV - -#define TAG(x) intel_XTile_##x##_ARGB8888 -#define TAG2(x,y) intel_XTile_##x##_ARGB8888##y -#define GET_VALUE(X, Y) pread_32(irb, X_TILE(X, Y)) -#define PUT_VALUE(X, Y, V) pwrite_32(irb, X_TILE(X, Y), V) -#include "spantmp2.h" - -#define SPANTMP_PIXEL_FMT GL_BGRA -#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV - -#define TAG(x) intel_YTile_##x##_ARGB8888 -#define TAG2(x,y) intel_YTile_##x##_ARGB8888##y -#define GET_VALUE(X, Y) pread_32(irb, Y_TILE(X, Y)) -#define PUT_VALUE(X, Y, V) pwrite_32(irb, Y_TILE(X, Y), V) -#include "spantmp2.h" - -/* 32 bit xRGB888 color tile spanline and pixel functions - */ - -#define SPANTMP_PIXEL_FMT GL_BGRA -#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV - -#define TAG(x) intel_XTile_##x##_xRGB8888 -#define TAG2(x,y) intel_XTile_##x##_xRGB8888##y -#define GET_VALUE(X, Y) pread_xrgb8888(irb, X_TILE(X, Y)) -#define PUT_VALUE(X, Y, V) pwrite_xrgb8888(irb, X_TILE(X, Y), V) -#include "spantmp2.h" - -#define SPANTMP_PIXEL_FMT GL_BGRA -#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV - -#define TAG(x) intel_YTile_##x##_xRGB8888 -#define TAG2(x,y) intel_YTile_##x##_xRGB8888##y -#define GET_VALUE(X, Y) pread_xrgb8888(irb, Y_TILE(X, Y)) -#define PUT_VALUE(X, Y, V) pwrite_xrgb8888(irb, Y_TILE(X, Y), V) -#include "spantmp2.h" +/* r5g6b5 color span and pixel functions */ +#define INTEL_PIXEL_FMT GL_RGB +#define INTEL_PIXEL_TYPE GL_UNSIGNED_SHORT_5_6_5 +#define INTEL_READ_VALUE(offset) pread_16(irb, offset) +#define INTEL_WRITE_VALUE(offset, v) pwrite_16(irb, offset, v) +#define INTEL_TAG(x) x##_RGB565 +#include "intel_spantmp.h" + +/* a8r8g8b8 color span and pixel functions */ +#define INTEL_PIXEL_FMT GL_BGRA +#define INTEL_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV +#define INTEL_READ_VALUE(offset) pread_32(irb, offset) +#define INTEL_WRITE_VALUE(offset, v) pwrite_32(irb, offset, v) +#define INTEL_TAG(x) x##_ARGB8888 +#include "intel_spantmp.h" + +/* x8r8g8b8 color span and pixel functions */ +#define INTEL_PIXEL_FMT GL_BGRA +#define INTEL_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV +#define INTEL_READ_VALUE(offset) pread_xrgb8888(irb, offset) +#define INTEL_WRITE_VALUE(offset, v) pwrite_xrgb8888(irb, offset, v) +#define INTEL_TAG(x) x##_xRGB8888 +#include "intel_spantmp.h" #define LOCAL_DEPTH_VARS \ struct intel_context *intel = intel_context(ctx); \ @@ -402,98 +342,26 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb, #define LOCAL_STENCIL_VARS LOCAL_DEPTH_VARS -/** - ** 16-bit depthbuffer functions. - **/ -#define VALUE_TYPE GLushort -#define WRITE_DEPTH(_x, _y, d) pwrite_16(irb, NO_TILE(_x, _y), d) -#define READ_DEPTH(d, _x, _y) d = pread_16(irb, NO_TILE(_x, _y)) -#define TAG(x) intel##x##_z16 -#include "depthtmp.h" +/* z16 depthbuffer functions. */ +#define INTEL_VALUE_TYPE GLushort +#define INTEL_WRITE_DEPTH(offset, d) pwrite_16(irb, offset, d) +#define INTEL_READ_DEPTH(offset) pread_16(irb, offset) +#define INTEL_TAG(name) name##_z16 +#include "intel_depthtmp.h" +/* z24 depthbuffer functions. */ +#define INTEL_VALUE_TYPE GLuint +#define INTEL_WRITE_DEPTH(offset, d) pwrite_32(irb, offset, d) +#define INTEL_READ_DEPTH(offset) pread_32(irb, offset) +#define INTEL_TAG(name) name##_z24 +#include "intel_depthtmp.h" -/** - ** 16-bit x tile depthbuffer functions. - **/ -#define VALUE_TYPE GLushort -#define WRITE_DEPTH(_x, _y, d) pwrite_16(irb, X_TILE(_x, _y), d) -#define READ_DEPTH(d, _x, _y) d = pread_16(irb, X_TILE(_x, _y)) -#define TAG(x) intel_XTile_##x##_z16 -#include "depthtmp.h" - -/** - ** 16-bit y tile depthbuffer functions. - **/ -#define VALUE_TYPE GLushort -#define WRITE_DEPTH(_x, _y, d) pwrite_16(irb, Y_TILE(_x, _y), d) -#define READ_DEPTH(d, _x, _y) d = pread_16(irb, Y_TILE(_x, _y)) -#define TAG(x) intel_YTile_##x##_z16 -#include "depthtmp.h" - - -/** - ** 24/8-bit interleaved depth/stencil functions - ** Note: we're actually reading back combined depth+stencil values. - ** The wrappers in main/depthstencil.c are used to extract the depth - ** and stencil values. - **/ -#define VALUE_TYPE GLuint - -/* Change ZZZS -> SZZZ */ -#define WRITE_DEPTH(_x, _y, d) \ - pwrite_32(irb, NO_TILE(_x, _y), ((d) >> 8) | ((d) << 24)) - -/* Change SZZZ -> ZZZS */ -#define READ_DEPTH( d, _x, _y ) { \ - GLuint tmp = pread_32(irb, NO_TILE(_x, _y)); \ - d = (tmp << 8) | (tmp >> 24); \ -} - -#define TAG(x) intel##x##_z24_s8 -#include "depthtmp.h" - - -/** - ** 24/8-bit x-tile interleaved depth/stencil functions - ** Note: we're actually reading back combined depth+stencil values. - ** The wrappers in main/depthstencil.c are used to extract the depth - ** and stencil values. - **/ -#define VALUE_TYPE GLuint - -/* Change ZZZS -> SZZZ */ -#define WRITE_DEPTH(_x, _y, d) \ - pwrite_32(irb, X_TILE(_x, _y), ((d) >> 8) | ((d) << 24)) - -/* Change SZZZ -> ZZZS */ -#define READ_DEPTH( d, _x, _y ) { \ - GLuint tmp = pread_32(irb, X_TILE(_x, _y)); \ - d = (tmp << 8) | (tmp >> 24); \ -} - -#define TAG(x) intel_XTile_##x##_z24_s8 -#include "depthtmp.h" - -/** - ** 24/8-bit y-tile interleaved depth/stencil functions - ** Note: we're actually reading back combined depth+stencil values. - ** The wrappers in main/depthstencil.c are used to extract the depth - ** and stencil values. - **/ -#define VALUE_TYPE GLuint - -/* Change ZZZS -> SZZZ */ -#define WRITE_DEPTH(_x, _y, d) \ - pwrite_32(irb, Y_TILE(_x, _y), ((d) >> 8) | ((d) << 24)) - -/* Change SZZZ -> ZZZS */ -#define READ_DEPTH( d, _x, _y ) { \ - GLuint tmp = pread_32(irb, Y_TILE(_x, _y)); \ - d = (tmp << 8) | (tmp >> 24); \ -} - -#define TAG(x) intel_YTile_##x##_z24_s8 -#include "depthtmp.h" +/* z24s8 depthbuffer functions. */ +#define INTEL_VALUE_TYPE GLuint +#define INTEL_WRITE_DEPTH(offset, d) pwrite_32(irb, offset, z24s8_to_s8z24(d)) +#define INTEL_READ_DEPTH(offset) s8z24_to_z24s8(pread_32(irb, offset)) +#define INTEL_TAG(name) name##_z24_s8 +#include "intel_depthtmp.h" /** @@ -752,8 +620,21 @@ intel_set_span_functions(struct intel_context *intel, break; } } - else if (rb->_ActualFormat == GL_DEPTH_COMPONENT24 || /* XXX FBO remove */ - rb->_ActualFormat == GL_DEPTH24_STENCIL8_EXT) { + else if (rb->_ActualFormat == GL_DEPTH_COMPONENT24) { + switch (tiling) { + case I915_TILING_NONE: + default: + intelInitDepthPointers_z24(rb); + break; + case I915_TILING_X: + intel_XTile_InitDepthPointers_z24(rb); + break; + case I915_TILING_Y: + intel_YTile_InitDepthPointers_z24(rb); + break; + } + } + else if (rb->_ActualFormat == GL_DEPTH24_STENCIL8_EXT) { switch (tiling) { case I915_TILING_NONE: default: diff --git a/src/mesa/drivers/dri/intel/intel_spantmp.h b/src/mesa/drivers/dri/intel/intel_spantmp.h new file mode 100644 index 0000000000..ead0b1c168 --- /dev/null +++ b/src/mesa/drivers/dri/intel/intel_spantmp.h @@ -0,0 +1,61 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Eric Anholt <eric@anholt.net> + * + */ + +/** + * Wrapper around the spantmp.h macrofest to generate spans code for + * all the tiling styles. + */ + +#define SPANTMP_PIXEL_FMT INTEL_PIXEL_FMT +#define SPANTMP_PIXEL_TYPE INTEL_PIXEL_TYPE +#define PUT_VALUE(_x, _y, v) INTEL_WRITE_VALUE(NO_TILE(_x, _y), v) +#define GET_VALUE(_x, _y) INTEL_READ_VALUE(NO_TILE(_x, _y)) +#define TAG(x) INTEL_TAG(intel##x) +#define TAG2(x, y) INTEL_TAG(intel##x)##y +#include "spantmp2.h" + +#define SPANTMP_PIXEL_FMT INTEL_PIXEL_FMT +#define SPANTMP_PIXEL_TYPE INTEL_PIXEL_TYPE +#define PUT_VALUE(_x, _y, v) INTEL_WRITE_VALUE(X_TILE(_x, _y), v) +#define GET_VALUE(_x, _y) INTEL_READ_VALUE(X_TILE(_x, _y)) +#define TAG(x) INTEL_TAG(intel_XTile_##x) +#define TAG2(x, y) INTEL_TAG(intel_XTile_##x)##y +#include "spantmp2.h" + +#define SPANTMP_PIXEL_FMT INTEL_PIXEL_FMT +#define SPANTMP_PIXEL_TYPE INTEL_PIXEL_TYPE +#define PUT_VALUE(_x, _y, v) INTEL_WRITE_VALUE(X_TILE(_x, _y), v) +#define GET_VALUE(_x, _y) INTEL_READ_VALUE(X_TILE(_x, _y)) +#define TAG(x) INTEL_TAG(intel_YTile_##x) +#define TAG2(x, y) INTEL_TAG(intel_YTile_##x)##y +#include "spantmp2.h" + +#undef INTEL_PIXEL_FMT +#undef INTEL_PIXEL_TYPE +#undef INTEL_WRITE_VALUE +#undef INTEL_READ_VALUE +#undef INTEL_TAG diff --git a/src/mesa/drivers/dri/intel/intel_tex_format.c b/src/mesa/drivers/dri/intel/intel_tex_format.c index 2715a540d0..8732354e7a 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_format.c +++ b/src/mesa/drivers/dri/intel/intel_tex_format.c @@ -3,11 +3,15 @@ #include "main/texformat.h" #include "main/enums.h" -/* It works out that this function is fine for all the supported + +/** + * Choose hardware texture format given the user's glTexImage parameters. + * + * It works out that this function is fine for all the supported * hardware. However, there is still a need to map the formats onto * hardware descriptors. - */ -/* Note that the i915 can actually support many more formats than + * + * Note that the i915 can actually support many more formats than * these if we take the step of simply swizzling the colors * immediately after sampling... */ @@ -18,6 +22,11 @@ intelChooseTextureFormat(GLcontext * ctx, GLint internalFormat, struct intel_context *intel = intel_context(ctx); const GLboolean do32bpt = (intel->ctx.Visual.rgbBits >= 24); +#if 0 + printf("%s intFmt=0x%x format=0x%x type=0x%x\n", + __FUNCTION__, internalFormat, format, type); +#endif + switch (internalFormat) { case 4: case GL_RGBA: @@ -165,6 +174,10 @@ intelChooseTextureFormat(GLcontext * ctx, GLint internalFormat, case GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT3_EXT: case GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT5_EXT: return &_mesa_texformat_srgb_dxt1; + + case GL_DUDV_ATI: + case GL_DU8DV8_ATI: + return &_mesa_texformat_dudv8; #endif default: diff --git a/src/mesa/drivers/dri/intel/intel_tex_image.c b/src/mesa/drivers/dri/intel/intel_tex_image.c index 866022d0ce..943636c37b 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_image.c +++ b/src/mesa/drivers/dri/intel/intel_tex_image.c @@ -62,7 +62,8 @@ logbase2(int n) static void guess_and_alloc_mipmap_tree(struct intel_context *intel, struct intel_texture_object *intelObj, - struct intel_texture_image *intelImage) + struct intel_texture_image *intelImage, + GLboolean expect_accelerated_upload) { GLuint firstLevel; GLuint lastLevel; @@ -136,7 +137,8 @@ guess_and_alloc_mipmap_tree(struct intel_context *intel, height, depth, intelImage->base.TexFormat->TexelBytes, - comp_byte); + comp_byte, + expect_accelerated_upload); DBG("%s - success\n", __FUNCTION__); } @@ -385,7 +387,7 @@ intelTexImage(GLcontext * ctx, } if (!intelObj->mt) { - guess_and_alloc_mipmap_tree(intel, intelObj, intelImage); + guess_and_alloc_mipmap_tree(intel, intelObj, intelImage, pixels == NULL); if (!intelObj->mt) { DBG("guess_and_alloc_mipmap_tree: failed\n"); } @@ -415,7 +417,7 @@ intelTexImage(GLcontext * ctx, level, level, width, height, depth, intelImage->base.TexFormat->TexelBytes, - comp_byte); + comp_byte, pixels == NULL); } @@ -753,16 +755,21 @@ intelSetTexBuffer(__DRIcontext *pDRICtx, GLint target, __DRIdrawable *dPriv) _mesa_lock_texture(&intel->ctx, texObj); + texImage = _mesa_get_tex_image(&intel->ctx, texObj, target, level); + intelImage = intel_texture_image(texImage); + + if (intelImage->mt) { + intel_miptree_release(intel, &intelImage->mt); + assert(!texImage->Data); + } if (intelObj->mt) intel_miptree_release(intel, &intelObj->mt); intelObj->mt = mt; - texImage = _mesa_get_tex_image(&intel->ctx, texObj, target, level); _mesa_init_teximage_fields(&intel->ctx, target, texImage, rb->region->width, rb->region->height, 1, 0, internalFormat); - intelImage = intel_texture_image(texImage); intelImage->face = target_to_face(target); intelImage->level = level; texImage->TexFormat = intelChooseTextureFormat(&intel->ctx, internalFormat, diff --git a/src/mesa/drivers/dri/intel/intel_tex_validate.c b/src/mesa/drivers/dri/intel/intel_tex_validate.c index 820683d42e..05a375e1f3 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_validate.c +++ b/src/mesa/drivers/dri/intel/intel_tex_validate.c @@ -206,7 +206,8 @@ intel_finalize_mipmap_tree(struct intel_context *intel, GLuint unit) firstImage->base.Height, firstImage->base.Depth, cpp, - comp_byte); + comp_byte, + GL_TRUE); } /* Pull in any images not in the object's tree: |