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Diffstat (limited to 'src/mesa/drivers/dri/intel')
-rw-r--r--src/mesa/drivers/dri/intel/intel_batchbuffer.c7
-rw-r--r--src/mesa/drivers/dri/intel/intel_blit.c5
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.c44
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.h51
-rw-r--r--src/mesa/drivers/dri/intel/intel_extensions.c14
-rw-r--r--src/mesa/drivers/dri/intel/intel_mipmap_tree.c16
-rw-r--r--src/mesa/drivers/dri/intel/intel_pixel_bitmap.c5
-rw-r--r--src/mesa/drivers/dri/intel/intel_regions.c57
-rw-r--r--src/mesa/drivers/dri/intel/intel_screen.c38
-rw-r--r--src/mesa/drivers/dri/intel/intel_screen.h1
-rw-r--r--src/mesa/drivers/dri/intel/intel_span.c13
-rw-r--r--src/mesa/drivers/dri/intel/intel_state.c20
12 files changed, 52 insertions, 219 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_batchbuffer.c b/src/mesa/drivers/dri/intel/intel_batchbuffer.c
index ca6e2fa5b1..2eae9b66d8 100644
--- a/src/mesa/drivers/dri/intel/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/intel/intel_batchbuffer.c
@@ -80,7 +80,7 @@ intel_batchbuffer_reset(struct intel_batchbuffer *batch)
batch->buf = NULL;
}
- if (!batch->buffer && intel->ttm == GL_TRUE)
+ if (!batch->buffer)
batch->buffer = malloc (intel->maxBatchSize);
batch->buf = dri_bo_alloc(intel->bufmgr, "batchbuffer",
@@ -212,7 +212,7 @@ _intel_batchbuffer_flush(struct intel_batchbuffer *batch, const char *file,
batch->reserved_space = 0;
/* Emit a flush if the bufmgr doesn't do it for us. */
- if (intel->always_flush_cache || !intel->ttm) {
+ if (intel->always_flush_cache) {
intel_batchbuffer_emit_mi_flush(batch);
used = batch->ptr - batch->map;
}
@@ -244,6 +244,9 @@ _intel_batchbuffer_flush(struct intel_batchbuffer *batch, const char *file,
if (intel->vtbl.finish_batch)
intel->vtbl.finish_batch(intel);
+ /* Check that we didn't just wrap our batchbuffer at a bad time. */
+ assert(!intel->no_batch_wrap);
+
batch->reserved_space = BATCH_RESERVED;
/* TODO: Just pass the relocation list and dma buffer up to the
diff --git a/src/mesa/drivers/dri/intel/intel_blit.c b/src/mesa/drivers/dri/intel/intel_blit.c
index 817223da41..f14854602b 100644
--- a/src/mesa/drivers/dri/intel/intel_blit.c
+++ b/src/mesa/drivers/dri/intel/intel_blit.c
@@ -499,10 +499,11 @@ intelClearWithBlit(GLcontext *ctx, GLbitfield mask)
switch (irb->texformat) {
case MESA_FORMAT_ARGB8888:
case MESA_FORMAT_XRGB8888:
- clearVal = intel->ClearColor8888;
+ clearVal = PACK_COLOR_8888(clear[3], clear[0],
+ clear[1], clear[2]);
break;
case MESA_FORMAT_RGB565:
- clearVal = intel->ClearColor565;
+ clearVal = PACK_COLOR_565(clear[0], clear[1], clear[2]);
break;
case MESA_FORMAT_ARGB4444:
clearVal = PACK_COLOR_4444(clear[3], clear[0],
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 2aeca6b81b..1434ae530b 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -176,9 +176,7 @@ intelGetString(GLcontext * ctx, GLenum name)
break;
}
- (void) driGetRendererString(buffer, chipset,
- (intel->ttm) ? DRIVER_DATE_GEM : DRIVER_DATE,
- 0);
+ (void) driGetRendererString(buffer, chipset, DRIVER_DATE_GEM, 0);
return (GLubyte *) buffer;
default:
@@ -601,6 +599,7 @@ intelInitContext(struct intel_context *intel,
__DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
intelScreenPrivate *intelScreen = (intelScreenPrivate *) sPriv->private;
int fthrottle_mode;
+ int bo_reuse_mode;
if (!_mesa_initialize_context(&intel->ctx, mesaVis, shareCtx,
functions, (void *) intel)) {
@@ -635,18 +634,14 @@ intelInitContext(struct intel_context *intel,
intel->maxBatchSize = BATCH_SZ;
intel->bufmgr = intelScreen->bufmgr;
- intel->ttm = intelScreen->ttm;
- if (intel->ttm) {
- int bo_reuse_mode;
- bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse");
- switch (bo_reuse_mode) {
- case DRI_CONF_BO_REUSE_DISABLED:
- break;
- case DRI_CONF_BO_REUSE_ALL:
- intel_bufmgr_gem_enable_reuse(intel->bufmgr);
- break;
- }
+ bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse");
+ switch (bo_reuse_mode) {
+ case DRI_CONF_BO_REUSE_DISABLED:
+ break;
+ case DRI_CONF_BO_REUSE_ALL:
+ intel_bufmgr_gem_enable_reuse(intel->bufmgr);
+ break;
}
/* This doesn't yet catch all non-conformant rendering, but it's a
@@ -733,12 +728,6 @@ intelInitContext(struct intel_context *intel,
intel->RenderIndex = ~0;
fthrottle_mode = driQueryOptioni(&intel->optionCache, "fthrottle_mode");
- intel->irqsEmitted = 0;
-
- intel->do_irqs = (intel->intelScreen->irq_active &&
- fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS);
-
- intel->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
if (intel->gen >= 4 && !intel->intelScreen->irq_active) {
_mesa_printf("IRQs not active. Exiting\n");
@@ -1058,21 +1047,6 @@ intelContendedLock(struct intel_context *intel, GLuint flags)
sarea->ctxOwner = me;
}
- /* If the last consumer of the texture memory wasn't us, notify the fake
- * bufmgr and record the new owner. We should have the memory shared
- * between contexts of a single fake bufmgr, but this will at least make
- * things correct for now.
- */
- if (!intel->ttm && sarea->texAge != intel->hHWContext) {
- sarea->texAge = intel->hHWContext;
- intel_bufmgr_fake_contended_lock_take(intel->bufmgr);
- if (INTEL_DEBUG & DEBUG_BATCH)
- intel_decode_context_reset();
- if (INTEL_DEBUG & DEBUG_BUFMGR)
- fprintf(stderr, "Lost Textures: sarea->texAge %x hw context %x\n",
- sarea->ctxOwner, intel->hHWContext);
- }
-
/* Drawable changed?
*/
if (dPriv && intel->lastStamp != dPriv->lastStamp) {
diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h
index eb7be7ddd0..481202c971 100644
--- a/src/mesa/drivers/dri/intel/intel_context.h
+++ b/src/mesa/drivers/dri/intel/intel_context.h
@@ -135,14 +135,6 @@ struct intel_context
struct intel_region * draw_region,
struct intel_region * depth_region);
- void (*meta_draw_quad)(struct intel_context *intel,
- GLfloat x0, GLfloat x1,
- GLfloat y0, GLfloat y1,
- GLfloat z,
- GLuint color, /* ARGB32 */
- GLfloat s0, GLfloat s1,
- GLfloat t0, GLfloat t1);
-
void (*meta_color_mask) (struct intel_context * intel, GLboolean);
void (*meta_stencil_replace) (struct intel_context * intel,
@@ -189,12 +181,6 @@ struct intel_context
struct intel_region *back_region;
struct intel_region *depth_region;
- /**
- * This value indicates that the kernel memory manager is being used
- * instead of the fake client-side memory manager.
- */
- GLboolean ttm;
-
struct intel_batchbuffer *batch;
drm_intel_bo *first_post_swapbuffers_batch;
GLboolean no_batch_wrap;
@@ -217,10 +203,6 @@ struct intel_context
char *prevLockFile;
int prevLockLine;
- GLuint ClearColor565;
- GLuint ClearColor8888;
-
-
/* Offsets of fields within the current vertex:
*/
GLuint coloroffset;
@@ -237,6 +219,7 @@ struct intel_context
GLboolean hw_stipple;
GLboolean depth_buffer_is_float;
GLboolean no_rast;
+ GLboolean no_hw;
GLboolean always_flush_batch;
GLboolean always_flush_cache;
@@ -302,13 +285,6 @@ struct intel_context
GLboolean use_early_z;
drm_clip_rect_t fboRect; /**< cliprect for FBO rendering */
- int perf_boxes;
-
- GLuint do_usleeps;
- int do_irqs;
- GLuint irqsEmitted;
-
- GLboolean scissor;
drm_clip_rect_t draw_rect;
drm_clip_rect_t scissor_rect;
@@ -325,8 +301,6 @@ struct intel_context
GLuint lastStamp;
- GLboolean no_hw;
-
/**
* Configuration cache
*/
@@ -374,29 +348,6 @@ do { \
} while (0)
/* ================================================================
- * Color packing:
- */
-
-#define INTEL_PACKCOLOR4444(r,g,b,a) \
- ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4))
-
-#define INTEL_PACKCOLOR1555(r,g,b,a) \
- ((((r) & 0xf8) << 7) | (((g) & 0xf8) << 2) | (((b) & 0xf8) >> 3) | \
- ((a) ? 0x8000 : 0))
-
-#define INTEL_PACKCOLOR565(r,g,b) \
- ((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3))
-
-#define INTEL_PACKCOLOR8888(r,g,b,a) \
- ((a<<24) | (r<<16) | (g<<8) | b)
-
-#define INTEL_PACKCOLOR(format, r, g, b, a) \
-(format == DV_PF_555 ? INTEL_PACKCOLOR1555(r,g,b,a) : \
- (format == DV_PF_565 ? INTEL_PACKCOLOR565(r,g,b) : \
- (format == DV_PF_8888 ? INTEL_PACKCOLOR8888(r,g,b,a) : \
- 0)))
-
-/* ================================================================
* From linux kernel i386 header files, copes with odd sizes better
* than COPY_DWORDS would:
* XXX Put this in src/mesa/main/imports.h ???
diff --git a/src/mesa/drivers/dri/intel/intel_extensions.c b/src/mesa/drivers/dri/intel/intel_extensions.c
index 1682e115cc..f5fe543b5d 100644
--- a/src/mesa/drivers/dri/intel/intel_extensions.c
+++ b/src/mesa/drivers/dri/intel/intel_extensions.c
@@ -79,6 +79,7 @@ static const struct dri_extension card_extensions[] = {
{ "GL_ARB_half_float_pixel", NULL },
{ "GL_ARB_map_buffer_range", GL_ARB_map_buffer_range_functions },
{ "GL_ARB_multitexture", NULL },
+ { "GL_ARB_pixel_buffer_object", NULL },
{ "GL_ARB_point_parameters", GL_ARB_point_parameters_functions },
{ "GL_ARB_point_sprite", NULL },
{ "GL_ARB_shader_objects", GL_ARB_shader_objects_functions },
@@ -104,6 +105,8 @@ static const struct dri_extension card_extensions[] = {
{ "GL_EXT_blend_logic_op", NULL },
{ "GL_EXT_blend_subtract", NULL },
{ "GL_EXT_cull_vertex", GL_EXT_cull_vertex_functions },
+ { "GL_EXT_framebuffer_blit", GL_EXT_framebuffer_blit_functions },
+ { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
{ "GL_EXT_fog_coord", GL_EXT_fog_coord_functions },
{ "GL_EXT_gpu_program_parameters", GL_EXT_gpu_program_parameters_functions },
{ "GL_EXT_packed_depth_stencil", NULL },
@@ -176,14 +179,6 @@ static const struct dri_extension arb_oq_extensions[] = {
{ NULL, NULL }
};
-
-static const struct dri_extension ttm_extensions[] = {
- { "GL_ARB_pixel_buffer_object", NULL },
- { "GL_EXT_framebuffer_blit", GL_EXT_framebuffer_blit_functions },
- { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
- { NULL, NULL }
-};
-
static const struct dri_extension fragment_shader_extensions[] = {
{ "GL_ARB_fragment_shader", NULL },
{ NULL, NULL }
@@ -202,9 +197,6 @@ intelInitExtensions(GLcontext *ctx)
*/
driInitExtensions(ctx, card_extensions, GL_FALSE);
- if (intel->ttm)
- driInitExtensions(ctx, ttm_extensions, GL_FALSE);
-
if (IS_965(intel->intelScreen->deviceID))
driInitExtensions(ctx, brw_extensions, GL_FALSE);
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index abb3024bfb..6a565f80cf 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -224,16 +224,12 @@ int intel_miptree_pitch_align (struct intel_context *intel,
if (!mt->compressed) {
int pitch_align;
- if (intel->ttm) {
- /* XXX: Align pitch to multiple of 64 bytes for now to allow
- * render-to-texture to work in all cases. This should probably be
- * replaced at some point by some scheme to only do this when really
- * necessary.
- */
- pitch_align = 64;
- } else {
- pitch_align = 4;
- }
+ /* XXX: Align pitch to multiple of 64 bytes for now to allow
+ * render-to-texture to work in all cases. This should probably be
+ * replaced at some point by some scheme to only do this when really
+ * necessary.
+ */
+ pitch_align = 64;
if (tiling == I915_TILING_X)
pitch_align = 512;
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
index 99330b6ddf..9572b67326 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
@@ -228,10 +228,9 @@ do_blit_bitmap( GLcontext *ctx,
UNCLAMPED_FLOAT_TO_UBYTE(ubcolor[3], tmpColor[3]);
if (dst->cpp == 2)
- color = INTEL_PACKCOLOR565(ubcolor[0], ubcolor[1], ubcolor[2]);
+ color = PACK_COLOR_565(ubcolor[0], ubcolor[1], ubcolor[2]);
else
- color = INTEL_PACKCOLOR8888(ubcolor[0], ubcolor[1],
- ubcolor[2], ubcolor[3]);
+ color = PACK_COLOR_8888(ubcolor[3], ubcolor[0], ubcolor[1], ubcolor[2]);
if (!intel_check_blit_fragment_ops(ctx, tmpColor[3] == 1.0F))
return GL_FALSE;
diff --git a/src/mesa/drivers/dri/intel/intel_regions.c b/src/mesa/drivers/dri/intel/intel_regions.c
index 80975163d4..d6b9dc4446 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.c
+++ b/src/mesa/drivers/dri/intel/intel_regions.c
@@ -542,55 +542,18 @@ intel_recreate_static(struct intel_context *intel,
region->buffer = NULL;
}
- if (intel->ttm) {
- assert(region_desc->bo_handle != -1);
- region->buffer = intel_bo_gem_create_from_name(intel->bufmgr,
- name,
- region_desc->bo_handle);
-
- ret = dri_bo_get_tiling(region->buffer, &region->tiling,
- &region->bit_6_swizzle);
- if (ret != 0) {
- fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
- region_desc->bo_handle, name, strerror(-ret));
- intel_region_release(&region);
- return NULL;
- }
- } else {
- if (region->classic_map != NULL) {
- drmUnmap(region->classic_map,
- region->pitch * region->cpp * region->height);
- region->classic_map = NULL;
- }
- ret = drmMap(intel->driFd, region_desc->handle,
- region->pitch * region->cpp * region->height,
- &region->classic_map);
- if (ret != 0) {
- fprintf(stderr, "Failed to drmMap %s buffer\n", name);
- free(region);
- return NULL;
- }
-
- region->buffer = intel_bo_fake_alloc_static(intel->bufmgr,
+ assert(region_desc->bo_handle != -1);
+ region->buffer = intel_bo_gem_create_from_name(intel->bufmgr,
name,
- region_desc->offset,
- region->pitch * region->cpp *
- region->height,
- region->classic_map);
-
- /* The sarea just gives us a boolean for whether it's tiled or not,
- * instead of which tiling mode it is. Guess.
- */
- if (region_desc->tiled) {
- if (intel->gen >= 4 && region_desc == &intelScreen->depth)
- region->tiling = I915_TILING_Y;
- else
- region->tiling = I915_TILING_X;
- } else {
- region->tiling = I915_TILING_NONE;
- }
+ region_desc->bo_handle);
- region->bit_6_swizzle = I915_BIT_6_SWIZZLE_NONE;
+ ret = dri_bo_get_tiling(region->buffer, &region->tiling,
+ &region->bit_6_swizzle);
+ if (ret != 0) {
+ fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
+ region_desc->bo_handle, name, strerror(-ret));
+ intel_region_release(&region);
+ return NULL;
}
assert(region->buffer != NULL);
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index 789135b49f..2c5a884a9b 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -605,7 +605,6 @@ intelFillInModes(__DRIscreenPrivate *psp,
static GLboolean
intel_init_bufmgr(intelScreenPrivate *intelScreen)
{
- GLboolean gem_disable = getenv("INTEL_NO_GEM") != NULL;
int gem_kernel = 0;
GLboolean gem_supported;
struct drm_i915_getparam gp;
@@ -622,43 +621,24 @@ intel_init_bufmgr(intelScreenPrivate *intelScreen)
/* If we've got a new enough DDX that's initializing GEM and giving us
* object handles for the shared buffers, use that.
*/
- intelScreen->ttm = GL_FALSE;
if (intelScreen->driScrnPriv->dri2.enabled)
gem_supported = GL_TRUE;
else if (intelScreen->driScrnPriv->ddx_version.minor >= 9 &&
gem_kernel &&
intelScreen->front.bo_handle != -1)
gem_supported = GL_TRUE;
- else
- gem_supported = GL_FALSE;
-
- if (!gem_disable && gem_supported) {
- intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ);
- if (intelScreen->bufmgr != NULL)
- intelScreen->ttm = GL_TRUE;
+ else {
+ fprintf(stderr, "[%s:%u] Error initializing GEM.\n",
+ __func__, __LINE__);
+ return GL_FALSE;
}
+
+ intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ);
/* Otherwise, use the classic buffer manager. */
if (intelScreen->bufmgr == NULL) {
- if (gem_disable) {
- _mesa_warning(NULL, "GEM disabled. Using classic.");
- } else {
- _mesa_warning(NULL,
- "Failed to initialize GEM. Falling back to classic.");
- }
-
- if (intelScreen->tex.size == 0) {
- fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
- __func__, __LINE__);
- return GL_FALSE;
- }
-
- intelScreen->bufmgr =
- intel_bufmgr_fake_init(spriv->fd,
- intelScreen->tex.offset,
- intelScreen->tex.map,
- intelScreen->tex.size,
- (unsigned int * volatile)
- &intelScreen->sarea->last_dispatch);
+ fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
+ __func__, __LINE__);
+ return GL_FALSE;
}
if (intel_get_param(spriv, I915_PARAM_NUM_FENCES_AVAIL, &num_fences))
diff --git a/src/mesa/drivers/dri/intel/intel_screen.h b/src/mesa/drivers/dri/intel/intel_screen.h
index a9b9e109a6..14ca0903b6 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.h
+++ b/src/mesa/drivers/dri/intel/intel_screen.h
@@ -77,7 +77,6 @@ typedef struct
GLboolean no_hw;
GLboolean no_vbo;
- int ttm;
dri_bufmgr *bufmgr;
GLboolean kernel_exec_fencing;
diff --git a/src/mesa/drivers/dri/intel/intel_span.c b/src/mesa/drivers/dri/intel/intel_span.c
index 3607c7dded..2c89a66a95 100644
--- a/src/mesa/drivers/dri/intel/intel_span.c
+++ b/src/mesa/drivers/dri/intel/intel_span.c
@@ -613,15 +613,7 @@ intel_set_span_functions(struct intel_context *intel,
struct gl_renderbuffer *rb)
{
struct intel_renderbuffer *irb = (struct intel_renderbuffer *) rb;
- uint32_t tiling;
-
- /* If in GEM mode, we need to do the tile address swizzling ourselves,
- * instead of the fence registers handling it.
- */
- if (intel->ttm)
- tiling = irb->region->tiling;
- else
- tiling = I915_TILING_NONE;
+ uint32_t tiling = irb->region->tiling;
if (intel->intelScreen->kernel_exec_fencing) {
switch (irb->texformat) {
@@ -673,6 +665,9 @@ intel_set_span_functions(struct intel_context *intel,
return;
}
+ /* If in GEM mode, we need to do the tile address swizzling ourselves,
+ * instead of the fence registers handling it.
+ */
switch (irb->texformat) {
case MESA_FORMAT_RGB565:
switch (tiling) {
diff --git a/src/mesa/drivers/dri/intel/intel_state.c b/src/mesa/drivers/dri/intel/intel_state.c
index 4ee742377d..aefae53eb2 100644
--- a/src/mesa/drivers/dri/intel/intel_state.c
+++ b/src/mesa/drivers/dri/intel/intel_state.c
@@ -196,25 +196,6 @@ intel_translate_logic_op(GLenum opcode)
}
}
-
-static void
-intelClearColor(GLcontext *ctx, const GLfloat color[4])
-{
- struct intel_context *intel = intel_context(ctx);
- GLubyte clear[4];
-
- CLAMPED_FLOAT_TO_UBYTE(clear[0], color[0]);
- CLAMPED_FLOAT_TO_UBYTE(clear[1], color[1]);
- CLAMPED_FLOAT_TO_UBYTE(clear[2], color[2]);
- CLAMPED_FLOAT_TO_UBYTE(clear[3], color[3]);
-
- /* compute both 32 and 16-bit clear values */
- intel->ClearColor8888 = INTEL_PACKCOLOR8888(clear[0], clear[1],
- clear[2], clear[3]);
- intel->ClearColor565 = INTEL_PACKCOLOR565(clear[0], clear[1], clear[2]);
-}
-
-
/* Fallback to swrast for select and feedback.
*/
static void
@@ -229,5 +210,4 @@ void
intelInitStateFuncs(struct dd_function_table *functions)
{
functions->RenderMode = intelRenderMode;
- functions->ClearColor = intelClearColor;
}
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-03 15:44:17 +0000