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-rw-r--r--src/mesa/drivers/dri/intel/intel_blit.c3
-rw-r--r--src/mesa/drivers/dri/intel/intel_buffers.c17
-rw-r--r--src/mesa/drivers/dri/intel/intel_clear.c2
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.c24
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.h15
-rw-r--r--src/mesa/drivers/dri/intel/intel_extensions.c5
-rw-r--r--src/mesa/drivers/dri/intel/intel_fbo.c28
-rw-r--r--src/mesa/drivers/dri/intel/intel_mipmap_tree.c2
-rw-r--r--src/mesa/drivers/dri/intel/intel_pixel.c8
-rw-r--r--src/mesa/drivers/dri/intel/intel_pixel_bitmap.c4
-rw-r--r--src/mesa/drivers/dri/intel/intel_pixel_copy.c8
-rw-r--r--src/mesa/drivers/dri/intel/intel_pixel_draw.c2
-rw-r--r--src/mesa/drivers/dri/intel/intel_screen.c13
-rw-r--r--src/mesa/drivers/dri/intel/intel_swapbuffers.c2
-rw-r--r--src/mesa/drivers/dri/intel/intel_tex_copy.c7
-rw-r--r--src/mesa/drivers/dri/intel/intel_tex_format.c4
16 files changed, 85 insertions, 59 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_blit.c b/src/mesa/drivers/dri/intel/intel_blit.c
index cdf1408cd3..da9beba030 100644
--- a/src/mesa/drivers/dri/intel/intel_blit.c
+++ b/src/mesa/drivers/dri/intel/intel_blit.c
@@ -52,7 +52,6 @@ intelCopyBuffer(const __DRIdrawablePrivate * dPriv,
{
struct intel_context *intel;
- const intelScreenPrivate *intelScreen;
DBG("%s\n", __FUNCTION__);
@@ -62,8 +61,6 @@ intelCopyBuffer(const __DRIdrawablePrivate * dPriv,
if (!intel)
return;
- intelScreen = intel->intelScreen;
-
/* The LOCK_HARDWARE is required for the cliprects. Buffer offsets
* should work regardless.
*/
diff --git a/src/mesa/drivers/dri/intel/intel_buffers.c b/src/mesa/drivers/dri/intel/intel_buffers.c
index 6b12d484d8..97d56e4e67 100644
--- a/src/mesa/drivers/dri/intel/intel_buffers.c
+++ b/src/mesa/drivers/dri/intel/intel_buffers.c
@@ -191,10 +191,15 @@ intel_draw_buffer(GLcontext * ctx, struct gl_framebuffer *fb)
return;
}
- /*
- * How many color buffers are we drawing into?
+ /* How many color buffers are we drawing into?
+ *
+ * If there are zero buffers or the buffer is too big, don't configure any
+ * regions for hardware drawing. We'll fallback to software below. Not
+ * having regions set makes some of the software fallback paths faster.
*/
- if (fb->_NumColorDrawBuffers == 0) {
+ if ((fb->Width > ctx->Const.MaxRenderbufferSize)
+ || (fb->Height > ctx->Const.MaxRenderbufferSize)
+ || (fb->_NumColorDrawBuffers == 0)) {
/* writing to 0 */
colorRegions[0] = NULL;
intel->constant_cliprect = GL_TRUE;
@@ -286,6 +291,12 @@ intel_draw_buffer(GLcontext * ctx, struct gl_framebuffer *fb)
FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, GL_FALSE);
}
+ /* If we have a (packed) stencil buffer attached but no depth buffer,
+ * we still need to set up the shared depth/stencil state so we can use it.
+ */
+ if (depthRegion == NULL && irbStencil && irbStencil->region)
+ depthRegion = irbStencil->region;
+
/*
* Update depth and stencil test state
*/
diff --git a/src/mesa/drivers/dri/intel/intel_clear.c b/src/mesa/drivers/dri/intel/intel_clear.c
index f682ee3de5..956f2339ff 100644
--- a/src/mesa/drivers/dri/intel/intel_clear.c
+++ b/src/mesa/drivers/dri/intel/intel_clear.c
@@ -68,7 +68,7 @@ static void
intelClear(GLcontext *ctx, GLbitfield mask)
{
struct intel_context *intel = intel_context(ctx);
- const GLuint colorMask = *((GLuint *) & ctx->Color.ColorMask);
+ const GLuint colorMask = *((GLuint *) & ctx->Color.ColorMask[0]);
GLbitfield tri_mask = 0;
GLbitfield blit_mask = 0;
GLbitfield swrast_mask = 0;
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 1434ae530b..eccba5bd23 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -68,7 +68,7 @@ int INTEL_DEBUG = (0);
#endif
-#define DRIVER_DATE "20090712 2009Q2 RC3"
+#define DRIVER_DATE "20091221 DEVELOPMENT"
#define DRIVER_DATE_GEM "GEM " DRIVER_DATE
@@ -598,7 +598,6 @@ intelInitContext(struct intel_context *intel,
GLcontext *shareCtx = (GLcontext *) sharedContextPrivate;
__DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
intelScreenPrivate *intelScreen = (intelScreenPrivate *) sPriv->private;
- int fthrottle_mode;
int bo_reuse_mode;
if (!_mesa_initialize_context(&intel->ctx, mesaVis, shareCtx,
@@ -613,12 +612,25 @@ intelInitContext(struct intel_context *intel,
intel->sarea = intelScreen->sarea;
intel->driContext = driContextPriv;
- if (IS_965(intel->intelScreen->deviceID))
+ if (IS_965(intel->intelScreen->deviceID)) {
intel->gen = 4;
- else if (IS_9XX(intel->intelScreen->deviceID))
+ } else if (IS_9XX(intel->intelScreen->deviceID)) {
intel->gen = 3;
- else
+ if (IS_945(intel->intelScreen->deviceID)) {
+ intel->is_945 = GL_TRUE;
+ }
+ } else {
intel->gen = 2;
+ }
+
+ if (IS_IGDNG(intel->intelScreen->deviceID)) {
+ intel->is_ironlake = GL_TRUE;
+ intel->needs_ff_sync = GL_TRUE;
+ intel->has_luminance_srgb = GL_TRUE;
+ } else if (IS_G4X(intel->intelScreen->deviceID)) {
+ intel->has_luminance_srgb = GL_TRUE;
+ intel->is_g4x = GL_TRUE;
+ }
/* Dri stuff */
intel->hHWContext = driContextPriv->hHWContext;
@@ -727,8 +739,6 @@ intelInitContext(struct intel_context *intel,
intel->RenderIndex = ~0;
- fthrottle_mode = driQueryOptioni(&intel->optionCache, "fthrottle_mode");
-
if (intel->gen >= 4 && !intel->intelScreen->irq_active) {
_mesa_printf("IRQs not active. Exiting\n");
exit(1);
diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h
index 481202c971..09e8223bc7 100644
--- a/src/mesa/drivers/dri/intel/intel_context.h
+++ b/src/mesa/drivers/dri/intel/intel_context.h
@@ -176,6 +176,13 @@ struct intel_context
* Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
*/
int gen;
+ GLboolean needs_ff_sync;
+ GLboolean is_ironlake;
+ GLboolean is_g4x;
+ GLboolean is_945;
+ GLboolean has_luminance_srgb;
+
+ int urb_size;
struct intel_region *front_region;
struct intel_region *back_region;
@@ -328,14 +335,14 @@ extern char *__progname;
#define ALIGN(value, alignment) ((value + alignment - 1) & ~(alignment - 1))
#define IS_POWER_OF_TWO(val) (((val) & (val - 1)) == 0)
-static inline uint32_t
+static INLINE uint32_t
U_FIXED(float value, uint32_t frac_bits)
{
value *= (1 << frac_bits);
return value < 0 ? 0 : value;
}
-static inline uint32_t
+static INLINE uint32_t
S_FIXED(float value, uint32_t frac_bits)
{
return value * (1 << frac_bits);
@@ -539,7 +546,7 @@ is_power_of_two(uint32_t value)
return (value & (value - 1)) == 0;
}
-static inline void
+static INLINE void
intel_bo_map_gtt_preferred(struct intel_context *intel,
drm_intel_bo *bo,
GLboolean write)
@@ -550,7 +557,7 @@ intel_bo_map_gtt_preferred(struct intel_context *intel,
drm_intel_bo_map(bo, write);
}
-static inline void
+static INLINE void
intel_bo_unmap_gtt_preferred(struct intel_context *intel,
drm_intel_bo *bo)
{
diff --git a/src/mesa/drivers/dri/intel/intel_extensions.c b/src/mesa/drivers/dri/intel/intel_extensions.c
index 86dc42cc51..5ac5ce10af 100644
--- a/src/mesa/drivers/dri/intel/intel_extensions.c
+++ b/src/mesa/drivers/dri/intel/intel_extensions.c
@@ -196,11 +196,10 @@ intelInitExtensions(GLcontext *ctx)
*/
driInitExtensions(ctx, card_extensions, GL_FALSE);
- if (IS_965(intel->intelScreen->deviceID))
+ if (intel->gen >= 4)
driInitExtensions(ctx, brw_extensions, GL_FALSE);
- if (IS_915(intel->intelScreen->deviceID)
- || IS_945(intel->intelScreen->deviceID)) {
+ if (intel->gen == 3) {
driInitExtensions(ctx, i915_extensions, GL_FALSE);
if (driQueryOptionb(&intel->optionCache, "fragment_shader"))
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c
index 608f75b824..32c43ae185 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.c
+++ b/src/mesa/drivers/dri/intel/intel_fbo.c
@@ -398,8 +398,6 @@ static GLboolean
intel_update_wrapper(GLcontext *ctx, struct intel_renderbuffer *irb,
struct gl_texture_image *texImage)
{
- gl_format texFormat;
-
if (texImage->TexFormat == MESA_FORMAT_ARGB8888) {
irb->Base.DataType = GL_UNSIGNED_BYTE;
DBG("Render to RGBA8 texture OK\n");
@@ -429,14 +427,13 @@ intel_update_wrapper(GLcontext *ctx, struct intel_renderbuffer *irb,
DBG("Render to DEPTH_STENCIL texture OK\n");
}
else {
- DBG("Render to texture BAD FORMAT %d\n", texImage->TexFormat);
+ DBG("Render to texture BAD FORMAT %s\n",
+ _mesa_get_format_name(texImage->TexFormat));
return GL_FALSE;
}
irb->Base.Format = texImage->TexFormat;
- texFormat = texImage->TexFormat;
-
irb->Base.InternalFormat = texImage->InternalFormat;
irb->Base._BaseFormat = _mesa_base_fbo_format(ctx, irb->Base.InternalFormat);
irb->Base.Width = texImage->Width;
@@ -594,11 +591,21 @@ intel_validate_framebuffer(GLcontext *ctx, struct gl_framebuffer *fb)
intel_get_renderbuffer(fb, BUFFER_STENCIL);
int i;
- if (stencilRb && stencilRb != depthRb) {
- /* we only support combined depth/stencil buffers, not separate
- * stencil buffers.
- */
- fb->_Status = GL_FRAMEBUFFER_UNSUPPORTED_EXT;
+ if (depthRb && stencilRb && stencilRb != depthRb) {
+ if (ctx->DrawBuffer->Attachment[BUFFER_DEPTH].Type == GL_TEXTURE &&
+ ctx->DrawBuffer->Attachment[BUFFER_STENCIL].Type == GL_TEXTURE &&
+ (ctx->DrawBuffer->Attachment[BUFFER_DEPTH].Texture->Name ==
+ ctx->DrawBuffer->Attachment[BUFFER_STENCIL].Texture->Name)) {
+ /* OK */
+ } else {
+ /* we only support combined depth/stencil buffers, not separate
+ * stencil buffers.
+ */
+ DBG("Only supports combined depth/stencil (found %s, %s)\n",
+ depthRb ? _mesa_get_format_name(depthRb->Base.Format): "NULL",
+ stencilRb ? _mesa_get_format_name(stencilRb->Base.Format): "NULL");
+ fb->_Status = GL_FRAMEBUFFER_UNSUPPORTED_EXT;
+ }
}
for (i = 0; i < ctx->Const.MaxDrawBuffers; i++) {
@@ -609,6 +616,7 @@ intel_validate_framebuffer(GLcontext *ctx, struct gl_framebuffer *fb)
continue;
if (irb == NULL) {
+ DBG("software rendering renderbuffer\n");
fb->_Status = GL_FRAMEBUFFER_UNSUPPORTED_EXT;
continue;
}
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index 6a565f80cf..82e4150c6a 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -87,7 +87,7 @@ intel_miptree_create_internal(struct intel_context *intel,
mt->pitch = 0;
#ifdef I915
- if (IS_945(intel->intelScreen->deviceID))
+ if (intel->is_945)
ok = i945_miptree_layout(intel, mt, tiling);
else
ok = i915_miptree_layout(intel, mt, tiling);
diff --git a/src/mesa/drivers/dri/intel/intel_pixel.c b/src/mesa/drivers/dri/intel/intel_pixel.c
index 993e427a99..5142f3dcd9 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel.c
@@ -88,10 +88,10 @@ intel_check_blit_fragment_ops(GLcontext * ctx, GLboolean src_alpha_is_one)
return GL_FALSE;
}
- if (!(ctx->Color.ColorMask[0] &&
- ctx->Color.ColorMask[1] &&
- ctx->Color.ColorMask[2] &&
- ctx->Color.ColorMask[3])) {
+ if (!(ctx->Color.ColorMask[0][0] &&
+ ctx->Color.ColorMask[0][1] &&
+ ctx->Color.ColorMask[0][2] &&
+ ctx->Color.ColorMask[0][3])) {
DBG("fallback due to color masking\n");
return GL_FALSE;
}
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
index 668697cb5e..f23f94f35e 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
@@ -32,6 +32,7 @@
#include "main/mtypes.h"
#include "main/macros.h"
#include "main/bufferobj.h"
+#include "main/polygon.h"
#include "main/pixelstore.h"
#include "main/polygon.h"
#include "main/state.h"
@@ -165,7 +166,7 @@ static GLuint get_bitmap_rect(GLsizei width, GLsizei height,
* Returns the low Y value of the vertical range given, flipped according to
* whether the framebuffer is or not.
*/
-static inline int
+static INLINE int
y_flip(struct gl_framebuffer *fb, int y, int height)
{
if (fb->Name != 0)
@@ -503,6 +504,7 @@ intel_texture_bitmap(GLcontext * ctx,
meta_restore_fragment_program(&intel->meta);
meta_restore_vertex_program(&intel->meta);
+ _mesa_ActiveTextureARB(GL_TEXTURE0_ARB + old_active_texture);
_mesa_PopClientAttrib();
_mesa_PopAttrib();
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_copy.c b/src/mesa/drivers/dri/intel/intel_pixel_copy.c
index 622aaa22d6..689a00cb00 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel_copy.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel_copy.c
@@ -83,10 +83,10 @@ intel_check_copypixel_blit_fragment_ops(GLcontext * ctx)
ctx->Depth.Test ||
ctx->Fog.Enabled ||
ctx->Stencil._Enabled ||
- !ctx->Color.ColorMask[0] ||
- !ctx->Color.ColorMask[1] ||
- !ctx->Color.ColorMask[2] ||
- !ctx->Color.ColorMask[3] ||
+ !ctx->Color.ColorMask[0][0] ||
+ !ctx->Color.ColorMask[0][1] ||
+ !ctx->Color.ColorMask[0][2] ||
+ !ctx->Color.ColorMask[0][3] ||
ctx->Texture._EnabledUnits ||
ctx->FragmentProgram._Enabled ||
ctx->Color.BlendEnabled);
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_draw.c b/src/mesa/drivers/dri/intel/intel_pixel_draw.c
index 9b382e3622..b870e9315e 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel_draw.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel_draw.c
@@ -69,7 +69,6 @@ intel_stencil_drawpixels(GLcontext * ctx,
GLfloat vertices[4][2];
struct intel_renderbuffer *irb;
struct intel_renderbuffer *depth_irb;
- struct gl_renderbuffer *rb;
struct gl_pixelstore_attrib old_unpack;
GLstencil *stencil_pixels;
int row, y1, y2;
@@ -170,7 +169,6 @@ intel_stencil_drawpixels(GLcontext * ctx,
*/
depth_irb = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH);
irb = intel_create_renderbuffer(MESA_FORMAT_ARGB8888);
- rb = &irb->Base;
irb->Base.Width = depth_irb->Base.Width;
irb->Base.Height = depth_irb->Base.Height;
intel_renderbuffer_set_region(irb, depth_irb->region);
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index 2c5a884a9b..a3d676741a 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -57,7 +57,6 @@
PUBLIC const char __driConfigOptions[] =
DRI_CONF_BEGIN
DRI_CONF_SECTION_PERFORMANCE
- DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC)
/* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
* DRI_CONF_BO_REUSE_ALL
@@ -99,7 +98,7 @@ PUBLIC const char __driConfigOptions[] =
DRI_CONF_SECTION_END
DRI_CONF_END;
-const GLuint __driNConfigOptions = 12;
+const GLuint __driNConfigOptions = 11;
#ifdef USE_NEW_INTERFACE
static PFNGLXCREATECONTEXTMODES create_context_modes = NULL;
@@ -606,7 +605,6 @@ static GLboolean
intel_init_bufmgr(intelScreenPrivate *intelScreen)
{
int gem_kernel = 0;
- GLboolean gem_supported;
struct drm_i915_getparam gp;
__DRIscreenPrivate *spriv = intelScreen->driScrnPriv;
int num_fences = 0;
@@ -621,13 +619,8 @@ intel_init_bufmgr(intelScreenPrivate *intelScreen)
/* If we've got a new enough DDX that's initializing GEM and giving us
* object handles for the shared buffers, use that.
*/
- if (intelScreen->driScrnPriv->dri2.enabled)
- gem_supported = GL_TRUE;
- else if (intelScreen->driScrnPriv->ddx_version.minor >= 9 &&
- gem_kernel &&
- intelScreen->front.bo_handle != -1)
- gem_supported = GL_TRUE;
- else {
+ if (!intelScreen->driScrnPriv->dri2.enabled &&
+ intelScreen->driScrnPriv->ddx_version.minor < 9) {
fprintf(stderr, "[%s:%u] Error initializing GEM.\n",
__func__, __LINE__);
return GL_FALSE;
diff --git a/src/mesa/drivers/dri/intel/intel_swapbuffers.c b/src/mesa/drivers/dri/intel/intel_swapbuffers.c
index 7d035b9f6e..5ae1240718 100644
--- a/src/mesa/drivers/dri/intel/intel_swapbuffers.c
+++ b/src/mesa/drivers/dri/intel/intel_swapbuffers.c
@@ -56,7 +56,7 @@ intelFixupVblank(struct intel_context *intel, __DRIdrawablePrivate *dPriv)
.y2 = sarea->planeB_y + sarea->planeB_h };
GLint areaA = driIntersectArea( drw_rect, planeA_rect );
GLint areaB = driIntersectArea( drw_rect, planeB_rect );
- GLuint flags = dPriv->vblFlags;
+ GLuint flags;
/* Update vblank info
*/
diff --git a/src/mesa/drivers/dri/intel/intel_tex_copy.c b/src/mesa/drivers/dri/intel/intel_tex_copy.c
index 767d04d2f4..ef5aed32f3 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_copy.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_copy.c
@@ -109,7 +109,7 @@ do_copy_texsubimage(struct intel_context *intel,
return GL_FALSE;
}
- // intelFlush(ctx);
+ /* intelFlush(ctx); */
LOCK_HARDWARE(intel);
{
drm_intel_bo *dst_bo = intel_region_buffer(intel,
@@ -160,13 +160,14 @@ do_copy_texsubimage(struct intel_context *intel,
intelImage->mt->cpp,
src_pitch,
src->buffer,
- src->draw_offset,
+ 0,
src->tiling,
intelImage->mt->pitch,
dst_bo,
0,
intelImage->mt->region->tiling,
- x, y, image_x + dstx, image_y + dsty,
+ src->draw_x + x, src->draw_y + y,
+ image_x + dstx, image_y + dsty,
width, height,
GL_COPY)) {
UNLOCK_HARDWARE(intel);
diff --git a/src/mesa/drivers/dri/intel/intel_tex_format.c b/src/mesa/drivers/dri/intel/intel_tex_format.c
index 87efb72cc5..a7c6c45ffe 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_format.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_format.c
@@ -173,13 +173,13 @@ intelChooseTextureFormat(GLcontext * ctx, GLint internalFormat,
return MESA_FORMAT_SARGB8;
case GL_SLUMINANCE_EXT:
case GL_SLUMINANCE8_EXT:
- if (IS_G4X(intel->intelScreen->deviceID))
+ if (intel->has_luminance_srgb)
return MESA_FORMAT_SL8;
else
return MESA_FORMAT_SARGB8;
case GL_SLUMINANCE_ALPHA_EXT:
case GL_SLUMINANCE8_ALPHA8_EXT:
- if (IS_G4X(intel->intelScreen->deviceID))
+ if (intel->has_luminance_srgb)
return MESA_FORMAT_SLA8;
else
return MESA_FORMAT_SARGB8;