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Diffstat (limited to 'src/mesa/drivers/dri/r200/r200_state_init.c')
-rw-r--r--src/mesa/drivers/dri/r200/r200_state_init.c20
1 files changed, 13 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/r200/r200_state_init.c b/src/mesa/drivers/dri/r200/r200_state_init.c
index 6c5a0b79ee..e06437bd50 100644
--- a/src/mesa/drivers/dri/r200/r200_state_init.c
+++ b/src/mesa/drivers/dri/r200/r200_state_init.c
@@ -39,7 +39,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "swrast/swrast.h"
#include "vbo/vbo.h"
-#include "tnl/tnl.h"
#include "tnl/t_pipeline.h"
#include "swrast_setup/swrast_setup.h"
@@ -48,9 +47,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "r200_context.h"
#include "r200_ioctl.h"
#include "r200_state.h"
-#include "r200_tcl.h"
-#include "r200_tex.h"
-#include "r200_swtcl.h"
#include "radeon_queryobj.h"
#include "xmlpool.h"
@@ -351,6 +347,15 @@ static int check_rrb(GLcontext *ctx, struct radeon_state_atom *atom)
return atom->cmd_size;
}
+static int check_polygon_stipple(GLcontext *ctx,
+ struct radeon_state_atom *atom)
+{
+ r200ContextPtr r200 = R200_CONTEXT(ctx);
+ if (r200->hw.set.cmd[SET_RE_CNTL] & R200_STIPPLE_ENABLE)
+ return atom->cmd_size;
+ return 0;
+}
+
static void mtl_emit(GLcontext *ctx, struct radeon_state_atom *atom)
{
r200ContextPtr r200 = R200_CONTEXT(ctx);
@@ -698,7 +703,8 @@ static void tex_emit_mm(GLcontext *ctx, struct radeon_state_atom *atom)
uint32_t dwords = atom->check(ctx, atom);
int i = atom->idx;
radeonTexObj *t = r200->state.texture.unit[i].texobj;
- if (!r200->state.texture.unit[i].unitneeded)
+
+ if (!r200->state.texture.unit[i].unitneeded && !(dwords <= atom->cmd_size))
dwords -= 4;
BEGIN_BATCH_NO_AUTOSTATE(dwords);
@@ -888,7 +894,7 @@ void r200InitState( r200ContextPtr rmesa )
}
}
- ALLOC_STATE( stp, always, STP_STATE_SIZE, "STP/stp", 0 );
+ ALLOC_STATE( stp, polygon_stipple, STP_STATE_SIZE, "STP/stp", 0 );
for (i = 0; i < 6; i++)
if (rmesa->radeon.radeonScreen->kernel_mm)
@@ -1380,7 +1386,7 @@ void r200InitState( r200ContextPtr rmesa )
rmesa->hw.tex[i].cmd[TEX_PP_BORDER_COLOR] = 0;
rmesa->hw.tex[i].cmd[TEX_PP_TXFORMAT_X] =
(/* R200_TEXCOORD_PROJ | */
- 0x100000); /* Small default bias */
+ R200_LOD_BIAS_CORRECTION); /* Small default bias */
if (rmesa->radeon.radeonScreen->drmSupportsFragShader) {
rmesa->hw.tex[i].cmd[TEX_PP_TXOFFSET_NEWDRM] =
rmesa->radeon.radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP];