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Diffstat (limited to 'src/mesa/drivers/dri/r200/r200_tex.c')
-rw-r--r--src/mesa/drivers/dri/r200/r200_tex.c21
1 files changed, 5 insertions, 16 deletions
diff --git a/src/mesa/drivers/dri/r200/r200_tex.c b/src/mesa/drivers/dri/r200/r200_tex.c
index 5a21a8b9c5..a417721553 100644
--- a/src/mesa/drivers/dri/r200/r200_tex.c
+++ b/src/mesa/drivers/dri/r200/r200_tex.c
@@ -385,16 +385,7 @@ static void r200TexParameter( GLcontext *ctx, GLenum target,
case GL_TEXTURE_MAX_LEVEL:
case GL_TEXTURE_MIN_LOD:
case GL_TEXTURE_MAX_LOD:
- /* This isn't the most efficient solution but there doesn't appear to
- * be a nice alternative. Since there's no LOD clamping,
- * we just have to rely on loading the right subset of mipmap levels
- * to simulate a clamped LOD.
- */
- if (t->mt) {
- radeon_miptree_unreference(t->mt);
- t->mt = 0;
- t->validated = GL_FALSE;
- }
+ t->validated = GL_FALSE;
break;
default:
@@ -413,7 +404,7 @@ static void r200DeleteTexture(GLcontext * ctx, struct gl_texture_object *texObj)
(void *)texObj,
_mesa_lookup_enum_by_nr(texObj->Target));
}
-
+
if (rmesa) {
int i;
radeon_firevertices(&rmesa->radeon);
@@ -425,11 +416,9 @@ static void r200DeleteTexture(GLcontext * ctx, struct gl_texture_object *texObj)
}
}
}
-
- if (t->mt) {
- radeon_miptree_unreference(t->mt);
- t->mt = 0;
- }
+
+ radeon_miptree_unreference(&t->mt);
+
_mesa_delete_texture_object(ctx, texObj);
}