diff options
Diffstat (limited to 'src/mesa/drivers/dri/r200')
| -rw-r--r-- | src/mesa/drivers/dri/r200/Makefile | 8 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/r200/r200_blit.c | 186 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/r200/r200_blit.h | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/r200/r200_context.c | 6 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/r200/r200_ioctl.c | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/r200/r200_pixel.c | 494 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/r200/r200_pixel.h | 39 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/r200/r200_reg.h | 6 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/r200/r200_state.c | 11 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/r200/r200_state.h | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/r200/r200_swtcl.c | 1 | ||||
| l--------- | src/mesa/drivers/dri/r200/radeon_pixel_read.c | 1 | ||||
| l--------- | src/mesa/drivers/dri/r200/radeon_tex_getimage.c | 1 | ||||
| l--------- | src/mesa/drivers/dri/r200/radeon_tile.c | 1 | ||||
| l--------- | src/mesa/drivers/dri/r200/radeon_tile.h | 1 | ||||
| l--------- | src/mesa/drivers/dri/r200/server/radeon_dri.c | 1 |
16 files changed, 189 insertions, 573 deletions
diff --git a/src/mesa/drivers/dri/r200/Makefile b/src/mesa/drivers/dri/r200/Makefile index 14eb96c1ba..c9c1346c3a 100644 --- a/src/mesa/drivers/dri/r200/Makefile +++ b/src/mesa/drivers/dri/r200/Makefile @@ -7,8 +7,6 @@ CFLAGS += $(RADEON_CFLAGS) LIBNAME = r200_dri.so -MINIGLX_SOURCES = server/radeon_dri.c - ifeq ($(RADEON_LDFLAGS),) CS_SOURCES = radeon_cs_space_drm.c radeon_bo.c radeon_cs.c endif @@ -23,17 +21,19 @@ RADEON_COMMON_SOURCES = \ radeon_fbo.c \ radeon_lock.c \ radeon_mipmap_tree.c \ + radeon_pixel_read.c \ radeon_queryobj.c \ radeon_span.c \ radeon_texture.c \ - radeon_tex_copy.c + radeon_tex_copy.c \ + radeon_tex_getimage.c \ + radeon_tile.c DRIVER_SOURCES = r200_context.c \ r200_ioctl.c \ r200_state.c \ r200_state_init.c \ r200_cmdbuf.c \ - r200_pixel.c \ r200_tex.c \ r200_texstate.c \ r200_tcl.c \ diff --git a/src/mesa/drivers/dri/r200/r200_blit.c b/src/mesa/drivers/dri/r200/r200_blit.c index e446d532cf..e187fc0f61 100644 --- a/src/mesa/drivers/dri/r200/r200_blit.c +++ b/src/mesa/drivers/dri/r200/r200_blit.c @@ -38,7 +38,7 @@ static inline uint32_t cmdpacket0(struct radeon_screen *rscrn, } /* common formats supported as both textures and render targets */ -static unsigned is_blit_supported(gl_format mesa_format) +unsigned r200_check_blit(gl_format mesa_format) { /* XXX others? BE/LE? */ switch (mesa_format) { @@ -48,6 +48,11 @@ static unsigned is_blit_supported(gl_format mesa_format) case MESA_FORMAT_ARGB4444: case MESA_FORMAT_ARGB1555: case MESA_FORMAT_A8: + case MESA_FORMAT_L8: + case MESA_FORMAT_I8: + /* swizzled */ + case MESA_FORMAT_RGBA8888: + case MESA_FORMAT_RGBA8888_REV: break; default: return 0; @@ -86,7 +91,8 @@ static inline void emit_vtx_state(struct r200_context *r200) } static void inline emit_tx_setup(struct r200_context *r200, - gl_format mesa_format, + gl_format src_mesa_format, + gl_format dst_mesa_format, struct radeon_bo *bo, intptr_t offset, unsigned width, @@ -101,10 +107,16 @@ static void inline emit_tx_setup(struct r200_context *r200, assert(offset % 32 == 0); /* XXX others? BE/LE? */ - switch (mesa_format) { + switch (src_mesa_format) { case MESA_FORMAT_ARGB8888: txformat |= R200_TXFORMAT_ARGB8888 | R200_TXFORMAT_ALPHA_IN_MAP; break; + case MESA_FORMAT_RGBA8888: + txformat |= R200_TXFORMAT_RGBA8888 | R200_TXFORMAT_ALPHA_IN_MAP; + break; + case MESA_FORMAT_RGBA8888_REV: + txformat |= R200_TXFORMAT_ABGR8888 | R200_TXFORMAT_ALPHA_IN_MAP; + break; case MESA_FORMAT_XRGB8888: txformat |= R200_TXFORMAT_ARGB8888; break; @@ -118,26 +130,143 @@ static void inline emit_tx_setup(struct r200_context *r200, txformat |= R200_TXFORMAT_ARGB1555 | R200_TXFORMAT_ALPHA_IN_MAP; break; case MESA_FORMAT_A8: + case MESA_FORMAT_I8: txformat |= R200_TXFORMAT_I8 | R200_TXFORMAT_ALPHA_IN_MAP; break; + case MESA_FORMAT_L8: + txformat |= R200_TXFORMAT_I8; + break; + case MESA_FORMAT_AL88: + txformat |= R200_TXFORMAT_AI88 | R200_TXFORMAT_ALPHA_IN_MAP; + break; + default: + break; + } + + switch (dst_mesa_format) { + case MESA_FORMAT_ARGB8888: + case MESA_FORMAT_XRGB8888: + case MESA_FORMAT_RGB565: + case MESA_FORMAT_ARGB4444: + case MESA_FORMAT_ARGB1555: + case MESA_FORMAT_A8: + case MESA_FORMAT_L8: + case MESA_FORMAT_I8: default: + /* no swizzle required */ + BEGIN_BATCH(10); + OUT_BATCH_REGVAL(RADEON_PP_CNTL, (RADEON_TEX_0_ENABLE | + RADEON_TEX_BLEND_0_ENABLE)); + OUT_BATCH_REGVAL(R200_PP_TXCBLEND_0, (R200_TXC_ARG_A_ZERO | + R200_TXC_ARG_B_ZERO | + R200_TXC_ARG_C_R0_COLOR | + R200_TXC_OP_MADD)); + OUT_BATCH_REGVAL(R200_PP_TXCBLEND2_0, (R200_TXC_CLAMP_0_1 | + R200_TXC_OUTPUT_REG_R0)); + OUT_BATCH_REGVAL(R200_PP_TXABLEND_0, (R200_TXA_ARG_A_ZERO | + R200_TXA_ARG_B_ZERO | + R200_TXA_ARG_C_R0_ALPHA | + R200_TXA_OP_MADD)); + OUT_BATCH_REGVAL(R200_PP_TXABLEND2_0, (R200_TXA_CLAMP_0_1 | + R200_TXA_OUTPUT_REG_R0)); + END_BATCH(); + break; + case MESA_FORMAT_RGBA8888: + BEGIN_BATCH(10); + OUT_BATCH_REGVAL(RADEON_PP_CNTL, (RADEON_TEX_0_ENABLE | + RADEON_TEX_BLEND_0_ENABLE)); + OUT_BATCH_REGVAL(R200_PP_TXCBLEND_0, (R200_TXC_ARG_A_ZERO | + R200_TXC_ARG_B_ZERO | + R200_TXC_ARG_C_R0_COLOR | + R200_TXC_OP_MADD)); + OUT_BATCH_REGVAL(R200_PP_TXCBLEND2_0, (R200_TXC_CLAMP_0_1 | + R200_TXC_OUTPUT_ROTATE_GBA | + R200_TXC_OUTPUT_REG_R0)); + OUT_BATCH_REGVAL(R200_PP_TXABLEND_0, (R200_TXA_ARG_A_ZERO | + R200_TXA_ARG_B_ZERO | + R200_TXA_ARG_C_R0_ALPHA | + R200_TXA_OP_MADD)); + OUT_BATCH_REGVAL(R200_PP_TXABLEND2_0, (R200_TXA_CLAMP_0_1 | + (R200_TXA_REPL_RED << R200_TXA_REPL_ARG_C_SHIFT) | + R200_TXA_OUTPUT_REG_R0)); + END_BATCH(); + break; + case MESA_FORMAT_RGBA8888_REV: + BEGIN_BATCH(34); + OUT_BATCH_REGVAL(RADEON_PP_CNTL, (RADEON_TEX_0_ENABLE | + RADEON_TEX_BLEND_0_ENABLE | + RADEON_TEX_BLEND_1_ENABLE | + RADEON_TEX_BLEND_2_ENABLE | + RADEON_TEX_BLEND_3_ENABLE)); + /* r1.r = r0.b */ + OUT_BATCH_REGVAL(R200_PP_TXCBLEND_0, (R200_TXC_ARG_A_ZERO | + R200_TXC_ARG_B_ZERO | + R200_TXC_ARG_C_R0_COLOR | + R200_TXC_OP_MADD)); + OUT_BATCH_REGVAL(R200_PP_TXCBLEND2_0, (R200_TXC_CLAMP_0_1 | + R200_TXC_OUTPUT_MASK_R | + (R200_TXC_REPL_BLUE << R200_TXC_REPL_ARG_C_SHIFT) | + R200_TXC_OUTPUT_REG_R1)); + /* r1.a = r0.a */ + OUT_BATCH_REGVAL(R200_PP_TXABLEND_0, (R200_TXA_ARG_A_ZERO | + R200_TXA_ARG_B_ZERO | + R200_TXA_ARG_C_R0_ALPHA | + R200_TXA_OP_MADD)); + OUT_BATCH_REGVAL(R200_PP_TXABLEND2_0, (R200_TXA_CLAMP_0_1 | + R200_TXA_OUTPUT_REG_R1)); + /* r1.g = r0.g */ + OUT_BATCH_REGVAL(R200_PP_TXCBLEND_1, (R200_TXC_ARG_A_ZERO | + R200_TXC_ARG_B_ZERO | + R200_TXC_ARG_C_R0_COLOR | + R200_TXC_OP_MADD)); + OUT_BATCH_REGVAL(R200_PP_TXCBLEND2_1, (R200_TXC_CLAMP_0_1 | + R200_TXC_OUTPUT_MASK_G | + (R200_TXC_REPL_GREEN << R200_TXC_REPL_ARG_C_SHIFT) | + R200_TXC_OUTPUT_REG_R1)); + /* r1.a = r0.a */ + OUT_BATCH_REGVAL(R200_PP_TXABLEND_1, (R200_TXA_ARG_A_ZERO | + R200_TXA_ARG_B_ZERO | + R200_TXA_ARG_C_R0_ALPHA | + R200_TXA_OP_MADD)); + OUT_BATCH_REGVAL(R200_PP_TXABLEND2_1, (R200_TXA_CLAMP_0_1 | + R200_TXA_OUTPUT_REG_R1)); + /* r1.b = r0.r */ + OUT_BATCH_REGVAL(R200_PP_TXCBLEND_2, (R200_TXC_ARG_A_ZERO | + R200_TXC_ARG_B_ZERO | + R200_TXC_ARG_C_R0_COLOR | + R200_TXC_OP_MADD)); + OUT_BATCH_REGVAL(R200_PP_TXCBLEND2_2, (R200_TXC_CLAMP_0_1 | + R200_TXC_OUTPUT_MASK_B | + (R200_TXC_REPL_RED << R200_TXC_REPL_ARG_C_SHIFT) | + R200_TXC_OUTPUT_REG_R1)); + /* r1.a = r0.a */ + OUT_BATCH_REGVAL(R200_PP_TXABLEND_2, (R200_TXA_ARG_A_ZERO | + R200_TXA_ARG_B_ZERO | + R200_TXA_ARG_C_R0_ALPHA | + R200_TXA_OP_MADD)); + OUT_BATCH_REGVAL(R200_PP_TXABLEND2_2, (R200_TXA_CLAMP_0_1 | + R200_TXA_OUTPUT_REG_R1)); + /* r0.rgb = r1.rgb */ + OUT_BATCH_REGVAL(R200_PP_TXCBLEND_3, (R200_TXC_ARG_A_ZERO | + R200_TXC_ARG_B_ZERO | + R200_TXC_ARG_C_R1_COLOR | + R200_TXC_OP_MADD)); + OUT_BATCH_REGVAL(R200_PP_TXCBLEND2_3, (R200_TXC_CLAMP_0_1 | + R200_TXC_OUTPUT_REG_R0)); + /* r0.a = r1.a */ + OUT_BATCH_REGVAL(R200_PP_TXABLEND_3, (R200_TXA_ARG_A_ZERO | + R200_TXA_ARG_B_ZERO | + R200_TXA_ARG_C_R1_ALPHA | + R200_TXA_OP_MADD)); + OUT_BATCH_REGVAL(R200_PP_TXABLEND2_3, (R200_TXA_CLAMP_0_1 | + R200_TXA_OUTPUT_REG_R0)); + END_BATCH(); break; } - BEGIN_BATCH(28); - OUT_BATCH_REGVAL(RADEON_PP_CNTL, RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE); + BEGIN_BATCH(18); OUT_BATCH_REGVAL(R200_PP_CNTL_X, 0); OUT_BATCH_REGVAL(R200_PP_TXMULTI_CTL_0, 0); - OUT_BATCH_REGVAL(R200_PP_TXCBLEND_0, (R200_TXC_ARG_A_ZERO | - R200_TXC_ARG_B_ZERO | - R200_TXC_ARG_C_R0_COLOR | - R200_TXC_OP_MADD)); - OUT_BATCH_REGVAL(R200_PP_TXCBLEND2_0, R200_TXC_CLAMP_0_1 | R200_TXC_OUTPUT_REG_R0); - OUT_BATCH_REGVAL(R200_PP_TXABLEND_0, (R200_TXA_ARG_A_ZERO | - R200_TXA_ARG_B_ZERO | - R200_TXA_ARG_C_R0_ALPHA | - R200_TXA_OP_MADD)); - OUT_BATCH_REGVAL(R200_PP_TXABLEND2_0, R200_TXA_CLAMP_0_1 | R200_TXA_OUTPUT_REG_R0); OUT_BATCH_REGVAL(R200_PP_TXFILTER_0, (R200_CLAMP_S_CLAMP_LAST | R200_CLAMP_T_CLAMP_LAST | R200_MAG_FILTER_NEAREST | @@ -146,7 +275,7 @@ static void inline emit_tx_setup(struct r200_context *r200, OUT_BATCH_REGVAL(R200_PP_TXFORMAT_X_0, 0); OUT_BATCH_REGVAL(R200_PP_TXSIZE_0, ((width - 1) | ((height - 1) << RADEON_TEX_VSIZE_SHIFT))); - OUT_BATCH_REGVAL(R200_PP_TXPITCH_0, pitch * _mesa_get_format_bytes(mesa_format) - 32); + OUT_BATCH_REGVAL(R200_PP_TXPITCH_0, pitch * _mesa_get_format_bytes(src_mesa_format) - 32); OUT_BATCH_REGSEQ(R200_PP_TXOFFSET_0, 1); OUT_BATCH_RELOC(0, bo, 0, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0); @@ -170,6 +299,8 @@ static inline void emit_cb_setup(struct r200_context *r200, switch (mesa_format) { case MESA_FORMAT_ARGB8888: case MESA_FORMAT_XRGB8888: + case MESA_FORMAT_RGBA8888: + case MESA_FORMAT_RGBA8888_REV: dst_format = RADEON_COLOR_FORMAT_ARGB8888; break; case MESA_FORMAT_RGB565: @@ -182,6 +313,8 @@ static inline void emit_cb_setup(struct r200_context *r200, dst_format = RADEON_COLOR_FORMAT_ARGB1555; break; case MESA_FORMAT_A8: + case MESA_FORMAT_L8: + case MESA_FORMAT_I8: dst_format = RADEON_COLOR_FORMAT_RGB8; break; default: @@ -211,15 +344,16 @@ static GLboolean validate_buffers(struct r200_context *r200, struct radeon_bo *dst_bo) { int ret; - radeon_cs_space_add_persistent_bo(r200->radeon.cmdbuf.cs, - src_bo, RADEON_GEM_DOMAIN_VRAM, 0); - radeon_cs_space_add_persistent_bo(r200->radeon.cmdbuf.cs, - dst_bo, 0, RADEON_GEM_DOMAIN_VRAM); + radeon_cs_space_reset_bos(r200->radeon.cmdbuf.cs); + + ret = radeon_cs_space_check_with_bo(r200->radeon.cmdbuf.cs, + src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0); + if (ret) + return GL_FALSE; ret = radeon_cs_space_check_with_bo(r200->radeon.cmdbuf.cs, - first_elem(&r200->radeon.dma.reserved)->bo, - RADEON_GEM_DOMAIN_GTT, 0); + dst_bo, 0, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT); if (ret) return GL_FALSE; @@ -333,7 +467,7 @@ unsigned r200_blit(GLcontext *ctx, { struct r200_context *r200 = R200_CONTEXT(ctx); - if (!is_blit_supported(dst_mesaformat)) + if (!r200_check_blit(dst_mesaformat)) return GL_FALSE; /* Make sure that colorbuffer has even width - hw limitation */ @@ -383,15 +517,15 @@ unsigned r200_blit(GLcontext *ctx, /* Flush is needed to make sure that source buffer has correct data */ radeonFlush(r200->radeon.glCtx); - rcommonEnsureCmdBufSpace(&r200->radeon, 78, __FUNCTION__); + rcommonEnsureCmdBufSpace(&r200->radeon, 102, __FUNCTION__); if (!validate_buffers(r200, src_bo, dst_bo)) return GL_FALSE; /* 14 */ emit_vtx_state(r200); - /* 28 */ - emit_tx_setup(r200, src_mesaformat, src_bo, src_offset, src_width, src_height, src_pitch); + /* 52 */ + emit_tx_setup(r200, src_mesaformat, dst_mesaformat, src_bo, src_offset, src_width, src_height, src_pitch); /* 22 */ emit_cb_setup(r200, dst_bo, dst_offset, dst_mesaformat, dst_pitch, dst_width, dst_height); /* 14 */ diff --git a/src/mesa/drivers/dri/r200/r200_blit.h b/src/mesa/drivers/dri/r200/r200_blit.h index 38487266ae..53206f0b47 100644 --- a/src/mesa/drivers/dri/r200/r200_blit.h +++ b/src/mesa/drivers/dri/r200/r200_blit.h @@ -30,6 +30,8 @@ void r200_blit_init(struct r200_context *r200); +unsigned r200_check_blit(gl_format mesa_format); + unsigned r200_blit(GLcontext *ctx, struct radeon_bo *src_bo, intptr_t src_offset, diff --git a/src/mesa/drivers/dri/r200/r200_context.c b/src/mesa/drivers/dri/r200/r200_context.c index 6ecd46ecd9..36a29350cc 100644 --- a/src/mesa/drivers/dri/r200/r200_context.c +++ b/src/mesa/drivers/dri/r200/r200_context.c @@ -51,7 +51,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "r200_context.h" #include "r200_ioctl.h" #include "r200_state.h" -#include "r200_pixel.h" #include "r200_tex.h" #include "r200_swtcl.h" #include "r200_tcl.h" @@ -264,7 +263,9 @@ static void r200_init_vtbl(radeonContextPtr radeon) radeon->vtbl.fallback = r200Fallback; radeon->vtbl.update_scissor = r200_vtbl_update_scissor; radeon->vtbl.emit_query_finish = r200_emit_query_finish; + radeon->vtbl.check_blit = r200_check_blit; radeon->vtbl.blit = r200_blit; + radeon->vtbl.is_format_renderable = radeonIsFormatRenderable; } @@ -323,7 +324,7 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual, _mesa_init_driver_functions(&functions); r200InitDriverFuncs(&functions); r200InitIoctlFuncs(&functions); - r200InitStateFuncs(&functions); + r200InitStateFuncs(&rmesa->radeon, &functions); r200InitTextureFuncs(&rmesa->radeon, &functions); r200InitShaderFuncs(&functions); radeonInitQueryObjFunctions(&functions); @@ -472,7 +473,6 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual, /* XXX these should really go right after _mesa_init_driver_functions() */ radeon_fbo_init(&rmesa->radeon); radeonInitSpanFuncs( ctx ); - r200InitPixelFuncs( ctx ); r200InitTnlFuncs( ctx ); r200InitState( rmesa ); r200InitSwtcl( ctx ); diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.c b/src/mesa/drivers/dri/r200/r200_ioctl.c index a1b505707e..b72f69b7f4 100644 --- a/src/mesa/drivers/dri/r200/r200_ioctl.c +++ b/src/mesa/drivers/dri/r200/r200_ioctl.c @@ -61,6 +61,8 @@ static void r200KernelClear(GLcontext *ctx, GLuint flags) GLint cx, cy, cw, ch, ret; GLuint i; + radeonEmitState(&rmesa->radeon); + LOCK_HARDWARE( &rmesa->radeon ); /* Throttle the number of clear ioctls we do. diff --git a/src/mesa/drivers/dri/r200/r200_pixel.c b/src/mesa/drivers/dri/r200/r200_pixel.c deleted file mode 100644 index bfb7e2a2ed..0000000000 --- a/src/mesa/drivers/dri/r200/r200_pixel.c +++ /dev/null @@ -1,494 +0,0 @@ -/* -Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. - -The Weather Channel (TM) funded Tungsten Graphics to develop the -initial release of the Radeon 8500 driver under the XFree86 license. -This notice must be preserved. - -Permission is hereby granted, free of charge, to any person obtaining -a copy of this software and associated documentation files (the -"Software"), to deal in the Software without restriction, including -without limitation the rights to use, copy, modify, merge, publish, -distribute, sublicense, and/or sell copies of the Software, and to -permit persons to whom the Software is furnished to do so, subject to -the following conditions: - -The above copyright notice and this permission notice (including the -next paragraph) shall be included in all copies or substantial -portions of the Software. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF -MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. -IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE -LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION -OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION -WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ - -/* - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - */ - -#include "main/glheader.h" -#include "main/enums.h" -#include "main/mtypes.h" -#include "main/macros.h" -#include "swrast/swrast.h" - -#include "r200_context.h" -#include "r200_ioctl.h" -#include "r200_pixel.h" -#include "r200_swtcl.h" - -#include "drirenderbuffer.h" - - -static GLboolean -check_color( const GLcontext *ctx, GLenum type, GLenum format, - const struct gl_pixelstore_attrib *packing, - const void *pixels, GLint sz, GLint pitch ) -{ - r200ContextPtr rmesa = R200_CONTEXT(ctx); - GLuint cpp = rmesa->radeon.radeonScreen->cpp; - - if (R200_DEBUG & RADEON_PIXEL) - fprintf(stderr, "%s\n", __FUNCTION__); - - if ( (pitch & 63) || - ctx->_ImageTransferState || - packing->SwapBytes || - packing->LsbFirst) { - if (R200_DEBUG & RADEON_PIXEL) - fprintf(stderr, "%s: failed 1\n", __FUNCTION__); - return GL_FALSE; - } - - if ( type == GL_UNSIGNED_INT_8_8_8_8_REV && - cpp == 4 && - format == GL_BGRA ) { - if (R200_DEBUG & RADEON_PIXEL) - fprintf(stderr, "%s: passed 2\n", __FUNCTION__); - return GL_TRUE; - } - - if (R200_DEBUG & RADEON_PIXEL) - fprintf(stderr, "%s: failed\n", __FUNCTION__); - - return GL_FALSE; -} - -static GLboolean -check_color_per_fragment_ops( const GLcontext *ctx ) -{ - int result; - result = (!( ctx->Color.AlphaEnabled || - ctx->Depth.Test || - ctx->Fog.Enabled || - ctx->Scissor.Enabled || - ctx->Stencil._Enabled || - !ctx->Color.ColorMask[0][0] || - !ctx->Color.ColorMask[0][1] || - !ctx->Color.ColorMask[0][2] || - !ctx->Color.ColorMask[0][3] || - ctx->Color.ColorLogicOpEnabled || - ctx->Texture._EnabledUnits - ) && - ctx->Current.RasterPosValid); - - return result; -} - - -#if 0 -static GLboolean -clip_pixelrect( const GLcontext *ctx, - const GLframebuffer *buffer, - GLint *x, GLint *y, - GLsizei *width, GLsizei *height, - GLint *size ) -{ - r200ContextPtr rmesa = R200_CONTEXT(ctx); - - /* left clipping */ - if (*x < buffer->_Xmin) { - *width -= (buffer->_Xmin - *x); - *x = buffer->_Xmin; - } - - /* right clipping */ - if (*x + *width > buffer->_Xmax) - *width -= (*x + *width - buffer->_Xmax - 1); - - if (*width <= 0) - return GL_FALSE; - - /* bottom clipping */ - if (*y < buffer->_Ymin) { - *height -= (buffer->_Ymin - *y); - *y = buffer->_Ymin; - } - - /* top clipping */ - if (*y + *height > buffer->_Ymax) - *height -= (*y + *height - buffer->_Ymax - 1); - - if (*height <= 0) - return GL_FALSE; - - *size = ((*y + *height - 1) * rmesa->radeon.radeonScreen->frontPitch + - (*x + *width - 1) * rmesa->radeon.radeonScreen->cpp); - - return GL_TRUE; -} -#endif - -static GLboolean -r200TryReadPixels( GLcontext *ctx, - GLint x, GLint y, GLsizei width, GLsizei height, - GLenum format, GLenum type, - const struct gl_pixelstore_attrib *pack, - GLvoid *pixels ) -{ - return GL_FALSE; -#if 0 - r200ContextPtr rmesa = R200_CONTEXT(ctx); - GLint pitch = pack->RowLength ? pack->RowLength : width; - GLint blit_format; - GLuint cpp = rmesa->radeon.radeonScreen->cpp; - GLint size = width * height * cpp; - - if (R200_DEBUG & RADEON_PIXEL) - fprintf(stderr, "%s\n", __FUNCTION__); - - /* Only accelerate reading to GART buffers. - */ - if ( !r200IsGartMemory(rmesa, pixels, - pitch * height * rmesa->radeon.radeonScreen->cpp ) ) { - if (R200_DEBUG & RADEON_PIXEL) - fprintf(stderr, "%s: dest not GART\n", __FUNCTION__); - } - - /* Need GL_PACK_INVERT_MESA to cope with upsidedown results from - * blitter: - */ - if (!pack->Invert) { - if (R200_DEBUG & RADEON_PIXEL) - fprintf(stderr, "%s: MESA_PACK_INVERT not set\n", __FUNCTION__); - return GL_FALSE; - } - - if (!check_color(ctx, type, format, pack, pixels, size, pitch)) - return GL_FALSE; - - switch ( rmesa->radeon.radeonScreen->cpp ) { - case 4: - blit_format = R200_CP_COLOR_FORMAT_ARGB8888; - break; - default: - return GL_FALSE; - } - - - /* Although the blits go on the command buffer, need to do this and - * fire with lock held to guarentee cliprects and drawOffset are - * correct. - * - * This is an unusual situation however, as the code which flushes - * a full command buffer expects to be called unlocked. As a - * workaround, immediately flush the buffer on aquiring the lock. - */ - LOCK_HARDWARE( &rmesa->radeon ); - - if (rmesa->store.cmd_used) - rcommonFlushCmdBufLocked( &rmesa->radeon, __FUNCTION__ ); - - if (!clip_pixelrect(ctx, ctx->ReadBuffer, &x, &y, &width, &height, - &size)) { - UNLOCK_HARDWARE( &rmesa->radeon ); - if (R200_DEBUG & RADEON_PIXEL) - fprintf(stderr, "%s totally clipped -- nothing to do\n", - __FUNCTION__); - return GL_TRUE; - } - - { - __DRIdrawable *dPriv = rmesa->radeon.dri.drawable; - driRenderbuffer *drb = (driRenderbuffer *) ctx->ReadBuffer->_ColorReadBuffer; - int nbox = dPriv->numClipRects; - int src_offset = drb->offset - + rmesa->radeon.radeonScreen->fbLocation; - int src_pitch = drb->pitch * drb->cpp; - int dst_offset = r200GartOffsetFromVirtual( rmesa, pixels ); - int dst_pitch = pitch * rmesa->radeon.radeonScreen->cpp; - drm_clip_rect_t *box = dPriv->pClipRects; - int i; - - r200EmitWait( rmesa, RADEON_WAIT_3D ); - - y = dPriv->h - y - height; - x += dPriv->x; - y += dPriv->y; - - - if (R200_DEBUG & RADEON_PIXEL) - fprintf(stderr, "readpixel blit src_pitch %d dst_pitch %d\n", - src_pitch, dst_pitch); - - for (i = 0 ; i < nbox ; i++) - { - GLint bx = box[i].x1; - GLint by = box[i].y1; - GLint bw = box[i].x2 - bx; - GLint bh = box[i].y2 - by; - - if (bx < x) bw -= x - bx, bx = x; - if (by < y) bh -= y - by, by = y; - if (bx + bw > x + width) bw = x + width - bx; - if (by + bh > y + height) bh = y + height - by; - if (bw <= 0) continue; - if (bh <= 0) continue; - - r200EmitBlit( rmesa, - blit_format, - src_pitch, src_offset, - dst_pitch, dst_offset, - bx, by, - bx - x, by - y, - bw, bh ); - } - - rcommonFlushCmdBufLocked( &rmesa->radeon, __FUNCTION__ ); - } - UNLOCK_HARDWARE( &rmesa->radeon ); - - radeonFinish( ctx ); /* required by GL */ -#endif - return GL_TRUE; -} - -static void -r200ReadPixels( GLcontext *ctx, - GLint x, GLint y, GLsizei width, GLsizei height, - GLenum format, GLenum type, - const struct gl_pixelstore_attrib *pack, - GLvoid *pixels ) -{ - if (R200_DEBUG & RADEON_PIXEL) - fprintf(stderr, "%s\n", __FUNCTION__); - - if (!r200TryReadPixels( ctx, x, y, width, height, format, type, pack, - pixels)) - _swrast_ReadPixels( ctx, x, y, width, height, format, type, pack, - pixels); -} - - - - -static void do_draw_pix( GLcontext *ctx, - GLint x, GLint y, GLsizei width, GLsizei height, - GLint pitch, - const void *pixels, - GLuint planemask) -{ - if (R200_DEBUG & RADEON_PIXEL) - fprintf(stderr, "%s\n", __FUNCTION__); - -#if 0 - r200ContextPtr rmesa = R200_CONTEXT(ctx); - __DRIdrawable *dPriv = radeon_get_drawable(&rmesa->radeon); - drm_clip_rect_t *box = dPriv->pClipRects; - struct gl_renderbuffer *rb = ctx->ReadBuffer->_ColorDrawBuffers[0]; - driRenderbuffer *drb = (driRenderbuffer *) rb; - int nbox = dPriv->numClipRects; - int i; - int blit_format; - int size; - int src_offset = r200GartOffsetFromVirtual( rmesa, pixels ); - int src_pitch = pitch * rmesa->radeon.radeonScreen->cpp; - - switch ( rmesa->radeon.radeonScreen->cpp ) { - case 2: - blit_format = R200_CP_COLOR_FORMAT_RGB565; - break; - case 4: - blit_format = R200_CP_COLOR_FORMAT_ARGB8888; - break; - default: - return; - } - - - LOCK_HARDWARE( &rmesa->radeon ); - - if (rmesa->store.cmd_used) - rcommonFlushCmdBufLocked( &rmesa->radeon, __FUNCTION__ ); - - y -= height; /* cope with pixel zoom */ - - if (!clip_pixelrect(ctx, ctx->DrawBuffer, - &x, &y, &width, &height, - &size)) { - UNLOCK_HARDWARE( &rmesa->radeon ); - return; - } - - y = dPriv->h - y - height; /* convert from gl to hardware coords */ - x += dPriv->x; - y += dPriv->y; - - - r200EmitWait( rmesa, RADEON_WAIT_3D ); - - for (i = 0 ; i < nbox ; i++ ) - { - GLint bx = box[i].x1; - GLint by = box[i].y1; - GLint bw = box[i].x2 - bx; - GLint bh = box[i].y2 - by; - - if (bx < x) bw -= x - bx, bx = x; - if (by < y) bh -= y - by, by = y; - if (bx + bw > x + width) bw = x + width - bx; - if (by + bh > y + height) bh = y + height - by; - if (bw <= 0) continue; - if (bh <= 0) continue; - - r200EmitBlit( rmesa, - blit_format, - src_pitch, src_offset, - drb->pitch * drb->cpp, - drb->offset + rmesa->radeon.radeonScreen->fbLocation, - bx - x, by - y, - bx, by, - bw, bh ); - } - - rcommonFlushCmdBufLocked( &rmesa->radeon, __FUNCTION__ ); - radeonWaitForIdleLocked( &rmesa->radeon ); /* required by GL */ - UNLOCK_HARDWARE( &rmesa->radeon ); -#endif -} - - - - -static GLboolean -r200TryDrawPixels( GLcontext *ctx, - GLint x, GLint y, GLsizei width, GLsizei height, - GLenum format, GLenum type, - const struct gl_pixelstore_attrib *unpack, - const GLvoid *pixels ) -{ - r200ContextPtr rmesa = R200_CONTEXT(ctx); - GLint pitch = unpack->RowLength ? unpack->RowLength : width; - GLuint planemask; - GLuint cpp = rmesa->radeon.radeonScreen->cpp; - GLint size = height * pitch * cpp; - - if (R200_DEBUG & RADEON_PIXEL) - fprintf(stderr, "%s\n", __FUNCTION__); - - /* check that we're drawing to exactly one color buffer */ - if (ctx->DrawBuffer->_NumColorDrawBuffers != 1) - return GL_FALSE; - - switch (format) { - case GL_RGB: - case GL_RGBA: - case GL_BGRA: - planemask = radeonPackColor(cpp, - ctx->Color.ColorMask[0][RCOMP], - ctx->Color.ColorMask[0][GCOMP], - ctx->Color.ColorMask[0][BCOMP], - ctx->Color.ColorMask[0][ACOMP]); - - if (cpp == 2) - planemask |= planemask << 16; - - if (planemask != ~0) - return GL_FALSE; /* fix me -- should be possible */ - - /* Can't do conversions on GART reads/draws. - */ - if ( !r200IsGartMemory( rmesa, pixels, size ) ) { - if (R200_DEBUG & RADEON_PIXEL) - fprintf(stderr, "%s: not GART memory\n", __FUNCTION__); - return GL_FALSE; - } - - if (!check_color(ctx, type, format, unpack, pixels, size, pitch)) { - return GL_FALSE; - } - if (!check_color_per_fragment_ops(ctx)) { - return GL_FALSE; - } - - if (ctx->Pixel.ZoomX != 1.0F || - ctx->Pixel.ZoomY != -1.0F) - return GL_FALSE; - break; - - default: - return GL_FALSE; - } - - if (0)// r200IsGartMemory(rmesa, pixels, size) ) - { - do_draw_pix( ctx, x, y, width, height, pitch, pixels, planemask ); - return GL_TRUE; - } - else if (0) - { - /* Pixels is in regular memory -- get dma buffers and perform - * upload through them. - */ - } - else - return GL_FALSE; -} - -static void -r200DrawPixels( GLcontext *ctx, - GLint x, GLint y, GLsizei width, GLsizei height, - GLenum format, GLenum type, - const struct gl_pixelstore_attrib *unpack, - const GLvoid *pixels ) -{ - if (R200_DEBUG & RADEON_PIXEL) - fprintf(stderr, "%s\n", __FUNCTION__); - - if (!r200TryDrawPixels( ctx, x, y, width, height, format, type, - unpack, pixels )) - _swrast_DrawPixels( ctx, x, y, width, height, format, type, - unpack, pixels ); -} - - -static void -r200Bitmap( GLcontext *ctx, GLint px, GLint py, - GLsizei width, GLsizei height, - const struct gl_pixelstore_attrib *unpack, - const GLubyte *bitmap ) -{ - r200ContextPtr rmesa = R200_CONTEXT(ctx); - - if (rmesa->radeon.Fallback) - _swrast_Bitmap( ctx, px, py, width, height, unpack, bitmap ); - else - r200PointsBitmap( ctx, px, py, width, height, unpack, bitmap ); -} - - - -void r200InitPixelFuncs( GLcontext *ctx ) -{ - if (!getenv("R200_NO_BLITS")) { - ctx->Driver.ReadPixels = r200ReadPixels; - ctx->Driver.DrawPixels = r200DrawPixels; - if (getenv("R200_HW_BITMAP")) - ctx->Driver.Bitmap = r200Bitmap; - } -} diff --git a/src/mesa/drivers/dri/r200/r200_pixel.h b/src/mesa/drivers/dri/r200/r200_pixel.h deleted file mode 100644 index e62aa05d74..0000000000 --- a/src/mesa/drivers/dri/r200/r200_pixel.h +++ /dev/null @@ -1,39 +0,0 @@ -/* -Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. - -The Weather Channel (TM) funded Tungsten Graphics to develop the -initial release of the Radeon 8500 driver under the XFree86 license. -This notice must be preserved. - -Permission is hereby granted, free of charge, to any person obtaining -a copy of this software and associated documentation files (the -"Software"), to deal in the Software without restriction, including -without limitation the rights to use, copy, modify, merge, publish, -distribute, sublicense, and/or sell copies of the Software, and to -permit persons to whom the Software is furnished to do so, subject to -the following conditions: - -The above copyright notice and this permission notice (including the -next paragraph) shall be included in all copies or substantial -portions of the Software. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF -MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. -IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE -LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION -OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION -WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ - -/* - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - */ - -#ifndef __R200_PIXEL_H__ -#define __R200_PIXEL_H__ - -extern void r200InitPixelFuncs( GLcontext *ctx ); - -#endif diff --git a/src/mesa/drivers/dri/r200/r200_reg.h b/src/mesa/drivers/dri/r200/r200_reg.h index 59115212ce..e331be223b 100644 --- a/src/mesa/drivers/dri/r200/r200_reg.h +++ b/src/mesa/drivers/dri/r200/r200_reg.h @@ -690,7 +690,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. # define R200_PVS_CNTL_1_PROGRAM_START_SHIFT 0 # define R200_PVS_CNTL_1_POS_END_SHIFT 10 # define R200_PVS_CNTL_1_PROGRAM_END_SHIFT 20 -/* Addresses are relative the the vertex program parameters area. */ +/* Addresses are relative to the vertex program parameters area. */ #define R200_VAP_PVS_CNTL_2 0x22d4 # define R200_PVS_CNTL_2_PARAM_OFFSET_SHIFT 0 # define R200_PVS_CNTL_2_PARAM_COUNT_SHIFT 16 @@ -1265,6 +1265,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define R200_TXC_OUTPUT_MASK_G (5 << 20) #define R200_TXC_OUTPUT_MASK_B (6 << 20) #define R200_TXC_OUTPUT_MASK_NONE (7 << 20) +#define R200_TXC_OUTPUT_ROTATE_RGB (0 << 24) +#define R200_TXC_OUTPUT_ROTATE_ARG (1 << 24) +#define R200_TXC_OUTPUT_ROTATE_GBA (2 << 24) +#define R200_TXC_OUTPUT_ROTATE_RGA (3 << 24) #define R200_TXC_REPL_NORMAL 0 #define R200_TXC_REPL_RED 1 #define R200_TXC_REPL_GREEN 2 diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c index b9ec6f428f..9c2ac05ad6 100644 --- a/src/mesa/drivers/dri/r200/r200_state.c +++ b/src/mesa/drivers/dri/r200/r200_state.c @@ -46,6 +46,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "tnl/tnl.h" #include "tnl/t_pipeline.h" #include "swrast_setup/swrast_setup.h" +#include "drivers/common/meta.h" #include "radeon_common.h" #include "radeon_mipmap_tree.h" @@ -2487,7 +2488,7 @@ static void r200PolygonStipple( GLcontext *ctx, const GLubyte *mask ) } /* Initialize the driver's state functions. */ -void r200InitStateFuncs( struct dd_function_table *functions ) +void r200InitStateFuncs( radeonContextPtr radeon, struct dd_function_table *functions ) { functions->UpdateState = r200InvalidateState; functions->LightingSpaceChange = r200LightingSpaceChange; @@ -2495,13 +2496,18 @@ void r200InitStateFuncs( struct dd_function_table *functions ) functions->DrawBuffer = radeonDrawBuffer; functions->ReadBuffer = radeonReadBuffer; + if (radeon->radeonScreen->kernel_mm) { + functions->CopyPixels = _mesa_meta_CopyPixels; + functions->DrawPixels = _mesa_meta_DrawPixels; + functions->ReadPixels = radeonReadPixels; + } + functions->AlphaFunc = r200AlphaFunc; functions->BlendColor = r200BlendColor; functions->BlendEquationSeparate = r200BlendEquationSeparate; functions->BlendFuncSeparate = r200BlendFuncSeparate; functions->ClearColor = r200ClearColor; functions->ClearDepth = r200ClearDepth; - functions->ClearIndex = NULL; functions->ClearStencil = r200ClearStencil; functions->ClipPlane = r200ClipPlane; functions->ColorMask = r200ColorMask; @@ -2513,7 +2519,6 @@ void r200InitStateFuncs( struct dd_function_table *functions ) functions->Fogfv = r200Fogfv; functions->FrontFace = r200FrontFace; functions->Hint = NULL; - functions->IndexMask = NULL; functions->LightModelfv = r200LightModelfv; functions->Lightfv = r200Lightfv; functions->LineStipple = r200LineStipple; diff --git a/src/mesa/drivers/dri/r200/r200_state.h b/src/mesa/drivers/dri/r200/r200_state.h index 7b9b0c106a..327ba837e2 100644 --- a/src/mesa/drivers/dri/r200/r200_state.h +++ b/src/mesa/drivers/dri/r200/r200_state.h @@ -38,7 +38,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "r200_context.h" extern void r200InitState( r200ContextPtr rmesa ); -extern void r200InitStateFuncs( struct dd_function_table *functions ); +extern void r200InitStateFuncs( radeonContextPtr radeon, struct dd_function_table *functions ); extern void r200InitTnlFuncs( GLcontext *ctx ); extern void r200UpdateMaterial( GLcontext *ctx ); diff --git a/src/mesa/drivers/dri/r200/r200_swtcl.c b/src/mesa/drivers/dri/r200/r200_swtcl.c index e220e40b01..262fe3cdde 100644 --- a/src/mesa/drivers/dri/r200/r200_swtcl.c +++ b/src/mesa/drivers/dri/r200/r200_swtcl.c @@ -420,7 +420,6 @@ static struct { #define DO_POINTS 1 #define DO_FULL_QUAD 1 -#define HAVE_RGBA 1 #define HAVE_SPEC 1 #define HAVE_BACK_COLORS 0 #define HAVE_HW_FLATSHADE 1 diff --git a/src/mesa/drivers/dri/r200/radeon_pixel_read.c b/src/mesa/drivers/dri/r200/radeon_pixel_read.c new file mode 120000 index 0000000000..3b03803126 --- /dev/null +++ b/src/mesa/drivers/dri/r200/radeon_pixel_read.c @@ -0,0 +1 @@ +../radeon/radeon_pixel_read.c
\ No newline at end of file diff --git a/src/mesa/drivers/dri/r200/radeon_tex_getimage.c b/src/mesa/drivers/dri/r200/radeon_tex_getimage.c new file mode 120000 index 0000000000..d9836d7326 --- /dev/null +++ b/src/mesa/drivers/dri/r200/radeon_tex_getimage.c @@ -0,0 +1 @@ +../radeon/radeon_tex_getimage.c
\ No newline at end of file diff --git a/src/mesa/drivers/dri/r200/radeon_tile.c b/src/mesa/drivers/dri/r200/radeon_tile.c new file mode 120000 index 0000000000..d4bfe27da6 --- /dev/null +++ b/src/mesa/drivers/dri/r200/radeon_tile.c @@ -0,0 +1 @@ +../radeon/radeon_tile.c
\ No newline at end of file diff --git a/src/mesa/drivers/dri/r200/radeon_tile.h b/src/mesa/drivers/dri/r200/radeon_tile.h new file mode 120000 index 0000000000..31074c581e --- /dev/null +++ b/src/mesa/drivers/dri/r200/radeon_tile.h @@ -0,0 +1 @@ +../radeon/radeon_tile.h
\ No newline at end of file diff --git a/src/mesa/drivers/dri/r200/server/radeon_dri.c b/src/mesa/drivers/dri/r200/server/radeon_dri.c deleted file mode 120000 index d05847d650..0000000000 --- a/src/mesa/drivers/dri/r200/server/radeon_dri.c +++ /dev/null @@ -1 +0,0 @@ -../../radeon/server/radeon_dri.c
\ No newline at end of file |