diff options
Diffstat (limited to 'src/mesa/drivers/dri/r200')
-rw-r--r-- | src/mesa/drivers/dri/r200/Makefile | 4 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r200/r200_context.c | 16 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r200/r200_state_init.c | 12 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r200/r200_tcl.c | 15 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r200/r200_tex.c | 22 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r200/r200_texstate.c | 36 |
6 files changed, 43 insertions, 62 deletions
diff --git a/src/mesa/drivers/dri/r200/Makefile b/src/mesa/drivers/dri/r200/Makefile index 42635bf9d9..776f1e3f3f 100644 --- a/src/mesa/drivers/dri/r200/Makefile +++ b/src/mesa/drivers/dri/r200/Makefile @@ -55,8 +55,7 @@ C_SOURCES = $(COMMON_SOURCES) $(DRIVER_SOURCES) X86_SOURCES = -DRIVER_DEFINES = -DRADEON_COMMON=1 -DRADEON_COMMON_FOR_R200 \ - -Wall +DRIVER_DEFINES = -DRADEON_R200 -Wall DRI_LIB_DEPS += $(RADEON_LDFLAGS) @@ -67,4 +66,3 @@ include ../Makefile.template #INCLUDES += -I../radeon/server -symlinks: diff --git a/src/mesa/drivers/dri/r200/r200_context.c b/src/mesa/drivers/dri/r200/r200_context.c index 4e34e0986d..5f985d624d 100644 --- a/src/mesa/drivers/dri/r200/r200_context.c +++ b/src/mesa/drivers/dri/r200/r200_context.c @@ -75,7 +75,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define need_GL_NV_vertex_program #define need_GL_ARB_point_parameters #define need_GL_EXT_framebuffer_object -#include "extension_helper.h" +#include "main/remap_helper.h" #define DRIVER_DATE "20060602" @@ -115,7 +115,7 @@ static const GLubyte *r200GetString( GLcontext *ctx, GLenum name ) /* Extension strings exported by the R200 driver. */ -const struct dri_extension card_extensions[] = +static const struct dri_extension card_extensions[] = { { "GL_ARB_multitexture", NULL }, { "GL_ARB_occlusion_query", GL_ARB_occlusion_query_functions}, @@ -146,31 +146,31 @@ const struct dri_extension card_extensions[] = { NULL, NULL } }; -const struct dri_extension blend_extensions[] = { +static const struct dri_extension blend_extensions[] = { { "GL_EXT_blend_equation_separate", GL_EXT_blend_equation_separate_functions }, { "GL_EXT_blend_func_separate", GL_EXT_blend_func_separate_functions }, { NULL, NULL } }; -const struct dri_extension ARB_vp_extension[] = { +static const struct dri_extension ARB_vp_extension[] = { { "GL_ARB_vertex_program", GL_ARB_vertex_program_functions } }; -const struct dri_extension NV_vp_extension[] = { +static const struct dri_extension NV_vp_extension[] = { { "GL_NV_vertex_program", GL_NV_vertex_program_functions } }; -const struct dri_extension ATI_fs_extension[] = { +static const struct dri_extension ATI_fs_extension[] = { { "GL_ATI_fragment_shader", GL_ATI_fragment_shader_functions } }; -const struct dri_extension point_extensions[] = { +static const struct dri_extension point_extensions[] = { { "GL_ARB_point_sprite", NULL }, { "GL_ARB_point_parameters", GL_ARB_point_parameters_functions }, { NULL, NULL } }; -const struct dri_extension mm_extensions[] = { +static const struct dri_extension mm_extensions[] = { { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions }, { NULL, NULL } }; diff --git a/src/mesa/drivers/dri/r200/r200_state_init.c b/src/mesa/drivers/dri/r200/r200_state_init.c index 8553be0197..6c5a0b79ee 100644 --- a/src/mesa/drivers/dri/r200/r200_state_init.c +++ b/src/mesa/drivers/dri/r200/r200_state_init.c @@ -529,16 +529,18 @@ static void ctx_emit_cs(GLcontext *ctx, struct radeon_state_atom *atom) atom->cmd[CTX_RB3D_CNTL] &= ~(0xf << 10); if (rrb->cpp == 4) atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_ARGB8888; - else switch (rrb->base._ActualFormat) { - case GL_RGB5: + else switch (rrb->base.Format) { + case MESA_FORMAT_RGB565: atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_RGB565; break; - case GL_RGBA4: + case MESA_FORMAT_ARGB4444: atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_ARGB4444; break; - case GL_RGB5_A1: + case MESA_FORMAT_ARGB1555: atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_ARGB1555; break; + default: + _mesa_problem(ctx, "Unexpected format in ctx_emit_cs"); } cbpitch = (rrb->pitch / rrb->cpp); @@ -638,7 +640,7 @@ static void tex_emit(GLcontext *ctx, struct radeon_state_atom *atom) OUT_BATCH_TABLE(atom->cmd, 10); if (t && t->mt && !t->image_override) { - OUT_BATCH_RELOC(t->tile_bits, t->mt->bo, 0, + OUT_BATCH_RELOC(t->tile_bits, t->mt->bo, get_base_teximage_offset(t), RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0); } else if (!t) { /* workaround for old CS mechanism */ diff --git a/src/mesa/drivers/dri/r200/r200_tcl.c b/src/mesa/drivers/dri/r200/r200_tcl.c index c702910ef2..e7d48a7f29 100644 --- a/src/mesa/drivers/dri/r200/r200_tcl.c +++ b/src/mesa/drivers/dri/r200/r200_tcl.c @@ -509,25 +509,26 @@ static GLboolean r200_run_tcl_render( GLcontext *ctx, prog to a not enabled output however, so just don't mess with it. We only need to change compsel. */ GLuint out_compsel = 0; - GLuint vp_out = rmesa->curr_vp_hw->mesa_program.Base.OutputsWritten; + const GLbitfield64 vp_out = + rmesa->curr_vp_hw->mesa_program.Base.OutputsWritten; vimap_rev = &rmesa->curr_vp_hw->inputmap_rev[0]; - assert(vp_out & (1 << VERT_RESULT_HPOS)); + assert(vp_out & BITFIELD64_BIT(VERT_RESULT_HPOS)); out_compsel = R200_OUTPUT_XYZW; - if (vp_out & (1 << VERT_RESULT_COL0)) { + if (vp_out & BITFIELD64_BIT(VERT_RESULT_COL0)) { out_compsel |= R200_OUTPUT_COLOR_0; } - if (vp_out & (1 << VERT_RESULT_COL1)) { + if (vp_out & BITFIELD64_BIT(VERT_RESULT_COL1)) { out_compsel |= R200_OUTPUT_COLOR_1; } - if (vp_out & (1 << VERT_RESULT_FOGC)) { + if (vp_out & BITFIELD64_BIT(VERT_RESULT_FOGC)) { out_compsel |= R200_OUTPUT_DISCRETE_FOG; } - if (vp_out & (1 << VERT_RESULT_PSIZ)) { + if (vp_out & BITFIELD64_BIT(VERT_RESULT_PSIZ)) { out_compsel |= R200_OUTPUT_PT_SIZE; } for (i = VERT_RESULT_TEX0; i < VERT_RESULT_TEX6; i++) { - if (vp_out & (1 << i)) { + if (vp_out & BITFIELD64_BIT(i)) { out_compsel |= R200_OUTPUT_TEX_0 << (i - VERT_RESULT_TEX0); } } diff --git a/src/mesa/drivers/dri/r200/r200_tex.c b/src/mesa/drivers/dri/r200/r200_tex.c index 36d9e37d87..a417721553 100644 --- a/src/mesa/drivers/dri/r200/r200_tex.c +++ b/src/mesa/drivers/dri/r200/r200_tex.c @@ -38,7 +38,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "main/enums.h" #include "main/image.h" #include "main/simple_list.h" -#include "main/texformat.h" #include "main/texstore.h" #include "main/teximage.h" #include "main/texobj.h" @@ -386,16 +385,7 @@ static void r200TexParameter( GLcontext *ctx, GLenum target, case GL_TEXTURE_MAX_LEVEL: case GL_TEXTURE_MIN_LOD: case GL_TEXTURE_MAX_LOD: - /* This isn't the most efficient solution but there doesn't appear to - * be a nice alternative. Since there's no LOD clamping, - * we just have to rely on loading the right subset of mipmap levels - * to simulate a clamped LOD. - */ - if (t->mt) { - radeon_miptree_unreference(t->mt); - t->mt = 0; - t->validated = GL_FALSE; - } + t->validated = GL_FALSE; break; default: @@ -414,7 +404,7 @@ static void r200DeleteTexture(GLcontext * ctx, struct gl_texture_object *texObj) (void *)texObj, _mesa_lookup_enum_by_nr(texObj->Target)); } - + if (rmesa) { int i; radeon_firevertices(&rmesa->radeon); @@ -426,11 +416,9 @@ static void r200DeleteTexture(GLcontext * ctx, struct gl_texture_object *texObj) } } } - - if (t->mt) { - radeon_miptree_unreference(t->mt); - t->mt = 0; - } + + radeon_miptree_unreference(&t->mt); + _mesa_delete_texture_object(ctx, texObj); } diff --git a/src/mesa/drivers/dri/r200/r200_texstate.c b/src/mesa/drivers/dri/r200/r200_texstate.c index c94834752e..7782404a79 100644 --- a/src/mesa/drivers/dri/r200/r200_texstate.c +++ b/src/mesa/drivers/dri/r200/r200_texstate.c @@ -36,7 +36,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "main/imports.h" #include "main/context.h" #include "main/macros.h" -#include "main/texformat.h" #include "main/teximage.h" #include "main/texobj.h" #include "main/enums.h" @@ -825,20 +824,14 @@ void r200SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_fo radeon_bo_unref(rImage->bo); rImage->bo = NULL; } - if (t->mt) { - radeon_miptree_unreference(t->mt); - t->mt = NULL; - } - if (rImage->mt) { - radeon_miptree_unreference(rImage->mt); - rImage->mt = NULL; - } + + radeon_miptree_unreference(&t->mt); + radeon_miptree_unreference(&rImage->mt); + _mesa_init_teximage_fields(radeon->glCtx, target, texImage, rb->base.Width, rb->base.Height, 1, 0, rb->cpp); texImage->RowStride = rb->pitch / rb->cpp; - texImage->TexFormat = radeonChooseTextureFormat(radeon->glCtx, - internalFormat, - type, format, 0); + rImage->bo = rb->bo; radeon_bo_ref(rImage->bo); t->bo = rb->bo; @@ -1426,10 +1419,9 @@ void set_re_cntl_d3d( GLcontext *ctx, int unit, GLboolean use_d3d ) */ static void setup_hardware_state(r200ContextPtr rmesa, radeonTexObj *t) { - int firstlevel = t->mt ? t->mt->firstLevel : 0; - const struct gl_texture_image *firstImage = t->base.Image[0][firstlevel]; + const struct gl_texture_image *firstImage = t->base.Image[0][t->minLod]; GLint log2Width, log2Height, log2Depth, texelBytes; - + if ( t->bo ) { return; } @@ -1437,11 +1429,11 @@ static void setup_hardware_state(r200ContextPtr rmesa, radeonTexObj *t) log2Width = firstImage->WidthLog2; log2Height = firstImage->HeightLog2; log2Depth = firstImage->DepthLog2; - texelBytes = firstImage->TexFormat->TexelBytes; + texelBytes = _mesa_get_format_bytes(firstImage->TexFormat); if (!t->image_override) { - if (VALID_FORMAT(firstImage->TexFormat->MesaFormat)) { + if (VALID_FORMAT(firstImage->TexFormat)) { const struct tx_table *table = _mesa_little_endian() ? tx_table_le : tx_table_be; @@ -1449,17 +1441,17 @@ static void setup_hardware_state(r200ContextPtr rmesa, radeonTexObj *t) R200_TXFORMAT_ALPHA_IN_MAP); t->pp_txfilter &= ~R200_YUV_TO_RGB; - t->pp_txformat |= table[ firstImage->TexFormat->MesaFormat ].format; - t->pp_txfilter |= table[ firstImage->TexFormat->MesaFormat ].filter; + t->pp_txformat |= table[ firstImage->TexFormat ].format; + t->pp_txfilter |= table[ firstImage->TexFormat ].filter; } else { _mesa_problem(NULL, "unexpected texture format in %s", __FUNCTION__); return; } } - + t->pp_txfilter &= ~R200_MAX_MIP_LEVEL_MASK; - t->pp_txfilter |= (t->mt->lastLevel - t->mt->firstLevel) << R200_MAX_MIP_LEVEL_SHIFT; + t->pp_txfilter |= (t->maxLod - t->minLod) << R200_MAX_MIP_LEVEL_SHIFT; t->pp_txformat &= ~(R200_TXFORMAT_WIDTH_MASK | R200_TXFORMAT_HEIGHT_MASK | @@ -1504,7 +1496,7 @@ static void setup_hardware_state(r200ContextPtr rmesa, radeonTexObj *t) | ((firstImage->Height - 1) << R200_PP_TX_HEIGHTMASK_SHIFT)); if ( !t->image_override ) { - if (firstImage->IsCompressed) + if (_mesa_is_format_compressed(firstImage->TexFormat)) t->pp_txpitch = (firstImage->Width + 63) & ~(63); else t->pp_txpitch = ((firstImage->Width * texelBytes) + 63) & ~(63); |