4 files changed, 14 insertions, 11 deletions
diff --git a/src/mesa/drivers/dri/r200/r200_cmdbuf.c b/src/mesa/drivers/dri/r200/r200_cmdbuf.c
index df9dd83344..fe173b601a 100644
--- a/src/mesa/drivers/dri/r200/r200_cmdbuf.c
+++ b/src/mesa/drivers/dri/r200/r200_cmdbuf.c
@@ -213,6 +213,9 @@ void r200FlushElts(GLcontext *ctx)
    radeon_bo_unref(rmesa->radeon.tcl.elt_dma_bo);
    rmesa->radeon.tcl.elt_dma_bo = NULL;
 
+   if (R200_ELT_BUF_SZ > elt_used)
+     radeonReturnDmaRegion(rmesa, R200_ELT_BUF_SZ - elt_used);
+
    if (R200_DEBUG & DEBUG_SYNC) {
       fprintf(stderr, "%s: Syncing\n", __FUNCTION__);
       radeonFinish( rmesa->radeon.glCtx );
@@ -233,21 +236,13 @@ GLushort *r200AllocEltsOpenEnded( r200ContextPtr rmesa,
    
    radeonEmitState(&rmesa->radeon);
 
-   rmesa->radeon.tcl.elt_dma_bo = radeon_bo_open(rmesa->radeon.radeonScreen->bom,
-					  0, R200_ELT_BUF_SZ, 4,
-					  RADEON_GEM_DOMAIN_GTT, 0);
-   rmesa->radeon.tcl.elt_dma_offset = 0;
+   radeonAllocDmaRegion(&rmesa->radeon, &rmesa->radeon.tcl.elt_dma_bo,
+			&rmesa->radeon.tcl.elt_dma_offset, R200_ELT_BUF_SZ, 4);
    rmesa->tcl.elt_used = min_nr * 2;
 
-   radeon_validate_bo(&rmesa->radeon, rmesa->radeon.tcl.elt_dma_bo,
-                      RADEON_GEM_DOMAIN_GTT, 0);
-   if (radeon_revalidate_bos(rmesa->radeon.glCtx) == GL_FALSE)
-      fprintf(stderr,"failure to revalidate BOs - badness\n");
-
    radeon_bo_map(rmesa->radeon.tcl.elt_dma_bo, 1);
    retval = rmesa->radeon.tcl.elt_dma_bo->ptr + rmesa->radeon.tcl.elt_dma_offset;
    
-
    if (R200_DEBUG & DEBUG_PRIMS)
       fprintf(stderr, "%s: header prim %x \n",
 	      __FUNCTION__, primitive);
diff --git a/src/mesa/drivers/dri/r200/r200_context.c b/src/mesa/drivers/dri/r200/r200_context.c
index 241390cef7..9a92a32079 100644
--- a/src/mesa/drivers/dri/r200/r200_context.c
+++ b/src/mesa/drivers/dri/r200/r200_context.c
@@ -357,6 +357,9 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
    /* FIXME: When no memory manager is available we should set this 
     * to some reasonable value based on texture memory pool size */
    ctx->Const.MaxTextureLevels = 12;
+   ctx->Const.Max3DTextureLevels = 9;
+   ctx->Const.MaxCubeTextureLevels = 12;
+   ctx->Const.MaxTextureRectSize = 2048;
 
    ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 
diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.c b/src/mesa/drivers/dri/r200/r200_ioctl.c
index 0b3398a730..6560efdca3 100644
--- a/src/mesa/drivers/dri/r200/r200_ioctl.c
+++ b/src/mesa/drivers/dri/r200/r200_ioctl.c
@@ -196,7 +196,10 @@ static void r200Clear( GLcontext *ctx, GLbitfield mask )
    GLuint orig_mask = mask;
 
    if ( R200_DEBUG & DEBUG_IOCTL ) {
-       fprintf( stderr, "r200Clear %x %d\n", mask, rmesa->radeon.sarea->pfCurrentPage);
+	   if (rmesa->radeon.sarea)
+	       fprintf( stderr, "r200Clear %x %d\n", mask, rmesa->radeon.sarea->pfCurrentPage);
+	   else
+	       fprintf( stderr, "r200Clear %x radeon->sarea is NULL\n", mask);
    }
 
    {
diff --git a/src/mesa/drivers/dri/r200/r200_state_init.c b/src/mesa/drivers/dri/r200/r200_state_init.c
index f88ec877c5..c7df4b2587 100644
--- a/src/mesa/drivers/dri/r200/r200_state_init.c
+++ b/src/mesa/drivers/dri/r200/r200_state_init.c
@@ -585,6 +585,8 @@ static void tex_emit_cs(GLcontext *ctx, struct radeon_state_atom *atom)
    radeon_mipmap_level *lvl;
    int hastexture = 1;
 
+   if (!r200->state.texture.unit[i].unitneeded)
+        hastexture = 0;
    if (!t)
 	hastexture = 0;
    else {