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-rw-r--r--src/mesa/drivers/dri/r600/evergreen_blit.c88
-rw-r--r--src/mesa/drivers/dri/r600/evergreen_fragprog.c25
-rw-r--r--src/mesa/drivers/dri/r600/evergreen_state.c47
-rw-r--r--src/mesa/drivers/dri/r600/r600_context.c3
-rw-r--r--src/mesa/drivers/dri/r600/r600_tex.c5
-rw-r--r--src/mesa/drivers/dri/r600/r700_assembler.c85
-rw-r--r--src/mesa/drivers/dri/r600/r700_fragprog.c46
-rw-r--r--src/mesa/drivers/dri/r600/r700_state.c23
-rw-r--r--src/mesa/drivers/dri/r600/r700_vertprog.c11
9 files changed, 249 insertions, 84 deletions
diff --git a/src/mesa/drivers/dri/r600/evergreen_blit.c b/src/mesa/drivers/dri/r600/evergreen_blit.c
index fc9fa9d22c..e07da8c15b 100644
--- a/src/mesa/drivers/dri/r600/evergreen_blit.c
+++ b/src/mesa/drivers/dri/r600/evergreen_blit.c
@@ -1406,9 +1406,95 @@ eg_set_default_state(context_t *context)
num_hs_stack_entries = 85;
num_ls_stack_entries = 85;
break;
+ case CHIP_FAMILY_PALM:
+ num_ps_gprs = 93;
+ num_vs_gprs = 46;
+ num_temp_gprs = 4;
+ num_gs_gprs = 31;
+ num_es_gprs = 31;
+ num_hs_gprs = 23;
+ num_ls_gprs = 23;
+ num_ps_threads = 96;
+ num_vs_threads = 16;
+ num_gs_threads = 16;
+ num_es_threads = 16;
+ num_hs_threads = 16;
+ num_ls_threads = 16;
+ num_ps_stack_entries = 42;
+ num_vs_stack_entries = 42;
+ num_gs_stack_entries = 42;
+ num_es_stack_entries = 42;
+ num_hs_stack_entries = 42;
+ num_ls_stack_entries = 42;
+ break;
+ case CHIP_FAMILY_BARTS:
+ num_ps_gprs = 93;
+ num_vs_gprs = 46;
+ num_temp_gprs = 4;
+ num_gs_gprs = 31;
+ num_es_gprs = 31;
+ num_hs_gprs = 23;
+ num_ls_gprs = 23;
+ num_ps_threads = 128;
+ num_vs_threads = 20;
+ num_gs_threads = 20;
+ num_es_threads = 20;
+ num_hs_threads = 20;
+ num_ls_threads = 20;
+ num_ps_stack_entries = 85;
+ num_vs_stack_entries = 85;
+ num_gs_stack_entries = 85;
+ num_es_stack_entries = 85;
+ num_hs_stack_entries = 85;
+ num_ls_stack_entries = 85;
+ break;
+ case CHIP_FAMILY_TURKS:
+ num_ps_gprs = 93;
+ num_vs_gprs = 46;
+ num_temp_gprs = 4;
+ num_gs_gprs = 31;
+ num_es_gprs = 31;
+ num_hs_gprs = 23;
+ num_ls_gprs = 23;
+ num_ps_threads = 128;
+ num_vs_threads = 20;
+ num_gs_threads = 20;
+ num_es_threads = 20;
+ num_hs_threads = 20;
+ num_ls_threads = 20;
+ num_ps_stack_entries = 42;
+ num_vs_stack_entries = 42;
+ num_gs_stack_entries = 42;
+ num_es_stack_entries = 42;
+ num_hs_stack_entries = 42;
+ num_ls_stack_entries = 42;
+ break;
+ case CHIP_FAMILY_CAICOS:
+ num_ps_gprs = 93;
+ num_vs_gprs = 46;
+ num_temp_gprs = 4;
+ num_gs_gprs = 31;
+ num_es_gprs = 31;
+ num_hs_gprs = 23;
+ num_ls_gprs = 23;
+ num_ps_threads = 128;
+ num_vs_threads = 10;
+ num_gs_threads = 10;
+ num_es_threads = 10;
+ num_hs_threads = 10;
+ num_ls_threads = 10;
+ num_ps_stack_entries = 42;
+ num_vs_stack_entries = 42;
+ num_gs_stack_entries = 42;
+ num_es_stack_entries = 42;
+ num_hs_stack_entries = 42;
+ num_ls_stack_entries = 42;
+ break;
}
- if (context->radeon.radeonScreen->chip_family == CHIP_FAMILY_CEDAR)
+ if ((context->radeon.radeonScreen->chip_family == CHIP_FAMILY_CEDAR) ||
+ (context->radeon.radeonScreen->chip_family == CHIP_FAMILY_PALM) ||
+ (context->radeon.radeonScreen->chip_family == CHIP_FAMILY_CAICOS))
CLEARbit(sq_config, EG_SQ_CONFIG__VC_ENABLE_bit);
else
SETbit(sq_config, EG_SQ_CONFIG__VC_ENABLE_bit);
diff --git a/src/mesa/drivers/dri/r600/evergreen_fragprog.c b/src/mesa/drivers/dri/r600/evergreen_fragprog.c
index cfb923efdd..e527c379b6 100644
--- a/src/mesa/drivers/dri/r600/evergreen_fragprog.c
+++ b/src/mesa/drivers/dri/r600/evergreen_fragprog.c
@@ -624,10 +624,7 @@ GLboolean evergreenSetupFragmentProgram(struct gl_context * ctx)
SETbit(evergreen->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
SETfield(evergreen->SPI_PS_INPUT_CNTL[ui].u32All, ui,
SEMANTIC_shift, SEMANTIC_mask);
- if (evergreen->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
- SETbit(evergreen->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
- else
- CLEARbit(evergreen->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
+ CLEARbit(evergreen->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
}
unBit = 1 << VERT_RESULT_COL0;
@@ -663,10 +660,7 @@ GLboolean evergreenSetupFragmentProgram(struct gl_context * ctx)
SETbit(evergreen->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
SETfield(evergreen->SPI_PS_INPUT_CNTL[ui].u32All, ui,
SEMANTIC_shift, SEMANTIC_mask);
- if (evergreen->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
- SETbit(evergreen->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
- else
- CLEARbit(evergreen->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
+ CLEARbit(evergreen->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
}
for(i=0; i<8; i++)
@@ -694,10 +688,7 @@ GLboolean evergreenSetupFragmentProgram(struct gl_context * ctx)
SETbit(evergreen->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
SETfield(evergreen->SPI_PS_INPUT_CNTL[ui].u32All, ui,
SEMANTIC_shift, SEMANTIC_mask);
- if (evergreen->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
- SETbit(evergreen->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
- else
- CLEARbit(evergreen->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
+ CLEARbit(evergreen->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
}
unBit = 1 << FRAG_ATTRIB_PNTC;
if(mesa_fp->Base.InputsRead & unBit)
@@ -706,10 +697,7 @@ GLboolean evergreenSetupFragmentProgram(struct gl_context * ctx)
SETbit(evergreen->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
SETfield(evergreen->SPI_PS_INPUT_CNTL[ui].u32All, ui,
SEMANTIC_shift, SEMANTIC_mask);
- if (evergreen->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
- SETbit(evergreen->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
- else
- CLEARbit(evergreen->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
+ CLEARbit(evergreen->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
SETbit(evergreen->SPI_PS_INPUT_CNTL[ui].u32All, PT_SPRITE_TEX_bit);
}
@@ -725,10 +713,7 @@ GLboolean evergreenSetupFragmentProgram(struct gl_context * ctx)
SETbit(evergreen->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
SETfield(evergreen->SPI_PS_INPUT_CNTL[ui].u32All, ui,
SEMANTIC_shift, SEMANTIC_mask);
- if (evergreen->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
- SETbit(evergreen->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
- else
- CLEARbit(evergreen->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
+ CLEARbit(evergreen->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
}
}
diff --git a/src/mesa/drivers/dri/r600/evergreen_state.c b/src/mesa/drivers/dri/r600/evergreen_state.c
index 076a608573..309c93fe08 100644
--- a/src/mesa/drivers/dri/r600/evergreen_state.c
+++ b/src/mesa/drivers/dri/r600/evergreen_state.c
@@ -32,6 +32,7 @@
#include "main/context.h"
#include "main/dd.h"
#include "main/simple_list.h"
+#include "main/state.h"
#include "tnl/tnl.h"
#include "tnl/t_pipeline.h"
@@ -342,7 +343,7 @@ static void evergreenSetBlendState(struct gl_context * ctx) //diff : CB_COLOR_CO
EVERGREEN_STATECHANGE(context, cb);
- if (RGBA_LOGICOP_ENABLED(ctx) || !ctx->Color.BlendEnabled) {
+ if (_mesa_rgba_logicop_enabled(ctx) || !ctx->Color.BlendEnabled) {
SETfield(blend_reg,
BLEND_ONE, COLOR_SRCBLEND_shift, COLOR_SRCBLEND_mask);
SETfield(blend_reg,
@@ -363,13 +364,13 @@ static void evergreenSetBlendState(struct gl_context * ctx) //diff : CB_COLOR_CO
}
SETfield(blend_reg,
- evergreenblend_factor(ctx->Color.BlendSrcRGB, GL_TRUE),
+ evergreenblend_factor(ctx->Color.Blend[0].SrcRGB, GL_TRUE),
COLOR_SRCBLEND_shift, COLOR_SRCBLEND_mask);
SETfield(blend_reg,
- evergreenblend_factor(ctx->Color.BlendDstRGB, GL_FALSE),
+ evergreenblend_factor(ctx->Color.Blend[0].DstRGB, GL_FALSE),
COLOR_DESTBLEND_shift, COLOR_DESTBLEND_mask);
- switch (ctx->Color.BlendEquationRGB) {
+ switch (ctx->Color.Blend[0].EquationRGB) {
case GL_FUNC_ADD:
eqn = COMB_DST_PLUS_SRC;
break;
@@ -401,20 +402,20 @@ static void evergreenSetBlendState(struct gl_context * ctx) //diff : CB_COLOR_CO
default:
fprintf(stderr,
"[%s:%u] Invalid RGB blend equation (0x%04x).\n",
- __FUNCTION__, __LINE__, ctx->Color.BlendEquationRGB);
+ __FUNCTION__, __LINE__, ctx->Color.Blend[0].EquationRGB);
return;
}
SETfield(blend_reg,
eqn, COLOR_COMB_FCN_shift, COLOR_COMB_FCN_mask);
SETfield(blend_reg,
- evergreenblend_factor(ctx->Color.BlendSrcA, GL_TRUE),
+ evergreenblend_factor(ctx->Color.Blend[0].SrcA, GL_TRUE),
ALPHA_SRCBLEND_shift, ALPHA_SRCBLEND_mask);
SETfield(blend_reg,
- evergreenblend_factor(ctx->Color.BlendDstA, GL_FALSE),
+ evergreenblend_factor(ctx->Color.Blend[0].DstA, GL_FALSE),
ALPHA_DESTBLEND_shift, ALPHA_DESTBLEND_mask);
- switch (ctx->Color.BlendEquationA) {
+ switch (ctx->Color.Blend[0].EquationA) {
case GL_FUNC_ADD:
eqnA = COMB_DST_PLUS_SRC;
break;
@@ -445,7 +446,7 @@ static void evergreenSetBlendState(struct gl_context * ctx) //diff : CB_COLOR_CO
default:
fprintf(stderr,
"[%s:%u] Invalid A blend equation (0x%04x).\n",
- __FUNCTION__, __LINE__, ctx->Color.BlendEquationA);
+ __FUNCTION__, __LINE__, ctx->Color.Blend[0].EquationA);
return;
}
@@ -520,7 +521,7 @@ static void evergreenSetLogicOpState(struct gl_context *ctx) //diff : CB_COLOR_C
EVERGREEN_STATECHANGE(context, cb);
- if (RGBA_LOGICOP_ENABLED(ctx))
+ if (_mesa_rgba_logicop_enabled(ctx))
SETfield(evergreen->CB_COLOR_CONTROL.u32All,
evergreen_translate_logicop(ctx->Color.LogicOp),
EG_CB_COLOR_CONTROL__ROP3_shift,
@@ -1148,7 +1149,7 @@ static void evergreenShadeModel(struct gl_context * ctx, GLenum mode) //same
static void evergreenLogicOpcode(struct gl_context *ctx, GLenum logicop) //diff
{
- if (RGBA_LOGICOP_ENABLED(ctx))
+ if (_mesa_rgba_logicop_enabled(ctx))
evergreenSetLogicOpState(ctx);
}
@@ -1469,6 +1470,30 @@ static void evergreenInitSQConfig(struct gl_context * ctx)
uMaxThreads = 192;
uMaxStackEntries = 256;
break;
+ case CHIP_FAMILY_BARTS:
+ uSqNumCfInsts = 2;
+ bVC_ENABLE = GL_TRUE;
+ uMaxGPRs = 256;
+ uPSThreadCount = 128;
+ uMaxThreads = 248;
+ uMaxStackEntries = 512;
+ break;
+ case CHIP_FAMILY_TURKS:
+ uSqNumCfInsts = 2;
+ bVC_ENABLE = GL_TRUE;
+ uMaxGPRs = 256;
+ uPSThreadCount = 128;
+ uMaxThreads = 248;
+ uMaxStackEntries = 256;
+ break;
+ case CHIP_FAMILY_CAICOS:
+ uSqNumCfInsts = 1;
+ bVC_ENABLE = GL_FALSE;
+ uMaxGPRs = 256;
+ uPSThreadCount = 128;
+ uMaxThreads = 192;
+ uMaxStackEntries = 256;
+ break;
default:
uSqNumCfInsts = 2;
bVC_ENABLE = GL_TRUE;
diff --git a/src/mesa/drivers/dri/r600/r600_context.c b/src/mesa/drivers/dri/r600/r600_context.c
index aa1891eac3..00708be199 100644
--- a/src/mesa/drivers/dri/r600/r600_context.c
+++ b/src/mesa/drivers/dri/r600/r600_context.c
@@ -44,6 +44,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "main/bufferobj.h"
#include "main/texobj.h"
#include "main/points.h"
+#include "main/mfeatures.h"
#include "swrast/swrast.h"
#include "swrast_setup/swrast_setup.h"
@@ -259,7 +260,7 @@ static void r600InitConstValues(struct gl_context *ctx, radeonScreenPtr screen)
R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
if( (context->radeon.radeonScreen->chip_family >= CHIP_FAMILY_CEDAR)
- &&(context->radeon.radeonScreen->chip_family <= CHIP_FAMILY_PALM) )
+ &&(context->radeon.radeonScreen->chip_family <= CHIP_FAMILY_CAICOS) )
{
r700->bShaderUseMemConstant = GL_TRUE;
}
diff --git a/src/mesa/drivers/dri/r600/r600_tex.c b/src/mesa/drivers/dri/r600/r600_tex.c
index c3d68c41e5..fe4f0e4866 100644
--- a/src/mesa/drivers/dri/r600/r600_tex.c
+++ b/src/mesa/drivers/dri/r600/r600_tex.c
@@ -38,6 +38,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "main/context.h"
#include "main/enums.h"
#include "main/image.h"
+#include "main/mfeatures.h"
#include "main/mipmap.h"
#include "main/simple_list.h"
#include "main/texstore.h"
@@ -264,9 +265,9 @@ static void r600SetTexFilter(radeonTexObjPtr t, GLenum minf, GLenum magf, GLfloa
static void r600SetTexBorderColor(radeonTexObjPtr t, const GLfloat color[4])
{
t->TD_PS_SAMPLER0_BORDER_ALPHA = *((uint32_t*)&(color[3]));
- t->TD_PS_SAMPLER0_BORDER_RED = *((uint32_t*)&(color[2]));
+ t->TD_PS_SAMPLER0_BORDER_BLUE = *((uint32_t*)&(color[2]));
t->TD_PS_SAMPLER0_BORDER_GREEN = *((uint32_t*)&(color[1]));
- t->TD_PS_SAMPLER0_BORDER_BLUE = *((uint32_t*)&(color[0]));
+ t->TD_PS_SAMPLER0_BORDER_RED = *((uint32_t*)&(color[0]));
SETfield(t->SQ_TEX_SAMPLER0, SQ_TEX_BORDER_COLOR_REGISTER,
BORDER_COLOR_TYPE_shift, BORDER_COLOR_TYPE_mask);
}
diff --git a/src/mesa/drivers/dri/r600/r700_assembler.c b/src/mesa/drivers/dri/r600/r700_assembler.c
index 1fa559cec1..024853c1be 100644
--- a/src/mesa/drivers/dri/r600/r700_assembler.c
+++ b/src/mesa/drivers/dri/r600/r700_assembler.c
@@ -481,6 +481,8 @@ unsigned int EG_GetNumOperands(GLuint opcode, GLuint nIsOp3)
case EG_OP2_INST_FLT_TO_INT:
case EG_OP2_INST_SIN:
case EG_OP2_INST_COS:
+ case EG_OP2_INST_FLT_TO_INT_FLOOR:
+ case EG_OP2_INST_MOVA_INT:
return 1;
default: radeon_error(
@@ -1134,7 +1136,7 @@ GLboolean EG_assemble_vfetch_instruction(r700_AssemblerBase* pAsm,
EG_VTX_WORD1__DST_SEL_W_shift,
EG_VTX_WORD1__DST_SEL_W_mask);
- SETfield(vfetch_instruction_ptr->m_Word1.val, 0, /* use format here, in r6/r7, format used set in const, need to use same */
+ SETfield(vfetch_instruction_ptr->m_Word1.val, 1,
EG_VTX_WORD1__UCF_shift,
EG_VTX_WORD1__UCF_bit);
SETfield(vfetch_instruction_ptr->m_Word1.val, data_format,
@@ -3297,23 +3299,76 @@ GLboolean assemble_ARL(r700_AssemblerBase *pAsm)
return GL_FALSE;
}
- pAsm->D.dst.opcode = SQ_OP2_INST_MOVA_FLOOR;
- setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
- pAsm->D.dst.rtype = DST_REG_TEMPORARY;
- pAsm->D.dst.reg = 0;
- pAsm->D.dst.writex = 0;
- pAsm->D.dst.writey = 0;
- pAsm->D.dst.writez = 0;
- pAsm->D.dst.writew = 0;
-
- if( GL_FALSE == assemble_src(pAsm, 0, -1) )
+ if(8 == pAsm->unAsic)
{
- return GL_FALSE;
- }
+ /* Evergreen */
- if( GL_FALSE == next_ins(pAsm) )
+ /* Float to Signed Integer Using FLOOR */
+ pAsm->D.dst.opcode = EG_OP2_INST_FLT_TO_INT_FLOOR;
+ setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
+ pAsm->D.dst.rtype = DST_REG_TEMPORARY;
+ pAsm->D.dst.reg = 0;
+ pAsm->D.dst.writex = 0;
+ pAsm->D.dst.writey = 0;
+ pAsm->D.dst.writez = 0;
+ pAsm->D.dst.writew = 0;
+
+ if( GL_FALSE == assemble_src(pAsm, 0, -1) )
+ {
+ return GL_FALSE;
+ }
+
+ if( GL_FALSE == next_ins(pAsm) )
+ {
+ return GL_FALSE;
+ }
+
+ /* Copy Signed Integer To Integer in AR and GPR */
+ pAsm->D.dst.opcode = EG_OP2_INST_MOVA_INT;
+ setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
+ pAsm->D.dst.rtype = DST_REG_TEMPORARY;
+ pAsm->D.dst.reg = 0;
+ pAsm->D.dst.writex = 0;
+ pAsm->D.dst.writey = 0;
+ pAsm->D.dst.writez = 0;
+ pAsm->D.dst.writew = 0;
+
+ if( GL_FALSE == assemble_src(pAsm, 0, -1) )
+ {
+ return GL_FALSE;
+ }
+
+ if( GL_FALSE == next_ins(pAsm) )
+ {
+ return GL_FALSE;
+ }
+ }
+ else
{
- return GL_FALSE;
+ /* r6xx/r7xx */
+
+ /* Truncate floating-point to the nearest integer
+ in the range [-256, +255], and copy to AR and
+ to a GPR.
+ */
+ pAsm->D.dst.opcode = SQ_OP2_INST_MOVA_FLOOR;
+ setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
+ pAsm->D.dst.rtype = DST_REG_TEMPORARY;
+ pAsm->D.dst.reg = 0;
+ pAsm->D.dst.writex = 0;
+ pAsm->D.dst.writey = 0;
+ pAsm->D.dst.writez = 0;
+ pAsm->D.dst.writew = 0;
+
+ if( GL_FALSE == assemble_src(pAsm, 0, -1) )
+ {
+ return GL_FALSE;
+ }
+
+ if( GL_FALSE == next_ins(pAsm) )
+ {
+ return GL_FALSE;
+ }
}
return GL_TRUE;
diff --git a/src/mesa/drivers/dri/r600/r700_fragprog.c b/src/mesa/drivers/dri/r600/r700_fragprog.c
index 2a6a39dfba..40494cd6af 100644
--- a/src/mesa/drivers/dri/r600/r700_fragprog.c
+++ b/src/mesa/drivers/dri/r600/r700_fragprog.c
@@ -47,13 +47,13 @@
void insert_wpos_code(struct gl_context *ctx, struct gl_fragment_program *fprog)
{
static const gl_state_index winstate[STATE_LENGTH]
- = { STATE_INTERNAL, STATE_FB_SIZE, 0, 0, 0};
+ = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM, 0, 0, 0};
struct prog_instruction *newInst, *inst;
GLint win_size; /* state reference */
GLuint wpos_temp; /* temp register */
int i, j;
- /* PARAM win_size = STATE_FB_SIZE */
+ /* PARAM win_size = STATE_FB_WPOS_Y_TRANSFORM */
win_size = _mesa_add_state_reference(fprog->Base.Parameters, winstate);
wpos_temp = fprog->Base.NumTemporaries++;
@@ -74,9 +74,8 @@ void insert_wpos_code(struct gl_context *ctx, struct gl_fragment_program *fprog)
_mesa_insert_instructions(&(fprog->Base), 0, 1);
newInst = fprog->Base.Instructions;
- /* invert wpos.y
- * wpos_temp.xyzw = wpos.x-yzw + winsize.0y00 */
- newInst[0].Opcode = OPCODE_ADD;
+ /* possibly invert wpos.y depending on STATE_FB_WPOS_Y_TRANSFORM var */
+ newInst[0].Opcode = OPCODE_MAD;
newInst[0].DstReg.File = PROGRAM_TEMPORARY;
newInst[0].DstReg.Index = wpos_temp;
newInst[0].DstReg.WriteMask = WRITEMASK_XYZW;
@@ -84,11 +83,14 @@ void insert_wpos_code(struct gl_context *ctx, struct gl_fragment_program *fprog)
newInst[0].SrcReg[0].File = PROGRAM_INPUT;
newInst[0].SrcReg[0].Index = FRAG_ATTRIB_WPOS;
newInst[0].SrcReg[0].Swizzle = SWIZZLE_XYZW;
- newInst[0].SrcReg[0].Negate = NEGATE_Y;
newInst[0].SrcReg[1].File = PROGRAM_STATE_VAR;
newInst[0].SrcReg[1].Index = win_size;
- newInst[0].SrcReg[1].Swizzle = MAKE_SWIZZLE4(SWIZZLE_ZERO, SWIZZLE_Y, SWIZZLE_ZERO, SWIZZLE_ZERO);
+ newInst[0].SrcReg[1].Swizzle = MAKE_SWIZZLE4(SWIZZLE_ONE, SWIZZLE_X, SWIZZLE_ONE, SWIZZLE_ONE);
+
+ newInst[0].SrcReg[2].File = PROGRAM_STATE_VAR;
+ newInst[0].SrcReg[2].Index = win_size;
+ newInst[0].SrcReg[2].Swizzle = MAKE_SWIZZLE4(SWIZZLE_ZERO, SWIZZLE_Y, SWIZZLE_ZERO, SWIZZLE_ZERO);
}
@@ -509,6 +511,7 @@ GLboolean r700SetupFragmentProgram(struct gl_context * ctx)
unsigned int ui, i;
unsigned int unNumOfReg;
unsigned int unBit;
+ unsigned int num_sq_ps_gprs;
GLuint exportCount;
GLboolean point_sprite = GL_FALSE;
@@ -619,6 +622,15 @@ GLboolean r700SetupFragmentProgram(struct gl_context * ctx)
SETfield(r700->ps.SQ_PGM_RESOURCES_PS.u32All, ui, NUM_GPRS_shift, NUM_GPRS_mask);
+ num_sq_ps_gprs = ((r700->sq_config.SQ_GPR_RESOURCE_MGMT_1.u32All & NUM_PS_GPRS_mask) >> NUM_PS_GPRS_shift);
+
+ if(ui > num_sq_ps_gprs)
+ {
+ /* care! thich changes sq - needs idle state */
+ R600_STATECHANGE(context, sq);
+ SETfield(r700->sq_config.SQ_GPR_RESOURCE_MGMT_1.u32All, ui, NUM_PS_GPRS_shift, NUM_PS_GPRS_mask);
+ }
+
CLEARbit(r700->ps.SQ_PGM_RESOURCES_PS.u32All, UNCACHED_FIRST_INST_bit);
if(fp->r700Shader.uStackSize) /* we don't use branch for now, it should be zero. */
@@ -645,10 +657,7 @@ GLboolean r700SetupFragmentProgram(struct gl_context * ctx)
SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
SEMANTIC_shift, SEMANTIC_mask);
- if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
- SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
- else
- CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
+ CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
}
unBit = 1 << VERT_RESULT_COL0;
@@ -684,10 +693,7 @@ GLboolean r700SetupFragmentProgram(struct gl_context * ctx)
SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
SEMANTIC_shift, SEMANTIC_mask);
- if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
- SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
- else
- CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
+ CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
}
for(i=0; i<8; i++)
@@ -716,10 +722,7 @@ GLboolean r700SetupFragmentProgram(struct gl_context * ctx)
SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
SEMANTIC_shift, SEMANTIC_mask);
- if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
- SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
- else
- CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
+ CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
}
unBit = 1 << FRAG_ATTRIB_PNTC;
if(mesa_fp->Base.InputsRead & unBit)
@@ -747,10 +750,7 @@ GLboolean r700SetupFragmentProgram(struct gl_context * ctx)
SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
SEMANTIC_shift, SEMANTIC_mask);
- if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
- SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
- else
- CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
+ CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
}
}
diff --git a/src/mesa/drivers/dri/r600/r700_state.c b/src/mesa/drivers/dri/r600/r700_state.c
index bd04a633b4..4d285b3648 100644
--- a/src/mesa/drivers/dri/r600/r700_state.c
+++ b/src/mesa/drivers/dri/r600/r700_state.c
@@ -32,6 +32,7 @@
#include "main/context.h"
#include "main/dd.h"
#include "main/simple_list.h"
+#include "main/state.h"
#include "tnl/tnl.h"
#include "tnl/t_pipeline.h"
@@ -453,7 +454,7 @@ static void r700SetBlendState(struct gl_context * ctx)
R600_STATECHANGE(context, blnd);
- if (RGBA_LOGICOP_ENABLED(ctx) || !ctx->Color.BlendEnabled) {
+ if (_mesa_rgba_logicop_enabled(ctx) || !ctx->Color.BlendEnabled) {
SETfield(blend_reg,
BLEND_ONE, COLOR_SRCBLEND_shift, COLOR_SRCBLEND_mask);
SETfield(blend_reg,
@@ -474,13 +475,13 @@ static void r700SetBlendState(struct gl_context * ctx)
}
SETfield(blend_reg,
- blend_factor(ctx->Color.BlendSrcRGB, GL_TRUE),
+ blend_factor(ctx->Color.Blend[0].SrcRGB, GL_TRUE),
COLOR_SRCBLEND_shift, COLOR_SRCBLEND_mask);
SETfield(blend_reg,
- blend_factor(ctx->Color.BlendDstRGB, GL_FALSE),
+ blend_factor(ctx->Color.Blend[0].DstRGB, GL_FALSE),
COLOR_DESTBLEND_shift, COLOR_DESTBLEND_mask);
- switch (ctx->Color.BlendEquationRGB) {
+ switch (ctx->Color.Blend[0].EquationRGB) {
case GL_FUNC_ADD:
eqn = COMB_DST_PLUS_SRC;
break;
@@ -512,20 +513,20 @@ static void r700SetBlendState(struct gl_context * ctx)
default:
fprintf(stderr,
"[%s:%u] Invalid RGB blend equation (0x%04x).\n",
- __FUNCTION__, __LINE__, ctx->Color.BlendEquationRGB);
+ __FUNCTION__, __LINE__, ctx->Color.Blend[0].EquationRGB);
return;
}
SETfield(blend_reg,
eqn, COLOR_COMB_FCN_shift, COLOR_COMB_FCN_mask);
SETfield(blend_reg,
- blend_factor(ctx->Color.BlendSrcA, GL_TRUE),
+ blend_factor(ctx->Color.Blend[0].SrcA, GL_TRUE),
ALPHA_SRCBLEND_shift, ALPHA_SRCBLEND_mask);
SETfield(blend_reg,
- blend_factor(ctx->Color.BlendDstA, GL_FALSE),
+ blend_factor(ctx->Color.Blend[0].DstA, GL_FALSE),
ALPHA_DESTBLEND_shift, ALPHA_DESTBLEND_mask);
- switch (ctx->Color.BlendEquationA) {
+ switch (ctx->Color.Blend[0].EquationA) {
case GL_FUNC_ADD:
eqnA = COMB_DST_PLUS_SRC;
break;
@@ -556,7 +557,7 @@ static void r700SetBlendState(struct gl_context * ctx)
default:
fprintf(stderr,
"[%s:%u] Invalid A blend equation (0x%04x).\n",
- __FUNCTION__, __LINE__, ctx->Color.BlendEquationA);
+ __FUNCTION__, __LINE__, ctx->Color.Blend[0].EquationA);
return;
}
@@ -644,7 +645,7 @@ static void r700SetLogicOpState(struct gl_context *ctx)
R600_STATECHANGE(context, blnd);
- if (RGBA_LOGICOP_ENABLED(ctx))
+ if (_mesa_rgba_logicop_enabled(ctx))
SETfield(r700->CB_COLOR_CONTROL.u32All,
translate_logicop(ctx->Color.LogicOp), ROP3_shift, ROP3_mask);
else
@@ -657,7 +658,7 @@ static void r700SetLogicOpState(struct gl_context *ctx)
*/
static void r700LogicOpcode(struct gl_context *ctx, GLenum logicop)
{
- if (RGBA_LOGICOP_ENABLED(ctx))
+ if (_mesa_rgba_logicop_enabled(ctx))
r700SetLogicOpState(ctx);
}
diff --git a/src/mesa/drivers/dri/r600/r700_vertprog.c b/src/mesa/drivers/dri/r600/r700_vertprog.c
index 7ba49d8f98..7d4be9180a 100644
--- a/src/mesa/drivers/dri/r600/r700_vertprog.c
+++ b/src/mesa/drivers/dri/r600/r700_vertprog.c
@@ -605,6 +605,7 @@ GLboolean r700SetupVertexProgram(struct gl_context * ctx)
struct gl_program_parameter_list *paramList;
unsigned int unNumParamData;
unsigned int ui;
+ unsigned int num_sq_vs_gprs;
if(GL_FALSE == vp->loaded)
{
@@ -656,6 +657,16 @@ GLboolean r700SetupVertexProgram(struct gl_context * ctx)
SETfield(r700->vs.SQ_PGM_RESOURCES_VS.u32All, vp->r700Shader.nRegs + 1,
NUM_GPRS_shift, NUM_GPRS_mask);
+ num_sq_vs_gprs = ((r700->sq_config.SQ_GPR_RESOURCE_MGMT_1.u32All & NUM_VS_GPRS_mask) >> NUM_VS_GPRS_shift);
+
+ if((vp->r700Shader.nRegs + 1) > num_sq_vs_gprs)
+ {
+ /* care! thich changes sq - needs idle state */
+ R600_STATECHANGE(context, sq);
+ SETfield(r700->sq_config.SQ_GPR_RESOURCE_MGMT_1.u32All, vp->r700Shader.nRegs + 1,
+ NUM_VS_GPRS_shift, NUM_VS_GPRS_mask);
+ }
+
if(vp->r700Shader.uStackSize) /* we don't use branch for now, it should be zero. */
{
SETfield(r700->vs.SQ_PGM_RESOURCES_VS.u32All, vp->r700Shader.uStackSize,
generated by cgit v1.2.3 (git 2.39.1) at 2024-08-15 07:57:48 +0000