diff options
Diffstat (limited to 'src/mesa/drivers/dri/r600')
| -rw-r--r-- | src/mesa/drivers/dri/r600/r600_blit.c | 4 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/r600/r600_context.c | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/r600/r600_tex.c | 48 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/r600/r600_tex.h | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/r600/r700_assembler.c | 21 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/r600/r700_chip.c | 259 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/r600/r700_fragprog.c | 21 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/r600/r700_state.c | 5 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/r600/r700_vertprog.c | 10 |
9 files changed, 343 insertions, 29 deletions
diff --git a/src/mesa/drivers/dri/r600/r600_blit.c b/src/mesa/drivers/dri/r600/r600_blit.c index 244fdc4ffb..172f85eb26 100644 --- a/src/mesa/drivers/dri/r600/r600_blit.c +++ b/src/mesa/drivers/dri/r600/r600_blit.c @@ -344,6 +344,10 @@ set_render_target(context_t *context, struct radeon_bo *bo, gl_format mesa_forma return; } + /* must be 0 on r7xx */ + if (context->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV770) + CLEARbit(cb_color0_info, BLEND_FLOAT32_bit); + SETfield(cb_color0_info, format, CB_COLOR0_INFO__FORMAT_shift, CB_COLOR0_INFO__FORMAT_mask); SETfield(cb_color0_info, comp_swap, COMP_SWAP_shift, COMP_SWAP_mask); diff --git a/src/mesa/drivers/dri/r600/r600_context.c b/src/mesa/drivers/dri/r600/r600_context.c index 9f8923f09d..f4aed4e87f 100644 --- a/src/mesa/drivers/dri/r600/r600_context.c +++ b/src/mesa/drivers/dri/r600/r600_context.c @@ -239,7 +239,7 @@ static void r600_init_vtbl(radeonContextPtr radeon) radeon->vtbl.emit_query_finish = r600_emit_query_finish; radeon->vtbl.check_blit = r600_check_blit; radeon->vtbl.blit = r600_blit; - radeon->vtbl.is_format_renderable = radeonIsFormatRenderable; + radeon->vtbl.is_format_renderable = r600IsFormatRenderable; } static void r600InitConstValues(GLcontext *ctx, radeonScreenPtr screen) diff --git a/src/mesa/drivers/dri/r600/r600_tex.c b/src/mesa/drivers/dri/r600/r600_tex.c index 36a6e6e0a1..41419f8460 100644 --- a/src/mesa/drivers/dri/r600/r600_tex.c +++ b/src/mesa/drivers/dri/r600/r600_tex.c @@ -392,6 +392,54 @@ static struct gl_texture_object *r600NewTextureObject(GLcontext * ctx, return &t->base; } +unsigned r600IsFormatRenderable(gl_format mesa_format) +{ + switch (mesa_format) { + case MESA_FORMAT_RGBA8888: + case MESA_FORMAT_SIGNED_RGBA8888: + case MESA_FORMAT_RGBA8888_REV: + case MESA_FORMAT_SIGNED_RGBA8888_REV: + case MESA_FORMAT_ARGB8888: + case MESA_FORMAT_XRGB8888: + case MESA_FORMAT_ARGB8888_REV: + case MESA_FORMAT_XRGB8888_REV: + case MESA_FORMAT_RGB565: + case MESA_FORMAT_RGB565_REV: + case MESA_FORMAT_ARGB4444: + case MESA_FORMAT_ARGB4444_REV: + case MESA_FORMAT_ARGB1555: + case MESA_FORMAT_ARGB1555_REV: + case MESA_FORMAT_AL88: + case MESA_FORMAT_AL88_REV: + case MESA_FORMAT_RGB332: + case MESA_FORMAT_A8: + case MESA_FORMAT_I8: + case MESA_FORMAT_CI8: + case MESA_FORMAT_L8: + case MESA_FORMAT_RGBA_FLOAT32: + case MESA_FORMAT_RGBA_FLOAT16: + case MESA_FORMAT_ALPHA_FLOAT32: + case MESA_FORMAT_ALPHA_FLOAT16: + case MESA_FORMAT_LUMINANCE_FLOAT32: + case MESA_FORMAT_LUMINANCE_FLOAT16: + case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32: + case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT16: + case MESA_FORMAT_INTENSITY_FLOAT32: /* X, X, X, X */ + case MESA_FORMAT_INTENSITY_FLOAT16: /* X, X, X, X */ + case MESA_FORMAT_X8_Z24: + case MESA_FORMAT_S8_Z24: + case MESA_FORMAT_Z24_S8: + case MESA_FORMAT_Z16: + case MESA_FORMAT_Z32: + case MESA_FORMAT_SRGBA8: + case MESA_FORMAT_SLA8: + case MESA_FORMAT_SL8: + return 1; + default: + return 0; + } +} + void r600InitTextureFuncs(radeonContextPtr radeon, struct dd_function_table *functions) { /* Note: we only plug in the functions we implement in the driver diff --git a/src/mesa/drivers/dri/r600/r600_tex.h b/src/mesa/drivers/dri/r600/r600_tex.h index 1d75a2ecd6..771affdfa6 100644 --- a/src/mesa/drivers/dri/r600/r600_tex.h +++ b/src/mesa/drivers/dri/r600/r600_tex.h @@ -60,4 +60,6 @@ extern GLboolean r600ValidateBuffers(GLcontext * ctx); extern void r600InitTextureFuncs(radeonContextPtr radeon, struct dd_function_table *functions); +unsigned r600IsFormatRenderable(gl_format mesa_format); + #endif /* __r600_TEX_H__ */ diff --git a/src/mesa/drivers/dri/r600/r700_assembler.c b/src/mesa/drivers/dri/r600/r700_assembler.c index 834bcc63e3..0677c54bea 100644 --- a/src/mesa/drivers/dri/r600/r700_assembler.c +++ b/src/mesa/drivers/dri/r600/r700_assembler.c @@ -6511,13 +6511,30 @@ GLboolean Process_Vertex_Exports(r700_AssemblerBase *pR700AsmCode, { return GL_FALSE; } + export_starting_index++; + export_count--; + } + unBit = 1 << VERT_RESULT_PSIZ; + if(OutputsWritten & unBit) + { + if( GL_FALSE == Process_Export(pR700AsmCode, + SQ_EXPORT_POS, + export_starting_index, + 1, + pR700AsmCode->ucVP_OutputMap[VERT_RESULT_PSIZ], + GL_FALSE) ) + { + return GL_FALSE; + } export_count--; + } + + pR700AsmCode->cf_last_export_ptr->m_Word1.f.cf_inst = SQ_CF_INST_EXPORT_DONE; - pR700AsmCode->cf_last_export_ptr->m_Word1.f.cf_inst = SQ_CF_INST_EXPORT_DONE; - } pR700AsmCode->number_of_exports = export_count; + export_starting_index = 0; unBit = 1 << VERT_RESULT_COL0; if(OutputsWritten & unBit) diff --git a/src/mesa/drivers/dri/r600/r700_chip.c b/src/mesa/drivers/dri/r600/r700_chip.c index 63614b160c..cefda3ac4b 100644 --- a/src/mesa/drivers/dri/r600/r700_chip.c +++ b/src/mesa/drivers/dri/r600/r700_chip.c @@ -290,7 +290,7 @@ static void r700SendVTXState(GLcontext *ctx, struct radeon_state_atom *atom) static void r700SetRenderTarget(context_t *context, int id) { R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw); - + uint32_t format = COLOR_8_8_8_8, comp_swap = SWAP_ALT, number_type = NUMBER_UNORM; struct radeon_renderbuffer *rrb; unsigned int nPitchInPixel; @@ -312,22 +312,251 @@ static void r700SetRenderTarget(context_t *context, int id) SETfield(r700->render_target[id].CB_COLOR0_INFO.u32All, ENDIAN_NONE, ENDIAN_shift, ENDIAN_mask); SETfield(r700->render_target[id].CB_COLOR0_INFO.u32All, ARRAY_LINEAR_GENERAL, CB_COLOR0_INFO__ARRAY_MODE_shift, CB_COLOR0_INFO__ARRAY_MODE_mask); - if(4 == rrb->cpp) - { - SETfield(r700->render_target[id].CB_COLOR0_INFO.u32All, COLOR_8_8_8_8, - CB_COLOR0_INFO__FORMAT_shift, CB_COLOR0_INFO__FORMAT_mask); - SETfield(r700->render_target[id].CB_COLOR0_INFO.u32All, SWAP_ALT, COMP_SWAP_shift, COMP_SWAP_mask); - } - else - { - SETfield(r700->render_target[id].CB_COLOR0_INFO.u32All, COLOR_5_6_5, - CB_COLOR0_INFO__FORMAT_shift, CB_COLOR0_INFO__FORMAT_mask); - SETfield(r700->render_target[id].CB_COLOR0_INFO.u32All, SWAP_ALT_REV, - COMP_SWAP_shift, COMP_SWAP_mask); + + switch (rrb->base.Format) { + case MESA_FORMAT_RGBA8888: + format = COLOR_8_8_8_8; + comp_swap = SWAP_STD_REV; + number_type = NUMBER_UNORM; + SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_SIGNED_RGBA8888: + format = COLOR_8_8_8_8; + comp_swap = SWAP_STD_REV; + number_type = NUMBER_SNORM; + SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_RGBA8888_REV: + format = COLOR_8_8_8_8; + comp_swap = SWAP_STD; + number_type = NUMBER_UNORM; + SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_SIGNED_RGBA8888_REV: + format = COLOR_8_8_8_8; + comp_swap = SWAP_STD; + number_type = NUMBER_SNORM; + SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_ARGB8888: + case MESA_FORMAT_XRGB8888: + format = COLOR_8_8_8_8; + comp_swap = SWAP_ALT; + number_type = NUMBER_UNORM; + SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_ARGB8888_REV: + case MESA_FORMAT_XRGB8888_REV: + format = COLOR_8_8_8_8; + comp_swap = SWAP_ALT_REV; + number_type = NUMBER_UNORM; + SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_RGB565: + format = COLOR_5_6_5; + comp_swap = SWAP_STD_REV; + number_type = NUMBER_UNORM; + SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_RGB565_REV: + format = COLOR_5_6_5; + comp_swap = SWAP_STD; + number_type = NUMBER_UNORM; + SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_ARGB4444: + format = COLOR_4_4_4_4; + comp_swap = SWAP_ALT; + number_type = NUMBER_UNORM; + SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_ARGB4444_REV: + format = COLOR_4_4_4_4; + comp_swap = SWAP_ALT_REV; + number_type = NUMBER_UNORM; + SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_ARGB1555: + format = COLOR_1_5_5_5; + comp_swap = SWAP_ALT; + number_type = NUMBER_UNORM; + SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_ARGB1555_REV: + format = COLOR_1_5_5_5; + comp_swap = SWAP_ALT_REV; + number_type = NUMBER_UNORM; + SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_AL88: + format = COLOR_8_8; + comp_swap = SWAP_STD; + number_type = NUMBER_UNORM; + SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_AL88_REV: + format = COLOR_8_8; + comp_swap = SWAP_STD_REV; + number_type = NUMBER_UNORM; + SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_RGB332: + format = COLOR_3_3_2; + comp_swap = SWAP_STD_REV; + number_type = NUMBER_UNORM; + SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_A8: + format = COLOR_8; + comp_swap = SWAP_ALT_REV; + number_type = NUMBER_UNORM; + SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_I8: + case MESA_FORMAT_CI8: + format = COLOR_8; + comp_swap = SWAP_STD; + number_type = NUMBER_UNORM; + SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_L8: + format = COLOR_8; + comp_swap = SWAP_ALT; + number_type = NUMBER_UNORM; + SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_RGBA_FLOAT32: + format = COLOR_32_32_32_32_FLOAT; + comp_swap = SWAP_STD_REV; + number_type = NUMBER_FLOAT; + SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, BLEND_FLOAT32_bit); + CLEARbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_RGBA_FLOAT16: + format = COLOR_16_16_16_16_FLOAT; + comp_swap = SWAP_STD_REV; + number_type = NUMBER_FLOAT; + CLEARbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_ALPHA_FLOAT32: + format = COLOR_32_FLOAT; + comp_swap = SWAP_ALT_REV; + number_type = NUMBER_FLOAT; + SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, BLEND_FLOAT32_bit); + CLEARbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_ALPHA_FLOAT16: + format = COLOR_16_FLOAT; + comp_swap = SWAP_ALT_REV; + number_type = NUMBER_FLOAT; + CLEARbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_LUMINANCE_FLOAT32: + format = COLOR_32_FLOAT; + comp_swap = SWAP_ALT; + number_type = NUMBER_FLOAT; + SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, BLEND_FLOAT32_bit); + CLEARbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_LUMINANCE_FLOAT16: + format = COLOR_16_FLOAT; + comp_swap = SWAP_ALT; + number_type = NUMBER_FLOAT; + CLEARbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32: + format = COLOR_32_32_FLOAT; + comp_swap = SWAP_ALT_REV; + number_type = NUMBER_FLOAT; + SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, BLEND_FLOAT32_bit); + CLEARbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT16: + format = COLOR_16_16_FLOAT; + comp_swap = SWAP_ALT_REV; + number_type = NUMBER_FLOAT; + CLEARbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_INTENSITY_FLOAT32: /* X, X, X, X */ + format = COLOR_32_FLOAT; + comp_swap = SWAP_STD; + number_type = NUMBER_FLOAT; + SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, BLEND_FLOAT32_bit); + CLEARbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_INTENSITY_FLOAT16: /* X, X, X, X */ + format = COLOR_16_FLOAT; + comp_swap = SWAP_STD; + number_type = NUMBER_UNORM; + CLEARbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_X8_Z24: + case MESA_FORMAT_S8_Z24: + format = COLOR_8_24; + comp_swap = SWAP_STD; + number_type = NUMBER_UNORM; + SETfield(r700->render_target[id].CB_COLOR0_INFO.u32All, ARRAY_1D_TILED_THIN1, + CB_COLOR0_INFO__ARRAY_MODE_shift, CB_COLOR0_INFO__ARRAY_MODE_mask); + CLEARbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_Z24_S8: + format = COLOR_24_8; + comp_swap = SWAP_STD; + number_type = NUMBER_UNORM; + SETfield(r700->render_target[id].CB_COLOR0_INFO.u32All, ARRAY_1D_TILED_THIN1, + CB_COLOR0_INFO__ARRAY_MODE_shift, CB_COLOR0_INFO__ARRAY_MODE_mask); + CLEARbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_Z16: + format = COLOR_16; + comp_swap = SWAP_STD; + number_type = NUMBER_UNORM; + SETfield(r700->render_target[id].CB_COLOR0_INFO.u32All, ARRAY_1D_TILED_THIN1, + CB_COLOR0_INFO__ARRAY_MODE_shift, CB_COLOR0_INFO__ARRAY_MODE_mask); + CLEARbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_Z32: + format = COLOR_32; + comp_swap = SWAP_STD; + number_type = NUMBER_UNORM; + SETfield(r700->render_target[id].CB_COLOR0_INFO.u32All, ARRAY_1D_TILED_THIN1, + CB_COLOR0_INFO__ARRAY_MODE_shift, CB_COLOR0_INFO__ARRAY_MODE_mask); + CLEARbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_SRGBA8: + format = COLOR_8_8_8_8; + comp_swap = SWAP_STD_REV; + number_type = NUMBER_SRGB; + SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_SLA8: + format = COLOR_8_8; + comp_swap = SWAP_ALT_REV; + number_type = NUMBER_SRGB; + SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + case MESA_FORMAT_SL8: + format = COLOR_8; + comp_swap = SWAP_ALT_REV; + number_type = NUMBER_SRGB; + SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + break; + default: + _mesa_problem(context->radeon.glCtx, "unexpected format in r700SetRenderTarget()"); + break; } - SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit); + + /* must be 0 on r7xx */ + if (context->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV770) + CLEARbit(r700->render_target[id].CB_COLOR0_INFO.u32All, BLEND_FLOAT32_bit); + + SETfield(r700->render_target[id].CB_COLOR0_INFO.u32All, format, + CB_COLOR0_INFO__FORMAT_shift, CB_COLOR0_INFO__FORMAT_mask); + SETfield(r700->render_target[id].CB_COLOR0_INFO.u32All, comp_swap, + COMP_SWAP_shift, COMP_SWAP_mask); + SETfield(r700->render_target[id].CB_COLOR0_INFO.u32All, number_type, + NUMBER_TYPE_shift, NUMBER_TYPE_mask); SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, BLEND_CLAMP_bit); - SETfield(r700->render_target[id].CB_COLOR0_INFO.u32All, NUMBER_UNORM, NUMBER_TYPE_shift, NUMBER_TYPE_mask); r700->render_target[id].enabled = GL_TRUE; } diff --git a/src/mesa/drivers/dri/r600/r700_fragprog.c b/src/mesa/drivers/dri/r600/r700_fragprog.c index 84d51e6606..ee4d2828cf 100644 --- a/src/mesa/drivers/dri/r600/r700_fragprog.c +++ b/src/mesa/drivers/dri/r600/r700_fragprog.c @@ -560,21 +560,22 @@ GLboolean r700SetupFragmentProgram(GLcontext * ctx) CLEARbit(r700->SPI_PS_IN_CONTROL_1.u32All, FRONT_FACE_ENA_bit); } - /* see if we need any point_sprite replacements */ - for (i = VERT_RESULT_TEX0; i<= VERT_RESULT_TEX7; i++) + /* see if we need any point_sprite replacements, also increase num_interp + * as there's no vp output for them */ + for (i = FRAG_ATTRIB_TEX0; i<= FRAG_ATTRIB_TEX7; i++) { - if(ctx->Point.CoordReplace[i - VERT_RESULT_TEX0] == GL_TRUE) + if(ctx->Point.CoordReplace[i - FRAG_ATTRIB_TEX0] == GL_TRUE) { + ui++; point_sprite = GL_TRUE; + } } + if( mesa_fp->Base.InputsRead & (1 << FRAG_ATTRIB_PNTC)) + ui++; + if ((mesa_fp->Base.InputsRead & (1 << FRAG_ATTRIB_PNTC)) || point_sprite) { - /* for FRAG_ATTRIB_PNTC we need to increase num_interp */ - if(mesa_fp->Base.InputsRead & (1 << FRAG_ATTRIB_PNTC)) - { - ui++; - SETfield(r700->SPI_PS_IN_CONTROL_0.u32All, ui, NUM_INTERP_shift, NUM_INTERP_mask); - } + SETfield(r700->SPI_PS_IN_CONTROL_0.u32All, ui, NUM_INTERP_shift, NUM_INTERP_mask); SETbit(r700->SPI_INTERP_CONTROL_0.u32All, PNT_SPRITE_ENA_bit); SETfield(r700->SPI_INTERP_CONTROL_0.u32All, SPI_PNT_SPRITE_SEL_S, PNT_SPRITE_OVRD_X_shift, PNT_SPRITE_OVRD_X_mask); SETfield(r700->SPI_INTERP_CONTROL_0.u32All, SPI_PNT_SPRITE_SEL_T, PNT_SPRITE_OVRD_Y_shift, PNT_SPRITE_OVRD_Y_mask); @@ -669,7 +670,7 @@ GLboolean r700SetupFragmentProgram(GLcontext * ctx) for(i=0; i<8; i++) { unBit = 1 << (VERT_RESULT_TEX0 + i); - if(OutputsWritten & unBit) + if((OutputsWritten & unBit) || (ctx->Point.CoordReplace[i] == GL_TRUE)) { ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_TEX0 + i]; SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit); diff --git a/src/mesa/drivers/dri/r600/r700_state.c b/src/mesa/drivers/dri/r600/r700_state.c index 1da31e7b2b..ac64bbf874 100644 --- a/src/mesa/drivers/dri/r600/r700_state.c +++ b/src/mesa/drivers/dri/r600/r700_state.c @@ -253,12 +253,15 @@ void r700UpdateShaderStates(GLcontext * ctx) static void r700SetDepthState(GLcontext * ctx) { + struct radeon_renderbuffer *rrb; context_t *context = R700_CONTEXT(ctx); R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw); R600_STATECHANGE(context, db); - if (ctx->Depth.Test) + rrb = radeon_get_depthbuffer(&context->radeon); + + if (ctx->Depth.Test && rrb && rrb->bo) { SETbit(r700->DB_DEPTH_CONTROL.u32All, Z_ENABLE_bit); if (ctx->Depth.Mask) diff --git a/src/mesa/drivers/dri/r600/r700_vertprog.c b/src/mesa/drivers/dri/r600/r700_vertprog.c index 05c65164d6..14dd2a5482 100644 --- a/src/mesa/drivers/dri/r600/r700_vertprog.c +++ b/src/mesa/drivers/dri/r600/r700_vertprog.c @@ -628,6 +628,16 @@ GLboolean r700SetupVertexProgram(GLcontext * ctx) R600_STATECHANGE(context, spi); + if(vp->mesa_program->Base.OutputsWritten & (1 << VERT_RESULT_PSIZ)) { + R600_STATECHANGE(context, cl); + SETbit(r700->PA_CL_VS_OUT_CNTL.u32All, USE_VTX_POINT_SIZE_bit); + SETbit(r700->PA_CL_VS_OUT_CNTL.u32All, VS_OUT_MISC_VEC_ENA_bit); + } else if (r700->PA_CL_VS_OUT_CNTL.u32All != 0) { + R600_STATECHANGE(context, cl); + CLEARbit(r700->PA_CL_VS_OUT_CNTL.u32All, USE_VTX_POINT_SIZE_bit); + CLEARbit(r700->PA_CL_VS_OUT_CNTL.u32All, VS_OUT_MISC_VEC_ENA_bit); + } + SETfield(r700->SPI_VS_OUT_CONFIG.u32All, vp->r700Shader.nParamExports ? (vp->r700Shader.nParamExports - 1) : 0, VS_EXPORT_COUNT_shift, VS_EXPORT_COUNT_mask); |