diff options
Diffstat (limited to 'src/mesa/drivers/dri/radeon')
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_buffer_objects.c | 9 | ||||
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_common.c | 63 | ||||
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_common.h | 1 | ||||
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_context.h | 7 | ||||
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_debug.c | 10 | ||||
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_debug.h | 62 | ||||
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c | 16 | ||||
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h | 5 | ||||
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_queryobj.c | 1 | ||||
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_screen.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_state.c | 16 | ||||
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_state_init.c | 12 | ||||
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_texture.c | 4 |
13 files changed, 90 insertions, 118 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_buffer_objects.c b/src/mesa/drivers/dri/radeon/radeon_buffer_objects.c index e8ae51e6ea..a24b6dac26 100644 --- a/src/mesa/drivers/dri/radeon/radeon_buffer_objects.c +++ b/src/mesa/drivers/dri/radeon/radeon_buffer_objects.c @@ -78,9 +78,10 @@ radeonDeleteBufferObject(GLcontext * ctx, * Allocate space for and store data in a buffer object. Any data that was * previously stored in the buffer object is lost. If data is NULL, * memory will be allocated, but no copy will occur. - * Called via glBufferDataARB(). + * Called via ctx->Driver.BufferData(). + * \return GL_TRUE for success, GL_FALSE if out of memory */ -static void +static GLboolean radeonBufferData(GLcontext * ctx, GLenum target, GLsizeiptrARB size, @@ -107,6 +108,9 @@ radeonBufferData(GLcontext * ctx, RADEON_GEM_DOMAIN_GTT, 0); + if (!radeon_obj->bo) + return GL_FALSE; + if (data != NULL) { radeon_bo_map(radeon_obj->bo, GL_TRUE); @@ -115,6 +119,7 @@ radeonBufferData(GLcontext * ctx, radeon_bo_unmap(radeon_obj->bo); } } + return GL_TRUE; } /** diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c index aaa5165bc8..a4c7b40798 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.c +++ b/src/mesa/drivers/dri/radeon/radeon_common.c @@ -45,44 +45,17 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "main/glheader.h" #include "main/imports.h" #include "main/context.h" -#include "main/arrayobj.h" -#include "main/api_arrayelt.h" #include "main/enums.h" -#include "main/colormac.h" -#include "main/light.h" #include "main/framebuffer.h" -#include "main/simple_list.h" #include "main/renderbuffer.h" -#include "swrast/swrast.h" -#include "vbo/vbo.h" -#include "tnl/tnl.h" -#include "tnl/t_pipeline.h" -#include "swrast_setup/swrast_setup.h" - -#include "main/blend.h" -#include "main/bufferobj.h" -#include "main/buffers.h" -#include "main/depth.h" -#include "main/polygon.h" -#include "main/shaders.h" -#include "main/texstate.h" -#include "main/varray.h" -#include "glapi/dispatch.h" -#include "swrast/swrast.h" -#include "main/stencil.h" -#include "main/matrix.h" -#include "main/attrib.h" -#include "main/enable.h" -#include "main/viewport.h" - -#include "dri_util.h" +#include "drivers/common/meta.h" + #include "vblank.h" #include "radeon_common.h" #include "radeon_bocs_wrapper.h" #include "radeon_lock.h" #include "radeon_drm.h" -#include "radeon_mipmap_tree.h" #include "radeon_queryobj.h" /** @@ -312,31 +285,6 @@ void radeonPolygonStipplePreKMS( GLcontext *ctx, const GLubyte *mask ) UNLOCK_HARDWARE( radeon ); } -void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask ) -{ - radeonContextPtr radeon = RADEON_CONTEXT(ctx); - GLint i; - BATCH_LOCALS(radeon); - - radeon_firevertices(radeon); - - BEGIN_BATCH_NO_AUTOSTATE(35); - - OUT_BATCH(CP_PACKET0(RADEON_RE_STIPPLE_ADDR, 0)); - OUT_BATCH(0x00000000); - - OUT_BATCH(CP_PACKET0_ONE(RADEON_RE_STIPPLE_DATA, 31)); - - /* Must flip pattern upside down. - */ - for ( i = 31 ; i >= 0; i--) { - OUT_BATCH(((GLuint *) mask)[i]); - } - - END_BATCH(); -} - - /* ================================================================ * SwapBuffers with client-side throttling @@ -1286,7 +1234,9 @@ int rcommonFlushCmdBuf(radeonContextPtr rmesa, const char *caller) UNLOCK_HARDWARE(rmesa); if (ret) { - fprintf(stderr, "drmRadeonCmdBuffer: %d\n", ret); + fprintf(stderr, "drmRadeonCmdBuffer: %d. Kernel failed to " + "parse or rejected command stream. See dmesg " + "for more info.\n", ret); _mesa_exit(ret); } @@ -1395,6 +1345,5 @@ void rcommonBeginBatch(radeonContextPtr rmesa, int n, void radeonUserClear(GLcontext *ctx, GLuint mask) { - radeonContextPtr rmesa = RADEON_CONTEXT(ctx); - meta_clear_tris(&rmesa->meta, mask); + _mesa_meta_clear(ctx, mask); } diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h index ba983e5ab6..f3201911ac 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.h +++ b/src/mesa/drivers/dri/radeon/radeon_common.h @@ -10,7 +10,6 @@ void radeonRecalcScissorRects(radeonContextPtr radeon); void radeonSetCliprects(radeonContextPtr radeon); void radeonUpdateScissor( GLcontext *ctx ); void radeonScissor(GLcontext* ctx, GLint x, GLint y, GLsizei w, GLsizei h); -void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask ); void radeonPolygonStipplePreKMS( GLcontext *ctx, const GLubyte *mask ); void radeonWaitForIdleLocked(radeonContextPtr radeon); diff --git a/src/mesa/drivers/dri/radeon/radeon_context.h b/src/mesa/drivers/dri/radeon/radeon_context.h index 572acbb006..4e2c52c835 100644 --- a/src/mesa/drivers/dri/radeon/radeon_context.h +++ b/src/mesa/drivers/dri/radeon/radeon_context.h @@ -299,6 +299,11 @@ struct radeon_texture_state { #define R100_QUERYOBJ_DATA_0 1 #define R100_QUERYOBJ_CMDSIZE 2 +#define STP_CMD_0 0 +#define STP_DATA_0 1 +#define STP_CMD_1 2 +#define STP_STATE_SIZE 35 + struct r100_hw_state { /* Hardware state, stored as cmdbuf commands: * -- Need to doublebuffer for @@ -323,7 +328,7 @@ struct r100_hw_state { struct radeon_state_atom fog; struct radeon_state_atom glt; struct radeon_state_atom txr[3]; /* for NPOT */ - + struct radeon_state_atom stp; }; diff --git a/src/mesa/drivers/dri/radeon/radeon_debug.c b/src/mesa/drivers/dri/radeon/radeon_debug.c index a1ed39683f..3b6f003803 100644 --- a/src/mesa/drivers/dri/radeon/radeon_debug.c +++ b/src/mesa/drivers/dri/radeon/radeon_debug.c @@ -32,6 +32,9 @@ #include "radeon_debug.h" #include "radeon_common_context.h" +#include <stdarg.h> +#include <stdio.h> + static const struct dri_debug_control debug_control[] = { {"fall", RADEON_FALLBACKS}, {"tex", RADEON_TEXTURE}, @@ -85,10 +88,10 @@ void _radeon_debug_remove_indent(void) } } -extern void _radeon_print(const radeon_debug_type_t type, +void _radeon_print(const radeon_debug_type_t type, const radeon_debug_level_t level, const char* message, - va_list values) + ...) { GET_CURRENT_CONTEXT(ctx); if (ctx) { @@ -97,5 +100,8 @@ extern void _radeon_print(const radeon_debug_type_t type, if (radeon->debug.indent_depth) fprintf(stderr, "%s", radeon->debug.indent); } + va_list values; + va_start( values, message ); vfprintf(stderr, message, values); + va_end( values ); } diff --git a/src/mesa/drivers/dri/radeon/radeon_debug.h b/src/mesa/drivers/dri/radeon/radeon_debug.h index 3e1481dfa1..2a8302293b 100644 --- a/src/mesa/drivers/dri/radeon/radeon_debug.h +++ b/src/mesa/drivers/dri/radeon/radeon_debug.h @@ -30,8 +30,7 @@ #ifndef RADEON_DEBUG_H_INCLUDED #define RADEON_DEBUG_H_INCLUDED -#include <stdarg.h> -#include <stdio.h> +#include <stdlib.h> typedef enum radeon_debug_levels { RADEON_CRITICAL = 0, /* Only errors */ @@ -88,7 +87,7 @@ extern radeon_debug_type_t radeon_enabled_debug_types; static inline int radeon_is_debug_enabled(const radeon_debug_type_t type, const radeon_debug_level_t level) { - return RADEON_DEBUG_LEVEL <= level + return RADEON_DEBUG_LEVEL >= level && (type & radeon_enabled_debug_types); } /* @@ -102,57 +101,36 @@ static inline int radeon_is_debug_enabled(const radeon_debug_type_t type, extern void _radeon_print(const radeon_debug_type_t type, const radeon_debug_level_t level, const char* message, - va_list values); -/** - * Format attribute requires declaration for setting it. Don't ask me why! - */ -static inline void radeon_print(const radeon_debug_type_t type, - const radeon_debug_level_t level, - const char* message, - ...) __attribute__((format(printf,3,4))); - + ...) __attribute__((format(printf,3,4))); /** * Print out debug message if channel specified by type is enabled * and compile time debugging level is at least as high as level parameter */ -static inline void radeon_print(const radeon_debug_type_t type, - const radeon_debug_level_t level, - const char* message, - ...) -{ - /* Compile out if level of message is too high */ - if (radeon_is_debug_enabled(type, level)) { - - va_list values; - va_start( values, message ); - _radeon_print(type, level, message, values); - va_end( values ); - } -} +#define radeon_print(type, level, message, ...) do { \ + const radeon_debug_level_t _debug_level = (level); \ + const radeon_debug_type_t _debug_type = (type); \ + /* Compile out if level of message is too high */ \ + if (radeon_is_debug_enabled(type, level)) { \ + _radeon_print(_debug_type, _debug_level, \ + (message), ## __VA_ARGS__); \ + } \ +} while(0) -static inline void radeon_error(const char* message, ...) __attribute__((format(printf,1,2))); /** * printf style function for writing error messages. */ -static inline void radeon_error(const char* message, ...) -{ - va_list values; - va_start( values, message ); - radeon_print(RADEON_GENERAL, RADEON_CRITICAL, message, values); - va_end( values ); -} +#define radeon_error(message, ...) do { \ + radeon_print(RADEON_GENERAL, RADEON_CRITICAL, \ + (message), ## __VA_ARGS__); \ +} while(0) -static inline void radeon_warning(const char* message, ...) __attribute__((format(printf,1,2))); /** * printf style function for writing warnings. */ -static inline void radeon_warning(const char* message, ...) -{ - va_list values; - va_start( values, message ); - radeon_print(RADEON_GENERAL, RADEON_IMPORTANT, message, values); - va_end( values ); -} +#define radeon_warning(message, ...) do { \ + radeon_print(RADEON_GENERAL, RADEON_IMPORTANT, \ + (message), ## __VA_ARGS__); \ +} while(0) extern void radeon_init_debug(void); extern void _radeon_debug_add_indent(void); diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c index d9f17cfc58..38db305e2a 100644 --- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c +++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c @@ -190,13 +190,14 @@ static void calculate_miptree_layout_r300(radeonContextPtr rmesa, radeon_mipmap_ * Create a new mipmap tree, calculate its layout and allocate memory. */ radeon_mipmap_tree* radeon_miptree_create(radeonContextPtr rmesa, radeonTexObj *t, - GLenum target, GLuint firstLevel, GLuint lastLevel, + GLenum target, GLenum internal_format, GLuint firstLevel, GLuint lastLevel, GLuint width0, GLuint height0, GLuint depth0, GLuint bpp, GLuint tilebits, GLuint compressed) { radeon_mipmap_tree *mt = CALLOC_STRUCT(_radeon_mipmap_tree); mt->radeon = rmesa; + mt->internal_format = internal_format; mt->refcount = 1; mt->t = t; mt->target = target; @@ -318,8 +319,8 @@ GLboolean radeon_miptree_matches_image(radeon_mipmap_tree *mt, if (face >= mt->faces || level < mt->firstLevel || level > mt->lastLevel) return GL_FALSE; - if ((!texImage->IsCompressed && mt->compressed) || - (texImage->IsCompressed && !mt->compressed)) + if (texImage->InternalFormat != mt->internal_format || + texImage->IsCompressed != mt->compressed) return GL_FALSE; if (!texImage->IsCompressed && @@ -369,9 +370,9 @@ GLboolean radeon_miptree_matches_texture(radeon_mipmap_tree *mt, struct gl_textu * given image in the given position. */ void radeon_try_alloc_miptree(radeonContextPtr rmesa, radeonTexObj *t, - struct gl_texture_image *texImage, GLuint face, GLuint level) + radeon_texture_image *image, GLuint face, GLuint level) { - GLuint compressed = texImage->IsCompressed ? texImage->TexFormat->MesaFormat : 0; + GLuint compressed = image->base.IsCompressed ? image->base.TexFormat->MesaFormat : 0; GLuint numfaces = 1; GLuint firstLevel, lastLevel; @@ -385,9 +386,10 @@ void radeon_try_alloc_miptree(radeonContextPtr rmesa, radeonTexObj *t, return; t->mt = radeon_miptree_create(rmesa, t, t->base.Target, + image->base.InternalFormat, firstLevel, lastLevel, - texImage->Width, texImage->Height, texImage->Depth, - texImage->TexFormat->TexelBytes, t->tile_bits, compressed); + image->base.Width, image->base.Height, image->base.Depth, + image->base.TexFormat->TexelBytes, t->tile_bits, compressed); } /* Although we use the image_offset[] array to store relative offsets diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h index 7ece688493..db28252da3 100644 --- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h +++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h @@ -67,6 +67,7 @@ struct _radeon_mipmap_tree { GLuint totalsize; /** total size of the miptree, in bytes */ GLenum target; /** GL_TEXTURE_xxx */ + GLenum internal_format; GLuint faces; /** # of faces: 6 for cubemaps, 1 otherwise */ GLuint firstLevel; /** First mip level stored in this mipmap tree */ GLuint lastLevel; /** Last mip level stored in this mipmap tree */ @@ -83,7 +84,7 @@ struct _radeon_mipmap_tree { }; radeon_mipmap_tree* radeon_miptree_create(radeonContextPtr rmesa, radeonTexObj *t, - GLenum target, GLuint firstLevel, GLuint lastLevel, + GLenum target, GLenum internal_format, GLuint firstLevel, GLuint lastLevel, GLuint width0, GLuint height0, GLuint depth0, GLuint bpp, GLuint tilebits, GLuint compressed); void radeon_miptree_reference(radeon_mipmap_tree *mt); @@ -93,7 +94,7 @@ GLboolean radeon_miptree_matches_image(radeon_mipmap_tree *mt, struct gl_texture_image *texImage, GLuint face, GLuint level); GLboolean radeon_miptree_matches_texture(radeon_mipmap_tree *mt, struct gl_texture_object *texObj); void radeon_try_alloc_miptree(radeonContextPtr rmesa, radeonTexObj *t, - struct gl_texture_image *texImage, GLuint face, GLuint level); + radeon_texture_image *texImage, GLuint face, GLuint level); GLuint radeon_miptree_image_offset(radeon_mipmap_tree *mt, GLuint face, GLuint level); void radeon_miptree_depth_offsets(radeon_mipmap_tree *mt, GLuint level, GLuint *offsets); diff --git a/src/mesa/drivers/dri/radeon/radeon_queryobj.c b/src/mesa/drivers/dri/radeon/radeon_queryobj.c index ed5ebd18e4..b79d864ba2 100644 --- a/src/mesa/drivers/dri/radeon/radeon_queryobj.c +++ b/src/mesa/drivers/dri/radeon/radeon_queryobj.c @@ -133,6 +133,7 @@ static void radeonBeginQuery(GLcontext *ctx, struct gl_query_object *q) radeon->query.current = query; radeon->query.queryobj.dirty = GL_TRUE; + radeon->hw.is_dirty = GL_TRUE; insert_at_tail(&radeon->query.not_flushed_head, query); } diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c index daee3b85d9..5ffb55db5e 100644 --- a/src/mesa/drivers/dri/radeon/radeon_screen.c +++ b/src/mesa/drivers/dri/radeon/radeon_screen.c @@ -1690,6 +1690,8 @@ __DRIconfig **radeonInitScreen2(__DRIscreenPrivate *psp) driInitSingleExtension( NULL, NV_vp_extension ); driInitSingleExtension( NULL, ATI_fs_extension ); driInitExtensions( NULL, point_extensions, GL_FALSE ); +#elif (defined(RADEON_COMMON_FOR_R300) || defined(RADEON_COMMON_FOR_R600)) + driInitSingleExtension( NULL, gl_20_extension ); #endif if (!radeonInitDriver(psp)) { diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c index c8cc7f9bcf..4d0d35ee0c 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state.c +++ b/src/mesa/drivers/dri/radeon/radeon_state.c @@ -2197,6 +2197,22 @@ static void radeonWrapRunPipeline( GLcontext *ctx ) } } +static void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask ) +{ + r100ContextPtr r100 = R100_CONTEXT(ctx); + GLint i; + + radeon_firevertices(&r100->radeon); + + RADEON_STATECHANGE(r100, stp); + + /* Must flip pattern upside down. + */ + for ( i = 31 ; i >= 0; i--) { + r100->hw.stp.cmd[3 + i] = ((GLuint *) mask)[i]; + } +} + /* Initialize the driver's state functions. * Many of the ctx->Driver functions might have been initialized to diff --git a/src/mesa/drivers/dri/radeon/radeon_state_init.c b/src/mesa/drivers/dri/radeon/radeon_state_init.c index d014fb5c06..f3ad0dd17a 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state_init.c +++ b/src/mesa/drivers/dri/radeon/radeon_state_init.c @@ -573,7 +573,7 @@ static void cube_emit_cs(GLcontext *ctx, struct radeon_state_atom *atom) for (j = 0; j < 5; j++) { OUT_BATCH(CP_PACKET0(base_reg + (4 * j), 0)); OUT_BATCH_RELOC(lvl->faces[j].offset, t->mt->bo, lvl->faces[j].offset, - RADEON_GEM_DOMAIN_VRAM, 0, 0); + RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0); } END_BATCH(); } @@ -781,6 +781,10 @@ void radeonInitState( r100ContextPtr rmesa ) ALLOC_STATE( ucp[5], tcl_ucp5, UCP_STATE_SIZE, "UCP/userclip-5", 1 ); } + if (rmesa->radeon.radeonScreen->kernel_mm) { + ALLOC_STATE( stp, always, STP_STATE_SIZE, "STP/stp", 0 ); + } + for (i = 0; i < 3; i++) { if (rmesa->radeon.radeonScreen->kernel_mm) rmesa->hw.tex[i].emit = tex_emit_cs; @@ -873,6 +877,10 @@ void radeonInitState( r100ContextPtr rmesa ) } if (rmesa->radeon.radeonScreen->kernel_mm) { + rmesa->hw.stp.cmd[STP_CMD_0] = CP_PACKET0(RADEON_RE_STIPPLE_ADDR, 0); + rmesa->hw.stp.cmd[STP_DATA_0] = 0; + rmesa->hw.stp.cmd[STP_CMD_1] = CP_PACKET0_ONE(RADEON_RE_STIPPLE_DATA, 31); + rmesa->hw.grd.emit = scl_emit; rmesa->hw.fog.emit = vec_emit; rmesa->hw.glt.emit = vec_emit; @@ -1143,7 +1151,7 @@ void radeonInitState( r100ContextPtr rmesa ) rmesa->hw.eye.cmd[EYE_Y] = 0; rmesa->hw.eye.cmd[EYE_Z] = IEEE_ONE; rmesa->hw.eye.cmd[EYE_RESCALE_FACTOR] = IEEE_ONE; - + if (rmesa->radeon.radeonScreen->kernel_mm) { radeon_init_query_stateobj(&rmesa->radeon, R100_QUERYOBJ_CMDSIZE); rmesa->radeon.query.queryobj.cmd[R100_QUERYOBJ_CMD_0] = CP_PACKET0(RADEON_RB3D_ZPASS_DATA, 0); diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c index 181b23c396..fad3d1ceda 100644 --- a/src/mesa/drivers/dri/radeon/radeon_texture.c +++ b/src/mesa/drivers/dri/radeon/radeon_texture.c @@ -579,7 +579,7 @@ static void radeon_teximage( } if (!t->mt) - radeon_try_alloc_miptree(rmesa, t, texImage, face, level); + radeon_try_alloc_miptree(rmesa, t, image, face, level); if (t->mt && radeon_miptree_matches_image(t->mt, texImage, face, level)) { radeon_mipmap_level *lvl; image->mt = t->mt; @@ -966,7 +966,7 @@ int radeon_validate_texture_miptree(GLcontext * ctx, struct gl_texture_object *t if (!t->mt) { if (RADEON_DEBUG & RADEON_TEXTURE) fprintf(stderr, " Allocate new miptree\n"); - radeon_try_alloc_miptree(rmesa, t, &baseimage->base, 0, texObj->BaseLevel); + radeon_try_alloc_miptree(rmesa, t, baseimage, 0, texObj->BaseLevel); if (!t->mt) { _mesa_problem(ctx, "radeon_validate_texture failed to alloc miptree"); return GL_FALSE; |