diff options
Diffstat (limited to 'src/mesa/drivers/dri/radeon')
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_chipset.h | 6 | ||||
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_common_context.c | 17 | ||||
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_screen.c | 24 | ||||
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_texstate.c | 20 |
5 files changed, 46 insertions, 23 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_chipset.h b/src/mesa/drivers/dri/radeon/radeon_chipset.h index 61106fbc43..82789cec5e 100644 --- a/src/mesa/drivers/dri/radeon/radeon_chipset.h +++ b/src/mesa/drivers/dri/radeon/radeon_chipset.h @@ -440,6 +440,11 @@ #define PCI_CHIP_HEMLOCK_689C 0x689C #define PCI_CHIP_HEMLOCK_689D 0x689D +#define PCI_CHIP_PALM_9802 0x9802 +#define PCI_CHIP_PALM_9803 0x9803 +#define PCI_CHIP_PALM_9804 0x9804 +#define PCI_CHIP_PALM_9805 0x9805 + enum { CHIP_FAMILY_R100, CHIP_FAMILY_RV100, @@ -483,6 +488,7 @@ enum { CHIP_FAMILY_JUNIPER, CHIP_FAMILY_CYPRESS, CHIP_FAMILY_HEMLOCK, + CHIP_FAMILY_PALM, CHIP_FAMILY_LAST }; diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c index a436ec112c..ca6ab46ca4 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.c +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c @@ -99,6 +99,7 @@ static const char* get_chip_family_name(int chip_family) case CHIP_FAMILY_JUNIPER: return "JUNIPER"; case CHIP_FAMILY_CYPRESS: return "CYPRESS"; case CHIP_FAMILY_HEMLOCK: return "HEMLOCK"; + case CHIP_FAMILY_PALM: return "PALM"; default: return "unknown"; } } @@ -246,16 +247,9 @@ GLboolean radeonInitContext(radeonContextPtr radeon, DRI_CONF_TEXTURE_DEPTH_32 : DRI_CONF_TEXTURE_DEPTH_16; if (IS_R600_CLASS(radeon->radeonScreen)) { - int chip_family = radeon->radeonScreen->chip_family; - if (chip_family >= CHIP_FAMILY_CEDAR) { - radeon->texture_row_align = 512; - radeon->texture_rect_row_align = 512; - radeon->texture_compressed_row_align = 512; - } else { - radeon->texture_row_align = radeon->radeonScreen->group_bytes; - radeon->texture_rect_row_align = radeon->radeonScreen->group_bytes; - radeon->texture_compressed_row_align = radeon->radeonScreen->group_bytes; - } + radeon->texture_row_align = radeon->radeonScreen->group_bytes; + radeon->texture_rect_row_align = radeon->radeonScreen->group_bytes; + radeon->texture_compressed_row_align = radeon->radeonScreen->group_bytes; } else if (IS_R200_CLASS(radeon->radeonScreen) || IS_R100_CLASS(radeon->radeonScreen)) { radeon->texture_row_align = 32; @@ -741,10 +735,9 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable, buffers[i].flags); if (bo == NULL) { - fprintf(stderr, "failed to attach %s %d\n", regname, buffers[i].name); - + continue; } ret = radeon_bo_get_tiling(bo, &tiling_flags, &pitch); diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h index 088f970172..a68a976877 100644 --- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h +++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h @@ -49,7 +49,7 @@ struct _radeon_mipmap_level { }; /* store the max possible in the miptree */ -#define RADEON_MIPTREE_MAX_TEXTURE_LEVELS 13 +#define RADEON_MIPTREE_MAX_TEXTURE_LEVELS 15 /** * A mipmap tree contains texture images in the layout that the hardware diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c index 1ea52f96d7..94e56c2ade 100644 --- a/src/mesa/drivers/dri/radeon/radeon_screen.c +++ b/src/mesa/drivers/dri/radeon/radeon_screen.c @@ -1155,6 +1155,14 @@ static int radeon_set_screen_flags(radeonScreenPtr screen, int device_id) screen->chip_flags = RADEON_CHIPSET_TCL; break; + case PCI_CHIP_PALM_9802: + case PCI_CHIP_PALM_9803: + case PCI_CHIP_PALM_9804: + case PCI_CHIP_PALM_9805: + screen->chip_family = CHIP_FAMILY_PALM; + screen->chip_flags = RADEON_CHIPSET_TCL; + break; + default: fprintf(stderr, "unknown chip id 0x%x, can't guess.\n", device_id); @@ -1323,7 +1331,11 @@ radeonCreateScreen( __DRIscreen *sPriv ) screen->chip_flags |= RADEON_CLASS_R600; /* set group bytes for r6xx+ */ - screen->group_bytes = 256; + if (screen->chip_family >= CHIP_FAMILY_CEDAR) + screen->group_bytes = 512; + else + screen->group_bytes = 256; + screen->cpp = dri_priv->bpp / 8; screen->AGPMode = dri_priv->AGPMode; @@ -1568,9 +1580,13 @@ radeonCreateScreen2(__DRIscreen *sPriv) else screen->chip_flags |= RADEON_CLASS_R600; - /* r6xx+ tiling, default to 256 group bytes */ - screen->group_bytes = 256; - if (IS_R600_CLASS(screen) && (sPriv->drm_version.minor >= 6)) { + /* r6xx+ tiling, default group bytes */ + if (screen->chip_family >= CHIP_FAMILY_CEDAR) + screen->group_bytes = 512; + else + screen->group_bytes = 256; + if (IS_R600_CLASS(screen) && (sPriv->drm_version.minor >= 6) && + (screen->chip_family < CHIP_FAMILY_CEDAR)) { ret = radeonGetParam(sPriv, RADEON_INFO_TILE_CONFIG, &temp); if (ret) fprintf(stderr, "failed to get tiling info\n"); diff --git a/src/mesa/drivers/dri/radeon/radeon_texstate.c b/src/mesa/drivers/dri/radeon/radeon_texstate.c index dd8ecdd500..32c021cb54 100644 --- a/src/mesa/drivers/dri/radeon/radeon_texstate.c +++ b/src/mesa/drivers/dri/radeon/radeon_texstate.c @@ -653,6 +653,7 @@ void radeonSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint texture_form radeonTexObjPtr t; uint32_t pitch_val; uint32_t internalFormat, type, format; + gl_format texFormat; type = GL_BGRA; format = GL_UNSIGNED_BYTE; @@ -692,10 +693,6 @@ void radeonSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint texture_form radeon_miptree_unreference(&t->mt); radeon_miptree_unreference(&rImage->mt); - _mesa_init_teximage_fields(radeon->glCtx, target, texImage, - rb->base.Width, rb->base.Height, 1, 0, rb->cpp); - texImage->RowStride = rb->pitch / rb->cpp; - rImage->bo = rb->bo; radeon_bo_ref(rImage->bo); t->bo = rb->bo; @@ -705,23 +702,34 @@ void radeonSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint texture_form t->override_offset = 0; switch (rb->cpp) { case 4: - if (texture_format == __DRI_TEXTURE_FORMAT_RGB) + if (texture_format == __DRI_TEXTURE_FORMAT_RGB) { t->pp_txformat = tx_table[MESA_FORMAT_RGB888].format; - else + texFormat = MESA_FORMAT_RGB888; + } + else { t->pp_txformat = tx_table[MESA_FORMAT_ARGB8888].format; + texFormat = MESA_FORMAT_ARGB8888; + } t->pp_txfilter |= tx_table[MESA_FORMAT_ARGB8888].filter; break; case 3: default: + texFormat = MESA_FORMAT_RGB888; t->pp_txformat = tx_table[MESA_FORMAT_RGB888].format; t->pp_txfilter |= tx_table[MESA_FORMAT_RGB888].filter; break; case 2: + texFormat = MESA_FORMAT_RGB565; t->pp_txformat = tx_table[MESA_FORMAT_RGB565].format; t->pp_txfilter |= tx_table[MESA_FORMAT_RGB565].filter; break; } + _mesa_init_teximage_fields(radeon->glCtx, target, texImage, + rb->base.Width, rb->base.Height, 1, 0, + rb->cpp, texFormat); + texImage->RowStride = rb->pitch / rb->cpp; + t->pp_txpitch &= (1 << 13) -1; pitch_val = rb->pitch; |