diff options
Diffstat (limited to 'src/mesa/drivers/dri/radeon')
20 files changed, 601 insertions, 466 deletions
diff --git a/src/mesa/drivers/dri/radeon/Makefile b/src/mesa/drivers/dri/radeon/Makefile index ae2e695bfc..2b2f2c4aa7 100644 --- a/src/mesa/drivers/dri/radeon/Makefile +++ b/src/mesa/drivers/dri/radeon/Makefile @@ -11,7 +11,7 @@ LIBNAME = radeon_dri.so MINIGLX_SOURCES = server/radeon_dri.c ifeq ($(RADEON_LDFLAGS),) -CS_SOURCES = radeon_cs_space_drm.c +CS_SOURCES = radeon_cs_space_drm.c radeon_bo.c radeon_cs.c endif RADEON_COMMON_SOURCES = \ diff --git a/src/mesa/drivers/dri/radeon/radeon_bo.c b/src/mesa/drivers/dri/radeon/radeon_bo.c new file mode 100644 index 0000000000..393d156cde --- /dev/null +++ b/src/mesa/drivers/dri/radeon/radeon_bo.c @@ -0,0 +1,110 @@ +#include <radeon_bocs_wrapper.h> +#include <radeon_bo_int_drm.h> + +void radeon_bo_debug(struct radeon_bo *bo, + const char *op) +{ + struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; + + fprintf(stderr, "%s %p 0x%08X 0x%08X 0x%08X\n", + op, bo, bo->handle, boi->size, boi->cref); +} + +struct radeon_bo *radeon_bo_open(struct radeon_bo_manager *bom, + uint32_t handle, + uint32_t size, + uint32_t alignment, + uint32_t domains, + uint32_t flags) +{ + struct radeon_bo *bo; + bo = bom->funcs->bo_open(bom, handle, size, alignment, domains, flags); + return bo; +} + +void radeon_bo_ref(struct radeon_bo *bo) +{ + struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; + boi->cref++; + boi->bom->funcs->bo_ref(boi); +} + +struct radeon_bo *radeon_bo_unref(struct radeon_bo *bo) +{ + struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; + boi->cref--; + return boi->bom->funcs->bo_unref(boi); +} + +int radeon_bo_map(struct radeon_bo *bo, int write) +{ + struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; + return boi->bom->funcs->bo_map(boi, write); +} + +int radeon_bo_unmap(struct radeon_bo *bo) +{ + struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; + return boi->bom->funcs->bo_unmap(boi); +} + +int radeon_bo_wait(struct radeon_bo *bo) +{ + struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; + if (!boi->bom->funcs->bo_wait) + return 0; + return boi->bom->funcs->bo_wait(boi); +} + +int radeon_bo_is_busy(struct radeon_bo *bo, + uint32_t *domain) +{ + struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; + return boi->bom->funcs->bo_is_busy(boi, domain); +} + +int radeon_bo_set_tiling(struct radeon_bo *bo, + uint32_t tiling_flags, uint32_t pitch) +{ + struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; + return boi->bom->funcs->bo_set_tiling(boi, tiling_flags, pitch); +} + +int radeon_bo_get_tiling(struct radeon_bo *bo, + uint32_t *tiling_flags, uint32_t *pitch) +{ + struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; + return boi->bom->funcs->bo_get_tiling(boi, tiling_flags, pitch); +} + +int radeon_bo_is_static(struct radeon_bo *bo) +{ + struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; + if (boi->bom->funcs->bo_is_static) + return boi->bom->funcs->bo_is_static(boi); + return 0; +} + +int radeon_bo_is_referenced_by_cs(struct radeon_bo *bo, + struct radeon_cs *cs) +{ + struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; + return boi->cref > 1; +} + +uint32_t radeon_bo_get_handle(struct radeon_bo *bo) +{ + return bo->handle; +} + +uint32_t radeon_bo_get_src_domain(struct radeon_bo *bo) +{ + struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; + uint32_t src_domain; + + src_domain = boi->space_accounted & 0xffff; + if (!src_domain) + src_domain = boi->space_accounted >> 16; + + return src_domain; +} diff --git a/src/mesa/drivers/dri/radeon/radeon_bo_drm.h b/src/mesa/drivers/dri/radeon/radeon_bo_drm.h index 46e30b905a..beb2369880 100644 --- a/src/mesa/drivers/dri/radeon/radeon_bo_drm.h +++ b/src/mesa/drivers/dri/radeon/radeon_bo_drm.h @@ -32,7 +32,6 @@ #include <stdio.h> #include <stdint.h> -//#include "radeon_track.h" /* bo object */ #define RADEON_BO_FLAGS_MACRO_TILE 1 @@ -42,191 +41,35 @@ struct radeon_bo_manager; struct radeon_cs; struct radeon_bo { - uint32_t alignment; + void *ptr; + uint32_t flags; uint32_t handle; uint32_t size; - uint32_t domains; - uint32_t flags; - unsigned cref; -#ifdef RADEON_BO_TRACK - struct radeon_track *track; -#endif - void *ptr; - struct radeon_bo_manager *bom; - uint32_t space_accounted; -}; - -/* bo functions */ -struct radeon_bo_funcs { - struct radeon_bo *(*bo_open)(struct radeon_bo_manager *bom, - uint32_t handle, - uint32_t size, - uint32_t alignment, - uint32_t domains, - uint32_t flags); - void (*bo_ref)(struct radeon_bo *bo); - struct radeon_bo *(*bo_unref)(struct radeon_bo *bo); - int (*bo_map)(struct radeon_bo *bo, int write); - int (*bo_unmap)(struct radeon_bo *bo); - int (*bo_wait)(struct radeon_bo *bo); - int (*bo_is_static)(struct radeon_bo *bo); - int (*bo_set_tiling)(struct radeon_bo *bo, uint32_t tiling_flags, - uint32_t pitch); - int (*bo_get_tiling)(struct radeon_bo *bo, uint32_t *tiling_flags, - uint32_t *pitch); - int (*bo_is_busy)(struct radeon_bo *bo, uint32_t *domain); - int (*bo_is_referenced_by_cs)(struct radeon_bo *bo, struct radeon_cs *cs); }; -struct radeon_bo_manager { - struct radeon_bo_funcs *funcs; - int fd; - -#ifdef RADEON_BO_TRACK - struct radeon_tracker tracker; -#endif -}; - -static inline void _radeon_bo_debug(struct radeon_bo *bo, - const char *op, - const char *file, - const char *func, - int line) -{ - fprintf(stderr, "%s %p 0x%08X 0x%08X 0x%08X [%s %s %d]\n", - op, bo, bo->handle, bo->size, bo->cref, file, func, line); -} - -static inline struct radeon_bo *_radeon_bo_open(struct radeon_bo_manager *bom, - uint32_t handle, - uint32_t size, - uint32_t alignment, - uint32_t domains, - uint32_t flags, - const char *file, - const char *func, - int line) -{ - struct radeon_bo *bo; - - bo = bom->funcs->bo_open(bom, handle, size, alignment, domains, flags); - -#ifdef RADEON_BO_TRACK - if (bo) { - bo->track = radeon_tracker_add_track(&bom->tracker, bo->handle); - radeon_track_add_event(bo->track, file, func, "open", line); - } -#endif - return bo; -} - -static inline void _radeon_bo_ref(struct radeon_bo *bo, - const char *file, - const char *func, - int line) -{ - bo->cref++; -#ifdef RADEON_BO_TRACK - radeon_track_add_event(bo->track, file, func, "ref", line); -#endif - bo->bom->funcs->bo_ref(bo); -} - -static inline struct radeon_bo *_radeon_bo_unref(struct radeon_bo *bo, - const char *file, - const char *func, - int line) -{ - bo->cref--; -#ifdef RADEON_BO_TRACK - radeon_track_add_event(bo->track, file, func, "unref", line); - if (bo->cref <= 0) { - radeon_tracker_remove_track(&bo->bom->tracker, bo->track); - bo->track = NULL; - } -#endif - return bo->bom->funcs->bo_unref(bo); -} - -static inline int _radeon_bo_map(struct radeon_bo *bo, - int write, - const char *file, - const char *func, - int line) -{ - return bo->bom->funcs->bo_map(bo, write); -} - -static inline int _radeon_bo_unmap(struct radeon_bo *bo, - const char *file, - const char *func, - int line) -{ - return bo->bom->funcs->bo_unmap(bo); -} - -static inline int _radeon_bo_wait(struct radeon_bo *bo, - const char *file, - const char *func, - int line) -{ - return bo->bom->funcs->bo_wait(bo); -} - -static inline int _radeon_bo_is_busy(struct radeon_bo *bo, - uint32_t *domain, - const char *file, - const char *func, - int line) -{ - return bo->bom->funcs->bo_is_busy(bo, domain); -} - -static inline int radeon_bo_set_tiling(struct radeon_bo *bo, - uint32_t tiling_flags, uint32_t pitch) -{ - return bo->bom->funcs->bo_set_tiling(bo, tiling_flags, pitch); -} - -static inline int radeon_bo_get_tiling(struct radeon_bo *bo, - uint32_t *tiling_flags, uint32_t *pitch) -{ - return bo->bom->funcs->bo_get_tiling(bo, tiling_flags, pitch); -} - -static inline int radeon_bo_is_static(struct radeon_bo *bo) -{ - if (bo->bom->funcs->bo_is_static) - return bo->bom->funcs->bo_is_static(bo); - return 0; -} - -static inline int _radeon_bo_is_referenced_by_cs(struct radeon_bo *bo, - struct radeon_cs *cs, - const char *file, - const char *func, - unsigned line) -{ - return bo->cref > 1; -} - -#define radeon_bo_open(bom, h, s, a, d, f)\ - _radeon_bo_open(bom, h, s, a, d, f, __FILE__, __FUNCTION__, __LINE__) -#define radeon_bo_ref(bo)\ - _radeon_bo_ref(bo, __FILE__, __FUNCTION__, __LINE__) -#define radeon_bo_unref(bo)\ - _radeon_bo_unref(bo, __FILE__, __FUNCTION__, __LINE__) -#define radeon_bo_map(bo, w)\ - _radeon_bo_map(bo, w, __FILE__, __FUNCTION__, __LINE__) -#define radeon_bo_unmap(bo)\ - _radeon_bo_unmap(bo, __FILE__, __FUNCTION__, __LINE__) -#define radeon_bo_debug(bo, opcode)\ - _radeon_bo_debug(bo, opcode, __FILE__, __FUNCTION__, __LINE__) -#define radeon_bo_wait(bo) \ - _radeon_bo_wait(bo, __FILE__, __func__, __LINE__) -#define radeon_bo_is_busy(bo, domain) \ - _radeon_bo_is_busy(bo, domain, __FILE__, __func__, __LINE__) -#define radeon_bo_is_referenced_by_cs(bo, cs) \ - _radeon_bo_is_referenced_by_cs(bo, cs, __FILE__, __FUNCTION__, __LINE__) +struct radeon_bo_manager; +void radeon_bo_debug(struct radeon_bo *bo, + const char *op); + +struct radeon_bo *radeon_bo_open(struct radeon_bo_manager *bom, + uint32_t handle, + uint32_t size, + uint32_t alignment, + uint32_t domains, + uint32_t flags); + +void radeon_bo_ref(struct radeon_bo *bo); +struct radeon_bo *radeon_bo_unref(struct radeon_bo *bo); +int radeon_bo_map(struct radeon_bo *bo, int write); +int radeon_bo_unmap(struct radeon_bo *bo); +int radeon_bo_wait(struct radeon_bo *bo); +int radeon_bo_is_busy(struct radeon_bo *bo, uint32_t *domain); +int radeon_bo_set_tiling(struct radeon_bo *bo, uint32_t tiling_flags, uint32_t pitch); +int radeon_bo_get_tiling(struct radeon_bo *bo, uint32_t *tiling_flags, uint32_t *pitch); +int radeon_bo_is_static(struct radeon_bo *bo); +int radeon_bo_is_referenced_by_cs(struct radeon_bo *bo, + struct radeon_cs *cs); +uint32_t radeon_bo_get_handle(struct radeon_bo *bo); +uint32_t radeon_bo_get_src_domain(struct radeon_bo *bo); #endif diff --git a/src/mesa/drivers/dri/radeon/radeon_bo_int_drm.h b/src/mesa/drivers/dri/radeon/radeon_bo_int_drm.h new file mode 100644 index 0000000000..190c332475 --- /dev/null +++ b/src/mesa/drivers/dri/radeon/radeon_bo_int_drm.h @@ -0,0 +1,45 @@ +#ifndef RADEON_BO_INT +#define RADEON_BO_INT + +struct radeon_bo_manager { + struct radeon_bo_funcs *funcs; + int fd; +}; + +struct radeon_bo_int { + void *ptr; + uint32_t flags; + uint32_t handle; + uint32_t size; + /* private members */ + uint32_t alignment; + uint32_t domains; + unsigned cref; + struct radeon_bo_manager *bom; + uint32_t space_accounted; + uint32_t referenced_in_cs; +}; + +/* bo functions */ +struct radeon_bo_funcs { + struct radeon_bo *(*bo_open)(struct radeon_bo_manager *bom, + uint32_t handle, + uint32_t size, + uint32_t alignment, + uint32_t domains, + uint32_t flags); + void (*bo_ref)(struct radeon_bo_int *bo); + struct radeon_bo *(*bo_unref)(struct radeon_bo_int *bo); + int (*bo_map)(struct radeon_bo_int *bo, int write); + int (*bo_unmap)(struct radeon_bo_int *bo); + int (*bo_wait)(struct radeon_bo_int *bo); + int (*bo_is_static)(struct radeon_bo_int *bo); + int (*bo_set_tiling)(struct radeon_bo_int *bo, uint32_t tiling_flags, + uint32_t pitch); + int (*bo_get_tiling)(struct radeon_bo_int *bo, uint32_t *tiling_flags, + uint32_t *pitch); + int (*bo_is_busy)(struct radeon_bo_int *bo, uint32_t *domain); + int (*bo_is_referenced_by_cs)(struct radeon_bo_int *bo, struct radeon_cs *cs); +}; + +#endif diff --git a/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c b/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c index ce60a2f7ea..cf12664bac 100644 --- a/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c +++ b/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c @@ -50,6 +50,12 @@ #include "radeon_bocs_wrapper.h" #include "radeon_macros.h" +#ifdef HAVE_LIBDRM_RADEON +#include "radeon_bo_int.h" +#else +#include "radeon_bo_int_drm.h" +#endif + /* no seriously texmem.c is this screwed up */ struct bo_legacy_texture_object { driTextureObject base; @@ -57,7 +63,7 @@ struct bo_legacy_texture_object { }; struct bo_legacy { - struct radeon_bo base; + struct radeon_bo_int base; int map_count; uint32_t pending; int is_pending; @@ -187,10 +193,10 @@ static void legacy_get_current_age(struct bo_manager_legacy *boml) } } -static int legacy_is_pending(struct radeon_bo *bo) +static int legacy_is_pending(struct radeon_bo_int *boi) { - struct bo_manager_legacy *boml = (struct bo_manager_legacy *)bo->bom; - struct bo_legacy *bo_legacy = (struct bo_legacy*)bo; + struct bo_manager_legacy *boml = (struct bo_manager_legacy *)boi->bom; + struct bo_legacy *bo_legacy = (struct bo_legacy*)boi; if (bo_legacy->is_pending <= 0) { bo_legacy->is_pending = 0; @@ -204,13 +210,13 @@ static int legacy_is_pending(struct radeon_bo *bo) if (bo_legacy->pnext) { bo_legacy->pnext->pprev = bo_legacy->pprev; } - assert(bo_legacy->is_pending <= bo->cref); + assert(bo_legacy->is_pending <= boi->cref); while (bo_legacy->is_pending--) { - bo = radeon_bo_unref(bo); - if (!bo) + boi = (struct radeon_bo_int *)radeon_bo_unref((struct radeon_bo *)boi); + if (!boi) break; } - if (bo) + if (boi) bo_legacy->is_pending = 0; boml->cpendings--; return 0; @@ -218,7 +224,7 @@ static int legacy_is_pending(struct radeon_bo *bo) return 1; } -static int legacy_wait_pending(struct radeon_bo *bo) +static int legacy_wait_pending(struct radeon_bo_int *bo) { struct bo_manager_legacy *boml = (struct bo_manager_legacy *)bo->bom; struct bo_legacy *bo_legacy = (struct bo_legacy*)bo; @@ -323,7 +329,7 @@ static struct bo_legacy *bo_allocate(struct bo_manager_legacy *boml, return bo_legacy; } -static int bo_dma_alloc(struct radeon_bo *bo) +static int bo_dma_alloc(struct radeon_bo_int *bo) { struct bo_manager_legacy *boml = (struct bo_manager_legacy *)bo->bom; struct bo_legacy *bo_legacy = (struct bo_legacy*)bo; @@ -333,7 +339,7 @@ static int bo_dma_alloc(struct radeon_bo *bo) int r; /* align size on 4Kb */ - size = (((4 * 1024) - 1) + bo->size) & ~((4 * 1024) - 1); + size = (((4 * 1024) - 1) + bo_legacy->base.size) & ~((4 * 1024) - 1); alloc.region = RADEON_MEM_REGION_GART; alloc.alignment = bo_legacy->base.alignment; alloc.size = size; @@ -355,7 +361,7 @@ static int bo_dma_alloc(struct radeon_bo *bo) return 0; } -static int bo_dma_free(struct radeon_bo *bo) +static int bo_dma_free(struct radeon_bo_int *bo) { struct bo_manager_legacy *boml = (struct bo_manager_legacy *)bo->bom; struct bo_legacy *bo_legacy = (struct bo_legacy*)bo; @@ -428,7 +434,7 @@ static struct radeon_bo *bo_open(struct radeon_bo_manager *bom, bo_legacy = boml->bos.next; while (bo_legacy) { if (bo_legacy->base.handle == handle) { - radeon_bo_ref(&(bo_legacy->base)); + radeon_bo_ref((struct radeon_bo *)&(bo_legacy->base)); return (struct radeon_bo*)bo_legacy; } bo_legacy = bo_legacy->next; @@ -468,20 +474,20 @@ retry: return NULL; } } - radeon_bo_ref(&(bo_legacy->base)); + radeon_bo_ref((struct radeon_bo *)&(bo_legacy->base)); return (struct radeon_bo*)bo_legacy; } -static void bo_ref(struct radeon_bo *bo) +static void bo_ref(struct radeon_bo_int *bo) { } -static struct radeon_bo *bo_unref(struct radeon_bo *bo) +static struct radeon_bo *bo_unref(struct radeon_bo_int *boi) { - struct bo_legacy *bo_legacy = (struct bo_legacy*)bo; + struct bo_legacy *bo_legacy = (struct bo_legacy*)boi; - if (bo->cref <= 0) { + if (boi->cref <= 0) { bo_legacy->prev->next = bo_legacy->next; if (bo_legacy->next) { bo_legacy->next->prev = bo_legacy->prev; @@ -491,10 +497,10 @@ static struct radeon_bo *bo_unref(struct radeon_bo *bo) } return NULL; } - return bo; + return (struct radeon_bo *)boi; } -static int bo_map(struct radeon_bo *bo, int write) +static int bo_map(struct radeon_bo_int *bo, int write) { struct bo_manager_legacy *boml = (struct bo_manager_legacy *)bo->bom; struct bo_legacy *bo_legacy = (struct bo_legacy*)bo; @@ -528,7 +534,7 @@ static int bo_map(struct radeon_bo *bo, int write) return 0; } -static int bo_unmap(struct radeon_bo *bo) +static int bo_unmap(struct radeon_bo_int *bo) { struct bo_legacy *bo_legacy = (struct bo_legacy*)bo; @@ -542,7 +548,7 @@ static int bo_unmap(struct radeon_bo *bo) return 0; } -static int bo_is_busy(struct radeon_bo *bo, uint32_t *domain) +static int bo_is_busy(struct radeon_bo_int *bo, uint32_t *domain) { *domain = 0; if (bo->domains & RADEON_GEM_DOMAIN_GTT) @@ -555,7 +561,7 @@ static int bo_is_busy(struct radeon_bo *bo, uint32_t *domain) return 0; } -static int bo_is_static(struct radeon_bo *bo) +static int bo_is_static(struct radeon_bo_int *bo) { struct bo_legacy *bo_legacy = (struct bo_legacy*)bo; return bo_legacy->static_bo; @@ -574,7 +580,7 @@ static struct radeon_bo_funcs bo_legacy_funcs = { bo_is_busy }; -static int bo_vram_validate(struct radeon_bo *bo, +static int bo_vram_validate(struct radeon_bo_int *bo, uint32_t *soffset, uint32_t *eoffset) { @@ -700,29 +706,30 @@ int radeon_bo_legacy_validate(struct radeon_bo *bo, uint32_t *soffset, uint32_t *eoffset) { - struct bo_manager_legacy *boml = (struct bo_manager_legacy *)bo->bom; + struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; + struct bo_manager_legacy *boml = (struct bo_manager_legacy *)boi->bom; struct bo_legacy *bo_legacy = (struct bo_legacy*)bo; int r; int retries = 0; if (bo_legacy->map_count) { fprintf(stderr, "bo(%p, %d) is mapped (%d) can't valide it.\n", - bo, bo->size, bo_legacy->map_count); + bo, boi->size, bo_legacy->map_count); return -EINVAL; } - if(bo->size == 0) { + if(boi->size == 0) { fprintf(stderr, "bo(%p) has size 0.\n", bo); return -EINVAL; } if (bo_legacy->static_bo || bo_legacy->validated) { *soffset = bo_legacy->offset; - *eoffset = bo_legacy->offset + bo->size; + *eoffset = bo_legacy->offset + boi->size; return 0; } - if (!(bo->domains & RADEON_GEM_DOMAIN_GTT)) { + if (!(boi->domains & RADEON_GEM_DOMAIN_GTT)) { - r = bo_vram_validate(bo, soffset, eoffset); + r = bo_vram_validate(boi, soffset, eoffset); if (r) { legacy_track_pending(&boml->base, 0); legacy_kick_all_buffers(boml); @@ -736,7 +743,7 @@ int radeon_bo_legacy_validate(struct radeon_bo *bo, } } *soffset = bo_legacy->offset; - *eoffset = bo_legacy->offset + bo->size; + *eoffset = bo_legacy->offset + boi->size; bo_legacy->validated = 1; return 0; @@ -744,7 +751,8 @@ int radeon_bo_legacy_validate(struct radeon_bo *bo, void radeon_bo_legacy_pending(struct radeon_bo *bo, uint32_t pending) { - struct bo_manager_legacy *boml = (struct bo_manager_legacy *)bo->bom; + struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; + struct bo_manager_legacy *boml = (struct bo_manager_legacy *)boi->bom; struct bo_legacy *bo_legacy = (struct bo_legacy*)bo; bo_legacy->pending = pending; @@ -799,7 +807,7 @@ static struct bo_legacy *radeon_legacy_bo_alloc_static(struct bo_manager_legacy if (bo->base.handle > bom->nhandle) { bom->nhandle = bo->base.handle + 1; } - radeon_bo_ref(&(bo->base)); + radeon_bo_ref((struct radeon_bo *)&(bo->base)); return bo; } @@ -894,12 +902,13 @@ void radeon_bo_legacy_texture_age(struct radeon_bo_manager *bom) unsigned radeon_bo_legacy_relocs_size(struct radeon_bo *bo) { + struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; struct bo_legacy *bo_legacy = (struct bo_legacy*)bo; - if (bo_legacy->static_bo || (bo->domains & RADEON_GEM_DOMAIN_GTT)) { + if (bo_legacy->static_bo || (boi->domains & RADEON_GEM_DOMAIN_GTT)) { return 0; } - return bo->size; + return boi->size; } /* @@ -924,7 +933,7 @@ struct radeon_bo *radeon_legacy_bo_alloc_fake(struct radeon_bo_manager *bom, if (bo->base.handle > boml->nhandle) { boml->nhandle = bo->base.handle + 1; } - radeon_bo_ref(&(bo->base)); - return &(bo->base); + radeon_bo_ref((struct radeon_bo *)&(bo->base)); + return (struct radeon_bo *)&(bo->base); } diff --git a/src/mesa/drivers/dri/radeon/radeon_bocs_wrapper.h b/src/mesa/drivers/dri/radeon/radeon_bocs_wrapper.h index 4520a7d7d4..6c2648b6bd 100644 --- a/src/mesa/drivers/dri/radeon/radeon_bocs_wrapper.h +++ b/src/mesa/drivers/dri/radeon/radeon_bocs_wrapper.h @@ -18,8 +18,11 @@ #define RADEON_TILING_MACRO 0x1 #define RADEON_TILING_MICRO 0x2 #define RADEON_TILING_SWAP 0x4 + +#ifndef RADEON_TILING_SURFACE #define RADEON_TILING_SURFACE 0x8 /* this object requires a surface * when mapped - i.e. front buffer */ +#endif /* to be used to build locally in mesa with no libdrm bits */ #include "../radeon/radeon_bo_drm.h" diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c index 51fa618937..2a2b16a54b 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.c +++ b/src/mesa/drivers/dri/radeon/radeon_common.c @@ -641,6 +641,27 @@ void radeonCopySubBuffer(__DRIdrawablePrivate * dPriv, } } +/** + * Check if we're about to draw into the front color buffer. + * If so, set the intel->front_buffer_dirty field to true. + */ +void +radeon_check_front_buffer_rendering(GLcontext *ctx) +{ + radeonContextPtr radeon = RADEON_CONTEXT(ctx); + const struct gl_framebuffer *fb = ctx->DrawBuffer; + + if (fb->Name == 0) { + /* drawing to window system buffer */ + if (fb->_NumColorDrawBuffers > 0) { + if (fb->_ColorDrawBufferIndexes[0] == BUFFER_FRONT_LEFT) { + radeon->front_buffer_dirty = GL_TRUE; + } + } + } +} + + void radeon_draw_buffer(GLcontext *ctx, struct gl_framebuffer *fb) { radeonContextPtr radeon = RADEON_CONTEXT(ctx); @@ -1095,7 +1116,7 @@ void radeonFlush(GLcontext *ctx) then no point flushing anything at all. */ if (!radeon->dma.flush && !radeon->cmdbuf.cs->cdw && is_empty_list(&radeon->dma.reserved)) - return; + goto flush_front; if (radeon->dma.flush) radeon->dma.flush( ctx ); @@ -1103,6 +1124,7 @@ void radeonFlush(GLcontext *ctx) if (radeon->cmdbuf.cs->cdw) rcommonFlushCmdBuf(radeon, __FUNCTION__); +flush_front: if ((ctx->DrawBuffer->Name == 0) && radeon->front_buffer_dirty) { __DRIscreen *const screen = radeon->radeonScreen->driScreen; diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h index 0608fe2418..faad145cc4 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.h +++ b/src/mesa/drivers/dri/radeon/radeon_common.h @@ -43,6 +43,8 @@ radeon_renderbuffer_set_bo(struct radeon_renderbuffer *rb, struct radeon_bo *bo); struct radeon_renderbuffer * radeon_create_renderbuffer(gl_format format, __DRIdrawablePrivate *driDrawPriv); + +void radeon_check_front_buffer_rendering(GLcontext *ctx); static inline struct radeon_renderbuffer *radeon_renderbuffer(struct gl_renderbuffer *rb) { struct radeon_renderbuffer *rrb = (struct radeon_renderbuffer *)rb; diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h index 49a9ec5610..0739496e03 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.h +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h @@ -406,9 +406,6 @@ struct radeon_state { struct radeon_depthbuffer_state depth; struct radeon_scissor_state scissor; struct radeon_stencilbuffer_state stencil; - - struct radeon_cs_space_check bos[RADEON_MAX_BOS]; - int validated_bo_count; }; /** diff --git a/src/mesa/drivers/dri/radeon/radeon_cs.c b/src/mesa/drivers/dri/radeon/radeon_cs.c new file mode 100644 index 0000000000..17e7433369 --- /dev/null +++ b/src/mesa/drivers/dri/radeon/radeon_cs.c @@ -0,0 +1,95 @@ + +#include <stdio.h> +#include <stdint.h> +#include "drm.h" +#include "radeon_drm.h" +#include "radeon_bocs_wrapper.h" +#include "radeon_cs_int_drm.h" + +struct radeon_cs *radeon_cs_create(struct radeon_cs_manager *csm, + uint32_t ndw) +{ + struct radeon_cs_int *csi = csm->funcs->cs_create(csm, ndw); + return (struct radeon_cs *)csi; +} + +int radeon_cs_write_reloc(struct radeon_cs *cs, + struct radeon_bo *bo, + uint32_t read_domain, + uint32_t write_domain, + uint32_t flags) +{ + struct radeon_cs_int *csi = (struct radeon_cs_int *)cs; + + return csi->csm->funcs->cs_write_reloc(csi, + bo, + read_domain, + write_domain, + flags); +} + +int radeon_cs_begin(struct radeon_cs *cs, + uint32_t ndw, + const char *file, + const char *func, + int line) +{ + struct radeon_cs_int *csi = (struct radeon_cs_int *)cs; + return csi->csm->funcs->cs_begin(csi, ndw, file, func, line); +} + +int radeon_cs_end(struct radeon_cs *cs, + const char *file, + const char *func, + int line) +{ + struct radeon_cs_int *csi = (struct radeon_cs_int *)cs; + return csi->csm->funcs->cs_end(csi, file, func, line); +} + +int radeon_cs_emit(struct radeon_cs *cs) +{ + struct radeon_cs_int *csi = (struct radeon_cs_int *)cs; + return csi->csm->funcs->cs_emit(csi); +} + +int radeon_cs_destroy(struct radeon_cs *cs) +{ + struct radeon_cs_int *csi = (struct radeon_cs_int *)cs; + return csi->csm->funcs->cs_destroy(csi); +} + +int radeon_cs_erase(struct radeon_cs *cs) +{ + struct radeon_cs_int *csi = (struct radeon_cs_int *)cs; + return csi->csm->funcs->cs_erase(csi); +} + +int radeon_cs_need_flush(struct radeon_cs *cs) +{ + struct radeon_cs_int *csi = (struct radeon_cs_int *)cs; + return csi->csm->funcs->cs_need_flush(csi); +} + +void radeon_cs_print(struct radeon_cs *cs, FILE *file) +{ + struct radeon_cs_int *csi = (struct radeon_cs_int *)cs; + csi->csm->funcs->cs_print(csi, file); +} + +void radeon_cs_set_limit(struct radeon_cs *cs, uint32_t domain, uint32_t limit) +{ + struct radeon_cs_int *csi = (struct radeon_cs_int *)cs; + if (domain == RADEON_GEM_DOMAIN_VRAM) + csi->csm->vram_limit = limit; + else + csi->csm->gart_limit = limit; +} + +void radeon_cs_space_set_flush(struct radeon_cs *cs, void (*fn)(void *), void *data) +{ + struct radeon_cs_int *csi = (struct radeon_cs_int *)cs; + csi->space_flush_fn = fn; + csi->space_flush_data = data; +} + diff --git a/src/mesa/drivers/dri/radeon/radeon_cs_drm.h b/src/mesa/drivers/dri/radeon/radeon_cs_drm.h index ab4eca31a3..a3f1750c6e 100644 --- a/src/mesa/drivers/dri/radeon/radeon_cs_drm.h +++ b/src/mesa/drivers/dri/radeon/radeon_cs_drm.h @@ -36,6 +36,7 @@ #include <string.h> #include "drm.h" #include "radeon_drm.h" +#include "radeon_bo_drm.h" struct radeon_cs_reloc { struct radeon_bo *bo; @@ -49,173 +50,41 @@ struct radeon_cs_reloc { #define RADEON_CS_SPACE_OP_TO_BIG 1 #define RADEON_CS_SPACE_FLUSH 2 -struct radeon_cs_space_check { - struct radeon_bo *bo; - uint32_t read_domains; - uint32_t write_domain; - uint32_t new_accounted; -}; - -#define MAX_SPACE_BOS (32) - -struct radeon_cs_manager; - struct radeon_cs { - struct radeon_cs_manager *csm; - void *relocs; - uint32_t *packets; - unsigned crelocs; - unsigned relocs_total_size; - unsigned cdw; - unsigned ndw; - int section; + uint32_t *packets; + unsigned cdw; + unsigned ndw; unsigned section_ndw; unsigned section_cdw; - const char *section_file; - const char *section_func; - int section_line; - struct radeon_cs_space_check bos[MAX_SPACE_BOS]; - int bo_count; - void (*space_flush_fn)(void *); - void *space_flush_data; -}; - -/* cs functions */ -struct radeon_cs_funcs { - struct radeon_cs *(*cs_create)(struct radeon_cs_manager *csm, - uint32_t ndw); - int (*cs_write_reloc)(struct radeon_cs *cs, - struct radeon_bo *bo, - uint32_t read_domain, - uint32_t write_domain, - uint32_t flags); - int (*cs_begin)(struct radeon_cs *cs, - uint32_t ndw, - const char *file, - const char *func, - int line); - int (*cs_end)(struct radeon_cs *cs, - const char *file, - const char *func, - int line); - int (*cs_emit)(struct radeon_cs *cs); - int (*cs_destroy)(struct radeon_cs *cs); - int (*cs_erase)(struct radeon_cs *cs); - int (*cs_need_flush)(struct radeon_cs *cs); - void (*cs_print)(struct radeon_cs *cs, FILE *file); -}; - -struct radeon_cs_manager { - struct radeon_cs_funcs *funcs; - int fd; - int32_t vram_limit, gart_limit; - int32_t vram_write_used, gart_write_used; - int32_t read_used; }; -static inline struct radeon_cs *radeon_cs_create(struct radeon_cs_manager *csm, - uint32_t ndw) -{ - return csm->funcs->cs_create(csm, ndw); -} - -static inline int radeon_cs_write_reloc(struct radeon_cs *cs, - struct radeon_bo *bo, - uint32_t read_domain, - uint32_t write_domain, - uint32_t flags) -{ - return cs->csm->funcs->cs_write_reloc(cs, - bo, - read_domain, - write_domain, - flags); -} - -static inline int radeon_cs_begin(struct radeon_cs *cs, - uint32_t ndw, - const char *file, - const char *func, - int line) -{ - return cs->csm->funcs->cs_begin(cs, ndw, file, func, line); -} - -static inline int radeon_cs_end(struct radeon_cs *cs, - const char *file, - const char *func, - int line) -{ - return cs->csm->funcs->cs_end(cs, file, func, line); -} - -static inline int radeon_cs_emit(struct radeon_cs *cs) -{ - return cs->csm->funcs->cs_emit(cs); -} - -static inline int radeon_cs_destroy(struct radeon_cs *cs) -{ - return cs->csm->funcs->cs_destroy(cs); -} - -static inline int radeon_cs_erase(struct radeon_cs *cs) -{ - return cs->csm->funcs->cs_erase(cs); -} - -static inline int radeon_cs_need_flush(struct radeon_cs *cs) -{ - return cs->csm->funcs->cs_need_flush(cs); -} - -static inline void radeon_cs_print(struct radeon_cs *cs, FILE *file) -{ - cs->csm->funcs->cs_print(cs, file); -} - -static inline void radeon_cs_set_limit(struct radeon_cs *cs, uint32_t domain, uint32_t limit) -{ - - if (domain == RADEON_GEM_DOMAIN_VRAM) - cs->csm->vram_limit = limit; - else - cs->csm->gart_limit = limit; -} - -static inline void radeon_cs_write_dword(struct radeon_cs *cs, uint32_t dword) -{ - cs->packets[cs->cdw++] = dword; - if (cs->section) { - cs->section_cdw++; - } -} - -static inline void radeon_cs_write_qword(struct radeon_cs *cs, uint64_t qword) -{ - - memcpy(cs->packets + cs->cdw, &qword, sizeof(qword)); - cs->cdw+=2; - if (cs->section) { - cs->section_cdw+=2; - } -} - -static inline void radeon_cs_write_table(struct radeon_cs *cs, void *data, uint32_t size) -{ - memcpy(cs->packets + cs->cdw, data, size * 4); - cs->cdw += size; - if (cs->section) { - cs->section_cdw += size; - } -} +#define MAX_SPACE_BOS (32) -static inline void radeon_cs_space_set_flush(struct radeon_cs *cs, void (*fn)(void *), void *data) -{ - cs->space_flush_fn = fn; - cs->space_flush_data = data; -} +struct radeon_cs_manager; +extern struct radeon_cs *radeon_cs_create(struct radeon_cs_manager *csm, + uint32_t ndw); + +extern int radeon_cs_begin(struct radeon_cs *cs, + uint32_t ndw, + const char *file, + const char *func, int line); +extern int radeon_cs_end(struct radeon_cs *cs, + const char *file, + const char *func, + int line); +extern int radeon_cs_emit(struct radeon_cs *cs); +extern int radeon_cs_destroy(struct radeon_cs *cs); +extern int radeon_cs_erase(struct radeon_cs *cs); +extern int radeon_cs_need_flush(struct radeon_cs *cs); +extern void radeon_cs_print(struct radeon_cs *cs, FILE *file); +extern void radeon_cs_set_limit(struct radeon_cs *cs, uint32_t domain, uint32_t limit); +extern void radeon_cs_space_set_flush(struct radeon_cs *cs, void (*fn)(void *), void *data); +extern int radeon_cs_write_reloc(struct radeon_cs *cs, + struct radeon_bo *bo, + uint32_t read_domain, + uint32_t write_domain, + uint32_t flags); /* * add a persistent BO to the list @@ -243,4 +112,30 @@ int radeon_cs_space_check_with_bo(struct radeon_cs *cs, uint32_t read_domains, uint32_t write_domain); +static inline void radeon_cs_write_dword(struct radeon_cs *cs, uint32_t dword) +{ + cs->packets[cs->cdw++] = dword; + if (cs->section_ndw) { + cs->section_cdw++; + } +} + +static inline void radeon_cs_write_qword(struct radeon_cs *cs, uint64_t qword) +{ + memcpy(cs->packets + cs->cdw, &qword, sizeof(uint64_t)); + cs->cdw += 2; + if (cs->section_ndw) { + cs->section_cdw += 2; + } +} + +static inline void radeon_cs_write_table(struct radeon_cs *cs, + void *data, uint32_t size) +{ + memcpy(cs->packets + cs->cdw, data, size * 4); + cs->cdw += size; + if (cs->section_ndw) { + cs->section_cdw += size; + } +} #endif diff --git a/src/mesa/drivers/dri/radeon/radeon_cs_int_drm.h b/src/mesa/drivers/dri/radeon/radeon_cs_int_drm.h new file mode 100644 index 0000000000..8ba76bf951 --- /dev/null +++ b/src/mesa/drivers/dri/radeon/radeon_cs_int_drm.h @@ -0,0 +1,66 @@ + +#ifndef _RADEON_CS_INT_H_ +#define _RADEON_CS_INT_H_ + +struct radeon_cs_space_check { + struct radeon_bo_int *bo; + uint32_t read_domains; + uint32_t write_domain; + uint32_t new_accounted; +}; + +struct radeon_cs_int { + /* keep first two in same place */ + uint32_t *packets; + unsigned cdw; + unsigned ndw; + unsigned section_ndw; + unsigned section_cdw; + /* private members */ + struct radeon_cs_manager *csm; + void *relocs; + unsigned crelocs; + unsigned relocs_total_size; + const char *section_file; + const char *section_func; + int section_line; + struct radeon_cs_space_check bos[MAX_SPACE_BOS]; + int bo_count; + void (*space_flush_fn)(void *); + void *space_flush_data; +}; + +/* cs functions */ +struct radeon_cs_funcs { + struct radeon_cs_int *(*cs_create)(struct radeon_cs_manager *csm, + uint32_t ndw); + int (*cs_write_reloc)(struct radeon_cs_int *cs, + struct radeon_bo *bo, + uint32_t read_domain, + uint32_t write_domain, + uint32_t flags); + int (*cs_begin)(struct radeon_cs_int *cs, + uint32_t ndw, + const char *file, + const char *func, + int line); + int (*cs_end)(struct radeon_cs_int *cs, + const char *file, const char *func, + int line); + + + int (*cs_emit)(struct radeon_cs_int *cs); + int (*cs_destroy)(struct radeon_cs_int *cs); + int (*cs_erase)(struct radeon_cs_int *cs); + int (*cs_need_flush)(struct radeon_cs_int *cs); + void (*cs_print)(struct radeon_cs_int *cs, FILE *file); +}; + +struct radeon_cs_manager { + struct radeon_cs_funcs *funcs; + int fd; + int32_t vram_limit, gart_limit; + int32_t vram_write_used, gart_write_used; + int32_t read_used; +}; +#endif diff --git a/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c b/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c index f1addb299e..45b608a1b9 100644 --- a/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c +++ b/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c @@ -30,10 +30,18 @@ * Jérôme Glisse <glisse@freedesktop.org> */ #include <errno.h> +#include <unistd.h> +#include <stdint.h> +#include "drm.h" +#include "radeon_drm.h" #include "radeon_bocs_wrapper.h" #include "radeon_common.h" - +#ifdef HAVE_LIBDRM_RADEON +#include "radeon_cs_int.h" +#else +#include "radeon_cs_int_drm.h" +#endif struct cs_manager_legacy { struct radeon_cs_manager base; struct radeon_context *ctx; @@ -51,27 +59,27 @@ struct cs_reloc_legacy { }; -static struct radeon_cs *cs_create(struct radeon_cs_manager *csm, - uint32_t ndw) +static struct radeon_cs_int *cs_create(struct radeon_cs_manager *csm, + uint32_t ndw) { - struct radeon_cs *cs; + struct radeon_cs_int *csi; - cs = (struct radeon_cs*)calloc(1, sizeof(struct radeon_cs)); - if (cs == NULL) { + csi = (struct radeon_cs_int*)calloc(1, sizeof(struct radeon_cs_int)); + if (csi == NULL) { return NULL; } - cs->csm = csm; - cs->ndw = (ndw + 0x3FF) & (~0x3FF); - cs->packets = (uint32_t*)malloc(4*cs->ndw); - if (cs->packets == NULL) { - free(cs); + csi->csm = csm; + csi->ndw = (ndw + 0x3FF) & (~0x3FF); + csi->packets = (uint32_t*)malloc(4*csi->ndw); + if (csi->packets == NULL) { + free(csi); return NULL; } - cs->relocs_total_size = 0; - return cs; + csi->relocs_total_size = 0; + return csi; } -static int cs_write_reloc(struct radeon_cs *cs, +static int cs_write_reloc(struct radeon_cs_int *cs, struct radeon_bo *bo, uint32_t read_domain, uint32_t write_domain, @@ -150,20 +158,19 @@ static int cs_write_reloc(struct radeon_cs *cs, return 0; } -static int cs_begin(struct radeon_cs *cs, +static int cs_begin(struct radeon_cs_int *cs, uint32_t ndw, const char *file, const char *func, int line) { - if (cs->section) { + if (cs->section_ndw) { fprintf(stderr, "CS already in a section(%s,%s,%d)\n", cs->section_file, cs->section_func, cs->section_line); fprintf(stderr, "CS can't start section(%s,%s,%d)\n", file, func, line); return -EPIPE; } - cs->section = 1; cs->section_ndw = ndw; cs->section_cdw = 0; cs->section_file = file; @@ -187,18 +194,17 @@ static int cs_begin(struct radeon_cs *cs, return 0; } -static int cs_end(struct radeon_cs *cs, +static int cs_end(struct radeon_cs_int *cs, const char *file, const char *func, int line) { - if (!cs->section) { + if (!cs->section_ndw) { fprintf(stderr, "CS no section to end at (%s,%s,%d)\n", file, func, line); return -EPIPE; } - cs->section = 0; if (cs->section_ndw != cs->section_cdw) { fprintf(stderr, "CS section size missmatch start at (%s,%s,%d) %d vs %d\n", cs->section_file, cs->section_func, cs->section_line, cs->section_ndw, cs->section_cdw); @@ -206,10 +212,12 @@ static int cs_end(struct radeon_cs *cs, file, func, line); return -EPIPE; } + cs->section_ndw = 0; + return 0; } -static int cs_process_relocs(struct radeon_cs *cs) +static int cs_process_relocs(struct radeon_cs_int *cs) { struct cs_manager_legacy *csm = (struct cs_manager_legacy*)cs->csm; struct cs_reloc_legacy *relocs; @@ -254,7 +262,7 @@ restart: return 0; } -static int cs_set_age(struct radeon_cs *cs) +static int cs_set_age(struct radeon_cs_int *cs) { struct cs_manager_legacy *csm = (struct cs_manager_legacy*)cs->csm; struct cs_reloc_legacy *relocs; @@ -268,7 +276,7 @@ static int cs_set_age(struct radeon_cs *cs) return 0; } -static int cs_emit(struct radeon_cs *cs) +static int cs_emit(struct radeon_cs_int *cs) { struct cs_manager_legacy *csm = (struct cs_manager_legacy*)cs->csm; drm_radeon_cmd_buffer_t cmd; @@ -276,7 +284,7 @@ static int cs_emit(struct radeon_cs *cs) uint64_t ull; int r; - csm->ctx->vtbl.emit_cs_header(cs, csm->ctx); + csm->ctx->vtbl.emit_cs_header((struct radeon_cs *)cs, csm->ctx); /* append buffer age */ if ( IS_R300_CLASS(csm->ctx->radeonScreen) ) @@ -289,9 +297,9 @@ static int cs_emit(struct radeon_cs *cs) age.scratch.reg = 2; age.scratch.n_bufs = 1; age.scratch.flags = 0; - radeon_cs_write_dword(cs, age.u); - radeon_cs_write_qword(cs, ull); - radeon_cs_write_dword(cs, 0); + radeon_cs_write_dword((struct radeon_cs *)cs, age.u); + radeon_cs_write_qword((struct radeon_cs *)cs, ull); + radeon_cs_write_dword((struct radeon_cs *)cs, 0); } r = cs_process_relocs(cs); @@ -342,7 +350,7 @@ static void inline cs_free_reloc(void *relocs_p, int crelocs) free(relocs[i].indices); } -static int cs_destroy(struct radeon_cs *cs) +static int cs_destroy(struct radeon_cs_int *cs) { cs_free_reloc(cs->relocs, cs->crelocs); free(cs->relocs); @@ -351,7 +359,7 @@ static int cs_destroy(struct radeon_cs *cs) return 0; } -static int cs_erase(struct radeon_cs *cs) +static int cs_erase(struct radeon_cs_int *cs) { cs_free_reloc(cs->relocs, cs->crelocs); free(cs->relocs); @@ -359,18 +367,18 @@ static int cs_erase(struct radeon_cs *cs) cs->relocs = NULL; cs->crelocs = 0; cs->cdw = 0; - cs->section = 0; + cs->section_ndw = 0; return 0; } -static int cs_need_flush(struct radeon_cs *cs) +static int cs_need_flush(struct radeon_cs_int *cs) { /* this function used to flush when the BO usage got to * a certain size, now the higher levels handle this better */ return 0; } -static void cs_print(struct radeon_cs *cs, FILE *file) +static void cs_print(struct radeon_cs_int *cs, FILE *file) { } diff --git a/src/mesa/drivers/dri/radeon/radeon_cs_space_drm.c b/src/mesa/drivers/dri/radeon/radeon_cs_space_drm.c index 89cbbb5a6b..e22b437d56 100644 --- a/src/mesa/drivers/dri/radeon/radeon_cs_space_drm.c +++ b/src/mesa/drivers/dri/radeon/radeon_cs_space_drm.c @@ -29,6 +29,8 @@ #include <errno.h> #include <stdlib.h> #include "radeon_bocs_wrapper.h" +#include "radeon_bo_int_drm.h" +#include "radeon_cs_int_drm.h" struct rad_sizes { int32_t op_read; @@ -39,7 +41,7 @@ struct rad_sizes { static inline int radeon_cs_setup_bo(struct radeon_cs_space_check *sc, struct rad_sizes *sizes) { uint32_t read_domains, write_domain; - struct radeon_bo *bo; + struct radeon_bo_int *bo; bo = sc->bo; sc->new_accounted = 0; @@ -47,7 +49,7 @@ static inline int radeon_cs_setup_bo(struct radeon_cs_space_check *sc, struct ra write_domain = sc->write_domain; /* legacy needs a static check */ - if (radeon_bo_is_static(bo)) { + if (radeon_bo_is_static((struct radeon_bo *)sc->bo)) { bo->space_accounted = sc->new_accounted = (read_domains << 16) | write_domain; return 0; } @@ -100,11 +102,11 @@ static inline int radeon_cs_setup_bo(struct radeon_cs_space_check *sc, struct ra return 0; } -static int radeon_cs_do_space_check(struct radeon_cs *cs, struct radeon_cs_space_check *new_tmp) +static int radeon_cs_do_space_check(struct radeon_cs_int *cs, struct radeon_cs_space_check *new_tmp) { struct radeon_cs_manager *csm = cs->csm; int i; - struct radeon_bo *bo; + struct radeon_bo_int *bo; struct rad_sizes sizes; int ret; @@ -158,25 +160,28 @@ static int radeon_cs_do_space_check(struct radeon_cs *cs, struct radeon_cs_space void radeon_cs_space_add_persistent_bo(struct radeon_cs *cs, struct radeon_bo *bo, uint32_t read_domains, uint32_t write_domain) { + struct radeon_cs_int *csi = (struct radeon_cs_int *)cs; + struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; int i; - for (i = 0; i < cs->bo_count; i++) { - if (cs->bos[i].bo == bo && - cs->bos[i].read_domains == read_domains && - cs->bos[i].write_domain == write_domain) + for (i = 0; i < csi->bo_count; i++) { + if (csi->bos[i].bo == boi && + csi->bos[i].read_domains == read_domains && + csi->bos[i].write_domain == write_domain) return; } radeon_bo_ref(bo); - i = cs->bo_count; - cs->bos[i].bo = bo; - cs->bos[i].read_domains = read_domains; - cs->bos[i].write_domain = write_domain; - cs->bos[i].new_accounted = 0; - cs->bo_count++; - - assert(cs->bo_count < MAX_SPACE_BOS); + i = csi->bo_count; + csi->bos[i].bo = boi; + csi->bos[i].read_domains = read_domains; + csi->bos[i].write_domain = write_domain; + csi->bos[i].new_accounted = 0; + csi->bo_count++; + + assert(csi->bo_count < MAX_SPACE_BOS); } -static int radeon_cs_check_space_internal(struct radeon_cs *cs, struct radeon_cs_space_check *tmp_bo) +static int radeon_cs_check_space_internal(struct radeon_cs_int *cs, + struct radeon_cs_space_check *tmp_bo) { int ret; int flushed = 0; @@ -198,37 +203,42 @@ again: int radeon_cs_space_check_with_bo(struct radeon_cs *cs, struct radeon_bo *bo, uint32_t read_domains, uint32_t write_domain) -{ +{ + struct radeon_cs_int *csi = (struct radeon_cs_int *)cs; + struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; struct radeon_cs_space_check temp_bo; + int ret = 0; if (bo) { - temp_bo.bo = bo; + temp_bo.bo = boi; temp_bo.read_domains = read_domains; temp_bo.write_domain = write_domain; temp_bo.new_accounted = 0; } - ret = radeon_cs_check_space_internal(cs, bo ? &temp_bo : NULL); + ret = radeon_cs_check_space_internal(csi, bo ? &temp_bo : NULL); return ret; } int radeon_cs_space_check(struct radeon_cs *cs) { - return radeon_cs_check_space_internal(cs, NULL); + struct radeon_cs_int *csi = (struct radeon_cs_int *)cs; + return radeon_cs_check_space_internal(csi, NULL); } void radeon_cs_space_reset_bos(struct radeon_cs *cs) { + struct radeon_cs_int *csi = (struct radeon_cs_int *)cs; int i; - for (i = 0; i < cs->bo_count; i++) { - radeon_bo_unref(cs->bos[i].bo); - cs->bos[i].bo = NULL; - cs->bos[i].read_domains = 0; - cs->bos[i].write_domain = 0; - cs->bos[i].new_accounted = 0; + for (i = 0; i < csi->bo_count; i++) { + radeon_bo_unref((struct radeon_bo *)csi->bos[i].bo); + csi->bos[i].bo = NULL; + csi->bos[i].read_domains = 0; + csi->bos[i].write_domain = 0; + csi->bos[i].new_accounted = 0; } - cs->bo_count = 0; + csi->bo_count = 0; } diff --git a/src/mesa/drivers/dri/radeon/radeon_dma.c b/src/mesa/drivers/dri/radeon/radeon_dma.c index b8c65f4ce6..d31e4e47dd 100644 --- a/src/mesa/drivers/dri/radeon/radeon_dma.c +++ b/src/mesa/drivers/dri/radeon/radeon_dma.c @@ -205,7 +205,6 @@ again_alloc: counter on unused buffers for later freeing them from begin of list */ dma_bo = last_elem(&rmesa->dma.free); - assert(dma_bo->bo->cref == 1); remove_from_list(dma_bo); insert_at_head(&rmesa->dma.reserved, dma_bo); } diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c index fc21069a92..a536436d55 100644 --- a/src/mesa/drivers/dri/radeon/radeon_fbo.c +++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c @@ -166,8 +166,9 @@ radeon_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb, uint32_t size; uint32_t pitch = ((cpp * width + 63) & ~63) / cpp; - fprintf(stderr,"Allocating %d x %d radeon RBO (pitch %d)\n", width, - height, pitch); + if (RADEON_DEBUG & RADEON_MEMORY) + fprintf(stderr,"Allocating %d x %d radeon RBO (pitch %d)\n", width, + height, pitch); size = pitch * height * cpp; rrb->pitch = pitch * cpp; diff --git a/src/mesa/drivers/dri/radeon/radeon_ioctl.c b/src/mesa/drivers/dri/radeon/radeon_ioctl.c index a0106d00fa..13fd6f9971 100644 --- a/src/mesa/drivers/dri/radeon/radeon_ioctl.c +++ b/src/mesa/drivers/dri/radeon/radeon_ioctl.c @@ -575,6 +575,10 @@ static void radeonClear( GLcontext *ctx, GLbitfield mask ) GLuint color_mask = 0; GLuint orig_mask = mask; + if (mask & (BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_FRONT_RIGHT)) { + rmesa->radeon.front_buffer_dirty = GL_TRUE; + } + if ( RADEON_DEBUG & RADEON_IOCTL ) { fprintf( stderr, "radeonClear\n"); } diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c index a7f347202a..033f26db2a 100644 --- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c +++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c @@ -452,7 +452,10 @@ static void migrate_image_to_miptree(radeon_mipmap_tree *mt, radeon_bo_unmap(image->mt->bo); radeon_miptree_unreference(&image->mt); - } else { + } else if (image->base.Data) { + /* This condition should be removed, it's here to workaround + * a segfault when mapping textures during software fallbacks. + */ const uint32_t srcrowstride = _mesa_format_row_stride(image->base.TexFormat, image->base.Width); uint32_t rows = image->base.Height * image->base.Depth; diff --git a/src/mesa/drivers/dri/radeon/radeon_span.c b/src/mesa/drivers/dri/radeon/radeon_span.c index 37904dc8dc..8db3d2b143 100644 --- a/src/mesa/drivers/dri/radeon/radeon_span.c +++ b/src/mesa/drivers/dri/radeon/radeon_span.c @@ -811,8 +811,7 @@ static void map_unmap_rb(struct gl_renderbuffer *rb, int flag) return; if (flag) { - if (rrb->bo->bom->funcs->bo_wait) - radeon_bo_wait(rrb->bo); + radeon_bo_wait(rrb->bo); r = radeon_bo_map(rrb->bo, 1); if (r) { fprintf(stderr, "(%s) error(%d) mapping buffer.\n", @@ -828,18 +827,21 @@ static void map_unmap_rb(struct gl_renderbuffer *rb, int flag) } static void -radeon_map_unmap_buffers(GLcontext *ctx, GLboolean map) +radeon_map_unmap_framebuffer(GLcontext *ctx, struct gl_framebuffer *fb, + GLboolean map) { GLuint i, j; /* color draw buffers */ for (j = 0; j < ctx->DrawBuffer->_NumColorDrawBuffers; j++) - map_unmap_rb(ctx->DrawBuffer->_ColorDrawBuffers[j], map); + map_unmap_rb(fb->_ColorDrawBuffers[j], map); + + map_unmap_rb(fb->_ColorReadBuffer, map); /* check for render to textures */ for (i = 0; i < BUFFER_COUNT; i++) { struct gl_renderbuffer_attachment *att = - ctx->DrawBuffer->Attachment + i; + fb->Attachment + i; struct gl_texture_object *tex = att->Texture; if (tex) { /* Render to texture. Note that a mipmapped texture need not @@ -855,15 +857,15 @@ radeon_map_unmap_buffers(GLcontext *ctx, GLboolean map) radeon_teximage_unmap(image); } } - - map_unmap_rb(ctx->ReadBuffer->_ColorReadBuffer, map); - + /* depth buffer (Note wrapper!) */ - if (ctx->DrawBuffer->_DepthBuffer) - map_unmap_rb(ctx->DrawBuffer->_DepthBuffer->Wrapped, map); + if (fb->_DepthBuffer) + map_unmap_rb(fb->_DepthBuffer->Wrapped, map); + + if (fb->_StencilBuffer) + map_unmap_rb(fb->_StencilBuffer->Wrapped, map); - if (ctx->DrawBuffer->_StencilBuffer) - map_unmap_rb(ctx->DrawBuffer->_StencilBuffer->Wrapped, map); + radeon_check_front_buffer_rendering(ctx); } static void radeonSpanRenderStart(GLcontext * ctx) @@ -888,23 +890,30 @@ static void radeonSpanRenderStart(GLcontext * ctx) ctx->Driver.MapTexture(ctx, ctx->Texture.Unit[i]._Current); } - radeon_map_unmap_buffers(ctx, 1); + radeon_map_unmap_framebuffer(ctx, ctx->DrawBuffer, GL_TRUE); + if (ctx->ReadBuffer != ctx->DrawBuffer) + radeon_map_unmap_framebuffer(ctx, ctx->ReadBuffer, GL_TRUE); } static void radeonSpanRenderFinish(GLcontext * ctx) { radeonContextPtr rmesa = RADEON_CONTEXT(ctx); int i; + _swrast_flush(ctx); - if (!rmesa->radeonScreen->driScreen->dri2.enabled) { - UNLOCK_HARDWARE(rmesa); - } + for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) { if (ctx->Texture.Unit[i]._ReallyEnabled) ctx->Driver.UnmapTexture(ctx, ctx->Texture.Unit[i]._Current); } - radeon_map_unmap_buffers(ctx, 0); + radeon_map_unmap_framebuffer(ctx, ctx->DrawBuffer, GL_FALSE); + if (ctx->ReadBuffer != ctx->DrawBuffer) + radeon_map_unmap_framebuffer(ctx, ctx->ReadBuffer, GL_FALSE); + + if (!rmesa->radeonScreen->driScreen->dri2.enabled) { + UNLOCK_HARDWARE(rmesa); + } } void radeonInitSpanFuncs(GLcontext * ctx) diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c index 28690325d1..03178116c1 100644 --- a/src/mesa/drivers/dri/radeon/radeon_texture.c +++ b/src/mesa/drivers/dri/radeon/radeon_texture.c @@ -472,6 +472,19 @@ gl_format radeonChooseTextureFormat(GLcontext * ctx, case GL_RGBA32F_ARB: return MESA_FORMAT_RGBA_FLOAT32; +#ifdef RADEON_R300 + case GL_DEPTH_COMPONENT: + case GL_DEPTH_COMPONENT16: + return MESA_FORMAT_Z16; + case GL_DEPTH_COMPONENT24: + case GL_DEPTH_COMPONENT32: + case GL_DEPTH_STENCIL_EXT: + case GL_DEPTH24_STENCIL8_EXT: + if (rmesa->radeonScreen->chip_family >= CHIP_FAMILY_RV515) + return MESA_FORMAT_S8_Z24; + else + return MESA_FORMAT_Z16; +#else case GL_DEPTH_COMPONENT: case GL_DEPTH_COMPONENT16: case GL_DEPTH_COMPONENT24: @@ -479,6 +492,7 @@ gl_format radeonChooseTextureFormat(GLcontext * ctx, case GL_DEPTH_STENCIL_EXT: case GL_DEPTH24_STENCIL8_EXT: return MESA_FORMAT_S8_Z24; +#endif /* EXT_texture_sRGB */ case GL_SRGB: |