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Diffstat (limited to 'src/mesa/drivers/dri/radeon')
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_blit.c14
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c2
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_pixel_read.c2
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_state.c8
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_tex_copy.c13
5 files changed, 34 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_blit.c b/src/mesa/drivers/dri/radeon/radeon_blit.c
index e1e1f21550..143822361e 100644
--- a/src/mesa/drivers/dri/radeon/radeon_blit.c
+++ b/src/mesa/drivers/dri/radeon/radeon_blit.c
@@ -48,6 +48,8 @@ unsigned r100_check_blit(gl_format mesa_format)
case MESA_FORMAT_ARGB4444:
case MESA_FORMAT_ARGB1555:
case MESA_FORMAT_A8:
+ case MESA_FORMAT_L8:
+ case MESA_FORMAT_I8:
break;
default:
return 0;
@@ -103,6 +105,9 @@ static void inline emit_tx_setup(struct r100_context *r100,
case MESA_FORMAT_ARGB8888:
txformat |= RADEON_TXFORMAT_ARGB8888 | RADEON_TXFORMAT_ALPHA_IN_MAP;
break;
+ case MESA_FORMAT_RGBA8888:
+ txformat |= RADEON_TXFORMAT_RGBA8888 | RADEON_TXFORMAT_ALPHA_IN_MAP;
+ break;
case MESA_FORMAT_XRGB8888:
txformat |= RADEON_TXFORMAT_ARGB8888;
break;
@@ -116,8 +121,15 @@ static void inline emit_tx_setup(struct r100_context *r100,
txformat |= RADEON_TXFORMAT_ARGB1555 | RADEON_TXFORMAT_ALPHA_IN_MAP;
break;
case MESA_FORMAT_A8:
+ case MESA_FORMAT_I8:
txformat |= RADEON_TXFORMAT_I8 | RADEON_TXFORMAT_ALPHA_IN_MAP;
break;
+ case MESA_FORMAT_L8:
+ txformat |= RADEON_TXFORMAT_I8;
+ break;
+ case MESA_FORMAT_AL88:
+ txformat |= RADEON_TXFORMAT_AI88 | RADEON_TXFORMAT_ALPHA_IN_MAP;
+ break;
default:
break;
}
@@ -177,6 +189,8 @@ static inline void emit_cb_setup(struct r100_context *r100,
dst_format = RADEON_COLOR_FORMAT_ARGB1555;
break;
case MESA_FORMAT_A8:
+ case MESA_FORMAT_L8:
+ case MESA_FORMAT_I8:
dst_format = RADEON_COLOR_FORMAT_RGB8;
break;
default:
diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
index 78c5f5dd57..7f5fb99fa4 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
@@ -553,6 +553,8 @@ static radeon_mipmap_tree * get_biggest_matching_miptree(radeonTexObj *texObj,
}
if (mtCount == 0) {
+ free(mtSizes);
+ free(mts);
return NULL;
}
diff --git a/src/mesa/drivers/dri/radeon/radeon_pixel_read.c b/src/mesa/drivers/dri/radeon/radeon_pixel_read.c
index 27841938e6..b180c1d9a5 100644
--- a/src/mesa/drivers/dri/radeon/radeon_pixel_read.c
+++ b/src/mesa/drivers/dri/radeon/radeon_pixel_read.c
@@ -96,7 +96,7 @@ do_blit_readpixels(GLcontext * ctx,
return GL_FALSE;
}
- if (ctx->_ImageTransferState) {
+ if (ctx->_ImageTransferState || ctx->Color._LogicOpEnabled) {
return GL_FALSE;
}
diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c
index 0ce97e8697..0afbc19c12 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state.c
@@ -45,6 +45,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "tnl/tnl.h"
#include "tnl/t_pipeline.h"
#include "swrast_setup/swrast_setup.h"
+#include "drivers/common/meta.h"
#include "radeon_context.h"
#include "radeon_mipmap_tree.h"
@@ -1900,7 +1901,7 @@ void radeonUploadTexMatrix( r100ContextPtr rmesa,
So: if we need the q coord in the end (solely determined by the texture
target, i.e. 2d / 1d / texrect targets) we swap the third and 4th row.
Additionally, if we don't have texgen but 4 tex coords submitted, we swap
- column 3 and 4 (for the 2d / 1d / texrect targets) since the the q coord
+ column 3 and 4 (for the 2d / 1d / texrect targets) since the q coord
will get submitted in the "wrong", i.e. 3rd, slot.
If an app submits 3 coords for 2d targets, we assume it is saving on vertex
size and using the texture matrix to swap the r and q coords around (ut2k3
@@ -2248,6 +2249,11 @@ void radeonInitStateFuncs( GLcontext *ctx , GLboolean dri2 )
ctx->Driver.DrawBuffer = radeonDrawBuffer;
ctx->Driver.ReadBuffer = radeonReadBuffer;
+ if (dri2) {
+ ctx->Driver.CopyPixels = _mesa_meta_CopyPixels;
+ ctx->Driver.DrawPixels = _mesa_meta_DrawPixels;
+ ctx->Driver.ReadPixels = radeonReadPixels;
+ }
ctx->Driver.AlphaFunc = radeonAlphaFunc;
ctx->Driver.BlendEquationSeparate = radeonBlendEquationSeparate;
diff --git a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
index a4bb03d5d3..e57d77e7ef 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
@@ -52,15 +52,18 @@ do_copy_texsubimage(GLcontext *ctx,
gl_format dst_mesaformat;
unsigned src_width;
unsigned dst_width;
+ unsigned flip_y;
if (!radeon->vtbl.blit) {
return GL_FALSE;
}
if (_mesa_get_format_bits(timg->base.TexFormat, GL_DEPTH_BITS) > 0) {
- rrb = radeon_get_depthbuffer(radeon);
+ rrb = radeon_renderbuffer(ctx->ReadBuffer->_DepthBuffer);
+ flip_y = ctx->ReadBuffer->Attachment[BUFFER_DEPTH].Type == GL_NONE;
} else {
- rrb = radeon_get_colorbuffer(radeon);
+ rrb = radeon_renderbuffer(ctx->ReadBuffer->_ColorReadBuffer);
+ flip_y = ctx->ReadBuffer->Attachment[BUFFER_COLOR0].Type == GL_NONE;
}
if (!timg->mt) {
@@ -93,6 +96,10 @@ do_copy_texsubimage(GLcontext *ctx,
src_bpp = _mesa_get_format_bytes(src_mesaformat);
dst_bpp = _mesa_get_format_bytes(dst_mesaformat);
if (!radeon->vtbl.check_blit(dst_mesaformat)) {
+ /* depth formats tend to be special */
+ if (_mesa_get_format_bits(dst_mesaformat, GL_DEPTH_BITS) > 0)
+ return GL_FALSE;
+
if (src_bpp != dst_bpp)
return GL_FALSE;
@@ -120,7 +127,7 @@ do_copy_texsubimage(GLcontext *ctx,
timg->mt->bo, dst_offset, dst_mesaformat,
timg->mt->levels[level].rowstride / dst_bpp,
dst_width, timg->base.Height,
- dstx, dsty, width, height, 1);
+ dstx, dsty, width, height, flip_y);
}
void
generated by cgit v1.2.3 (git 2.39.1) at 2024-10-05 19:16:59 +0000