diff options
Diffstat (limited to 'src/mesa/drivers/dri/unichrome/server')
| -rw-r--r-- | src/mesa/drivers/dri/unichrome/server/via.h | 11 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/unichrome/server/via_dri.c | 876 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/unichrome/server/via_driver.h | 574 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/unichrome/server/via_priv.h | 70 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/unichrome/server/via_regs.h | 212 |
5 files changed, 1743 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/unichrome/server/via.h b/src/mesa/drivers/dri/unichrome/server/via.h new file mode 100644 index 0000000000..2cfe6631ef --- /dev/null +++ b/src/mesa/drivers/dri/unichrome/server/via.h @@ -0,0 +1,11 @@ +#ifndef __VIA_H__ +#define __VIA_H__ + +typedef struct VIAInfo +{ + size_t registerSize; + void * registerHandle; + void * data; +} * VIAInfoPtr; + +#endif /* __VIA_H__ */ diff --git a/src/mesa/drivers/dri/unichrome/server/via_dri.c b/src/mesa/drivers/dri/unichrome/server/via_dri.c new file mode 100644 index 0000000000..db661b4056 --- /dev/null +++ b/src/mesa/drivers/dri/unichrome/server/via_dri.c @@ -0,0 +1,876 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/via/via_dri.c,v 1.4 2003/09/24 02:43:30 dawes Exp $ */ +/* + * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +#if 0 +#include "xf86.h" +#include "xf86_OSproc.h" +#include "xf86_ansic.h" +#include "xf86Priv.h" + +#include "xf86PciInfo.h" +#include "xf86Pci.h" + +#define _XF86DRI_SERVER_ +#include "GL/glxtokens.h" + +#else + +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <errno.h> +#include <unistd.h> + +#include "driver.h" +#include "drm.h" +#endif + +#include "dri_util.h" +#include "sarea.h" + +#include "via_context.h" +#include "via_dri.h" +#include "via_driver.h" +#include "via_common.h" +#include "xf86drm.h" + +static void VIAEnableMMIO(DRIDriverContext * ctx); +static void VIADisableMMIO(DRIDriverContext * ctx); +static void VIADisableExtendedFIFO(DRIDriverContext *ctx); +static void VIAEnableExtendedFIFO(DRIDriverContext *ctx); +static void VIAInitialize2DEngine(DRIDriverContext *ctx); +static void VIAInitialize3DEngine(DRIDriverContext *ctx); + +static int VIADRIScreenInit(DRIDriverContext * ctx); +static void VIADRICloseScreen(DRIDriverContext * ctx); +static int VIADRIFinishScreenInit(DRIDriverContext * ctx); + +/* TODO XXX _SOLO temp macros */ +typedef unsigned char CARD8; +typedef unsigned short CARD16; +#define xf86DrvMsg(a, b, ...) fprintf(stderr, __VA_ARGS__) +#define MMIO_IN8(base, addr) ((*(((volatile CARD8*)base)+(addr)))+0) +#define MMIO_OUT8(base, addr, val) ((*(((volatile CARD8*)base)+(addr)))=((CARD8)val)) +#define MMIO_OUT16(base, addr, val) ((*(volatile CARD16*)(((CARD8*)base)+(addr)))=((CARD16)val)) +#define VGA_MISC_OUT_R 0x3cc +#define VGA_MISC_OUT_W 0x3c2 + +#define VIDEO 0 +#define AGP 1 +#define AGP_PAGE_SIZE 4096 +#define AGP_PAGES 8192 +#define AGP_SIZE (AGP_PAGE_SIZE * AGP_PAGES) +#define AGP_CMDBUF_PAGES 256 +#define AGP_CMDBUF_SIZE (AGP_PAGE_SIZE * AGP_CMDBUF_PAGES) + +static char VIAKernelDriverName[] = "via"; +static char VIAClientDriverName[] = "via"; + +static int VIADRIAgpInit(const DRIDriverContext *ctx, VIAPtr pVia); +static int VIADRIPciInit(DRIDriverContext * ctx, VIAPtr pVia); +static int VIADRIFBInit(DRIDriverContext * ctx, VIAPtr pVia); +static int VIADRIKernelInit(DRIDriverContext * ctx, VIAPtr pVia); +static int VIADRIMapInit(DRIDriverContext * ctx, VIAPtr pVia); + +static int VIADRIAgpInit(const DRIDriverContext *ctx, VIAPtr pVia) +{ + unsigned long agp_phys; + unsigned int agpaddr; + VIADRIPtr pVIADRI; + pVIADRI = pVia->devPrivate; + pVia->agpSize = 0; + + if (drmAgpAcquire(pVia->drmFD) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, "[drm] drmAgpAcquire failed %d\n", errno); + return FALSE; + } + + if (drmAgpEnable(pVia->drmFD, drmAgpGetMode(pVia->drmFD)&~0x0) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, "[drm] drmAgpEnable failed\n"); + return FALSE; + } + + xf86DrvMsg(pScreen->myNum, X_INFO, "[drm] drmAgpEnabled succeeded\n"); + + if (drmAgpAlloc(pVia->drmFD, AGP_SIZE, 0, &agp_phys, &pVia->agpHandle) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[drm] drmAgpAlloc failed\n"); + drmAgpRelease(pVia->drmFD); + return FALSE; + } + + if (drmAgpBind(pVia->drmFD, pVia->agpHandle, 0) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[drm] drmAgpBind failed\n"); + drmAgpFree(pVia->drmFD, pVia->agpHandle); + drmAgpRelease(pVia->drmFD); + + return FALSE; + } + + pVia->agpSize = AGP_SIZE; + pVia->agpAddr = drmAgpBase(pVia->drmFD); + xf86DrvMsg(pScreen->myNum, X_INFO, + "[drm] agpAddr = 0x%08lx\n",pVia->agpAddr); + + pVIADRI->agp.size = pVia->agpSize; + if (drmAddMap(pVia->drmFD, (drmHandle)0, + pVIADRI->agp.size, DRM_AGP, 0, + &pVIADRI->agp.handle) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[drm] Failed to map public agp area\n"); + pVIADRI->agp.size = 0; + return FALSE; + } + /* Map AGP from kernel to Xserver - Not really needed */ + drmMap(pVia->drmFD, pVIADRI->agp.handle,pVIADRI->agp.size, + (drmAddressPtr)&agpaddr); + +#if 0 + xf86DrvMsg(pScreen->myNum, X_INFO, + "[drm] agpBase = %p\n", pVia->agpBase); + xf86DrvMsg(pScreen->myNum, X_INFO, + "[drm] agpAddr = 0x%08lx\n", pVia->agpAddr); +#endif + xf86DrvMsg(pScreen->myNum, X_INFO, + "[drm] agpSize = 0x%08x\n", pVia->agpSize); + xf86DrvMsg(pScreen->myNum, X_INFO, + "[drm] agp physical addr = 0x%08lx\n", agp_phys); + + { + drm_via_agp_t agp; + agp.offset = 0; + agp.size = AGP_SIZE; + if (drmCommandWrite(pVia->drmFD, DRM_VIA_AGP_INIT, &agp, + sizeof(drm_via_agp_t)) < 0) + return FALSE; + } + + return TRUE; +} + +static int VIADRIFBInit(DRIDriverContext * ctx, VIAPtr pVia) +{ + int FBSize = pVia->FBFreeEnd-pVia->FBFreeStart; + int FBOffset = pVia->FBFreeStart; + VIADRIPtr pVIADRI = pVia->devPrivate; + pVIADRI->fbOffset = FBOffset; + pVIADRI->fbSize = pVia->videoRambytes; + + { + drm_via_fb_t fb; + fb.offset = FBOffset; + fb.size = FBSize; + + if (drmCommandWrite(pVia->drmFD, DRM_VIA_FB_INIT, &fb, + sizeof(drm_via_fb_t)) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[drm] failed to init frame buffer area\n"); + return FALSE; + } else { + xf86DrvMsg(pScreen->myNum, X_INFO, + "[drm] FBFreeStart= 0x%08x FBFreeEnd= 0x%08x " + "FBSize= 0x%08x\n", + pVia->FBFreeStart, pVia->FBFreeEnd, FBSize); + return TRUE; + } + } +} + +static int VIADRIPciInit(DRIDriverContext * ctx, VIAPtr pVia) +{ + return TRUE; +} + +static int VIADRIScreenInit(DRIDriverContext * ctx) +{ + VIAPtr pVia = VIAPTR(ctx); + VIADRIPtr pVIADRI; + int err; + +#if 0 + ctx->shared.SAREASize = ((sizeof(XF86DRISAREARec) + 0xfff) & 0x1000); +#else + if (sizeof(XF86DRISAREARec)+sizeof(VIASAREAPriv) > SAREA_MAX) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Data does not fit in SAREA\n"); + return FALSE; + } + ctx->shared.SAREASize = SAREA_MAX; +#endif + + ctx->drmFD = drmOpen(VIAKernelDriverName, NULL); + if (ctx->drmFD < 0) { + fprintf(stderr, "[drm] drmOpen failed\n"); + return 0; + } + pVia->drmFD = ctx->drmFD; + + err = drmSetBusid(ctx->drmFD, ctx->pciBusID); + if (err < 0) { + fprintf(stderr, "[drm] drmSetBusid failed (%d, %s), %s\n", + ctx->drmFD, ctx->pciBusID, strerror(-err)); + return 0; + } + + err = drmAddMap(ctx->drmFD, 0, ctx->shared.SAREASize, DRM_SHM, + DRM_CONTAINS_LOCK, &ctx->shared.hSAREA); + if (err < 0) { + fprintf(stderr, "[drm] drmAddMap failed\n"); + return 0; + } + fprintf(stderr, "[drm] added %d byte SAREA at 0x%08lx\n", + ctx->shared.SAREASize, ctx->shared.hSAREA); + + if (drmMap(ctx->drmFD, + ctx->shared.hSAREA, + ctx->shared.SAREASize, + (drmAddressPtr)(&ctx->pSAREA)) < 0) + { + fprintf(stderr, "[drm] drmMap failed\n"); + return 0; + } + memset(ctx->pSAREA, 0, ctx->shared.SAREASize); + fprintf(stderr, "[drm] mapped SAREA 0x%08lx to %p, size %d\n", + ctx->shared.hSAREA, ctx->pSAREA, ctx->shared.SAREASize); + + /* Need to AddMap the framebuffer and mmio regions here: + */ + if (drmAddMap(ctx->drmFD, + (drmHandle)ctx->FBStart, + ctx->FBSize, + DRM_FRAME_BUFFER, +#ifndef _EMBEDDED + 0, +#else + DRM_READ_ONLY, +#endif + &ctx->shared.hFrameBuffer) < 0) + { + fprintf(stderr, "[drm] drmAddMap framebuffer failed\n"); + return 0; + } + + fprintf(stderr, "[drm] framebuffer handle = 0x%08lx\n", + ctx->shared.hFrameBuffer); + + pVIADRI = (VIADRIPtr) calloc(1, sizeof(VIADRIRec)); + if (!pVIADRI) { + drmClose(ctx->drmFD); + return FALSE; + } + pVia->devPrivate = pVIADRI; + ctx->driverClientMsg = pVIADRI; + ctx->driverClientMsgSize = sizeof(*pVIADRI); + + pVia->IsPCI = !VIADRIAgpInit(ctx, pVia); + + if (pVia->IsPCI) { + VIADRIPciInit(ctx, pVia); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] use pci.\n" ); + } + else + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] use agp.\n" ); + + if (!(VIADRIFBInit(ctx, pVia))) { + VIADRICloseScreen(ctx); + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[dri] frame buffer initialize fial .\n" ); + return FALSE; + } + + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] frame buffer initialized.\n" ); + + /* DRIScreenInit doesn't add all the common mappings. Add additional mappings here. */ + if (!VIADRIMapInit(ctx, pVia)) { + VIADRICloseScreen(ctx); + return FALSE; + } + pVIADRI->regs.size = VIA_MMIO_REGSIZE; + pVIADRI->regs.map = 0; + pVIADRI->regs.handle = pVia->registerHandle; + xf86DrvMsg(ctx->myNum, X_INFO, "[drm] mmio Registers = 0x%08lx\n", + pVIADRI->regs.handle); + + if (drmMap(pVia->drmFD, + pVIADRI->regs.handle, + pVIADRI->regs.size, + (drmAddress *)&pVia->MapBase) != 0) + { + VIADRICloseScreen(ctx); + return FALSE; + } + + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] mmio mapped.\n" ); + + return VIADRIFinishScreenInit(ctx); +} + +static void +VIADRICloseScreen(DRIDriverContext * ctx) +{ + VIAPtr pVia = VIAPTR(ctx); + VIADRIPtr pVIADRI=(VIADRIPtr)pVia->devPrivate; + + if (pVia->MapBase) { + xf86DrvMsg(pScreen->myNum, X_INFO, "[drm] Unmapping MMIO registers\n"); + drmUnmap(pVia->MapBase, pVIADRI->regs.size); + } + + if (pVia->agpSize) { + xf86DrvMsg(pScreen->myNum, X_INFO, "[drm] Freeing agp memory\n"); + drmAgpFree(pVia->drmFD, pVia->agpHandle); + xf86DrvMsg(pScreen->myNum, X_INFO, "[drm] Releasing agp module\n"); + drmAgpRelease(pVia->drmFD); + } +} + +static int +VIADRIFinishScreenInit(DRIDriverContext * ctx) +{ + VIAPtr pVia = VIAPTR(ctx); + VIADRIPtr pVIADRI; + int err; + + err = drmCreateContext(ctx->drmFD, &ctx->serverContext); + if (err != 0) { + fprintf(stderr, "%s: drmCreateContext failed %d\n", __FUNCTION__, err); + return FALSE; + } + + DRM_LOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext, 0); + + + if (!VIADRIKernelInit(ctx, pVia)) { + VIADRICloseScreen(ctx); + return FALSE; + } + xf86DrvMsg(pScreen->myNum, X_INFO, "[dri] kernel data initialized.\n"); + + /* set SAREA value */ + { + VIASAREAPriv *saPriv; + + saPriv=(VIASAREAPriv*)(((char*)ctx->pSAREA) + + sizeof(XF86DRISAREARec)); + assert(saPriv); + memset(saPriv, 0, sizeof(*saPriv)); + saPriv->CtxOwner = -1; + } + pVIADRI=(VIADRIPtr)pVia->devPrivate; + pVIADRI->deviceID=pVia->Chipset; + pVIADRI->width=ctx->shared.virtualWidth; + pVIADRI->height=ctx->shared.virtualHeight; + pVIADRI->mem=ctx->shared.fbSize; + pVIADRI->bytesPerPixel= (ctx->bpp+7) / 8; + pVIADRI->sarea_priv_offset = sizeof(XF86DRISAREARec); + /* TODO */ + pVIADRI->scrnX=pVIADRI->width; + pVIADRI->scrnY=pVIADRI->height; + + return TRUE; +} + +/* Initialize the kernel data structures. */ +static int VIADRIKernelInit(DRIDriverContext * ctx, VIAPtr pVia) +{ + drm_via_init_t drmInfo; + memset(&drmInfo, 0, sizeof(drm_via_init_t)); + drmInfo.func = VIA_INIT_MAP; + drmInfo.sarea_priv_offset = sizeof(XF86DRISAREARec); + drmInfo.fb_offset = pVia->FrameBufferBase; + drmInfo.mmio_offset = pVia->registerHandle; + if (pVia->IsPCI) + drmInfo.agpAddr = (CARD32)NULL; + else + drmInfo.agpAddr = (CARD32)pVia->agpAddr; + + if ((drmCommandWrite(pVia->drmFD, DRM_VIA_MAP_INIT,&drmInfo, + sizeof(drm_via_init_t))) < 0) + return FALSE; + + return TRUE; +} +/* Add a map for the MMIO registers */ +static int VIADRIMapInit(DRIDriverContext * ctx, VIAPtr pVia) +{ + int flags = 0; + + if (drmAddMap(pVia->drmFD, pVia->MmioBase, VIA_MMIO_REGSIZE, + DRM_REGISTERS, flags, &pVia->registerHandle) < 0) { + return FALSE; + } + + xf86DrvMsg(pScreen->myNum, X_INFO, + "[drm] register handle = 0x%08lx\n", pVia->registerHandle); + + return TRUE; +} + +const __GLcontextModes __glModes[] = +{ + /* 32 bit, RGBA Depth=24 Stencil=8 */ + {.rgbMode = GL_TRUE, .colorIndexMode = GL_FALSE, .doubleBufferMode = GL_TRUE, .stereoMode = GL_FALSE, + .haveAccumBuffer = GL_FALSE, .haveDepthBuffer = GL_TRUE, .haveStencilBuffer = GL_TRUE, + .redBits = 8, .greenBits = 8, .blueBits = 8, .alphaBits = 8, + .redMask = 0xff0000, .greenMask = 0xff00, .blueMask = 0xff, .alphaMask = 0xff000000, + .rgbBits = 32, .indexBits = 0, + .accumRedBits = 0, .accumGreenBits = 0, .accumBlueBits = 0, .accumAlphaBits = 0, + .depthBits = 16, .stencilBits = 8, + .numAuxBuffers= 0, .level = 0, .pixmapMode = GL_FALSE, }, + + /* 16 bit, RGB Depth=16 */ + {.rgbMode = GL_TRUE, .colorIndexMode = GL_FALSE, .doubleBufferMode = GL_TRUE, .stereoMode = GL_FALSE, + .haveAccumBuffer = GL_FALSE, .haveDepthBuffer = GL_TRUE, .haveStencilBuffer = GL_FALSE, + .redBits = 5, .greenBits = 6, .blueBits = 5, .alphaBits = 0, + .redMask = 0xf800, .greenMask = 0x07e0, .blueMask = 0x001f, .alphaMask = 0x0, + .rgbBits = 16, .indexBits = 0, + .accumRedBits = 0, .accumGreenBits = 0, .accumBlueBits = 0, .accumAlphaBits = 0, + .depthBits = 16, .stencilBits = 0, + .numAuxBuffers= 0, .level = 0, .pixmapMode = GL_FALSE, }, +}; + +static int viaInitContextModes(const DRIDriverContext *ctx, + int *numModes, const __GLcontextModes **modes) +{ + *numModes = sizeof(__glModes)/sizeof(__GLcontextModes *); + *modes = &__glModes[0]; + return 1; +} + +static int viaValidateMode(const DRIDriverContext *ctx) +{ + VIAPtr pVia = VIAPTR(ctx); + + return 1; +} + +static int viaPostValidateMode(const DRIDriverContext *ctx) +{ + VIAPtr pVia = VIAPTR(ctx); + + return 1; +} + +static void VIAEnableMMIO(DRIDriverContext * ctx) +{ + /*vgaHWPtr hwp = VGAHWPTR(ctx);*/ + VIAPtr pVia = VIAPTR(ctx); + unsigned char val; + +#if 0 + if (xf86IsPrimaryPci(pVia->PciInfo)) { + /* If we are primary card, we still use std vga port. If we use + * MMIO, system will hang in vgaHWSave when our card used in + * PLE and KLE (integrated Trident MVP4) + */ + vgaHWSetStdFuncs(hwp); + } + else { + vgaHWSetMmioFuncs(hwp, pVia->MapBase, 0x8000); + } +#endif + + val = VGAIN8(0x3c3); + VGAOUT8(0x3c3, val | 0x01); + val = VGAIN8(VGA_MISC_OUT_R); + VGAOUT8(VGA_MISC_OUT_W, val | 0x01); + + /* Unlock Extended IO Space */ + VGAOUT8(0x3c4, 0x10); + VGAOUT8(0x3c5, 0x01); + + /* Enable MMIO */ + if(!pVia->IsSecondary) { + VGAOUT8(0x3c4, 0x1a); + val = VGAIN8(0x3c5); +#ifdef DEBUG + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "primary val = %x\n", val); +#endif + VGAOUT8(0x3c5, val | 0x68); + } + else { + VGAOUT8(0x3c4, 0x1a); + val = VGAIN8(0x3c5); +#ifdef DEBUG + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "secondary val = %x\n", val); +#endif + VGAOUT8(0x3c5, val | 0x38); + } + + return; +} + +static void VIADisableMMIO(DRIDriverContext * ctx) +{ + VIAPtr pVia = VIAPTR(ctx); + unsigned char val; + + VGAOUT8(0x3c4, 0x1a); + val = VGAIN8(0x3c5); + VGAOUT8(0x3c5, val & 0x97); + + return; +} + +static void VIADisableExtendedFIFO(DRIDriverContext *ctx) +{ + VIAPtr pVia = VIAPTR(ctx); + CARD32 dwTemp; + + dwTemp = (CARD32)VIAGETREG(0x298); + dwTemp |= 0x20000000; + VIASETREG(0x298, dwTemp); + + dwTemp = (CARD32)VIAGETREG(0x230); + dwTemp &= ~0x00200000; + VIASETREG(0x230, dwTemp); + + dwTemp = (CARD32)VIAGETREG(0x298); + dwTemp &= ~0x20000000; + VIASETREG(0x298, dwTemp); +} + +static void VIAEnableExtendedFIFO(DRIDriverContext *ctx) +{ + VIAPtr pVia = VIAPTR(ctx); + CARD32 dwTemp; + CARD8 bTemp; + + dwTemp = (CARD32)VIAGETREG(0x298); + dwTemp |= 0x20000000; + VIASETREG(0x298, dwTemp); + + dwTemp = (CARD32)VIAGETREG(0x230); + dwTemp |= 0x00200000; + VIASETREG(0x230, dwTemp); + + dwTemp = (CARD32)VIAGETREG(0x298); + dwTemp &= ~0x20000000; + VIASETREG(0x298, dwTemp); + + VGAOUT8(0x3C4, 0x17); + bTemp = VGAIN8(0x3C5); + bTemp &= ~0x7F; + bTemp |= 0x2F; + VGAOUT8(0x3C5, bTemp); + + VGAOUT8(0x3C4, 0x16); + bTemp = VGAIN8(0x3C5); + bTemp &= ~0x3F; + bTemp |= 0x17; + VGAOUT8(0x3C5, bTemp); + + VGAOUT8(0x3C4, 0x18); + bTemp = VGAIN8(0x3C5); + bTemp &= ~0x3F; + bTemp |= 0x17; + bTemp |= 0x40; /* force the preq always higher than treq */ + VGAOUT8(0x3C5, bTemp); +} + +static void VIAInitialize2DEngine(DRIDriverContext *ctx) +{ + VIAPtr pVia = VIAPTR(ctx); + CARD32 dwVQStartAddr, dwVQEndAddr; + CARD32 dwVQLen, dwVQStartL, dwVQEndL, dwVQStartEndH; + CARD32 dwGEMode; + + /* init 2D engine regs to reset 2D engine */ + VIASETREG(0x04, 0x0); + VIASETREG(0x08, 0x0); + VIASETREG(0x0c, 0x0); + VIASETREG(0x10, 0x0); + VIASETREG(0x14, 0x0); + VIASETREG(0x18, 0x0); + VIASETREG(0x1c, 0x0); + VIASETREG(0x20, 0x0); + VIASETREG(0x24, 0x0); + VIASETREG(0x28, 0x0); + VIASETREG(0x2c, 0x0); + VIASETREG(0x30, 0x0); + VIASETREG(0x34, 0x0); + VIASETREG(0x38, 0x0); + VIASETREG(0x3c, 0x0); + VIASETREG(0x40, 0x0); + + /* Init AGP and VQ regs */ + VIASETREG(0x43c, 0x00100000); + VIASETREG(0x440, 0x00000000); + VIASETREG(0x440, 0x00333004); + VIASETREG(0x440, 0x60000000); + VIASETREG(0x440, 0x61000000); + VIASETREG(0x440, 0x62000000); + VIASETREG(0x440, 0x63000000); + VIASETREG(0x440, 0x64000000); + VIASETREG(0x440, 0x7D000000); + + VIASETREG(0x43c, 0xfe020000); + VIASETREG(0x440, 0x00000000); + + if (pVia->VQStart != 0) { + /* Enable VQ */ + dwVQStartAddr = pVia->VQStart; + dwVQEndAddr = pVia->VQEnd; + dwVQStartL = 0x50000000 | (dwVQStartAddr & 0xFFFFFF); + dwVQEndL = 0x51000000 | (dwVQEndAddr & 0xFFFFFF); + dwVQStartEndH = 0x52000000 | ((dwVQStartAddr & 0xFF000000) >> 24) | + ((dwVQEndAddr & 0xFF000000) >> 16); + dwVQLen = 0x53000000 | (VIA_VQ_SIZE >> 3); + + VIASETREG(0x43c, 0x00fe0000); + VIASETREG(0x440, 0x080003fe); + VIASETREG(0x440, 0x0a00027c); + VIASETREG(0x440, 0x0b000260); + VIASETREG(0x440, 0x0c000274); + VIASETREG(0x440, 0x0d000264); + VIASETREG(0x440, 0x0e000000); + VIASETREG(0x440, 0x0f000020); + VIASETREG(0x440, 0x1000027e); + VIASETREG(0x440, 0x110002fe); + VIASETREG(0x440, 0x200f0060); + + VIASETREG(0x440, 0x00000006); + VIASETREG(0x440, 0x40008c0f); + VIASETREG(0x440, 0x44000000); + VIASETREG(0x440, 0x45080c04); + VIASETREG(0x440, 0x46800408); + + VIASETREG(0x440, dwVQStartEndH); + VIASETREG(0x440, dwVQStartL); + VIASETREG(0x440, dwVQEndL); + VIASETREG(0x440, dwVQLen); + } + else { + /* Diable VQ */ + VIASETREG(0x43c, 0x00fe0000); + VIASETREG(0x440, 0x00000004); + VIASETREG(0x440, 0x40008c0f); + VIASETREG(0x440, 0x44000000); + VIASETREG(0x440, 0x45080c04); + VIASETREG(0x440, 0x46800408); + } + + dwGEMode = 0; + + switch (ctx->bpp) { + case 16: + dwGEMode |= VIA_GEM_16bpp; + break; + case 32: + dwGEMode |= VIA_GEM_32bpp; + default: + dwGEMode |= VIA_GEM_8bpp; + break; + } + +#if 0 + switch (ctx->shared.virtualWidth) { + case 800: + dwGEMode |= VIA_GEM_800; + break; + case 1024: + dwGEMode |= VIA_GEM_1024; + break; + case 1280: + dwGEMode |= VIA_GEM_1280; + break; + case 1600: + dwGEMode |= VIA_GEM_1600; + break; + case 2048: + dwGEMode |= VIA_GEM_2048; + break; + default: + dwGEMode |= VIA_GEM_640; + break; + } +#endif + + /* Set BPP and Pitch */ + VIASETREG(VIA_REG_GEMODE, dwGEMode); + + /* Set Src and Dst base address and pitch, pitch is qword */ + VIASETREG(VIA_REG_SRCBASE, 0x0); + VIASETREG(VIA_REG_DSTBASE, 0x0); + VIASETREG(VIA_REG_PITCH, VIA_PITCH_ENABLE | + ((ctx->shared.virtualWidth * ctx->bpp >> 3) >> 3) | + (((ctx->shared.virtualWidth * ctx->bpp >> 3) >> 3) << 16)); +} + +static void VIAInitialize3DEngine(DRIDriverContext *ctx) +{ + VIAPtr pVia = VIAPTR(ctx); + int i; + + if (!pVia->sharedData->b3DRegsInitialized) + { + + VIASETREG(0x43C, 0x00010000); + + for (i = 0; i <= 0x7D; i++) + { + VIASETREG(0x440, (CARD32) i << 24); + } + + VIASETREG(0x43C, 0x00020000); + + for (i = 0; i <= 0x94; i++) + { + VIASETREG(0x440, (CARD32) i << 24); + } + + VIASETREG(0x440, 0x82400000); + + VIASETREG(0x43C, 0x01020000); + + + for (i = 0; i <= 0x94; i++) + { + VIASETREG(0x440, (CARD32) i << 24); + } + + VIASETREG(0x440, 0x82400000); + VIASETREG(0x43C, 0xfe020000); + + for (i = 0; i <= 0x03; i++) + { + VIASETREG(0x440, (CARD32) i << 24); + } + + VIASETREG(0x43C, 0x00030000); + + for (i = 0; i <= 0xff; i++) + { + VIASETREG(0x440, 0); + } + VIASETREG(0x43C, 0x00100000); + VIASETREG(0x440, 0x00333004); + VIASETREG(0x440, 0x10000002); + VIASETREG(0x440, 0x60000000); + VIASETREG(0x440, 0x61000000); + VIASETREG(0x440, 0x62000000); + VIASETREG(0x440, 0x63000000); + VIASETREG(0x440, 0x64000000); + + VIASETREG(0x43C, 0x00fe0000); + + if (pVia->ChipRev >= 3 ) + VIASETREG(0x440,0x40008c0f); + else + VIASETREG(0x440,0x4000800f); + + VIASETREG(0x440,0x44000000); + VIASETREG(0x440,0x45080C04); + VIASETREG(0x440,0x46800408); + VIASETREG(0x440,0x50000000); + VIASETREG(0x440,0x51000000); + VIASETREG(0x440,0x52000000); + VIASETREG(0x440,0x53000000); + + pVia->sharedData->b3DRegsInitialized = 1; + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "3D Engine has been initialized.\n"); + } + + VIASETREG(0x43C,0x00fe0000); + VIASETREG(0x440,0x08000001); + VIASETREG(0x440,0x0A000183); + VIASETREG(0x440,0x0B00019F); + VIASETREG(0x440,0x0C00018B); + VIASETREG(0x440,0x0D00019B); + VIASETREG(0x440,0x0E000000); + VIASETREG(0x440,0x0F000000); + VIASETREG(0x440,0x10000000); + VIASETREG(0x440,0x11000000); + VIASETREG(0x440,0x20000000); +} + +static int viaInitFBDev(DRIDriverContext *ctx) +{ + VIAPtr pVia = calloc(1, sizeof(*pVia)); + + ctx->driverPrivate = (void *)pVia; + + pVia->Chipset = ctx->chipset; + + pVia->videoRambytes = ctx->shared.fbSize; + pVia->MmioBase = ctx->MMIOStart; + pVia->FrameBufferBase = ctx->FBStart & 0xfc000000; + + pVia->FBFreeStart = ctx->shared.virtualWidth * ctx->cpp * + ctx->shared.virtualHeight; + pVia->FBFreeEnd = pVia->videoRambytes; + + pVia->sharedData = (ViaSharedPtr) calloc(1, sizeof(ViaSharedRec)); + + if (!VIADRIScreenInit(ctx)) + return 0; + + VIAEnableMMIO(ctx); + + /* 3D rendering has noise if not enabled. */ + VIAEnableExtendedFIFO(ctx); + + VIAInitialize2DEngine(ctx); + VIAInitialize3DEngine(ctx); + + /* Must disable MMIO or 3D won't work. */ + VIADisableMMIO(ctx); + + return 1; +} + +static void viaHaltFBDev(DRIDriverContext *ctx) +{ + drmUnmap( ctx->pSAREA, ctx->shared.SAREASize ); + drmClose(ctx->drmFD); + + if (ctx->driverPrivate) { + free(ctx->driverPrivate); + ctx->driverPrivate = 0; + } +} + +static int viaEngineShutdown(const DRIDriverContext *ctx) +{ + return 1; +} + +static int viaEngineRestore(const DRIDriverContext *ctx) +{ + return 1; +} + +const struct DRIDriverRec __driDriver = +{ + viaInitContextModes, + viaValidateMode, + viaPostValidateMode, + viaInitFBDev, + viaHaltFBDev, + viaEngineShutdown, + viaEngineRestore, + 0, +}; + diff --git a/src/mesa/drivers/dri/unichrome/server/via_driver.h b/src/mesa/drivers/dri/unichrome/server/via_driver.h new file mode 100644 index 0000000000..f97704c076 --- /dev/null +++ b/src/mesa/drivers/dri/unichrome/server/via_driver.h @@ -0,0 +1,574 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/via/via_driver.h,v 1.7 2003/11/06 18:38:11 tsi Exp $ */ +/* + * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _VIA_DRIVER_H_ +#define _VIA_DRIVER_H_ 1 + +#if 0 /* DEBUG is use in VIA DRI code as a flag */ +/* #define DEBUG_PRINT */ +#ifdef DEBUG_PRINT +#define DEBUG(x) x +#else +#define DEBUG(x) +#endif +#endif + +#if 0 +#include "vgaHW.h" +#include "xf86.h" +#include "xf86Resources.h" +#include "xf86_ansic.h" +#include "xf86Pci.h" +#include "xf86PciInfo.h" +#include "xf86_OSproc.h" +#include "compiler.h" +#include "xf86Cursor.h" +#include "mipointer.h" +#include "micmap.h" + +#define USE_FB +#ifdef USE_FB +#include "fb.h" +#else +#include "cfb.h" +#include "cfb16.h" +#include "cfb32.h" +#endif + +#include "xf86cmap.h" +#include "vbe.h" +#include "xaa.h" + +#include "via_regs.h" +#include "via_bios.h" +#include "via_gpioi2c.h" +#include "via_priv.h" +#include "ginfo.h" + +#ifdef XF86DRI +#define _XF86DRI_SERVER_ +#include "sarea.h" +#include "dri.h" +#include "GL/glxint.h" +#include "via_dri.h" +#endif +#else +#include "via_priv.h" +#include "via_regs.h" + +#include "sarea.h" +#include "dri.h" +#include "via_dri.h" +#endif + +#define DRIVER_NAME "via" +#define DRIVER_VERSION "4.1.0" +#define VERSION_MAJOR 4 +#define VERSION_MINOR 1 +#define PATCHLEVEL 30 +#define VIA_VERSION ((VERSION_MAJOR<<24) | (VERSION_MINOR<<16) | PATCHLEVEL) + +#define VGAIN8(addr) MMIO_IN8(pVia->MapBase+0x8000, addr) +#define VGAIN16(addr) MMIO_IN16(pVia->MapBase+0x8000, addr) +#define VGAIN(addr) MMIO_IN32(pVia->MapBase+0x8000, addr) + +#define VGAOUT8(addr, val) MMIO_OUT8(pVia->MapBase+0x8000, addr, val) +#define VGAOUT16(addr, val) MMIO_OUT16(pVia->MapBase+0x8000, addr, val) +#define VGAOUT(addr, val) MMIO_OUT32(pVia->MapBase+0x8000, addr, val) + +#define INREG(addr) MMIO_IN32(pVia->MapBase, addr) +#define OUTREG(addr, val) MMIO_OUT32(pVia->MapBase, addr, val) +#define INREG16(addr) MMIO_IN16(pVia->MapBase, addr) +#define OUTREG16(addr, val) MMIO_OUT16(pVia->MapBase, addr, val) + +#define VIA_PIXMAP_CACHE_SIZE (256 * 1024) +#define VIA_CURSOR_SIZE (4 * 1024) +#define VIA_VQ_SIZE (256 * 1024) + +typedef struct { + unsigned int mode, refresh, resMode; + int countWidthByQWord; + int offsetWidthByQWord; + unsigned char SR08, SR0A, SR0F; + + /* extended Sequencer registers */ + unsigned char SR10, SR11, SR12, SR13,SR14,SR15,SR16; + unsigned char SR17, SR18, SR19, SR1A,SR1B,SR1C,SR1D,SR1E; + unsigned char SR1F, SR20, SR21, SR22,SR23,SR24,SR25,SR26; + unsigned char SR27, SR28, SR29, SR2A,SR2B,SR2C,SR2D,SR2E; + unsigned char SR2F, SR30, SR31, SR32,SR33,SR34,SR40,SR41; + unsigned char SR42, SR43, SR44, SR45,SR46,SR47; + + unsigned char Clock; + + /* extended CRTC registers */ + unsigned char CR13, CR30, CR31, CR32, CR33, CR34, CR35, CR36; + unsigned char CR37, CR38, CR39, CR3A, CR40, CR41, CR42, CR43; + unsigned char CR44, CR45, CR46, CR47, CR48, CR49, CR4A; + unsigned char CRTCRegs[68]; + unsigned char TVRegs[0xFF]; +/* unsigned char LCDRegs[0x40];*/ +} VIARegRec, *VIARegPtr; + +/*Definition for CapturePortID*/ +#define PORT0 0 /* Capture Port 0*/ +#define PORT1 1 /* Capture Port 1*/ + +typedef struct __viaVideoControl { + CARD32 PORTID; + CARD32 dwCompose; + CARD32 dwHighQVDO; + CARD32 VideoStatus; + CARD32 dwAction; +#define ACTION_SET_PORTID 0 +#define ACTION_SET_COMPOSE 1 +#define ACTION_SET_HQV 2 +#define ACTION_SET_BOB 4 +#define ACTION_SET_VIDEOSTATUS 8 + Bool Cap0OnScreen1; /* True: Capture0 On Screen1 ; False: Capture0 On Screen0 */ + Bool Cap1OnScreen1; /* True: Capture1 On Screen1 ; False: Capture1 On Screen0 */ + Bool MPEGOnScreen1; /* True: MPEG On Screen1 ; False: MPEG On Screen0 */ +} VIAVideoControlRec, VIAVideoControlPtr; + +/*For Video HW Difference */ +#define VIA_REVISION_CLEC0 0x10 +#define VIA_REVISION_CLEC1 0x11 +#define VIA_REVISION_CLECX 0x10 + +#define VID_HWDIFF_TRUE 0x00000001 +#define VID_HWDIFF_FALSE 0x00000000 + +/* + * Video HW Difference Structure + */ + +typedef struct __VIAHWRec +{ + unsigned long dwThreeHQVBuffer; /* Use Three HQV Buffers*/ + unsigned long dwV3SrcHeightSetting; /* Set Video Source Width and Height*/ + unsigned long dwSupportExtendFIFO; /* Support Extand FIFO*/ + unsigned long dwHQVFetchByteUnit; /* HQV Fetch Count unit is byte*/ + unsigned long dwHQVInitPatch; /* Initialize HQV Engine 2 times*/ + unsigned long dwSupportV3Gamma; /* Support V3 Gamma */ + unsigned long dwUpdFlip; /* Set HQV3D0[15] to flip video*/ + unsigned long dwHQVDisablePatch; /* Change Video Engine Clock setting for HQV disable bug*/ + unsigned long dwSUBFlip; /* Set HQV3D0[15] to flip video for sub-picture blending*/ + unsigned long dwNeedV3Prefetch; /* V3 pre-fetch function for K8*/ + unsigned long dwNeedV4Prefetch; /* V4 pre-fetch function for K8*/ + unsigned long dwUseSystemMemory; /* Use system memory for DXVA compressed data buffers*/ + unsigned long dwExpandVerPatch; /* Patch video HW bug in expand SIM mode or same display path*/ + unsigned long dwExpandVerHorPatch; /* Patch video HW bug in expand SAMM mode or same display path*/ + unsigned long dwV3ExpireNumTune; /* Change V3 expire number setting for V3 bandwidth issue*/ + unsigned long dwV3FIFOThresholdTune; /* Change V3 FIFO, Threshold and Pre-threshold setting for V3 bandwidth issue*/ + unsigned long dwCheckHQVFIFOEmpty; /* HW Flip path, need to check HQV FIFO status */ + unsigned long dwUseMPEGAGP; /* Use MPEG AGP function*/ + unsigned long dwV3FIFOPatch; /* For CLE V3 FIFO Bug (srcWidth <= 8)*/ + unsigned long dwSupportTwoColorKey; /* Support two color key*/ + unsigned long dwCxColorSpace; /* CLE_Cx ColorSpace*/ +} VIAHWRec; + +/*Wait Function Structure and Flag*/ +typedef struct _WaitHWINFO +{ + unsigned char * pjVideo; /* MMIO Address Info*/ + unsigned long dwVideoFlag; /* Video Flag*/ +}WaitHWINFO, * LPWaitHWINFO; + +#if 0 +/* VIA Tuners */ +typedef struct +{ + int decoderType; /* Decoder I2C Type */ +#define SAA7108H 0 +#define SAA7113H 1 +#define SAA7114H 2 + I2CDevPtr I2C; /* Decoder I2C */ + I2CDevPtr FMI2C; /* FM Tuner I2C */ + + /* Not yet used */ + int autoDetect; /* Autodetect mode */ + int tunerMode; /* Fixed mode */ +} ViaTunerRec, *ViaTunerPtr; +#endif + +/* + * New style overlay structure for the SubPicture overlay + */ + +#if 0 +typedef struct +{ + VIAMem Memory; + int visible:1; /* Idea is for the top bits to become a generic class */ + CARD32 width; + CARD32 height; + CARD32 pitch; + CARD32 base[2]; /* Some channels have 3 so 3 for the generic unit */ + struct + { + CARD8 Y; + CARD8 Cb; + CARD8 Cr; + } palette[16]; +} ViaSubPictureRecord; + +typedef struct +{ + VIAMem Memory; + int visible:1; /* Visible */ + CARD32 width; + CARD32 height; + CARD32 pitch; + CARD32 base[3]; + int Channel; + int HQV; /* Own HQV */ +} ViaTVRecord; + +typedef struct +{ + VIAMem Memory; + CARD32 base[3]; + int Busy; +} ViaHQVRecord; +#endif + +/* + * Variables that need to be shared among different screens. + */ +typedef struct { + Bool b3DRegsInitialized; +} ViaSharedRec, *ViaSharedPtr; + + +typedef struct _VIA { + VIARegRec SavedReg; + VIARegRec ModeReg; + //xf86CursorInfoPtr CursorInfoRec; + Bool ModeStructInit; + int Bpp, Bpl, ScissB; + unsigned PlaneMask; + + unsigned long videoRambytes; + int videoRamKbytes; + int FBFreeStart; + int FBFreeEnd; + int CursorStart; + int VQStart; + int VQEnd; + + /* These are physical addresses. */ + unsigned long FrameBufferBase; + unsigned long MmioBase; + + /* These are linear addresses. */ + unsigned char* MapBase; + unsigned char* VidMapBase; + unsigned char* BltBase; + unsigned char* MapBaseDense; + unsigned char* FBBase; + unsigned char* FBStart; + + /* Private memory pool management */ + int SWOVUsed[MEM_BLOCKS]; /* Free map for SWOV pool */ + unsigned long SWOVPool; /* Base of SWOV pool */ + unsigned long SWOVSize; /* Size of SWOV blocks */ + + Bool PrimaryVidMapped; + int dacSpeedBpp; + int minClock, maxClock; + int MCLK, REFCLK, LCDclk; + double refclk_fact; + + /* Here are all the Options */ + Bool VQEnable; + Bool pci_burst; + Bool NoPCIRetry; + Bool hwcursor; + Bool NoAccel; + Bool shadowFB; + Bool NoDDCValue; + int rotate; + + //CloseScreenProcPtr CloseScreen; + //pciVideoPtr PciInfo; + //PCITAG PciTag; + int Chipset; + int ChipId; + int ChipRev; + //vbeInfoPtr pVbe; + int EntityIndex; + + /* Support for shadowFB and rotation */ + unsigned char* ShadowPtr; + int ShadowPitch; + void (*PointerMoved)(int index, int x, int y); + + /* Support for XAA acceleration */ + //XAAInfoRecPtr AccelInfoRec; + //xRectangle Rect; + CARD32 SavedCmd; + CARD32 SavedFgColor; + CARD32 SavedBgColor; + CARD32 SavedPattern0; + CARD32 SavedPattern1; + CARD32 SavedPatternAddr; + + /* Support for Int10 processing */ + //xf86Int10InfoPtr pInt10; + + /* BIOS Info Ptr */ + //VIABIOSInfoPtr pBIOSInfo; + + /* Support for DGA */ + int numDGAModes; + //DGAModePtr DGAModes; + Bool DGAactive; + int DGAViewportStatus; + int DGAOldDisplayWidth; + int DGAOldBitsPerPixel; + int DGAOldDepth; + /* The various wait handlers. */ + int (*myWaitIdle)(struct _VIA*); + + /* I2C & DDC */ + //I2CBusPtr I2C_Port1; + //I2CBusPtr I2C_Port2; + //xf86MonPtr DDC1; + //xf86MonPtr DDC2; + + /* MHS */ + Bool IsSecondary; + Bool HasSecondary; + + /* Capture de-interlace Mode */ + CARD32 Cap0_Deinterlace; + CARD32 Cap1_Deinterlace; + + Bool Cap0_FieldSwap; + +#ifdef XF86DRI + Bool directRenderingEnabled; + DRIInfoPtr pDRIInfo; + int drmFD; + int numVisualConfigs; + __GLXvisualConfig* pVisualConfigs; + VIAConfigPrivPtr pVisualConfigsPriv; + unsigned long agpHandle; + unsigned long registerHandle; + unsigned long agpAddr; + unsigned char *agpBase; + unsigned int agpSize; + Bool IsPCI; + Bool drixinerama; +#else + int drmFD; + unsigned long agpHandle; + unsigned long registerHandle; + unsigned long agpAddr; + unsigned char *agpBase; + unsigned int agpSize; + Bool IsPCI; +#endif + Bool OldDRI; /* True if DRM < 2.0 found */ + + unsigned char ActiveDevice; /* if SAMM, non-equal pBIOSInfo->ActiveDevice */ + unsigned char *CursorImage; + CARD32 CursorFG; + CARD32 CursorBG; + CARD32 CursorMC; + +#if 0 + /* Video */ + swovRec swov; + VIAVideoControlRec Video; + VIAHWRec ViaHW; + unsigned long dwV1, dwV3; + unsigned long OverlaySupported; + unsigned long dwFrameNum; + + pointer VidReg; + unsigned long gdwVidRegCounter; + unsigned long old_dwUseExtendedFIFO; + + /* Overlay TV Tuners */ + ViaTunerPtr Tuner[2]; + I2CDevPtr CXA2104S; + int AudioMode; + int AudioMute; +#endif + + /* SubPicture */ + //ViaSubPictureRecord SubPicture; + //ViaHQVRecord HQV; + //ViaTVRecord TV0, TV1; + + /* TODO: MPEG TV0 TV1 */ + + /* Global 2D state block - needs to slowly die */ + //ViaGraphicRec graphicInfo; + ViaSharedPtr sharedData; + + VIADRIPtr devPrivate; +} VIARec, *VIAPtr; + + +#if 0 +typedef struct +{ + Bool IsDRIEnabled; + + Bool HasSecondary; + Bool BypassSecondary; + /*These two registers are used to make sure the CRTC2 is + retored before CRTC_EXT, otherwise it could lead to blank screen.*/ + Bool IsSecondaryRestored; + Bool RestorePrimary; + + ScrnInfoPtr pSecondaryScrn; + ScrnInfoPtr pPrimaryScrn; +}VIAEntRec, *VIAEntPtr; +#endif + + +/* Shortcuts. These depend on a local symbol "pVia". */ + +#define WaitIdle() pVia->myWaitIdle(pVia) +#define VIAPTR(p) ((VIAPtr)((p)->driverPrivate)) + + +#if 0 +/* Prototypes. */ +void VIAAdjustFrame(int scrnIndex, int y, int x, int flags); +Bool VIASwitchMode(int scrnIndex, DisplayModePtr mode, int flags); + +/* In HwDiff.c */ +void VIAvfInitHWDiff(VIAPtr pVia ); + +/* In via_cursor.c. */ +Bool VIAHWCursorInit(ScreenPtr pScreen); +void VIAShowCursor(ScrnInfoPtr); +void VIAHideCursor(ScrnInfoPtr); + + +/* In via_accel.c. */ +Bool VIAInitAccel(ScreenPtr); +void VIAInitialize2DEngine(ScrnInfoPtr); +void VIAAccelSync(ScrnInfoPtr); +void VIAInitLinear(ScreenPtr pScreen); + + +/* In via_shadow.c */ +void VIAPointerMoved(int index, int x, int y); +void VIARefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox); +void VIARefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox); +void VIARefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox); +void VIARefreshArea24(ScrnInfoPtr pScrn, int num, BoxPtr pbox); +void VIARefreshArea32(ScrnInfoPtr pScrn, int num, BoxPtr pbox); + + +/* In via_bios.c */ +void VIAEnableLCD(VIABIOSInfoPtr pBIOSInfo); +void VIADisableLCD(VIABIOSInfoPtr pBIOSInfo); + +/* In via_dga.c */ +Bool VIADGAInit(ScreenPtr); + +/* In via_i2c.c */ +Bool VIAI2CInit(ScrnInfoPtr pScrn); + +/* In via_gpioi2c.c */ +Bool VIAGPIOI2C_Write(VIABIOSInfoPtr pBIOSInfo, int SubAddress, CARD8 Data); +Bool VIAGPIOI2C_Read(VIABIOSInfoPtr pBIOSInfo, int SubAddress, CARD8 *Buffer, int BufferLen); +Bool VIAGPIOI2C_ReadByte(VIABIOSInfoPtr pBIOSInfo, int SubAddress, CARD8 *Buffer); +Bool VIAGPIOI2C_Initial(VIABIOSInfoPtr pBIOSInfo, CARD8 SlaveDevice); + +/*In via_video.c*/ +void viaInitVideo(ScreenPtr pScreen); +void viaExitVideo(ScrnInfoPtr pScrn); +void viaResetVideo(ScrnInfoPtr pScrn); +void viaSaveVideo(ScrnInfoPtr pScrn); +void viaRestoreVideo(ScrnInfoPtr pScrn); + +/*In via_utility.c */ +void VIAXVUtilityProc(ScrnInfoPtr pScrn, unsigned char* buf); +Bool VIAUTGetInfo(VIABIOSInfoPtr pBIOSInfo); +Bool VIALoadUserSetting(VIABIOSInfoPtr pBIOSInfo); +Bool VIALoadGammaSetting(VIABIOSInfoPtr pBIOSInfo); +Bool VIARestoreUserSetting(VIABIOSInfoPtr pBIOSInfo); +void VIAUTRemoveRestartFlag(VIABIOSInfoPtr pBIOSInfo); + +/* in via_overlay.c */ +unsigned long viaOverlayHQVCalcZoomHeight (VIAPtr pVia, unsigned long srcHeight,unsigned long dstHeight, + unsigned long * lpzoomCtl, unsigned long * lpminiCtl, unsigned long * lpHQVfilterCtl, unsigned long * lpHQVminiCtl,unsigned long * lpHQVzoomflag); +unsigned long viaOverlayGetSrcStartAddress (VIAPtr pVia, unsigned long dwVideoFlag,RECTL rSrc,RECTL rDest, unsigned long dwSrcPitch,LPDDPIXELFORMAT lpDPF,unsigned long * lpHQVoffset ); +void viaOverlayGetDisplayCount(VIAPtr pVIa, unsigned long dwVideoFlag,LPDDPIXELFORMAT lpDPF,unsigned long dwSrcWidth,unsigned long * lpDisplayCountW); +unsigned long viaOverlayHQVCalcZoomWidth(VIAPtr pVia, unsigned long dwVideoFlag, unsigned long srcWidth , unsigned long dstWidth, + unsigned long * lpzoomCtl, unsigned long * lpminiCtl, unsigned long * lpHQVfilterCtl, unsigned long * lpHQVminiCtl,unsigned long * lpHQVzoomflag); +void viaOverlayGetV1Format(VIAPtr pVia, unsigned long dwVideoFlag,LPDDPIXELFORMAT lpDPF, unsigned long * lpdwVidCtl,unsigned long * lpdwHQVCtl ); +void viaOverlayGetV3Format(VIAPtr pVia, unsigned long dwVideoFlag,LPDDPIXELFORMAT lpDPF, unsigned long * lpdwVidCtl,unsigned long * lpdwHQVCtl ); + +/* In via_memory.c */ +void VIAFreeLinear(VIAMemPtr); +unsigned long VIAAllocLinear(VIAMemPtr, ScrnInfoPtr, unsigned long); +void VIAInitPool(VIAPtr, unsigned long, unsigned long); + +/* In via_tuner.c */ +void ViaTunerStandard(ViaTunerPtr, int); +void ViaTunerBrightness(ViaTunerPtr, int); +void ViaTunerContrast(ViaTunerPtr, int); +void ViaTunerHue(ViaTunerPtr, int); +void ViaTunerLuminance(ViaTunerPtr, int); +void ViaTunerSaturation(ViaTunerPtr, int); +void ViaTunerInput(ViaTunerPtr, int); +#define MODE_TV 0 +#define MODE_SVIDEO 1 +#define MODE_COMPOSITE 2 + +void ViaTunerChannel(ViaTunerPtr, int, int); +void ViaAudioSelect(VIAPtr pVia, int tuner); +void ViaAudioInit(VIAPtr pVia); +void ViaAudioMode(VIAPtr pVia, int mode); +void ViaAudioMute(VIAPtr pVia, int mute); +void ViaTunerProbe(ScrnInfoPtr pScrn); +void ViaTunerDestroy(ScrnInfoPtr pScrn); + +/* In via_lib.c */ +int VIACLECXChipset(VIAPtr pVia); +void VIASetColorspace(VIAPtr pVia, int check_secondary); +void VIAYUVFillBlack(VIAPtr pVia, int offset, int pixels); + +/* In via_subp.c */ +unsigned long VIACreateSubPictureSurface(ScrnInfoPtr pScrn, CARD32 width, CARD32 height); +void VIADestroySubPictureSurface(ScrnInfoPtr pScrn); +void VIASubPicturePalette(ScrnInfoPtr pScrn); +void VIASubPictureStart(ScrnInfoPtr pScrn, int frame); +void VIASubPictureStop(ScrnInfoPtr pScrn); + +/* In via_tv0.c */ +unsigned long VIACreateTV0Surface(ScrnInfoPtr pScrn, CARD32 width, CARD32 height); +void VIADestroyTV0Surface(ScrnInfoPtr pScrn); +#endif + +#endif /* _VIA_DRIVER_H_ */ diff --git a/src/mesa/drivers/dri/unichrome/server/via_priv.h b/src/mesa/drivers/dri/unichrome/server/via_priv.h new file mode 100644 index 0000000000..c5a8bb9517 --- /dev/null +++ b/src/mesa/drivers/dri/unichrome/server/via_priv.h @@ -0,0 +1,70 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/via/via_priv.h,v 1.3 2003/08/27 15:16:12 tsi Exp $ */ + +#ifndef _VIA_PRIV_H_ +#define _VIA_PRIV_H_ 1 + +//#include "ddmpeg.h" +#include "via_common.h" + +#define MEM_BLOCKS 4 + +typedef struct { + unsigned long base; /* Offset into fb */ + int pool; /* Pool we drew from */ + int drm_fd; /* Fd in DRM mode */ + drm_via_mem_t drm; /* DRM management object */ + int slot; /* Pool 3 slot */ + void *pVia; /* VIA driver pointer */ + //FBLinearPtr linear; /* X linear pool info ptr */ +} VIAMem; + +typedef VIAMem *VIAMemPtr; + + + +#if 0 +typedef struct { + unsigned long gdwVideoFlagTV1; + unsigned long gdwVideoFlagSW; + unsigned long gdwVideoFlagMPEG; + unsigned long gdwAlphaEnabled; /* For Alpha blending use*/ + + VIAMem SWOVMem; + VIAMem HQVMem; + VIAMem SWfbMem; + + DDPIXELFORMAT DPFsrc; + DDUPDATEOVERLAY UpdateOverlayBackup; /* For HQVcontrol func use + // To save MPEG updateoverlay info.*/ + +/* device struct */ + SWDEVICE SWDevice; + SUBDEVICE SUBDevice; + MPGDEVICE MPGDevice; + OVERLAYRECORD overlayRecordV1; + OVERLAYRECORD overlayRecordV3; + + BoxRec AvailFBArea; + FBLinearPtr SWOVlinear; + + Bool MPEG_ON; + Bool SWVideo_ON; + +/*To solve the bandwidth issue */ + unsigned long gdwUseExtendedFIFO; + +/* For panning mode use */ + int panning_old_x; + int panning_old_y; + int panning_x; + int panning_y; + +/*To solve the bandwidth issue */ + unsigned char Save_3C4_16; + unsigned char Save_3C4_17; + unsigned char Save_3C4_18; + +} swovRec, *swovPtr; +#endif + +#endif /* _VIA_PRIV_H_ */ diff --git a/src/mesa/drivers/dri/unichrome/server/via_regs.h b/src/mesa/drivers/dri/unichrome/server/via_regs.h new file mode 100644 index 0000000000..3e2fb0a2a0 --- /dev/null +++ b/src/mesa/drivers/dri/unichrome/server/via_regs.h @@ -0,0 +1,212 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/via/via_regs.h,v 1.3 2003/08/27 15:16:13 tsi Exp $ */ +/* + * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/************************************************************************* + * + * File: via_regs.c + * Content: The defines of Via registers + * + ************************************************************************/ + +#ifndef _VIA_REGS_H_ +#define _VIA_REGS_H_ 1 + +#include "via_driver.h" + +#define VIA_SERIES(chip) (chip == VIA_CLE266) + + +/* Chip tags. These are used to group the adapters into + * related families. + */ + +enum VIACHIPTAGS { + VIA_UNKNOWN = 0, + VIA_CLE266, + VIA_KM400, + VIA_K8M800, + VIA_LAST +}; + + +#define PCI_VIA_VENDOR_ID 0x1106 + +#define PCI_CHIP_CLE3122 0x3122 +#define PCI_CHIP_CLE3022 0x3022 +#define PCI_CHIP_VT3205 0x3205 +#define PCI_CHIP_VT7205 0x7205 +#define PCI_CHIP_VT3204 0x3204 +#define PCI_CHIP_VT7204 0x7204 + + +#define BIOS_BSIZE 1024 +#define BIOS_BASE 0xc0000 + + +#define VIA_MMIO_REGSIZE 0x9000 +#define VIA_MMIO_REGBASE 0x0 +#define VIA_MMIO_VGABASE 0x8000 +#define VIA_MMIO_BLTBASE 0x200000 +#define VIA_MMIO_BLTSIZE 0x10000 + + +/* defines for VIA 2D registers */ +#define VIA_REG_GECMD 0x000 +#define VIA_REG_GEMODE 0x004 +#define VIA_REG_GESTATUS 0x004 /* as same as VIA_REG_GEMODE */ +#define VIA_REG_SRCPOS 0x008 +#define VIA_REG_DSTPOS 0x00C +#define VIA_REG_LINE_K1K2 0x008 +#define VIA_REG_LINE_XY 0x00C +#define VIA_REG_DIMENSION 0x010 /* width and height */ +#define VIA_REG_PATADDR 0x014 +#define VIA_REG_FGCOLOR 0x018 +#define VIA_REG_DSTCOLORKEY 0x018 /* as same as VIA_REG_FG */ +#define VIA_REG_BGCOLOR 0x01C +#define VIA_REG_SRCCOLORKEY 0x01C /* as same as VIA_REG_BG */ +#define VIA_REG_CLIPTL 0x020 /* top and left of clipping */ +#define VIA_REG_CLIPBR 0x024 /* bottom and right of clipping */ +#define VIA_REG_OFFSET 0x028 +#define VIA_REG_LINE_ERROR 0x028 +#define VIA_REG_KEYCONTROL 0x02C /* color key control */ +#define VIA_REG_SRCBASE 0x030 +#define VIA_REG_DSTBASE 0x034 +#define VIA_REG_PITCH 0x038 /* pitch of src and dst */ +#define VIA_REG_MONOPAT0 0x03C +#define VIA_REG_MONOPAT1 0x040 +#define VIA_REG_COLORPAT 0x100 /* from 0x100 to 0x1ff */ + + + +/* defines for VIA video registers */ +#define VIA_REG_INTERRUPT 0x200 +#define VIA_REG_CRTCSTART 0x214 + + +/* defines for VIA HW cursor registers */ +#define VIA_REG_CURSOR_MODE 0x2D0 +#define VIA_REG_CURSOR_POS 0x2D4 +#define VIA_REG_CURSOR_ORG 0x2D8 +#define VIA_REG_CURSOR_BG 0x2DC +#define VIA_REG_CURSOR_FG 0x2E0 + + +/* defines for VIA 3D registers */ +#define VIA_REG_STATUS 0x400 +#define VIA_REG_TRANSET 0x43C +#define VIA_REG_TRANSPACE 0x440 + +/* VIA_REG_STATUS(0x400): Engine Status */ +#define VIA_CMD_RGTR_BUSY 0x00000080 /* Command Regulator is busy */ +#define VIA_2D_ENG_BUSY 0x00000001 /* 2D Engine is busy */ +#define VIA_3D_ENG_BUSY 0x00000002 /* 3D Engine is busy */ +#define VIA_VR_QUEUE_BUSY 0x00020000 /* Virtual Queue is busy */ + + +/* VIA_REG_GECMD(0x00): 2D Engine Command */ +#define VIA_GEC_NOOP 0x00000000 +#define VIA_GEC_BLT 0x00000001 +#define VIA_GEC_LINE 0x00000005 + +#define VIA_GEC_SRC_XY 0x00000000 +#define VIA_GEC_SRC_LINEAR 0x00000010 +#define VIA_GEC_DST_XY 0x00000000 +#define VIA_GEC_DST_LINRAT 0x00000020 + +#define VIA_GEC_SRC_FB 0x00000000 +#define VIA_GEC_SRC_SYS 0x00000040 +#define VIA_GEC_DST_FB 0x00000000 +#define VIA_GEC_DST_SYS 0x00000080 + +#define VIA_GEC_SRC_MONO 0x00000100 /* source is mono */ +#define VIA_GEC_PAT_MONO 0x00000200 /* pattern is mono */ + +#define VIA_GEC_MSRC_OPAQUE 0x00000000 /* mono src is opaque */ +#define VIA_GEC_MSRC_TRANS 0x00000400 /* mono src is transparent */ + +#define VIA_GEC_PAT_FB 0x00000000 /* pattern is in frame buffer */ +#define VIA_GEC_PAT_REG 0x00000800 /* pattern is from reg setting */ + +#define VIA_GEC_CLIP_DISABLE 0x00000000 +#define VIA_GEC_CLIP_ENABLE 0x00001000 + +#define VIA_GEC_FIXCOLOR_PAT 0x00002000 + +#define VIA_GEC_INCX 0x00000000 +#define VIA_GEC_DECY 0x00004000 +#define VIA_GEC_INCY 0x00000000 +#define VIA_GEC_DECX 0x00008000 + +#define VIA_GEC_MPAT_OPAQUE 0x00000000 /* mono pattern is opaque */ +#define VIA_GEC_MPAT_TRANS 0x00010000 /* mono pattern is transparent */ + +#define VIA_GEC_MONO_UNPACK 0x00000000 +#define VIA_GEC_MONO_PACK 0x00020000 +#define VIA_GEC_MONO_DWORD 0x00000000 +#define VIA_GEC_MONO_WORD 0x00040000 +#define VIA_GEC_MONO_BYTE 0x00080000 + +#define VIA_GEC_LASTPIXEL_ON 0x00000000 +#define VIA_GEC_LASTPIXEL_OFF 0x00100000 +#define VIA_GEC_X_MAJOR 0x00000000 +#define VIA_GEC_Y_MAJOR 0x00200000 +#define VIA_GEC_QUICK_START 0x00800000 + + +/* VIA_REG_GEMODE(0x04): GE mode */ +#define VIA_GEM_8bpp 0x00000000 +#define VIA_GEM_16bpp 0x00000100 +#define VIA_GEM_32bpp 0x00000300 + +#define VIA_GEM_640 0x00000000 /* 640*480 */ +#define VIA_GEM_800 0x00000400 /* 800*600 */ +#define VIA_GEM_1024 0x00000800 /* 1024*768 */ +#define VIA_GEM_1280 0x00000C00 /* 1280*1024 */ +#define VIA_GEM_1600 0x00001000 /* 1600*1200 */ +#define VIA_GEM_2048 0x00001400 /* 2048*1536 */ + +/* VIA_REG_PITCH(0x38): Pitch Setting */ +#define VIA_PITCH_ENABLE 0x80000000 + + +#define MAXLOOP 0xffffff + + +#define VerticalRetraceWait() \ +{ \ + VGAOUT8(vgaCRIndex, 0x17); \ + if (VGAIN8(vgaCRReg) & 0x80) { \ + while ((VGAIN8(vgaIOBase + 0x0a) & 0x08) == 0x00) ; \ + while ((VGAIN8(vgaIOBase + 0x0a) & 0x08) == 0x08) ; \ + while ((VGAIN8(vgaIOBase + 0x0a) & 0x08) == 0x00) ; \ + } \ +} + + +#define VIASETREG(addr, data) *(volatile unsigned int *)(pVia->MapBase + (addr)) = (data) +#define VIAGETREG(addr) *(volatile unsigned int *)(pVia->MapBase + (addr)) + + +#endif /* _VIA_REGS_H_ */ |