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-rw-r--r--src/mesa/drivers/dri/common/vblank.c18
-rw-r--r--src/mesa/drivers/dri/i915/i915_context.c1
-rw-r--r--src/mesa/drivers/dri/i915/i915_fragprog.c22
-rw-r--r--src/mesa/drivers/dri/intel/intel_buffers.c2
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.c11
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.h1
-rw-r--r--src/mesa/drivers/dri/intel/intel_pixel_bitmap.c4
-rw-r--r--src/mesa/drivers/dri/intel/intel_regions.c9
-rw-r--r--src/mesa/drivers/dri/intel/intel_screen.c15
-rw-r--r--src/mesa/drivers/dri/intel/intel_screen.h1
-rw-r--r--src/mesa/drivers/dri/r300/r300_reg.h8
-rw-r--r--src/mesa/drivers/dri/r300/r300_render.c3
12 files changed, 25 insertions, 70 deletions
diff --git a/src/mesa/drivers/dri/common/vblank.c b/src/mesa/drivers/dri/common/vblank.c
index d610253fe6..12aeaa108f 100644
--- a/src/mesa/drivers/dri/common/vblank.c
+++ b/src/mesa/drivers/dri/common/vblank.c
@@ -130,9 +130,8 @@ int driWaitForMSC32( __DRIdrawablePrivate *priv,
if ( divisor != 0 ) {
- unsigned int target = (unsigned int)target_msc;
- unsigned int next = target;
- unsigned int r;
+ int64_t next = target_msc;
+ int64_t r;
int dont_wait = (target_msc == 0);
do {
@@ -154,9 +153,9 @@ int driWaitForMSC32( __DRIdrawablePrivate *priv,
*msc = vblank_to_msc(priv, vbl.reply.sequence);
- dont_wait = 0;
- if (target_msc != 0 && *msc == target)
+ if (!dont_wait && *msc == next)
break;
+ dont_wait = 0;
/* Assuming the wait-done test fails, the next refresh to wait for
* will be one that satisfies (MSC % divisor) == remainder. The
@@ -165,11 +164,12 @@ int driWaitForMSC32( __DRIdrawablePrivate *priv,
* If this refresh has already happened, we add divisor to obtain
* the next refresh after the current one that will satisfy it.
*/
- r = (*msc % (unsigned int)divisor);
- next = (*msc - r + (unsigned int)remainder);
- if (next <= *msc) next += (unsigned int)divisor;
+ r = ((uint64_t)*msc % divisor);
+ next = (*msc - r + remainder);
+ if (next <= *msc)
+ next += divisor;
- } while ( r != (unsigned int)remainder );
+ } while (r != remainder);
}
else {
/* If the \c divisor is zero, just wait until the MSC is greater
diff --git a/src/mesa/drivers/dri/i915/i915_context.c b/src/mesa/drivers/dri/i915/i915_context.c
index e0ddc7fd61..9bff74294d 100644
--- a/src/mesa/drivers/dri/i915/i915_context.c
+++ b/src/mesa/drivers/dri/i915/i915_context.c
@@ -55,6 +55,7 @@ static const struct dri_extension i915_extensions[] = {
{"GL_ARB_fragment_program", NULL},
{"GL_ARB_shadow", NULL},
{"GL_ARB_texture_non_power_of_two", NULL},
+ {"GL_ATI_texture_env_combine3", NULL},
{"GL_EXT_shadow_funcs", NULL},
{NULL, NULL}
};
diff --git a/src/mesa/drivers/dri/i915/i915_fragprog.c b/src/mesa/drivers/dri/i915/i915_fragprog.c
index 8bd761ec6a..4760906a7e 100644
--- a/src/mesa/drivers/dri/i915/i915_fragprog.c
+++ b/src/mesa/drivers/dri/i915/i915_fragprog.c
@@ -1105,30 +1105,14 @@ i915ValidateFragmentProgram(struct i915_context *i915)
EMIT_ATTR(_TNL_ATTRIB_COLOR0, EMIT_4UB_4F_BGRA, S4_VFMT_COLOR, 4);
}
- if ((inputsRead & (FRAG_BIT_COL1 | FRAG_BIT_FOGC)) ||
- i915->vertex_fog != I915_FOG_NONE) {
-
- if (inputsRead & FRAG_BIT_COL1) {
- intel->specoffset = offset / 4;
- EMIT_ATTR(_TNL_ATTRIB_COLOR1, EMIT_3UB_3F_BGR, S4_VFMT_SPEC_FOG, 3);
- }
- else
- EMIT_PAD(3);
-
- if ((inputsRead & FRAG_BIT_FOGC) || i915->vertex_fog != I915_FOG_NONE)
- EMIT_ATTR(_TNL_ATTRIB_FOG, EMIT_1UB_1F, S4_VFMT_SPEC_FOG, 1);
- else
- EMIT_PAD(1);
+ if (inputsRead & FRAG_BIT_COL1) {
+ intel->specoffset = offset / 4;
+ EMIT_ATTR(_TNL_ATTRIB_COLOR1, EMIT_4UB_4F_BGRA, S4_VFMT_SPEC_FOG, 4);
}
- /* XXX this was disabled, but enabling this code helped fix the Glean
- * tfragprog1 fog tests.
- */
-#if 1
if ((inputsRead & FRAG_BIT_FOGC) || i915->vertex_fog != I915_FOG_NONE) {
EMIT_ATTR(_TNL_ATTRIB_FOG, EMIT_1F, S4_VFMT_FOG_PARAM, 4);
}
-#endif
for (i = 0; i < p->ctx->Const.MaxTextureCoordUnits; i++) {
if (inputsRead & FRAG_BIT_TEX(i)) {
diff --git a/src/mesa/drivers/dri/intel/intel_buffers.c b/src/mesa/drivers/dri/intel/intel_buffers.c
index f8f009c6a3..4d036dee42 100644
--- a/src/mesa/drivers/dri/intel/intel_buffers.c
+++ b/src/mesa/drivers/dri/intel/intel_buffers.c
@@ -181,7 +181,7 @@ intelUpdatePageFlipping(struct intel_context *intel,
intel_fb->pf_current_page = (intel->sarea->pf_current_page >>
(intel_fb->pf_planes & 0x2)) & 0x3;
- intel_fb->pf_num_pages = intel->intelScreen->third.handle ? 3 : 2;
+ intel_fb->pf_num_pages = 2;
pf_active = pf_planes && (pf_planes & intel->sarea->pf_active) == pf_planes;
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 6c625b428c..44b276a123 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -412,6 +412,7 @@ static const struct dri_extension brw_extensions[] = {
{ "GL_EXT_shadow_funcs", NULL },
{ "GL_EXT_texture_sRGB", NULL },
{ "GL_ATI_separate_stencil", GL_ATI_separate_stencil_functions },
+ { "GL_ATI_texture_env_combine3", NULL },
{ NULL, NULL }
};
@@ -775,7 +776,6 @@ intelDestroyContext(__DRIcontextPrivate * driContextPriv)
intel_region_release(&intel->front_region);
intel_region_release(&intel->back_region);
- intel_region_release(&intel->third_region);
intel_region_release(&intel->depth_region);
driDestroyOptionCache(&intel->optionCache);
@@ -825,12 +825,7 @@ intelMakeCurrent(__DRIcontextPrivate * driContextPriv,
intel_renderbuffer_set_region(intel_fb->color_rb[1],
intel->back_region);
}
-#if 0
- if (intel_fb->color_rb[2]) {
- intel_renderbuffer_set_region(intel_fb->color_rb[2],
- intel->third_region);
- }
-#endif
+
if (irbDepth) {
intel_renderbuffer_set_region(irbDepth, intel->depth_region);
}
@@ -867,7 +862,7 @@ intelMakeCurrent(__DRIcontextPrivate * driContextPriv,
driDrawableInitVBlank(driDrawPriv);
intel_fb->vbl_waited = driDrawPriv->vblSeq;
- for (i = 0; i < (intel->intelScreen->third.handle ? 3 : 2); i++) {
+ for (i = 0; i < 2; i++) {
if (intel_fb->color_rb[i])
intel_fb->color_rb[i]->vbl_pending = driDrawPriv->vblSeq;
}
diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h
index ee43ed7e83..ac08117bb4 100644
--- a/src/mesa/drivers/dri/intel/intel_context.h
+++ b/src/mesa/drivers/dri/intel/intel_context.h
@@ -166,7 +166,6 @@ struct intel_context
struct intel_region *front_region;
struct intel_region *back_region;
- struct intel_region *third_region;
struct intel_region *depth_region;
/**
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
index fb1a051cdc..5e0e0d29ca 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
@@ -244,8 +244,8 @@ do_blit_bitmap( GLcontext *ctx,
/* Clip to drawable cliprect */
if (!_mesa_clip_to_region(cliprects[i].x1,
cliprects[i].y1,
- cliprects[i].x2 - cliprects[i].x1,
- cliprects[i].y2 - cliprects[i].y1,
+ cliprects[i].x2,
+ cliprects[i].y2,
&box_x, &box_y, &box_w, &box_h))
continue;
diff --git a/src/mesa/drivers/dri/intel/intel_regions.c b/src/mesa/drivers/dri/intel/intel_regions.c
index 8dbcc3050e..51ce32a967 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.c
+++ b/src/mesa/drivers/dri/intel/intel_regions.c
@@ -550,15 +550,6 @@ intel_recreate_static_regions(struct intel_context *intel)
intel->back_region,
&intelScreen->back);
-#ifdef I915
- if (intelScreen->third.handle) {
- intel->third_region =
- intel_recreate_static(intel, "third",
- intel->third_region,
- &intelScreen->third);
- }
-#endif /* I915 */
-
/* Still assumes front.cpp == depth.cpp. We can kill this when we move to
* private buffers.
*/
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index 61b55b97b5..fc4e82b56c 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -177,13 +177,6 @@ intelUpdateScreenFromSAREA(intelScreenPrivate * intelScreen,
intelScreen->back.size = sarea->back_size;
intelScreen->back.tiled = sarea->back_tiled;
- if (intelScreen->driScrnPriv->ddx_version.minor >= 8) {
- intelScreen->third.offset = sarea->third_offset;
- intelScreen->third.handle = sarea->third_handle;
- intelScreen->third.size = sarea->third_size;
- intelScreen->third.tiled = sarea->third_tiled;
- }
-
intelScreen->depth.offset = sarea->depth_offset;
intelScreen->depth.handle = sarea->depth_handle;
intelScreen->depth.size = sarea->depth_size;
@@ -192,12 +185,10 @@ intelUpdateScreenFromSAREA(intelScreenPrivate * intelScreen,
if (intelScreen->driScrnPriv->ddx_version.minor >= 9) {
intelScreen->front.bo_handle = sarea->front_bo_handle;
intelScreen->back.bo_handle = sarea->back_bo_handle;
- intelScreen->third.bo_handle = sarea->third_bo_handle;
intelScreen->depth.bo_handle = sarea->depth_bo_handle;
} else {
intelScreen->front.bo_handle = -1;
intelScreen->back.bo_handle = -1;
- intelScreen->third.bo_handle = -1;
intelScreen->depth.bo_handle = -1;
}
@@ -353,12 +344,6 @@ intelCreateBuffer(__DRIscreenPrivate * driScrnPriv,
_mesa_add_renderbuffer(&intel_fb->Base, BUFFER_BACK_LEFT,
&intel_fb->color_rb[1]->Base);
- if (screen->third.handle) {
- struct gl_renderbuffer *tmp_rb = NULL;
-
- intel_fb->color_rb[2] = intel_create_renderbuffer(rgbFormat);
- _mesa_reference_renderbuffer(&tmp_rb, &intel_fb->color_rb[2]->Base);
- }
}
if (mesaVis->depthBits == 24) {
diff --git a/src/mesa/drivers/dri/intel/intel_screen.h b/src/mesa/drivers/dri/intel/intel_screen.h
index 91f0d6d1ae..cf5359baae 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.h
+++ b/src/mesa/drivers/dri/intel/intel_screen.h
@@ -56,7 +56,6 @@ typedef struct
{
intelRegion front;
intelRegion back;
- intelRegion third;
intelRegion depth;
intelRegion tex;
diff --git a/src/mesa/drivers/dri/r300/r300_reg.h b/src/mesa/drivers/dri/r300/r300_reg.h
index 778db96cc1..7c6485ef60 100644
--- a/src/mesa/drivers/dri/r300/r300_reg.h
+++ b/src/mesa/drivers/dri/r300/r300_reg.h
@@ -64,7 +64,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#define R300_SE_VPORT_ZSCALE 0x1DA8
#define R300_SE_VPORT_ZOFFSET 0x1DAC
-
+#define R300_VAP_PORT_IDX0 0x2040
/*
* Vertex Array Processing (VAP) Control
*/
@@ -3201,9 +3201,9 @@ enum {
#define R300_PACKET3_3D_LOAD_VBPNTR 0x00002F00
#define R300_PACKET3_INDX_BUFFER 0x00003300
-# define R300_EB_UNK1_SHIFT 24
-# define R300_EB_UNK1 (0x80<<24)
-# define R300_EB_UNK2 0x0810
+# define R300_INDX_BUFFER_DST_SHIFT 0
+# define R300_INDX_BUFFER_SKIP_SHIFT 16
+# define R300_INDX_BUFFER_ONE_REG_WR (1<<31)
/* Same as R300_PACKET3_3D_DRAW_VBUF but without VAP_VTX_FMT */
#define R300_PACKET3_3D_DRAW_VBUF_2 0x00003400
diff --git a/src/mesa/drivers/dri/r300/r300_render.c b/src/mesa/drivers/dri/r300/r300_render.c
index 292f87a2b1..f9266e44c1 100644
--- a/src/mesa/drivers/dri/r300/r300_render.c
+++ b/src/mesa/drivers/dri/r300/r300_render.c
@@ -208,7 +208,8 @@ static void r300FireEB(r300ContextPtr rmesa, unsigned long addr,
e32(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (vertex_count << 16) | type | R300_VAP_VF_CNTL__INDEX_SIZE_32bit);
start_packet3(CP_PACKET3(R300_PACKET3_INDX_BUFFER, 2), 2);
- e32(R300_EB_UNK1 | (0 << 16) | R300_EB_UNK2);
+ e32(R300_INDX_BUFFER_ONE_REG_WR | (0 << R300_INDX_BUFFER_SKIP_SHIFT) |
+ (R300_VAP_PORT_IDX0 >> 2));
e32(addr);
e32(vertex_count);
}
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-05 06:28:46 +0000