summaryrefslogtreecommitdiff
path: root/src/mesa/drivers/dri
diff options
context:
space:
mode:
Diffstat (limited to 'src/mesa/drivers/dri')
-rw-r--r--src/mesa/drivers/dri/r300/r300_context.c28
-rw-r--r--src/mesa/drivers/dri/r300/r300_context.h1
-rw-r--r--src/mesa/drivers/dri/r600/r600_context.c8
-rw-r--r--src/mesa/drivers/dri/r600/r700_chip.c74
-rw-r--r--src/mesa/drivers/dri/r600/r700_fragprog.c21
-rw-r--r--src/mesa/drivers/dri/r600/r700_fragprog.h11
-rw-r--r--src/mesa/drivers/dri/r600/r700_render.c7
-rw-r--r--src/mesa/drivers/dri/r600/r700_state.c102
-rw-r--r--src/mesa/drivers/dri/r600/r700_vertprog.c26
-rw-r--r--src/mesa/drivers/dri/r600/r700_vertprog.h22
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_bocs_wrapper.h8
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_fbo.c3
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_screen.c18
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_screen.h1
14 files changed, 189 insertions, 141 deletions
diff --git a/src/mesa/drivers/dri/r300/r300_context.c b/src/mesa/drivers/dri/r300/r300_context.c
index 15c1eeb0d4..0bf002caea 100644
--- a/src/mesa/drivers/dri/r300/r300_context.c
+++ b/src/mesa/drivers/dri/r300/r300_context.c
@@ -238,8 +238,8 @@ static void r300_emit_query_finish(radeonContextPtr radeon)
struct radeon_query_object *query = radeon->query.current;
BATCH_LOCALS(radeon);
- BEGIN_BATCH_NO_AUTOSTATE(3 * 2 *r300->num_z_pipes + 2);
- switch (r300->num_z_pipes) {
+ BEGIN_BATCH_NO_AUTOSTATE(3 * 2 *r300->radeon.radeonScreen->num_gb_pipes + 2);
+ switch (r300->radeon.radeonScreen->num_gb_pipes) {
case 4:
OUT_BATCH_REGVAL(R300_SU_REG_DEST, R300_RASTER_PIPE_SELECT_3);
OUT_BATCH_REGSEQ(R300_ZB_ZPASS_ADDR, 1);
@@ -265,7 +265,7 @@ static void r300_emit_query_finish(radeonContextPtr radeon)
}
OUT_BATCH_REGVAL(R300_SU_REG_DEST, R300_RASTER_PIPE_SELECT_ALL);
END_BATCH();
- query->curr_offset += r300->num_z_pipes * sizeof(uint32_t);
+ query->curr_offset += r300->radeon.radeonScreen->num_gb_pipes * sizeof(uint32_t);
assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
query->emitted_begin = GL_FALSE;
}
@@ -287,14 +287,12 @@ static void rv530_emit_query_finish_single_z(radeonContextPtr radeon)
query->emitted_begin = GL_FALSE;
}
-#if 0
static void rv530_emit_query_finish_double_z(radeonContextPtr radeon)
{
- r300ContextPtr r300 = (r300ContextPtr)radeon;
BATCH_LOCALS(radeon);
struct radeon_query_object *query = radeon->query.current;
- BEGIN_BATCH_NO_AUTOSTATE(6);
+ BEGIN_BATCH_NO_AUTOSTATE(14);
OUT_BATCH_REGVAL(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0);
OUT_BATCH_REGSEQ(R300_ZB_ZPASS_ADDR, 1);
OUT_BATCH_RELOC(0, query->bo, query->curr_offset, 0, RADEON_GEM_DOMAIN_GTT, 0);
@@ -308,7 +306,6 @@ static void rv530_emit_query_finish_double_z(radeonContextPtr radeon)
assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
query->emitted_begin = GL_FALSE;
}
-#endif
static void r300_init_vtbl(radeonContextPtr radeon)
{
@@ -318,11 +315,12 @@ static void r300_init_vtbl(radeonContextPtr radeon)
radeon->vtbl.swtcl_flush = r300_swtcl_flush;
radeon->vtbl.pre_emit_atoms = r300_vtbl_pre_emit_atoms;
radeon->vtbl.fallback = r300_fallback;
- if (radeon->radeonScreen->chip_family == CHIP_FAMILY_RV530)
- /* single Z gives me correct results on my hw need to check if we ever need
- * double z */
- radeon->vtbl.emit_query_finish = rv530_emit_query_finish_single_z;
- else
+ if (radeon->radeonScreen->chip_family == CHIP_FAMILY_RV530) {
+ if (radeon->radeonScreen->num_z_pipes == 2)
+ radeon->vtbl.emit_query_finish = rv530_emit_query_finish_double_z;
+ else
+ radeon->vtbl.emit_query_finish = rv530_emit_query_finish_single_z;
+ } else
radeon->vtbl.emit_query_finish = r300_emit_query_finish;
}
@@ -396,10 +394,6 @@ static void r300InitConstValues(GLcontext *ctx, radeonScreenPtr screen)
ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0;
}
- if (r300->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV530)
- r300->num_z_pipes = 2;
- else
- r300->num_z_pipes = r300->radeon.radeonScreen->num_gb_pipes;
}
static void r300ParseOptions(r300ContextPtr r300, radeonScreenPtr screen)
@@ -436,7 +430,7 @@ static void r300InitGLExtensions(GLcontext *ctx)
if (r300->options.stencil_two_side_disabled)
_mesa_disable_extension(ctx, "GL_EXT_stencil_two_side");
- if (ctx->Mesa_DXTn && !r300->options.s3tc_force_enabled) {
+ if (r300->options.s3tc_force_enabled) {
_mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
_mesa_enable_extension(ctx, "GL_S3_s3tc");
} else if (r300->options.s3tc_force_disabled) {
diff --git a/src/mesa/drivers/dri/r300/r300_context.h b/src/mesa/drivers/dri/r300/r300_context.h
index 3202c96c2e..1dadcc0a69 100644
--- a/src/mesa/drivers/dri/r300/r300_context.h
+++ b/src/mesa/drivers/dri/r300/r300_context.h
@@ -529,7 +529,6 @@ struct r300_context {
uint32_t fallback;
DECLARE_RENDERINPUTS(render_inputs_bitset);
- int num_z_pipes;
};
#define R300_CONTEXT(ctx) ((r300ContextPtr)(ctx->DriverCtx))
diff --git a/src/mesa/drivers/dri/r600/r600_context.c b/src/mesa/drivers/dri/r600/r600_context.c
index 0b0c4f5049..6a066f3510 100644
--- a/src/mesa/drivers/dri/r600/r600_context.c
+++ b/src/mesa/drivers/dri/r600/r600_context.c
@@ -185,13 +185,7 @@ static void r600_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmes
static void r600_vtbl_pre_emit_atoms(radeonContextPtr radeon)
{
- context_t *context = (context_t *)radeon;
-
- /* always emit CB base to prevent
- * lock ups on some chips.
- */
- R600_STATECHANGE(context, cb_target);
- r700Start3D(context);
+ r700Start3D((context_t *)radeon);
}
static void r600_fallback(GLcontext *ctx, GLuint bit, GLboolean mode)
diff --git a/src/mesa/drivers/dri/r600/r700_chip.c b/src/mesa/drivers/dri/r600/r700_chip.c
index 3f11cf2c98..16f1a3df36 100644
--- a/src/mesa/drivers/dri/r600/r700_chip.c
+++ b/src/mesa/drivers/dri/r600/r700_chip.c
@@ -230,6 +230,9 @@ static void r700SendVTXState(GLcontext *ctx, struct radeon_state_atom *atom)
unsigned int i, j = 0;
BATCH_LOCALS(&context->radeon);
+ if (context->radeon.tcl.aos_count == 0)
+ return;
+
BEGIN_BATCH_NO_AUTOSTATE(6);
R600_OUT_BATCH(CP_PACKET3(R600_IT_SET_CTL_CONST, 1));
R600_OUT_BATCH(mmSQ_VTX_BASE_VTX_LOC - ASIC_CTL_CONST_BASE_INDEX);
@@ -989,11 +992,60 @@ static int check_always(GLcontext *ctx, struct radeon_state_atom *atom)
return atom->cmd_size;
}
+static int check_cb(GLcontext *ctx, struct radeon_state_atom *atom)
+{
+ context_t *context = R700_CONTEXT(ctx);
+ int count = 7;
+
+ if (context->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV770)
+ count += 11;
+
+ return count;
+}
+
+static int check_blnd(GLcontext *ctx, struct radeon_state_atom *atom)
+{
+ context_t *context = R700_CONTEXT(ctx);
+ R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
+ unsigned int ui;
+ int count = 3;
+
+ if (context->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV770)
+ count += 3;
+
+ if (context->radeon.radeonScreen->chip_family > CHIP_FAMILY_R600) {
+ for (ui = 0; ui < R700_MAX_RENDER_TARGETS; ui++) {
+ if (r700->render_target[ui].enabled)
+ count += 3;
+ }
+ }
+
+ return count;
+}
+
+static int check_ucp(GLcontext *ctx, struct radeon_state_atom *atom)
+{
+ context_t *context = R700_CONTEXT(ctx);
+ R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
+ int i;
+ int count = 0;
+
+ for (i = 0; i < R700_MAX_UCP; i++) {
+ if (r700->ucp[i].enabled)
+ count += 6;
+ }
+ return count;
+}
+
static int check_vtx(GLcontext *ctx, struct radeon_state_atom *atom)
{
context_t *context = R700_CONTEXT(ctx);
+ int count = context->radeon.tcl.aos_count * 18;
+
+ if (count)
+ count += 6;
- return context->radeon.tcl.aos_count * 18;
+ return count;
}
static int check_tx(GLcontext *ctx, struct radeon_state_atom *atom)
@@ -1014,16 +1066,24 @@ static int check_ps_consts(GLcontext *ctx, struct radeon_state_atom *atom)
{
context_t *context = R700_CONTEXT(ctx);
R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
+ int count = r700->ps.num_consts * 4;
- return 2 + (r700->ps.num_consts * 4);
+ if (count)
+ count += 2;
+
+ return count;
}
static int check_vs_consts(GLcontext *ctx, struct radeon_state_atom *atom)
{
context_t *context = R700_CONTEXT(ctx);
R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
+ int count = r700->vs.num_consts * 4;
+
+ if (count)
+ count += 2;
- return 2 + (r700->vs.num_consts * 4);
+ return count;
}
#define ALLOC_STATE( ATOM, CHK, SZ, EMIT ) \
@@ -1056,12 +1116,12 @@ void r600InitAtoms(context_t *context)
ALLOC_STATE(aa, always, 12, r700SendAAState);
ALLOC_STATE(cl, always, 12, r700SendCLState);
ALLOC_STATE(gb, always, 6, r700SendGBState);
- ALLOC_STATE(ucp, always, 36, r700SendUCPState);
+ ALLOC_STATE(ucp, ucp, (R700_MAX_UCP * 6), r700SendUCPState);
ALLOC_STATE(su, always, 9, r700SendSUState);
ALLOC_STATE(poly, always, 10, r700SendPolyState);
- ALLOC_STATE(cb, always, 18, r700SendCBState);
+ ALLOC_STATE(cb, cb, 18, r700SendCBState);
ALLOC_STATE(clrcmp, always, 6, r700SendCBCLRCMPState);
- ALLOC_STATE(blnd, always, 30, r700SendCBBlendState);
+ ALLOC_STATE(blnd, blnd, (6 + (R700_MAX_RENDER_TARGETS * 3)), r700SendCBBlendState);
ALLOC_STATE(blnd_clr, always, 6, r700SendCBBlendColorState);
ALLOC_STATE(cb_target, always, 25, r700SendRenderTargetState);
ALLOC_STATE(sx, always, 9, r700SendSXState);
@@ -1073,7 +1133,7 @@ void r600InitAtoms(context_t *context)
ALLOC_STATE(ps, always, 21, r700SendPSState);
ALLOC_STATE(vs_consts, vs_consts, (2 + (R700_MAX_DX9_CONSTS * 4)), r700SendVSConsts);
ALLOC_STATE(ps_consts, ps_consts, (2 + (R700_MAX_DX9_CONSTS * 4)), r700SendPSConsts);
- ALLOC_STATE(vtx, vtx, (VERT_ATTRIB_MAX * 18), r700SendVTXState);
+ ALLOC_STATE(vtx, vtx, (6 + (VERT_ATTRIB_MAX * 18)), r700SendVTXState);
ALLOC_STATE(tx, tx, (R700_TEXTURE_NUMBERUNITS * 20), r700SendTexState);
ALLOC_STATE(tx_smplr, tx, (R700_TEXTURE_NUMBERUNITS * 5), r700SendTexSamplerState);
ALLOC_STATE(tx_brdr_clr, tx, (R700_TEXTURE_NUMBERUNITS * 6), r700SendTexBorderColorState);
diff --git a/src/mesa/drivers/dri/r600/r700_fragprog.c b/src/mesa/drivers/dri/r600/r700_fragprog.c
index 098b420dfc..e4a6d4cedf 100644
--- a/src/mesa/drivers/dri/r600/r700_fragprog.c
+++ b/src/mesa/drivers/dri/r600/r700_fragprog.c
@@ -121,13 +121,13 @@ void Map_Fragment_Program(r700_AssemblerBase *pAsm,
pAsm->pR700Shader->depthIsExported = 1;
}
- pAsm->pucOutMask = (unsigned char*) MALLOC(pAsm->number_of_exports);
+ pAsm->pucOutMask = (unsigned char*) MALLOC(pAsm->number_of_exports);
for(ui=0; ui<pAsm->number_of_exports; ui++)
{
pAsm->pucOutMask[ui] = 0x0;
}
-
- pAsm->uFirstHelpReg = pAsm->number_used_registers;
+
+ pAsm->uFirstHelpReg = pAsm->number_used_registers;
}
GLboolean Find_Instruction_Dependencies_fp(struct r700_fragment_program *fp,
@@ -258,6 +258,19 @@ GLboolean r700TranslateFragmentShader(struct r700_fragment_program *fp,
return GL_TRUE;
}
+void r700SelectFragmentShader(GLcontext *ctx)
+{
+ context_t *context = R700_CONTEXT(ctx);
+ struct r700_fragment_program *fp = (struct r700_fragment_program *)
+ (ctx->FragmentProgram._Current);
+ if (context->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV770)
+ {
+ fp->r700AsmCode.bR6xx = 1;
+ }
+
+ r700TranslateFragmentShader(fp, &(fp->mesa_program));
+}
+
void * r700GetActiveFpShaderBo(GLcontext * ctx)
{
struct r700_fragment_program *fp = (struct r700_fragment_program *)
@@ -283,7 +296,7 @@ GLboolean r700SetupFragmentProgram(GLcontext * ctx)
if(GL_FALSE == fp->loaded)
{
- if(fp->r700Shader.bNeedsAssembly == GL_TRUE)
+ if(fp->r700Shader.bNeedsAssembly == GL_TRUE)
{
Assemble( &(fp->r700Shader) );
}
diff --git a/src/mesa/drivers/dri/r600/r700_fragprog.h b/src/mesa/drivers/dri/r600/r700_fragprog.h
index 9c7813e908..cbb108d212 100644
--- a/src/mesa/drivers/dri/r600/r700_fragprog.h
+++ b/src/mesa/drivers/dri/r600/r700_fragprog.h
@@ -49,13 +49,16 @@ struct r700_fragment_program
/* Internal */
void Map_Fragment_Program(r700_AssemblerBase *pAsm,
- struct gl_fragment_program *mesa_fp);
+ struct gl_fragment_program *mesa_fp);
GLboolean Find_Instruction_Dependencies_fp(struct r700_fragment_program *fp,
- struct gl_fragment_program *mesa_fp);
+ struct gl_fragment_program *mesa_fp);
+
+GLboolean r700TranslateFragmentShader(struct r700_fragment_program *fp,
+ struct gl_fragment_program *mesa_vp);
/* Interface */
-extern GLboolean r700TranslateFragmentShader(struct r700_fragment_program *fp,
- struct gl_fragment_program *mesa_vp);
+extern void r700SelectFragmentShader(GLcontext *ctx);
+
extern GLboolean r700SetupFragmentProgram(GLcontext * ctx);
extern void * r700GetActiveFpShaderBo(GLcontext * ctx);
diff --git a/src/mesa/drivers/dri/r600/r700_render.c b/src/mesa/drivers/dri/r600/r700_render.c
index 9b0b5443d6..d64e921bda 100644
--- a/src/mesa/drivers/dri/r600/r700_render.c
+++ b/src/mesa/drivers/dri/r600/r700_render.c
@@ -347,6 +347,13 @@ static GLboolean r700RunRender(GLcontext * ctx,
fprintf(stderr, "%s: cs begin at %d\n",
__func__, context->radeon.cmdbuf.cs->cdw);
+ /* always emit CB base to prevent
+ * lock ups on some chips.
+ */
+ R600_STATECHANGE(context, cb_target);
+ /* mark vtx as dirty since it changes per-draw */
+ R600_STATECHANGE(context, vtx);
+
r700UpdateShaders(ctx);
r700SetScissor(context);
r700SetupVertexProgram(ctx);
diff --git a/src/mesa/drivers/dri/r600/r700_state.c b/src/mesa/drivers/dri/r600/r700_state.c
index 15f40b2771..efa1daf2d3 100644
--- a/src/mesa/drivers/dri/r600/r700_state.c
+++ b/src/mesa/drivers/dri/r600/r700_state.c
@@ -71,65 +71,37 @@ void r700SetDefaultStates(context_t *context) //--------------------
void r700UpdateShaders (GLcontext * ctx) //----------------------------------
{
context_t *context = R700_CONTEXT(ctx);
-
GLvector4f dummy_attrib[_TNL_ATTRIB_MAX];
GLvector4f *temp_attrib[_TNL_ATTRIB_MAX];
int i;
- if (ctx->FragmentProgram._Current) {
- struct r700_fragment_program *fp = (struct r700_fragment_program *)
- (ctx->FragmentProgram._Current);
- if (context->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV770)
- {
- fp->r700AsmCode.bR6xx = 1;
- }
-
- if(GL_FALSE == fp->translated)
- {
- if( GL_FALSE == r700TranslateFragmentShader(fp, &(fp->mesa_program)) )
- {
- //return GL_TRUE;
- }
- }
+ /* should only happenen once, just after context is created */
+ /* TODO: shouldn't we fallback to sw here? */
+ if (!ctx->FragmentProgram._Current) {
+ _mesa_fprintf(stderr, "No ctx->FragmentProgram._Current!!\n");
+ return;
}
- if (context->radeon.NewGLState)
- {
- struct r700_vertex_program *vp;
- context->radeon.NewGLState = 0;
-
- for (i = _TNL_FIRST_MAT; i <= _TNL_LAST_MAT; i++)
- {
- /* mat states from state var not array for sw */
- dummy_attrib[i].stride = 0;
+ r700SelectFragmentShader(ctx);
- temp_attrib[i] = TNL_CONTEXT(ctx)->vb.AttribPtr[i];
- TNL_CONTEXT(ctx)->vb.AttribPtr[i] = &(dummy_attrib[i]);
- }
-
- _tnl_UpdateFixedFunctionProgram(ctx);
-
- for (i = _TNL_FIRST_MAT; i <= _TNL_LAST_MAT; i++)
- {
- TNL_CONTEXT(ctx)->vb.AttribPtr[i] = temp_attrib[i];
- }
+ if (context->radeon.NewGLState) {
+ for (i = _TNL_FIRST_MAT; i <= _TNL_LAST_MAT; i++) {
+ /* mat states from state var not array for sw */
+ dummy_attrib[i].stride = 0;
+ temp_attrib[i] = TNL_CONTEXT(ctx)->vb.AttribPtr[i];
+ TNL_CONTEXT(ctx)->vb.AttribPtr[i] = &(dummy_attrib[i]);
+ }
- r700SelectVertexShader(ctx);
- vp = (struct r700_vertex_program *)ctx->VertexProgram._Current;
+ _tnl_UpdateFixedFunctionProgram(ctx);
- if (vp->translated == GL_FALSE)
- {
- // TODO
- //fprintf(stderr, "Failing back to sw-tcl\n");
- //hw_tcl_on = future_hw_tcl_on = 0;
- //r300ResetHwState(rmesa);
- //
- r700UpdateStateParameters(ctx, _NEW_PROGRAM);
- return;
- }
+ for (i = _TNL_FIRST_MAT; i <= _TNL_LAST_MAT; i++) {
+ TNL_CONTEXT(ctx)->vb.AttribPtr[i] = temp_attrib[i];
+ }
}
- r700UpdateStateParameters(ctx, _NEW_PROGRAM);
+ r700SelectVertexShader(ctx);
+ r700UpdateStateParameters(ctx, _NEW_PROGRAM | _NEW_PROGRAM_CONSTANTS);
+ context->radeon.NewGLState = 0;
}
/*
@@ -176,45 +148,25 @@ void r700UpdateDrawBuffer(GLcontext * ctx) /* TODO */ //---------------------
r700SetDepthTarget(context);
}
-static void r700FetchStateParameter(GLcontext * ctx,
- const gl_state_index state[STATE_LENGTH],
- GLfloat * value)
-{
- /* TODO */
-}
-
void r700UpdateStateParameters(GLcontext * ctx, GLuint new_state) //--------------------
{
- struct r700_fragment_program *fp;
+ struct r700_fragment_program *fp =
+ (struct r700_fragment_program *)ctx->FragmentProgram._Current;
struct gl_program_parameter_list *paramList;
- GLuint i;
- if (!(new_state & (_NEW_BUFFERS | _NEW_PROGRAM)))
+ if (!(new_state & (_NEW_BUFFERS | _NEW_PROGRAM | _NEW_PROGRAM_CONSTANTS)))
return;
- fp = (struct r700_fragment_program *)ctx->FragmentProgram._Current;
- if (!fp)
- {
+ if (!ctx->FragmentProgram._Current || !fp)
return;
- }
- paramList = fp->mesa_program.Base.Parameters;
+ paramList = ctx->FragmentProgram._Current->Base.Parameters;
if (!paramList)
- {
return;
- }
- for (i = 0; i < paramList->NumParameters; i++)
- {
- if (paramList->Parameters[i].Type == PROGRAM_STATE_VAR)
- {
- r700FetchStateParameter(ctx,
- paramList->Parameters[i].
- StateIndexes,
- paramList->ParameterValues[i]);
- }
- }
+ _mesa_load_state_parameters(ctx, paramList);
+
}
/**
diff --git a/src/mesa/drivers/dri/r600/r700_vertprog.c b/src/mesa/drivers/dri/r600/r700_vertprog.c
index 550594e9df..f8f862b33a 100644
--- a/src/mesa/drivers/dri/r600/r700_vertprog.c
+++ b/src/mesa/drivers/dri/r600/r700_vertprog.c
@@ -296,16 +296,16 @@ void r700SelectVertexShader(GLcontext *ctx)
context_t *context = R700_CONTEXT(ctx);
struct r700_vertex_program *vpc
= (struct r700_vertex_program *)ctx->VertexProgram._Current;
+ TNLcontext *tnl = TNL_CONTEXT(ctx);
+ struct vertex_buffer *vb = &tnl->vb;
+ unsigned int unBit;
+ unsigned int i;
+
if (context->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV770)
{
vpc->r700AsmCode.bR6xx = 1;
}
-
- TNLcontext *tnl = TNL_CONTEXT(ctx);
- struct vertex_buffer *vb = &tnl->vb;
- unsigned int unBit;
- unsigned int i;
for(i=0; i<VERT_ATTRIB_MAX; i++)
{
unBit = 1 << i;
@@ -317,11 +317,9 @@ void r700SelectVertexShader(GLcontext *ctx)
}
}
- if(GL_FALSE == vpc->translated)
- {
- r700TranslateVertexShader(vpc,
- &(vpc->mesa_program) );
- }
+ if(GL_FALSE == vpc->translated) {
+ r700TranslateVertexShader(vpc, &(vpc->mesa_program) );
+ }
}
void * r700GetActiveVpShaderBo(GLcontext * ctx)
@@ -345,17 +343,17 @@ GLboolean r700SetupVertexProgram(GLcontext * ctx)
if(GL_FALSE == vp->loaded)
{
- if(vp->r700Shader.bNeedsAssembly == GL_TRUE)
+ if(vp->r700Shader.bNeedsAssembly == GL_TRUE)
{
Assemble( &(vp->r700Shader) );
}
/* Load vp to gpu */
- r600EmitShader(ctx,
- &(vp->shaderbo),
+ r600EmitShader(ctx,
+ &(vp->shaderbo),
(GLvoid *)(vp->r700Shader.pProgram),
vp->r700Shader.uShaderBinaryDWORDSize,
- "VS");
+ "VS");
vp->loaded = GL_TRUE;
}
diff --git a/src/mesa/drivers/dri/r600/r700_vertprog.h b/src/mesa/drivers/dri/r600/r700_vertprog.h
index 6a9726a3d0..4c3b7ee453 100644
--- a/src/mesa/drivers/dri/r600/r700_vertprog.h
+++ b/src/mesa/drivers/dri/r600/r700_vertprog.h
@@ -62,23 +62,23 @@ struct r700_vertex_program
//Internal
unsigned int Map_Vertex_Output(r700_AssemblerBase *pAsm,
- struct gl_vertex_program *mesa_vp,
- unsigned int unStart);
+ struct gl_vertex_program *mesa_vp,
+ unsigned int unStart);
unsigned int Map_Vertex_Input(r700_AssemblerBase *pAsm,
- struct gl_vertex_program *mesa_vp,
- unsigned int unStart);
+ struct gl_vertex_program *mesa_vp,
+ unsigned int unStart);
GLboolean Process_Vertex_Program_Vfetch_Instructions(
- struct r700_vertex_program *vp,
- struct gl_vertex_program *mesa_vp);
+ struct r700_vertex_program *vp,
+ struct gl_vertex_program *mesa_vp);
void Map_Vertex_Program(struct r700_vertex_program *vp,
- struct gl_vertex_program *mesa_vp);
+ struct gl_vertex_program *mesa_vp);
GLboolean Find_Instruction_Dependencies_vp(struct r700_vertex_program *vp,
- struct gl_vertex_program *mesa_vp);
+ struct gl_vertex_program *mesa_vp);
-/* Interface */
-extern GLboolean r700TranslateVertexShader(struct r700_vertex_program *vp,
- struct gl_vertex_program *mesa_vp);
+GLboolean r700TranslateVertexShader(struct r700_vertex_program *vp,
+ struct gl_vertex_program *mesa_vp);
+/* Interface */
extern void r700SelectVertexShader(GLcontext *ctx);
extern GLboolean r700SetupVertexProgram(GLcontext * ctx);
diff --git a/src/mesa/drivers/dri/radeon/radeon_bocs_wrapper.h b/src/mesa/drivers/dri/radeon/radeon_bocs_wrapper.h
index a42870f4a9..4520a7d7d4 100644
--- a/src/mesa/drivers/dri/radeon/radeon_bocs_wrapper.h
+++ b/src/mesa/drivers/dri/radeon/radeon_bocs_wrapper.h
@@ -45,6 +45,10 @@ struct drm_radeon_info {
#define RADEON_PARAM_DEVICE_ID 16
#endif
+#ifndef RADEON_PARAM_NUM_Z_PIPES
+#define RADEON_PARAM_NUM_Z_PIPES 17
+#endif
+
#ifndef RADEON_INFO_DEVICE_ID
#define RADEON_INFO_DEVICE_ID 0
#endif
@@ -52,6 +56,10 @@ struct drm_radeon_info {
#define RADEON_INFO_NUM_GB_PIPES 0
#endif
+#ifndef RADEON_INFO_NUM_Z_PIPES
+#define RADEON_INFO_NUM_Z_PIPES 0
+#endif
+
#ifndef DRM_RADEON_INFO
#define DRM_RADEON_INFO 0x1
#endif
diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c
index 3d7c9708e1..6f0cc08770 100644
--- a/src/mesa/drivers/dri/radeon/radeon_fbo.c
+++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c
@@ -178,12 +178,13 @@ radeon_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
width, height);
}
else {
- uint32_t size = width * height * cpp;
+ uint32_t size;
uint32_t pitch = ((cpp * width + 63) & ~63) / cpp;
fprintf(stderr,"Allocating %d x %d radeon RBO (pitch %d)\n", width,
height, pitch);
+ size = pitch * height * cpp;
rrb->pitch = pitch * cpp;
rrb->cpp = cpp;
rrb->bo = radeon_bo_open(radeon->radeonScreen->bom,
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index 10afe527d3..bdcfd10c06 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -267,6 +267,9 @@ radeonGetParam(__DRIscreenPrivate *sPriv, int param, void *value)
case RADEON_PARAM_NUM_GB_PIPES:
info.request = RADEON_INFO_NUM_GB_PIPES;
break;
+ case RADEON_PARAM_NUM_Z_PIPES:
+ info.request = RADEON_INFO_NUM_Z_PIPES;
+ break;
default:
return -EINVAL;
}
@@ -1171,6 +1174,15 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
default:
break;
}
+
+ if ( sPriv->drm_version.minor >= 31 ) {
+ ret = radeonGetParam(sPriv, RADEON_PARAM_NUM_Z_PIPES, &temp);
+ if (ret)
+ screen->num_z_pipes = 2;
+ else
+ screen->num_z_pipes = temp;
+ } else
+ screen->num_z_pipes = 2;
}
if ( sPriv->drm_version.minor >= 10 ) {
@@ -1372,6 +1384,12 @@ radeonCreateScreen2(__DRIscreenPrivate *sPriv)
break;
}
+ ret = radeonGetParam(sPriv, RADEON_PARAM_NUM_Z_PIPES, &temp);
+ if (ret)
+ screen->num_z_pipes = 2;
+ else
+ screen->num_z_pipes = temp;
+
}
i = 0;
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.h b/src/mesa/drivers/dri/radeon/radeon_screen.h
index f0dd46b0b1..15744e8828 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.h
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.h
@@ -108,6 +108,7 @@ typedef struct radeon_screen {
const __DRIextension *extensions[16];
int num_gb_pipes;
+ int num_z_pipes;
int kernel_mm;
drm_radeon_sarea_t *sarea; /* Private SAREA data */
struct radeon_bo_manager *bom;
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-05 11:56:48 +0000