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-rw-r--r--src/mesa/drivers/dri/i965/gen6_cc.c1
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.c2
-rw-r--r--src/mesa/drivers/dri/r600/r700_render.c18
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_dma.c16
4 files changed, 30 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/i965/gen6_cc.c b/src/mesa/drivers/dri/i965/gen6_cc.c
index 65e16e70c7..42b41f3210 100644
--- a/src/mesa/drivers/dri/i965/gen6_cc.c
+++ b/src/mesa/drivers/dri/i965/gen6_cc.c
@@ -30,6 +30,7 @@
#include "brw_defines.h"
#include "brw_util.h"
#include "intel_batchbuffer.h"
+#include "main/macros.h"
struct brw_blend_state_key {
GLboolean color_blend, alpha_enabled;
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 767ad8c9d2..ec379a77ac 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -891,7 +891,7 @@ intelMakeCurrent(__DRIcontext * driContextPriv,
intel->driDrawable = driDrawPriv;
driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1;
driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1;
- intel_prepare_render(&intel->ctx);
+ intel_prepare_render(intel);
}
else {
_mesa_make_current(NULL, NULL, NULL);
diff --git a/src/mesa/drivers/dri/r600/r700_render.c b/src/mesa/drivers/dri/r600/r700_render.c
index 1d7a94cbb2..1929b7cc12 100644
--- a/src/mesa/drivers/dri/r600/r700_render.c
+++ b/src/mesa/drivers/dri/r600/r700_render.c
@@ -829,11 +829,10 @@ static void r700SetupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer
#if MESA_BIG_ENDIAN
if (mesa_ind_buf->type == GL_UNSIGNED_INT)
- {
#else
if (mesa_ind_buf->type != GL_UNSIGNED_BYTE)
- {
#endif
+ {
const GLvoid *src_ptr;
GLvoid *dst_ptr;
GLboolean mapped_named_bo = GL_FALSE;
@@ -872,6 +871,14 @@ static void r700SetupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer
}
}
+static GLboolean check_fallbacks(GLcontext *ctx)
+{
+ if (ctx->RenderMode != GL_RENDER)
+ return GL_TRUE;
+
+ return GL_FALSE;
+}
+
static GLboolean r700TryDrawPrims(GLcontext *ctx,
const struct gl_client_array *arrays[],
const struct _mesa_prim *prim,
@@ -888,6 +895,9 @@ static GLboolean r700TryDrawPrims(GLcontext *ctx,
if (ctx->NewState)
_mesa_update_state( ctx );
+ if (check_fallbacks(ctx))
+ return GL_FALSE;
+
_tnl_UpdateFixedFunctionProgram(ctx);
r700SetVertexFormat(ctx, arrays, max_index + 1);
/* shaders need to be updated before buffers are validated */
@@ -983,8 +993,10 @@ static void r700DrawPrims(GLcontext *ctx,
retval = r700TryDrawPrims(ctx, arrays, prim, nr_prims, ib, min_index, max_index);
/* If failed run tnl pipeline - it should take care of fallbacks */
- if (!retval)
+ if (!retval) {
+ _swsetup_Wakeup(ctx);
_tnl_draw_prims(ctx, arrays, prim, nr_prims, ib, min_index, max_index);
+ }
}
void r700InitDraw(GLcontext *ctx)
diff --git a/src/mesa/drivers/dri/radeon/radeon_dma.c b/src/mesa/drivers/dri/radeon/radeon_dma.c
index d31e4e47dd..22499bc38d 100644
--- a/src/mesa/drivers/dri/radeon/radeon_dma.c
+++ b/src/mesa/drivers/dri/radeon/radeon_dma.c
@@ -184,6 +184,8 @@ void radeonRefillCurrentDmaRegion(radeonContextPtr rmesa, int size)
radeon_print(RADEON_DMA, RADEON_NORMAL, "%s size %d minimum_size %d\n",
__FUNCTION__, size, rmesa->dma.minimum_size);
+ if (!is_empty_list(&rmesa->dma.reserved))
+ radeon_bo_unmap(first_elem(&rmesa->dma.reserved)->bo);
if (is_empty_list(&rmesa->dma.free)
|| last_elem(&rmesa->dma.free)->bo->size < size) {
@@ -211,7 +213,7 @@ again_alloc:
rmesa->dma.current_used = 0;
rmesa->dma.current_vertexptr = 0;
-
+
if (radeon_cs_space_check_with_bo(rmesa->cmdbuf.cs,
first_elem(&rmesa->dma.reserved)->bo,
RADEON_GEM_DOMAIN_GTT, 0))
@@ -221,6 +223,7 @@ again_alloc:
/* Cmd buff have been flushed in radeon_revalidate_bos */
goto again_alloc;
}
+ radeon_bo_map(first_elem(&rmesa->dma.reserved)->bo, 1);
}
/* Allocates a region from rmesa->dma.current. If there isn't enough
@@ -332,6 +335,10 @@ void radeonReleaseDmaRegions(radeonContextPtr rmesa)
/* request updated cs processing information from kernel */
legacy_track_pending(rmesa->radeonScreen->bom, 0);
}
+
+ if (!is_empty_list(&rmesa->dma.reserved))
+ radeon_bo_unmap(first_elem(&rmesa->dma.reserved)->bo);
+
/* move waiting bos to free list.
wait list provides gpu time to handle data before reuse */
foreach_s(dma_bo, temp, &rmesa->dma.wait) {
@@ -349,8 +356,11 @@ void radeonReleaseDmaRegions(radeonContextPtr rmesa)
FREE(dma_bo);
continue;
}
- if (!radeon_bo_is_idle(dma_bo->bo))
+ if (!radeon_bo_is_idle(dma_bo->bo)) {
+ if (rmesa->radeonScreen->driScreen->dri2.enabled)
+ break;
continue;
+ }
remove_from_list(dma_bo);
dma_bo->expire_counter = expire_at;
insert_at_tail(&rmesa->dma.free, dma_bo);
@@ -388,7 +398,7 @@ void rcommon_flush_last_swtcl_prim( GLcontext *ctx )
{
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
struct radeon_dma *dma = &rmesa->dma;
-
+
if (RADEON_DEBUG & RADEON_IOCTL)
fprintf(stderr, "%s\n", __FUNCTION__);
dma->flush = NULL;