diff options
Diffstat (limited to 'src/mesa/drivers/dri')
145 files changed, 7096 insertions, 7905 deletions
diff --git a/src/mesa/drivers/dri/Makefile b/src/mesa/drivers/dri/Makefile index 1db878bab7..f466ce6c3c 100644 --- a/src/mesa/drivers/dri/Makefile +++ b/src/mesa/drivers/dri/Makefile @@ -14,21 +14,25 @@ $(TOP)/$(LIB_DIR): subdirs: - echo $(DRI_DIRS) @for dir in $(DRI_DIRS) ; do \ - echo $$dir ; \ - (cd $$dir && $(MAKE)) || exit 1; \ + if [ -d $$dir ] ; then \ + (cd $$dir && $(MAKE)) || exit 1 ; \ + fi \ done install: @for dir in $(DRI_DIRS) ; do \ - (cd $$dir && $(MAKE) install) || exit 1; \ + if [ -d $$dir ] ; then \ + (cd $$dir && $(MAKE) install) || exit 1 ; \ + fi \ done clean: @for dir in $(DRI_DIRS) ; do \ - (cd $$dir && $(MAKE) clean) ; \ + if [ -d $$dir ] ; then \ + (cd $$dir && $(MAKE) clean) ; \ + fi \ done -rm -f common/*.o diff --git a/src/mesa/drivers/dri/Makefile.template b/src/mesa/drivers/dri/Makefile.template index 5261a4b55d..6f2314ee8c 100644 --- a/src/mesa/drivers/dri/Makefile.template +++ b/src/mesa/drivers/dri/Makefile.template @@ -25,11 +25,13 @@ OBJECTS = $(C_SOURCES:.c=.o) \ $(ASM_SOURCES:.S=.o) else +# miniglx WINOBJ= WINLIB=-L$(MESA)/src/glx/mini MINIGLX_INCLUDES = -I$(TOP)/src/glx/mini INCLUDES = $(MINIGLX_INCLUDES) \ - $(SHARED_INCLUDES) + $(SHARED_INCLUDES) \ + $(PCIACCESS_CFLAGS) OBJECTS = $(C_SOURCES:.c=.o) \ $(MINIGLX_SOURCES:.c=.o) \ @@ -54,7 +56,8 @@ SHARED_INCLUDES = \ -I$(TOP)/src/mesa/swrast_setup \ -I$(TOP)/src/egl/main \ -I$(TOP)/src/egl/drivers/dri \ - `pkg-config --cflags libdrm` + $(LIBDRM_CFLAGS) + ##### RULES ##### @@ -70,11 +73,6 @@ SHARED_INCLUDES = \ default: depend symlinks $(LIBNAME) $(TOP)/$(LIB_DIR)/$(LIBNAME) -#$(TOP)/$(LIB_DIR)/$(LIBNAME): $(OBJECTS) $(MESA_MODULES) $(WINOBJ) Makefile -# @echo BUILDING FOR: $(WINDOW_SYSTEM) -# $(TOP)/bin/mklib -o $(LIBNAME) -noprefix -install $(TOP)/$(LIB_DIR) \ -# $(WINLIB) $(LIB_DEPS) $(WINOBJ) $(MESA_MODULES) $(OBJECTS) - $(LIBNAME): $(OBJECTS) $(MESA_MODULES) $(WINOBJ) Makefile $(TOP)/src/mesa/drivers/dri/Makefile.template $(TOP)/bin/mklib -noprefix -o $@ \ $(OBJECTS) $(MESA_MODULES) $(WINOBJ) $(DRI_LIB_DEPS) @@ -84,9 +82,6 @@ $(TOP)/$(LIB_DIR)/$(LIBNAME): $(LIBNAME) $(INSTALL) $(LIBNAME) $(TOP)/$(LIB_DIR) - -# Run 'make depend' to update the dependencies if you change -# what's included by any source file. depend: $(C_SOURCES) $(ASM_SOURCES) $(SYMLINKS) touch depend $(MKDEP) $(MKDEP_OPTIONS) $(DRIVER_DEFINES) $(INCLUDES) $(C_SOURCES) \ @@ -103,8 +98,10 @@ clean: -rm -f *.o */*.o *~ *.so *~ server/*.o $(SYMLINKS) -rm -f depend depend.bak + install: $(LIBNAME) $(INSTALL) -d $(DRI_DRIVER_INSTALL_DIR) $(INSTALL) -m 755 $(LIBNAME) $(DRI_DRIVER_INSTALL_DIR) + include depend diff --git a/src/mesa/drivers/dri/common/dri_bufmgr.c b/src/mesa/drivers/dri/common/dri_bufmgr.c index 65d6545965..eaa4fb09c7 100644 --- a/src/mesa/drivers/dri/common/dri_bufmgr.c +++ b/src/mesa/drivers/dri/common/dri_bufmgr.c @@ -190,11 +190,16 @@ driBOKernel(struct _DriBufferObject *buf) void driBOWaitIdle(struct _DriBufferObject *buf, int lazy) { - assert(buf->private != NULL); + struct _DriBufferPool *pool; + void *priv; _glthread_LOCK_MUTEX(buf->mutex); - BM_CKFATAL(buf->pool->waitIdle(buf->pool, buf->private, lazy)); + pool = buf->pool; + priv = buf->private; _glthread_UNLOCK_MUTEX(buf->mutex); + + assert(priv != NULL); + BM_CKFATAL(buf->pool->waitIdle(pool, priv, lazy)); } void * @@ -296,7 +301,8 @@ driBOData(struct _DriBufferObject *buf, pool->destroy(pool, buf->private); if (!flags) flags = buf->flags; - buf->private = pool->create(pool, size, flags, 0, buf->alignment); + buf->private = pool->create(pool, size, flags, DRM_BO_HINT_DONT_FENCE, + buf->alignment); if (!buf->private) BM_CKFATAL(-ENOMEM); BM_CKFATAL(pool->map(pool, buf->private, diff --git a/src/mesa/drivers/dri/common/dri_drmpool.c b/src/mesa/drivers/dri/common/dri_drmpool.c index b5b324be50..878a148b39 100644 --- a/src/mesa/drivers/dri/common/dri_drmpool.c +++ b/src/mesa/drivers/dri/common/dri_drmpool.c @@ -185,7 +185,7 @@ pool_setstatic(struct _DriBufferPool *pool, unsigned long offset, return NULL; ret = drmBOCreate(pool->fd, offset, size, 0, NULL, drm_bo_type_fake, - flags, 0, buf); + flags, DRM_BO_HINT_DONT_FENCE, buf); if (ret) { free(buf); diff --git a/src/mesa/drivers/dri/common/dri_util.c b/src/mesa/drivers/dri/common/dri_util.c index 07ac4c7cd5..dd52f7e915 100644 --- a/src/mesa/drivers/dri/common/dri_util.c +++ b/src/mesa/drivers/dri/common/dri_util.c @@ -995,6 +995,9 @@ __driUtilCreateNewScreen(__DRInativeDisplay *dpy, int scrn, __DRIscreen *psc, psc->getMSC = driGetMSC; psc->createNewContext = driCreateNewContext; + if (internal_api_version >= 20070121) + psc->setTexOffset = psp->DriverAPI.setTexOffset; + if ( (psp->DriverAPI.InitDriver != NULL) && !(*psp->DriverAPI.InitDriver)(psp) ) { _mesa_free( psp ); diff --git a/src/mesa/drivers/dri/common/dri_util.h b/src/mesa/drivers/dri/common/dri_util.h index 8639535abb..539d28d114 100644 --- a/src/mesa/drivers/dri/common/dri_util.h +++ b/src/mesa/drivers/dri/common/dri_util.h @@ -189,6 +189,12 @@ struct __DriverAPIRec { /*@}*/ void (*CopySubBuffer)(__DRIdrawablePrivate *driDrawPriv, int x, int y, int w, int h); + + /** + * See corresponding field in \c __DRIscreenRec. + */ + void (*setTexOffset)(__DRIcontext *pDRICtx, GLint texname, + unsigned long long offset, GLint depth, GLuint pitch); }; diff --git a/src/mesa/drivers/dri/common/extension_helper.h b/src/mesa/drivers/dri/common/extension_helper.h index c798496425..bf103a3931 100644 --- a/src/mesa/drivers/dri/common/extension_helper.h +++ b/src/mesa/drivers/dri/common/extension_helper.h @@ -440,6 +440,13 @@ static const char Color4ubVertex3fvSUN_names[] = ""; #endif +#if defined(need_GL_EXT_texture_array) +static const char FramebufferTextureLayerEXT_names[] = + "iiiii\0" /* Parameter signature */ + "glFramebufferTextureLayerEXT\0" + ""; +#endif + #if defined(need_GL_SGIX_list_priority) static const char GetListParameterivSGIX_names[] = "iip\0" /* Parameter signature */ @@ -1471,9 +1478,10 @@ static const char ImageTransformParameterfvHP_names[] = ""; #endif -#if defined(need_GL_ARB_vertex_program) +#if defined(need_GL_VERSION_2_0) || defined(need_GL_ARB_vertex_program) static const char VertexAttrib4ivARB_names[] = "ip\0" /* Parameter signature */ + "glVertexAttrib4iv\0" "glVertexAttrib4ivARB\0" ""; #endif @@ -1579,9 +1587,10 @@ static const char PixelTransformParameterfvEXT_names[] = ""; #endif -#if defined(need_GL_ARB_vertex_program) +#if defined(need_GL_VERSION_2_0) || defined(need_GL_ARB_vertex_program) static const char VertexAttrib4bvARB_names[] = "ip\0" /* Parameter signature */ + "glVertexAttrib4bv\0" "glVertexAttrib4bvARB\0" ""; #endif @@ -2384,9 +2393,10 @@ static const char GetAttribLocationARB_names[] = ""; #endif -#if defined(need_GL_ARB_vertex_program) +#if defined(need_GL_VERSION_2_0) || defined(need_GL_ARB_vertex_program) static const char VertexAttrib4ubvARB_names[] = "ip\0" /* Parameter signature */ + "glVertexAttrib4ubv\0" "glVertexAttrib4ubvARB\0" ""; #endif @@ -2903,9 +2913,10 @@ static const char ReplacementCodeuiColor4ubVertex3fSUN_names[] = ""; #endif -#if defined(need_GL_ARB_vertex_program) +#if defined(need_GL_VERSION_2_0) || defined(need_GL_ARB_vertex_program) static const char VertexAttrib4usvARB_names[] = "ip\0" /* Parameter signature */ + "glVertexAttrib4usv\0" "glVertexAttrib4usvARB\0" ""; #endif @@ -4386,9 +4397,10 @@ static const char WindowPos4iMESA_names[] = ""; #endif -#if defined(need_GL_ARB_vertex_program) +#if defined(need_GL_VERSION_2_0) || defined(need_GL_ARB_vertex_program) static const char VertexAttrib4uivARB_names[] = "ip\0" /* Parameter signature */ + "glVertexAttrib4uiv\0" "glVertexAttrib4uivARB\0" ""; #endif @@ -5479,6 +5491,13 @@ static const struct dri_extension_function GL_EXT_texture3D_functions[] = { }; #endif +#if defined(need_GL_EXT_texture_array) +static const struct dri_extension_function GL_EXT_texture_array_functions[] = { + { FramebufferTextureLayerEXT_names, FramebufferTextureLayerEXT_remap_index, -1 }, + { NULL, 0, 0 } +}; +#endif + #if defined(need_GL_EXT_texture_object) static const struct dri_extension_function GL_EXT_texture_object_functions[] = { { PrioritizeTextures_names, -1, 331 }, @@ -6243,6 +6262,8 @@ static const struct dri_extension_function GL_VERSION_2_0_functions[] = { { GetVertexAttribivARB_names, GetVertexAttribivARB_remap_index, -1 }, { CreateProgram_names, CreateProgram_remap_index, -1 }, { StencilFuncSeparate_names, StencilFuncSeparate_remap_index, -1 }, + { VertexAttrib4ivARB_names, VertexAttrib4ivARB_remap_index, -1 }, + { VertexAttrib4bvARB_names, VertexAttrib4bvARB_remap_index, -1 }, { VertexAttrib3dARB_names, VertexAttrib3dARB_remap_index, -1 }, { VertexAttrib4fARB_names, VertexAttrib4fARB_remap_index, -1 }, { VertexAttrib4fvARB_names, VertexAttrib4fvARB_remap_index, -1 }, @@ -6256,6 +6277,7 @@ static const struct dri_extension_function GL_VERSION_2_0_functions[] = { { VertexAttrib1dvARB_names, VertexAttrib1dvARB_remap_index, -1 }, { GetVertexAttribfvARB_names, GetVertexAttribfvARB_remap_index, -1 }, { GetAttribLocationARB_names, GetAttribLocationARB_remap_index, -1 }, + { VertexAttrib4ubvARB_names, VertexAttrib4ubvARB_remap_index, -1 }, { Uniform3ivARB_names, Uniform3ivARB_remap_index, -1 }, { VertexAttrib4sARB_names, VertexAttrib4sARB_remap_index, -1 }, { VertexAttrib2dvARB_names, VertexAttrib2dvARB_remap_index, -1 }, @@ -6268,6 +6290,7 @@ static const struct dri_extension_function GL_VERSION_2_0_functions[] = { { VertexAttrib4NuivARB_names, VertexAttrib4NuivARB_remap_index, -1 }, { Uniform4fARB_names, Uniform4fARB_remap_index, -1 }, { VertexAttrib1dARB_names, VertexAttrib1dARB_remap_index, -1 }, + { VertexAttrib4usvARB_names, VertexAttrib4usvARB_remap_index, -1 }, { LinkProgramARB_names, LinkProgramARB_remap_index, -1 }, { ShaderSourceARB_names, ShaderSourceARB_remap_index, -1 }, { VertexAttrib3svARB_names, VertexAttrib3svARB_remap_index, -1 }, @@ -6297,6 +6320,7 @@ static const struct dri_extension_function GL_VERSION_2_0_functions[] = { { DrawBuffersARB_names, DrawBuffersARB_remap_index, -1 }, { Uniform1fvARB_names, Uniform1fvARB_remap_index, -1 }, { EnableVertexAttribArrayARB_names, EnableVertexAttribArrayARB_remap_index, -1 }, + { VertexAttrib4uivARB_names, VertexAttrib4uivARB_remap_index, -1 }, { VertexAttrib4svARB_names, VertexAttrib4svARB_remap_index, -1 }, { GetShaderiv_names, GetShaderiv_remap_index, -1 }, { VertexAttrib2svARB_names, VertexAttrib2svARB_remap_index, -1 }, diff --git a/src/mesa/drivers/dri/ffb/ffb_tris.c b/src/mesa/drivers/dri/ffb/ffb_tris.c index ca0e514dc0..9fae8c8283 100644 --- a/src/mesa/drivers/dri/ffb/ffb_tris.c +++ b/src/mesa/drivers/dri/ffb/ffb_tris.c @@ -138,10 +138,10 @@ static void ffb_translate_vertex(GLcontext *ctx, const ffb_vertex *src, const GLfloat ty = m[13]; const GLfloat tz = m[14]; - dst->win[0] = sx * src->x + tx; - dst->win[1] = sy * src->y + ty; - dst->win[2] = sz * src->z + tz; - dst->win[3] = 1.0; + dst->attrib[FRAG_ATTRIB_WPOS][0] = sx * src->x + tx; + dst->attrib[FRAG_ATTRIB_WPOS][1] = sy * src->y + ty; + dst->attrib[FRAG_ATTRIB_WPOS][2] = sz * src->z + tz; + dst->attrib[FRAG_ATTRIB_WPOS][3] = 1.0; dst->color[0] = FFB_UBYTE_FROM_COLOR(src->color[0].red); dst->color[1] = FFB_UBYTE_FROM_COLOR(src->color[0].green); diff --git a/src/mesa/drivers/dri/i915/i830_state.c b/src/mesa/drivers/dri/i915/i830_state.c index 9512519010..f7980201f9 100644 --- a/src/mesa/drivers/dri/i915/i830_state.c +++ b/src/mesa/drivers/dri/i915/i830_state.c @@ -34,6 +34,8 @@ #include "texmem.h" +#include "drivers/common/driverfuncs.h" + #include "intel_screen.h" #include "intel_batchbuffer.h" @@ -1074,7 +1076,7 @@ void i830InitState( i830ContextPtr i830 ) i830_init_packets( i830 ); - intelInitState( ctx ); + _mesa_init_driver_state(ctx); memcpy( &i830->initial, &i830->state, sizeof(i830->state) ); @@ -1085,8 +1087,3 @@ void i830InitState( i830ContextPtr i830 ) I830_UPLOAD_CTX | I830_UPLOAD_BUFFERS); } - - - - - diff --git a/src/mesa/drivers/dri/i915/i915_fragprog.c b/src/mesa/drivers/dri/i915/i915_fragprog.c index a28c8bb6fc..702b878828 100644 --- a/src/mesa/drivers/dri/i915/i915_fragprog.c +++ b/src/mesa/drivers/dri/i915/i915_fragprog.c @@ -857,11 +857,6 @@ static void i915BindProgram( GLcontext *ctx, assert(p->on_hardware == 0); assert(p->params_uptodate == 0); - /* Hack: make sure fog is correctly enabled according to this - * fragment program's fog options. - */ - ctx->Driver.Enable( ctx, GL_FRAGMENT_PROGRAM_ARB, - ctx->FragmentProgram.Enabled ); } } @@ -935,9 +930,6 @@ static void i915ProgramStringNotify( GLcontext *ctx, /* Hack: make sure fog is correctly enabled according to this * fragment program's fog options. */ - ctx->Driver.Enable( ctx, GL_FRAGMENT_PROGRAM_ARB, - ctx->FragmentProgram.Enabled ); - if (p->FragProg.FogOption) { /* add extra instructions to do fog, then turn off FogOption field */ _mesa_append_fog_code(ctx, &p->FragProg); diff --git a/src/mesa/drivers/dri/i915/i915_state.c b/src/mesa/drivers/dri/i915/i915_state.c index 5e00e6597b..1c4ec74755 100644 --- a/src/mesa/drivers/dri/i915/i915_state.c +++ b/src/mesa/drivers/dri/i915/i915_state.c @@ -36,6 +36,8 @@ #include "texmem.h" +#include "drivers/common/driverfuncs.h" + #include "intel_screen.h" #include "intel_batchbuffer.h" @@ -541,17 +543,19 @@ void i915_update_fog( GLcontext *ctx ) else { enabled = ctx->Fog.Enabled; mode = ctx->Fog.Mode; - - try_pixel_fog = (ctx->Fog.FogCoordinateSource == GL_FRAGMENT_DEPTH_EXT && - ctx->Hint.Fog == GL_NICEST && - 0); /* XXX - DISABLE -- Need ortho fallback */ +#if 0 + /* XXX - DISABLED -- Need ortho fallback */ + try_pixel_fog = (ctx->Fog.FogCoordinateSource == GL_FRAGMENT_DEPTH_EXT + &&ctx->Hint.Fog == GL_NICEST); +#else + try_pixel_fog = 0; +#endif } if (!enabled) { i915->vertex_fog = I915_FOG_NONE; } else if (try_pixel_fog) { - I915_STATECHANGE(i915, I915_UPLOAD_FOG); i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_FOGFUNC_MASK; i915->vertex_fog = I915_FOG_PIXEL; @@ -567,8 +571,8 @@ void i915_update_fog( GLcontext *ctx ) i915->vertex_fog = I915_FOG_VERTEX; } else { - GLfloat c1 = ctx->Fog.End/(ctx->Fog.End-ctx->Fog.Start); - GLfloat c2 = 1.0/(ctx->Fog.End-ctx->Fog.Start); + GLfloat c2 = 1.0 / (ctx->Fog.End - ctx->Fog.Start); + GLfloat c1 = ctx->Fog.End * c2; i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_C1_MASK; i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_LINEAR; @@ -576,10 +580,11 @@ void i915_update_fog( GLcontext *ctx ) ((GLuint)(c1 * FMC1_C1_ONE)) & FMC1_C1_MASK; if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) { - i915->state.Fog[I915_FOGREG_MODE2] = (GLuint)(c2 * FMC2_C2_ONE); + i915->state.Fog[I915_FOGREG_MODE2] + = (GLuint)(c2 * FMC2_C2_ONE); } else { - union { float f; int i; } fi; + fi_type fi; fi.f = c2; i915->state.Fog[I915_FOGREG_MODE2] = fi.i; } @@ -602,24 +607,22 @@ void i915_update_fog( GLcontext *ctx ) i915->vertex_fog = I915_FOG_VERTEX; } - { - I915_STATECHANGE(i915, I915_UPLOAD_CTX); - I915_ACTIVESTATE(i915, I915_UPLOAD_FOG, enabled); - if (enabled) - i915->state.Ctx[I915_CTXREG_LIS5] |= S5_FOG_ENABLE; - else - i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_FOG_ENABLE; - } + I915_STATECHANGE(i915, I915_UPLOAD_CTX); + I915_ACTIVESTATE(i915, I915_UPLOAD_FOG, enabled); + if (enabled) + i915->state.Ctx[I915_CTXREG_LIS5] |= S5_FOG_ENABLE; + else + i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_FOG_ENABLE; - /* always enbale pixel fog - * vertex fog use precaculted fog coord will conflict with appended - * fog program + /* Always enable pixel fog. Vertex fog using fog coord will conflict + * with fog code appended onto fragment program. */ _tnl_allow_vertex_fog( ctx, 0 ); _tnl_allow_pixel_fog( ctx, 1 ); } -static void i915Fogfv(GLcontext *ctx, GLenum pname, const GLfloat *param) +static void +i915Fogfv(GLcontext *ctx, GLenum pname, const GLfloat *param) { i915ContextPtr i915 = I915_CONTEXT(ctx); @@ -634,8 +637,8 @@ static void i915Fogfv(GLcontext *ctx, GLenum pname, const GLfloat *param) I915_STATECHANGE(i915, I915_UPLOAD_FOG); if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) { - i915->state.Fog[I915_FOGREG_MODE3] = (GLuint)(ctx->Fog.Density * - FMC3_D_ONE); + i915->state.Fog[I915_FOGREG_MODE3] + = (GLuint)(ctx->Fog.Density * FMC3_D_ONE); } else { union { float f; int i; } fi; @@ -960,15 +963,8 @@ void i915InitState( i915ContextPtr i915 ) i915_init_packets( i915 ); - intelInitState( ctx ); + _mesa_init_driver_state(ctx); memcpy( &i915->initial, &i915->state, sizeof(i915->state) ); i915->current = &i915->state; } - - - - - - - diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c index 3b639e7144..a19d4b6584 100644 --- a/src/mesa/drivers/dri/i915/i915_texstate.c +++ b/src/mesa/drivers/dri/i915/i915_texstate.c @@ -172,12 +172,8 @@ static void i915LayoutTextureImages( i915ContextPtr i915, t->intel.image[0][i].offset = total_height * pitch; t->intel.image[0][i].internalFormat = baseImage->_BaseFormat; - if (t->intel.image[0][i].image->IsCompressed) - { - if (t->intel.image[0][i].image->Height > 4) - total_height += t->intel.image[0][i].image->Height/4; - else - total_height += 1; + if (t->intel.image[0][i].image->IsCompressed) { + total_height += (t->intel.image[0][i].image->Height + 3) / 4; } else total_height += MAX2(2, t->intel.image[0][i].image->Height); @@ -495,12 +491,19 @@ static void i915SetTexImages( i915ContextPtr i915, abort(); } - - if (i915->intel.intelScreen->deviceID == PCI_CHIP_I945_G || - i915->intel.intelScreen->deviceID == PCI_CHIP_I945_GM) - i945LayoutTextureImages( i915, tObj ); - else - i915LayoutTextureImages( i915, tObj ); + switch (i915->intel.intelScreen->deviceID) { + case PCI_CHIP_I945_G: + case PCI_CHIP_I945_GM: + case PCI_CHIP_I945_GME: + case PCI_CHIP_G33_G: + case PCI_CHIP_Q33_G: + case PCI_CHIP_Q35_G: + i945LayoutTextureImages( i915, tObj ); + break; + default: + i915LayoutTextureImages( i915, tObj ); + break; + } t->Setup[I915_TEXREG_MS3] = (((tObj->Image[0][t->intel.base.firstLevel]->Height - 1) << MS3_HEIGHT_SHIFT) | diff --git a/src/mesa/drivers/dri/i915/intel_context.c b/src/mesa/drivers/dri/i915/intel_context.c index d201fcf323..11c23f24a1 100644 --- a/src/mesa/drivers/dri/i915/intel_context.c +++ b/src/mesa/drivers/dri/i915/intel_context.c @@ -123,6 +123,14 @@ const GLubyte *intelGetString( GLcontext *ctx, GLenum name ) chipset = "Intel(R) 945G"; break; case PCI_CHIP_I945_GM: chipset = "Intel(R) 945GM"; break; + case PCI_CHIP_I945_GME: + chipset = "Intel(R) 945GME"; break; + case PCI_CHIP_G33_G: + chipset = "Intel(R) G33"; break; + case PCI_CHIP_Q35_G: + chipset = "Intel(R) Q35"; break; + case PCI_CHIP_Q33_G: + chipset = "Intel(R) Q33"; break; default: chipset = "Unknown Intel Chipset"; break; } @@ -196,7 +204,6 @@ static const struct tnl_pipeline_stage *intel_pipeline[] = { &_tnl_texgen_stage, &_tnl_texture_transform_stage, &_tnl_point_attenuation_stage, - &_tnl_arb_vertex_program_stage, &_tnl_vertex_program_stage, #if 1 &_intel_render_stage, /* ADD: unclipped rastersetup-to-dma */ @@ -767,98 +774,3 @@ void intelCopySubBuffer( __DRIdrawablePrivate *dPriv, fprintf(stderr, "%s: drawable has no context!\n", __FUNCTION__); } } - -void intelInitState( GLcontext *ctx ) -{ - /* Mesa should do this for us: - */ - ctx->Driver.AlphaFunc( ctx, - ctx->Color.AlphaFunc, - ctx->Color.AlphaRef); - - ctx->Driver.BlendColor( ctx, - ctx->Color.BlendColor ); - - ctx->Driver.BlendEquationSeparate( ctx, - ctx->Color.BlendEquationRGB, - ctx->Color.BlendEquationA); - - ctx->Driver.BlendFuncSeparate( ctx, - ctx->Color.BlendSrcRGB, - ctx->Color.BlendDstRGB, - ctx->Color.BlendSrcA, - ctx->Color.BlendDstA); - - ctx->Driver.ColorMask( ctx, - ctx->Color.ColorMask[RCOMP], - ctx->Color.ColorMask[GCOMP], - ctx->Color.ColorMask[BCOMP], - ctx->Color.ColorMask[ACOMP]); - - ctx->Driver.CullFace( ctx, ctx->Polygon.CullFaceMode ); - ctx->Driver.DepthFunc( ctx, ctx->Depth.Func ); - ctx->Driver.DepthMask( ctx, ctx->Depth.Mask ); - - ctx->Driver.Enable( ctx, GL_ALPHA_TEST, ctx->Color.AlphaEnabled ); - ctx->Driver.Enable( ctx, GL_BLEND, ctx->Color.BlendEnabled ); - ctx->Driver.Enable( ctx, GL_COLOR_LOGIC_OP, ctx->Color.ColorLogicOpEnabled ); - ctx->Driver.Enable( ctx, GL_COLOR_SUM, ctx->Fog.ColorSumEnabled ); - ctx->Driver.Enable( ctx, GL_CULL_FACE, ctx->Polygon.CullFlag ); - ctx->Driver.Enable( ctx, GL_DEPTH_TEST, ctx->Depth.Test ); - ctx->Driver.Enable( ctx, GL_DITHER, ctx->Color.DitherFlag ); - ctx->Driver.Enable( ctx, GL_FOG, ctx->Fog.Enabled ); - ctx->Driver.Enable( ctx, GL_LIGHTING, ctx->Light.Enabled ); - ctx->Driver.Enable( ctx, GL_LINE_SMOOTH, ctx->Line.SmoothFlag ); - ctx->Driver.Enable( ctx, GL_POLYGON_STIPPLE, ctx->Polygon.StippleFlag ); - ctx->Driver.Enable( ctx, GL_SCISSOR_TEST, ctx->Scissor.Enabled ); - ctx->Driver.Enable( ctx, GL_STENCIL_TEST, ctx->Stencil.Enabled ); - ctx->Driver.Enable( ctx, GL_TEXTURE_1D, GL_FALSE ); - ctx->Driver.Enable( ctx, GL_TEXTURE_2D, GL_FALSE ); - ctx->Driver.Enable( ctx, GL_TEXTURE_RECTANGLE_NV, GL_FALSE ); - ctx->Driver.Enable( ctx, GL_TEXTURE_3D, GL_FALSE ); - ctx->Driver.Enable( ctx, GL_TEXTURE_CUBE_MAP, GL_FALSE ); - - ctx->Driver.Fogfv( ctx, GL_FOG_COLOR, ctx->Fog.Color ); - ctx->Driver.Fogfv( ctx, GL_FOG_MODE, 0 ); - ctx->Driver.Fogfv( ctx, GL_FOG_DENSITY, &ctx->Fog.Density ); - ctx->Driver.Fogfv( ctx, GL_FOG_START, &ctx->Fog.Start ); - ctx->Driver.Fogfv( ctx, GL_FOG_END, &ctx->Fog.End ); - - ctx->Driver.FrontFace( ctx, ctx->Polygon.FrontFace ); - - { - GLfloat f = (GLfloat)ctx->Light.Model.ColorControl; - ctx->Driver.LightModelfv( ctx, GL_LIGHT_MODEL_COLOR_CONTROL, &f ); - } - - ctx->Driver.LineWidth( ctx, ctx->Line.Width ); - ctx->Driver.LogicOpcode( ctx, ctx->Color.LogicOp ); - ctx->Driver.PointSize( ctx, ctx->Point.Size ); - ctx->Driver.PolygonStipple( ctx, (const GLubyte *)ctx->PolygonStipple ); - ctx->Driver.Scissor( ctx, ctx->Scissor.X, ctx->Scissor.Y, - ctx->Scissor.Width, ctx->Scissor.Height ); - ctx->Driver.ShadeModel( ctx, ctx->Light.ShadeModel ); - ctx->Driver.StencilFuncSeparate( ctx, GL_FRONT, - ctx->Stencil.Function[0], - ctx->Stencil.Ref[0], - ctx->Stencil.ValueMask[0] ); - ctx->Driver.StencilFuncSeparate( ctx, GL_BACK, - ctx->Stencil.Function[1], - ctx->Stencil.Ref[1], - ctx->Stencil.ValueMask[1] ); - ctx->Driver.StencilMaskSeparate( ctx, GL_FRONT, ctx->Stencil.WriteMask[0] ); - ctx->Driver.StencilMaskSeparate( ctx, GL_BACK, ctx->Stencil.WriteMask[1] ); - ctx->Driver.StencilOpSeparate( ctx, GL_FRONT, - ctx->Stencil.FailFunc[0], - ctx->Stencil.ZFailFunc[0], - ctx->Stencil.ZPassFunc[0]); - ctx->Driver.StencilOpSeparate( ctx, GL_BACK, - ctx->Stencil.FailFunc[1], - ctx->Stencil.ZFailFunc[1], - ctx->Stencil.ZPassFunc[1]); - - - ctx->Driver.DrawBuffer( ctx, ctx->Color.DrawBuffer[0] ); -} - - diff --git a/src/mesa/drivers/dri/i915/intel_context.h b/src/mesa/drivers/dri/i915/intel_context.h index 05195e76d6..3b50107d73 100644 --- a/src/mesa/drivers/dri/i915/intel_context.h +++ b/src/mesa/drivers/dri/i915/intel_context.h @@ -454,6 +454,10 @@ extern int INTEL_DEBUG; #define PCI_CHIP_I915_GM 0x2592 #define PCI_CHIP_I945_G 0x2772 #define PCI_CHIP_I945_GM 0x27A2 +#define PCI_CHIP_I945_GME 0x27AE +#define PCI_CHIP_G33_G 0x29C2 +#define PCI_CHIP_Q35_G 0x29B2 +#define PCI_CHIP_Q33_G 0x29D2 /* ================================================================ @@ -473,7 +477,6 @@ extern void intelSetBackClipRects(intelContextPtr intel); extern void intelSetFrontClipRects(intelContextPtr intel); extern void intelWindowMoved( intelContextPtr intel ); -extern void intelInitState( GLcontext *ctx ); extern const GLubyte *intelGetString( GLcontext *ctx, GLenum name ); diff --git a/src/mesa/drivers/dri/i915/intel_pixel.c b/src/mesa/drivers/dri/i915/intel_pixel.c index 535cbfcb26..d175870a0c 100644 --- a/src/mesa/drivers/dri/i915/intel_pixel.c +++ b/src/mesa/drivers/dri/i915/intel_pixel.c @@ -439,10 +439,26 @@ intelDrawPixels( GLcontext *ctx, if (INTEL_DEBUG & DEBUG_PIXEL) fprintf(stderr, "%s\n", __FUNCTION__); - if (!intelTryDrawPixels( ctx, x, y, width, height, format, type, - unpack, pixels )) + if (intelTryDrawPixels( ctx, x, y, width, height, format, type, + unpack, pixels )) + return; + + if (ctx->FragmentProgram._Current == ctx->FragmentProgram._TexEnvProgram) { + /* + * We don't want the i915 texenv program to be applied to DrawPixels. + * This is really just a performance optimization (mesa will other- + * wise happily run the fragment program on each pixel in the image). + */ + struct gl_fragment_program *fpSave = ctx->FragmentProgram._Current; + ctx->FragmentProgram._Current = NULL; + _swrast_DrawPixels( ctx, x, y, width, height, format, type, + unpack, pixels ); + ctx->FragmentProgram._Current = fpSave; + } + else { _swrast_DrawPixels( ctx, x, y, width, height, format, type, - unpack, pixels ); + unpack, pixels ); + } } diff --git a/src/mesa/drivers/dri/i915/intel_screen.c b/src/mesa/drivers/dri/i915/intel_screen.c index 67e176a1c6..ca8610b496 100644 --- a/src/mesa/drivers/dri/i915/intel_screen.c +++ b/src/mesa/drivers/dri/i915/intel_screen.c @@ -514,6 +514,10 @@ static GLboolean intelCreateContext( const __GLcontextModes *mesaVis, case PCI_CHIP_I915_GM: case PCI_CHIP_I945_G: case PCI_CHIP_I945_GM: + case PCI_CHIP_I945_GME: + case PCI_CHIP_G33_G: + case PCI_CHIP_Q35_G: + case PCI_CHIP_Q33_G: return i915CreateContext( mesaVis, driContextPriv, sharedContextPrivate ); diff --git a/src/mesa/drivers/dri/i915/intel_tex.c b/src/mesa/drivers/dri/i915/intel_tex.c index 6012d3e799..5bd280652a 100644 --- a/src/mesa/drivers/dri/i915/intel_tex.c +++ b/src/mesa/drivers/dri/i915/intel_tex.c @@ -634,18 +634,12 @@ static void intelUploadTexImage( intelContextPtr intel, image->Height); } else if (image->IsCompressed) { - GLuint row_len = image->Width * 2; + GLuint row_len = 0; GLubyte *dst = (GLubyte *)(t->BufAddr + offset); GLubyte *src = (GLubyte *)image->Data; GLuint j; - if (INTEL_DEBUG & DEBUG_TEXTURE) - fprintf(stderr, - "Upload image %dx%dx%d offset %xm row_len %x " - "pitch %x depth_pitch %x\n", - image->Width, image->Height, image->Depth, offset, - row_len, t->Pitch, t->depth_pitch); - + /* must always copy whole blocks (8/16 bytes) */ switch (image->InternalFormat) { case GL_COMPRESSED_RGB_FXT1_3DFX: case GL_COMPRESSED_RGBA_FXT1_3DFX: @@ -653,29 +647,41 @@ static void intelUploadTexImage( intelContextPtr intel, case GL_RGB4_S3TC: case GL_COMPRESSED_RGB_S3TC_DXT1_EXT: case GL_COMPRESSED_RGBA_S3TC_DXT1_EXT: - for (j = 0 ; j < image->Height/4 ; j++, dst += (t->Pitch)) { - __memcpy(dst, src, row_len ); - src += row_len; - } + row_len = (image->Width * 2 + 7) & ~7; break; case GL_RGBA_S3TC: case GL_RGBA4_S3TC: case GL_COMPRESSED_RGBA_S3TC_DXT3_EXT: case GL_COMPRESSED_RGBA_S3TC_DXT5_EXT: - for (j = 0 ; j < image->Height/4 ; j++, dst += (t->Pitch)) { - __memcpy(dst, src, (image->Width*4) ); - src += image->Width*4; - } + row_len = (image->Width * 4 + 15) & ~15; break; default: fprintf(stderr,"Internal Compressed format not supported %d\n", image->InternalFormat); break; } + + if (INTEL_DEBUG & DEBUG_TEXTURE) + fprintf(stderr, + "Upload image %dx%dx%d offset %xm row_len %x " + "pitch %x depth_pitch %x\n", + image->Width, image->Height, image->Depth, offset, + row_len, t->Pitch, t->depth_pitch); + + if (row_len) { + for (j = 0 ; j < (image->Height + 3)/4 ; j++, dst += (t->Pitch)) { + __memcpy(dst, src, row_len ); + src += row_len; + } + } } /* Time for another vtbl entry: */ else if (intel->intelScreen->deviceID == PCI_CHIP_I945_G || - intel->intelScreen->deviceID == PCI_CHIP_I945_GM) { + intel->intelScreen->deviceID == PCI_CHIP_I945_GM || + intel->intelScreen->deviceID == PCI_CHIP_I945_GME || + intel->intelScreen->deviceID == PCI_CHIP_G33_G || + intel->intelScreen->deviceID == PCI_CHIP_Q33_G || + intel->intelScreen->deviceID == PCI_CHIP_Q35_G) { GLuint row_len = image->Width * image->TexFormat->TexelBytes; GLubyte *dst = (GLubyte *)(t->BufAddr + offset); GLubyte *src = (GLubyte *)image->Data; diff --git a/src/mesa/drivers/dri/i915/server/intel_dri.c b/src/mesa/drivers/dri/i915/server/intel_dri.c index 169fdbece3..b6946b75d2 100644 --- a/src/mesa/drivers/dri/i915/server/intel_dri.c +++ b/src/mesa/drivers/dri/i915/server/intel_dri.c @@ -455,12 +455,14 @@ static unsigned long AllocFromAGP(const DRIDriverContext *ctx, I830Rec *pI830, l } unsigned long -I830AllocVidMem(const DRIDriverContext *ctx, I830Rec *pI830, I830MemRange *result, I830MemPool *pool, long size, unsigned long alignment, int flags) +I830AllocVidMem(const DRIDriverContext *ctx, I830Rec *pI830, + I830MemRange *result, I830MemPool *pool, long size, + unsigned long alignment, int flags) { - int ret; + unsigned long ret; - if (!result) - return 0; + if (!result) + return 0; /* Make sure these are initialised. */ result->Size = 0; @@ -470,16 +472,15 @@ I830AllocVidMem(const DRIDriverContext *ctx, I830Rec *pI830, I830MemRange *resul return 0; } - if (pool->Free.Size < size) - return AllocFromAGP(ctx, pI830, size, alignment, result); - else - { - ret = AllocFromPool(ctx, pI830, result, pool, size, alignment, flags); - - if (ret==0) - return AllocFromAGP(ctx, pI830, size, alignment, result); - return ret; + if (pool->Free.Size < size) { + ret = AllocFromAGP(ctx, pI830, size, alignment, result); + } + else { + ret = AllocFromPool(ctx, pI830, result, pool, size, alignment, flags); + if (ret == 0) + ret = AllocFromAGP(ctx, pI830, size, alignment, result); } + return ret; } static Bool BindAgpRange(const DRIDriverContext *ctx, I830MemRange *mem) diff --git a/src/mesa/drivers/dri/i915tex/i830_reg.h b/src/mesa/drivers/dri/i915tex/i830_reg.h index 24ac524500..41280bca7c 100644 --- a/src/mesa/drivers/dri/i915tex/i830_reg.h +++ b/src/mesa/drivers/dri/i915tex/i830_reg.h @@ -575,6 +575,7 @@ #define MT_16BIT_DIB_RGB565_8888 (7<<3) #define MT_32BIT_ARGB8888 (0<<3) /* SURFACE_32BIT */ #define MT_32BIT_ABGR8888 (1<<3) +#define MT_32BIT_XRGB8888 (2<<3) /* XXX: Guess from i915_reg.h */ #define MT_32BIT_BUMP_XLDVDU_8888 (6<<3) #define MT_32BIT_DIB_8888 (7<<3) #define MT_411_YUV411 (0<<3) /* SURFACE_411 */ diff --git a/src/mesa/drivers/dri/i915tex/i830_state.c b/src/mesa/drivers/dri/i915tex/i830_state.c index 812daa6524..3c149e6905 100644 --- a/src/mesa/drivers/dri/i915tex/i830_state.c +++ b/src/mesa/drivers/dri/i915tex/i830_state.c @@ -34,6 +34,8 @@ #include "texmem.h" +#include "drivers/common/driverfuncs.h" + #include "intel_screen.h" #include "intel_batchbuffer.h" #include "intel_fbo.h" @@ -1101,7 +1103,7 @@ i830InitState(struct i830_context *i830) i830_init_packets(i830); - intelInitState(ctx); + _mesa_init_driver_state(ctx); memcpy(&i830->initial, &i830->state, sizeof(i830->state)); diff --git a/src/mesa/drivers/dri/i915tex/i830_texstate.c b/src/mesa/drivers/dri/i915tex/i830_texstate.c index e3f34e3944..0d3f053226 100644 --- a/src/mesa/drivers/dri/i915tex/i830_texstate.c +++ b/src/mesa/drivers/dri/i915tex/i830_texstate.c @@ -117,7 +117,7 @@ i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3) struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current; struct intel_texture_object *intelObj = intel_texture_object(tObj); struct gl_texture_image *firstImage; - GLuint *state = i830->state.Tex[unit]; + GLuint *state = i830->state.Tex[unit], format, pitch; memset(state, 0, sizeof(state)); @@ -128,7 +128,7 @@ i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3) i830->state.tex_buffer[unit] = NULL; } - if (!intel_finalize_mipmap_tree(intel, unit)) + if (!intelObj->imageOverride && !intel_finalize_mipmap_tree(intel, unit)) return GL_FALSE; /* Get first image here, since intelObj->firstLevel will get set in @@ -136,11 +136,34 @@ i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3) */ firstImage = tObj->Image[0][intelObj->firstLevel]; - i830->state.tex_buffer[unit] = driBOReference(intelObj->mt->region->buffer); - i830->state.tex_offset[unit] = intel_miptree_image_offset(intelObj->mt, 0, - intelObj-> - firstLevel); + if (intelObj->imageOverride) { + i830->state.tex_buffer[unit] = NULL; + i830->state.tex_offset[unit] = intelObj->textureOffset; + switch (intelObj->depthOverride) { + case 32: + format = MAPSURF_32BIT | MT_32BIT_ARGB8888; + break; + case 24: + default: + format = MAPSURF_32BIT | MT_32BIT_XRGB8888; + break; + case 16: + format = MAPSURF_16BIT | MT_16BIT_RGB565; + break; + } + + pitch = intelObj->pitchOverride; + } else { + i830->state.tex_buffer[unit] = driBOReference(intelObj->mt->region-> + buffer); + i830->state.tex_offset[unit] = intel_miptree_image_offset(intelObj->mt, + 0, intelObj-> + firstLevel); + + format = translate_texture_format(firstImage->TexFormat->MesaFormat); + pitch = intelObj->mt->pitch * intelObj->mt->cpp; + } state[I830_TEXREG_TM0LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_2 | (LOAD_TEXTURE_MAP0 << unit) | 4); @@ -151,12 +174,10 @@ i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3) state[I830_TEXREG_TM0S1] = (((firstImage->Height - 1) << TM0S1_HEIGHT_SHIFT) | - ((firstImage->Width - 1) << TM0S1_WIDTH_SHIFT) | - translate_texture_format(firstImage->TexFormat->MesaFormat)); + ((firstImage->Width - 1) << TM0S1_WIDTH_SHIFT) | format); state[I830_TEXREG_TM0S2] = - (((((intelObj->mt->pitch * intelObj->mt->cpp) / 4) - - 1) << TM0S2_PITCH_SHIFT) | TM0S2_CUBE_FACE_ENA_MASK); + ((((pitch / 4) - 1) << TM0S2_PITCH_SHIFT) | TM0S2_CUBE_FACE_ENA_MASK); { if (tObj->Target == GL_TEXTURE_CUBE_MAP) diff --git a/src/mesa/drivers/dri/i915tex/i830_vtbl.c b/src/mesa/drivers/dri/i915tex/i830_vtbl.c index dd0670dec3..e432648ada 100644 --- a/src/mesa/drivers/dri/i915tex/i830_vtbl.c +++ b/src/mesa/drivers/dri/i915tex/i830_vtbl.c @@ -490,11 +490,13 @@ i830_emit_state(struct intel_context *intel) DRM_BO_MASK_MEM | DRM_BO_FLAG_READ, state->tex_offset[i] | TM0S0_USE_FENCE); } - else { - assert(i == 0); - assert(state == &i830->meta); - OUT_BATCH(0); - } + else if (state == &i830->meta) { + assert(i == 0); + OUT_BATCH(0); + } + else { + OUT_BATCH(state->tex_offset[i]); + } OUT_BATCH(state->Tex[i][I830_TEXREG_TM0S1]); OUT_BATCH(state->Tex[i][I830_TEXREG_TM0S2]); diff --git a/src/mesa/drivers/dri/i915tex/i915_fragprog.c b/src/mesa/drivers/dri/i915tex/i915_fragprog.c index cbea6092a8..a4b22a0c32 100644 --- a/src/mesa/drivers/dri/i915tex/i915_fragprog.c +++ b/src/mesa/drivers/dri/i915tex/i915_fragprog.c @@ -849,11 +849,6 @@ i915BindProgram(GLcontext * ctx, GLenum target, struct gl_program *prog) assert(p->on_hardware == 0); assert(p->params_uptodate == 0); - /* Hack: make sure fog is correctly enabled according to this - * fragment program's fog options. - */ - ctx->Driver.Enable(ctx, GL_FRAGMENT_PROGRAM_ARB, - ctx->FragmentProgram.Enabled); } } @@ -926,9 +921,6 @@ i915ProgramStringNotify(GLcontext * ctx, /* Hack: make sure fog is correctly enabled according to this * fragment program's fog options. */ - ctx->Driver.Enable(ctx, GL_FRAGMENT_PROGRAM_ARB, - ctx->FragmentProgram.Enabled); - if (p->FragProg.FogOption) { /* add extra instructions to do fog, then turn off FogOption field */ _mesa_append_fog_code(ctx, &p->FragProg); diff --git a/src/mesa/drivers/dri/i915tex/i915_state.c b/src/mesa/drivers/dri/i915tex/i915_state.c index 1fafadced0..e5d8d27993 100644 --- a/src/mesa/drivers/dri/i915tex/i915_state.c +++ b/src/mesa/drivers/dri/i915tex/i915_state.c @@ -36,6 +36,8 @@ #include "texmem.h" +#include "drivers/common/driverfuncs.h" + #include "intel_fbo.h" #include "intel_screen.h" #include "intel_batchbuffer.h" @@ -563,7 +565,6 @@ i915_update_fog(GLcontext * ctx) if (ctx->FragmentProgram._Active) { /* Pull in static fog state from program */ - mode = ctx->FragmentProgram._Current->FogOption; enabled = (mode != GL_NONE); try_pixel_fog = 0; @@ -571,15 +572,19 @@ i915_update_fog(GLcontext * ctx) else { enabled = ctx->Fog.Enabled; mode = ctx->Fog.Mode; - - try_pixel_fog = (ctx->Fog.FogCoordinateSource == GL_FRAGMENT_DEPTH_EXT && ctx->Hint.Fog == GL_NICEST && 0); /* XXX - DISABLE -- Need ortho fallback */ +#if 0 + /* XXX - DISABLED -- Need ortho fallback */ + try_pixel_fog = (ctx->Fog.FogCoordinateSource == GL_FRAGMENT_DEPTH_EXT + && ctx->Hint.Fog == GL_NICEST); +#else + try_pixel_fog = 0; +#endif } if (!enabled) { i915->vertex_fog = I915_FOG_NONE; } else if (try_pixel_fog) { - I915_STATECHANGE(i915, I915_UPLOAD_FOG); i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_FOGFUNC_MASK; i915->vertex_fog = I915_FOG_PIXEL; @@ -591,12 +596,13 @@ i915_update_fog(GLcontext * ctx) * either fallback or append fog instructions to end of * program in the case of linear fog. */ + printf("vertex fog!\n"); i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_VERTEX; i915->vertex_fog = I915_FOG_VERTEX; } else { - GLfloat c1 = ctx->Fog.End / (ctx->Fog.End - ctx->Fog.Start); GLfloat c2 = 1.0 / (ctx->Fog.End - ctx->Fog.Start); + GLfloat c1 = ctx->Fog.End * c2; i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_C1_MASK; i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_LINEAR; @@ -604,15 +610,11 @@ i915_update_fog(GLcontext * ctx) ((GLuint) (c1 * FMC1_C1_ONE)) & FMC1_C1_MASK; if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) { - i915->state.Fog[I915_FOGREG_MODE2] = - (GLuint) (c2 * FMC2_C2_ONE); + i915->state.Fog[I915_FOGREG_MODE2] + = (GLuint) (c2 * FMC2_C2_ONE); } else { - union - { - float f; - int i; - } fi; + fi_type fi; fi.f = c2; i915->state.Fog[I915_FOGREG_MODE2] = fi.i; } @@ -628,26 +630,22 @@ i915_update_fog(GLcontext * ctx) break; } } - else { /* if (i915->vertex_fog != I915_FOG_VERTEX) */ - + else { /* if (i915->vertex_fog != I915_FOG_VERTEX) */ I915_STATECHANGE(i915, I915_UPLOAD_FOG); i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_FOGFUNC_MASK; i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_VERTEX; i915->vertex_fog = I915_FOG_VERTEX; } - { - I915_STATECHANGE(i915, I915_UPLOAD_CTX); - I915_ACTIVESTATE(i915, I915_UPLOAD_FOG, enabled); - if (enabled) - i915->state.Ctx[I915_CTXREG_LIS5] |= S5_FOG_ENABLE; - else - i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_FOG_ENABLE; - } + I915_STATECHANGE(i915, I915_UPLOAD_CTX); + I915_ACTIVESTATE(i915, I915_UPLOAD_FOG, enabled); + if (enabled) + i915->state.Ctx[I915_CTXREG_LIS5] |= S5_FOG_ENABLE; + else + i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_FOG_ENABLE; - /* always enbale pixel fog - * vertex fog use precaculted fog coord will conflict with appended - * fog program + /* Always enable pixel fog. Vertex fog using fog coord will conflict + * with fog code appended onto fragment program. */ _tnl_allow_vertex_fog( ctx, 0 ); _tnl_allow_pixel_fog( ctx, 1 ); @@ -669,15 +667,11 @@ i915Fogfv(GLcontext * ctx, GLenum pname, const GLfloat * param) I915_STATECHANGE(i915, I915_UPLOAD_FOG); if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) { - i915->state.Fog[I915_FOGREG_MODE3] = (GLuint) (ctx->Fog.Density * - FMC3_D_ONE); + i915->state.Fog[I915_FOGREG_MODE3] = + (GLuint) (ctx->Fog.Density * FMC3_D_ONE); } else { - union - { - float f; - int i; - } fi; + fi_type fi; fi.f = ctx->Fog.Density; i915->state.Fog[I915_FOGREG_MODE3] = fi.i; } @@ -1013,7 +1007,7 @@ i915InitState(struct i915_context *i915) i915_init_packets(i915); - intelInitState(ctx); + _mesa_init_driver_state(ctx); memcpy(&i915->initial, &i915->state, sizeof(i915->state)); i915->current = &i915->state; diff --git a/src/mesa/drivers/dri/i915tex/i915_tex_layout.c b/src/mesa/drivers/dri/i915tex/i915_tex_layout.c index 2e1600cfdf..7b761a7b22 100644 --- a/src/mesa/drivers/dri/i915tex/i915_tex_layout.c +++ b/src/mesa/drivers/dri/i915tex/i915_tex_layout.c @@ -113,7 +113,7 @@ i915_miptree_layout(struct intel_mipmap_tree * mt) */ for (level = mt->first_level; level <= MAX2(8, mt->last_level); level++) { - intel_miptree_set_level_info(mt, level, 1, 0, mt->total_height, + intel_miptree_set_level_info(mt, level, depth, 0, mt->total_height, width, height, depth); @@ -161,11 +161,9 @@ i915_miptree_layout(struct intel_mipmap_tree * mt) if (mt->compressed) img_height = MAX2(1, height / 4); else - img_height = MAX2(2, height); + img_height = (MAX2(2, height) + 1) & ~1; mt->total_height += img_height; - mt->total_height += 1; - mt->total_height &= ~1; width = minify(width); height = minify(height); diff --git a/src/mesa/drivers/dri/i915tex/i915_texstate.c b/src/mesa/drivers/dri/i915tex/i915_texstate.c index e0ecdfde24..3d68187cf8 100644 --- a/src/mesa/drivers/dri/i915tex/i915_texstate.c +++ b/src/mesa/drivers/dri/i915tex/i915_texstate.c @@ -122,7 +122,7 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3) struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current; struct intel_texture_object *intelObj = intel_texture_object(tObj); struct gl_texture_image *firstImage; - GLuint *state = i915->state.Tex[unit]; + GLuint *state = i915->state.Tex[unit], format, pitch; memset(state, 0, sizeof(state)); @@ -133,7 +133,7 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3) i915->state.tex_buffer[unit] = NULL; } - if (!intel_finalize_mipmap_tree(intel, unit)) + if (!intelObj->imageOverride && !intel_finalize_mipmap_tree(intel, unit)) return GL_FALSE; /* Get first image here, since intelObj->firstLevel will get set in @@ -141,24 +141,45 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3) */ firstImage = tObj->Image[0][intelObj->firstLevel]; - i915->state.tex_buffer[unit] = driBOReference(intelObj->mt->region->buffer); - i915->state.tex_offset[unit] = intel_miptree_image_offset(intelObj->mt, 0, - intelObj-> - firstLevel); + if (intelObj->imageOverride) { + i915->state.tex_buffer[unit] = NULL; + i915->state.tex_offset[unit] = intelObj->textureOffset; + + switch (intelObj->depthOverride) { + case 32: + format = MAPSURF_32BIT | MT_32BIT_ARGB8888; + break; + case 24: + default: + format = MAPSURF_32BIT | MT_32BIT_XRGB8888; + break; + case 16: + format = MAPSURF_16BIT | MT_16BIT_RGB565; + break; + } + + pitch = intelObj->pitchOverride; + } else { + i915->state.tex_buffer[unit] = driBOReference(intelObj->mt->region-> + buffer); + i915->state.tex_offset[unit] = intel_miptree_image_offset(intelObj->mt, + 0, intelObj-> + firstLevel); + + format = translate_texture_format(firstImage->TexFormat->MesaFormat); + pitch = intelObj->mt->pitch * intelObj->mt->cpp; + } state[I915_TEXREG_MS3] = (((firstImage->Height - 1) << MS3_HEIGHT_SHIFT) | - ((firstImage->Width - 1) << MS3_WIDTH_SHIFT) | - translate_texture_format(firstImage->TexFormat->MesaFormat) | + ((firstImage->Width - 1) << MS3_WIDTH_SHIFT) | format | MS3_USE_FENCE_REGS); state[I915_TEXREG_MS4] = - (((((intelObj->mt->pitch * intelObj->mt->cpp) / 4) - - 1) << MS4_PITCH_SHIFT) | MS4_CUBE_FACE_ENA_MASK | - ((((intelObj->lastLevel - - intelObj->firstLevel) * - 4)) << MS4_MAX_LOD_SHIFT) | ((firstImage->Depth - - 1) << MS4_VOLUME_DEPTH_SHIFT)); + ((((pitch / 4) - 1) << MS4_PITCH_SHIFT) | MS4_CUBE_FACE_ENA_MASK | + ((((intelObj->lastLevel - intelObj->firstLevel) * 4)) << + MS4_MAX_LOD_SHIFT) | ((firstImage->Depth - 1) << + MS4_VOLUME_DEPTH_SHIFT)); { diff --git a/src/mesa/drivers/dri/i915tex/i915_vtbl.c b/src/mesa/drivers/dri/i915tex/i915_vtbl.c index 52db9a95e6..f80e8d6327 100644 --- a/src/mesa/drivers/dri/i915tex/i915_vtbl.c +++ b/src/mesa/drivers/dri/i915tex/i915_vtbl.c @@ -381,11 +381,13 @@ i915_emit_state(struct intel_context *intel) DRM_BO_MASK_MEM | DRM_BO_FLAG_READ, state->tex_offset[i]); } - else { + else if (state == &i915->meta) { assert(i == 0); - assert(state == &i915->meta); OUT_BATCH(0); } + else { + OUT_BATCH(state->tex_offset[i]); + } OUT_BATCH(state->Tex[i][I915_TEXREG_MS3]); OUT_BATCH(state->Tex[i][I915_TEXREG_MS4]); diff --git a/src/mesa/drivers/dri/i915tex/intel_batchpool.c b/src/mesa/drivers/dri/i915tex/intel_batchpool.c index 3c17c50204..2503b8a62a 100644 --- a/src/mesa/drivers/dri/i915tex/intel_batchpool.c +++ b/src/mesa/drivers/dri/i915tex/intel_batchpool.c @@ -96,7 +96,7 @@ createBPool(int fd, unsigned long bufSize, unsigned numBufs, unsigned flags, _glthread_INIT_MUTEX(p->mutex); if (drmBOCreate(fd, 0, numBufs * bufSize, 0, NULL, drm_bo_type_dc, - flags, 0, &p->kernelBO)) { + flags, DRM_BO_HINT_DONT_FENCE, &p->kernelBO)) { free(p->bufs); free(p); return NULL; diff --git a/src/mesa/drivers/dri/i915tex/intel_buffer_objects.c b/src/mesa/drivers/dri/i915tex/intel_buffer_objects.c index ba3c7f0c1f..91c45ad95b 100644 --- a/src/mesa/drivers/dri/i915tex/intel_buffer_objects.c +++ b/src/mesa/drivers/dri/i915tex/intel_buffer_objects.c @@ -76,7 +76,9 @@ intel_bufferobj_release_region(struct intel_context *intel, */ driGenBuffers(intel->intelScreen->regionPool, "buffer object", 1, &intel_obj->buffer, 64, 0, 0); + LOCK_HARDWARE(intel); driBOData(intel_obj->buffer, intel_obj->Base.Size, NULL, 0); + UNLOCK_HARDWARE(intel); } /* Break the COW tie to the region. Both the pbo and the region end @@ -137,7 +139,9 @@ intel_bufferobj_data(GLcontext * ctx, if (intel_obj->region) intel_bufferobj_release_region(intel, intel_obj); + LOCK_HARDWARE(intel); driBOData(intel_obj->buffer, size, data, 0); + UNLOCK_HARDWARE(intel); } diff --git a/src/mesa/drivers/dri/i915tex/intel_context.c b/src/mesa/drivers/dri/i915tex/intel_context.c index 6a3456e154..c927dca8e5 100644 --- a/src/mesa/drivers/dri/i915tex/intel_context.c +++ b/src/mesa/drivers/dri/i915tex/intel_context.c @@ -130,6 +130,18 @@ intelGetString(GLcontext * ctx, GLenum name) case PCI_CHIP_I945_GM: chipset = "Intel(R) 945GM"; break; + case PCI_CHIP_I945_GME: + chipset = "Intel(R) 945GME"; + break; + case PCI_CHIP_G33_G: + chipset = "Intel(R) G33"; + break; + case PCI_CHIP_Q35_G: + chipset = "Intel(R) Q35"; + break; + case PCI_CHIP_Q33_G: + chipset = "Intel(R) Q33"; + break; default: chipset = "Unknown Intel Chipset"; break; @@ -209,7 +221,6 @@ static const struct tnl_pipeline_stage *intel_pipeline[] = { &_tnl_texgen_stage, &_tnl_texture_transform_stage, &_tnl_point_attenuation_stage, - &_tnl_arb_vertex_program_stage, &_tnl_vertex_program_stage, #if 1 &_intel_render_stage, /* ADD: unclipped rastersetup-to-dma */ @@ -347,7 +358,15 @@ intelInitContext(struct intel_context *intel, drmI830Sarea *saPriv = (drmI830Sarea *) (((GLubyte *) sPriv->pSAREA) + intelScreen->sarea_priv_offset); int fthrottle_mode; + GLboolean havePools; + + DRM_LIGHT_LOCK(sPriv->fd, &sPriv->pSAREA->lock, driContextPriv->hHWContext); + havePools = intelCreatePools(intelScreen); + DRM_UNLOCK(sPriv->fd, &sPriv->pSAREA->lock, driContextPriv->hHWContext); + if (!havePools) + return GL_FALSE; + if (!_mesa_initialize_context(&intel->ctx, mesaVis, shareCtx, functions, (void *) intel)) diff --git a/src/mesa/drivers/dri/i915tex/intel_context.h b/src/mesa/drivers/dri/i915tex/intel_context.h index 44c20af7f8..9d060eb866 100644 --- a/src/mesa/drivers/dri/i915tex/intel_context.h +++ b/src/mesa/drivers/dri/i915tex/intel_context.h @@ -92,6 +92,10 @@ struct intel_texture_object * regions will be copied to this region and the old storage freed. */ struct intel_mipmap_tree *mt; + + GLboolean imageOverride; + GLint depthOverride; + GLuint pitchOverride; }; @@ -381,6 +385,10 @@ extern int INTEL_DEBUG; #define PCI_CHIP_I915_GM 0x2592 #define PCI_CHIP_I945_G 0x2772 #define PCI_CHIP_I945_GM 0x27A2 +#define PCI_CHIP_I945_GME 0x27AE +#define PCI_CHIP_G33_G 0x29C2 +#define PCI_CHIP_Q35_G 0x29B2 +#define PCI_CHIP_Q33_G 0x29D2 /* ================================================================ @@ -395,7 +403,6 @@ extern GLboolean intelInitContext(struct intel_context *intel, extern void intelGetLock(struct intel_context *intel, GLuint flags); -extern void intelInitState(GLcontext * ctx); extern void intelFinish(GLcontext * ctx); extern void intelFlush(GLcontext * ctx); diff --git a/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c b/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c index 8e83028b26..843a78eb82 100644 --- a/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c @@ -79,6 +79,10 @@ intel_miptree_create(struct intel_context *intel, switch (intel->intelScreen->deviceID) { case PCI_CHIP_I945_G: case PCI_CHIP_I945_GM: + case PCI_CHIP_I945_GME: + case PCI_CHIP_G33_G: + case PCI_CHIP_Q33_G: + case PCI_CHIP_Q35_G: ok = i945_miptree_layout(mt); break; case PCI_CHIP_I915_G: diff --git a/src/mesa/drivers/dri/i915tex/intel_pixel_draw.c b/src/mesa/drivers/dri/i915tex/intel_pixel_draw.c index 10a079896a..77c67c821e 100644 --- a/src/mesa/drivers/dri/i915tex/intel_pixel_draw.c +++ b/src/mesa/drivers/dri/i915tex/intel_pixel_draw.c @@ -363,5 +363,20 @@ intelDrawPixels(GLcontext * ctx, if (INTEL_DEBUG & DEBUG_PIXEL) _mesa_printf("%s: fallback to swrast\n", __FUNCTION__); - _swrast_DrawPixels(ctx, x, y, width, height, format, type, unpack, pixels); + if (ctx->FragmentProgram._Current == ctx->FragmentProgram._TexEnvProgram) { + /* + * We don't want the i915 texenv program to be applied to DrawPixels. + * This is really just a performance optimization (mesa will other- + * wise happily run the fragment program on each pixel in the image). + */ + struct gl_fragment_program *fpSave = ctx->FragmentProgram._Current; + ctx->FragmentProgram._Current = NULL; + _swrast_DrawPixels( ctx, x, y, width, height, format, type, + unpack, pixels ); + ctx->FragmentProgram._Current = fpSave; + } + else { + _swrast_DrawPixels( ctx, x, y, width, height, format, type, + unpack, pixels ); + } } diff --git a/src/mesa/drivers/dri/i915tex/intel_regions.c b/src/mesa/drivers/dri/i915tex/intel_regions.c index a114bdf896..7d19bd07d3 100644 --- a/src/mesa/drivers/dri/i915tex/intel_regions.c +++ b/src/mesa/drivers/dri/i915tex/intel_regions.c @@ -90,6 +90,7 @@ intel_region_alloc(intelScreenPrivate *intelScreen, GLuint cpp, GLuint pitch, GLuint height) { struct intel_region *region = calloc(sizeof(*region), 1); + struct intel_context *intel = intelScreenContext(intelScreen); DBG("%s\n", __FUNCTION__); @@ -107,7 +108,9 @@ intel_region_alloc(intelScreenPrivate *intelScreen, 0, #endif 0); + LOCK_HARDWARE(intel); driBOData(region->buffer, pitch * cpp * height, NULL, 0); + UNLOCK_HARDWARE(intel); return region; } @@ -392,6 +395,8 @@ void intel_region_release_pbo(intelScreenPrivate *intelScreen, struct intel_region *region) { + struct intel_context *intel = intelScreenContext(intelScreen); + assert(region->buffer == region->pbo->buffer); region->pbo->region = NULL; region->pbo = NULL; @@ -400,8 +405,11 @@ intel_region_release_pbo(intelScreenPrivate *intelScreen, driGenBuffers(intelScreen->regionPool, "region", 1, ®ion->buffer, 64, 0, 0); + + LOCK_HARDWARE(intel); driBOData(region->buffer, region->cpp * region->pitch * region->height, NULL, 0); + UNLOCK_HARDWARE(intel); } /* Break the COW tie to the pbo. Both the pbo and the region end up diff --git a/src/mesa/drivers/dri/i915tex/intel_screen.c b/src/mesa/drivers/dri/i915tex/intel_screen.c index 9034ee1b22..2acdead63d 100644 --- a/src/mesa/drivers/dri/i915tex/intel_screen.c +++ b/src/mesa/drivers/dri/i915tex/intel_screen.c @@ -386,6 +386,45 @@ intelUpdateScreenFromSAREA(intelScreenPrivate * intelScreen, intelPrintSAREA(sarea); } +GLboolean +intelCreatePools(intelScreenPrivate *intelScreen) +{ + unsigned batchPoolSize = 1024*1024; + __DRIscreenPrivate * sPriv = intelScreen->driScrnPriv; + + if (intelScreen->havePools) + return GL_TRUE; + + batchPoolSize /= intelScreen->maxBatchSize; + intelScreen->regionPool = driDRMPoolInit(sPriv->fd); + + if (!intelScreen->regionPool) + return GL_FALSE; + + intelScreen->staticPool = driDRMStaticPoolInit(sPriv->fd); + + if (!intelScreen->staticPool) + return GL_FALSE; + + intelScreen->texPool = intelScreen->regionPool; + + intelScreen->batchPool = driBatchPoolInit(sPriv->fd, + DRM_BO_FLAG_EXE | + DRM_BO_FLAG_MEM_TT | + DRM_BO_FLAG_MEM_LOCAL, + intelScreen->maxBatchSize, + batchPoolSize, 5); + if (!intelScreen->batchPool) { + fprintf(stderr, "Failed to initialize batch pool - possible incorrect agpgart installed\n"); + return GL_FALSE; + } + + intel_recreate_static_regions(intelScreen); + intelScreen->havePools = GL_TRUE; + + return GL_TRUE; +} + static GLboolean intelInitDriver(__DRIscreenPrivate * sPriv) @@ -393,7 +432,6 @@ intelInitDriver(__DRIscreenPrivate * sPriv) intelScreenPrivate *intelScreen; I830DRIPtr gDRIPriv = (I830DRIPtr) sPriv->pDevPriv; drmI830Sarea *sarea; - unsigned batchPoolSize = 1024*1024; PFNGLXSCRENABLEEXTENSIONPROC glx_enable_extension = (PFNGLXSCRENABLEEXTENSIONPROC) (*dri_interface-> @@ -426,7 +464,6 @@ intelInitDriver(__DRIscreenPrivate * sPriv) intelScreen->deviceID = gDRIPriv->deviceID; if (intelScreen->deviceID == PCI_CHIP_I865_G) intelScreen->maxBatchSize = 4096; - batchPoolSize /= intelScreen->maxBatchSize; intelScreen->mem = gDRIPriv->mem; intelScreen->cpp = gDRIPriv->cpp; @@ -517,31 +554,6 @@ intelInitDriver(__DRIscreenPrivate * sPriv) (*glx_enable_extension) (psc, "GLX_SGI_make_current_read"); } - intelScreen->regionPool = driDRMPoolInit(sPriv->fd); - - if (!intelScreen->regionPool) - return GL_FALSE; - - intelScreen->staticPool = driDRMStaticPoolInit(sPriv->fd); - - if (!intelScreen->staticPool) - return GL_FALSE; - - intelScreen->texPool = intelScreen->regionPool; - - intelScreen->batchPool = driBatchPoolInit(sPriv->fd, - DRM_BO_FLAG_EXE | - DRM_BO_FLAG_MEM_TT | - DRM_BO_FLAG_MEM_LOCAL, - intelScreen->maxBatchSize, - batchPoolSize, 5); - if (!intelScreen->batchPool) { - fprintf(stderr, "Failed to initialize batch pool - possible incorrect agpgart installed\n"); - return GL_FALSE; - } - - intel_recreate_static_regions(intelScreen); - return GL_TRUE; } @@ -553,9 +565,11 @@ intelDestroyScreen(__DRIscreenPrivate * sPriv) intelUnmapScreenRegions(intelScreen); - driPoolTakeDown(intelScreen->regionPool); - driPoolTakeDown(intelScreen->staticPool); - driPoolTakeDown(intelScreen->batchPool); + if (intelScreen->havePools) { + driPoolTakeDown(intelScreen->regionPool); + driPoolTakeDown(intelScreen->staticPool); + driPoolTakeDown(intelScreen->batchPool); + } FREE(intelScreen); sPriv->private = NULL; } @@ -738,6 +752,10 @@ intelCreateContext(const __GLcontextModes * mesaVis, case PCI_CHIP_I915_GM: case PCI_CHIP_I945_G: case PCI_CHIP_I945_GM: + case PCI_CHIP_I945_GME: + case PCI_CHIP_G33_G: + case PCI_CHIP_Q35_G: + case PCI_CHIP_Q33_G: return i915CreateContext(mesaVis, driContextPriv, sharedContextPrivate); default: @@ -762,7 +780,8 @@ static const struct __DriverAPIRec intelAPI = { .WaitForMSC = driWaitForMSC32, .WaitForSBC = NULL, .SwapBuffersMSC = NULL, - .CopySubBuffer = intelCopySubBuffer + .CopySubBuffer = intelCopySubBuffer, + .setTexOffset = intelSetTexOffset, }; @@ -892,6 +911,7 @@ __driCreateNewScreen_20050727(__DRInativeDisplay * dpy, int scrn, ddx_version, dri_version, drm_version, frame_buffer, pSAREA, fd, internal_api_version, &intelAPI); + if (psp != NULL) { I830DRIPtr dri_priv = (I830DRIPtr) psp->pDevPriv; *driver_modes = intelFillInModes(dri_priv->cpp * 8, diff --git a/src/mesa/drivers/dri/i915tex/intel_screen.h b/src/mesa/drivers/dri/i915tex/intel_screen.h index 05e2f1f2ea..bac43aaddd 100644 --- a/src/mesa/drivers/dri/i915tex/intel_screen.h +++ b/src/mesa/drivers/dri/i915tex/intel_screen.h @@ -95,6 +95,7 @@ typedef struct struct _DriBufferPool *regionPool; struct _DriBufferPool *staticPool; unsigned int maxBatchSize; + GLboolean havePools; } intelScreenPrivate; @@ -130,5 +131,7 @@ extern struct intel_context *intelScreenContext(intelScreenPrivate *intelScreen) extern void intelUpdateScreenRotation(__DRIscreenPrivate * sPriv, drmI830Sarea * sarea); +extern GLboolean +intelCreatePools(intelScreenPrivate *intelScreen); #endif diff --git a/src/mesa/drivers/dri/i915tex/intel_state.c b/src/mesa/drivers/dri/i915tex/intel_state.c index f85d8ef835..271511037e 100644 --- a/src/mesa/drivers/dri/i915tex/intel_state.c +++ b/src/mesa/drivers/dri/i915tex/intel_state.c @@ -267,97 +267,3 @@ intelInitStateFuncs(struct dd_function_table *functions) functions->DepthRange = intelDepthRange; functions->ClearColor = intelClearColor; } - - - - -void -intelInitState(GLcontext * ctx) -{ - /* Mesa should do this for us: - */ - ctx->Driver.AlphaFunc(ctx, ctx->Color.AlphaFunc, ctx->Color.AlphaRef); - - ctx->Driver.BlendColor(ctx, ctx->Color.BlendColor); - - ctx->Driver.BlendEquationSeparate(ctx, - ctx->Color.BlendEquationRGB, - ctx->Color.BlendEquationA); - - ctx->Driver.BlendFuncSeparate(ctx, - ctx->Color.BlendSrcRGB, - ctx->Color.BlendDstRGB, - ctx->Color.BlendSrcA, ctx->Color.BlendDstA); - - ctx->Driver.ColorMask(ctx, - ctx->Color.ColorMask[RCOMP], - ctx->Color.ColorMask[GCOMP], - ctx->Color.ColorMask[BCOMP], - ctx->Color.ColorMask[ACOMP]); - - ctx->Driver.CullFace(ctx, ctx->Polygon.CullFaceMode); - ctx->Driver.DepthFunc(ctx, ctx->Depth.Func); - ctx->Driver.DepthMask(ctx, ctx->Depth.Mask); - - ctx->Driver.Enable(ctx, GL_ALPHA_TEST, ctx->Color.AlphaEnabled); - ctx->Driver.Enable(ctx, GL_BLEND, ctx->Color.BlendEnabled); - ctx->Driver.Enable(ctx, GL_COLOR_LOGIC_OP, ctx->Color.ColorLogicOpEnabled); - ctx->Driver.Enable(ctx, GL_COLOR_SUM, ctx->Fog.ColorSumEnabled); - ctx->Driver.Enable(ctx, GL_CULL_FACE, ctx->Polygon.CullFlag); - ctx->Driver.Enable(ctx, GL_DEPTH_TEST, ctx->Depth.Test); - ctx->Driver.Enable(ctx, GL_DITHER, ctx->Color.DitherFlag); - ctx->Driver.Enable(ctx, GL_FOG, ctx->Fog.Enabled); - ctx->Driver.Enable(ctx, GL_LIGHTING, ctx->Light.Enabled); - ctx->Driver.Enable(ctx, GL_LINE_SMOOTH, ctx->Line.SmoothFlag); - ctx->Driver.Enable(ctx, GL_POLYGON_STIPPLE, ctx->Polygon.StippleFlag); - ctx->Driver.Enable(ctx, GL_SCISSOR_TEST, ctx->Scissor.Enabled); - ctx->Driver.Enable(ctx, GL_STENCIL_TEST, ctx->Stencil.Enabled); - ctx->Driver.Enable(ctx, GL_TEXTURE_1D, GL_FALSE); - ctx->Driver.Enable(ctx, GL_TEXTURE_2D, GL_FALSE); - ctx->Driver.Enable(ctx, GL_TEXTURE_RECTANGLE_NV, GL_FALSE); - ctx->Driver.Enable(ctx, GL_TEXTURE_3D, GL_FALSE); - ctx->Driver.Enable(ctx, GL_TEXTURE_CUBE_MAP, GL_FALSE); - - ctx->Driver.Fogfv(ctx, GL_FOG_COLOR, ctx->Fog.Color); - ctx->Driver.Fogfv(ctx, GL_FOG_MODE, 0); - ctx->Driver.Fogfv(ctx, GL_FOG_DENSITY, &ctx->Fog.Density); - ctx->Driver.Fogfv(ctx, GL_FOG_START, &ctx->Fog.Start); - ctx->Driver.Fogfv(ctx, GL_FOG_END, &ctx->Fog.End); - - ctx->Driver.FrontFace(ctx, ctx->Polygon.FrontFace); - - { - GLfloat f = (GLfloat) ctx->Light.Model.ColorControl; - ctx->Driver.LightModelfv(ctx, GL_LIGHT_MODEL_COLOR_CONTROL, &f); - } - - ctx->Driver.LineWidth(ctx, ctx->Line.Width); - ctx->Driver.LogicOpcode(ctx, ctx->Color.LogicOp); - ctx->Driver.PointSize(ctx, ctx->Point.Size); - ctx->Driver.PolygonStipple(ctx, (const GLubyte *) ctx->PolygonStipple); - ctx->Driver.Scissor(ctx, ctx->Scissor.X, ctx->Scissor.Y, - ctx->Scissor.Width, ctx->Scissor.Height); - ctx->Driver.ShadeModel(ctx, ctx->Light.ShadeModel); - ctx->Driver.StencilFuncSeparate(ctx, GL_FRONT, - ctx->Stencil.Function[0], - ctx->Stencil.Ref[0], - ctx->Stencil.ValueMask[0]); - ctx->Driver.StencilFuncSeparate(ctx, GL_BACK, - ctx->Stencil.Function[1], - ctx->Stencil.Ref[1], - ctx->Stencil.ValueMask[1]); - ctx->Driver.StencilMaskSeparate(ctx, GL_FRONT, ctx->Stencil.WriteMask[0]); - ctx->Driver.StencilMaskSeparate(ctx, GL_BACK, ctx->Stencil.WriteMask[1]); - ctx->Driver.StencilOpSeparate(ctx, GL_FRONT, - ctx->Stencil.FailFunc[0], - ctx->Stencil.ZFailFunc[0], - ctx->Stencil.ZPassFunc[0]); - ctx->Driver.StencilOpSeparate(ctx, GL_BACK, - ctx->Stencil.FailFunc[1], - ctx->Stencil.ZFailFunc[1], - ctx->Stencil.ZPassFunc[1]); - - - /* XXX this isn't really needed */ - ctx->Driver.DrawBuffer(ctx, ctx->Color.DrawBuffer[0]); -} diff --git a/src/mesa/drivers/dri/i915tex/intel_tex.h b/src/mesa/drivers/dri/i915tex/intel_tex.h index 6e9938fe53..b77d7a1d8a 100644 --- a/src/mesa/drivers/dri/i915tex/intel_tex.h +++ b/src/mesa/drivers/dri/i915tex/intel_tex.h @@ -135,6 +135,9 @@ void intelGetCompressedTexImage(GLcontext *ctx, GLenum target, GLint level, const struct gl_texture_object *texObj, const struct gl_texture_image *texImage); +void intelSetTexOffset(__DRIcontext *pDRICtx, GLint texname, + unsigned long long offset, GLint depth, GLuint pitch); + GLuint intel_finalize_mipmap_tree(struct intel_context *intel, GLuint unit); void intel_tex_map_images(struct intel_context *intel, diff --git a/src/mesa/drivers/dri/i915tex/intel_tex_image.c b/src/mesa/drivers/dri/i915tex/intel_tex_image.c index 42679ef9db..f790b1e6f7 100644 --- a/src/mesa/drivers/dri/i915tex/intel_tex_image.c +++ b/src/mesa/drivers/dri/i915tex/intel_tex_image.c @@ -385,7 +385,6 @@ intelTexImage(GLcontext * ctx, } } - assert(!intelImage->mt); if (intelObj->mt && @@ -667,3 +666,26 @@ intelGetCompressedTexImage(GLcontext *ctx, GLenum target, GLint level, texObj, texImage, 1); } + +void +intelSetTexOffset(__DRIcontext *pDRICtx, GLint texname, + unsigned long long offset, GLint depth, GLuint pitch) +{ + struct intel_context *intel = (struct intel_context*) + ((__DRIcontextPrivate*)pDRICtx->private)->driverPrivate; + struct gl_texture_object *tObj = _mesa_lookup_texture(&intel->ctx, texname); + struct intel_texture_object *intelObj = intel_texture_object(tObj); + + if (!intelObj) + return; + + if (intelObj->mt) + intel_miptree_release(intel, &intelObj->mt); + + intelObj->imageOverride = GL_TRUE; + intelObj->depthOverride = depth; + intelObj->pitchOverride = pitch; + + if (offset) + intelObj->textureOffset = offset; +} diff --git a/src/mesa/drivers/dri/i915tex/intel_tex_validate.c b/src/mesa/drivers/dri/i915tex/intel_tex_validate.c index 79d587a174..af18c26d55 100644 --- a/src/mesa/drivers/dri/i915tex/intel_tex_validate.c +++ b/src/mesa/drivers/dri/i915tex/intel_tex_validate.c @@ -105,6 +105,8 @@ intel_finalize_mipmap_tree(struct intel_context *intel, GLuint unit) { struct gl_texture_object *tObj = intel->ctx.Texture.Unit[unit]._Current; struct intel_texture_object *intelObj = intel_texture_object(tObj); + int comp_byte = 0; + int cpp; GLuint face, i; GLuint nr_faces = 0; @@ -114,7 +116,7 @@ intel_finalize_mipmap_tree(struct intel_context *intel, GLuint unit) /* We know/require this is true by now: */ - assert(intelObj->base.Complete); + assert(intelObj->base._Complete); /* What levels must the tree include at a minimum? */ @@ -148,6 +150,12 @@ intel_finalize_mipmap_tree(struct intel_context *intel, GLuint unit) intel_miptree_reference(&intelObj->mt, firstImage->mt); } + if (firstImage->base.IsCompressed) { + comp_byte = intel_compressed_num_bytes(firstImage->base.TexFormat->MesaFormat); + cpp = comp_byte; + } + else cpp = firstImage->base.TexFormat->TexelBytes; + /* Check tree can hold all active levels. Check tree matches * target, imageFormat, etc. * @@ -165,7 +173,7 @@ intel_finalize_mipmap_tree(struct intel_context *intel, GLuint unit) intelObj->mt->width0 != firstImage->base.Width || intelObj->mt->height0 != firstImage->base.Height || intelObj->mt->depth0 != firstImage->base.Depth || - intelObj->mt->cpp != firstImage->base.TexFormat->TexelBytes || + intelObj->mt->cpp != cpp || intelObj->mt->compressed != firstImage->base.IsCompressed)) { intel_miptree_release(intel, &intelObj->mt); } @@ -174,10 +182,6 @@ intel_finalize_mipmap_tree(struct intel_context *intel, GLuint unit) /* May need to create a new tree: */ if (!intelObj->mt) { - int comp_byte = 0; - - if (firstImage->base.IsCompressed) - comp_byte = intel_compressed_num_bytes(firstImage->base.TexFormat->MesaFormat); intelObj->mt = intel_miptree_create(intel, intelObj->base.Target, firstImage->base.InternalFormat, @@ -186,8 +190,7 @@ intel_finalize_mipmap_tree(struct intel_context *intel, GLuint unit) firstImage->base.Width, firstImage->base.Height, firstImage->base.Depth, - firstImage->base.TexFormat-> - TexelBytes, + cpp, comp_byte); } diff --git a/src/mesa/drivers/dri/i915tex/server/intel_dri.c b/src/mesa/drivers/dri/i915tex/server/intel_dri.c index 4d1ac09f64..e49c4214ad 100644 --- a/src/mesa/drivers/dri/i915tex/server/intel_dri.c +++ b/src/mesa/drivers/dri/i915tex/server/intel_dri.c @@ -483,12 +483,14 @@ static unsigned long AllocFromAGP(const DRIDriverContext *ctx, I830Rec *pI830, l } unsigned long -I830AllocVidMem(const DRIDriverContext *ctx, I830Rec *pI830, I830MemRange *result, I830MemPool *pool, long size, unsigned long alignment, int flags) +I830AllocVidMem(const DRIDriverContext *ctx, I830Rec *pI830, + I830MemRange *result, I830MemPool *pool, long size, + unsigned long alignment, int flags) { - int ret; + unsigned long ret; - if (!result) - return 0; + if (!result) + return 0; /* Make sure these are initialised. */ result->Size = 0; @@ -498,16 +500,15 @@ I830AllocVidMem(const DRIDriverContext *ctx, I830Rec *pI830, I830MemRange *resul return 0; } - if (pool->Free.Size < size) - return AllocFromAGP(ctx, pI830, size, alignment, result); - else - { - ret = AllocFromPool(ctx, pI830, result, pool, size, alignment, flags); - - if (ret==0) - return AllocFromAGP(ctx, pI830, size, alignment, result); - return ret; + if (pool->Free.Size < size) { + ret = AllocFromAGP(ctx, pI830, size, alignment, result); } + else { + ret = AllocFromPool(ctx, pI830, result, pool, size, alignment, flags); + if (ret == 0) + ret = AllocFromAGP(ctx, pI830, size, alignment, result); + } + return ret; } static Bool BindAgpRange(const DRIDriverContext *ctx, I830MemRange *mem) @@ -895,31 +896,6 @@ I830DRIUnmapScreenRegions(const DRIDriverContext *ctx, I830Rec *pI830, drmI830Sa } } -#if 0 -static void -I830InitTextureHeap(const DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea) -{ - /* Start up the simple memory manager for agp space */ - drmI830MemInitHeap drmHeap; - drmHeap.region = I830_MEM_REGION_AGP; - drmHeap.start = 0; - drmHeap.size = sarea->tex_size; - - if (drmCommandWrite(ctx->drmFD, DRM_I830_INIT_HEAP, - &drmHeap, sizeof(drmHeap))) { - fprintf(stderr, - "[drm] Failed to initialized agp heap manager\n"); - } else { - fprintf(stderr, - "[drm] Initialized kernel agp heap manager, %d\n", - sarea->tex_size); - - I830SetParam(ctx, I830_SETPARAM_TEX_LRU_LOG_GRANULARITY, - sarea->log_tex_granularity); - } -} -#endif - static Bool I830DRIDoMappings(DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea) { @@ -943,9 +919,6 @@ I830DRIDoMappings(DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea) I830DRIMapScreenRegions(ctx, pI830, sarea); SetupDRIMM(ctx, pI830); -#if 0 - I830InitTextureHeap(ctx, pI830, sarea); -#endif if (ctx->pciDevice != PCI_CHIP_845_G && ctx->pciDevice != PCI_CHIP_I830_M) { I830SetParam(ctx, I830_SETPARAM_USE_MI_BATCHBUFFER_START, 1 ); diff --git a/src/mesa/drivers/dri/i965/brw_cc.c b/src/mesa/drivers/dri/i965/brw_cc.c index 84a02f8a8c..8a1d1527db 100644 --- a/src/mesa/drivers/dri/i965/brw_cc.c +++ b/src/mesa/drivers/dri/i965/brw_cc.c @@ -34,6 +34,7 @@ #include "brw_state.h" #include "brw_defines.h" #include "brw_util.h" +#include "macros.h" #include "enums.h" static void upload_cc_vp( struct brw_context *brw ) diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index 4eb2eedd42..0c64d7e756 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b/src/mesa/drivers/dri/i965/brw_draw.c @@ -46,7 +46,8 @@ #include "tnl/tnl.h" #include "vbo/vbo_context.h" - +#include "swrast/swrast.h" +#include "swrast_setup/swrast_setup.h" diff --git a/src/mesa/drivers/dri/i965/brw_vs_tnl.c b/src/mesa/drivers/dri/i965/brw_vs_tnl.c index bc0526fab6..93305424c1 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_tnl.c +++ b/src/mesa/drivers/dri/i965/brw_vs_tnl.c @@ -1154,7 +1154,9 @@ static void build_fog( struct tnl_program *p ) { struct ureg fog = register_output(p, VERT_RESULT_FOGC); struct ureg input; - + GLuint useabs = p->state->fog_source_is_depth && p->state->fog_option && + (p->state->fog_option != FOG_EXP2); + if (p->state->fog_source_is_depth) { input = swizzle1(get_eye_position(p), Z); } @@ -1171,26 +1173,30 @@ static void build_fog( struct tnl_program *p ) emit_op1(p, OPCODE_MOV, fog, 0, id); + if (useabs) { + emit_op1(p, OPCODE_ABS, tmp, 0, input); + } + switch (p->state->fog_option) { case FOG_LINEAR: { - emit_op1(p, OPCODE_ABS, tmp, 0, input); - emit_op3(p, OPCODE_MAD, tmp, 0, tmp, swizzle1(params,X), swizzle1(params,Y)); + emit_op3(p, OPCODE_MAD, tmp, 0, useabs ? tmp : input, + swizzle1(params,X), swizzle1(params,Y)); emit_op2(p, OPCODE_MAX, tmp, 0, tmp, swizzle1(id,X)); /* saturate */ emit_op2(p, OPCODE_MIN, fog, WRITEMASK_X, tmp, swizzle1(id,W)); break; } case FOG_EXP: - emit_op1(p, OPCODE_ABS, tmp, 0, input); - emit_op2(p, OPCODE_MUL, tmp, 0, tmp, swizzle1(params,Z)); + emit_op2(p, OPCODE_MUL, tmp, 0, useabs ? tmp : input, + swizzle1(params,Z)); emit_op1(p, OPCODE_EX2, fog, WRITEMASK_X, ureg_negate(tmp)); break; case FOG_EXP2: emit_op2(p, OPCODE_MUL, tmp, 0, input, swizzle1(params,W)); - emit_op2(p, OPCODE_MUL, tmp, 0, tmp, tmp); + emit_op2(p, OPCODE_MUL, tmp, 0, tmp, tmp); emit_op1(p, OPCODE_EX2, fog, WRITEMASK_X, ureg_negate(tmp)); break; } - + release_temp(p, tmp); } else { @@ -1198,7 +1204,7 @@ static void build_fog( struct tnl_program *p ) * * KW: Is it really necessary to do anything in this case? */ - emit_op1(p, OPCODE_MOV, fog, 0, input); + emit_op1(p, useabs ? OPCODE_ABS : OPCODE_MOV, fog, 0, input); } } diff --git a/src/mesa/drivers/dri/i965/intel_context.c b/src/mesa/drivers/dri/i965/intel_context.c index a94c1dc6d5..3215cc7218 100644 --- a/src/mesa/drivers/dri/i965/intel_context.c +++ b/src/mesa/drivers/dri/i965/intel_context.c @@ -107,20 +107,23 @@ static const GLubyte *intelGetString( GLcontext *ctx, GLenum name ) case GL_RENDERER: switch (intel_context(ctx)->intelScreen->deviceID) { case PCI_CHIP_I965_Q: - chipset = "Intel(R) 965Q"; break; + chipset = "Intel(R) 965Q"; break; case PCI_CHIP_I965_G: case PCI_CHIP_I965_G_1: - chipset = "Intel(R) 965G"; break; + chipset = "Intel(R) 965G"; break; case PCI_CHIP_I946_GZ: - chipset = "Intel(R) 946GZ"; break; + chipset = "Intel(R) 946GZ"; break; case PCI_CHIP_I965_GM: - chipset = "Intel(R) 965GM"; break; + chipset = "Intel(R) 965GM"; + break; + case PCI_CHIP_I965_GME: + chipset = "Intel(R) 965GME/GLE"; break; default: - chipset = "Unknown Intel Chipset"; break; + chipset = "Unknown Intel Chipset"; } (void) driGetRendererString( buffer, chipset, DRIVER_VERSION, 0 ); diff --git a/src/mesa/drivers/dri/i965/intel_context.h b/src/mesa/drivers/dri/i965/intel_context.h index 808512f7fd..406f8483dc 100644 --- a/src/mesa/drivers/dri/i965/intel_context.h +++ b/src/mesa/drivers/dri/i965/intel_context.h @@ -385,6 +385,7 @@ extern int INTEL_DEBUG; #define PCI_CHIP_I965_G_1 0x2982 #define PCI_CHIP_I946_GZ 0x2972 #define PCI_CHIP_I965_GM 0x2A02 +#define PCI_CHIP_I965_GME 0x2A12 /* ================================================================ @@ -399,7 +400,6 @@ extern GLboolean intelInitContext( struct intel_context *intel, extern void intelGetLock(struct intel_context *intel, GLuint flags); -extern void intelInitState( GLcontext *ctx ); extern void intelFinish( GLcontext *ctx ); extern void intelFlush( GLcontext *ctx ); diff --git a/src/mesa/drivers/dri/i965/intel_state.c b/src/mesa/drivers/dri/i965/intel_state.c index ec6e0465d4..2e442db619 100644 --- a/src/mesa/drivers/dri/i965/intel_state.c +++ b/src/mesa/drivers/dri/i965/intel_state.c @@ -197,99 +197,3 @@ void intelInitStateFuncs( struct dd_function_table *functions ) functions->RenderMode = intelRenderMode; functions->ClearColor = intelClearColor; } - - - - -void intelInitState( GLcontext *ctx ) -{ - /* Mesa should do this for us: - */ - ctx->Driver.AlphaFunc( ctx, - ctx->Color.AlphaFunc, - ctx->Color.AlphaRef); - - ctx->Driver.BlendColor( ctx, - ctx->Color.BlendColor ); - - ctx->Driver.BlendEquationSeparate( ctx, - ctx->Color.BlendEquationRGB, - ctx->Color.BlendEquationA); - - ctx->Driver.BlendFuncSeparate( ctx, - ctx->Color.BlendSrcRGB, - ctx->Color.BlendDstRGB, - ctx->Color.BlendSrcA, - ctx->Color.BlendDstA); - - ctx->Driver.ColorMask( ctx, - ctx->Color.ColorMask[RCOMP], - ctx->Color.ColorMask[GCOMP], - ctx->Color.ColorMask[BCOMP], - ctx->Color.ColorMask[ACOMP]); - - ctx->Driver.CullFace( ctx, ctx->Polygon.CullFaceMode ); - ctx->Driver.DepthFunc( ctx, ctx->Depth.Func ); - ctx->Driver.DepthMask( ctx, ctx->Depth.Mask ); - - ctx->Driver.Enable( ctx, GL_ALPHA_TEST, ctx->Color.AlphaEnabled ); - ctx->Driver.Enable( ctx, GL_BLEND, ctx->Color.BlendEnabled ); - ctx->Driver.Enable( ctx, GL_COLOR_LOGIC_OP, ctx->Color.ColorLogicOpEnabled ); - ctx->Driver.Enable( ctx, GL_COLOR_SUM, ctx->Fog.ColorSumEnabled ); - ctx->Driver.Enable( ctx, GL_CULL_FACE, ctx->Polygon.CullFlag ); - ctx->Driver.Enable( ctx, GL_DEPTH_TEST, ctx->Depth.Test ); - ctx->Driver.Enable( ctx, GL_DITHER, ctx->Color.DitherFlag ); - ctx->Driver.Enable( ctx, GL_FOG, ctx->Fog.Enabled ); - ctx->Driver.Enable( ctx, GL_LIGHTING, ctx->Light.Enabled ); - ctx->Driver.Enable( ctx, GL_LINE_SMOOTH, ctx->Line.SmoothFlag ); - ctx->Driver.Enable( ctx, GL_POLYGON_STIPPLE, ctx->Polygon.StippleFlag ); - ctx->Driver.Enable( ctx, GL_SCISSOR_TEST, ctx->Scissor.Enabled ); - ctx->Driver.Enable( ctx, GL_STENCIL_TEST, ctx->Stencil.Enabled ); - ctx->Driver.Enable( ctx, GL_TEXTURE_1D, GL_FALSE ); - ctx->Driver.Enable( ctx, GL_TEXTURE_2D, GL_FALSE ); - ctx->Driver.Enable( ctx, GL_TEXTURE_RECTANGLE_NV, GL_FALSE ); - ctx->Driver.Enable( ctx, GL_TEXTURE_3D, GL_FALSE ); - ctx->Driver.Enable( ctx, GL_TEXTURE_CUBE_MAP, GL_FALSE ); - - ctx->Driver.Fogfv( ctx, GL_FOG_COLOR, ctx->Fog.Color ); - ctx->Driver.Fogfv( ctx, GL_FOG_MODE, 0 ); - ctx->Driver.Fogfv( ctx, GL_FOG_DENSITY, &ctx->Fog.Density ); - ctx->Driver.Fogfv( ctx, GL_FOG_START, &ctx->Fog.Start ); - ctx->Driver.Fogfv( ctx, GL_FOG_END, &ctx->Fog.End ); - - ctx->Driver.FrontFace( ctx, ctx->Polygon.FrontFace ); - - { - GLfloat f = (GLfloat)ctx->Light.Model.ColorControl; - ctx->Driver.LightModelfv( ctx, GL_LIGHT_MODEL_COLOR_CONTROL, &f ); - } - - ctx->Driver.LineWidth( ctx, ctx->Line.Width ); - ctx->Driver.LogicOpcode( ctx, ctx->Color.LogicOp ); - ctx->Driver.PointSize( ctx, ctx->Point.Size ); - ctx->Driver.PolygonStipple( ctx, (const GLubyte *)ctx->PolygonStipple ); - ctx->Driver.Scissor( ctx, ctx->Scissor.X, ctx->Scissor.Y, - ctx->Scissor.Width, ctx->Scissor.Height ); - ctx->Driver.ShadeModel( ctx, ctx->Light.ShadeModel ); - ctx->Driver.StencilFuncSeparate( ctx, GL_FRONT, - ctx->Stencil.Function[0], - ctx->Stencil.Ref[0], - ctx->Stencil.ValueMask[0] ); - ctx->Driver.StencilFuncSeparate( ctx, GL_BACK, - ctx->Stencil.Function[1], - ctx->Stencil.Ref[1], - ctx->Stencil.ValueMask[1] ); - ctx->Driver.StencilMaskSeparate( ctx, GL_FRONT, ctx->Stencil.WriteMask[0] ); - ctx->Driver.StencilMaskSeparate( ctx, GL_BACK, ctx->Stencil.WriteMask[1] ); - ctx->Driver.StencilOpSeparate( ctx, GL_FRONT, - ctx->Stencil.FailFunc[0], - ctx->Stencil.ZFailFunc[0], - ctx->Stencil.ZPassFunc[0]); - ctx->Driver.StencilOpSeparate( ctx, GL_BACK, - ctx->Stencil.FailFunc[1], - ctx->Stencil.ZFailFunc[1], - ctx->Stencil.ZPassFunc[1]); - - - ctx->Driver.DrawBuffer( ctx, ctx->Color.DrawBuffer[0] ); -} diff --git a/src/mesa/drivers/dri/i965/intel_tex_validate.c b/src/mesa/drivers/dri/i965/intel_tex_validate.c index cb23b9dd87..44ee94614d 100644 --- a/src/mesa/drivers/dri/i965/intel_tex_validate.c +++ b/src/mesa/drivers/dri/i965/intel_tex_validate.c @@ -138,7 +138,7 @@ GLuint intel_finalize_mipmap_tree( struct intel_context *intel, /* We know/require this is true by now: */ - assert(intelObj->base.Complete); + assert(intelObj->base._Complete); /* What levels must the tree include at a minimum? */ diff --git a/src/mesa/drivers/dri/intel/intel_tex_layout.c b/src/mesa/drivers/dri/intel/intel_tex_layout.c index f356480217..fcb5cc3906 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_layout.c +++ b/src/mesa/drivers/dri/intel/intel_tex_layout.c @@ -74,7 +74,7 @@ void i945_miptree_layout_2d( struct intel_mipmap_tree *mt ) GLuint img_height; intel_miptree_set_level_info(mt, level, 1, x, y, width, - mt->compressed ? height/4 : height, 1); + height, 1); if (mt->compressed) img_height = MAX2(1, height/4); diff --git a/src/mesa/drivers/dri/mach64/mach64_native_vb.c b/src/mesa/drivers/dri/mach64/mach64_native_vb.c index 519ec81e54..75cf0e2ed2 100644 --- a/src/mesa/drivers/dri/mach64/mach64_native_vb.c +++ b/src/mesa/drivers/dri/mach64/mach64_native_vb.c @@ -44,7 +44,7 @@ void TAG(translate_vertex)(GLcontext *ctx, UNVIEWPORT_VARS; CARD32 *p = (CARD32 *)src + 10 - mmesa->vertex_size; - dst->win[3] = 1.0; + dst->attrib[FRAG_ATTRIB_WPOS][3] = 1.0; switch ( format ) { case TEX1_VERTEX_FORMAT: @@ -75,17 +75,17 @@ void TAG(translate_vertex)(GLcontext *ctx, dst->attrib[FRAG_ATTRIB_TEX0][1] = LE32_IN_FLOAT( p++ ); #endif dst->attrib[FRAG_ATTRIB_TEX0][3] = 1.0; - dst->win[3] = LE32_IN_FLOAT( p++ ); + dst->attrib[FRAG_ATTRIB_WPOS][3] = LE32_IN_FLOAT( p++ ); case NOTEX_VERTEX_FORMAT: - dst->specular[2] = ((GLubyte *)p)[0]; - dst->specular[1] = ((GLubyte *)p)[1]; - dst->specular[0] = ((GLubyte *)p)[2]; - dst->fog = ((GLubyte *)p)[3]; + dst->attrib[FRAG_ATTRIB_COL1][2] = UBYTE_TO_FLOAT(((GLubyte *)p)[0]); + dst->attrib[FRAG_ATTRIB_COL1][1] = UBYTE_TO_FLOAT(((GLubyte *)p)[1]); + dst->attrib[FRAG_ATTRIB_COL1][0] = UBYTE_TO_FLOAT(((GLubyte *)p)[2]); + dst->attrib[FRAG_ATTRIB_FOGC][0] = ((GLubyte *)p)[3]; /*XXX int->float?*/ p++; case TINY_VERTEX_FORMAT: - dst->win[2] = UNVIEWPORT_Z( LE32_IN( p++ ) ); + dst->attrib[FRAG_ATTRIB_WPOS][2] = UNVIEWPORT_Z( LE32_IN( p++ ) ); dst->color[2] = ((GLubyte *)p)[0]; dst->color[1] = ((GLubyte *)p)[1]; @@ -96,8 +96,8 @@ void TAG(translate_vertex)(GLcontext *ctx, { GLuint xy = LE32_IN( p ); - dst->win[0] = UNVIEWPORT_X( (GLfloat)(GLshort)( xy >> 16 ) ); - dst->win[1] = UNVIEWPORT_Y( (GLfloat)(GLshort)( xy & 0xffff ) ); + dst->attrib[FRAG_ATTRIB_WPOS][0] = UNVIEWPORT_X( (GLfloat)(GLshort)( xy >> 16 ) ); + dst->attrib[FRAG_ATTRIB_WPOS][1] = UNVIEWPORT_Y( (GLfloat)(GLshort)( xy & 0xffff ) ); } } diff --git a/src/mesa/drivers/dri/mga/mga_xmesa.c b/src/mesa/drivers/dri/mga/mga_xmesa.c index 5b65d1a302..f4e651afa0 100644 --- a/src/mesa/drivers/dri/mga/mga_xmesa.c +++ b/src/mesa/drivers/dri/mga/mga_xmesa.c @@ -372,7 +372,6 @@ static const struct tnl_pipeline_stage *mga_pipeline[] = { &_tnl_fog_coordinate_stage, &_tnl_texgen_stage, &_tnl_texture_transform_stage, - &_tnl_arb_vertex_program_stage, &_tnl_vertex_program_stage, /* REMOVE: point attenuation stage */ diff --git a/src/mesa/drivers/dri/nouveau/nouveau_bufferobj.c b/src/mesa/drivers/dri/nouveau/nouveau_bufferobj.c index 684ed7b017..fc14060c04 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_bufferobj.c +++ b/src/mesa/drivers/dri/nouveau/nouveau_bufferobj.c @@ -41,7 +41,7 @@ nouveau_bo_download_from_screen(GLcontext *ctx, GLuint offset, GLuint size, DEBUG("..sys_mem\n"); in_mem = nouveau_mem_alloc(ctx, NOUVEAU_MEM_AGP, size, 0); if (in_mem) { - DEBUG("....via AGP\n"); + DEBUG("....via GART\n"); /* otherwise, try blitting to faster memory and * copying from there */ @@ -86,7 +86,7 @@ nouveau_bo_upload_to_screen(GLcontext *ctx, GLuint offset, GLuint size, NOUVEAU_MEM_MAPPED, size, 0); if (out_mem) { - DEBUG("....via AGP\n"); + DEBUG("....via GART\n"); _mesa_memcpy(out_mem->map, nbo->cpu_mem_sys + offset, size); nouveau_memformat_flat_emit(ctx, nbo->gpu_mem, out_mem, @@ -511,7 +511,7 @@ nouveauBufferData(GLcontext *ctx, GLenum target, GLsizeiptrARB size, gpu_flags = 0; break; default: - gpu_flags = NOUVEAU_BO_VRAM_OK | NOUVEAU_BO_AGP_OK; + gpu_flags = NOUVEAU_BO_VRAM_OK | NOUVEAU_BO_GART_OK; break; } nouveau_bo_init_storage(ctx, gpu_flags, size, data, usage, obj); diff --git a/src/mesa/drivers/dri/nouveau/nouveau_bufferobj.h b/src/mesa/drivers/dri/nouveau/nouveau_bufferobj.h index 932450fd87..3439a35e7c 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_bufferobj.h +++ b/src/mesa/drivers/dri/nouveau/nouveau_bufferobj.h @@ -5,7 +5,7 @@ #include "nouveau_buffers.h" #define NOUVEAU_BO_VRAM_OK (NOUVEAU_MEM_FB | NOUVEAU_MEM_FB_ACCEPTABLE) -#define NOUVEAU_BO_AGP_OK (NOUVEAU_MEM_AGP | NOUVEAU_MEM_AGP_ACCEPTABLE) +#define NOUVEAU_BO_GART_OK (NOUVEAU_MEM_AGP | NOUVEAU_MEM_AGP_ACCEPTABLE) typedef struct nouveau_bufferobj_region_t { uint32_t start; diff --git a/src/mesa/drivers/dri/nouveau/nouveau_buffers.c b/src/mesa/drivers/dri/nouveau/nouveau_buffers.c index b54f68f402..857cd30584 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_buffers.c +++ b/src/mesa/drivers/dri/nouveau/nouveau_buffers.c @@ -32,8 +32,8 @@ nouveau_memformat_flat_emit(GLcontext *ctx, return GL_FALSE; } - src_handle = (src->type & NOUVEAU_MEM_FB) ? NvDmaFB : NvDmaAGP; - dst_handle = (dst->type & NOUVEAU_MEM_FB) ? NvDmaFB : NvDmaAGP; + src_handle = (src->type & NOUVEAU_MEM_FB) ? NvDmaFB : NvDmaTT; + dst_handle = (dst->type & NOUVEAU_MEM_FB) ? NvDmaFB : NvDmaTT; src_offset += nouveau_mem_gpu_offset_get(ctx, src); dst_offset += nouveau_mem_gpu_offset_get(ctx, dst); @@ -138,7 +138,7 @@ nouveau_mem_gpu_offset_get(GLcontext *ctx, nouveau_mem *mem) if (mem->type & NOUVEAU_MEM_FB) return (uint32_t)mem->offset - nmesa->vram_phys; else if (mem->type & NOUVEAU_MEM_AGP) - return (uint32_t)mem->offset - nmesa->agp_phys; + return (uint32_t)mem->offset - nmesa->gart_phys; else return 0xDEADF00D; } @@ -299,6 +299,8 @@ nouveau_cliprects_drawable_set(nouveauContextPtr nmesa, nmesa->pClipRects = dPriv->pClipRects; nmesa->drawX = dPriv->x; nmesa->drawY = dPriv->y; + nmesa->drawW = dPriv->w; + nmesa->drawH = dPriv->h; } static void @@ -313,6 +315,8 @@ nouveau_cliprects_renderbuffer_set(nouveauContextPtr nmesa, nmesa->osClipRect.y2 = nrb->mesa.Height; nmesa->drawX = 0; nmesa->drawY = 0; + nmesa->drawW = nrb->mesa.Width; + nmesa->drawH = nrb->mesa.Height; } void diff --git a/src/mesa/drivers/dri/nouveau/nouveau_context.c b/src/mesa/drivers/dri/nouveau/nouveau_context.c index 8e11eb6134..d96b00242c 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_context.c +++ b/src/mesa/drivers/dri/nouveau/nouveau_context.c @@ -145,10 +145,10 @@ GLboolean nouveauCreateContext( const __GLcontextModes *glVisual, &nmesa->vram_size)) return GL_FALSE; if (!nouveauDRMGetParam(nmesa, NOUVEAU_GETPARAM_AGP_PHYSICAL, - &nmesa->agp_phys)) + &nmesa->gart_phys)) return GL_FALSE; if (!nouveauDRMGetParam(nmesa, NOUVEAU_GETPARAM_AGP_SIZE, - &nmesa->agp_size)) + &nmesa->gart_size)) return GL_FALSE; if (!nouveauFifoInit(nmesa)) return GL_FALSE; diff --git a/src/mesa/drivers/dri/nouveau/nouveau_context.h b/src/mesa/drivers/dri/nouveau/nouveau_context.h index 87e4479da3..10d2ed6e17 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_context.h +++ b/src/mesa/drivers/dri/nouveau/nouveau_context.h @@ -99,19 +99,22 @@ typedef struct nouveau_context { /* The read-only regs */ volatile unsigned char* mmio; + /* The per-channel notifier block */ + volatile void *notifier_block; + /* Physical addresses of AGP/VRAM apertures */ uint64_t vram_phys; uint64_t vram_size; - uint64_t agp_phys; - uint64_t agp_size; + uint64_t gart_phys; + uint64_t gart_size; /* Channel synchronisation */ - nouveau_notifier *syncNotifier; + drm_nouveau_notifier_alloc_t *syncNotifier; /* ARB_occlusion_query / EXT_timer_query */ GLuint query_object_max; GLboolean * query_alloc; - nouveau_notifier *queryNotifier; + drm_nouveau_notifier_alloc_t *queryNotifier; /* Additional hw-specific functions */ nouveau_hw_func hw_func; @@ -150,7 +153,7 @@ typedef struct nouveau_context { GLuint numClipRects; drm_clip_rect_t *pClipRects; drm_clip_rect_t osClipRect; - GLuint drawX, drawY; + GLuint drawX, drawY, drawW, drawH; /* The rendering context information */ GLenum current_primitive; /* the current primitive enum */ diff --git a/src/mesa/drivers/dri/nouveau/nouveau_fifo.c b/src/mesa/drivers/dri/nouveau/nouveau_fifo.c index bd2b2eddd0..e9320918f9 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_fifo.c +++ b/src/mesa/drivers/dri/nouveau/nouveau_fifo.c @@ -99,13 +99,14 @@ void nouveauWaitForIdle(nouveauContextPtr nmesa) GLboolean nouveauFifoInit(nouveauContextPtr nmesa) { drm_nouveau_fifo_alloc_t fifo_init; - int i; + int i, ret; #ifdef NOUVEAU_RING_DEBUG return GL_TRUE; #endif - int ret; + fifo_init.fb_ctxdma_handle = NvDmaFB; + fifo_init.tt_ctxdma_handle = NvDmaTT; ret=drmCommandWriteRead(nmesa->driFd, DRM_NOUVEAU_FIFO_ALLOC, &fifo_init, sizeof(fifo_init)); if (ret) { FATAL("Fifo initialization ioctl failed (returned %d)\n",ret); @@ -117,12 +118,21 @@ GLboolean nouveauFifoInit(nouveauContextPtr nmesa) FATAL("Unable to map the fifo (returned %d)\n",ret); return GL_FALSE; } + ret = drmMap(nmesa->driFd, fifo_init.ctrl, fifo_init.ctrl_size, &nmesa->fifo.mmio); if (ret) { FATAL("Unable to map the control regs (returned %d)\n",ret); return GL_FALSE; } + ret = drmMap(nmesa->driFd, fifo_init.notifier, + fifo_init.notifier_size, + &nmesa->notifier_block); + if (ret) { + FATAL("Unable to map the notifier block (returned %d)\n",ret); + return GL_FALSE; + } + /* Setup our initial FIFO tracking params */ nmesa->fifo.channel = fifo_init.channel; nmesa->fifo.put_base = fifo_init.put_base; diff --git a/src/mesa/drivers/dri/nouveau/nouveau_object.c b/src/mesa/drivers/dri/nouveau/nouveau_object.c index b71acff430..69f8dbf794 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_object.c +++ b/src/mesa/drivers/dri/nouveau/nouveau_object.c @@ -7,61 +7,18 @@ GLboolean nouveauCreateContextObject(nouveauContextPtr nmesa, uint32_t handle, int class) { - drm_nouveau_object_init_t cto; + drm_nouveau_grobj_alloc_t cto; int ret; cto.channel = nmesa->fifo.channel; cto.handle = handle; cto.class = class; - ret = drmCommandWrite(nmesa->driFd, DRM_NOUVEAU_OBJECT_INIT, &cto, sizeof(cto)); + ret = drmCommandWrite(nmesa->driFd, DRM_NOUVEAU_GROBJ_ALLOC, + &cto, sizeof(cto)); return ret == 0; } -GLboolean nouveauCreateDmaObject(nouveauContextPtr nmesa, - uint32_t handle, - int class, - uint32_t offset, - uint32_t size, - int target, - int access) -{ - drm_nouveau_dma_object_init_t dma; - int ret; - - dma.channel = nmesa->fifo.channel; - dma.class = class; - dma.handle = handle; - dma.target = target; - dma.access = access; - dma.offset = offset; - dma.size = size; - ret = drmCommandWriteRead(nmesa->driFd, DRM_NOUVEAU_DMA_OBJECT_INIT, - &dma, sizeof(dma)); - return ret == 0; -} - -GLboolean nouveauCreateDmaObjectFromMem(nouveauContextPtr nmesa, - uint32_t handle, int class, - nouveau_mem *mem, - int access) -{ - uint32_t offset = mem->offset; - int target = mem->type & (NOUVEAU_MEM_FB | NOUVEAU_MEM_AGP); - - if (!target) - return GL_FALSE; - - if (target & NOUVEAU_MEM_FB) - offset -= nmesa->vram_phys; - else if (target & NOUVEAU_MEM_AGP) - offset -= nmesa->agp_phys; - - return nouveauCreateDmaObject(nmesa, handle, class, - offset, mem->size, - target, access); -} - void nouveauObjectOnSubchannel(nouveauContextPtr nmesa, int subchannel, int handle) { BEGIN_RING_SIZE(subchannel, 0, 1); @@ -74,16 +31,6 @@ void nouveauObjectInit(nouveauContextPtr nmesa) return; #endif -/* We need to know vram size.. and AGP size (and even if the card is AGP..) */ - nouveauCreateDmaObject( nmesa, NvDmaFB, NV_DMA_IN_MEMORY, - 0, nmesa->vram_size, - NOUVEAU_MEM_FB, - NOUVEAU_MEM_ACCESS_RW); - nouveauCreateDmaObject( nmesa, NvDmaAGP, NV_DMA_IN_MEMORY, - 0, nmesa->agp_size, - NOUVEAU_MEM_AGP, - NOUVEAU_MEM_ACCESS_RW); - nouveauCreateContextObject(nmesa, Nv3D, nmesa->screen->card->class_3d); if (nmesa->screen->card->type>=NV_10) { nouveauCreateContextObject(nmesa, NvCtxSurf2D, NV10_CONTEXT_SURFACES_2D); diff --git a/src/mesa/drivers/dri/nouveau/nouveau_object.h b/src/mesa/drivers/dri/nouveau/nouveau_object.h index 0be9b4309c..8c72d014da 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_object.h +++ b/src/mesa/drivers/dri/nouveau/nouveau_object.h @@ -14,7 +14,7 @@ enum DMAObjects { NvMemFormat = 0x80000022, NvCtxSurf3D = 0x80000023, NvDmaFB = 0xD0FB0001, - NvDmaAGP = 0xD0AA0001, + NvDmaTT = 0xD0AA0001, NvSyncNotify = 0xD0000001, NvQueryNotify = 0xD0000002 }; @@ -31,17 +31,5 @@ extern void nouveauObjectOnSubchannel(nouveauContextPtr nmesa, int subchannel, i extern GLboolean nouveauCreateContextObject(nouveauContextPtr nmesa, uint32_t handle, int class); -extern GLboolean nouveauCreateDmaObject(nouveauContextPtr nmesa, - uint32_t handle, - int class, - uint32_t offset, - uint32_t size, - int target, - int access); -extern GLboolean nouveauCreateDmaObjectFromMem(nouveauContextPtr nmesa, - uint32_t handle, - int class, - nouveau_mem *mem, - int access); #endif diff --git a/src/mesa/drivers/dri/nouveau/nouveau_query.c b/src/mesa/drivers/dri/nouveau/nouveau_query.c index de3f5b0378..0154140069 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_query.c +++ b/src/mesa/drivers/dri/nouveau/nouveau_query.c @@ -68,7 +68,7 @@ nouveauBeginQuery(GLcontext *ctx, GLenum target, struct gl_query_object *q) nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx); nouveau_query_object *nq = (nouveau_query_object *)q; - nouveau_notifier_reset(nmesa->queryNotifier, nq->notifier_id); + nouveau_notifier_reset(ctx, nmesa->queryNotifier, nq->notifier_id); switch (nmesa->screen->card->type) { case NV_20: @@ -105,12 +105,13 @@ nouveauUpdateQuery(GLcontext *ctx, GLenum target, struct gl_query_object *q) nouveau_query_object *nq = (nouveau_query_object *)q; int status; - status = nouveau_notifier_status(nmesa->queryNotifier, + status = nouveau_notifier_status(ctx, nmesa->queryNotifier, nq->notifier_id); q->Ready = (status == NV_NOTIFY_STATE_STATUS_COMPLETED); if (q->Ready) - q->Result = nouveau_notifier_return_val(nmesa->queryNotifier, + q->Result = nouveau_notifier_return_val(ctx, + nmesa->queryNotifier, nq->notifier_id); } @@ -120,7 +121,7 @@ nouveauWaitQueryResult(GLcontext *ctx, GLenum target, struct gl_query_object *q) nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx); nouveau_query_object *nq = (nouveau_query_object *)q; - nouveau_notifier_wait_status(nmesa->queryNotifier, nq->notifier_id, + nouveau_notifier_wait_status(ctx, nmesa->queryNotifier, nq->notifier_id, NV_NOTIFY_STATE_STATUS_COMPLETED, 0); nouveauUpdateQuery(ctx, target, q); } diff --git a/src/mesa/drivers/dri/nouveau/nouveau_screen.c b/src/mesa/drivers/dri/nouveau/nouveau_screen.c index 7a4b9f1cd0..bc7f39b042 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_screen.c +++ b/src/mesa/drivers/dri/nouveau/nouveau_screen.c @@ -328,7 +328,7 @@ void * __driCreateNewScreen_20050727( __DRInativeDisplay *dpy, int scrn, __DRIsc static const __DRIversion ddx_expected = { 1, 2, 0 }; static const __DRIversion dri_expected = { 4, 0, 0 }; static const __DRIversion drm_expected = { 0, 0, NOUVEAU_DRM_HEADER_PATCHLEVEL }; -#if NOUVEAU_DRM_HEADER_PATCHLEVEL != 6 +#if NOUVEAU_DRM_HEADER_PATCHLEVEL != 7 #error nouveau_drm.h version doesn't match expected version #endif dri_interface = interface; diff --git a/src/mesa/drivers/dri/nouveau/nouveau_span.c b/src/mesa/drivers/dri/nouveau/nouveau_span.c index 74dec66afc..6e3f9fadf4 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_span.c +++ b/src/mesa/drivers/dri/nouveau/nouveau_span.c @@ -37,6 +37,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #define HAVE_HW_STENCIL_SPANS 0 #define HAVE_HW_STENCIL_PIXELS 0 +static char *fake_span[1280*1024*4]; + #define HW_CLIPLOOP() \ do { \ int _nc = nmesa->numClipRects; \ @@ -52,6 +54,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. GLuint height = nrb->mesa.Height; \ GLubyte *map = (GLubyte *)(nrb->map ? nrb->map : nrb->mem->map) + \ (nmesa->drawY * nrb->pitch) + (nmesa->drawX * nrb->cpp); \ + map = fake_span; \ GLuint p; \ (void) p; @@ -120,6 +123,6 @@ nouveauSpanSetFunctions(nouveau_renderbuffer *nrb, const GLvisual *vis) { if (nrb->mesa._ActualFormat == GL_RGBA8) nouveauInitPointers_ARGB8888(&nrb->mesa); - else if (nrb->mesa._ActualFormat == GL_RGB5) + else // if (nrb->mesa._ActualFormat == GL_RGB5) nouveauInitPointers_RGB565(&nrb->mesa); } diff --git a/src/mesa/drivers/dri/nouveau/nouveau_state.c b/src/mesa/drivers/dri/nouveau/nouveau_state.c index e9fd188d73..7cb805902a 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_state.c +++ b/src/mesa/drivers/dri/nouveau/nouveau_state.c @@ -60,14 +60,14 @@ static void nouveauCalcViewport(GLcontext *ctx) nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx); const GLfloat *v = ctx->Viewport._WindowMap.m; GLfloat *m = nmesa->viewport.m; - GLfloat xoffset = nmesa->drawX, yoffset = nmesa->drawY; + GLfloat xoffset = nmesa->drawX, yoffset = nmesa->drawY + nmesa->drawH; nmesa->depth_scale = 1.0 / ctx->DrawBuffer->_DepthMaxF; m[MAT_SX] = v[MAT_SX]; m[MAT_TX] = v[MAT_TX] + xoffset + SUBPIXEL_X; m[MAT_SY] = - v[MAT_SY]; - m[MAT_TY] = v[MAT_TY] + yoffset + SUBPIXEL_Y; + m[MAT_TY] = (-v[MAT_TY]) + yoffset + SUBPIXEL_Y; m[MAT_SZ] = v[MAT_SZ] * nmesa->depth_scale; m[MAT_TZ] = v[MAT_TZ] * nmesa->depth_scale; diff --git a/src/mesa/drivers/dri/nouveau/nouveau_sync.c b/src/mesa/drivers/dri/nouveau/nouveau_sync.c index 30e6696269..1d1eeede18 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_sync.c +++ b/src/mesa/drivers/dri/nouveau/nouveau_sync.c @@ -35,53 +35,51 @@ #include "nouveau_msg.h" #include "nouveau_sync.h" -nouveau_notifier * +#define NOTIFIER(__v) \ + nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx); \ + volatile uint32_t *__v = (void*)nmesa->notifier_block + notifier->offset + +drm_nouveau_notifier_alloc_t * nouveau_notifier_new(GLcontext *ctx, GLuint handle, GLuint count) { nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx); - nouveau_notifier *notifier; + drm_nouveau_notifier_alloc_t *notifier; + int ret; #ifdef NOUVEAU_RING_DEBUG return NULL; #endif - notifier = CALLOC_STRUCT(nouveau_notifier_t); + notifier = CALLOC_STRUCT(drm_nouveau_notifier_alloc); if (!notifier) return NULL; - notifier->mem = nouveau_mem_alloc(ctx, - NOUVEAU_MEM_FB | NOUVEAU_MEM_MAPPED, - count * NV_NOTIFIER_SIZE, - 0); - if (!notifier->mem) { - FREE(notifier); - return NULL; - } - - if (!nouveauCreateDmaObjectFromMem(nmesa, handle, NV_DMA_IN_MEMORY, - notifier->mem, - NOUVEAU_MEM_ACCESS_RW)) { - nouveau_mem_free(ctx, notifier->mem); + notifier->channel = nmesa->fifo.channel; + notifier->handle = handle; + notifier->count = count; + ret = drmCommandWriteRead(nmesa->driFd, DRM_NOUVEAU_NOTIFIER_ALLOC, + notifier, sizeof(*notifier)); + if (ret) { + MESSAGE("Failed to create notifier 0x%08x: %d\n", handle, ret); FREE(notifier); return NULL; } - notifier->handle = handle; return notifier; } void -nouveau_notifier_destroy(GLcontext *ctx, nouveau_notifier *notifier) +nouveau_notifier_destroy(GLcontext *ctx, drm_nouveau_notifier_alloc_t *notifier) { - /*XXX: free DMA object.. */ - nouveau_mem_free(ctx, notifier->mem); + /*XXX: free notifier object.. */ FREE(notifier); } void -nouveau_notifier_reset(nouveau_notifier *notifier, GLuint id) +nouveau_notifier_reset(GLcontext *ctx, drm_nouveau_notifier_alloc_t *notifier, + GLuint id) { - volatile GLuint *n = notifier->mem->map + (id * NV_NOTIFIER_SIZE); + NOTIFIER(n); #ifdef NOUVEAU_RING_DEBUG return; @@ -95,26 +93,29 @@ nouveau_notifier_reset(nouveau_notifier *notifier, GLuint id) } GLuint -nouveau_notifier_status(nouveau_notifier *notifier, GLuint id) +nouveau_notifier_status(GLcontext *ctx, drm_nouveau_notifier_alloc_t *notifier, + GLuint id) { - volatile GLuint *n = notifier->mem->map + (id * NV_NOTIFIER_SIZE); + NOTIFIER(n); return n[NV_NOTIFY_STATE/4] >> NV_NOTIFY_STATE_STATUS_SHIFT; } GLuint -nouveau_notifier_return_val(nouveau_notifier *notifier, GLuint id) +nouveau_notifier_return_val(GLcontext *ctx, + drm_nouveau_notifier_alloc_t *notifier, GLuint id) { - volatile GLuint *n = notifier->mem->map + (id * NV_NOTIFIER_SIZE); + NOTIFIER(n); return n[NV_NOTIFY_RETURN_VALUE/4]; } GLboolean -nouveau_notifier_wait_status(nouveau_notifier *notifier, GLuint id, +nouveau_notifier_wait_status(GLcontext *ctx, + drm_nouveau_notifier_alloc_t *notifier, GLuint id, GLuint status, GLuint timeout) { - volatile GLuint *n = notifier->mem->map + (id * NV_NOTIFIER_SIZE); + NOTIFIER(n); unsigned int time = 0; #ifdef NOUVEAU_RING_DEBUG @@ -144,13 +145,13 @@ nouveau_notifier_wait_status(nouveau_notifier *notifier, GLuint id, } void -nouveau_notifier_wait_nop(GLcontext *ctx, nouveau_notifier *notifier, - GLuint subc) +nouveau_notifier_wait_nop(GLcontext *ctx, + drm_nouveau_notifier_alloc_t *notifier, GLuint subc) { - nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx); + NOTIFIER(n); GLboolean ret; - nouveau_notifier_reset(notifier, 0); + nouveau_notifier_reset(ctx, notifier, 0); BEGIN_RING_SIZE(subc, NV_NOTIFY, 1); OUT_RING (NV_NOTIFY_STYLE_WRITE_ONLY); @@ -158,7 +159,7 @@ nouveau_notifier_wait_nop(GLcontext *ctx, nouveau_notifier *notifier, OUT_RING (0); FIRE_RING(); - ret = nouveau_notifier_wait_status(notifier, 0, + ret = nouveau_notifier_wait_status(ctx, notifier, 0, NV_NOTIFY_STATE_STATUS_COMPLETED, 0 /* no timeout */); if (ret == GL_FALSE) MESSAGE("wait on notifier failed\n"); diff --git a/src/mesa/drivers/dri/nouveau/nouveau_sync.h b/src/mesa/drivers/dri/nouveau/nouveau_sync.h index 019d5f6629..b56cc5fb54 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_sync.h +++ b/src/mesa/drivers/dri/nouveau/nouveau_sync.h @@ -47,21 +47,23 @@ #define NV_NOTIFY 0x00000104 #define NV_NOTIFY_STYLE_WRITE_ONLY 0 -typedef struct nouveau_notifier_t { - GLuint handle; - nouveau_mem *mem; -} nouveau_notifier; - -extern nouveau_notifier *nouveau_notifier_new(GLcontext *, GLuint handle, - GLuint count); -extern void nouveau_notifier_destroy(GLcontext *, nouveau_notifier *); -extern void nouveau_notifier_reset(nouveau_notifier *, GLuint id); -extern GLuint nouveau_notifier_status(nouveau_notifier *, GLuint id); -extern GLuint nouveau_notifier_return_val(nouveau_notifier *, GLuint id); -extern GLboolean nouveau_notifier_wait_status(nouveau_notifier *r, GLuint id, - GLuint status, GLuint timeout); -extern void nouveau_notifier_wait_nop(GLcontext *ctx, - nouveau_notifier *, GLuint subc); +extern drm_nouveau_notifier_alloc_t * +nouveau_notifier_new(GLcontext *, GLuint handle, GLuint count); +extern void +nouveau_notifier_destroy(GLcontext *, drm_nouveau_notifier_alloc_t *); +extern void +nouveau_notifier_reset(GLcontext *, drm_nouveau_notifier_alloc_t *, GLuint id); +extern GLuint +nouveau_notifier_status(GLcontext *, drm_nouveau_notifier_alloc_t *, GLuint id); +extern GLuint +nouveau_notifier_return_val(GLcontext *, drm_nouveau_notifier_alloc_t *, + GLuint id); +extern GLboolean +nouveau_notifier_wait_status(GLcontext *, drm_nouveau_notifier_alloc_t *, + GLuint id, GLuint status, GLuint timeout); +extern void +nouveau_notifier_wait_nop(GLcontext *ctx, drm_nouveau_notifier_alloc_t *, + GLuint subc); extern GLboolean nouveauSyncInitFuncs(GLcontext *ctx); #endif diff --git a/src/mesa/drivers/dri/nouveau/nv10_swtcl.c b/src/mesa/drivers/dri/nouveau/nv10_swtcl.c index 3bc84d862d..4576c1ede4 100644 --- a/src/mesa/drivers/dri/nouveau/nv10_swtcl.c +++ b/src/mesa/drivers/dri/nouveau/nv10_swtcl.c @@ -392,15 +392,6 @@ static inline void nv10OutputVertexFormat(struct nouveau_context* nmesa) int i; int slots=0; int total_size=0; - /* t_vertex_generic dereferences a NULL pointer if we - * pass NULL as the vp transform... - */ - const GLfloat ident_vp[16] = { - 1.0, 0.0, 0.0, 0.0, - 0.0, 1.0, 0.0, 0.0, - 0.0, 0.0, 1.0, 0.0, - 0.0, 0.0, 0.0, 1.0 - }; nmesa->vertex_attr_count = 0; RENDERINPUTS_COPY(index, nmesa->render_inputs_bitset); @@ -431,28 +422,20 @@ static inline void nv10OutputVertexFormat(struct nouveau_context* nmesa) if (RENDERINPUTS_TEST(index, i)) { slots=i+1; - if (i==_TNL_ATTRIB_POS) - { - /* special-case POS */ - EMIT_ATTR(_TNL_ATTRIB_POS,EMIT_3F_VIEWPORT); - } - else + switch(attr_size[i]) { - switch(attr_size[i]) - { - case 1: - EMIT_ATTR(i,EMIT_1F); - break; - case 2: - EMIT_ATTR(i,EMIT_2F); - break; - case 3: - EMIT_ATTR(i,EMIT_3F); - break; - case 4: - EMIT_ATTR(i,EMIT_4F); - break; - } + case 1: + EMIT_ATTR(i,EMIT_1F); + break; + case 2: + EMIT_ATTR(i,EMIT_2F); + break; + case 3: + EMIT_ATTR(i,EMIT_3F); + break; + case 4: + EMIT_ATTR(i,EMIT_4F); + break; } if (i==_TNL_ATTRIB_COLOR0) nmesa->color_offset=total_size; @@ -465,7 +448,7 @@ static inline void nv10OutputVertexFormat(struct nouveau_context* nmesa) nmesa->vertex_size=_tnl_install_attrs( ctx, nmesa->vertex_attrs, nmesa->vertex_attr_count, - ident_vp, 0 ); + NULL, 0 ); assert(nmesa->vertex_size==total_size*4); /* diff --git a/src/mesa/drivers/dri/nouveau/nv30_state.c b/src/mesa/drivers/dri/nouveau/nv30_state.c index ad21fa2730..9b010954b3 100644 --- a/src/mesa/drivers/dri/nouveau/nv30_state.c +++ b/src/mesa/drivers/dri/nouveau/nv30_state.c @@ -639,25 +639,45 @@ void (*ReadBuffer)( GLcontext *ctx, GLenum buffer ); /** Set rasterization mode */ void (*RenderMode)(GLcontext *ctx, GLenum mode ); +/* Translate GL coords to window coords, clamping w/h to the + * dimensions of the window. + */ +static void nv30WindowCoords(nouveauContextPtr nmesa, + GLuint x, GLuint y, GLuint w, GLuint h, + GLuint *wX, GLuint *wY, GLuint *wW, GLuint *wH) +{ + if ((x+w) > nmesa->drawW) + w = nmesa->drawW - x; + (*wX) = x + nmesa->drawX; + (*wW) = w; + + if ((y+h) > nmesa->drawH) + h = nmesa->drawH - y; + (*wY) = (nmesa->drawH - y) - h + nmesa->drawY; + (*wH) = h; +} + /** Define the scissor box */ static void nv30Scissor(GLcontext *ctx, GLint x, GLint y, GLsizei w, GLsizei h) { nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx); + GLuint wX, wY, wW, wH; /* There's no scissor enable bit, so adjust the scissor to cover the * maximum draw buffer bounds */ if (!ctx->Scissor.Enabled) { - x = y = 0; - w = h = 4095; + wX = nmesa->drawX; + wY = nmesa->drawY; + wW = nmesa->drawW; + wH = nmesa->drawH; } else { - x += nmesa->drawX; - y += nmesa->drawY; + nv30WindowCoords(nmesa, x, y, w, h, &wX, &wY, &wW, &wH); } BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_SCISSOR_WIDTH_XPOS, 2); - OUT_RING_CACHE(((w) << 16) | x); - OUT_RING_CACHE(((h) << 16) | y); + OUT_RING_CACHE ((wW << 16) | wX); + OUT_RING_CACHE ((wH << 16) | wY); } /** Select flat or smooth shading */ @@ -751,19 +771,21 @@ static void nv30WindowMoved(nouveauContextPtr nmesa) { GLcontext *ctx = nmesa->glCtx; GLfloat *v = nmesa->viewport.m; - GLuint w = ctx->Viewport.Width; - GLuint h = ctx->Viewport.Height; - GLuint x = ctx->Viewport.X + nmesa->drawX; - GLuint y = ctx->Viewport.Y + nmesa->drawY; + GLuint wX, wY, wW, wH; + nv30WindowCoords(nmesa, ctx->Viewport.X, ctx->Viewport.Y, + ctx->Viewport.Width, ctx->Viewport.Height, + &wX, &wY, &wW, &wH); BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_VIEWPORT_DIMS_0, 2); - OUT_RING_CACHE((w << 16) | x); - OUT_RING_CACHE((h << 16) | y); + OUT_RING_CACHE ((wW << 16) | wX); + OUT_RING_CACHE ((wH << 16) | wY); + /* something to do with clears, possibly doesn't belong here */ BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_VIEWPORT_COLOR_BUFFER_OFS0, 2); - OUT_RING_CACHE(((w+x) << 16) | x); - OUT_RING_CACHE(((h+y) << 16) | y); + OUT_RING_CACHE(((nmesa->drawX + nmesa->drawW) << 16) | nmesa->drawX); + OUT_RING_CACHE(((nmesa->drawY + nmesa->drawH) << 16) | nmesa->drawY); + /* viewport transform */ BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_VIEWPORT_XFRM_OX, 8); OUT_RING_CACHEf (v[MAT_TX]); @@ -786,7 +808,7 @@ static GLboolean nv30InitCard(nouveauContextPtr nmesa) BEGIN_RING_SIZE(NvSub3D, NV30_TCL_PRIMITIVE_3D_SET_OBJECT1, 3); OUT_RING(NvDmaFB); - OUT_RING(NvDmaAGP); + OUT_RING(NvDmaTT); OUT_RING(NvDmaFB); BEGIN_RING_SIZE(NvSub3D, NV30_TCL_PRIMITIVE_3D_SET_OBJECT8, 1); OUT_RING(NvDmaFB); diff --git a/src/mesa/drivers/dri/r200/r200_cmdbuf.c b/src/mesa/drivers/dri/r200/r200_cmdbuf.c index 2920ceafd3..c1d51e8700 100644 --- a/src/mesa/drivers/dri/r200/r200_cmdbuf.c +++ b/src/mesa/drivers/dri/r200/r200_cmdbuf.c @@ -1,4 +1,3 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_cmdbuf.c,v 1.1 2002/10/30 12:51:51 alanh Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. diff --git a/src/mesa/drivers/dri/r200/r200_context.c b/src/mesa/drivers/dri/r200/r200_context.c index 3abcdf9e18..5a178442bd 100644 --- a/src/mesa/drivers/dri/r200/r200_context.c +++ b/src/mesa/drivers/dri/r200/r200_context.c @@ -1,4 +1,3 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_context.c,v 1.3 2003/05/06 23:52:08 daenzer Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. @@ -192,7 +191,6 @@ static const struct tnl_pipeline_stage *r200_pipeline[] = { &_tnl_texgen_stage, &_tnl_texture_transform_stage, &_tnl_point_attenuation_stage, - &_tnl_arb_vertex_program_stage, &_tnl_vertex_program_stage, /* Try again to go to tcl? * - no good for asymmetric-twoside (do with multipass) @@ -680,7 +678,6 @@ r200MakeCurrent( __DRIcontextPrivate *driContextPriv, newCtx->dri.drawable = driDrawPriv; r200SetCliprects(newCtx); - r200UpdateWindow( newCtx->glCtx ); r200UpdateViewportOffset( newCtx->glCtx ); } diff --git a/src/mesa/drivers/dri/r200/r200_context.h b/src/mesa/drivers/dri/r200/r200_context.h index e840a502c0..bec09e8ef6 100644 --- a/src/mesa/drivers/dri/r200/r200_context.h +++ b/src/mesa/drivers/dri/r200/r200_context.h @@ -1,4 +1,3 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_context.h,v 1.2 2002/12/16 16:18:54 dawes Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.c b/src/mesa/drivers/dri/r200/r200_ioctl.c index 463bd64415..2366bde525 100644 --- a/src/mesa/drivers/dri/r200/r200_ioctl.c +++ b/src/mesa/drivers/dri/r200/r200_ioctl.c @@ -1,4 +1,3 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_ioctl.c,v 1.4 2002/12/17 00:32:56 dawes Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.h b/src/mesa/drivers/dri/r200/r200_ioctl.h index f53752739d..5ed1555f6a 100644 --- a/src/mesa/drivers/dri/r200/r200_ioctl.h +++ b/src/mesa/drivers/dri/r200/r200_ioctl.h @@ -1,4 +1,3 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_ioctl.h,v 1.1 2002/10/30 12:51:52 alanh Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. diff --git a/src/mesa/drivers/dri/r200/r200_lock.c b/src/mesa/drivers/dri/r200/r200_lock.c index b050dd7802..f89b526a31 100644 --- a/src/mesa/drivers/dri/r200/r200_lock.c +++ b/src/mesa/drivers/dri/r200/r200_lock.c @@ -1,4 +1,3 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_lock.c,v 1.1 2002/10/30 12:51:52 alanh Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. diff --git a/src/mesa/drivers/dri/r200/r200_lock.h b/src/mesa/drivers/dri/r200/r200_lock.h index e4c3a7e935..4ff98907fb 100644 --- a/src/mesa/drivers/dri/r200/r200_lock.h +++ b/src/mesa/drivers/dri/r200/r200_lock.h @@ -1,4 +1,3 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_lock.h,v 1.1 2002/10/30 12:51:52 alanh Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. diff --git a/src/mesa/drivers/dri/r200/r200_maos.h b/src/mesa/drivers/dri/r200/r200_maos.h index 4998f67445..d3ed06d402 100644 --- a/src/mesa/drivers/dri/r200/r200_maos.h +++ b/src/mesa/drivers/dri/r200/r200_maos.h @@ -1,4 +1,3 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_maos.h,v 1.1 2002/10/30 12:51:52 alanh Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. diff --git a/src/mesa/drivers/dri/r200/r200_maos_arrays.c b/src/mesa/drivers/dri/r200/r200_maos_arrays.c index 3162b508c2..7bc05e2f0b 100644 --- a/src/mesa/drivers/dri/r200/r200_maos_arrays.c +++ b/src/mesa/drivers/dri/r200/r200_maos_arrays.c @@ -1,4 +1,3 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_maos_arrays.c,v 1.3 2003/02/23 23:59:01 dawes Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. diff --git a/src/mesa/drivers/dri/r200/r200_pixel.c b/src/mesa/drivers/dri/r200/r200_pixel.c index 7b060f9cf0..2f5aab0744 100644 --- a/src/mesa/drivers/dri/r200/r200_pixel.c +++ b/src/mesa/drivers/dri/r200/r200_pixel.c @@ -1,4 +1,3 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_pixel.c,v 1.2 2002/12/16 16:18:54 dawes Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. diff --git a/src/mesa/drivers/dri/r200/r200_pixel.h b/src/mesa/drivers/dri/r200/r200_pixel.h index 8f3923b6b1..e62aa05d74 100644 --- a/src/mesa/drivers/dri/r200/r200_pixel.h +++ b/src/mesa/drivers/dri/r200/r200_pixel.h @@ -1,4 +1,3 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_pixel.h,v 1.1 2002/10/30 12:51:52 alanh Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. diff --git a/src/mesa/drivers/dri/r200/r200_reg.h b/src/mesa/drivers/dri/r200/r200_reg.h index a88ea4cec2..5ce287f7a5 100644 --- a/src/mesa/drivers/dri/r200/r200_reg.h +++ b/src/mesa/drivers/dri/r200/r200_reg.h @@ -1,4 +1,3 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_reg.h,v 1.2 2002/12/16 16:18:54 dawes Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. diff --git a/src/mesa/drivers/dri/r200/r200_sanity.c b/src/mesa/drivers/dri/r200/r200_sanity.c index 3f2a866530..00d2f65c99 100644 --- a/src/mesa/drivers/dri/r200/r200_sanity.c +++ b/src/mesa/drivers/dri/r200/r200_sanity.c @@ -1,4 +1,3 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_sanity.c,v 1.1 2002/10/30 12:51:52 alanh Exp $ */ /************************************************************************** Copyright 2002 ATI Technologies Inc., Ontario, Canada, and diff --git a/src/mesa/drivers/dri/r200/r200_span.c b/src/mesa/drivers/dri/r200/r200_span.c index 6e99dfe159..fe427bdcde 100644 --- a/src/mesa/drivers/dri/r200/r200_span.c +++ b/src/mesa/drivers/dri/r200/r200_span.c @@ -1,4 +1,3 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_span.c,v 1.1 2002/10/30 12:51:52 alanh Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. diff --git a/src/mesa/drivers/dri/r200/r200_span.h b/src/mesa/drivers/dri/r200/r200_span.h index 5e7d3e4282..bae5644309 100644 --- a/src/mesa/drivers/dri/r200/r200_span.h +++ b/src/mesa/drivers/dri/r200/r200_span.h @@ -1,4 +1,3 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_span.h,v 1.1 2002/10/30 12:51:52 alanh Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c index 16726d7d55..2115799b9b 100644 --- a/src/mesa/drivers/dri/r200/r200_state.c +++ b/src/mesa/drivers/dri/r200/r200_state.c @@ -1,4 +1,3 @@ -/* $XFree86$ */ /************************************************************************** Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. diff --git a/src/mesa/drivers/dri/r200/r200_state.h b/src/mesa/drivers/dri/r200/r200_state.h index f34090b619..a917163a00 100644 --- a/src/mesa/drivers/dri/r200/r200_state.h +++ b/src/mesa/drivers/dri/r200/r200_state.h @@ -1,4 +1,3 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_state.h,v 1.2 2002/11/05 17:46:08 tsi Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. diff --git a/src/mesa/drivers/dri/r200/r200_state_init.c b/src/mesa/drivers/dri/r200/r200_state_init.c index b40d0bdcb7..0c36cefc16 100644 --- a/src/mesa/drivers/dri/r200/r200_state_init.c +++ b/src/mesa/drivers/dri/r200/r200_state_init.c @@ -1,4 +1,3 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_state_init.c,v 1.4 2003/02/22 06:21:11 dawes Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. diff --git a/src/mesa/drivers/dri/r200/r200_swtcl.c b/src/mesa/drivers/dri/r200/r200_swtcl.c index 25d229d8ed..a1ea0198be 100644 --- a/src/mesa/drivers/dri/r200/r200_swtcl.c +++ b/src/mesa/drivers/dri/r200/r200_swtcl.c @@ -1,4 +1,3 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_swtcl.c,v 1.5 2003/05/06 23:52:08 daenzer Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. diff --git a/src/mesa/drivers/dri/r200/r200_swtcl.h b/src/mesa/drivers/dri/r200/r200_swtcl.h index ccf817988c..7458c54928 100644 --- a/src/mesa/drivers/dri/r200/r200_swtcl.h +++ b/src/mesa/drivers/dri/r200/r200_swtcl.h @@ -1,4 +1,3 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_swtcl.h,v 1.3 2003/05/06 23:52:08 daenzer Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. diff --git a/src/mesa/drivers/dri/r200/r200_tcl.c b/src/mesa/drivers/dri/r200/r200_tcl.c index e0c32b26d9..2ad35d4390 100644 --- a/src/mesa/drivers/dri/r200/r200_tcl.c +++ b/src/mesa/drivers/dri/r200/r200_tcl.c @@ -1,4 +1,3 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_tcl.c,v 1.2 2002/12/16 16:18:55 dawes Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. diff --git a/src/mesa/drivers/dri/r200/r200_tcl.h b/src/mesa/drivers/dri/r200/r200_tcl.h index ac5bc11946..f191ddc7eb 100644 --- a/src/mesa/drivers/dri/r200/r200_tcl.h +++ b/src/mesa/drivers/dri/r200/r200_tcl.h @@ -1,4 +1,3 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_tcl.h,v 1.2 2002/12/16 16:18:55 dawes Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. diff --git a/src/mesa/drivers/dri/r200/r200_tex.c b/src/mesa/drivers/dri/r200/r200_tex.c index 6c6450c681..e7a37dd4c9 100644 --- a/src/mesa/drivers/dri/r200/r200_tex.c +++ b/src/mesa/drivers/dri/r200/r200_tex.c @@ -1,4 +1,3 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_tex.c,v 1.2 2002/11/05 17:46:08 tsi Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. @@ -182,7 +181,7 @@ static void r200SetTexMaxAnisotropy( r200TexObjPtr t, GLfloat max ) { t->pp_txfilter &= ~R200_MAX_ANISO_MASK; - if ( max == 1.0 ) { + if ( max <= 1.0 ) { t->pp_txfilter |= R200_MAX_ANISO_1_TO_1; } else if ( max <= 2.0 ) { t->pp_txfilter |= R200_MAX_ANISO_2_TO_1; @@ -483,7 +482,7 @@ r200ValidateClientStorage( GLcontext *ctx, GLenum target, { r200ContextPtr rmesa = R200_CONTEXT(ctx); - if (0) + if ( R200_DEBUG & DEBUG_TEXTURE ) fprintf(stderr, "intformat %s format %s type %s\n", _mesa_lookup_enum_by_nr( internalFormat ), _mesa_lookup_enum_by_nr( format ), @@ -549,7 +548,7 @@ r200ValidateClientStorage( GLcontext *ctx, GLenum target, format, type); - if (0) + if ( R200_DEBUG & DEBUG_TEXTURE ) fprintf(stderr, "%s: srcRowStride %d/%x\n", __FUNCTION__, srcRowStride, srcRowStride); diff --git a/src/mesa/drivers/dri/r200/r200_tex.h b/src/mesa/drivers/dri/r200/r200_tex.h index 4438cc02a8..e6c0e00eb0 100644 --- a/src/mesa/drivers/dri/r200/r200_tex.h +++ b/src/mesa/drivers/dri/r200/r200_tex.h @@ -1,4 +1,3 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_tex.h,v 1.1 2002/10/30 12:51:53 alanh Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. diff --git a/src/mesa/drivers/dri/r200/r200_texmem.c b/src/mesa/drivers/dri/r200/r200_texmem.c index 28988c9755..d926313d57 100644 --- a/src/mesa/drivers/dri/r200/r200_texmem.c +++ b/src/mesa/drivers/dri/r200/r200_texmem.c @@ -1,4 +1,3 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_texmem.c,v 1.5 2002/12/17 00:32:56 dawes Exp $ */ /************************************************************************** Copyright (C) Tungsten Graphics 2002. All Rights Reserved. diff --git a/src/mesa/drivers/dri/r200/r200_texstate.c b/src/mesa/drivers/dri/r200/r200_texstate.c index 875d3bab73..ae02ec4b63 100644 --- a/src/mesa/drivers/dri/r200/r200_texstate.c +++ b/src/mesa/drivers/dri/r200/r200_texstate.c @@ -1,4 +1,3 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_texstate.c,v 1.3 2003/02/15 22:18:47 dawes Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. diff --git a/src/mesa/drivers/dri/r300/.gitignore b/src/mesa/drivers/dri/r300/.gitignore index 3773d8ea73..3689a6a78e 100644 --- a/src/mesa/drivers/dri/r300/.gitignore +++ b/src/mesa/drivers/dri/r300/.gitignore @@ -1,3 +1,4 @@ radeon_chipset.h -radeon_screen.* +radeon_screen.[ch] +radeon_span.h server diff --git a/src/mesa/drivers/dri/r300/Lindent b/src/mesa/drivers/dri/r300/Lindent new file mode 100755 index 0000000000..7d8d8896e3 --- /dev/null +++ b/src/mesa/drivers/dri/r300/Lindent @@ -0,0 +1,2 @@ +#!/bin/sh +indent -npro -kr -i8 -ts8 -sob -l80 -ss -ncs "$@" diff --git a/src/mesa/drivers/dri/r300/Makefile b/src/mesa/drivers/dri/r300/Makefile index d4bf0ae892..44248964fd 100644 --- a/src/mesa/drivers/dri/r300/Makefile +++ b/src/mesa/drivers/dri/r300/Makefile @@ -1,6 +1,5 @@ # src/mesa/drivers/dri/r300/Makefile - TOP = ../../../../.. include $(TOP)/configs/current @@ -28,8 +27,7 @@ DRIVER_SOURCES = \ radeon_lock.c \ radeon_span.c \ radeon_state.c \ - radeon_mm.c \ - radeon_vtxfmt_a.c \ + r300_mem.c \ \ r300_context.c \ r300_ioctl.c \ @@ -42,34 +40,13 @@ DRIVER_SOURCES = \ r300_vertprog.c \ r300_fragprog.c \ r300_shader.c \ - r300_maos.c \ + r300_emit.c \ + r300_swtcl.c \ $(EGL_SOURCES) -# \ -# r200_context.c \ -# r200_ioctl.c \ -# r200_state.c \ -# r200_state_init.c \ -# r200_cmdbuf.c \ -# r200_pixel.c \ -# r200_tex.c \ -# r200_texmem.c \ -# r200_texstate.c \ -# r200_swtcl.c \ -# r200_maos.c \ -# r200_sanity.c \ -# r200_vtxfmt.c \ -# r200_vtxfmt_c.c \ -# r200_vtxfmt_sse.c \ -# r200_vtxfmt_x86.c - - C_SOURCES = $(COMMON_SOURCES) $(DRIVER_SOURCES) -X86_SOURCES = -#r200_vtxtmp_x86.S - -DRIVER_DEFINES = -DCOMPILE_R300 -DGLX_DIRECT_RENDERING -DR200_MERGED=0 \ +DRIVER_DEFINES = -DCOMPILE_R300 -DR200_MERGED=0 \ -DRADEON_COMMON=1 -DRADEON_COMMON_FOR_R300 SYMLINKS = \ @@ -83,11 +60,11 @@ SYMLINKS = \ COMMON_SYMLINKS = \ radeon_chipset.h \ radeon_screen.c \ - radeon_screen.h + radeon_screen.h \ + radeon_span.h ##### TARGETS ##### - include ../Makefile.template server: @@ -100,4 +77,3 @@ $(COMMON_SYMLINKS): @[ -e $@ ] || ln -sf ../radeon/$@ ./ symlinks: $(SYMLINKS) $(COMMON_SYMLINKS) - diff --git a/src/mesa/drivers/dri/r300/pixel_shader.h b/src/mesa/drivers/dri/r300/pixel_shader.h deleted file mode 100644 index 0d04859f9b..0000000000 --- a/src/mesa/drivers/dri/r300/pixel_shader.h +++ /dev/null @@ -1,103 +0,0 @@ -#ifndef __PIXEL_SHADER_H__ -#define __PIXEL_SHADER_H__ - -#include "r300_reg.h" - - -/* INSTR 0 */ - -#define PFS_OP_MAD 0 -#define PFS_OP_DP3 1 -#define PFS_OP_DP4 2 -#define PFS_OP_MIN 4 -#define PFS_OP_MAX 5 -#define PFS_OP_CMP 8 -#define PFS_OP_FRC 9 -#define PFS_OP_OUTC_REPL_ALPHA 10 - -/* "or" these with arg0 value to negate or take absolute value of an argument */ -#define PFS_ARG_NEG (1<<5) -#define PFS_ARG_ABS (1<<6) - -#define MAKE_PFS_INSTR0(op, arg0, arg1, arg2, flags) \ - ( ((op)<<23) \ - | ((arg0)<<R300_FPI0_ARG0C_SHIFT) \ - | ((arg1)<<R300_FPI0_ARG1C_SHIFT) \ - | ((arg2)<<R300_FPI0_ARG2C_SHIFT) \ - | (flags) \ - ) - -#define PFS_FLAG_X 1 -#define PFS_FLAG_Y 2 -#define PFS_FLAG_XY 3 -#define PFS_FLAG_Z 4 -#define PFS_FLAG_XZ 5 -#define PFS_FLAG_YZ 6 -#define PFS_FLAG_ALL 7 -#define PFS_FLAG_NONE 0 - -#define EASY_PFS_INSTR0(op, arg0, arg1, arg2) \ - MAKE_PFS_INSTR0(PFS_OP_##op, \ - R300_FPI0_ARGC_##arg0, \ - R300_FPI0_ARGC_##arg1, \ - R300_FPI0_ARGC_##arg2, \ - 0) - -/* INSTR 1 */ - -#define PFS_FLAG_CONST (1<<5) - -#define MAKE_PFS_INSTR1(dstc, src0, src1, src2, reg, output) \ - ((src0) | ((src1) << R300_FPI1_SRC1C_SHIFT) \ - | ((src2)<<R300_FPI1_SRC2C_SHIFT) \ - | ((dstc) << R300_FPI1_DSTC_SHIFT) \ - | ((reg) << 23) | ((output)<<26)) - -#define EASY_PFS_INSTR1(dstc, src0, src1, src2, reg, output) \ - MAKE_PFS_INSTR1(dstc, src0, src1, src2, PFS_FLAG_##reg, PFS_FLAG_##output) - -/* INSTR 2 */ - -/* you can "or" PFS_ARG_NEG with these values to negate them */ - -#define MAKE_PFS_INSTR2(op, arg0, arg1, arg2, flags) \ - (((op) << 23) | \ - ((arg0)<<R300_FPI2_ARG0A_SHIFT) | \ - ((arg1)<<R300_FPI2_ARG1A_SHIFT) | \ - ((arg2)<<R300_FPI2_ARG2A_SHIFT) | \ - (flags)) - -#define EASY_PFS_INSTR2(op, arg0, arg1, arg2) \ - MAKE_PFS_INSTR2(R300_FPI2_OUTA_##op, \ - R300_FPI2_ARGA_##arg0, \ - R300_FPI2_ARGA_##arg1, \ - R300_FPI2_ARGA_##arg2, \ - 0) - - -/* INSTR 3 */ - -#define PFS_FLAG_NONE 0 -#define PFS_FLAG_REG 1 -#define PFS_FLAG_OUTPUT 2 -#define PFS_FLAG_BOTH 3 - -#define MAKE_PFS_INSTR3(dstc, src0, src1, src2, flags) \ - ((src0) | ((src1) << R300_FPI1_SRC1C_SHIFT) \ - | ((src2)<<R300_FPI1_SRC2C_SHIFT) \ - | ((dstc) << R300_FPI1_DSTC_SHIFT) \ - | ((flags) << 23)) - -#define EASY_PFS_INSTR3(dstc, src0, src1, src2, flag) \ - MAKE_PFS_INSTR3(dstc, src0, src1, src2, PFS_FLAG_##flag) - - /* What are 0's ORed with flags ? They are register numbers that - just happen to be 0 */ -#define PFS_NOP { \ - EASY_PFS_INSTR0(MAD, SRC0C_XYZ, ONE, ZERO), \ - EASY_PFS_INSTR1(0, 0, 0 | PFS_FLAG_CONST, 0 | PFS_FLAG_CONST, NONE, ALL), \ - EASY_PFS_INSTR2(MAD, SRC0A, ONE, ZERO), \ - EASY_PFS_INSTR3(0, 0, 0 | PFS_FLAG_CONST, 0 | PFS_FLAG_CONST, OUTPUT) \ - } - -#endif diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.c b/src/mesa/drivers/dri/r300/r300_cmdbuf.c index 0fb2e5a2e0..9eca41fa38 100644 --- a/src/mesa/drivers/dri/r300/r300_cmdbuf.c +++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.c @@ -27,9 +27,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ -/* - * Authors: - * Nicolai Haehnle <prefect_@gmx.net> +/** + * \file + * + * \author Nicolai Haehnle <prefect_@gmx.net> */ #include "glheader.h" @@ -52,15 +53,13 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "r300_emit.h" #include "r300_state.h" - // Set this to 1 for extremely verbose debugging of command buffers #define DEBUG_CMDBUF 0 - /** * Send the current command buffer via ioctl to the hardware. */ -int r300FlushCmdBufLocked(r300ContextPtr r300, const char* caller) +int r300FlushCmdBufLocked(r300ContextPtr r300, const char *caller) { int ret; int i; @@ -83,22 +82,24 @@ int r300FlushCmdBufLocked(r300ContextPtr r300, const char* caller) r300->cmdbuf.cmd_buf[i]); } - cmd.buf = (char*)(r300->cmdbuf.cmd_buf + start); + cmd.buf = (char *)(r300->cmdbuf.cmd_buf + start); cmd.bufsz = (r300->cmdbuf.count_used - start) * 4; if (r300->radeon.state.scissor.enabled) { cmd.nbox = r300->radeon.state.scissor.numClipRects; - cmd.boxes = (drm_clip_rect_t *)r300->radeon.state.scissor.pClipRects; + cmd.boxes = + (drm_clip_rect_t *) r300->radeon.state.scissor.pClipRects; } else { cmd.nbox = r300->radeon.numClipRects; - cmd.boxes = (drm_clip_rect_t *)r300->radeon.pClipRects; + cmd.boxes = (drm_clip_rect_t *) r300->radeon.pClipRects; } - + ret = drmCommandWrite(r300->radeon.dri.fd, - DRM_RADEON_CMDBUF, &cmd, sizeof(cmd)); - + DRM_RADEON_CMDBUF, &cmd, sizeof(cmd)); + if (RADEON_DEBUG & DEBUG_SYNC) { - fprintf(stderr, "Syncing in %s (from %s)\n\n", __FUNCTION__, caller); + fprintf(stderr, "Syncing in %s (from %s)\n\n", + __FUNCTION__, caller); radeonWaitForIdleLocked(&r300->radeon); } @@ -109,37 +110,38 @@ int r300FlushCmdBufLocked(r300ContextPtr r300, const char* caller) return ret; } - -int r300FlushCmdBuf(r300ContextPtr r300, const char* caller) +int r300FlushCmdBuf(r300ContextPtr r300, const char *caller) { int ret; LOCK_HARDWARE(&r300->radeon); - ret=r300FlushCmdBufLocked(r300, caller); + ret = r300FlushCmdBufLocked(r300, caller); UNLOCK_HARDWARE(&r300->radeon); if (ret) { - fprintf(stderr, "drmRadeonCmdBuffer: %d (exiting)\n", ret); - exit(ret); + fprintf(stderr, "drmRadeonCmdBuffer: %d\n", ret); + _mesa_exit(ret); } return ret; } - -void r300_print_state_atom(r300ContextPtr r300, struct r300_state_atom *state) +static void r300PrintStateAtom(r300ContextPtr r300, struct r300_state_atom *state) { int i; - int dwords = (*state->check)(r300, state); + int dwords = (*state->check) (r300, state); - fprintf(stderr, " emit %s/%d/%d\n", state->name, dwords, state->cmd_size); + fprintf(stderr, " emit %s %d/%d\n", state->name, dwords, + state->cmd_size); - if (RADEON_DEBUG & DEBUG_VERBOSE) - for (i = 0; i < dwords; i++) - fprintf(stderr, " %s[%d]: %08X\n", state->name, i, - state->cmd[i]); + if (RADEON_DEBUG & DEBUG_VERBOSE) { + for (i = 0; i < dwords; i++) { + fprintf(stderr, " %s[%d]: %08x\n", + state->name, i, state->cmd[i]); + } + } } /** @@ -148,58 +150,51 @@ void r300_print_state_atom(r300ContextPtr r300, struct r300_state_atom *state) * The caller must have ensured that there is enough space in the command * buffer. */ -static __inline__ void r300DoEmitState(r300ContextPtr r300, GLboolean dirty) +static inline void r300EmitAtoms(r300ContextPtr r300, GLboolean dirty) { - struct r300_state_atom* atom; - uint32_t* dest; + struct r300_state_atom *atom; + uint32_t *dest; + int dwords; dest = r300->cmdbuf.cmd_buf + r300->cmdbuf.count_used; - if (DEBUG_CMDBUF && RADEON_DEBUG & DEBUG_STATE) { - foreach(atom, &r300->hw.atomlist) { - if ((atom->dirty || r300->hw.all_dirty) == dirty) { - int dwords = (*atom->check)(r300, atom); - - if (dwords) - r300_print_state_atom(r300, atom); - else - fprintf(stderr, " skip state %s\n", - atom->name); - } - } - } - /* Emit WAIT */ *dest = cmdwait(R300_WAIT_3D | R300_WAIT_3D_CLEAN); - dest ++; - r300->cmdbuf.count_used ++; + dest++; + r300->cmdbuf.count_used++; /* Emit cache flush */ *dest = cmdpacket0(R300_TX_CNTL, 1); - dest ++; - r300->cmdbuf.count_used ++; - + dest++; + r300->cmdbuf.count_used++; + *dest = R300_TX_FLUSH; - dest ++; - r300->cmdbuf.count_used ++; - + dest++; + r300->cmdbuf.count_used++; + /* Emit END3D */ *dest = cmdpacify(); - dest ++; - r300->cmdbuf.count_used ++; - + dest++; + r300->cmdbuf.count_used++; /* Emit actual atoms */ foreach(atom, &r300->hw.atomlist) { if ((atom->dirty || r300->hw.all_dirty) == dirty) { - int dwords = (*atom->check)(r300, atom); - + dwords = (*atom->check) (r300, atom); if (dwords) { - memcpy(dest, atom->cmd, dwords*4); + if (DEBUG_CMDBUF && RADEON_DEBUG & DEBUG_STATE) { + r300PrintStateAtom(r300, atom); + } + memcpy(dest, atom->cmd, dwords * 4); dest += dwords; r300->cmdbuf.count_used += dwords; atom->dirty = GL_FALSE; + } else { + if (DEBUG_CMDBUF && RADEON_DEBUG & DEBUG_STATE) { + fprintf(stderr, " skip state %s\n", + atom->name); + } } } } @@ -216,7 +211,8 @@ void r300EmitState(r300ContextPtr r300) if (RADEON_DEBUG & (DEBUG_STATE | DEBUG_PRIMS)) fprintf(stderr, "%s\n", __FUNCTION__); - if (r300->cmdbuf.count_used && !r300->hw.is_dirty && !r300->hw.all_dirty) + if (r300->cmdbuf.count_used && !r300->hw.is_dirty + && !r300->hw.all_dirty) return; /* To avoid going across the entire set of states multiple times, just check @@ -229,14 +225,14 @@ void r300EmitState(r300ContextPtr r300) if (RADEON_DEBUG & DEBUG_STATE) fprintf(stderr, "Begin reemit state\n"); - r300DoEmitState(r300, GL_FALSE); + r300EmitAtoms(r300, GL_FALSE); r300->cmdbuf.count_reemit = r300->cmdbuf.count_used; } if (RADEON_DEBUG & DEBUG_STATE) fprintf(stderr, "Begin dirty state\n"); - r300DoEmitState(r300, GL_TRUE); + r300EmitAtoms(r300, GL_TRUE); assert(r300->cmdbuf.count_used < r300->cmdbuf.size); @@ -244,36 +240,39 @@ void r300EmitState(r300ContextPtr r300) r300->hw.all_dirty = GL_FALSE; } -#define CHECK( NM, COUNT ) \ -static int check_##NM( r300ContextPtr r300, \ - struct r300_state_atom* atom ) \ -{ \ - (void) atom; (void) r300; \ - return (COUNT); \ -} - #define packet0_count(ptr) (((drm_r300_cmd_header_t*)(ptr))->packet0.count) #define vpu_count(ptr) (((drm_r300_cmd_header_t*)(ptr))->vpu.count) -CHECK( always, atom->cmd_size ) -CHECK( variable, packet0_count(atom->cmd) ? (1 + packet0_count(atom->cmd)) : 0 ) -CHECK( vpu, vpu_count(atom->cmd) ? (1 + vpu_count(atom->cmd)*4) : 0 ) +static int check_always(r300ContextPtr r300, struct r300_state_atom *atom) +{ + return atom->cmd_size; +} -#undef packet0_count -#undef vpu_count +static int check_variable(r300ContextPtr r300, struct r300_state_atom *atom) +{ + int cnt; + cnt = packet0_count(atom->cmd); + return cnt ? cnt + 1 : 0; +} -#define ALLOC_STATE( ATOM, CHK, SZ, NM, IDX ) \ +static int check_vpu(r300ContextPtr r300, struct r300_state_atom *atom) +{ + int cnt; + cnt = vpu_count(atom->cmd); + return cnt ? (cnt * 4) + 1 : 0; +} + +#define ALLOC_STATE( ATOM, CHK, SZ, IDX ) \ do { \ r300->hw.ATOM.cmd_size = (SZ); \ r300->hw.ATOM.cmd = (uint32_t*)CALLOC((SZ) * sizeof(uint32_t)); \ - r300->hw.ATOM.name = (NM); \ + r300->hw.ATOM.name = #ATOM; \ r300->hw.ATOM.idx = (IDX); \ r300->hw.ATOM.check = check_##CHK; \ r300->hw.ATOM.dirty = GL_FALSE; \ r300->hw.max_state_size += (SZ); \ + insert_at_tail(&r300->hw.atomlist, &r300->hw.ATOM); \ } while (0) - - /** * Allocate memory for the command buffer and initialize the state atom * list. Note that the initial hardware state is set by r300InitState(). @@ -281,292 +280,246 @@ CHECK( vpu, vpu_count(atom->cmd) ? (1 + vpu_count(atom->cmd)*4) : 0 ) void r300InitCmdBuf(r300ContextPtr r300) { int size, mtu; - - r300->hw.max_state_size = 2+2; /* reserve extra space for WAIT_IDLE and tex cache flush */ + int has_tcl = 1; + + if (!(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) + has_tcl = 0; + + r300->hw.max_state_size = 2 + 2; /* reserve extra space for WAIT_IDLE and tex cache flush */ mtu = r300->radeon.glCtx->Const.MaxTextureUnits; if (RADEON_DEBUG & DEBUG_TEXTURE) { fprintf(stderr, "Using %d maximum texture units..\n", mtu); } + /* Setup the atom linked list */ + make_empty_list(&r300->hw.atomlist); + r300->hw.atomlist.name = "atom-list"; + /* Initialize state atoms */ - ALLOC_STATE( vpt, always, R300_VPT_CMDSIZE, "vpt", 0 ); - r300->hw.vpt.cmd[R300_VPT_CMD_0] = cmdpacket0(R300_SE_VPORT_XSCALE, 6); - ALLOC_STATE( vap_cntl, always, 2, "vap_cntl", 0 ); - r300->hw.vap_cntl.cmd[0] = cmdpacket0(R300_VAP_CNTL, 1); - ALLOC_STATE( vte, always, 3, "vte", 0 ); - r300->hw.vte.cmd[0] = cmdpacket0(R300_SE_VTE_CNTL, 2); - ALLOC_STATE( unk2134, always, 3, "unk2134", 0 ); - r300->hw.unk2134.cmd[0] = cmdpacket0(0x2134, 2); - ALLOC_STATE( vap_cntl_status, always, 2, "vap_cntl_status", 0 ); - r300->hw.vap_cntl_status.cmd[0] = cmdpacket0(R300_VAP_CNTL_STATUS, 1); - ALLOC_STATE( vir[0], variable, R300_VIR_CMDSIZE, "vir/0", 0 ); - r300->hw.vir[0].cmd[R300_VIR_CMD_0] = cmdpacket0(R300_VAP_INPUT_ROUTE_0_0, 1); - ALLOC_STATE( vir[1], variable, R300_VIR_CMDSIZE, "vir/1", 1 ); - r300->hw.vir[1].cmd[R300_VIR_CMD_0] = cmdpacket0(R300_VAP_INPUT_ROUTE_1_0, 1); - ALLOC_STATE( vic, always, R300_VIC_CMDSIZE, "vic", 0 ); - r300->hw.vic.cmd[R300_VIC_CMD_0] = cmdpacket0(R300_VAP_INPUT_CNTL_0, 2); - ALLOC_STATE( unk21DC, always, 2, "unk21DC", 0 ); - r300->hw.unk21DC.cmd[0] = cmdpacket0(0x21DC, 1); - ALLOC_STATE( unk221C, always, 2, "unk221C", 0 ); - r300->hw.unk221C.cmd[0] = cmdpacket0(R300_VAP_UNKNOWN_221C, 1); - ALLOC_STATE( unk2220, always, 5, "unk2220", 0 ); - r300->hw.unk2220.cmd[0] = cmdpacket0(0x2220, 4); - ALLOC_STATE( unk2288, always, 2, "unk2288", 0 ); + ALLOC_STATE(vpt, always, R300_VPT_CMDSIZE, 0); + r300->hw.vpt.cmd[R300_VPT_CMD_0] = cmdpacket0(R300_SE_VPORT_XSCALE, 6); + ALLOC_STATE(vap_cntl, always, 2, 0); + r300->hw.vap_cntl.cmd[0] = cmdpacket0(R300_VAP_CNTL, 1); + ALLOC_STATE(vte, always, 3, 0); + r300->hw.vte.cmd[0] = cmdpacket0(R300_SE_VTE_CNTL, 2); + ALLOC_STATE(unk2134, always, 3, 0); + r300->hw.unk2134.cmd[0] = cmdpacket0(0x2134, 2); + ALLOC_STATE(vap_cntl_status, always, 2, 0); + r300->hw.vap_cntl_status.cmd[0] = cmdpacket0(R300_VAP_CNTL_STATUS, 1); + ALLOC_STATE(vir[0], variable, R300_VIR_CMDSIZE, 0); + r300->hw.vir[0].cmd[R300_VIR_CMD_0] = + cmdpacket0(R300_VAP_INPUT_ROUTE_0_0, 1); + ALLOC_STATE(vir[1], variable, R300_VIR_CMDSIZE, 1); + r300->hw.vir[1].cmd[R300_VIR_CMD_0] = + cmdpacket0(R300_VAP_INPUT_ROUTE_1_0, 1); + ALLOC_STATE(vic, always, R300_VIC_CMDSIZE, 0); + r300->hw.vic.cmd[R300_VIC_CMD_0] = cmdpacket0(R300_VAP_INPUT_CNTL_0, 2); + ALLOC_STATE(unk21DC, always, 2, 0); + r300->hw.unk21DC.cmd[0] = cmdpacket0(0x21DC, 1); + ALLOC_STATE(unk221C, always, 2, 0); + r300->hw.unk221C.cmd[0] = cmdpacket0(R300_VAP_UNKNOWN_221C, 1); + ALLOC_STATE(vap_clip, always, 5, 0); + r300->hw.vap_clip.cmd[0] = cmdpacket0(R300_VAP_CLIP_X_0, 4); + + if (has_tcl) { + ALLOC_STATE(unk2288, always, 2, 0); r300->hw.unk2288.cmd[0] = cmdpacket0(R300_VAP_UNKNOWN_2288, 1); - ALLOC_STATE( vof, always, R300_VOF_CMDSIZE, "vof", 0 ); - r300->hw.vof.cmd[R300_VOF_CMD_0] = cmdpacket0(R300_VAP_OUTPUT_VTX_FMT_0, 2); - ALLOC_STATE( pvs, always, R300_PVS_CMDSIZE, "pvs", 0 ); - r300->hw.pvs.cmd[R300_PVS_CMD_0] = cmdpacket0(R300_VAP_PVS_CNTL_1, 3); - ALLOC_STATE( gb_enable, always, 2, "gb_enable", 0 ); - r300->hw.gb_enable.cmd[0] = cmdpacket0(R300_GB_ENABLE, 1); - ALLOC_STATE( gb_misc, always, R300_GB_MISC_CMDSIZE, "gb_misc", 0 ); - r300->hw.gb_misc.cmd[0] = cmdpacket0(R300_GB_MSPOS0, 5); - ALLOC_STATE( txe, always, R300_TXE_CMDSIZE, "txe", 0 ); - r300->hw.txe.cmd[R300_TXE_CMD_0] = cmdpacket0(R300_TX_ENABLE, 1); - ALLOC_STATE( unk4200, always, 5, "unk4200", 0 ); - r300->hw.unk4200.cmd[0] = cmdpacket0(0x4200, 4); - ALLOC_STATE( unk4214, always, 2, "unk4214", 0 ); - r300->hw.unk4214.cmd[0] = cmdpacket0(0x4214, 1); - ALLOC_STATE( ps, always, R300_PS_CMDSIZE, "ps", 0 ); - r300->hw.ps.cmd[0] = cmdpacket0(R300_RE_POINTSIZE, 1); - ALLOC_STATE( unk4230, always, 4, "unk4230", 0 ); - r300->hw.unk4230.cmd[0] = cmdpacket0(0x4230, 3); - ALLOC_STATE( lcntl, always, 2, "lcntl", 0 ); - r300->hw.lcntl.cmd[0] = cmdpacket0(R300_RE_LINE_CNT, 1); - ALLOC_STATE( unk4260, always, 4, "unk4260", 0 ); - r300->hw.unk4260.cmd[0] = cmdpacket0(0x4260, 3); - ALLOC_STATE( shade, always, 5, "shade", 0 ); - r300->hw.shade.cmd[0] = cmdpacket0(R300_RE_SHADE, 4); - ALLOC_STATE( polygon_mode, always, 4, "polygon_mode", 0 ); - r300->hw.polygon_mode.cmd[0] = cmdpacket0(R300_RE_POLYGON_MODE, 3); - ALLOC_STATE( fogp, always, 3, "fogp", 0 ); - r300->hw.fogp.cmd[0] = cmdpacket0(R300_RE_FOG_SCALE, 2); - ALLOC_STATE( zbias_cntl, always, 2, "zbias_cntl", 0 ); - r300->hw.zbias_cntl.cmd[0] = cmdpacket0(R300_RE_ZBIAS_CNTL, 1); - ALLOC_STATE( zbs, always, R300_ZBS_CMDSIZE, "zbs", 0 ); - r300->hw.zbs.cmd[R300_ZBS_CMD_0] = cmdpacket0(R300_RE_ZBIAS_T_FACTOR, 4); - ALLOC_STATE( occlusion_cntl, always, 2, "occlusion_cntl", 0 ); - r300->hw.occlusion_cntl.cmd[0] = cmdpacket0(R300_RE_OCCLUSION_CNTL, 1); - ALLOC_STATE( cul, always, R300_CUL_CMDSIZE, "cul", 0 ); - r300->hw.cul.cmd[R300_CUL_CMD_0] = cmdpacket0(R300_RE_CULL_CNTL, 1); - ALLOC_STATE( unk42C0, always, 3, "unk42C0", 0 ); - r300->hw.unk42C0.cmd[0] = cmdpacket0(0x42C0, 2); - ALLOC_STATE( rc, always, R300_RC_CMDSIZE, "rc", 0 ); - r300->hw.rc.cmd[R300_RC_CMD_0] = cmdpacket0(R300_RS_CNTL_0, 2); - ALLOC_STATE( ri, always, R300_RI_CMDSIZE, "ri", 0 ); - r300->hw.ri.cmd[R300_RI_CMD_0] = cmdpacket0(R300_RS_INTERP_0, 8); - ALLOC_STATE( rr, variable, R300_RR_CMDSIZE, "rr", 0 ); - r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(R300_RS_ROUTE_0, 1); - ALLOC_STATE( unk43A4, always, 3, "unk43A4", 0 ); - r300->hw.unk43A4.cmd[0] = cmdpacket0(0x43A4, 2); - ALLOC_STATE( unk43E8, always, 2, "unk43E8", 0 ); - r300->hw.unk43E8.cmd[0] = cmdpacket0(0x43E8, 1); - ALLOC_STATE( fp, always, R300_FP_CMDSIZE, "fp", 0 ); - r300->hw.fp.cmd[R300_FP_CMD_0] = cmdpacket0(R300_PFS_CNTL_0, 3); - r300->hw.fp.cmd[R300_FP_CMD_1] = cmdpacket0(R300_PFS_NODE_0, 4); - ALLOC_STATE( fpt, variable, R300_FPT_CMDSIZE, "fpt", 0 ); - r300->hw.fpt.cmd[R300_FPT_CMD_0] = cmdpacket0(R300_PFS_TEXI_0, 0); - ALLOC_STATE( unk46A4, always, 6, "unk46A4", 0 ); - r300->hw.unk46A4.cmd[0] = cmdpacket0(0x46A4, 5); - ALLOC_STATE( fpi[0], variable, R300_FPI_CMDSIZE, "fpi/0", 0 ); - r300->hw.fpi[0].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_PFS_INSTR0_0, 1); - ALLOC_STATE( fpi[1], variable, R300_FPI_CMDSIZE, "fpi/1", 1 ); - r300->hw.fpi[1].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_PFS_INSTR1_0, 1); - ALLOC_STATE( fpi[2], variable, R300_FPI_CMDSIZE, "fpi/2", 2 ); - r300->hw.fpi[2].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_PFS_INSTR2_0, 1); - ALLOC_STATE( fpi[3], variable, R300_FPI_CMDSIZE, "fpi/3", 3 ); - r300->hw.fpi[3].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_PFS_INSTR3_0, 1); - ALLOC_STATE( fogs, always, R300_FOGS_CMDSIZE, "fogs", 0 ); - r300->hw.fogs.cmd[R300_FOGS_CMD_0] = cmdpacket0(R300_RE_FOG_STATE, 1); - ALLOC_STATE( fogc, always, R300_FOGC_CMDSIZE, "fogc", 0 ); - r300->hw.fogc.cmd[R300_FOGC_CMD_0] = cmdpacket0(R300_FOG_COLOR_R, 3); - ALLOC_STATE( at, always, R300_AT_CMDSIZE, "at", 0 ); - r300->hw.at.cmd[R300_AT_CMD_0] = cmdpacket0(R300_PP_ALPHA_TEST, 2); - ALLOC_STATE( unk4BD8, always, 2, "unk4BD8", 0 ); - r300->hw.unk4BD8.cmd[0] = cmdpacket0(0x4BD8, 1); - ALLOC_STATE( fpp, variable, R300_FPP_CMDSIZE, "fpp", 0 ); - r300->hw.fpp.cmd[R300_FPP_CMD_0] = cmdpacket0(R300_PFS_PARAM_0_X, 0); - ALLOC_STATE( unk4E00, always, 2, "unk4E00", 0 ); - r300->hw.unk4E00.cmd[0] = cmdpacket0(0x4E00, 1); - ALLOC_STATE( bld, always, R300_BLD_CMDSIZE, "bld", 0 ); - r300->hw.bld.cmd[R300_BLD_CMD_0] = cmdpacket0(R300_RB3D_CBLEND, 2); - ALLOC_STATE( cmk, always, R300_CMK_CMDSIZE, "cmk", 0 ); - r300->hw.cmk.cmd[R300_CMK_CMD_0] = cmdpacket0(R300_RB3D_COLORMASK, 1); - ALLOC_STATE( blend_color, always, 4, "blend_color", 0 ); - r300->hw.blend_color.cmd[0] = cmdpacket0(R300_RB3D_BLEND_COLOR, 3); - ALLOC_STATE( cb, always, R300_CB_CMDSIZE, "cb", 0 ); - r300->hw.cb.cmd[R300_CB_CMD_0] = cmdpacket0(R300_RB3D_COLOROFFSET0, 1); - r300->hw.cb.cmd[R300_CB_CMD_1] = cmdpacket0(R300_RB3D_COLORPITCH0, 1); - ALLOC_STATE( unk4E50, always, 10, "unk4E50", 0 ); - r300->hw.unk4E50.cmd[0] = cmdpacket0(0x4E50, 9); - ALLOC_STATE( unk4E88, always, 2, "unk4E88", 0 ); - r300->hw.unk4E88.cmd[0] = cmdpacket0(0x4E88, 1); - ALLOC_STATE( unk4EA0, always, 3, "unk4EA0 R350 only", 0 ); - r300->hw.unk4EA0.cmd[0] = cmdpacket0(0x4EA0, 2); - ALLOC_STATE( zs, always, R300_ZS_CMDSIZE, "zstencil", 0 ); - r300->hw.zs.cmd[R300_ZS_CMD_0] = cmdpacket0(R300_RB3D_ZSTENCIL_CNTL_0, 3); - ALLOC_STATE( zstencil_format, always, 5, "zstencil_format", 0 ); - r300->hw.zstencil_format.cmd[0] = cmdpacket0(R300_RB3D_ZSTENCIL_FORMAT, 4); - ALLOC_STATE( zb, always, R300_ZB_CMDSIZE, "zb", 0 ); - r300->hw.zb.cmd[R300_ZB_CMD_0] = cmdpacket0(R300_RB3D_DEPTHOFFSET, 2); - ALLOC_STATE( unk4F28, always, 2, "unk4F28", 0 ); - r300->hw.unk4F28.cmd[0] = cmdpacket0(0x4F28, 1); - ALLOC_STATE( unk4F30, always, 3, "unk4F30", 0 ); - r300->hw.unk4F30.cmd[0] = cmdpacket0(0x4F30, 2); - ALLOC_STATE( unk4F44, always, 2, "unk4F44", 0 ); - r300->hw.unk4F44.cmd[0] = cmdpacket0(0x4F44, 1); - ALLOC_STATE( unk4F54, always, 2, "unk4F54", 0 ); - r300->hw.unk4F54.cmd[0] = cmdpacket0(0x4F54, 1); - - ALLOC_STATE( vpi, vpu, R300_VPI_CMDSIZE, "vpi", 0 ); - r300->hw.vpi.cmd[R300_VPI_CMD_0] = cmdvpu(R300_PVS_UPLOAD_PROGRAM, 0); - ALLOC_STATE( vpp, vpu, R300_VPP_CMDSIZE, "vpp", 0 ); - r300->hw.vpp.cmd[R300_VPP_CMD_0] = cmdvpu(R300_PVS_UPLOAD_PARAMETERS, 0); - ALLOC_STATE( vps, vpu, R300_VPS_CMDSIZE, "vps", 0 ); - r300->hw.vps.cmd[R300_VPS_CMD_0] = cmdvpu(R300_PVS_UPLOAD_POINTSIZE, 1); + } - /* Textures */ - ALLOC_STATE( tex.filter, variable, mtu+1, "tex_filter", 0 ); - r300->hw.tex.filter.cmd[R300_TEX_CMD_0] = cmdpacket0(R300_TX_FILTER_0, 0); + ALLOC_STATE(vof, always, R300_VOF_CMDSIZE, 0); + r300->hw.vof.cmd[R300_VOF_CMD_0] = + cmdpacket0(R300_VAP_OUTPUT_VTX_FMT_0, 2); - ALLOC_STATE( tex.filter_1, variable, mtu+1, "tex_filter_1", 0 ); - r300->hw.tex.filter_1.cmd[R300_TEX_CMD_0] = cmdpacket0(R300_TX_FILTER1_0, 0); + if (has_tcl) { + ALLOC_STATE(pvs, always, R300_PVS_CMDSIZE, 0); + r300->hw.pvs.cmd[R300_PVS_CMD_0] = + cmdpacket0(R300_VAP_PVS_CNTL_1, 3); + } - ALLOC_STATE( tex.size, variable, mtu+1, "tex_size", 0 ); - r300->hw.tex.size.cmd[R300_TEX_CMD_0] = cmdpacket0(R300_TX_SIZE_0, 0); + ALLOC_STATE(gb_enable, always, 2, 0); + r300->hw.gb_enable.cmd[0] = cmdpacket0(R300_GB_ENABLE, 1); + ALLOC_STATE(gb_misc, always, R300_GB_MISC_CMDSIZE, 0); + r300->hw.gb_misc.cmd[0] = cmdpacket0(R300_GB_MSPOS0, 5); + ALLOC_STATE(txe, always, R300_TXE_CMDSIZE, 0); + r300->hw.txe.cmd[R300_TXE_CMD_0] = cmdpacket0(R300_TX_ENABLE, 1); + ALLOC_STATE(unk4200, always, 5, 0); + r300->hw.unk4200.cmd[0] = cmdpacket0(0x4200, 4); + ALLOC_STATE(unk4214, always, 2, 0); + r300->hw.unk4214.cmd[0] = cmdpacket0(0x4214, 1); + ALLOC_STATE(ps, always, R300_PS_CMDSIZE, 0); + r300->hw.ps.cmd[0] = cmdpacket0(R300_RE_POINTSIZE, 1); + ALLOC_STATE(unk4230, always, 4, 0); + r300->hw.unk4230.cmd[0] = cmdpacket0(0x4230, 3); + ALLOC_STATE(lcntl, always, 2, 0); + r300->hw.lcntl.cmd[0] = cmdpacket0(R300_RE_LINE_CNT, 1); + ALLOC_STATE(unk4260, always, 4, 0); + r300->hw.unk4260.cmd[0] = cmdpacket0(0x4260, 3); + ALLOC_STATE(shade, always, 5, 0); + r300->hw.shade.cmd[0] = cmdpacket0(R300_RE_SHADE, 4); + ALLOC_STATE(polygon_mode, always, 4, 0); + r300->hw.polygon_mode.cmd[0] = cmdpacket0(R300_RE_POLYGON_MODE, 3); + ALLOC_STATE(fogp, always, 3, 0); + r300->hw.fogp.cmd[0] = cmdpacket0(R300_RE_FOG_SCALE, 2); + ALLOC_STATE(zbias_cntl, always, 2, 0); + r300->hw.zbias_cntl.cmd[0] = cmdpacket0(R300_RE_ZBIAS_CNTL, 1); + ALLOC_STATE(zbs, always, R300_ZBS_CMDSIZE, 0); + r300->hw.zbs.cmd[R300_ZBS_CMD_0] = + cmdpacket0(R300_RE_ZBIAS_T_FACTOR, 4); + ALLOC_STATE(occlusion_cntl, always, 2, 0); + r300->hw.occlusion_cntl.cmd[0] = cmdpacket0(R300_RE_OCCLUSION_CNTL, 1); + ALLOC_STATE(cul, always, R300_CUL_CMDSIZE, 0); + r300->hw.cul.cmd[R300_CUL_CMD_0] = cmdpacket0(R300_RE_CULL_CNTL, 1); + ALLOC_STATE(unk42C0, always, 3, 0); + r300->hw.unk42C0.cmd[0] = cmdpacket0(0x42C0, 2); + ALLOC_STATE(rc, always, R300_RC_CMDSIZE, 0); + r300->hw.rc.cmd[R300_RC_CMD_0] = cmdpacket0(R300_RS_CNTL_0, 2); + ALLOC_STATE(ri, always, R300_RI_CMDSIZE, 0); + r300->hw.ri.cmd[R300_RI_CMD_0] = cmdpacket0(R300_RS_INTERP_0, 8); + ALLOC_STATE(rr, variable, R300_RR_CMDSIZE, 0); + r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(R300_RS_ROUTE_0, 1); + ALLOC_STATE(unk43A4, always, 3, 0); + r300->hw.unk43A4.cmd[0] = cmdpacket0(0x43A4, 2); + ALLOC_STATE(unk43E8, always, 2, 0); + r300->hw.unk43E8.cmd[0] = cmdpacket0(0x43E8, 1); + ALLOC_STATE(fp, always, R300_FP_CMDSIZE, 0); + r300->hw.fp.cmd[R300_FP_CMD_0] = cmdpacket0(R300_PFS_CNTL_0, 3); + r300->hw.fp.cmd[R300_FP_CMD_1] = cmdpacket0(R300_PFS_NODE_0, 4); + ALLOC_STATE(fpt, variable, R300_FPT_CMDSIZE, 0); + r300->hw.fpt.cmd[R300_FPT_CMD_0] = cmdpacket0(R300_PFS_TEXI_0, 0); + ALLOC_STATE(unk46A4, always, 6, 0); + r300->hw.unk46A4.cmd[0] = cmdpacket0(0x46A4, 5); + ALLOC_STATE(fpi[0], variable, R300_FPI_CMDSIZE, 0); + r300->hw.fpi[0].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_PFS_INSTR0_0, 1); + ALLOC_STATE(fpi[1], variable, R300_FPI_CMDSIZE, 1); + r300->hw.fpi[1].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_PFS_INSTR1_0, 1); + ALLOC_STATE(fpi[2], variable, R300_FPI_CMDSIZE, 2); + r300->hw.fpi[2].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_PFS_INSTR2_0, 1); + ALLOC_STATE(fpi[3], variable, R300_FPI_CMDSIZE, 3); + r300->hw.fpi[3].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_PFS_INSTR3_0, 1); + ALLOC_STATE(fogs, always, R300_FOGS_CMDSIZE, 0); + r300->hw.fogs.cmd[R300_FOGS_CMD_0] = cmdpacket0(R300_RE_FOG_STATE, 1); + ALLOC_STATE(fogc, always, R300_FOGC_CMDSIZE, 0); + r300->hw.fogc.cmd[R300_FOGC_CMD_0] = cmdpacket0(R300_FOG_COLOR_R, 3); + ALLOC_STATE(at, always, R300_AT_CMDSIZE, 0); + r300->hw.at.cmd[R300_AT_CMD_0] = cmdpacket0(R300_PP_ALPHA_TEST, 2); + ALLOC_STATE(unk4BD8, always, 2, 0); + r300->hw.unk4BD8.cmd[0] = cmdpacket0(0x4BD8, 1); + ALLOC_STATE(fpp, variable, R300_FPP_CMDSIZE, 0); + r300->hw.fpp.cmd[R300_FPP_CMD_0] = cmdpacket0(R300_PFS_PARAM_0_X, 0); + ALLOC_STATE(unk4E00, always, 2, 0); + r300->hw.unk4E00.cmd[0] = cmdpacket0(0x4E00, 1); + ALLOC_STATE(bld, always, R300_BLD_CMDSIZE, 0); + r300->hw.bld.cmd[R300_BLD_CMD_0] = cmdpacket0(R300_RB3D_CBLEND, 2); + ALLOC_STATE(cmk, always, R300_CMK_CMDSIZE, 0); + r300->hw.cmk.cmd[R300_CMK_CMD_0] = cmdpacket0(R300_RB3D_COLORMASK, 1); + ALLOC_STATE(blend_color, always, 4, 0); + r300->hw.blend_color.cmd[0] = cmdpacket0(R300_RB3D_BLEND_COLOR, 3); + ALLOC_STATE(cb, always, R300_CB_CMDSIZE, 0); + r300->hw.cb.cmd[R300_CB_CMD_0] = cmdpacket0(R300_RB3D_COLOROFFSET0, 1); + r300->hw.cb.cmd[R300_CB_CMD_1] = cmdpacket0(R300_RB3D_COLORPITCH0, 1); + ALLOC_STATE(unk4E50, always, 10, 0); + r300->hw.unk4E50.cmd[0] = cmdpacket0(0x4E50, 9); + ALLOC_STATE(unk4E88, always, 2, 0); + r300->hw.unk4E88.cmd[0] = cmdpacket0(0x4E88, 1); + ALLOC_STATE(unk4EA0, always, 3, 0); + r300->hw.unk4EA0.cmd[0] = cmdpacket0(0x4EA0, 2); + ALLOC_STATE(zs, always, R300_ZS_CMDSIZE, 0); + r300->hw.zs.cmd[R300_ZS_CMD_0] = + cmdpacket0(R300_RB3D_ZSTENCIL_CNTL_0, 3); + ALLOC_STATE(zstencil_format, always, 5, 0); + r300->hw.zstencil_format.cmd[0] = + cmdpacket0(R300_RB3D_ZSTENCIL_FORMAT, 4); + ALLOC_STATE(zb, always, R300_ZB_CMDSIZE, 0); + r300->hw.zb.cmd[R300_ZB_CMD_0] = cmdpacket0(R300_RB3D_DEPTHOFFSET, 2); + ALLOC_STATE(unk4F28, always, 2, 0); + r300->hw.unk4F28.cmd[0] = cmdpacket0(0x4F28, 1); + ALLOC_STATE(unk4F30, always, 3, 0); + r300->hw.unk4F30.cmd[0] = cmdpacket0(0x4F30, 2); + ALLOC_STATE(unk4F44, always, 2, 0); + r300->hw.unk4F44.cmd[0] = cmdpacket0(0x4F44, 1); + ALLOC_STATE(unk4F54, always, 2, 0); + r300->hw.unk4F54.cmd[0] = cmdpacket0(0x4F54, 1); + + /* VPU only on TCL */ + if (has_tcl) { + ALLOC_STATE(vpi, vpu, R300_VPI_CMDSIZE, 0); + r300->hw.vpi.cmd[R300_VPI_CMD_0] = + cmdvpu(R300_PVS_UPLOAD_PROGRAM, 0); + ALLOC_STATE(vpp, vpu, R300_VPP_CMDSIZE, 0); + r300->hw.vpp.cmd[R300_VPP_CMD_0] = + cmdvpu(R300_PVS_UPLOAD_PARAMETERS, 0); + ALLOC_STATE(vps, vpu, R300_VPS_CMDSIZE, 0); + r300->hw.vps.cmd[R300_VPS_CMD_0] = + cmdvpu(R300_PVS_UPLOAD_POINTSIZE, 1); + } - ALLOC_STATE( tex.format, variable, mtu+1, "tex_format", 0 ); - r300->hw.tex.format.cmd[R300_TEX_CMD_0] = cmdpacket0(R300_TX_FORMAT_0, 0); + /* Textures */ + ALLOC_STATE(tex.filter, variable, mtu + 1, 0); + r300->hw.tex.filter.cmd[R300_TEX_CMD_0] = + cmdpacket0(R300_TX_FILTER_0, 0); - ALLOC_STATE( tex.pitch, variable, mtu+1, "tex_pitch", 0 ); - r300->hw.tex.pitch.cmd[R300_TEX_CMD_0] = cmdpacket0(R300_TX_PITCH_0, 0); + ALLOC_STATE(tex.filter_1, variable, mtu + 1, 0); + r300->hw.tex.filter_1.cmd[R300_TEX_CMD_0] = + cmdpacket0(R300_TX_FILTER1_0, 0); - ALLOC_STATE( tex.offset, variable, mtu+1, "tex_offset", 0 ); - r300->hw.tex.offset.cmd[R300_TEX_CMD_0] = cmdpacket0(R300_TX_OFFSET_0, 0); + ALLOC_STATE(tex.size, variable, mtu + 1, 0); + r300->hw.tex.size.cmd[R300_TEX_CMD_0] = cmdpacket0(R300_TX_SIZE_0, 0); - ALLOC_STATE( tex.chroma_key, variable, mtu+1, "tex_chroma_key", 0 ); - r300->hw.tex.chroma_key.cmd[R300_TEX_CMD_0] = cmdpacket0(R300_TX_CHROMA_KEY_0, 0); + ALLOC_STATE(tex.format, variable, mtu + 1, 0); + r300->hw.tex.format.cmd[R300_TEX_CMD_0] = + cmdpacket0(R300_TX_FORMAT_0, 0); - ALLOC_STATE( tex.border_color, variable, mtu+1, "tex_border_color", 0 ); - r300->hw.tex.border_color.cmd[R300_TEX_CMD_0] = cmdpacket0(R300_TX_BORDER_COLOR_0, 0); + ALLOC_STATE(tex.pitch, variable, mtu + 1, 0); + r300->hw.tex.pitch.cmd[R300_TEX_CMD_0] = cmdpacket0(R300_TX_PITCH_0, 0); + ALLOC_STATE(tex.offset, variable, mtu + 1, 0); + r300->hw.tex.offset.cmd[R300_TEX_CMD_0] = + cmdpacket0(R300_TX_OFFSET_0, 0); - /* Setup the atom linked list */ - make_empty_list(&r300->hw.atomlist); - r300->hw.atomlist.name = "atom-list"; + ALLOC_STATE(tex.chroma_key, variable, mtu + 1, 0); + r300->hw.tex.chroma_key.cmd[R300_TEX_CMD_0] = + cmdpacket0(R300_TX_CHROMA_KEY_0, 0); - insert_at_tail(&r300->hw.atomlist, &r300->hw.vpt); - insert_at_tail(&r300->hw.atomlist, &r300->hw.vap_cntl); - insert_at_tail(&r300->hw.atomlist, &r300->hw.vte); - insert_at_tail(&r300->hw.atomlist, &r300->hw.unk2134); - insert_at_tail(&r300->hw.atomlist, &r300->hw.vap_cntl_status); - insert_at_tail(&r300->hw.atomlist, &r300->hw.vir[0]); - insert_at_tail(&r300->hw.atomlist, &r300->hw.vir[1]); - insert_at_tail(&r300->hw.atomlist, &r300->hw.vic); - insert_at_tail(&r300->hw.atomlist, &r300->hw.unk21DC); - insert_at_tail(&r300->hw.atomlist, &r300->hw.unk221C); - insert_at_tail(&r300->hw.atomlist, &r300->hw.unk2220); - insert_at_tail(&r300->hw.atomlist, &r300->hw.unk2288); - insert_at_tail(&r300->hw.atomlist, &r300->hw.vof); - insert_at_tail(&r300->hw.atomlist, &r300->hw.pvs); - insert_at_tail(&r300->hw.atomlist, &r300->hw.gb_enable); - insert_at_tail(&r300->hw.atomlist, &r300->hw.gb_misc); - insert_at_tail(&r300->hw.atomlist, &r300->hw.txe); - insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4200); - insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4214); - insert_at_tail(&r300->hw.atomlist, &r300->hw.ps); - insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4230); - insert_at_tail(&r300->hw.atomlist, &r300->hw.lcntl); - insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4260); - insert_at_tail(&r300->hw.atomlist, &r300->hw.shade); - insert_at_tail(&r300->hw.atomlist, &r300->hw.polygon_mode); - insert_at_tail(&r300->hw.atomlist, &r300->hw.fogp); - insert_at_tail(&r300->hw.atomlist, &r300->hw.zbias_cntl); - insert_at_tail(&r300->hw.atomlist, &r300->hw.zbs); - insert_at_tail(&r300->hw.atomlist, &r300->hw.occlusion_cntl); - insert_at_tail(&r300->hw.atomlist, &r300->hw.cul); - insert_at_tail(&r300->hw.atomlist, &r300->hw.unk42C0); - insert_at_tail(&r300->hw.atomlist, &r300->hw.rc); - insert_at_tail(&r300->hw.atomlist, &r300->hw.ri); - insert_at_tail(&r300->hw.atomlist, &r300->hw.rr); - insert_at_tail(&r300->hw.atomlist, &r300->hw.unk43A4); - insert_at_tail(&r300->hw.atomlist, &r300->hw.unk43E8); - insert_at_tail(&r300->hw.atomlist, &r300->hw.fp); - insert_at_tail(&r300->hw.atomlist, &r300->hw.fpt); - insert_at_tail(&r300->hw.atomlist, &r300->hw.unk46A4); - insert_at_tail(&r300->hw.atomlist, &r300->hw.fpi[0]); - insert_at_tail(&r300->hw.atomlist, &r300->hw.fpi[1]); - insert_at_tail(&r300->hw.atomlist, &r300->hw.fpi[2]); - insert_at_tail(&r300->hw.atomlist, &r300->hw.fpi[3]); - insert_at_tail(&r300->hw.atomlist, &r300->hw.fogs); - insert_at_tail(&r300->hw.atomlist, &r300->hw.fogc); - insert_at_tail(&r300->hw.atomlist, &r300->hw.at); - insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4BD8); - insert_at_tail(&r300->hw.atomlist, &r300->hw.fpp); - insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4E00); - insert_at_tail(&r300->hw.atomlist, &r300->hw.bld); - insert_at_tail(&r300->hw.atomlist, &r300->hw.cmk); - insert_at_tail(&r300->hw.atomlist, &r300->hw.blend_color); - insert_at_tail(&r300->hw.atomlist, &r300->hw.cb); - insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4E50); - insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4E88); - insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4EA0); - insert_at_tail(&r300->hw.atomlist, &r300->hw.zs); - insert_at_tail(&r300->hw.atomlist, &r300->hw.zstencil_format); - insert_at_tail(&r300->hw.atomlist, &r300->hw.zb); - insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4F28); - insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4F30); - insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4F44); - insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4F54); - - insert_at_tail(&r300->hw.atomlist, &r300->hw.vpi); - insert_at_tail(&r300->hw.atomlist, &r300->hw.vpp); - insert_at_tail(&r300->hw.atomlist, &r300->hw.vps); - - insert_at_tail(&r300->hw.atomlist, &r300->hw.tex.filter); - insert_at_tail(&r300->hw.atomlist, &r300->hw.tex.filter_1); - insert_at_tail(&r300->hw.atomlist, &r300->hw.tex.size); - insert_at_tail(&r300->hw.atomlist, &r300->hw.tex.format); - insert_at_tail(&r300->hw.atomlist, &r300->hw.tex.pitch); - insert_at_tail(&r300->hw.atomlist, &r300->hw.tex.offset); - insert_at_tail(&r300->hw.atomlist, &r300->hw.tex.chroma_key); - insert_at_tail(&r300->hw.atomlist, &r300->hw.tex.border_color); + ALLOC_STATE(tex.border_color, variable, mtu + 1, 0); + r300->hw.tex.border_color.cmd[R300_TEX_CMD_0] = + cmdpacket0(R300_TX_BORDER_COLOR_0, 0); r300->hw.is_dirty = GL_TRUE; r300->hw.all_dirty = GL_TRUE; /* Initialize command buffer */ - size = 256 * driQueryOptioni(&r300->radeon.optionCache, "command_buffer_size"); - if (size < 2*r300->hw.max_state_size) { - size = 2*r300->hw.max_state_size+65535; + size = + 256 * driQueryOptioni(&r300->radeon.optionCache, + "command_buffer_size"); + if (size < 2 * r300->hw.max_state_size) { + size = 2 * r300->hw.max_state_size + 65535; } - if (size > 64*256) - size = 64*256; + if (size > 64 * 256) + size = 64 * 256; - if (RADEON_DEBUG & (DEBUG_IOCTL|DEBUG_DMA)) { + if (RADEON_DEBUG & (DEBUG_IOCTL | DEBUG_DMA)) { fprintf(stderr, "sizeof(drm_r300_cmd_header_t)=%zd\n", sizeof(drm_r300_cmd_header_t)); fprintf(stderr, "sizeof(drm_radeon_cmd_buffer_t)=%zd\n", sizeof(drm_radeon_cmd_buffer_t)); fprintf(stderr, "Allocating %d bytes command buffer (max state is %d bytes)\n", - size*4, r300->hw.max_state_size*4); + size * 4, r300->hw.max_state_size * 4); } r300->cmdbuf.size = size; - r300->cmdbuf.cmd_buf = (uint32_t*)CALLOC(size*4); + r300->cmdbuf.cmd_buf = (uint32_t *) CALLOC(size * 4); r300->cmdbuf.count_used = 0; r300->cmdbuf.count_reemit = 0; } - /** * Destroy the command buffer and state atoms. */ void r300DestroyCmdBuf(r300ContextPtr r300) { - struct r300_state_atom* atom; + struct r300_state_atom *atom; FREE(r300->cmdbuf.cmd_buf); @@ -599,8 +552,7 @@ void r300EmitBlit(r300ContextPtr rmesa, assert(w < (1 << 16)); assert(h < (1 << 16)); - cmd = (drm_r300_cmd_header_t *) r300AllocCmdBuf(rmesa, 8, - __FUNCTION__); + cmd = (drm_r300_cmd_header_t *) r300AllocCmdBuf(rmesa, 8, __FUNCTION__); cmd[0].header.cmd_type = R300_CMD_PACKET3; cmd[0].header.pad0 = R300_CMD_PACKET3_RAW; @@ -627,44 +579,8 @@ void r300EmitWait(r300ContextPtr rmesa, GLuint flags) assert(!(flags & ~(R300_WAIT_2D | R300_WAIT_3D))); - cmd = (drm_r300_cmd_header_t *) r300AllocCmdBuf(rmesa, 1, - __FUNCTION__); + cmd = (drm_r300_cmd_header_t *) r300AllocCmdBuf(rmesa, 1, __FUNCTION__); cmd[0].u = 0; cmd[0].wait.cmd_type = R300_CMD_WAIT; cmd[0].wait.flags = flags; } - -void r300EmitAOS(r300ContextPtr rmesa, GLuint nr, GLuint offset) -{ - int sz = 1 + (nr >> 1) * 3 + (nr & 1) * 2; - int i; - int cmd_reserved = 0; - int cmd_written = 0; - drm_radeon_cmd_header_t *cmd = NULL; - - if (RADEON_DEBUG & DEBUG_VERTS) - fprintf(stderr, "%s: nr=%d, ofs=0x%08x\n", __func__, nr, offset); - - start_packet3(RADEON_CP_PACKET3_3D_LOAD_VBPNTR, sz-1); - e32(nr); - for(i=0;i+1<nr;i+=2){ - e32( (rmesa->state.aos[i].aos_size << 0) - |(rmesa->state.aos[i].aos_stride << 8) - |(rmesa->state.aos[i+1].aos_size << 16) - |(rmesa->state.aos[i+1].aos_stride << 24) - ); - e32(rmesa->state.aos[i].aos_offset + - offset*4*rmesa->state.aos[i].aos_stride); - e32(rmesa->state.aos[i+1].aos_offset + - offset*4*rmesa->state.aos[i+1].aos_stride); - } - - if(nr & 1){ - e32( (rmesa->state.aos[nr-1].aos_size << 0) - |(rmesa->state.aos[nr-1].aos_stride << 8) - ); - e32(rmesa->state.aos[nr-1].aos_offset + - offset*4*rmesa->state.aos[nr-1].aos_stride); - } -} - diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.h b/src/mesa/drivers/dri/r300/r300_cmdbuf.h index b471f2ac46..acb6e38c6d 100644 --- a/src/mesa/drivers/dri/r300/r300_cmdbuf.h +++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.h @@ -27,9 +27,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ -/* - * Authors: - * Nicolai Haehnle <prefect_@gmx.net> +/** + * \file + * + * \author Nicolai Haehnle <prefect_@gmx.net> */ #ifndef __R300_CMDBUF_H__ @@ -37,24 +38,22 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "r300_context.h" - -extern int r300FlushCmdBufLocked(r300ContextPtr r300, const char* caller); -extern int r300FlushCmdBuf(r300ContextPtr r300, const char* caller); +extern int r300FlushCmdBufLocked(r300ContextPtr r300, const char *caller); +extern int r300FlushCmdBuf(r300ContextPtr r300, const char *caller); extern void r300EmitState(r300ContextPtr r300); extern void r300InitCmdBuf(r300ContextPtr r300); extern void r300DestroyCmdBuf(r300ContextPtr r300); -extern void r300EmitAOS(r300ContextPtr rmesa, GLuint nr, GLuint offset); - - /** * Make sure that enough space is available in the command buffer * by flushing if necessary. + * + * \param dwords The number of dwords we need to be free on the command buffer */ -static __inline__ void r300EnsureCmdBufSpace(r300ContextPtr r300, - int dwords, const char* caller) +static inline void r300EnsureCmdBufSpace(r300ContextPtr r300, + int dwords, const char *caller) { assert(dwords < r300->cmdbuf.size); @@ -62,7 +61,6 @@ static __inline__ void r300EnsureCmdBufSpace(r300ContextPtr r300, r300FlushCmdBuf(r300, caller); } - /** * Allocate the given number of dwords in the command buffer and return * a pointer to the allocated area. @@ -70,10 +68,10 @@ static __inline__ void r300EnsureCmdBufSpace(r300ContextPtr r300, * causes state reemission after a flush. This is necessary to ensure * correct hardware state after an unlock. */ -static __inline__ uint32_t* r300RawAllocCmdBuf(r300ContextPtr r300, - int dwords, const char* caller) +static inline uint32_t *r300RawAllocCmdBuf(r300ContextPtr r300, + int dwords, const char *caller) { - uint32_t* ptr; + uint32_t *ptr; r300EnsureCmdBufSpace(r300, dwords, caller); @@ -82,17 +80,17 @@ static __inline__ uint32_t* r300RawAllocCmdBuf(r300ContextPtr r300, return ptr; } -static __inline__ uint32_t* r300AllocCmdBuf(r300ContextPtr r300, - int dwords, const char* caller) +static inline uint32_t *r300AllocCmdBuf(r300ContextPtr r300, + int dwords, const char *caller) { - uint32_t* ptr; + uint32_t *ptr; r300EnsureCmdBufSpace(r300, dwords, caller); if (!r300->cmdbuf.count_used) { if (RADEON_DEBUG & DEBUG_IOCTL) - fprintf(stderr, "Reemit state after flush (from %s)\n", - caller); + fprintf(stderr, + "Reemit state after flush (from %s)\n", caller); r300EmitState(r300); } @@ -102,17 +100,17 @@ static __inline__ uint32_t* r300AllocCmdBuf(r300ContextPtr r300, } extern void r300EmitBlit(r300ContextPtr rmesa, - GLuint color_fmt, - GLuint src_pitch, - GLuint src_offset, - GLuint dst_pitch, - GLuint dst_offset, - GLint srcx, GLint srcy, - GLint dstx, GLint dsty, GLuint w, GLuint h); + GLuint color_fmt, + GLuint src_pitch, + GLuint src_offset, + GLuint dst_pitch, + GLuint dst_offset, + GLint srcx, GLint srcy, + GLint dstx, GLint dsty, GLuint w, GLuint h); extern void r300EmitWait(r300ContextPtr rmesa, GLuint flags); extern void r300EmitLOAD_VBPNTR(r300ContextPtr rmesa, int start); extern void r300EmitVertexShader(r300ContextPtr rmesa); extern void r300EmitPixelShader(r300ContextPtr rmesa); -#endif /* __R300_CMDBUF_H__ */ +#endif /* __R300_CMDBUF_H__ */ diff --git a/src/mesa/drivers/dri/r300/r300_context.c b/src/mesa/drivers/dri/r300/r300_context.c index 1f8d95078f..04e3fffa5d 100644 --- a/src/mesa/drivers/dri/r300/r300_context.c +++ b/src/mesa/drivers/dri/r300/r300_context.c @@ -27,11 +27,14 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ -/* - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - * Nicolai Haehnle <prefect_@gmx.net> +/** + * \file + * + * \author Keith Whitwell <keith@tungstengraphics.com> + * + * \author Nicolai Haehnle <prefect_@gmx.net> */ + #include "glheader.h" #include "api_arrayelt.h" #include "context.h" @@ -59,10 +62,11 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "r300_state.h" #include "r300_ioctl.h" #include "r300_tex.h" -#include "r300_maos.h" +#include "r300_emit.h" +#include "r300_swtcl.h" #ifdef USER_BUFFERS -#include "radeon_mm.h" +#include "r300_mem.h" #endif #include "vblank.h" @@ -70,8 +74,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "xmlpool.h" /* for symbolic values of enum-type options */ /* hw_tcl_on derives from future_hw_tcl_on when its safe to change it. */ -int future_hw_tcl_on=1; -int hw_tcl_on=1; +int future_hw_tcl_on = 1; +int hw_tcl_on = 1; #define need_GL_EXT_stencil_two_side #define need_GL_ARB_multisample @@ -88,6 +92,7 @@ int hw_tcl_on=1; #include "extension_helper.h" const struct dri_extension card_extensions[] = { + /* *INDENT-OFF* */ {"GL_ARB_multisample", GL_ARB_multisample_functions}, {"GL_ARB_multitexture", NULL}, {"GL_ARB_texture_border_clamp", NULL}, @@ -108,6 +113,7 @@ const struct dri_extension card_extensions[] = { // {"GL_EXT_fog_coord", GL_EXT_fog_coord_functions }, {"GL_EXT_gpu_program_parameters", GL_EXT_gpu_program_parameters_functions}, {"GL_EXT_secondary_color", GL_EXT_secondary_color_functions}, + {"GL_EXT_stencil_two_side", GL_EXT_stencil_two_side_functions}, {"GL_EXT_stencil_wrap", NULL}, {"GL_EXT_texture_edge_clamp", NULL}, {"GL_EXT_texture_env_combine", NULL}, @@ -125,10 +131,7 @@ const struct dri_extension card_extensions[] = { {"GL_NV_vertex_program", GL_NV_vertex_program_functions}, {"GL_SGIS_generate_mipmap", NULL}, {NULL, NULL} -}; - -const struct dri_extension stencil_two_side[] = { - {"GL_EXT_stencil_two_side", GL_EXT_stencil_two_side_functions}, + /* *INDENT-ON* */ }; extern struct tnl_pipeline_stage _r300_render_stage; @@ -148,7 +151,6 @@ static const struct tnl_pipeline_stage *r300_pipeline[] = { &_tnl_fog_coordinate_stage, &_tnl_texgen_stage, &_tnl_texture_transform_stage, - &_tnl_arb_vertex_program_stage, &_tnl_vertex_program_stage, /* Try again to go to tcl? @@ -168,7 +170,6 @@ static const struct tnl_pipeline_stage *r300_pipeline[] = { 0, }; - /* Create the device specific rendering context. */ GLboolean r300CreateContext(const __GLcontextModes * glVisual, @@ -187,10 +188,13 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual, assert(screen); /* Allocate the R300 context */ - r300 = (r300ContextPtr)CALLOC(sizeof(*r300)); + r300 = (r300ContextPtr) CALLOC(sizeof(*r300)); if (!r300) return GL_FALSE; + if (!(screen->chip_flags & RADEON_CHIPSET_TCL)) + hw_tcl_on = future_hw_tcl_on = 0; + /* Parse configuration files. * Do this here so that initialMaxAnisotropy is set before we create * the default textures. @@ -200,8 +204,6 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual, r300->initialMaxAnisotropy = driQueryOptionf(&r300->radeon.optionCache, "def_max_anisotropy"); - //r300->texmicrotile = GL_TRUE; - /* Init default driver functions then plug in our R300-specific functions * (the texture functions are especially important) */ @@ -212,21 +214,19 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual, r300InitShaderFuncs(&functions); #ifdef USER_BUFFERS - radeon_mm_init(r300); -#endif -#ifdef HW_VBOS - if (hw_tcl_on) { - r300_init_vbo_funcs(&functions); - } + r300_mem_init(r300); #endif + if (!radeonInitContext(&r300->radeon, &functions, - glVisual, driContextPriv, sharedContextPrivate)) { + glVisual, driContextPriv, + sharedContextPrivate)) { FREE(r300); return GL_FALSE; } /* Init r300 context data */ - r300->dma.buf0_address = r300->radeon.radeonScreen->buffers->list[0].address; + r300->dma.buf0_address = + r300->radeon.radeonScreen->buffers->list[0].address; (void)memset(r300->texture_heaps, 0, sizeof(r300->texture_heaps)); make_empty_list(&r300->swapped); @@ -234,6 +234,7 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual, r300->nr_heaps = 1 /* screen->numTexHeaps */ ; assert(r300->nr_heaps < RADEON_NR_TEX_HEAPS); for (i = 0; i < r300->nr_heaps; i++) { + /* *INDENT-OFF* */ r300->texture_heaps[i] = driCreateTextureHeap(i, r300, screen-> texSize[i], 12, @@ -249,9 +250,10 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual, (destroy_texture_object_t *) r300DestroyTexObj); + /* *INDENT-ON* */ } r300->texture_depth = driQueryOptioni(&r300->radeon.optionCache, - "texture_depth"); + "texture_depth"); if (r300->texture_depth == DRI_CONF_TEXTURE_DEPTH_FB) r300->texture_depth = (screen->cpp == 4) ? DRI_CONF_TEXTURE_DEPTH_32 : DRI_CONF_TEXTURE_DEPTH_16; @@ -263,12 +265,13 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual, ctx = r300->radeon.glCtx; - ctx->Const.MaxTextureImageUnits = driQueryOptioni(&r300->radeon.optionCache, - "texture_image_units"); - ctx->Const.MaxTextureCoordUnits = driQueryOptioni(&r300->radeon.optionCache, - "texture_coord_units"); - ctx->Const.MaxTextureUnits = MIN2(ctx->Const.MaxTextureImageUnits, - ctx->Const.MaxTextureCoordUnits); + ctx->Const.MaxTextureImageUnits = + driQueryOptioni(&r300->radeon.optionCache, "texture_image_units"); + ctx->Const.MaxTextureCoordUnits = + driQueryOptioni(&r300->radeon.optionCache, "texture_coord_units"); + ctx->Const.MaxTextureUnits = + MIN2(ctx->Const.MaxTextureImageUnits, + ctx->Const.MaxTextureCoordUnits); ctx->Const.MaxTextureMaxAnisotropy = 16.0; ctx->Const.MinPointSize = 1.0; @@ -284,7 +287,8 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual, #ifdef USER_BUFFERS /* Needs further modifications */ #if 0 - ctx->Const.MaxArrayLockSize = (/*512*/RADEON_BUFFER_SIZE*16*1024) / (4*4); + ctx->Const.MaxArrayLockSize = + ( /*512 */ RADEON_BUFFER_SIZE * 16 * 1024) / (4 * 4); #endif #endif @@ -314,54 +318,54 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual, _tnl_allow_vertex_fog(ctx, GL_TRUE); /* currently bogus data */ - ctx->Const.VertexProgram.MaxInstructions=VSF_MAX_FRAGMENT_LENGTH/4; - ctx->Const.VertexProgram.MaxNativeInstructions=VSF_MAX_FRAGMENT_LENGTH/4; - ctx->Const.VertexProgram.MaxNativeAttribs=16; /* r420 */ - ctx->Const.VertexProgram.MaxTemps=32; - ctx->Const.VertexProgram.MaxNativeTemps=/*VSF_MAX_FRAGMENT_TEMPS*/32; - ctx->Const.VertexProgram.MaxNativeParameters=256; /* r420 */ - ctx->Const.VertexProgram.MaxNativeAddressRegs=1; + ctx->Const.VertexProgram.MaxInstructions = VSF_MAX_FRAGMENT_LENGTH / 4; + ctx->Const.VertexProgram.MaxNativeInstructions = + VSF_MAX_FRAGMENT_LENGTH / 4; + ctx->Const.VertexProgram.MaxNativeAttribs = 16; /* r420 */ + ctx->Const.VertexProgram.MaxTemps = 32; + ctx->Const.VertexProgram.MaxNativeTemps = + /*VSF_MAX_FRAGMENT_TEMPS */ 32; + ctx->Const.VertexProgram.MaxNativeParameters = 256; /* r420 */ + ctx->Const.VertexProgram.MaxNativeAddressRegs = 1; ctx->Const.FragmentProgram.MaxNativeTemps = PFS_NUM_TEMP_REGS; - ctx->Const.FragmentProgram.MaxNativeAttribs = 11; /* copy i915... */ + ctx->Const.FragmentProgram.MaxNativeAttribs = 11; /* copy i915... */ ctx->Const.FragmentProgram.MaxNativeParameters = PFS_NUM_CONST_REGS; ctx->Const.FragmentProgram.MaxNativeAluInstructions = PFS_MAX_ALU_INST; ctx->Const.FragmentProgram.MaxNativeTexInstructions = PFS_MAX_TEX_INST; - ctx->Const.FragmentProgram.MaxNativeInstructions = PFS_MAX_ALU_INST+PFS_MAX_TEX_INST; - ctx->Const.FragmentProgram.MaxNativeTexIndirections = PFS_MAX_TEX_INDIRECT; - ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0; /* and these are?? */ + ctx->Const.FragmentProgram.MaxNativeInstructions = + PFS_MAX_ALU_INST + PFS_MAX_TEX_INST; + ctx->Const.FragmentProgram.MaxNativeTexIndirections = + PFS_MAX_TEX_INDIRECT; + ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0; /* and these are?? */ _tnl_ProgramCacheInit(ctx); ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE; driInitExtensions(ctx, card_extensions, GL_TRUE); - if (driQueryOptionb(&r300->radeon.optionCache, "disable_stencil_two_side") == 0) - driInitSingleExtension(ctx, stencil_two_side); - - if (r300->radeon.glCtx->Mesa_DXTn && !driQueryOptionb (&r300->radeon.optionCache, "disable_s3tc")) { - _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" ); - _mesa_enable_extension( ctx, "GL_S3_s3tc" ); - } - else if (driQueryOptionb (&r300->radeon.optionCache, "force_s3tc_enable")) { - _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" ); + if (driQueryOptionb + (&r300->radeon.optionCache, "disable_stencil_two_side")) + _mesa_disable_extension(ctx, "GL_EXT_stencil_two_side"); + + if (r300->radeon.glCtx->Mesa_DXTn + && !driQueryOptionb(&r300->radeon.optionCache, "disable_s3tc")) { + _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc"); + _mesa_enable_extension(ctx, "GL_S3_s3tc"); + } else + if (driQueryOptionb(&r300->radeon.optionCache, "force_s3tc_enable")) + { + _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc"); } - r300->disable_lowimpact_fallback = driQueryOptionb(&r300->radeon.optionCache, "disable_lowimpact_fallback"); + r300->disable_lowimpact_fallback = + driQueryOptionb(&r300->radeon.optionCache, + "disable_lowimpact_fallback"); radeonInitSpanFuncs(ctx); r300InitCmdBuf(r300); r300InitState(r300); - -#ifdef RADEON_VTXFMT_A - radeon_init_vtxfmt_a(r300); -#endif - -#if 0 - /* plug in a few more device driver functions */ - /* XXX these should really go right after _mesa_init_driver_functions() */ - r300InitPixelFuncs(ctx); r300InitSwtcl(ctx); -#endif + TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline; tcl_mode = driQueryOptioni(&r300->radeon.optionCache, "tcl_mode"); @@ -374,10 +378,12 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual, if (tcl_mode == DRI_CONF_TCL_SW || !(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) { if (r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) { - r300->radeon.radeonScreen->chip_flags &= ~RADEON_CHIPSET_TCL; + r300->radeon.radeonScreen->chip_flags &= + ~RADEON_CHIPSET_TCL; fprintf(stderr, "Disabling HW TCL support\n"); } - TCL_FALLBACK(r300->radeon.glCtx, RADEON_TCL_FALLBACK_TCL_DISABLE, 1); + TCL_FALLBACK(r300->radeon.glCtx, + RADEON_TCL_FALLBACK_TCL_DISABLE, 1); } return GL_TRUE; @@ -385,7 +391,7 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual, static void r300FreeGartAllocations(r300ContextPtr r300) { - int i, ret, tries=0, done_age, in_use=0; + int i, ret, tries = 0, done_age, in_use = 0; drm_radeon_mem_free_t memfree; memfree.region = RADEON_MEM_REGION_GART; @@ -405,7 +411,7 @@ static void r300FreeGartAllocations(r300ContextPtr r300) if (in_use) r300FlushCmdBuf(r300, __FUNCTION__); - done_age = radeonGetAge((radeonContextPtr)r300); + done_age = radeonGetAge((radeonContextPtr) r300); for (i = r300->rmm->u_last; i > 0; i--) { if (r300->rmm->u_list[i].ptr == NULL) { @@ -420,19 +426,20 @@ static void r300FreeGartAllocations(r300ContextPtr r300) assert(r300->rmm->u_list[i].h_pending == 0); tries = 0; - while(r300->rmm->u_list[i].age > done_age && tries++ < 1000) { + while (r300->rmm->u_list[i].age > done_age && tries++ < 1000) { usleep(10); - done_age = radeonGetAge((radeonContextPtr)r300); + done_age = radeonGetAge((radeonContextPtr) r300); } if (tries >= 1000) { WARN_ONCE("Failed to idle region!"); } memfree.region_offset = (char *)r300->rmm->u_list[i].ptr - - (char *)r300->radeon.radeonScreen->gartTextures.map; + (char *)r300->radeon.radeonScreen->gartTextures.map; ret = drmCommandWrite(r300->radeon.radeonScreen->driScreen->fd, - DRM_RADEON_FREE, &memfree, sizeof(memfree)); + DRM_RADEON_FREE, &memfree, + sizeof(memfree)); if (ret) { fprintf(stderr, "Failed to free at %p\nret = %s\n", r300->rmm->u_list[i].ptr, strerror(-ret)); @@ -442,18 +449,10 @@ static void r300FreeGartAllocations(r300ContextPtr r300) r300->rmm->u_list[i].pending = 0; r300->rmm->u_list[i].ptr = NULL; - if (r300->rmm->u_list[i].fb) { - LOCK_HARDWARE(&(r300->radeon)); - ret = mmFreeMem(r300->rmm->u_list[i].fb); - UNLOCK_HARDWARE(&(r300->radeon)); - if (ret) fprintf(stderr, "failed to free!\n"); - r300->rmm->u_list[i].fb = NULL; - } - r300->rmm->u_list[i].ref_count = 0; } } - r300->rmm->u_head = i; -#endif /* USER_BUFFERS */ + r300->rmm->u_head = i; +#endif /* USER_BUFFERS */ } /* Destroy the device specific context. @@ -481,7 +480,8 @@ void r300DestroyContext(__DRIcontextPrivate * driContextPriv) if (r300) { GLboolean release_texture_heaps; - release_texture_heaps = (r300->radeon.glCtx->Shared->RefCount == 1); + release_texture_heaps = + (r300->radeon.glCtx->Shared->RefCount == 1); _swsetup_DestroyContext(r300->radeon.glCtx); _tnl_ProgramCacheDestroy(r300->radeon.glCtx); _tnl_DestroyContext(r300->radeon.glCtx); @@ -489,7 +489,8 @@ void r300DestroyContext(__DRIcontextPrivate * driContextPriv) _swrast_DestroyContext(r300->radeon.glCtx); if (r300->dma.current.buf) { - r300ReleaseDmaRegion(r300, &r300->dma.current, __FUNCTION__ ); + r300ReleaseDmaRegion(r300, &r300->dma.current, + __FUNCTION__); #ifndef USER_BUFFERS r300FlushCmdBuf(r300, __FUNCTION__); #endif @@ -522,7 +523,7 @@ void r300DestroyContext(__DRIcontextPrivate * driContextPriv) /* the memory manager might be accessed when Mesa frees the shared * state, so don't destroy it earlier */ - radeon_mm_destroy(r300); + r300_mem_destroy(r300); #endif /* free the option cache */ diff --git a/src/mesa/drivers/dri/r300/r300_context.h b/src/mesa/drivers/dri/r300/r300_context.h index c8b81d9849..6615bc79fb 100644 --- a/src/mesa/drivers/dri/r300/r300_context.h +++ b/src/mesa/drivers/dri/r300/r300_context.h @@ -27,10 +27,11 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ -/* - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - * Nicolai Haehnle <prefect_@gmx.net> +/** + * \file + * + * \author Keith Whitwell <keith@tungstengraphics.com> + * \author Nicolai Haehnle <prefect_@gmx.net> */ #ifndef __R300_CONTEXT_H__ @@ -45,21 +46,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "macros.h" #include "mtypes.h" #include "colormac.h" -#include "radeon_context.h" #define USER_BUFFERS -/* KW: Disable this code. Driver should hook into vbo module - * directly, see i965 driver for example. - */ -/* #define RADEON_VTXFMT_A */ -#define HW_VBOS - -/* We don't handle 16 bits elts swapping yet */ -#ifdef MESA_BIG_ENDIAN -#define FORCE_32BITS_ELTS -#endif - -//#define OPTIMIZE_ELTS struct r300_context; typedef struct r300_context r300ContextRec; @@ -68,13 +56,10 @@ typedef struct r300_context *r300ContextPtr; #include "radeon_lock.h" #include "mm.h" -/* Checkpoint.. for convenience */ -#define CPT { fprintf(stderr, "%s:%s line %d\n", __FILE__, __FUNCTION__, __LINE__); } /* From http://gcc.gnu.org/onlinedocs/gcc-3.2.3/gcc/Variadic-Macros.html . I suppose we could inline this and use macro to fetch out __LINE__ and stuff in case we run into trouble with other compilers ... GLUE! */ -#if 1 #define WARN_ONCE(a, ...) { \ static int warn##__LINE__=1; \ if(warn##__LINE__){ \ @@ -86,32 +71,61 @@ typedef struct r300_context *r300ContextPtr; warn##__LINE__=0;\ } \ } -#else -#define WARN_ONCE(a, ...) {} -#endif - /* We should probably change types within vertex_shader - and pixel_shader structure later on */ -#define CARD32 GLuint -#include "vertex_shader.h" +#include "r300_vertprog.h" #include "r300_fragprog.h" -#undef CARD32 -static __inline__ uint32_t r300PackFloat32(float fl) +/** + * This function takes a float and packs it into a uint32_t + */ +static inline uint32_t r300PackFloat32(float fl) { - union { float fl; uint32_t u; } u; + union { + float fl; + uint32_t u; + } u; u.fl = fl; return u.u; } +/* This is probably wrong for some values, I need to test this + * some more. Range checking would be a good idea also.. + * + * But it works for most things. I'll fix it later if someone + * else with a better clue doesn't + */ +static inline uint32_t r300PackFloat24(float f) +{ + float mantissa; + int exponent; + uint32_t float24 = 0; + + if (f == 0.0) + return 0; + + mantissa = frexpf(f, &exponent); + + /* Handle -ve */ + if (mantissa < 0) { + float24 |= (1 << 23); + mantissa = mantissa * -1.0; + } + /* Handle exponent, bias of 63 */ + exponent += 62; + float24 |= (exponent << 16); + /* Kill 7 LSB of mantissa */ + float24 |= (r300PackFloat32(mantissa) & 0x7FFFFF) >> 7; + + return float24; +} /************ DMA BUFFERS **************/ /* Need refcounting on dma buffers: */ struct r300_dma_buffer { - int refcount; /* the number of retained regions in buf */ + int refcount; /**< the number of retained regions in buf */ drmBufPtr buf; int id; }; @@ -130,10 +144,9 @@ struct r300_dma_region { char *address; /* == buf->address */ int start, end, ptr; /* offsets from start of buf */ - int aos_offset; /* address in GART memory */ - int aos_stride; /* distance between elements, in dwords */ - int aos_size; /* number of components (1-4) */ - int aos_reg; /* VAP register assignment */ + int aos_offset; /* address in GART memory */ + int aos_stride; /* distance between elements, in dwords */ + int aos_size; /* number of components (1-4) */ }; struct r300_dma { @@ -175,16 +188,17 @@ struct r300_tex_obj { drm_radeon_tex_image_t image[6][RADEON_MAX_TEXTURE_LEVELS]; /* Six, for the cube faces */ + GLboolean image_override; /* Image overridden by GLX_EXT_tfp */ - GLuint pitch; /* this isn't sent to hardware just used in calculations */ + GLuint pitch; /* this isn't sent to hardware just used in calculations */ /* hardware register values */ /* Note that R200 has 8 registers per texture and R300 only 7 */ GLuint filter; GLuint filter_1; GLuint pitch_reg; - GLuint size; /* npot only */ + GLuint size; /* npot only */ GLuint format; - GLuint offset; /* Image location in the card's address space. + GLuint offset; /* Image location in the card's address space. All cube faces follow. */ GLuint unknown4; GLuint unknown5; @@ -198,10 +212,9 @@ struct r300_tex_obj { GLuint pp_cubic_faces; /* cube face 1,2,3,4 log2 sizes */ GLuint format_x; - GLboolean border_fallback; - GLuint tile_bits; /* hw texture tile bits used on this texture */ + GLuint tile_bits; /* hw texture tile bits used on this texture */ }; struct r300_texture_env_state { @@ -210,7 +223,6 @@ struct r300_texture_env_state { GLenum envMode; }; - /* The blit width for texture uploads */ #define R300_BLIT_WIDTH_BYTES 1024 @@ -218,7 +230,7 @@ struct r300_texture_env_state { struct r300_texture_state { struct r300_texture_env_state unit[R300_MAX_TEXTURE_UNITS]; - int tc_count; /* number of incoming texture coordinates from VAP */ + int tc_count; /* number of incoming texture coordinates from VAP */ }; /** @@ -230,16 +242,15 @@ struct r300_texture_state { */ struct r300_state_atom { struct r300_state_atom *next, *prev; - const char* name; /* for debug */ + const char *name; /* for debug */ int cmd_size; /* maximum size in dwords */ GLuint idx; /* index in an array (e.g. textures) */ - uint32_t* cmd; + uint32_t *cmd; GLboolean dirty; - int (*check)(r300ContextPtr, struct r300_state_atom* atom); + int (*check) (r300ContextPtr, struct r300_state_atom * atom); }; - #define R300_VPT_CMD_0 0 #define R300_VPT_XSCALE 1 #define R300_VPT_XOFFSET 2 @@ -249,7 +260,7 @@ struct r300_state_atom { #define R300_VPT_ZOFFSET 6 #define R300_VPT_CMDSIZE 7 -#define R300_VIR_CMD_0 0 /* vir is variable size (at least 1) */ +#define R300_VIR_CMD_0 0 /* vir is variable size (at least 1) */ #define R300_VIR_CNTL_0 1 #define R300_VIR_CNTL_1 2 #define R300_VIR_CNTL_2 3 @@ -270,7 +281,6 @@ struct r300_state_atom { #define R300_VOF_CNTL_1 2 #define R300_VOF_CMDSIZE 3 - #define R300_PVS_CMD_0 0 #define R300_PVS_CNTL_1 1 #define R300_PVS_CNTL_2 2 @@ -320,7 +330,7 @@ struct r300_state_atom { #define R300_RI_INTERP_7 8 #define R300_RI_CMDSIZE 9 -#define R300_RR_CMD_0 0 /* rr is variable size (at least 1) */ +#define R300_RR_CMD_0 0 /* rr is variable size (at least 1) */ #define R300_RR_ROUTE_0 1 #define R300_RR_ROUTE_1 2 #define R300_RR_ROUTE_2 3 @@ -402,11 +412,11 @@ struct r300_state_atom { #define R300_VPI_CMD_0 0 #define R300_VPI_INSTR_0 1 -#define R300_VPI_CMDSIZE 1025 /* 256 16 byte instructions */ +#define R300_VPI_CMDSIZE 1025 /* 256 16 byte instructions */ #define R300_VPP_CMD_0 0 #define R300_VPP_PARAM_0 1 -#define R300_VPP_CMDSIZE 1025 /* 256 4-component parameters */ +#define R300_VPP_CMDSIZE 1025 /* 256 4-component parameters */ #define R300_VPS_CMD_0 0 #define R300_VPS_ZERO_0 1 @@ -428,54 +438,54 @@ struct r300_state_atom { struct r300_hw_state { struct r300_state_atom atomlist; - GLboolean is_dirty; - GLboolean all_dirty; - int max_state_size; /* in dwords */ + GLboolean is_dirty; + GLboolean all_dirty; + int max_state_size; /* in dwords */ struct r300_state_atom vpt; /* viewport (1D98) */ struct r300_state_atom vap_cntl; - struct r300_state_atom vof; /* VAP output format register 0x2090 */ + struct r300_state_atom vof; /* VAP output format register 0x2090 */ struct r300_state_atom vte; /* (20B0) */ struct r300_state_atom unk2134; /* (2134) */ struct r300_state_atom vap_cntl_status; struct r300_state_atom vir[2]; /* vap input route (2150/21E0) */ struct r300_state_atom vic; /* vap input control (2180) */ - struct r300_state_atom unk21DC; /* (21DC) */ - struct r300_state_atom unk221C; /* (221C) */ - struct r300_state_atom unk2220; /* (2220) */ - struct r300_state_atom unk2288; /* (2288) */ + struct r300_state_atom unk21DC; /* (21DC) */ + struct r300_state_atom unk221C; /* (221C) */ + struct r300_state_atom vap_clip; + struct r300_state_atom unk2288; /* (2288) */ struct r300_state_atom pvs; /* pvs_cntl (22D0) */ - struct r300_state_atom gb_enable; /* (4008) */ - struct r300_state_atom gb_misc; /* Multisampling position shifts ? (4010) */ - struct r300_state_atom unk4200; /* (4200) */ - struct r300_state_atom unk4214; /* (4214) */ + struct r300_state_atom gb_enable; /* (4008) */ + struct r300_state_atom gb_misc; /* Multisampling position shifts ? (4010) */ + struct r300_state_atom unk4200; /* (4200) */ + struct r300_state_atom unk4214; /* (4214) */ struct r300_state_atom ps; /* pointsize (421C) */ - struct r300_state_atom unk4230; /* (4230) */ + struct r300_state_atom unk4230; /* (4230) */ struct r300_state_atom lcntl; /* line control */ - struct r300_state_atom unk4260; /* (4260) */ + struct r300_state_atom unk4260; /* (4260) */ struct r300_state_atom shade; struct r300_state_atom polygon_mode; struct r300_state_atom fogp; /* fog parameters (4294) */ - struct r300_state_atom unk429C; /* (429C) */ + struct r300_state_atom unk429C; /* (429C) */ struct r300_state_atom zbias_cntl; struct r300_state_atom zbs; /* zbias (42A4) */ struct r300_state_atom occlusion_cntl; struct r300_state_atom cul; /* cull cntl (42B8) */ - struct r300_state_atom unk42C0; /* (42C0) */ + struct r300_state_atom unk42C0; /* (42C0) */ struct r300_state_atom rc; /* rs control (4300) */ struct r300_state_atom ri; /* rs interpolators (4310) */ struct r300_state_atom rr; /* rs route (4330) */ struct r300_state_atom unk43A4; /* (43A4) */ struct r300_state_atom unk43E8; /* (43E8) */ struct r300_state_atom fp; /* fragment program cntl + nodes (4600) */ - struct r300_state_atom fpt; /* texi - (4620) */ + struct r300_state_atom fpt; /* texi - (4620) */ struct r300_state_atom unk46A4; /* (46A4) */ struct r300_state_atom fpi[4]; /* fp instructions (46C0/47C0/48C0/49C0) */ struct r300_state_atom fogs; /* fog state (4BC0) */ struct r300_state_atom fogc; /* fog color (4BC8) */ struct r300_state_atom at; /* alpha test (4BD4) */ struct r300_state_atom unk4BD8; /* (4BD8) */ - struct r300_state_atom fpp; /* 0x4C00 and following */ + struct r300_state_atom fpp; /* 0x4C00 and following */ struct r300_state_atom unk4E00; /* (4E00) */ struct r300_state_atom bld; /* blending (4E04) */ struct r300_state_atom cmk; /* colormask (4E0C) */ @@ -495,11 +505,11 @@ struct r300_hw_state { struct r300_state_atom vpi; /* vp instructions */ struct r300_state_atom vpp; /* vp parameters */ struct r300_state_atom vps; /* vertex point size (?) */ - /* 8 texture units */ - /* the state is grouped by function and not by - texture unit. This makes single unit updates - really awkward - we are much better off - updating the whole thing at once */ + /* 8 texture units */ + /* the state is grouped by function and not by + texture unit. This makes single unit updates + really awkward - we are much better off + updating the whole thing at once */ struct { struct r300_state_atom filter; struct r300_state_atom filter_1; @@ -509,11 +519,10 @@ struct r300_hw_state { struct r300_state_atom offset; struct r300_state_atom chroma_key; struct r300_state_atom border_color; - } tex; + } tex; struct r300_state_atom txe; /* tex enable (4104) */ }; - /** * This structure holds the command buffer while it is being constructed. * @@ -522,13 +531,12 @@ struct r300_hw_state { * otherwise. */ struct r300_cmdbuf { - int size; /* DWORDs allocated for buffer */ - uint32_t* cmd_buf; - int count_used; /* DWORDs filled so far */ - int count_reemit; /* size of re-emission batch */ + int size; /* DWORDs allocated for buffer */ + uint32_t *cmd_buf; + int count_used; /* DWORDs filled so far */ + int count_reemit; /* size of re-emission batch */ }; - /** * State cache */ @@ -560,9 +568,9 @@ struct r300_vertex_shader_fragment { union { GLuint d[VSF_MAX_FRAGMENT_LENGTH]; float f[VSF_MAX_FRAGMENT_LENGTH]; - VERTEX_SHADER_INSTRUCTION i[VSF_MAX_FRAGMENT_LENGTH/4]; - } body; - }; + VERTEX_SHADER_INSTRUCTION i[VSF_MAX_FRAGMENT_LENGTH / 4]; + } body; +}; #define VSF_DEST_PROGRAM 0x0 #define VSF_DEST_MATRIX0 0x200 @@ -575,35 +583,21 @@ struct r300_vertex_shader_fragment { struct r300_vertex_shader_state { struct r300_vertex_shader_fragment program; - - /* a bit of a waste - each uses only a subset of allocated space.. - but easier to program */ - struct r300_vertex_shader_fragment matrix[3]; - struct r300_vertex_shader_fragment vector[2]; - - struct r300_vertex_shader_fragment unknown1; - struct r300_vertex_shader_fragment unknown2; - - int program_start; - int unknown_ptr1; /* pointer within program space */ - int program_end; - - int param_offset; - int param_count; - - int unknown_ptr2; /* pointer within program space */ - int unknown_ptr3; /* pointer within program space */ - }; +}; extern int hw_tcl_on; +#define COLOR_IS_RGBA +#define TAG(x) r300##x +#include "tnl_dd/t_dd_vertex.h" +#undef TAG + //#define CURRENT_VERTEX_SHADER(ctx) (ctx->VertexProgram._Current) #define CURRENT_VERTEX_SHADER(ctx) (R300_CONTEXT(ctx)->selected_vp) /* Should but doesnt work */ //#define CURRENT_VERTEX_SHADER(ctx) (R300_CONTEXT(ctx)->curr_vp) - /* r300_vertex_shader_state and r300_vertex_program should probably be merged together someday. * Keeping them them seperate for now should ensure fixed pipeline keeps functioning properly. */ @@ -621,7 +615,7 @@ struct r300_vertex_program { struct r300_vertex_shader_fragment program; int pos_end; - int num_temporaries; /* Number of temp vars used by program */ + int num_temporaries; /* Number of temp vars used by program */ int wpos_idx; int inputs[VERT_ATTRIB_MAX]; int outputs[VERT_RESULT_MAX]; @@ -631,7 +625,7 @@ struct r300_vertex_program { }; struct r300_vertex_program_cont { - struct gl_vertex_program mesa_program; /* Must be first */ + struct gl_vertex_program mesa_program; /* Must be first */ struct r300_vertex_shader_fragment params; struct r300_vertex_program *progs; }; @@ -644,8 +638,8 @@ struct r300_vertex_program_cont { /* Mapping Mesa registers to R300 temporaries */ struct reg_acc { - int reg; /* Assigned hw temp */ - unsigned int refcount; /* Number of uses by mesa program */ + int reg; /* Assigned hw temp */ + unsigned int refcount; /* Number of uses by mesa program */ }; /** @@ -676,7 +670,6 @@ struct reg_lifetime { int scalar_lastread; }; - /** * Store usage information about an ALU instruction slot during the * compilation of a fragment program. @@ -702,7 +695,7 @@ struct r300_pfs_compile_slot { * Store information during compilation of fragment programs. */ struct r300_pfs_compile_state { - int nrslots; /* number of ALU slots used so far */ + int nrslots; /* number of ALU slots used so far */ /* Track which (parts of) slots are already filled with instructions */ struct r300_pfs_compile_slot slot[PFS_MAX_ALU_INST]; @@ -713,7 +706,7 @@ struct r300_pfs_compile_state { /* Used to map Mesa's inputs/temps onto hardware temps */ int temp_in_use; struct reg_acc temps[PFS_NUM_TEMP_REGS]; - struct reg_acc inputs[32]; /* don't actually need 32... */ + struct reg_acc inputs[32]; /* don't actually need 32... */ /* Track usage of hardware temps, for register allocation, * indirection detection, etc. */ @@ -769,7 +762,7 @@ struct r300_fragment_program { * gl_program_parameter_list::ParameterValues, or a pointer to a * global constant (e.g. for sin/cos-approximation) */ - const GLfloat* constant[PFS_NUM_CONST_REGS]; + const GLfloat *constant[PFS_NUM_CONST_REGS]; int const_nr; int max_temp_idx; @@ -779,50 +772,10 @@ struct r300_fragment_program { #define R300_MAX_AOS_ARRAYS 16 -#define AOS_FORMAT_USHORT 0 -#define AOS_FORMAT_FLOAT 1 -#define AOS_FORMAT_UBYTE 2 -#define AOS_FORMAT_FLOAT_COLOR 3 - #define REG_COORDS 0 #define REG_COLOR0 1 #define REG_TEX0 2 -struct dt { - GLint size; - GLenum type; - GLsizei stride; - void *data; -}; - -struct radeon_vertex_buffer { - int Count; - void *Elts; - int elt_size; - int elt_min, elt_max; /* debug */ - - struct dt AttribPtr[VERT_ATTRIB_MAX]; - - const struct _mesa_prim *Primitive; - GLuint PrimitiveCount; - GLint LockFirst; - GLsizei LockCount; - int lock_uptodate; -}; - -struct r300_aos_rec { - GLuint offset; - int element_size; /* in dwords */ - int stride; /* distance between elements, in dwords */ - - int format; - - int ncomponents; /* number of components - between 1 and 4, inclusive */ - - int reg; /* which register they are assigned to. */ - - }; - struct r300_state { struct r300_depthbuffer_state depth; struct r300_texture_state texture; @@ -831,17 +784,13 @@ struct r300_state { struct r300_pfs_compile_state pfs_compile; struct r300_dma_region aos[R300_MAX_AOS_ARRAYS]; int aos_count; - struct radeon_vertex_buffer VB; GLuint *Elts; struct r300_dma_region elt_dma; - DECLARE_RENDERINPUTS(render_inputs_bitset); /* actual render inputs that R300 was configured for. - They are the same as tnl->render_inputs for fixed pipeline */ - - struct { - int transform_offset; /* Transform matrix offset, -1 if none */ - } vap_param; /* vertex processor parameter allocation - tells where to write parameters */ + struct r300_dma_region swtcl_dma; + DECLARE_RENDERINPUTS(render_inputs_bitset); /* actual render inputs that R300 was configured for. + They are the same as tnl->render_inputs for fixed pipeline */ struct r300_stencilbuffer_state stencil; @@ -851,11 +800,67 @@ struct r300_state { #define R300_FALLBACK_TCL 1 #define R300_FALLBACK_RAST 2 +/* r300_swtcl.c + */ +struct r300_swtcl_info { + GLuint RenderIndex; + + /** + * Size of a hardware vertex. This is calculated when \c ::vertex_attrs is + * installed in the Mesa state vector. + */ + GLuint vertex_size; + + /** + * Attributes instructing the Mesa TCL pipeline where / how to put vertex + * data in the hardware buffer. + */ + struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX]; + + /** + * Number of elements of \c ::vertex_attrs that are actually used. + */ + GLuint vertex_attr_count; + + /** + * Cached pointer to the buffer where Mesa will store vertex data. + */ + GLubyte *verts; + + /* Fallback rasterization functions + */ + // r200_point_func draw_point; + // r200_line_func draw_line; + // r200_tri_func draw_tri; + + GLuint hw_primitive; + GLenum render_primitive; + GLuint numverts; + + /** + * Offset of the 4UB color data within a hardware (swtcl) vertex. + */ + GLuint coloroffset; + + /** + * Offset of the 3UB specular color data within a hardware (swtcl) vertex. + */ + GLuint specoffset; + + /** + * Should Mesa project vertex data or will the hardware do it? + */ + GLboolean needproj; + + struct r300_dma_region indexed_verts; +}; + + /** - * R300 context structure. + * \brief R300 context structure. */ struct r300_context { - struct radeon_context radeon; /* parent class, must be first */ + struct radeon_context radeon; /* parent class, must be first */ struct r300_hw_state hw; struct r300_cmdbuf cmdbuf; @@ -882,14 +887,16 @@ struct r300_context { GLuint prefer_gart_client_texturing; #ifdef USER_BUFFERS - struct radeon_memory_manager *rmm; + struct r300_memory_manager *rmm; +#endif + GLvector4f dummy_attrib[_TNL_ATTRIB_MAX]; GLvector4f *temp_attrib[_TNL_ATTRIB_MAX]; -#endif - GLboolean texmicrotile; - GLboolean span_dlocking; GLboolean disable_lowimpact_fallback; + + DECLARE_RENDERINPUTS(tnl_index_bitset); /* index of bits for last tnl_install_attrs */ + struct r300_swtcl_info swtcl; }; struct r300_buffer_object { @@ -899,42 +906,16 @@ struct r300_buffer_object { #define R300_CONTEXT(ctx) ((r300ContextPtr)(ctx->DriverCtx)) -static __inline GLuint r300PackColor( GLuint cpp, - GLubyte r, GLubyte g, - GLubyte b, GLubyte a ) -{ - switch ( cpp ) { - case 2: - return PACK_COLOR_565( r, g, b ); - case 4: - return PACK_COLOR_8888( r, g, b, a ); - default: - return 0; - } -} extern void r300DestroyContext(__DRIcontextPrivate * driContextPriv); extern GLboolean r300CreateContext(const __GLcontextModes * glVisual, __DRIcontextPrivate * driContextPriv, void *sharedContextPrivate); -extern int r300_get_num_verts(r300ContextPtr rmesa, int num_verts, int prim); - -extern void r300_select_vertex_shader(r300ContextPtr r300); +extern void r300SelectVertexShader(r300ContextPtr r300); extern void r300InitShaderFuncs(struct dd_function_table *functions); -extern int r300VertexProgUpdateParams(GLcontext *ctx, struct r300_vertex_program_cont *vp, float *dst); -extern int r300Fallback(GLcontext *ctx); - -extern void radeon_vb_to_rvb(r300ContextPtr rmesa, struct radeon_vertex_buffer *rvb, struct vertex_buffer *vb); -extern GLboolean r300_run_vb_render(GLcontext *ctx, struct tnl_pipeline_stage *stage); - -#ifdef RADEON_VTXFMT_A -extern void radeon_init_vtxfmt_a(r300ContextPtr rmesa); -#endif - -#ifdef HW_VBOS -extern void r300_init_vbo_funcs(struct dd_function_table *functions); -extern void r300_evict_vbos(GLcontext *ctx, int amount); -#endif +extern int r300VertexProgUpdateParams(GLcontext * ctx, + struct r300_vertex_program_cont *vp, + float *dst); #define RADEON_D_CAPTURE 0 #define RADEON_D_PLAYBACK 1 diff --git a/src/mesa/drivers/dri/r300/r300_emit.c b/src/mesa/drivers/dri/r300/r300_emit.c new file mode 100644 index 0000000000..229439dfa8 --- /dev/null +++ b/src/mesa/drivers/dri/r300/r300_emit.c @@ -0,0 +1,550 @@ +/* +Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. + +The Weather Channel (TM) funded Tungsten Graphics to develop the +initial release of the Radeon 8500 driver under the XFree86 license. +This notice must be preserved. + +Permission is hereby granted, free of charge, to any person obtaining +a copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, sublicense, and/or sell copies of the Software, and to +permit persons to whom the Software is furnished to do so, subject to +the following conditions: + +The above copyright notice and this permission notice (including the +next paragraph) shall be included in all copies or substantial +portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE +LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION +OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION +WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/** + * \file + * + * \author Keith Whitwell <keith@tungstengraphics.com> + */ + +#include "glheader.h" +#include "mtypes.h" +#include "colormac.h" +#include "imports.h" +#include "macros.h" +#include "image.h" + +#include "swrast_setup/swrast_setup.h" +#include "math/m_translate.h" +#include "tnl/tnl.h" +#include "tnl/t_context.h" + +#include "r300_context.h" +#include "radeon_ioctl.h" +#include "r300_state.h" +#include "r300_emit.h" +#include "r300_ioctl.h" + +#ifdef USER_BUFFERS +#include "r300_mem.h" +#endif + +#if SWIZZLE_X != R300_INPUT_ROUTE_SELECT_X || \ + SWIZZLE_Y != R300_INPUT_ROUTE_SELECT_Y || \ + SWIZZLE_Z != R300_INPUT_ROUTE_SELECT_Z || \ + SWIZZLE_W != R300_INPUT_ROUTE_SELECT_W || \ + SWIZZLE_ZERO != R300_INPUT_ROUTE_SELECT_ZERO || \ + SWIZZLE_ONE != R300_INPUT_ROUTE_SELECT_ONE +#error Cannot change these! +#endif + +#define DEBUG_ALL DEBUG_VERTS + +#if defined(USE_X86_ASM) +#define COPY_DWORDS( dst, src, nr ) \ +do { \ + int __tmp; \ + __asm__ __volatile__( "rep ; movsl" \ + : "=%c" (__tmp), "=D" (dst), "=S" (__tmp) \ + : "0" (nr), \ + "D" ((long)dst), \ + "S" ((long)src) ); \ +} while (0) +#else +#define COPY_DWORDS( dst, src, nr ) \ +do { \ + int j; \ + for ( j = 0 ; j < nr ; j++ ) \ + dst[j] = ((int *)src)[j]; \ + dst += nr; \ +} while (0) +#endif + +static void r300EmitVec4(GLcontext * ctx, struct r300_dma_region *rvb, + GLvoid * data, int stride, int count) +{ + int i; + int *out = (int *)(rvb->address + rvb->start); + + if (RADEON_DEBUG & DEBUG_VERTS) + fprintf(stderr, "%s count %d stride %d out %p data %p\n", + __FUNCTION__, count, stride, (void *)out, (void *)data); + + if (stride == 4) + COPY_DWORDS(out, data, count); + else + for (i = 0; i < count; i++) { + out[0] = *(int *)data; + out++; + data += stride; + } +} + +static void r300EmitVec8(GLcontext * ctx, struct r300_dma_region *rvb, + GLvoid * data, int stride, int count) +{ + int i; + int *out = (int *)(rvb->address + rvb->start); + + if (RADEON_DEBUG & DEBUG_VERTS) + fprintf(stderr, "%s count %d stride %d out %p data %p\n", + __FUNCTION__, count, stride, (void *)out, (void *)data); + + if (stride == 8) + COPY_DWORDS(out, data, count * 2); + else + for (i = 0; i < count; i++) { + out[0] = *(int *)data; + out[1] = *(int *)(data + 4); + out += 2; + data += stride; + } +} + +static void r300EmitVec12(GLcontext * ctx, struct r300_dma_region *rvb, + GLvoid * data, int stride, int count) +{ + int i; + int *out = (int *)(rvb->address + rvb->start); + + if (RADEON_DEBUG & DEBUG_VERTS) + fprintf(stderr, "%s count %d stride %d out %p data %p\n", + __FUNCTION__, count, stride, (void *)out, (void *)data); + + if (stride == 12) + COPY_DWORDS(out, data, count * 3); + else + for (i = 0; i < count; i++) { + out[0] = *(int *)data; + out[1] = *(int *)(data + 4); + out[2] = *(int *)(data + 8); + out += 3; + data += stride; + } +} + +static void r300EmitVec16(GLcontext * ctx, struct r300_dma_region *rvb, + GLvoid * data, int stride, int count) +{ + int i; + int *out = (int *)(rvb->address + rvb->start); + + if (RADEON_DEBUG & DEBUG_VERTS) + fprintf(stderr, "%s count %d stride %d out %p data %p\n", + __FUNCTION__, count, stride, (void *)out, (void *)data); + + if (stride == 16) + COPY_DWORDS(out, data, count * 4); + else + for (i = 0; i < count; i++) { + out[0] = *(int *)data; + out[1] = *(int *)(data + 4); + out[2] = *(int *)(data + 8); + out[3] = *(int *)(data + 12); + out += 4; + data += stride; + } +} + +static void r300EmitVec(GLcontext * ctx, struct r300_dma_region *rvb, + GLvoid * data, int size, int stride, int count) +{ + r300ContextPtr rmesa = R300_CONTEXT(ctx); + + if (stride == 0) { + r300AllocDmaRegion(rmesa, rvb, size * 4, 4); + count = 1; + rvb->aos_offset = GET_START(rvb); + rvb->aos_stride = 0; + } else { + r300AllocDmaRegion(rmesa, rvb, size * count * 4, 4); + rvb->aos_offset = GET_START(rvb); + rvb->aos_stride = size; + } + + switch (size) { + case 1: + r300EmitVec4(ctx, rvb, data, stride, count); + break; + case 2: + r300EmitVec8(ctx, rvb, data, stride, count); + break; + case 3: + r300EmitVec12(ctx, rvb, data, stride, count); + break; + case 4: + r300EmitVec16(ctx, rvb, data, stride, count); + break; + default: + assert(0); + break; + } +} + +static GLuint r300VAPInputRoute0(uint32_t * dst, GLvector4f ** attribptr, + int *inputs, GLint * tab, GLuint nr) +{ + GLuint i, dw; + + /* type, inputs, stop bit, size */ + for (i = 0; i + 1 < nr; i += 2) { + dw = R300_INPUT_ROUTE_FLOAT | (inputs[tab[i]] << 8) | (attribptr[tab[i]]->size - 1); + dw |= (R300_INPUT_ROUTE_FLOAT | (inputs[tab[i + 1]] << 8) | (attribptr[tab[i + 1]]->size - 1)) << 16; + if (i + 2 == nr) { + dw |= (R300_VAP_INPUT_ROUTE_END << 16); + } + dst[i >> 1] = dw; + } + + if (nr & 1) { + dw = R300_INPUT_ROUTE_FLOAT | (inputs[tab[nr - 1]] << 8) | (attribptr[tab[nr - 1]]->size - 1); + dw |= R300_VAP_INPUT_ROUTE_END; + dst[nr >> 1] = dw; + } + + return (nr + 1) >> 1; +} + +static GLuint r300VAPInputRoute1Swizzle(int swizzle[4]) +{ + return (swizzle[0] << R300_INPUT_ROUTE_X_SHIFT) | + (swizzle[1] << R300_INPUT_ROUTE_Y_SHIFT) | + (swizzle[2] << R300_INPUT_ROUTE_Z_SHIFT) | + (swizzle[3] << R300_INPUT_ROUTE_W_SHIFT); +} + +GLuint r300VAPInputRoute1(uint32_t * dst, int swizzle[][4], GLuint nr) +{ + GLuint i; + + for (i = 0; i + 1 < nr; i += 2) { + dst[i >> 1] = r300VAPInputRoute1Swizzle(swizzle[i]) | R300_INPUT_ROUTE_ENABLE; + dst[i >> 1] |= (r300VAPInputRoute1Swizzle(swizzle[i + 1]) | R300_INPUT_ROUTE_ENABLE) << 16; + } + + if (nr & 1) { + dst[nr >> 1] = r300VAPInputRoute1Swizzle(swizzle[nr - 1]) | R300_INPUT_ROUTE_ENABLE; + } + + return (nr + 1) >> 1; +} + +GLuint r300VAPInputCntl0(GLcontext * ctx, GLuint InputsRead) +{ + /* No idea what this value means. I have seen other values written to + * this register... */ + return 0x5555; +} + +GLuint r300VAPInputCntl1(GLcontext * ctx, GLuint InputsRead) +{ + r300ContextPtr rmesa = R300_CONTEXT(ctx); + GLuint i, vic_1 = 0; + + if (InputsRead & (1 << VERT_ATTRIB_POS)) + vic_1 |= R300_INPUT_CNTL_POS; + + if (InputsRead & (1 << VERT_ATTRIB_NORMAL)) + vic_1 |= R300_INPUT_CNTL_NORMAL; + + if (InputsRead & (1 << VERT_ATTRIB_COLOR0)) + vic_1 |= R300_INPUT_CNTL_COLOR; + + rmesa->state.texture.tc_count = 0; + for (i = 0; i < ctx->Const.MaxTextureUnits; i++) + if (InputsRead & (1 << (VERT_ATTRIB_TEX0 + i))) { + rmesa->state.texture.tc_count++; + vic_1 |= R300_INPUT_CNTL_TC0 << i; + } + + return vic_1; +} + +GLuint r300VAPOutputCntl0(GLcontext * ctx, GLuint OutputsWritten) +{ + GLuint ret = 0; + + if (OutputsWritten & (1 << VERT_RESULT_HPOS)) + ret |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT; + + if (OutputsWritten & (1 << VERT_RESULT_COL0)) + ret |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT; + + if (OutputsWritten & (1 << VERT_RESULT_COL1)) + ret |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_1_PRESENT; + +#if 0 + if (OutputsWritten & (1 << VERT_RESULT_BFC0)) + ret |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_2_PRESENT; + + if (OutputsWritten & (1 << VERT_RESULT_BFC1)) + ret |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_3_PRESENT; + + if (OutputsWritten & (1 << VERT_RESULT_FOGC)) ; +#endif + + if (OutputsWritten & (1 << VERT_RESULT_PSIZ)) + ret |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT; + + return ret; +} + +GLuint r300VAPOutputCntl1(GLcontext * ctx, GLuint OutputsWritten) +{ + GLuint i, ret = 0; + + for (i = 0; i < ctx->Const.MaxTextureUnits; i++) { + if (OutputsWritten & (1 << (VERT_RESULT_TEX0 + i))) { + ret |= (4 << (3 * i)); + } + } + + return ret; +} + +/* Emit vertex data to GART memory + * Route inputs to the vertex processor + * This function should never return R300_FALLBACK_TCL when using software tcl. + */ +int r300EmitArrays(GLcontext * ctx) +{ + r300ContextPtr rmesa = R300_CONTEXT(ctx); + TNLcontext *tnl = TNL_CONTEXT(ctx); + struct vertex_buffer *vb = &tnl->vb; + GLuint nr; + GLuint count = vb->Count; + GLuint i; + GLuint InputsRead = 0, OutputsWritten = 0; + int *inputs = NULL; + int vir_inputs[VERT_ATTRIB_MAX]; + GLint tab[VERT_ATTRIB_MAX]; + int swizzle[VERT_ATTRIB_MAX][4]; + struct r300_vertex_program *prog = + (struct r300_vertex_program *)CURRENT_VERTEX_SHADER(ctx); + + if (hw_tcl_on) { + inputs = prog->inputs; + InputsRead = prog->key.InputsRead; + OutputsWritten = prog->key.OutputsWritten; + } else { + inputs = rmesa->state.sw_tcl_inputs; + + DECLARE_RENDERINPUTS(render_inputs_bitset); + RENDERINPUTS_COPY(render_inputs_bitset, tnl->render_inputs_bitset); + + vb->AttribPtr[VERT_ATTRIB_POS] = vb->ClipPtr; + + assert(RENDERINPUTS_TEST(render_inputs_bitset, _TNL_ATTRIB_POS)); + assert(RENDERINPUTS_TEST(render_inputs_bitset, _TNL_ATTRIB_NORMAL) == 0); + //assert(RENDERINPUTS_TEST(render_inputs_bitset, _TNL_ATTRIB_COLOR0)); + + if (RENDERINPUTS_TEST(render_inputs_bitset, _TNL_ATTRIB_POS)) { + InputsRead |= 1 << VERT_ATTRIB_POS; + OutputsWritten |= 1 << VERT_RESULT_HPOS; + } + + if (RENDERINPUTS_TEST(render_inputs_bitset, _TNL_ATTRIB_COLOR0)) { + InputsRead |= 1 << VERT_ATTRIB_COLOR0; + OutputsWritten |= 1 << VERT_RESULT_COL0; + } + + if (RENDERINPUTS_TEST(render_inputs_bitset, _TNL_ATTRIB_COLOR1)) { + InputsRead |= 1 << VERT_ATTRIB_COLOR1; + OutputsWritten |= 1 << VERT_RESULT_COL1; + } + + for (i = 0; i < ctx->Const.MaxTextureUnits; i++) { + if (RENDERINPUTS_TEST(render_inputs_bitset, _TNL_ATTRIB_TEX(i))) { + InputsRead |= 1 << (VERT_ATTRIB_TEX0 + i); + OutputsWritten |= 1 << (VERT_RESULT_TEX0 + i); + } + } + + for (i = 0, nr = 0; i < VERT_ATTRIB_MAX; i++) { + if (InputsRead & (1 << i)) { + inputs[i] = nr++; + } else { + inputs[i] = -1; + } + } + + /* Fixed, apply to vir0 only */ + memcpy(vir_inputs, inputs, VERT_ATTRIB_MAX * sizeof(int)); + inputs = vir_inputs; + if (InputsRead & VERT_ATTRIB_POS) + inputs[VERT_ATTRIB_POS] = 0; + if (InputsRead & (1 << VERT_ATTRIB_COLOR0)) + inputs[VERT_ATTRIB_COLOR0] = 2; + if (InputsRead & (1 << VERT_ATTRIB_COLOR1)) + inputs[VERT_ATTRIB_COLOR1] = 3; + for (i = VERT_ATTRIB_TEX0; i <= VERT_ATTRIB_TEX7; i++) + if (InputsRead & (1 << i)) + inputs[i] = 6 + (i - VERT_ATTRIB_TEX0); + + RENDERINPUTS_COPY(rmesa->state.render_inputs_bitset, render_inputs_bitset); + } + + assert(InputsRead); + assert(OutputsWritten); + + for (i = 0, nr = 0; i < VERT_ATTRIB_MAX; i++) { + if (InputsRead & (1 << i)) { + tab[nr++] = i; + } + } + + if (nr > R300_MAX_AOS_ARRAYS) { + return R300_FALLBACK_TCL; + } + + for (i = 0; i < nr; i++) { + int ci, fix, found = 0; + + swizzle[i][0] = SWIZZLE_ZERO; + swizzle[i][1] = SWIZZLE_ZERO; + swizzle[i][2] = SWIZZLE_ZERO; + swizzle[i][3] = SWIZZLE_ONE; + + for (ci = 0; ci < vb->AttribPtr[tab[i]]->size; ci++) { + swizzle[i][ci] = ci; + } + + if (r300IsGartMemory(rmesa, vb->AttribPtr[tab[i]]->data, 4)) { + if (vb->AttribPtr[tab[i]]->stride % 4) { + return R300_FALLBACK_TCL; + } + rmesa->state.aos[i].address = (void *)(vb->AttribPtr[tab[i]]->data); + rmesa->state.aos[i].start = 0; + rmesa->state.aos[i].aos_offset = r300GartOffsetFromVirtual(rmesa, vb->AttribPtr[tab[i]]->data); + rmesa->state.aos[i].aos_stride = vb->AttribPtr[tab[i]]->stride / 4; + rmesa->state.aos[i].aos_size = vb->AttribPtr[tab[i]]->size; + } else { + r300EmitVec(ctx, &rmesa->state.aos[i], + vb->AttribPtr[tab[i]]->data, + vb->AttribPtr[tab[i]]->size, + vb->AttribPtr[tab[i]]->stride, count); + } + + rmesa->state.aos[i].aos_size = vb->AttribPtr[tab[i]]->size; + + for (fix = 0; fix <= 4 - vb->AttribPtr[tab[i]]->size; fix++) { + if ((rmesa->state.aos[i].aos_offset - _mesa_sizeof_type(GL_FLOAT) * fix) % 4) { + continue; + } + found = 1; + break; + } + + if (found) { + if (fix > 0) { + WARN_ONCE("Feeling lucky?\n"); + } + rmesa->state.aos[i].aos_offset -= _mesa_sizeof_type(GL_FLOAT) * fix; + for (ci = 0; ci < vb->AttribPtr[tab[i]]->size; ci++) { + swizzle[i][ci] += fix; + } + } else { + WARN_ONCE + ("Cannot handle offset %x with stride %d, comp %d\n", + rmesa->state.aos[i].aos_offset, + rmesa->state.aos[i].aos_stride, + vb->AttribPtr[tab[i]]->size); + return R300_FALLBACK_TCL; + } + } + + /* Setup INPUT_ROUTE. */ + R300_STATECHANGE(rmesa, vir[0]); + ((drm_r300_cmd_header_t *) rmesa->hw.vir[0].cmd)->packet0.count = + r300VAPInputRoute0(&rmesa->hw.vir[0].cmd[R300_VIR_CNTL_0], + vb->AttribPtr, inputs, tab, nr); + R300_STATECHANGE(rmesa, vir[1]); + ((drm_r300_cmd_header_t *) rmesa->hw.vir[1].cmd)->packet0.count = + r300VAPInputRoute1(&rmesa->hw.vir[1].cmd[R300_VIR_CNTL_0], swizzle, + nr); + + /* Setup INPUT_CNTL. */ + R300_STATECHANGE(rmesa, vic); + rmesa->hw.vic.cmd[R300_VIC_CNTL_0] = r300VAPInputCntl0(ctx, InputsRead); + rmesa->hw.vic.cmd[R300_VIC_CNTL_1] = r300VAPInputCntl1(ctx, InputsRead); + + /* Setup OUTPUT_VTX_FMT. */ + R300_STATECHANGE(rmesa, vof); + rmesa->hw.vof.cmd[R300_VOF_CNTL_0] = + r300VAPOutputCntl0(ctx, OutputsWritten); + rmesa->hw.vof.cmd[R300_VOF_CNTL_1] = + r300VAPOutputCntl1(ctx, OutputsWritten); + + rmesa->state.aos_count = nr; + + return R300_FALLBACK_NONE; +} + +#ifdef USER_BUFFERS +void r300UseArrays(GLcontext * ctx) +{ + r300ContextPtr rmesa = R300_CONTEXT(ctx); + int i; + + if (rmesa->state.elt_dma.buf) + r300_mem_use(rmesa, rmesa->state.elt_dma.buf->id); + + for (i = 0; i < rmesa->state.aos_count; i++) { + if (rmesa->state.aos[i].buf) + r300_mem_use(rmesa, rmesa->state.aos[i].buf->id); + } +} +#endif + +void r300ReleaseArrays(GLcontext * ctx) +{ + r300ContextPtr rmesa = R300_CONTEXT(ctx); + int i; + + r300ReleaseDmaRegion(rmesa, &rmesa->state.elt_dma, __FUNCTION__); + for (i = 0; i < rmesa->state.aos_count; i++) { + r300ReleaseDmaRegion(rmesa, &rmesa->state.aos[i], __FUNCTION__); + } +} + +void r300EmitCacheFlush(r300ContextPtr rmesa) +{ + int cmd_reserved = 0; + int cmd_written = 0; + + drm_radeon_cmd_header_t *cmd = NULL; + + reg_start(R300_RB3D_DSTCACHE_CTLSTAT, 0); + e32(R300_RB3D_DSTCACHE_UNKNOWN_0A); + + reg_start(R300_RB3D_ZCACHE_CTLSTAT, 0); + e32(R300_RB3D_ZCACHE_UNKNOWN_03); + + +} diff --git a/src/mesa/drivers/dri/r300/r300_emit.h b/src/mesa/drivers/dri/r300/r300_emit.h index 1101a3545a..a6d69ec5ff 100644 --- a/src/mesa/drivers/dri/r300/r300_emit.h +++ b/src/mesa/drivers/dri/r300/r300_emit.h @@ -44,26 +44,13 @@ #include "r300_cmdbuf.h" #include "radeon_reg.h" -/* - * CP type-3 packets - */ -#define RADEON_CP_PACKET3_UNK1B 0xC0001B00 -#define RADEON_CP_PACKET3_INDX_BUFFER 0xC0003300 -#define RADEON_CP_PACKET3_3D_DRAW_VBUF_2 0xC0003400 -#define RADEON_CP_PACKET3_3D_DRAW_IMMD_2 0xC0003500 -#define RADEON_CP_PACKET3_3D_DRAW_INDX_2 0xC0003600 -#define RADEON_CP_PACKET3_3D_LOAD_VBPNTR 0xC0002F00 -#define RADEON_CP_PACKET3_3D_CLEAR_ZMASK 0xC0003202 -#define RADEON_CP_PACKET3_3D_CLEAR_CMASK 0xC0003802 -#define RADEON_CP_PACKET3_3D_CLEAR_HIZ 0xC0003702 - +/* TODO: move these defines (and the ones from DRM) into r300_reg.h and sync up + * with DRM */ #define CP_PACKET0(reg, n) (RADEON_CP_PACKET0 | ((n)<<16) | ((reg)>>2)) +#define CP_PACKET3( pkt, n ) \ + (RADEON_CP_PACKET3 | (pkt) | ((n) << 16)) -void static inline check_space(int dwords) -{ -} - -static __inline__ uint32_t cmdpacket0(int reg, int count) +static inline uint32_t cmdpacket0(int reg, int count) { drm_r300_cmd_header_t cmd; @@ -75,7 +62,7 @@ static __inline__ uint32_t cmdpacket0(int reg, int count) return cmd.u; } -static __inline__ uint32_t cmdvpu(int addr, int count) +static inline uint32_t cmdvpu(int addr, int count) { drm_r300_cmd_header_t cmd; @@ -87,7 +74,7 @@ static __inline__ uint32_t cmdvpu(int addr, int count) return cmd.u; } -static __inline__ uint32_t cmdpacket3(int packet) +static inline uint32_t cmdpacket3(int packet) { drm_r300_cmd_header_t cmd; @@ -97,7 +84,7 @@ static __inline__ uint32_t cmdpacket3(int packet) return cmd.u; } -static __inline__ uint32_t cmdcpdelay(unsigned short count) +static inline uint32_t cmdcpdelay(unsigned short count) { drm_r300_cmd_header_t cmd; @@ -107,7 +94,7 @@ static __inline__ uint32_t cmdcpdelay(unsigned short count) return cmd.u; } -static __inline__ uint32_t cmdwait(unsigned char flags) +static inline uint32_t cmdwait(unsigned char flags) { drm_r300_cmd_header_t cmd; @@ -117,7 +104,7 @@ static __inline__ uint32_t cmdwait(unsigned char flags) return cmd.u; } -static __inline__ uint32_t cmdpacify(void) +static inline uint32_t cmdpacify(void) { drm_r300_cmd_header_t cmd; @@ -138,7 +125,7 @@ static __inline__ uint32_t cmdpacify(void) cmd = (drm_radeon_cmd_header_t*) \ r300AllocCmdBuf(rmesa, \ (_n+2), \ - __func__); \ + __FUNCTION__); \ cmd_reserved=_n+2; \ cmd_written=1; \ cmd[0].i=cmdpacket0((reg), _n+1); \ @@ -160,9 +147,9 @@ static __inline__ uint32_t cmdpacify(void) "cmd_written=%d cmd_reserved=%d\n", \ __FILE__, __FUNCTION__, __LINE__, \ cmd_written, cmd_reserved); \ - exit(-1); \ + _mesa_exit(-1); \ } \ - } while(0); + } while(0) #define efloat(f) e32(r300PackFloat32(f)) @@ -173,7 +160,7 @@ static __inline__ uint32_t cmdpacify(void) cmd = (drm_radeon_cmd_header_t*) \ r300AllocCmdBuf(rmesa, \ (_n+1), \ - __func__); \ + __FUNCTION__); \ cmd_reserved = _n+2; \ cmd_written =1; \ cmd[0].i = cmdvpu((dest), _n/4); \ @@ -188,14 +175,14 @@ static __inline__ uint32_t cmdpacify(void) cmd = (drm_radeon_cmd_header_t*) \ r300AllocCmdBuf(rmesa, \ (_n+3), \ - __func__); \ + __FUNCTION__); \ cmd_reserved = _n+3; \ cmd_written = 2; \ if(_n > 0x3fff) { \ fprintf(stderr,"Too big packet3 %08x: cannot " \ "store %d dwords\n", \ _p, _n); \ - exit(-1); \ + _mesa_exit(-1); \ } \ cmd[0].i = cmdpacket3(R300_CMD_PACKET3_RAW); \ cmd[1].i = _p | ((_n & 0x3fff)<<16); \ @@ -208,85 +195,45 @@ void static inline end_3d(r300ContextPtr rmesa) { drm_radeon_cmd_header_t *cmd = NULL; - cmd = (drm_radeon_cmd_header_t*)r300AllocCmdBuf(rmesa, - 1, - __FUNCTION__); - cmd[0].header.cmd_type=R300_CMD_END3D; + cmd = + (drm_radeon_cmd_header_t *) r300AllocCmdBuf(rmesa, 1, __FUNCTION__); + cmd[0].header.cmd_type = R300_CMD_END3D; } void static inline cp_delay(r300ContextPtr rmesa, unsigned short count) { drm_radeon_cmd_header_t *cmd = NULL; - cmd = (drm_radeon_cmd_header_t*)r300AllocCmdBuf(rmesa, - 1, - __FUNCTION__); - cmd[0].i=cmdcpdelay(count); + cmd = + (drm_radeon_cmd_header_t *) r300AllocCmdBuf(rmesa, 1, __FUNCTION__); + cmd[0].i = cmdcpdelay(count); } void static inline cp_wait(r300ContextPtr rmesa, unsigned char flags) { drm_radeon_cmd_header_t *cmd = NULL; - cmd = (drm_radeon_cmd_header_t*)r300AllocCmdBuf(rmesa, - 1, - __FUNCTION__); + cmd = + (drm_radeon_cmd_header_t *) r300AllocCmdBuf(rmesa, 1, __FUNCTION__); cmd[0].i = cmdwait(flags); } -/** - * fire vertex buffer - */ -static void inline fire_AOS(r300ContextPtr rmesa, int vertex_count, int type) -{ - int cmd_reserved = 0; - int cmd_written = 0; - drm_radeon_cmd_header_t *cmd = NULL; - check_space(9); +extern int r300EmitArrays(GLcontext * ctx); - start_packet3(RADEON_CP_PACKET3_3D_DRAW_VBUF_2, 0); -#ifdef NOTNEEDED_ANYMORE - e32(0x840c0024); +#ifdef USER_BUFFERS +void r300UseArrays(GLcontext * ctx); #endif - e32(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | - (vertex_count<<16) | type); -} -/** - * These are followed by the corresponding data - */ -#define start_index32_packet(vertex_count, type) \ - do { \ - int _vc; \ - _vc = (vertex_count); \ - start_packet3(RADEON_CP_PACKET3_3D_DRAW_INDX_2, _vc); \ - e32(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (_vc<<16) | \ - type | R300_VAP_VF_CNTL__INDEX_SIZE_32bit); \ - } while (0); +extern void r300ReleaseArrays(GLcontext * ctx); +extern int r300PrimitiveType(r300ContextPtr rmesa, int prim); +extern int r300NumVerts(r300ContextPtr rmesa, int num_verts, int prim); -#define start_index16_packet(vertex_count, type) \ - do { \ - int _vc, _n; \ - _vc = (vertex_count); \ - _n = (vertex_count+1)>>1; \ - start_packet3(RADEON_CP_PACKET3_3D_DRAW_INDX_2, _n); \ - e32(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (_vc<<16) | \ - type); \ - } while (0); +extern void r300EmitCacheFlush(r300ContextPtr rmesa); -/** - * Interestingly enough this ones needs the call to setup_AOS, even thought - * some of the data so setup is not needed and some is not as arbitrary - * as when used by DRAW_VBUF_2 or DRAW_INDX_2 - */ -#define start_immediate_packet(vertex_count, type, vertex_size) \ - do { \ - int _vc; \ - _vc = (vertex_count); \ - start_packet3(RADEON_CP_PACKET3_3D_DRAW_IMMD_2, \ - _vc*(vertex_size)); \ - e32(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | \ - (_vc<<16) | type); \ - } while (0); +extern GLuint r300VAPInputRoute1(uint32_t * dst, int swizzle[][4], GLuint nr); +extern GLuint r300VAPInputCntl0(GLcontext * ctx, GLuint InputsRead); +extern GLuint r300VAPInputCntl1(GLcontext * ctx, GLuint InputsRead); +extern GLuint r300VAPOutputCntl0(GLcontext * ctx, GLuint OutputsWritten); +extern GLuint r300VAPOutputCntl1(GLcontext * ctx, GLuint OutputsWritten); #endif diff --git a/src/mesa/drivers/dri/r300/r300_fragprog.c b/src/mesa/drivers/dri/r300/r300_fragprog.c index 26b09b4db2..cce8e68586 100644 --- a/src/mesa/drivers/dri/r300/r300_fragprog.c +++ b/src/mesa/drivers/dri/r300/r300_fragprog.c @@ -25,19 +25,19 @@ * */ -/* - * Authors: - * Ben Skeggs <darktama@iinet.net.au> - * Jerome Glisse <j.glisse@gmail.com> - */ - -/*TODO'S +/** + * \file + * + * \author Ben Skeggs <darktama@iinet.net.au> + * + * \author Jerome Glisse <j.glisse@gmail.com> * - * - Depth write, WPOS/FOGC inputs - * - FogOption - * - Verify results of opcodes for accuracy, I've only checked them - * in specific cases. - * - and more... + * \todo Depth write, WPOS/FOGC inputs + * + * \todo FogOption + * + * \todo Verify results of opcodes for accuracy, I've only checked them in + * specific cases. */ #include "glheader.h" @@ -57,12 +57,12 @@ */ #define ERROR(fmt, args...) do { \ fprintf(stderr, "%s::%s(): " fmt "\n", \ - __FILE__, __func__, ##args); \ - rp->error = GL_TRUE; \ + __FILE__, __FUNCTION__, ##args); \ + fp->error = GL_TRUE; \ } while(0) #define PFS_INVAL 0xFFFFFFFF -#define COMPILE_STATE struct r300_pfs_compile_state *cs = rp->cs +#define COMPILE_STATE struct r300_pfs_compile_state *cs = fp->cs #define SWIZZLE_XYZ 0 #define SWIZZLE_XXX 1 @@ -76,7 +76,7 @@ #define SWIZZLE_000 9 #define SWIZZLE_HHH 10 -#define swizzle(r, x, y, z, w) do_swizzle(rp, r, \ +#define swizzle(r, x, y, z, w) do_swizzle(fp, r, \ ((SWIZZLE_##x<<0)| \ (SWIZZLE_##y<<3)| \ (SWIZZLE_##z<<6)| \ @@ -95,9 +95,9 @@ #define REG_NEGV_SHIFT 18 #define REG_NEGS_SHIFT 19 #define REG_ABS_SHIFT 20 -#define REG_NO_USE_SHIFT 21 // Hack for refcounting -#define REG_VALID_SHIFT 22 // Does the register contain a defined value? -#define REG_BUILTIN_SHIFT 23 // Is it a builtin (like all zero/all one)? +#define REG_NO_USE_SHIFT 21 // Hack for refcounting +#define REG_VALID_SHIFT 22 // Does the register contain a defined value? +#define REG_BUILTIN_SHIFT 23 // Is it a builtin (like all zero/all one)? #define REG_TYPE_MASK (0x03 << REG_TYPE_SHIFT) #define REG_INDEX_MASK (0x3F << REG_INDEX_SHIFT) @@ -160,7 +160,6 @@ #define REG_NEGS(reg) \ reg = (reg | REG_NEGS_MASK) - /* * Datas structures for fragment program generation */ @@ -172,22 +171,23 @@ static const struct { int v_op; int s_op; } r300_fpop[] = { - { "MAD", 3, R300_FPI0_OUTC_MAD, R300_FPI2_OUTA_MAD }, - { "DP3", 2, R300_FPI0_OUTC_DP3, R300_FPI2_OUTA_DP4 }, - { "DP4", 2, R300_FPI0_OUTC_DP4, R300_FPI2_OUTA_DP4 }, - { "MIN", 2, R300_FPI0_OUTC_MIN, R300_FPI2_OUTA_MIN }, - { "MAX", 2, R300_FPI0_OUTC_MAX, R300_FPI2_OUTA_MAX }, - { "CMP", 3, R300_FPI0_OUTC_CMP, R300_FPI2_OUTA_CMP }, - { "FRC", 1, R300_FPI0_OUTC_FRC, R300_FPI2_OUTA_FRC }, - { "EX2", 1, R300_FPI0_OUTC_REPL_ALPHA, R300_FPI2_OUTA_EX2 }, - { "LG2", 1, R300_FPI0_OUTC_REPL_ALPHA, R300_FPI2_OUTA_LG2 }, - { "RCP", 1, R300_FPI0_OUTC_REPL_ALPHA, R300_FPI2_OUTA_RCP }, - { "RSQ", 1, R300_FPI0_OUTC_REPL_ALPHA, R300_FPI2_OUTA_RSQ }, - { "REPL_ALPHA", 1, R300_FPI0_OUTC_REPL_ALPHA, PFS_INVAL }, - { "CMPH", 3, R300_FPI0_OUTC_CMPH, PFS_INVAL }, + /* *INDENT-OFF* */ + {"MAD", 3, R300_FPI0_OUTC_MAD, R300_FPI2_OUTA_MAD}, + {"DP3", 2, R300_FPI0_OUTC_DP3, R300_FPI2_OUTA_DP4}, + {"DP4", 2, R300_FPI0_OUTC_DP4, R300_FPI2_OUTA_DP4}, + {"MIN", 2, R300_FPI0_OUTC_MIN, R300_FPI2_OUTA_MIN}, + {"MAX", 2, R300_FPI0_OUTC_MAX, R300_FPI2_OUTA_MAX}, + {"CMP", 3, R300_FPI0_OUTC_CMP, R300_FPI2_OUTA_CMP}, + {"FRC", 1, R300_FPI0_OUTC_FRC, R300_FPI2_OUTA_FRC}, + {"EX2", 1, R300_FPI0_OUTC_REPL_ALPHA, R300_FPI2_OUTA_EX2}, + {"LG2", 1, R300_FPI0_OUTC_REPL_ALPHA, R300_FPI2_OUTA_LG2}, + {"RCP", 1, R300_FPI0_OUTC_REPL_ALPHA, R300_FPI2_OUTA_RCP}, + {"RSQ", 1, R300_FPI0_OUTC_REPL_ALPHA, R300_FPI2_OUTA_RSQ}, + {"REPL_ALPHA", 1, R300_FPI0_OUTC_REPL_ALPHA, PFS_INVAL}, + {"CMPH", 3, R300_FPI0_OUTC_CMPH, PFS_INVAL}, + /* *INDENT-ON* */ }; - /* vector swizzles r300 can support natively, with a couple of * cases we handle specially * @@ -201,25 +201,27 @@ static const struct { SWIZZLE_##y, \ SWIZZLE_##z, \ SWIZZLE_ZERO)) +/* native swizzles */ static const struct r300_pfs_swizzle { - GLuint hash; /* swizzle value this matches */ - GLuint base; /* base value for hw swizzle */ - GLuint stride; /* difference in base between arg0/1/2 */ + GLuint hash; /* swizzle value this matches */ + GLuint base; /* base value for hw swizzle */ + GLuint stride; /* difference in base between arg0/1/2 */ GLuint flags; } v_swiz[] = { -/* native swizzles */ - { MAKE_SWZ3(X, Y, Z), R300_FPI0_ARGC_SRC0C_XYZ, 4, SLOT_SRC_VECTOR }, - { MAKE_SWZ3(X, X, X), R300_FPI0_ARGC_SRC0C_XXX, 4, SLOT_SRC_VECTOR }, - { MAKE_SWZ3(Y, Y, Y), R300_FPI0_ARGC_SRC0C_YYY, 4, SLOT_SRC_VECTOR }, - { MAKE_SWZ3(Z, Z, Z), R300_FPI0_ARGC_SRC0C_ZZZ, 4, SLOT_SRC_VECTOR }, - { MAKE_SWZ3(W, W, W), R300_FPI0_ARGC_SRC0A, 1, SLOT_SRC_SCALAR }, - { MAKE_SWZ3(Y, Z, X), R300_FPI0_ARGC_SRC0C_YZX, 1, SLOT_SRC_VECTOR }, - { MAKE_SWZ3(Z, X, Y), R300_FPI0_ARGC_SRC0C_ZXY, 1, SLOT_SRC_VECTOR }, - { MAKE_SWZ3(W, Z, Y), R300_FPI0_ARGC_SRC0CA_WZY, 1, SLOT_SRC_BOTH }, - { MAKE_SWZ3(ONE, ONE, ONE), R300_FPI0_ARGC_ONE, 0, 0}, - { MAKE_SWZ3(ZERO, ZERO, ZERO), R300_FPI0_ARGC_ZERO, 0, 0}, - { MAKE_SWZ3(HALF, HALF, HALF), R300_FPI0_ARGC_HALF, 0, 0}, - { PFS_INVAL, 0, 0, 0}, + /* *INDENT-OFF* */ + {MAKE_SWZ3(X, Y, Z), R300_FPI0_ARGC_SRC0C_XYZ, 4, SLOT_SRC_VECTOR}, + {MAKE_SWZ3(X, X, X), R300_FPI0_ARGC_SRC0C_XXX, 4, SLOT_SRC_VECTOR}, + {MAKE_SWZ3(Y, Y, Y), R300_FPI0_ARGC_SRC0C_YYY, 4, SLOT_SRC_VECTOR}, + {MAKE_SWZ3(Z, Z, Z), R300_FPI0_ARGC_SRC0C_ZZZ, 4, SLOT_SRC_VECTOR}, + {MAKE_SWZ3(W, W, W), R300_FPI0_ARGC_SRC0A, 1, SLOT_SRC_SCALAR}, + {MAKE_SWZ3(Y, Z, X), R300_FPI0_ARGC_SRC0C_YZX, 1, SLOT_SRC_VECTOR}, + {MAKE_SWZ3(Z, X, Y), R300_FPI0_ARGC_SRC0C_ZXY, 1, SLOT_SRC_VECTOR}, + {MAKE_SWZ3(W, Z, Y), R300_FPI0_ARGC_SRC0CA_WZY, 1, SLOT_SRC_BOTH}, + {MAKE_SWZ3(ONE, ONE, ONE), R300_FPI0_ARGC_ONE, 0, 0}, + {MAKE_SWZ3(ZERO, ZERO, ZERO), R300_FPI0_ARGC_ZERO, 0, 0}, + {MAKE_SWZ3(HALF, HALF, HALF), R300_FPI0_ARGC_HALF, 0, 0}, + {PFS_INVAL, 0, 0, 0}, + /* *INDENT-ON* */ }; /* used during matching of non-native swizzles */ @@ -232,28 +234,32 @@ static const struct { int mask; /* actual outmask */ int count; /* count of components matched */ } s_mask[] = { - { SWZ_X_MASK|SWZ_Y_MASK|SWZ_Z_MASK, 1|2|4, 3}, - { SWZ_X_MASK|SWZ_Y_MASK, 1|2, 2}, - { SWZ_X_MASK|SWZ_Z_MASK, 1|4, 2}, - { SWZ_Y_MASK|SWZ_Z_MASK, 2|4, 2}, - { SWZ_X_MASK, 1, 1}, - { SWZ_Y_MASK, 2, 1}, - { SWZ_Z_MASK, 4, 1}, - { PFS_INVAL, PFS_INVAL, PFS_INVAL} + /* *INDENT-OFF* */ + {SWZ_X_MASK | SWZ_Y_MASK | SWZ_Z_MASK, 1 | 2 | 4, 3}, + {SWZ_X_MASK | SWZ_Y_MASK, 1 | 2, 2}, + {SWZ_X_MASK | SWZ_Z_MASK, 1 | 4, 2}, + {SWZ_Y_MASK | SWZ_Z_MASK, 2 | 4, 2}, + {SWZ_X_MASK, 1, 1}, + {SWZ_Y_MASK, 2, 1}, + {SWZ_Z_MASK, 4, 1}, + {PFS_INVAL, PFS_INVAL, PFS_INVAL} + /* *INDENT-ON* */ }; static const struct { - int base; /* hw value of swizzle */ - int stride; /* difference between SRC0/1/2 */ + int base; /* hw value of swizzle */ + int stride; /* difference between SRC0/1/2 */ GLuint flags; } s_swiz[] = { - { R300_FPI2_ARGA_SRC0C_X, 3, SLOT_SRC_VECTOR }, - { R300_FPI2_ARGA_SRC0C_Y, 3, SLOT_SRC_VECTOR }, - { R300_FPI2_ARGA_SRC0C_Z, 3, SLOT_SRC_VECTOR }, - { R300_FPI2_ARGA_SRC0A , 1, SLOT_SRC_SCALAR }, - { R300_FPI2_ARGA_ZERO , 0, 0 }, - { R300_FPI2_ARGA_ONE , 0, 0 }, - { R300_FPI2_ARGA_HALF , 0, 0 } + /* *INDENT-OFF* */ + {R300_FPI2_ARGA_SRC0C_X, 3, SLOT_SRC_VECTOR}, + {R300_FPI2_ARGA_SRC0C_Y, 3, SLOT_SRC_VECTOR}, + {R300_FPI2_ARGA_SRC0C_Z, 3, SLOT_SRC_VECTOR}, + {R300_FPI2_ARGA_SRC0A, 1, SLOT_SRC_SCALAR}, + {R300_FPI2_ARGA_ZERO, 0, 0}, + {R300_FPI2_ARGA_ONE, 0, 0}, + {R300_FPI2_ARGA_HALF, 0, 0} + /* *INDENT-ON* */ }; /* boiler-plate reg, for convenience */ @@ -295,21 +301,20 @@ static const GLuint pfs_zero = REG(REG_TYPE_CONST, /* * Common functions prototypes */ -static void dump_program(struct r300_fragment_program *rp); -static void emit_arith(struct r300_fragment_program *rp, int op, - GLuint dest, int mask, - GLuint src0, GLuint src1, GLuint src2, - int flags); +static void dump_program(struct r300_fragment_program *fp); +static void emit_arith(struct r300_fragment_program *fp, int op, + GLuint dest, int mask, + GLuint src0, GLuint src1, GLuint src2, int flags); /** * Get an R300 temporary that can be written to in the given slot. */ -static int get_hw_temp(struct r300_fragment_program *rp, int slot) +static int get_hw_temp(struct r300_fragment_program *fp, int slot) { COMPILE_STATE; int r; - for(r = 0; r < PFS_NUM_TEMP_REGS; ++r) { + for (r = 0; r < PFS_NUM_TEMP_REGS; ++r) { if (cs->hwtemps[r].free >= 0 && cs->hwtemps[r].free <= slot) break; } @@ -318,7 +323,6 @@ static int get_hw_temp(struct r300_fragment_program *rp, int slot) ERROR("Out of hardware temps\n"); return 0; } - // Reserved is used to avoid the following scenario: // R300 temporary X is first assigned to Mesa temporary Y during vector ops // R300 temporary X is then assigned to Mesa temporary Z for further vector ops @@ -335,8 +339,8 @@ static int get_hw_temp(struct r300_fragment_program *rp, int slot) cs->hwtemps[r].vector_valid = 0; cs->hwtemps[r].scalar_valid = 0; - if (r > rp->max_temp_idx) - rp->max_temp_idx = r; + if (r > fp->max_temp_idx) + fp->max_temp_idx = r; return r; } @@ -344,12 +348,12 @@ static int get_hw_temp(struct r300_fragment_program *rp, int slot) /** * Get an R300 temporary that will act as a TEX destination register. */ -static int get_hw_temp_tex(struct r300_fragment_program *rp) +static int get_hw_temp_tex(struct r300_fragment_program *fp) { COMPILE_STATE; int r; - for(r = 0; r < PFS_NUM_TEMP_REGS; ++r) { + for (r = 0; r < PFS_NUM_TEMP_REGS; ++r) { if (cs->used_in_node & (1 << r)) continue; @@ -359,7 +363,7 @@ static int get_hw_temp_tex(struct r300_fragment_program *rp) } if (r >= PFS_NUM_TEMP_REGS) - return get_hw_temp(rp, 0); /* Will cause an indirection */ + return get_hw_temp(fp, 0); /* Will cause an indirection */ cs->hwtemps[r].reserved = cs->hwtemps[r].free; cs->hwtemps[r].free = -1; @@ -371,8 +375,8 @@ static int get_hw_temp_tex(struct r300_fragment_program *rp) cs->hwtemps[r].vector_valid = cs->nrslots; cs->hwtemps[r].scalar_valid = cs->nrslots; - if (r > rp->max_temp_idx) - rp->max_temp_idx = r; + if (r > fp->max_temp_idx) + fp->max_temp_idx = r; return r; } @@ -380,7 +384,7 @@ static int get_hw_temp_tex(struct r300_fragment_program *rp) /** * Mark the given hardware register as free. */ -static void free_hw_temp(struct r300_fragment_program *rp, int idx) +static void free_hw_temp(struct r300_fragment_program *fp, int idx) { COMPILE_STATE; @@ -393,14 +397,13 @@ static void free_hw_temp(struct r300_fragment_program *rp, int idx) // I'm certain the register allocation could be further sanitized, // but it's tricky because of stuff that can happen inside emit_tex // and emit_arith. - cs->hwtemps[idx].free = cs->nrslots+1; + cs->hwtemps[idx].free = cs->nrslots + 1; } - /** * Create a new Mesa temporary register. */ -static GLuint get_temp_reg(struct r300_fragment_program *rp) +static GLuint get_temp_reg(struct r300_fragment_program *fp) { COMPILE_STATE; GLuint r = undef; @@ -426,7 +429,7 @@ static GLuint get_temp_reg(struct r300_fragment_program *rp) * Create a new Mesa temporary register that will act as the destination * register for a texture read. */ -static GLuint get_temp_reg_tex(struct r300_fragment_program *rp) +static GLuint get_temp_reg_tex(struct r300_fragment_program *fp) { COMPILE_STATE; GLuint r = undef; @@ -440,7 +443,7 @@ static GLuint get_temp_reg_tex(struct r300_fragment_program *rp) cs->temp_in_use |= (1 << --index); cs->temps[index].refcount = 0xFFFFFFFF; - cs->temps[index].reg = get_hw_temp_tex(rp); + cs->temps[index].reg = get_hw_temp_tex(fp); REG_SET_TYPE(r, REG_TYPE_TEMP); REG_SET_INDEX(r, index); @@ -451,7 +454,7 @@ static GLuint get_temp_reg_tex(struct r300_fragment_program *rp) /** * Free a Mesa temporary and the associated R300 temporary. */ -static void free_temp(struct r300_fragment_program *rp, GLuint r) +static void free_temp(struct r300_fragment_program *fp, GLuint r) { COMPILE_STATE; GLuint index = REG_GET_INDEX(r); @@ -460,11 +463,11 @@ static void free_temp(struct r300_fragment_program *rp, GLuint r) return; if (REG_GET_TYPE(r) == REG_TYPE_TEMP) { - free_hw_temp(rp, cs->temps[index].reg); + free_hw_temp(fp, cs->temps[index].reg); cs->temps[index].reg = -1; cs->temp_in_use &= ~(1 << index); } else if (REG_GET_TYPE(r) == REG_TYPE_INPUT) { - free_hw_temp(rp, cs->inputs[index].reg); + free_hw_temp(fp, cs->inputs[index].reg); cs->inputs[index].reg = -1; } } @@ -478,24 +481,25 @@ static void free_temp(struct r300_fragment_program *rp, GLuint r) * of the fragment program (actually, up until the next time the fragment * program is translated). */ -static GLuint emit_const4fv(struct r300_fragment_program *rp, const GLfloat* cp) +static GLuint emit_const4fv(struct r300_fragment_program *fp, + const GLfloat * cp) { GLuint reg = undef; int index; - for(index = 0; index < rp->const_nr; ++index) { - if (rp->constant[index] == cp) + for (index = 0; index < fp->const_nr; ++index) { + if (fp->constant[index] == cp) break; } - if (index >= rp->const_nr) { + if (index >= fp->const_nr) { if (index >= PFS_NUM_CONST_REGS) { ERROR("Out of hw constants!\n"); return reg; } - rp->const_nr++; - rp->constant[index] = cp; + fp->const_nr++; + fp->constant[index] = cp; } REG_SET_TYPE(reg, REG_TYPE_CONST); @@ -526,14 +530,11 @@ static inline GLuint absolute(GLuint r) return r; } -static int swz_native(struct r300_fragment_program *rp, - GLuint src, - GLuint *r, - GLuint arbneg) +static int swz_native(struct r300_fragment_program *fp, + GLuint src, GLuint * r, GLuint arbneg) { /* Native swizzle, handle negation */ - src = (src & ~REG_NEGS_MASK) | - (((arbneg >> 3) & 1) << REG_NEGS_SHIFT); + src = (src & ~REG_NEGS_MASK) | (((arbneg >> 3) & 1) << REG_NEGS_SHIFT); if ((arbneg & 0x7) == 0x0) { src = src & ~REG_NEGV_MASK; @@ -543,42 +544,31 @@ static int swz_native(struct r300_fragment_program *rp, *r = src; } else { if (!REG_GET_VALID(*r)) - *r = get_temp_reg(rp); + *r = get_temp_reg(fp); src |= REG_NEGV_MASK; - emit_arith(rp, + emit_arith(fp, PFS_OP_MAD, - *r, - arbneg & 0x7, - keep(src), - pfs_one, - pfs_zero, - 0); + *r, arbneg & 0x7, keep(src), pfs_one, pfs_zero, 0); src = src & ~REG_NEGV_MASK; - emit_arith(rp, + emit_arith(fp, PFS_OP_MAD, *r, (arbneg ^ 0x7) | WRITEMASK_W, - src, - pfs_one, - pfs_zero, - 0); + src, pfs_one, pfs_zero, 0); } return 3; } -static int swz_emit_partial(struct r300_fragment_program *rp, +static int swz_emit_partial(struct r300_fragment_program *fp, GLuint src, - GLuint *r, - int mask, - int mc, - GLuint arbneg) + GLuint * r, int mask, int mc, GLuint arbneg) { GLuint tmp; GLuint wmask = 0; if (!REG_GET_VALID(*r)) - *r = get_temp_reg(rp); + *r = get_temp_reg(fp); /* A partial match, VSWZ/mask define what parts of the * desired swizzle we match @@ -592,41 +582,31 @@ static int swz_emit_partial(struct r300_fragment_program *rp, if (tmp) { tmp = tmp ^ s_mask[mask].mask; if (tmp) { - emit_arith(rp, + emit_arith(fp, PFS_OP_MAD, *r, arbneg & s_mask[mask].mask, keep(src) | REG_NEGV_MASK, - pfs_one, - pfs_zero, - 0); + pfs_one, pfs_zero, 0); if (!wmask) { REG_SET_NO_USE(src, GL_TRUE); } else { REG_SET_NO_USE(src, GL_FALSE); } - emit_arith(rp, + emit_arith(fp, PFS_OP_MAD, - *r, - tmp | wmask, - src, - pfs_one, - pfs_zero, - 0); + *r, tmp | wmask, src, pfs_one, pfs_zero, 0); } else { if (!wmask) { REG_SET_NO_USE(src, GL_TRUE); } else { REG_SET_NO_USE(src, GL_FALSE); } - emit_arith(rp, + emit_arith(fp, PFS_OP_MAD, *r, (arbneg & s_mask[mask].mask) | wmask, - src | REG_NEGV_MASK, - pfs_one, - pfs_zero, - 0); + src | REG_NEGV_MASK, pfs_one, pfs_zero, 0); } } else { if (!wmask) { @@ -634,22 +614,17 @@ static int swz_emit_partial(struct r300_fragment_program *rp, } else { REG_SET_NO_USE(src, GL_FALSE); } - emit_arith(rp, PFS_OP_MAD, + emit_arith(fp, PFS_OP_MAD, *r, s_mask[mask].mask | wmask, - src, - pfs_one, - pfs_zero, - 0); + src, pfs_one, pfs_zero, 0); } return s_mask[mask].count; } -static GLuint do_swizzle(struct r300_fragment_program *rp, - GLuint src, - GLuint arbswz, - GLuint arbneg) +static GLuint do_swizzle(struct r300_fragment_program *fp, + GLuint src, GLuint arbswz, GLuint arbneg) { GLuint r = undef; GLuint vswz; @@ -660,41 +635,38 @@ static GLuint do_swizzle(struct r300_fragment_program *rp, * emit result to a temp, and do new swizzle from the temp. */ #if 0 - if (REG_GET_VSWZ(src) != SWIZZLE_XYZ || - REG_GET_SSWZ(src) != SWIZZLE_W) { - GLuint temp = get_temp_reg(rp); - emit_arith(rp, + if (REG_GET_VSWZ(src) != SWIZZLE_XYZ || REG_GET_SSWZ(src) != SWIZZLE_W) { + GLuint temp = get_temp_reg(fp); + emit_arith(fp, PFS_OP_MAD, - temp, - WRITEMASK_XYZW, - src, - pfs_one, - pfs_zero, - 0); + temp, WRITEMASK_XYZW, src, pfs_one, pfs_zero, 0); src = temp; } #endif - if (REG_GET_VSWZ(src) != SWIZZLE_XYZ || - REG_GET_SSWZ(src) != SWIZZLE_W) { - GLuint vsrcswz = (v_swiz[REG_GET_VSWZ(src)].hash & (SWZ_X_MASK|SWZ_Y_MASK|SWZ_Z_MASK)) | REG_GET_SSWZ(src) << 9; - GLint i; - - GLuint newswz = 0; - GLuint offset; - for(i=0; i < 4; ++i){ - offset = GET_SWZ(arbswz, i); - - newswz |= (offset <= 3)?GET_SWZ(vsrcswz, offset) << i*3:offset << i*3; - } + if (REG_GET_VSWZ(src) != SWIZZLE_XYZ || REG_GET_SSWZ(src) != SWIZZLE_W) { + GLuint vsrcswz = + (v_swiz[REG_GET_VSWZ(src)]. + hash & (SWZ_X_MASK | SWZ_Y_MASK | SWZ_Z_MASK)) | + REG_GET_SSWZ(src) << 9; + GLint i; + + GLuint newswz = 0; + GLuint offset; + for (i = 0; i < 4; ++i) { + offset = GET_SWZ(arbswz, i); + + newswz |= + (offset <= 3) ? GET_SWZ(vsrcswz, + offset) << i * + 3 : offset << i * 3; + } - arbswz = newswz & (SWZ_X_MASK|SWZ_Y_MASK|SWZ_Z_MASK); - REG_SET_SSWZ(src, GET_SWZ(newswz, 3)); - } - else - { - /* set scalar swizzling */ - REG_SET_SSWZ(src, GET_SWZ(arbswz, 3)); + arbswz = newswz & (SWZ_X_MASK | SWZ_Y_MASK | SWZ_Z_MASK); + REG_SET_SSWZ(src, GET_SWZ(newswz, 3)); + } else { + /* set scalar swizzling */ + REG_SET_SSWZ(src, GET_SWZ(arbswz, 3)); } do { @@ -704,16 +676,14 @@ static GLuint do_swizzle(struct r300_fragment_program *rp, REG_SET_VSWZ(src, vswz); chash = v_swiz[REG_GET_VSWZ(src)].hash & - s_mask[c_mask].hash; + s_mask[c_mask].hash; if (chash == (arbswz & s_mask[c_mask].hash)) { if (s_mask[c_mask].count == 3) { - v_match += swz_native(rp, - src, - &r, - arbneg); + v_match += swz_native(fp, + src, &r, arbneg); } else { - v_match += swz_emit_partial(rp, + v_match += swz_emit_partial(fp, src, &r, c_mask, @@ -730,7 +700,7 @@ static GLuint do_swizzle(struct r300_fragment_program *rp, */ arbswz |= (PFS_INVAL & s_mask[c_mask].hash); } - } while(v_swiz[++vswz].hash != PFS_INVAL); + } while (v_swiz[++vswz].hash != PFS_INVAL); REG_SET_VSWZ(src, SWIZZLE_XYZ); } while (s_mask[++c_mask].hash != PFS_INVAL); @@ -738,7 +708,7 @@ static GLuint do_swizzle(struct r300_fragment_program *rp, return r; } -static GLuint t_src(struct r300_fragment_program *rp, +static GLuint t_src(struct r300_fragment_program *fp, struct prog_src_register fpsrc) { GLuint r = undef; @@ -755,17 +725,20 @@ static GLuint t_src(struct r300_fragment_program *rp, REG_SET_TYPE(r, REG_TYPE_INPUT); break; case PROGRAM_LOCAL_PARAM: - r = emit_const4fv(rp, - rp->mesa_program.Base.LocalParams[fpsrc.Index]); + r = emit_const4fv(fp, + fp->mesa_program.Base.LocalParams[fpsrc. + Index]); break; case PROGRAM_ENV_PARAM: - r = emit_const4fv(rp, - rp->ctx->FragmentProgram.Parameters[fpsrc.Index]); + r = emit_const4fv(fp, + fp->ctx->FragmentProgram.Parameters[fpsrc. + Index]); break; case PROGRAM_STATE_VAR: case PROGRAM_NAMED_PARAM: - r = emit_const4fv(rp, - rp->mesa_program.Base.Parameters->ParameterValues[fpsrc.Index]); + r = emit_const4fv(fp, + fp->mesa_program.Base.Parameters-> + ParameterValues[fpsrc.Index]); break; default: ERROR("unknown SrcReg->File %x\n", fpsrc.File); @@ -774,23 +747,23 @@ static GLuint t_src(struct r300_fragment_program *rp, /* no point swizzling ONE/ZERO/HALF constants... */ if (REG_GET_VSWZ(r) < SWIZZLE_111 || REG_GET_SSWZ(r) < SWIZZLE_ZERO) - r = do_swizzle(rp, r, fpsrc.Swizzle, fpsrc.NegateBase); + r = do_swizzle(fp, r, fpsrc.Swizzle, fpsrc.NegateBase); return r; } -static GLuint t_scalar_src(struct r300_fragment_program *rp, +static GLuint t_scalar_src(struct r300_fragment_program *fp, struct prog_src_register fpsrc) { struct prog_src_register src = fpsrc; - int sc = GET_SWZ(fpsrc.Swizzle, 0); /* X */ + int sc = GET_SWZ(fpsrc.Swizzle, 0); /* X */ - src.Swizzle = ((sc<<0)|(sc<<3)|(sc<<6)|(sc<<9)); + src.Swizzle = ((sc << 0) | (sc << 3) | (sc << 6) | (sc << 9)); - return t_src(rp, src); + return t_src(fp, src); } -static GLuint t_dst(struct r300_fragment_program *rp, - struct prog_dst_register dest) +static GLuint t_dst(struct r300_fragment_program *fp, + struct prog_dst_register dest) { GLuint r = undef; @@ -818,34 +791,30 @@ static GLuint t_dst(struct r300_fragment_program *rp, } } -static int t_hw_src(struct r300_fragment_program *rp, - GLuint src, - GLboolean tex) +static int t_hw_src(struct r300_fragment_program *fp, GLuint src, GLboolean tex) { COMPILE_STATE; int idx; int index = REG_GET_INDEX(src); - switch(REG_GET_TYPE(src)) { + switch (REG_GET_TYPE(src)) { case REG_TYPE_TEMP: /* NOTE: if reg==-1 here, a source is being read that - * hasn't been written to. Undefined results. + * hasn't been written to. Undefined results. */ if (cs->temps[index].reg == -1) - cs->temps[index].reg = get_hw_temp(rp, cs->nrslots); + cs->temps[index].reg = get_hw_temp(fp, cs->nrslots); idx = cs->temps[index].reg; - if (!REG_GET_NO_USE(src) && - (--cs->temps[index].refcount == 0)) - free_temp(rp, src); + if (!REG_GET_NO_USE(src) && (--cs->temps[index].refcount == 0)) + free_temp(fp, src); break; case REG_TYPE_INPUT: idx = cs->inputs[index].reg; - if (!REG_GET_NO_USE(src) && - (--cs->inputs[index].refcount == 0)) - free_hw_temp(rp, cs->inputs[index].reg); + if (!REG_GET_NO_USE(src) && (--cs->inputs[index].refcount == 0)) + free_hw_temp(fp, cs->inputs[index].reg); break; case REG_TYPE_CONST: return (index | SRC_CONST); @@ -860,41 +829,40 @@ static int t_hw_src(struct r300_fragment_program *rp, return idx; } -static int t_hw_dst(struct r300_fragment_program *rp, - GLuint dest, - GLboolean tex, - int slot) +static int t_hw_dst(struct r300_fragment_program *fp, + GLuint dest, GLboolean tex, int slot) { COMPILE_STATE; int idx; GLuint index = REG_GET_INDEX(dest); assert(REG_GET_VALID(dest)); - switch(REG_GET_TYPE(dest)) { + switch (REG_GET_TYPE(dest)) { case REG_TYPE_TEMP: if (cs->temps[REG_GET_INDEX(dest)].reg == -1) { if (!tex) { - cs->temps[index].reg = get_hw_temp(rp, slot); + cs->temps[index].reg = get_hw_temp(fp, slot); } else { - cs->temps[index].reg = get_hw_temp_tex(rp); + cs->temps[index].reg = get_hw_temp_tex(fp); } } idx = cs->temps[index].reg; - if (!REG_GET_NO_USE(dest) && - (--cs->temps[index].refcount == 0)) - free_temp(rp, dest); + if (!REG_GET_NO_USE(dest) && (--cs->temps[index].refcount == 0)) + free_temp(fp, dest); cs->dest_in_node |= (1 << idx); cs->used_in_node |= (1 << idx); break; case REG_TYPE_OUTPUT: - switch(index) { + switch (index) { case FRAG_RESULT_COLR: - rp->node[rp->cur_node].flags |= R300_PFS_NODE_OUTPUT_COLOR; + fp->node[fp->cur_node].flags |= + R300_PFS_NODE_OUTPUT_COLOR; break; case FRAG_RESULT_DEPR: - rp->node[rp->cur_node].flags |= R300_PFS_NODE_OUTPUT_DEPTH; + fp->node[fp->cur_node].flags |= + R300_PFS_NODE_OUTPUT_DEPTH; break; } return index; @@ -907,7 +875,7 @@ static int t_hw_dst(struct r300_fragment_program *rp, return idx; } -static void emit_nop(struct r300_fragment_program *rp) +static void emit_nop(struct r300_fragment_program *fp) { COMPILE_STATE; @@ -916,19 +884,18 @@ static void emit_nop(struct r300_fragment_program *rp) return; } - rp->alu.inst[cs->nrslots].inst0 = NOP_INST0; - rp->alu.inst[cs->nrslots].inst1 = NOP_INST1; - rp->alu.inst[cs->nrslots].inst2 = NOP_INST2; - rp->alu.inst[cs->nrslots].inst3 = NOP_INST3; + fp->alu.inst[cs->nrslots].inst0 = NOP_INST0; + fp->alu.inst[cs->nrslots].inst1 = NOP_INST1; + fp->alu.inst[cs->nrslots].inst2 = NOP_INST2; + fp->alu.inst[cs->nrslots].inst3 = NOP_INST3; cs->nrslots++; } -static void emit_tex(struct r300_fragment_program *rp, - struct prog_instruction *fpi, - int opcode) +static void emit_tex(struct r300_fragment_program *fp, + struct prog_instruction *fpi, int opcode) { COMPILE_STATE; - GLuint coord = t_src(rp, fpi->SrcReg[0]); + GLuint coord = t_src(fp, fpi->SrcReg[0]); GLuint dest = undef, rdest = undef; GLuint din, uin; int unit = fpi->TexSrcUnit; @@ -950,118 +917,121 @@ static void emit_tex(struct r300_fragment_program *rp, * support for programs. */ gl_state_index tokens[STATE_LENGTH] = { - STATE_INTERNAL, STATE_R300_TEXRECT_FACTOR, 0, 0, 0 + STATE_INTERNAL, STATE_R300_TEXRECT_FACTOR, 0, 0, + 0 }; int factor_index; GLuint factorreg; tokens[2] = unit; - factor_index = _mesa_add_state_reference(rp->mesa_program.Base.Parameters, tokens); - factorreg = emit_const4fv(rp, - rp->mesa_program.Base.Parameters->ParameterValues[factor_index]); - tempreg = keep(get_temp_reg(rp)); - - emit_arith(rp, PFS_OP_MAD, tempreg, WRITEMASK_XYZW, - coord, factorreg, pfs_zero, 0); + factor_index = + _mesa_add_state_reference(fp->mesa_program.Base. + Parameters, tokens); + factorreg = + emit_const4fv(fp, + fp->mesa_program.Base.Parameters-> + ParameterValues[factor_index]); + tempreg = keep(get_temp_reg(fp)); + + emit_arith(fp, PFS_OP_MAD, tempreg, WRITEMASK_XYZW, + coord, factorreg, pfs_zero, 0); /* Ensure correct node indirection */ uin = cs->used_in_node; din = cs->dest_in_node; - hwsrc = t_hw_src(rp, tempreg, GL_TRUE); + hwsrc = t_hw_src(fp, tempreg, GL_TRUE); } else { - hwsrc = t_hw_src(rp, coord, GL_TRUE); + hwsrc = t_hw_src(fp, coord, GL_TRUE); } - dest = t_dst(rp, fpi->DstReg); + dest = t_dst(fp, fpi->DstReg); /* r300 doesn't seem to be able to do TEX->output reg */ if (REG_GET_TYPE(dest) == REG_TYPE_OUTPUT) { rdest = dest; - dest = get_temp_reg_tex(rp); + dest = get_temp_reg_tex(fp); } - hwdest = t_hw_dst(rp, dest, GL_TRUE, rp->node[rp->cur_node].alu_offset); + hwdest = + t_hw_dst(fp, dest, GL_TRUE, + fp->node[fp->cur_node].alu_offset); /* Use a temp that hasn't been used in this node, rather * than causing an indirection */ if (uin & (1 << hwdest)) { - free_hw_temp(rp, hwdest); - hwdest = get_hw_temp_tex(rp); + free_hw_temp(fp, hwdest); + hwdest = get_hw_temp_tex(fp); cs->temps[REG_GET_INDEX(dest)].reg = hwdest; } } else { hwdest = 0; unit = 0; - hwsrc = t_hw_src(rp, coord, GL_TRUE); + hwsrc = t_hw_src(fp, coord, GL_TRUE); } - /* Indirection if source has been written in this node, or if the * dest has been read/written in this node */ if ((REG_GET_TYPE(coord) != REG_TYPE_CONST && - (din & (1<<hwsrc))) || (uin & (1<<hwdest))) { + (din & (1 << hwsrc))) || (uin & (1 << hwdest))) { /* Finish off current node */ - if (rp->node[rp->cur_node].alu_offset == cs->nrslots) - emit_nop(rp); + if (fp->node[fp->cur_node].alu_offset == cs->nrslots) + emit_nop(fp); - rp->node[rp->cur_node].alu_end = - cs->nrslots - rp->node[rp->cur_node].alu_offset - 1; - assert(rp->node[rp->cur_node].alu_end >= 0); + fp->node[fp->cur_node].alu_end = + cs->nrslots - fp->node[fp->cur_node].alu_offset - 1; + assert(fp->node[fp->cur_node].alu_end >= 0); - if (++rp->cur_node >= PFS_MAX_TEX_INDIRECT) { + if (++fp->cur_node >= PFS_MAX_TEX_INDIRECT) { ERROR("too many levels of texture indirection\n"); return; } /* Start new node */ - rp->node[rp->cur_node].tex_offset = rp->tex.length; - rp->node[rp->cur_node].alu_offset = cs->nrslots; - rp->node[rp->cur_node].tex_end = -1; - rp->node[rp->cur_node].alu_end = -1; - rp->node[rp->cur_node].flags = 0; + fp->node[fp->cur_node].tex_offset = fp->tex.length; + fp->node[fp->cur_node].alu_offset = cs->nrslots; + fp->node[fp->cur_node].tex_end = -1; + fp->node[fp->cur_node].alu_end = -1; + fp->node[fp->cur_node].flags = 0; cs->used_in_node = 0; cs->dest_in_node = 0; } - if (rp->cur_node == 0) - rp->first_node_has_tex = 1; + if (fp->cur_node == 0) + fp->first_node_has_tex = 1; - rp->tex.inst[rp->tex.length++] = 0 - | (hwsrc << R300_FPITX_SRC_SHIFT) - | (hwdest << R300_FPITX_DST_SHIFT) - | (unit << R300_FPITX_IMAGE_SHIFT) - /* not entirely sure about this */ - | (opcode << R300_FPITX_OPCODE_SHIFT); + fp->tex.inst[fp->tex.length++] = 0 | (hwsrc << R300_FPITX_SRC_SHIFT) + | (hwdest << R300_FPITX_DST_SHIFT) + | (unit << R300_FPITX_IMAGE_SHIFT) + /* not entirely sure about this */ + | (opcode << R300_FPITX_OPCODE_SHIFT); cs->dest_in_node |= (1 << hwdest); if (REG_GET_TYPE(coord) != REG_TYPE_CONST) cs->used_in_node |= (1 << hwsrc); - rp->node[rp->cur_node].tex_end++; + fp->node[fp->cur_node].tex_end++; /* Copy from temp to output if needed */ if (REG_GET_VALID(rdest)) { - emit_arith(rp, PFS_OP_MAD, rdest, WRITEMASK_XYZW, dest, + emit_arith(fp, PFS_OP_MAD, rdest, WRITEMASK_XYZW, dest, pfs_one, pfs_zero, 0); - free_temp(rp, dest); + free_temp(fp, dest); } /* Free temp register */ if (tempreg != 0) - free_temp(rp, tempreg); + free_temp(fp, tempreg); } - /** * Returns the first slot where we could possibly allow writing to dest, * according to register allocation. */ -static int get_earliest_allowed_write( - struct r300_fragment_program* rp, - GLuint dest, int mask) +static int get_earliest_allowed_write(struct r300_fragment_program *fp, + GLuint dest, int mask) { COMPILE_STATE; int idx; @@ -1069,18 +1039,18 @@ static int get_earliest_allowed_write( GLuint index = REG_GET_INDEX(dest); assert(REG_GET_VALID(dest)); - switch(REG_GET_TYPE(dest)) { - case REG_TYPE_TEMP: - if (cs->temps[index].reg == -1) - return 0; - - idx = cs->temps[index].reg; - break; - case REG_TYPE_OUTPUT: - return 0; - default: - ERROR("invalid dest reg type %d\n", REG_GET_TYPE(dest)); + switch (REG_GET_TYPE(dest)) { + case REG_TYPE_TEMP: + if (cs->temps[index].reg == -1) return 0; + + idx = cs->temps[index].reg; + break; + case REG_TYPE_OUTPUT: + return 0; + default: + ERROR("invalid dest reg type %d\n", REG_GET_TYPE(dest)); + return 0; } pos = cs->hwtemps[idx].reserved; @@ -1096,7 +1066,6 @@ static int get_earliest_allowed_write( return pos; } - /** * Allocates a slot for an ALU instruction that can consist of * a vertex part or a scalar part or both. @@ -1111,13 +1080,10 @@ static int get_earliest_allowed_write( * * @return the index of the slot */ -static int find_and_prepare_slot(struct r300_fragment_program* rp, - GLboolean emit_vop, - GLboolean emit_sop, - int argc, - GLuint* src, - GLuint dest, - int mask) +static int find_and_prepare_slot(struct r300_fragment_program *fp, + GLboolean emit_vop, + GLboolean emit_sop, + int argc, GLuint * src, GLuint dest, int mask) { COMPILE_STATE; int hwsrc[3]; @@ -1128,7 +1094,7 @@ static int find_and_prepare_slot(struct r300_fragment_program* rp, int tempssrc[3]; int pos; int regnr; - int i,j; + int i, j; // Determine instruction slots, whether sources are required on // vector or scalar side, and the smallest slot number where @@ -1139,11 +1105,11 @@ static int find_and_prepare_slot(struct r300_fragment_program* rp, if (emit_sop) used |= SLOT_OP_SCALAR; - pos = get_earliest_allowed_write(rp, dest, mask); + pos = get_earliest_allowed_write(fp, dest, mask); - if (rp->node[rp->cur_node].alu_offset > pos) - pos = rp->node[rp->cur_node].alu_offset; - for(i = 0; i < argc; ++i) { + if (fp->node[fp->cur_node].alu_offset > pos) + pos = fp->node[fp->cur_node].alu_offset; + for (i = 0; i < argc; ++i) { if (!REG_GET_BUILTIN(src[i])) { if (emit_vop) used |= v_swiz[REG_GET_VSWZ(src[i])].flags << i; @@ -1151,7 +1117,7 @@ static int find_and_prepare_slot(struct r300_fragment_program* rp, used |= s_swiz[REG_GET_SSWZ(src[i])].flags << i; } - hwsrc[i] = t_hw_src(rp, src[i], GL_FALSE); /* Note: sideeffects wrt refcounting! */ + hwsrc[i] = t_hw_src(fp, src[i], GL_FALSE); /* Note: sideeffects wrt refcounting! */ regnr = hwsrc[i] & 31; if (REG_GET_TYPE(src[i]) == REG_TYPE_TEMP) { @@ -1167,7 +1133,7 @@ static int find_and_prepare_slot(struct r300_fragment_program* rp, } // Find a slot that fits - for(; ; ++pos) { + for (;; ++pos) { if (cs->slot[pos].used & used & SLOT_OP_BOTH) continue; @@ -1177,26 +1143,25 @@ static int find_and_prepare_slot(struct r300_fragment_program* rp, return -1; } - rp->alu.inst[pos].inst0 = NOP_INST0; - rp->alu.inst[pos].inst1 = NOP_INST1; - rp->alu.inst[pos].inst2 = NOP_INST2; - rp->alu.inst[pos].inst3 = NOP_INST3; + fp->alu.inst[pos].inst0 = NOP_INST0; + fp->alu.inst[pos].inst1 = NOP_INST1; + fp->alu.inst[pos].inst2 = NOP_INST2; + fp->alu.inst[pos].inst3 = NOP_INST3; cs->nrslots++; } - // Note: When we need both parts (vector and scalar) of a source, // we always try to put them into the same position. This makes the // code easier to read, and it is optimal (i.e. one doesn't gain // anything by splitting the parts). // It also avoids headaches with swizzles that access both parts (i.e WXY) tempused = cs->slot[pos].used; - for(i = 0; i < 3; ++i) { + for (i = 0; i < 3; ++i) { tempvsrc[i] = cs->slot[pos].vsrc[i]; tempssrc[i] = cs->slot[pos].ssrc[i]; } - for(i = 0; i < argc; ++i) { + for (i = 0; i < argc; ++i) { int flags = (used >> i) & SLOT_SRC_BOTH; if (!flags) { @@ -1204,7 +1169,7 @@ static int find_and_prepare_slot(struct r300_fragment_program* rp, continue; } - for(j = 0; j < 3; ++j) { + for (j = 0; j < 3; ++j) { if ((tempused >> j) & flags & SLOT_SRC_VECTOR) { if (tempvsrc[j] != hwsrc[i]) continue; @@ -1235,99 +1200,111 @@ static int find_and_prepare_slot(struct r300_fragment_program* rp, // Found a slot, reserve it cs->slot[pos].used = tempused | (used & SLOT_OP_BOTH); - for(i = 0; i < 3; ++i) { + for (i = 0; i < 3; ++i) { cs->slot[pos].vsrc[i] = tempvsrc[i]; cs->slot[pos].ssrc[i] = tempssrc[i]; } - for(i = 0; i < argc; ++i) { + for (i = 0; i < argc; ++i) { if (REG_GET_TYPE(src[i]) == REG_TYPE_TEMP) { int regnr = hwsrc[i] & 31; if (used & (SLOT_SRC_VECTOR << i)) { if (cs->hwtemps[regnr].vector_lastread < pos) - cs->hwtemps[regnr].vector_lastread = pos; + cs->hwtemps[regnr].vector_lastread = + pos; } if (used & (SLOT_SRC_SCALAR << i)) { if (cs->hwtemps[regnr].scalar_lastread < pos) - cs->hwtemps[regnr].scalar_lastread = pos; + cs->hwtemps[regnr].scalar_lastread = + pos; } } } // Emit the source fetch code - rp->alu.inst[pos].inst1 &= ~R300_FPI1_SRC_MASK; - rp->alu.inst[pos].inst1 |= - ((cs->slot[pos].vsrc[0] << R300_FPI1_SRC0C_SHIFT) | - (cs->slot[pos].vsrc[1] << R300_FPI1_SRC1C_SHIFT) | - (cs->slot[pos].vsrc[2] << R300_FPI1_SRC2C_SHIFT)); - - rp->alu.inst[pos].inst3 &= ~R300_FPI3_SRC_MASK; - rp->alu.inst[pos].inst3 |= - ((cs->slot[pos].ssrc[0] << R300_FPI3_SRC0A_SHIFT) | - (cs->slot[pos].ssrc[1] << R300_FPI3_SRC1A_SHIFT) | - (cs->slot[pos].ssrc[2] << R300_FPI3_SRC2A_SHIFT)); + fp->alu.inst[pos].inst1 &= ~R300_FPI1_SRC_MASK; + fp->alu.inst[pos].inst1 |= + ((cs->slot[pos].vsrc[0] << R300_FPI1_SRC0C_SHIFT) | + (cs->slot[pos].vsrc[1] << R300_FPI1_SRC1C_SHIFT) | + (cs->slot[pos].vsrc[2] << R300_FPI1_SRC2C_SHIFT)); + + fp->alu.inst[pos].inst3 &= ~R300_FPI3_SRC_MASK; + fp->alu.inst[pos].inst3 |= + ((cs->slot[pos].ssrc[0] << R300_FPI3_SRC0A_SHIFT) | + (cs->slot[pos].ssrc[1] << R300_FPI3_SRC1A_SHIFT) | + (cs->slot[pos].ssrc[2] << R300_FPI3_SRC2A_SHIFT)); // Emit the argument selection code if (emit_vop) { int swz[3]; - for(i = 0; i < 3; ++i) { + for (i = 0; i < 3; ++i) { if (i < argc) { swz[i] = (v_swiz[REG_GET_VSWZ(src[i])].base + - (srcpos[i] * v_swiz[REG_GET_VSWZ(src[i])].stride)) | - ((src[i] & REG_NEGV_MASK) ? ARG_NEG : 0) | - ((src[i] & REG_ABS_MASK) ? ARG_ABS : 0); + (srcpos[i] * + v_swiz[REG_GET_VSWZ(src[i])]. + stride)) | ((src[i] & REG_NEGV_MASK) + ? ARG_NEG : 0) | ((src[i] + & + REG_ABS_MASK) + ? + ARG_ABS + : 0); } else { swz[i] = R300_FPI0_ARGC_ZERO; } } - rp->alu.inst[pos].inst0 &= - ~(R300_FPI0_ARG0C_MASK|R300_FPI0_ARG1C_MASK|R300_FPI0_ARG2C_MASK); - rp->alu.inst[pos].inst0 |= - (swz[0] << R300_FPI0_ARG0C_SHIFT) | - (swz[1] << R300_FPI0_ARG1C_SHIFT) | - (swz[2] << R300_FPI0_ARG2C_SHIFT); + fp->alu.inst[pos].inst0 &= + ~(R300_FPI0_ARG0C_MASK | R300_FPI0_ARG1C_MASK | + R300_FPI0_ARG2C_MASK); + fp->alu.inst[pos].inst0 |= + (swz[0] << R300_FPI0_ARG0C_SHIFT) | (swz[1] << + R300_FPI0_ARG1C_SHIFT) + | (swz[2] << R300_FPI0_ARG2C_SHIFT); } if (emit_sop) { int swz[3]; - for(i = 0; i < 3; ++i) { + for (i = 0; i < 3; ++i) { if (i < argc) { swz[i] = (s_swiz[REG_GET_SSWZ(src[i])].base + - (srcpos[i] * s_swiz[REG_GET_SSWZ(src[i])].stride)) | - ((src[i] & REG_NEGV_MASK) ? ARG_NEG : 0) | - ((src[i] & REG_ABS_MASK) ? ARG_ABS : 0); + (srcpos[i] * + s_swiz[REG_GET_SSWZ(src[i])]. + stride)) | ((src[i] & REG_NEGV_MASK) + ? ARG_NEG : 0) | ((src[i] + & + REG_ABS_MASK) + ? + ARG_ABS + : 0); } else { swz[i] = R300_FPI2_ARGA_ZERO; } } - rp->alu.inst[pos].inst2 &= - ~(R300_FPI2_ARG0A_MASK|R300_FPI2_ARG1A_MASK|R300_FPI2_ARG2A_MASK); - rp->alu.inst[pos].inst2 |= - (swz[0] << R300_FPI2_ARG0A_SHIFT) | - (swz[1] << R300_FPI2_ARG1A_SHIFT) | - (swz[2] << R300_FPI2_ARG2A_SHIFT); + fp->alu.inst[pos].inst2 &= + ~(R300_FPI2_ARG0A_MASK | R300_FPI2_ARG1A_MASK | + R300_FPI2_ARG2A_MASK); + fp->alu.inst[pos].inst2 |= + (swz[0] << R300_FPI2_ARG0A_SHIFT) | (swz[1] << + R300_FPI2_ARG1A_SHIFT) + | (swz[2] << R300_FPI2_ARG2A_SHIFT); } return pos; } - /** * Append an ALU instruction to the instruction list. */ -static void emit_arith(struct r300_fragment_program *rp, +static void emit_arith(struct r300_fragment_program *fp, int op, GLuint dest, int mask, - GLuint src0, - GLuint src1, - GLuint src2, - int flags) + GLuint src0, GLuint src1, GLuint src2, int flags) { COMPILE_STATE; GLuint src[3] = { src0, src1, src2 }; @@ -1356,11 +1333,13 @@ static void emit_arith(struct r300_fragment_program *rp, if ((mask & WRITEMASK_W) || vop == R300_FPI0_OUTC_REPL_ALPHA) emit_sop = GL_TRUE; - pos = find_and_prepare_slot(rp, emit_vop, emit_sop, argc, src, dest, mask); + pos = + find_and_prepare_slot(fp, emit_vop, emit_sop, argc, src, dest, + mask); if (pos < 0) return; - hwdest = t_hw_dst(rp, dest, GL_FALSE, pos); /* Note: Side effects wrt register allocation */ + hwdest = t_hw_dst(fp, dest, GL_FALSE, pos); /* Note: Side effects wrt register allocation */ if (flags & PFS_FLAG_SAT) { vop |= R300_FPI0_OUTC_SAT; @@ -1369,40 +1348,48 @@ static void emit_arith(struct r300_fragment_program *rp, /* Throw the pieces together and get FPI0/1 */ if (emit_vop) { - rp->alu.inst[pos].inst0 |= vop; + fp->alu.inst[pos].inst0 |= vop; - rp->alu.inst[pos].inst1 |= hwdest << R300_FPI1_DSTC_SHIFT; + fp->alu.inst[pos].inst1 |= hwdest << R300_FPI1_DSTC_SHIFT; if (REG_GET_TYPE(dest) == REG_TYPE_OUTPUT) { if (REG_GET_INDEX(dest) == FRAG_RESULT_COLR) { - rp->alu.inst[pos].inst1 |= - (mask & WRITEMASK_XYZ) << R300_FPI1_DSTC_OUTPUT_MASK_SHIFT; - } else assert(0); + fp->alu.inst[pos].inst1 |= + (mask & WRITEMASK_XYZ) << + R300_FPI1_DSTC_OUTPUT_MASK_SHIFT; + } else + assert(0); } else { - rp->alu.inst[pos].inst1 |= - (mask & WRITEMASK_XYZ) << R300_FPI1_DSTC_REG_MASK_SHIFT; + fp->alu.inst[pos].inst1 |= + (mask & WRITEMASK_XYZ) << + R300_FPI1_DSTC_REG_MASK_SHIFT; - cs->hwtemps[hwdest].vector_valid = pos+1; + cs->hwtemps[hwdest].vector_valid = pos + 1; } } /* And now FPI2/3 */ if (emit_sop) { - rp->alu.inst[pos].inst2 |= sop; + fp->alu.inst[pos].inst2 |= sop; if (mask & WRITEMASK_W) { if (REG_GET_TYPE(dest) == REG_TYPE_OUTPUT) { if (REG_GET_INDEX(dest) == FRAG_RESULT_COLR) { - rp->alu.inst[pos].inst3 |= - (hwdest << R300_FPI3_DSTA_SHIFT) | R300_FPI3_DSTA_OUTPUT; - } else if (REG_GET_INDEX(dest) == FRAG_RESULT_DEPR) { - rp->alu.inst[pos].inst3 |= R300_FPI3_DSTA_DEPTH; - } else assert(0); + fp->alu.inst[pos].inst3 |= + (hwdest << R300_FPI3_DSTA_SHIFT) | + R300_FPI3_DSTA_OUTPUT; + } else if (REG_GET_INDEX(dest) == + FRAG_RESULT_DEPR) { + fp->alu.inst[pos].inst3 |= + R300_FPI3_DSTA_DEPTH; + } else + assert(0); } else { - rp->alu.inst[pos].inst3 |= - (hwdest << R300_FPI3_DSTA_SHIFT) | R300_FPI3_DSTA_REG; + fp->alu.inst[pos].inst3 |= + (hwdest << R300_FPI3_DSTA_SHIFT) | + R300_FPI3_DSTA_REG; - cs->hwtemps[hwdest].scalar_valid = pos+1; + cs->hwtemps[hwdest].scalar_valid = pos + 1; } } } @@ -1411,12 +1398,12 @@ static void emit_arith(struct r300_fragment_program *rp, } #if 0 -static GLuint get_attrib(struct r300_fragment_program *rp, GLuint attr) +static GLuint get_attrib(struct r300_fragment_program *fp, GLuint attr) { - struct gl_fragment_program *mp = &rp->mesa_program; + struct gl_fragment_program *mp = &fp->mesa_program; GLuint r = undef; - if (!(mp->Base.InputsRead & (1<<attr))) { + if (!(mp->Base.InputsRead & (1 << attr))) { ERROR("Attribute %d was not provided!\n", attr); return undef; } @@ -1430,20 +1417,19 @@ static GLuint get_attrib(struct r300_fragment_program *rp, GLuint attr) static GLfloat SinCosConsts[2][4] = { { - 1.273239545, // 4/PI - -0.405284735, // -4/(PI*PI) - 3.141592654, // PI - 0.2225 // weight - }, + 1.273239545, // 4/PI + -0.405284735, // -4/(PI*PI) + 3.141592654, // PI + 0.2225 // weight + }, { - 0.75, - 0.0, - 0.159154943, // 1/(2*PI) - 6.283185307 // 2*PI - } + 0.75, + 0.0, + 0.159154943, // 1/(2*PI) + 6.283185307 // 2*PI + } }; - /** * Emit a LIT instruction. * \p flags may be PFS_FLAG_SAT @@ -1466,20 +1452,18 @@ static GLfloat SinCosConsts[2][4] = { * emit_arith is a bit too conservative because it doesn't understand * partial writes to the vector component. */ -static const GLfloat LitConst[4] = { 127.999999, 127.999999, 127.999999, -127.999999 }; +static const GLfloat LitConst[4] = + { 127.999999, 127.999999, 127.999999, -127.999999 }; -static void emit_lit(struct r300_fragment_program *rp, - GLuint dest, - int mask, - GLuint src, - int flags) +static void emit_lit(struct r300_fragment_program *fp, + GLuint dest, int mask, GLuint src, int flags) { COMPILE_STATE; GLuint cnst; int needTemporary; GLuint temp; - cnst = emit_const4fv(rp, LitConst); + cnst = emit_const4fv(fp, LitConst); needTemporary = 0; if ((mask & WRITEMASK_XYZW) != WRITEMASK_XYZW) { @@ -1491,7 +1475,7 @@ static void emit_lit(struct r300_fragment_program *rp, } if (needTemporary) { - temp = keep(get_temp_reg(rp)); + temp = keep(get_temp_reg(fp)); } else { temp = keep(dest); } @@ -1502,51 +1486,49 @@ static void emit_lit(struct r300_fragment_program *rp, // so swizzling between the two parts can create fake dependencies. // First slot - emit_arith(rp, PFS_OP_MAX, temp, WRITEMASK_XY, - keep(src), pfs_zero, undef, 0); - emit_arith(rp, PFS_OP_MAX, temp, WRITEMASK_W, - src, cnst, undef, 0); + emit_arith(fp, PFS_OP_MAX, temp, WRITEMASK_XY, + keep(src), pfs_zero, undef, 0); + emit_arith(fp, PFS_OP_MAX, temp, WRITEMASK_W, src, cnst, undef, 0); // Second slot - emit_arith(rp, PFS_OP_MIN, temp, WRITEMASK_Z, - swizzle(temp, W, W, W, W), cnst, undef, 0); - emit_arith(rp, PFS_OP_LG2, temp, WRITEMASK_W, - swizzle(temp, Y, Y, Y, Y), undef, undef, 0); + emit_arith(fp, PFS_OP_MIN, temp, WRITEMASK_Z, + swizzle(temp, W, W, W, W), cnst, undef, 0); + emit_arith(fp, PFS_OP_LG2, temp, WRITEMASK_W, + swizzle(temp, Y, Y, Y, Y), undef, undef, 0); // Third slot // If desired, we saturate the y result here. // This does not affect the use as a condition variable in the CMP later - emit_arith(rp, PFS_OP_MAD, temp, WRITEMASK_W, - temp, swizzle(temp, Z, Z, Z, Z), pfs_zero, 0); - emit_arith(rp, PFS_OP_MAD, temp, WRITEMASK_Y, - swizzle(temp, X, X, X, X), pfs_one, pfs_zero, flags); + emit_arith(fp, PFS_OP_MAD, temp, WRITEMASK_W, + temp, swizzle(temp, Z, Z, Z, Z), pfs_zero, 0); + emit_arith(fp, PFS_OP_MAD, temp, WRITEMASK_Y, + swizzle(temp, X, X, X, X), pfs_one, pfs_zero, flags); // Fourth slot - emit_arith(rp, PFS_OP_MAD, temp, WRITEMASK_X, - pfs_one, pfs_one, pfs_zero, 0); - emit_arith(rp, PFS_OP_EX2, temp, WRITEMASK_W, - temp, undef, undef, 0); + emit_arith(fp, PFS_OP_MAD, temp, WRITEMASK_X, + pfs_one, pfs_one, pfs_zero, 0); + emit_arith(fp, PFS_OP_EX2, temp, WRITEMASK_W, temp, undef, undef, 0); // Fifth slot - emit_arith(rp, PFS_OP_CMP, temp, WRITEMASK_Z, - pfs_zero, swizzle(temp, W, W, W, W), negate(swizzle(temp, Y, Y, Y, Y)), flags); - emit_arith(rp, PFS_OP_MAD, temp, WRITEMASK_W, - pfs_one, pfs_one, pfs_zero, 0); + emit_arith(fp, PFS_OP_CMP, temp, WRITEMASK_Z, + pfs_zero, swizzle(temp, W, W, W, W), + negate(swizzle(temp, Y, Y, Y, Y)), flags); + emit_arith(fp, PFS_OP_MAD, temp, WRITEMASK_W, pfs_one, pfs_one, + pfs_zero, 0); if (needTemporary) { - emit_arith(rp, PFS_OP_MAD, dest, mask, - temp, pfs_one, pfs_zero, flags); - free_temp(rp, temp); + emit_arith(fp, PFS_OP_MAD, dest, mask, + temp, pfs_one, pfs_zero, flags); + free_temp(fp, temp); } else { // Decrease refcount of the destination - t_hw_dst(rp, dest, GL_FALSE, cs->nrslots); + t_hw_dst(fp, dest, GL_FALSE, cs->nrslots); } } - -static GLboolean parse_program(struct r300_fragment_program *rp) +static GLboolean parse_program(struct r300_fragment_program *fp) { - struct gl_fragment_program *mp = &rp->mesa_program; + struct gl_fragment_program *mp = &fp->mesa_program; const struct prog_instruction *inst = mp->Base.Instructions; struct prog_instruction *fpi; GLuint src[3], dest, temp[2]; @@ -1558,41 +1540,38 @@ static GLboolean parse_program(struct r300_fragment_program *rp) return GL_FALSE; } - for (fpi=mp->Base.Instructions; fpi->Opcode != OPCODE_END; fpi++) { + for (fpi = mp->Base.Instructions; fpi->Opcode != OPCODE_END; fpi++) { if (fpi->SaturateMode == SATURATE_ZERO_ONE) flags = PFS_FLAG_SAT; else flags = 0; if (fpi->Opcode != OPCODE_KIL) { - dest = t_dst(rp, fpi->DstReg); + dest = t_dst(fp, fpi->DstReg); mask = fpi->DstReg.WriteMask; } switch (fpi->Opcode) { case OPCODE_ABS: - src[0] = t_src(rp, fpi->SrcReg[0]); - emit_arith(rp, PFS_OP_MAD, dest, mask, - absolute(src[0]), pfs_one, pfs_zero, - flags); + src[0] = t_src(fp, fpi->SrcReg[0]); + emit_arith(fp, PFS_OP_MAD, dest, mask, + absolute(src[0]), pfs_one, pfs_zero, flags); break; case OPCODE_ADD: - src[0] = t_src(rp, fpi->SrcReg[0]); - src[1] = t_src(rp, fpi->SrcReg[1]); - emit_arith(rp, PFS_OP_MAD, dest, mask, - src[0], pfs_one, src[1], - flags); + src[0] = t_src(fp, fpi->SrcReg[0]); + src[1] = t_src(fp, fpi->SrcReg[1]); + emit_arith(fp, PFS_OP_MAD, dest, mask, + src[0], pfs_one, src[1], flags); break; case OPCODE_CMP: - src[0] = t_src(rp, fpi->SrcReg[0]); - src[1] = t_src(rp, fpi->SrcReg[1]); - src[2] = t_src(rp, fpi->SrcReg[2]); + src[0] = t_src(fp, fpi->SrcReg[0]); + src[1] = t_src(fp, fpi->SrcReg[1]); + src[2] = t_src(fp, fpi->SrcReg[2]); /* ARB_f_p - if src0.c < 0.0 ? src1.c : src2.c * r300 - if src2.c < 0.0 ? src1.c : src0.c */ - emit_arith(rp, PFS_OP_CMP, dest, mask, - src[2], src[1], src[0], - flags); + emit_arith(fp, PFS_OP_CMP, dest, mask, + src[2], src[1], src[0], flags); break; case OPCODE_COS: /* @@ -1603,237 +1582,207 @@ static GLboolean parse_program(struct r300_fragment_program *rp) * x = (x*2*PI)-PI * result = sin(x) */ - temp[0] = get_temp_reg(rp); - const_sin[0] = emit_const4fv(rp, SinCosConsts[0]); - const_sin[1] = emit_const4fv(rp, SinCosConsts[1]); - src[0] = t_scalar_src(rp, fpi->SrcReg[0]); + temp[0] = get_temp_reg(fp); + const_sin[0] = emit_const4fv(fp, SinCosConsts[0]); + const_sin[1] = emit_const4fv(fp, SinCosConsts[1]); + src[0] = t_scalar_src(fp, fpi->SrcReg[0]); /* add 0.5*PI and do range reduction */ - emit_arith(rp, PFS_OP_MAD, temp[0], WRITEMASK_X, + emit_arith(fp, PFS_OP_MAD, temp[0], WRITEMASK_X, swizzle(src[0], X, X, X, X), swizzle(const_sin[1], Z, Z, Z, Z), - swizzle(const_sin[1], X, X, X, X), - 0); + swizzle(const_sin[1], X, X, X, X), 0); - emit_arith(rp, PFS_OP_FRC, temp[0], WRITEMASK_X, + emit_arith(fp, PFS_OP_FRC, temp[0], WRITEMASK_X, swizzle(temp[0], X, X, X, X), - undef, - undef, - 0); + undef, undef, 0); - emit_arith(rp, PFS_OP_MAD, temp[0], WRITEMASK_Z, - swizzle(temp[0], X, X, X, X), - swizzle(const_sin[1], W, W, W, W), //2*PI - negate(swizzle(const_sin[0], Z, Z, Z, Z)), //-PI + emit_arith(fp, PFS_OP_MAD, temp[0], WRITEMASK_Z, swizzle(temp[0], X, X, X, X), swizzle(const_sin[1], W, W, W, W), //2*PI + negate(swizzle(const_sin[0], Z, Z, Z, Z)), //-PI 0); /* SIN */ - emit_arith(rp, PFS_OP_MAD, temp[0], WRITEMASK_X | WRITEMASK_Y, - swizzle(temp[0], Z, Z, Z, Z), - const_sin[0], - pfs_zero, - 0); + emit_arith(fp, PFS_OP_MAD, temp[0], + WRITEMASK_X | WRITEMASK_Y, swizzle(temp[0], + Z, Z, Z, + Z), + const_sin[0], pfs_zero, 0); - emit_arith(rp, PFS_OP_MAD, temp[0], WRITEMASK_X, + emit_arith(fp, PFS_OP_MAD, temp[0], WRITEMASK_X, swizzle(temp[0], Y, Y, Y, Y), absolute(swizzle(temp[0], Z, Z, Z, Z)), - swizzle(temp[0], X, X, X, X), - 0); + swizzle(temp[0], X, X, X, X), 0); - emit_arith(rp, PFS_OP_MAD, temp[0], WRITEMASK_Y, + emit_arith(fp, PFS_OP_MAD, temp[0], WRITEMASK_Y, swizzle(temp[0], X, X, X, X), absolute(swizzle(temp[0], X, X, X, X)), - negate(swizzle(temp[0], X, X, X, X)), - 0); + negate(swizzle(temp[0], X, X, X, X)), 0); - - emit_arith(rp, PFS_OP_MAD, dest, mask, + emit_arith(fp, PFS_OP_MAD, dest, mask, swizzle(temp[0], Y, Y, Y, Y), swizzle(const_sin[0], W, W, W, W), - swizzle(temp[0], X, X, X, X), - flags); + swizzle(temp[0], X, X, X, X), flags); - free_temp(rp, temp[0]); + free_temp(fp, temp[0]); break; case OPCODE_DP3: - src[0] = t_src(rp, fpi->SrcReg[0]); - src[1] = t_src(rp, fpi->SrcReg[1]); - emit_arith(rp, PFS_OP_DP3, dest, mask, - src[0], src[1], undef, - flags); + src[0] = t_src(fp, fpi->SrcReg[0]); + src[1] = t_src(fp, fpi->SrcReg[1]); + emit_arith(fp, PFS_OP_DP3, dest, mask, + src[0], src[1], undef, flags); break; case OPCODE_DP4: - src[0] = t_src(rp, fpi->SrcReg[0]); - src[1] = t_src(rp, fpi->SrcReg[1]); - emit_arith(rp, PFS_OP_DP4, dest, mask, - src[0], src[1], undef, - flags); + src[0] = t_src(fp, fpi->SrcReg[0]); + src[1] = t_src(fp, fpi->SrcReg[1]); + emit_arith(fp, PFS_OP_DP4, dest, mask, + src[0], src[1], undef, flags); break; case OPCODE_DPH: - src[0] = t_src(rp, fpi->SrcReg[0]); - src[1] = t_src(rp, fpi->SrcReg[1]); + src[0] = t_src(fp, fpi->SrcReg[0]); + src[1] = t_src(fp, fpi->SrcReg[1]); /* src0.xyz1 -> temp * DP4 dest, temp, src1 */ #if 0 - temp[0] = get_temp_reg(rp); + temp[0] = get_temp_reg(fp); src[0].s_swz = SWIZZLE_ONE; - emit_arith(rp, PFS_OP_MAD, temp[0], mask, - src[0], pfs_one, pfs_zero, - 0); - emit_arith(rp, PFS_OP_DP4, dest, mask, - temp[0], src[1], undef, - flags); - free_temp(rp, temp[0]); + emit_arith(fp, PFS_OP_MAD, temp[0], mask, + src[0], pfs_one, pfs_zero, 0); + emit_arith(fp, PFS_OP_DP4, dest, mask, + temp[0], src[1], undef, flags); + free_temp(fp, temp[0]); #else - emit_arith(rp, PFS_OP_DP4, dest, mask, + emit_arith(fp, PFS_OP_DP4, dest, mask, swizzle(src[0], X, Y, Z, ONE), src[1], undef, flags); #endif break; case OPCODE_DST: - src[0] = t_src(rp, fpi->SrcReg[0]); - src[1] = t_src(rp, fpi->SrcReg[1]); + src[0] = t_src(fp, fpi->SrcReg[0]); + src[1] = t_src(fp, fpi->SrcReg[1]); /* dest.y = src0.y * src1.y */ if (mask & WRITEMASK_Y) - emit_arith(rp, PFS_OP_MAD, dest, WRITEMASK_Y, + emit_arith(fp, PFS_OP_MAD, dest, WRITEMASK_Y, keep(src[0]), keep(src[1]), pfs_zero, flags); /* dest.z = src0.z */ if (mask & WRITEMASK_Z) - emit_arith(rp, PFS_OP_MAD, dest, WRITEMASK_Z, + emit_arith(fp, PFS_OP_MAD, dest, WRITEMASK_Z, src[0], pfs_one, pfs_zero, flags); /* result.x = 1.0 * result.w = src1.w */ if (mask & WRITEMASK_XW) { - REG_SET_VSWZ(src[1], SWIZZLE_111); /*Cheat*/ - emit_arith(rp, PFS_OP_MAD, dest, + REG_SET_VSWZ(src[1], SWIZZLE_111); /*Cheat */ + emit_arith(fp, PFS_OP_MAD, dest, mask & WRITEMASK_XW, - src[1], pfs_one, pfs_zero, - flags); + src[1], pfs_one, pfs_zero, flags); } break; case OPCODE_EX2: - src[0] = t_scalar_src(rp, fpi->SrcReg[0]); - emit_arith(rp, PFS_OP_EX2, dest, mask, - src[0], undef, undef, - flags); + src[0] = t_scalar_src(fp, fpi->SrcReg[0]); + emit_arith(fp, PFS_OP_EX2, dest, mask, + src[0], undef, undef, flags); break; case OPCODE_FLR: - src[0] = t_src(rp, fpi->SrcReg[0]); - temp[0] = get_temp_reg(rp); + src[0] = t_src(fp, fpi->SrcReg[0]); + temp[0] = get_temp_reg(fp); /* FRC temp, src0 * MAD dest, src0, 1.0, -temp */ - emit_arith(rp, PFS_OP_FRC, temp[0], mask, - keep(src[0]), undef, undef, - 0); - emit_arith(rp, PFS_OP_MAD, dest, mask, - src[0], pfs_one, negate(temp[0]), - flags); - free_temp(rp, temp[0]); + emit_arith(fp, PFS_OP_FRC, temp[0], mask, + keep(src[0]), undef, undef, 0); + emit_arith(fp, PFS_OP_MAD, dest, mask, + src[0], pfs_one, negate(temp[0]), flags); + free_temp(fp, temp[0]); break; case OPCODE_FRC: - src[0] = t_src(rp, fpi->SrcReg[0]); - emit_arith(rp, PFS_OP_FRC, dest, mask, - src[0], undef, undef, - flags); + src[0] = t_src(fp, fpi->SrcReg[0]); + emit_arith(fp, PFS_OP_FRC, dest, mask, + src[0], undef, undef, flags); break; case OPCODE_KIL: - emit_tex(rp, fpi, R300_FPITX_OP_KIL); + emit_tex(fp, fpi, R300_FPITX_OP_KIL); break; case OPCODE_LG2: - src[0] = t_scalar_src(rp, fpi->SrcReg[0]); - emit_arith(rp, PFS_OP_LG2, dest, mask, - src[0], undef, undef, - flags); + src[0] = t_scalar_src(fp, fpi->SrcReg[0]); + emit_arith(fp, PFS_OP_LG2, dest, mask, + src[0], undef, undef, flags); break; case OPCODE_LIT: - src[0] = t_src(rp, fpi->SrcReg[0]); - emit_lit(rp, dest, mask, src[0], flags); + src[0] = t_src(fp, fpi->SrcReg[0]); + emit_lit(fp, dest, mask, src[0], flags); break; case OPCODE_LRP: - src[0] = t_src(rp, fpi->SrcReg[0]); - src[1] = t_src(rp, fpi->SrcReg[1]); - src[2] = t_src(rp, fpi->SrcReg[2]); + src[0] = t_src(fp, fpi->SrcReg[0]); + src[1] = t_src(fp, fpi->SrcReg[1]); + src[2] = t_src(fp, fpi->SrcReg[2]); /* result = tmp0tmp1 + (1 - tmp0)tmp2 * = tmp0tmp1 + tmp2 + (-tmp0)tmp2 * MAD temp, -tmp0, tmp2, tmp2 * MAD result, tmp0, tmp1, temp */ - temp[0] = get_temp_reg(rp); - emit_arith(rp, PFS_OP_MAD, temp[0], mask, + temp[0] = get_temp_reg(fp); + emit_arith(fp, PFS_OP_MAD, temp[0], mask, negate(keep(src[0])), keep(src[2]), src[2], 0); - emit_arith(rp, PFS_OP_MAD, dest, mask, - src[0], src[1], temp[0], - flags); - free_temp(rp, temp[0]); + emit_arith(fp, PFS_OP_MAD, dest, mask, + src[0], src[1], temp[0], flags); + free_temp(fp, temp[0]); break; case OPCODE_MAD: - src[0] = t_src(rp, fpi->SrcReg[0]); - src[1] = t_src(rp, fpi->SrcReg[1]); - src[2] = t_src(rp, fpi->SrcReg[2]); - emit_arith(rp, PFS_OP_MAD, dest, mask, - src[0], src[1], src[2], - flags); + src[0] = t_src(fp, fpi->SrcReg[0]); + src[1] = t_src(fp, fpi->SrcReg[1]); + src[2] = t_src(fp, fpi->SrcReg[2]); + emit_arith(fp, PFS_OP_MAD, dest, mask, + src[0], src[1], src[2], flags); break; case OPCODE_MAX: - src[0] = t_src(rp, fpi->SrcReg[0]); - src[1] = t_src(rp, fpi->SrcReg[1]); - emit_arith(rp, PFS_OP_MAX, dest, mask, - src[0], src[1], undef, - flags); + src[0] = t_src(fp, fpi->SrcReg[0]); + src[1] = t_src(fp, fpi->SrcReg[1]); + emit_arith(fp, PFS_OP_MAX, dest, mask, + src[0], src[1], undef, flags); break; case OPCODE_MIN: - src[0] = t_src(rp, fpi->SrcReg[0]); - src[1] = t_src(rp, fpi->SrcReg[1]); - emit_arith(rp, PFS_OP_MIN, dest, mask, - src[0], src[1], undef, - flags); + src[0] = t_src(fp, fpi->SrcReg[0]); + src[1] = t_src(fp, fpi->SrcReg[1]); + emit_arith(fp, PFS_OP_MIN, dest, mask, + src[0], src[1], undef, flags); break; case OPCODE_MOV: case OPCODE_SWZ: - src[0] = t_src(rp, fpi->SrcReg[0]); - emit_arith(rp, PFS_OP_MAD, dest, mask, - src[0], pfs_one, pfs_zero, - flags); + src[0] = t_src(fp, fpi->SrcReg[0]); + emit_arith(fp, PFS_OP_MAD, dest, mask, + src[0], pfs_one, pfs_zero, flags); break; case OPCODE_MUL: - src[0] = t_src(rp, fpi->SrcReg[0]); - src[1] = t_src(rp, fpi->SrcReg[1]); - emit_arith(rp, PFS_OP_MAD, dest, mask, - src[0], src[1], pfs_zero, - flags); + src[0] = t_src(fp, fpi->SrcReg[0]); + src[1] = t_src(fp, fpi->SrcReg[1]); + emit_arith(fp, PFS_OP_MAD, dest, mask, + src[0], src[1], pfs_zero, flags); break; case OPCODE_POW: - src[0] = t_scalar_src(rp, fpi->SrcReg[0]); - src[1] = t_scalar_src(rp, fpi->SrcReg[1]); - temp[0] = get_temp_reg(rp); - emit_arith(rp, PFS_OP_LG2, temp[0], WRITEMASK_W, - src[0], undef, undef, - 0); - emit_arith(rp, PFS_OP_MAD, temp[0], WRITEMASK_W, - temp[0], src[1], pfs_zero, - 0); - emit_arith(rp, PFS_OP_EX2, dest, fpi->DstReg.WriteMask, - temp[0], undef, undef, - 0); - free_temp(rp, temp[0]); + src[0] = t_scalar_src(fp, fpi->SrcReg[0]); + src[1] = t_scalar_src(fp, fpi->SrcReg[1]); + temp[0] = get_temp_reg(fp); + emit_arith(fp, PFS_OP_LG2, temp[0], WRITEMASK_W, + src[0], undef, undef, 0); + emit_arith(fp, PFS_OP_MAD, temp[0], WRITEMASK_W, + temp[0], src[1], pfs_zero, 0); + emit_arith(fp, PFS_OP_EX2, dest, fpi->DstReg.WriteMask, + temp[0], undef, undef, 0); + free_temp(fp, temp[0]); break; case OPCODE_RCP: - src[0] = t_scalar_src(rp, fpi->SrcReg[0]); - emit_arith(rp, PFS_OP_RCP, dest, mask, - src[0], undef, undef, - flags); + src[0] = t_scalar_src(fp, fpi->SrcReg[0]); + emit_arith(fp, PFS_OP_RCP, dest, mask, + src[0], undef, undef, flags); break; case OPCODE_RSQ: - src[0] = t_scalar_src(rp, fpi->SrcReg[0]); - emit_arith(rp, PFS_OP_RSQ, dest, mask, - absolute(src[0]), pfs_zero, pfs_zero, - flags); + src[0] = t_scalar_src(fp, fpi->SrcReg[0]); + emit_arith(fp, PFS_OP_RSQ, dest, mask, + absolute(src[0]), pfs_zero, pfs_zero, flags); break; case OPCODE_SCS: /* @@ -1843,86 +1792,78 @@ static GLboolean parse_program(struct r300_fragment_program *rp) * result.y = sin(x) (sin) * */ - temp[0] = get_temp_reg(rp); - temp[1] = get_temp_reg(rp); - const_sin[0] = emit_const4fv(rp, SinCosConsts[0]); - const_sin[1] = emit_const4fv(rp, SinCosConsts[1]); - src[0] = t_scalar_src(rp, fpi->SrcReg[0]); + temp[0] = get_temp_reg(fp); + temp[1] = get_temp_reg(fp); + const_sin[0] = emit_const4fv(fp, SinCosConsts[0]); + const_sin[1] = emit_const4fv(fp, SinCosConsts[1]); + src[0] = t_scalar_src(fp, fpi->SrcReg[0]); /* x = -abs(x)+0.5*PI */ - emit_arith(rp, PFS_OP_MAD, temp[0], WRITEMASK_Z, - swizzle(const_sin[0], Z, Z, Z, Z), //PI + emit_arith(fp, PFS_OP_MAD, temp[0], WRITEMASK_Z, swizzle(const_sin[0], Z, Z, Z, Z), //PI pfs_half, - negate(abs(swizzle(keep(src[0]), X, X, X, X))), + negate(abs + (swizzle(keep(src[0]), X, X, X, X))), 0); /* C*x (sin) */ - emit_arith(rp, PFS_OP_MAD, temp[0], WRITEMASK_W, + emit_arith(fp, PFS_OP_MAD, temp[0], WRITEMASK_W, swizzle(const_sin[0], Y, Y, Y, Y), swizzle(keep(src[0]), X, X, X, X), - pfs_zero, - 0); + pfs_zero, 0); /* B*x, C*x (cos) */ - emit_arith(rp, PFS_OP_MAD, temp[0], WRITEMASK_X | WRITEMASK_Y, - swizzle(temp[0], Z, Z, Z, Z), - const_sin[0], - pfs_zero, - 0); + emit_arith(fp, PFS_OP_MAD, temp[0], + WRITEMASK_X | WRITEMASK_Y, swizzle(temp[0], + Z, Z, Z, + Z), + const_sin[0], pfs_zero, 0); /* B*x (sin) */ - emit_arith(rp, PFS_OP_MAD, temp[1], WRITEMASK_W, + emit_arith(fp, PFS_OP_MAD, temp[1], WRITEMASK_W, swizzle(const_sin[0], X, X, X, X), - keep(src[0]), - pfs_zero, - 0); + keep(src[0]), pfs_zero, 0); - /* y = B*x + C*x*abs(x) (sin)*/ - emit_arith(rp, PFS_OP_MAD, temp[1], WRITEMASK_Z, + /* y = B*x + C*x*abs(x) (sin) */ + emit_arith(fp, PFS_OP_MAD, temp[1], WRITEMASK_Z, absolute(src[0]), swizzle(temp[0], W, W, W, W), - swizzle(temp[1], W, W, W, W), - 0); + swizzle(temp[1], W, W, W, W), 0); - /* y = B*x + C*x*abs(x) (cos)*/ - emit_arith(rp, PFS_OP_MAD, temp[1], WRITEMASK_W, + /* y = B*x + C*x*abs(x) (cos) */ + emit_arith(fp, PFS_OP_MAD, temp[1], WRITEMASK_W, swizzle(temp[0], Y, Y, Y, Y), absolute(swizzle(temp[0], Z, Z, Z, Z)), - swizzle(temp[0], X, X, X, X), - 0); + swizzle(temp[0], X, X, X, X), 0); /* y*abs(y) - y (cos), y*abs(y) - y (sin) */ - emit_arith(rp, PFS_OP_MAD, temp[0], WRITEMASK_X | WRITEMASK_Y, - swizzle(temp[1], W, Z, Y, X), + emit_arith(fp, PFS_OP_MAD, temp[0], + WRITEMASK_X | WRITEMASK_Y, swizzle(temp[1], + W, Z, Y, + X), absolute(swizzle(temp[1], W, Z, Y, X)), - negate(swizzle(temp[1], W, Z, Y, X)), - - 0); + negate(swizzle(temp[1], W, Z, Y, X)), 0); /* dest.xy = mad(temp.xy, P, temp2.wz) */ - emit_arith(rp, PFS_OP_MAD, dest, mask & (WRITEMASK_X | WRITEMASK_Y), - temp[0], + emit_arith(fp, PFS_OP_MAD, dest, + mask & (WRITEMASK_X | WRITEMASK_Y), temp[0], swizzle(const_sin[0], W, W, W, W), - swizzle(temp[1], W, Z, Y, X), - flags); + swizzle(temp[1], W, Z, Y, X), flags); - free_temp(rp, temp[0]); - free_temp(rp, temp[1]); + free_temp(fp, temp[0]); + free_temp(fp, temp[1]); break; case OPCODE_SGE: - src[0] = t_src(rp, fpi->SrcReg[0]); - src[1] = t_src(rp, fpi->SrcReg[1]); - temp[0] = get_temp_reg(rp); + src[0] = t_src(fp, fpi->SrcReg[0]); + src[1] = t_src(fp, fpi->SrcReg[1]); + temp[0] = get_temp_reg(fp); /* temp = src0 - src1 * dest.c = (temp.c < 0.0) ? 0 : 1 */ - emit_arith(rp, PFS_OP_MAD, temp[0], mask, - src[0], pfs_one, negate(src[1]), - 0); - emit_arith(rp, PFS_OP_CMP, dest, mask, - pfs_one, pfs_zero, temp[0], - 0); - free_temp(rp, temp[0]); + emit_arith(fp, PFS_OP_MAD, temp[0], mask, + src[0], pfs_one, negate(src[1]), 0); + emit_arith(fp, PFS_OP_CMP, dest, mask, + pfs_one, pfs_zero, temp[0], 0); + free_temp(fp, temp[0]); break; case OPCODE_SIN: /* @@ -1932,120 +1873,108 @@ static GLboolean parse_program(struct r300_fragment_program *rp) * itself squared. */ - temp[0] = get_temp_reg(rp); - const_sin[0] = emit_const4fv(rp, SinCosConsts[0]); - const_sin[1] = emit_const4fv(rp, SinCosConsts[1]); - src[0] = t_scalar_src(rp, fpi->SrcReg[0]); - + temp[0] = get_temp_reg(fp); + const_sin[0] = emit_const4fv(fp, SinCosConsts[0]); + const_sin[1] = emit_const4fv(fp, SinCosConsts[1]); + src[0] = t_scalar_src(fp, fpi->SrcReg[0]); /* do range reduction */ - emit_arith(rp, PFS_OP_MAD, temp[0], WRITEMASK_X, + emit_arith(fp, PFS_OP_MAD, temp[0], WRITEMASK_X, swizzle(keep(src[0]), X, X, X, X), swizzle(const_sin[1], Z, Z, Z, Z), - pfs_half, - 0); + pfs_half, 0); - emit_arith(rp, PFS_OP_FRC, temp[0], WRITEMASK_X, + emit_arith(fp, PFS_OP_FRC, temp[0], WRITEMASK_X, swizzle(temp[0], X, X, X, X), - undef, - undef, - 0); + undef, undef, 0); - emit_arith(rp, PFS_OP_MAD, temp[0], WRITEMASK_Z, - swizzle(temp[0], X, X, X, X), - swizzle(const_sin[1], W, W, W, W), //2*PI - negate(swizzle(const_sin[0], Z, Z, Z, Z)), //PI + emit_arith(fp, PFS_OP_MAD, temp[0], WRITEMASK_Z, swizzle(temp[0], X, X, X, X), swizzle(const_sin[1], W, W, W, W), //2*PI + negate(swizzle(const_sin[0], Z, Z, Z, Z)), //PI 0); /* SIN */ - emit_arith(rp, PFS_OP_MAD, temp[0], WRITEMASK_X | WRITEMASK_Y, - swizzle(temp[0], Z, Z, Z, Z), - const_sin[0], - pfs_zero, - 0); + emit_arith(fp, PFS_OP_MAD, temp[0], + WRITEMASK_X | WRITEMASK_Y, swizzle(temp[0], + Z, Z, Z, + Z), + const_sin[0], pfs_zero, 0); - emit_arith(rp, PFS_OP_MAD, temp[0], WRITEMASK_X, + emit_arith(fp, PFS_OP_MAD, temp[0], WRITEMASK_X, swizzle(temp[0], Y, Y, Y, Y), absolute(swizzle(temp[0], Z, Z, Z, Z)), - swizzle(temp[0], X, X, X, X), - 0); + swizzle(temp[0], X, X, X, X), 0); - emit_arith(rp, PFS_OP_MAD, temp[0], WRITEMASK_Y, + emit_arith(fp, PFS_OP_MAD, temp[0], WRITEMASK_Y, swizzle(temp[0], X, X, X, X), absolute(swizzle(temp[0], X, X, X, X)), - negate(swizzle(temp[0], X, X, X, X)), - 0); - + negate(swizzle(temp[0], X, X, X, X)), 0); - emit_arith(rp, PFS_OP_MAD, dest, mask, + emit_arith(fp, PFS_OP_MAD, dest, mask, swizzle(temp[0], Y, Y, Y, Y), swizzle(const_sin[0], W, W, W, W), - swizzle(temp[0], X, X, X, X), - flags); + swizzle(temp[0], X, X, X, X), flags); - free_temp(rp, temp[0]); + free_temp(fp, temp[0]); break; case OPCODE_SLT: - src[0] = t_src(rp, fpi->SrcReg[0]); - src[1] = t_src(rp, fpi->SrcReg[1]); - temp[0] = get_temp_reg(rp); + src[0] = t_src(fp, fpi->SrcReg[0]); + src[1] = t_src(fp, fpi->SrcReg[1]); + temp[0] = get_temp_reg(fp); /* temp = src0 - src1 * dest.c = (temp.c < 0.0) ? 1 : 0 */ - emit_arith(rp, PFS_OP_MAD, temp[0], mask, - src[0], pfs_one, negate(src[1]), - 0); - emit_arith(rp, PFS_OP_CMP, dest, mask, - pfs_zero, pfs_one, temp[0], - 0); - free_temp(rp, temp[0]); + emit_arith(fp, PFS_OP_MAD, temp[0], mask, + src[0], pfs_one, negate(src[1]), 0); + emit_arith(fp, PFS_OP_CMP, dest, mask, + pfs_zero, pfs_one, temp[0], 0); + free_temp(fp, temp[0]); break; case OPCODE_SUB: - src[0] = t_src(rp, fpi->SrcReg[0]); - src[1] = t_src(rp, fpi->SrcReg[1]); - emit_arith(rp, PFS_OP_MAD, dest, mask, - src[0], pfs_one, negate(src[1]), - flags); + src[0] = t_src(fp, fpi->SrcReg[0]); + src[1] = t_src(fp, fpi->SrcReg[1]); + emit_arith(fp, PFS_OP_MAD, dest, mask, + src[0], pfs_one, negate(src[1]), flags); break; case OPCODE_TEX: - emit_tex(rp, fpi, R300_FPITX_OP_TEX); + emit_tex(fp, fpi, R300_FPITX_OP_TEX); break; case OPCODE_TXB: - emit_tex(rp, fpi, R300_FPITX_OP_TXB); + emit_tex(fp, fpi, R300_FPITX_OP_TXB); break; case OPCODE_TXP: - emit_tex(rp, fpi, R300_FPITX_OP_TXP); + emit_tex(fp, fpi, R300_FPITX_OP_TXP); break; - case OPCODE_XPD: { - src[0] = t_src(rp, fpi->SrcReg[0]); - src[1] = t_src(rp, fpi->SrcReg[1]); - temp[0] = get_temp_reg(rp); - /* temp = src0.zxy * src1.yzx */ - emit_arith(rp, PFS_OP_MAD, temp[0], WRITEMASK_XYZ, - swizzle(keep(src[0]), Z, X, Y, W), - swizzle(keep(src[1]), Y, Z, X, W), - pfs_zero, - 0); - /* dest.xyz = src0.yzx * src1.zxy - temp - * dest.w = undefined - * */ - emit_arith(rp, PFS_OP_MAD, dest, mask & WRITEMASK_XYZ, - swizzle(src[0], Y, Z, X, W), - swizzle(src[1], Z, X, Y, W), - negate(temp[0]), - flags); - /* cleanup */ - free_temp(rp, temp[0]); - break; - } + case OPCODE_XPD:{ + src[0] = t_src(fp, fpi->SrcReg[0]); + src[1] = t_src(fp, fpi->SrcReg[1]); + temp[0] = get_temp_reg(fp); + /* temp = src0.zxy * src1.yzx */ + emit_arith(fp, PFS_OP_MAD, temp[0], + WRITEMASK_XYZ, swizzle(keep(src[0]), + Z, X, Y, W), + swizzle(keep(src[1]), Y, Z, X, W), + pfs_zero, 0); + /* dest.xyz = src0.yzx * src1.zxy - temp + * dest.w = undefined + * */ + emit_arith(fp, PFS_OP_MAD, dest, + mask & WRITEMASK_XYZ, swizzle(src[0], + Y, Z, + X, W), + swizzle(src[1], Z, X, Y, W), + negate(temp[0]), flags); + /* cleanup */ + free_temp(fp, temp[0]); + break; + } default: ERROR("unknown fpi->Opcode %d\n", fpi->Opcode); break; } - if (rp->error) + if (fp->error) return GL_FALSE; } @@ -2065,8 +1994,8 @@ static void insert_wpos(struct gl_program *prog) /* should do something else if no temps left... */ prog->NumTemporaries++; - fpi = _mesa_alloc_instructions (prog->NumInstructions + 3); - _mesa_init_instructions (fpi, prog->NumInstructions + 3); + fpi = _mesa_alloc_instructions(prog->NumInstructions + 3); + _mesa_init_instructions(fpi, prog->NumInstructions + 3); /* perspective divide */ fpi[i].Opcode = OPCODE_RCP; @@ -2109,66 +2038,71 @@ static void insert_wpos(struct gl_program *prog) fpi[i].SrcReg[0].File = PROGRAM_TEMPORARY; fpi[i].SrcReg[0].Index = tempregi; - fpi[i].SrcReg[0].Swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ZERO); + fpi[i].SrcReg[0].Swizzle = + MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ZERO); fpi[i].SrcReg[1].File = PROGRAM_STATE_VAR; fpi[i].SrcReg[1].Index = window_index; - fpi[i].SrcReg[1].Swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ZERO); + fpi[i].SrcReg[1].Swizzle = + MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ZERO); fpi[i].SrcReg[2].File = PROGRAM_STATE_VAR; fpi[i].SrcReg[2].Index = window_index; - fpi[i].SrcReg[2].Swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ZERO); + fpi[i].SrcReg[2].Swizzle = + MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ZERO); i++; - _mesa_copy_instructions (&fpi[i], prog->Instructions, prog->NumInstructions); + _mesa_copy_instructions(&fpi[i], prog->Instructions, + prog->NumInstructions); free(prog->Instructions); prog->Instructions = fpi; prog->NumInstructions += i; - fpi = &prog->Instructions[prog->NumInstructions-1]; + fpi = &prog->Instructions[prog->NumInstructions - 1]; assert(fpi->Opcode == OPCODE_END); - for(fpi = &prog->Instructions[3]; fpi->Opcode != OPCODE_END; fpi++){ - for(i=0; i<3; i++) - if( fpi->SrcReg[i].File == PROGRAM_INPUT && - fpi->SrcReg[i].Index == FRAG_ATTRIB_WPOS ){ - fpi->SrcReg[i].File = PROGRAM_TEMPORARY; - fpi->SrcReg[i].Index = tempregi; - } + for (fpi = &prog->Instructions[3]; fpi->Opcode != OPCODE_END; fpi++) { + for (i = 0; i < 3; i++) + if (fpi->SrcReg[i].File == PROGRAM_INPUT && + fpi->SrcReg[i].Index == FRAG_ATTRIB_WPOS) { + fpi->SrcReg[i].File = PROGRAM_TEMPORARY; + fpi->SrcReg[i].Index = tempregi; + } } } /* - Init structures * - Determine what hwregs each input corresponds to */ -static void init_program(r300ContextPtr r300, struct r300_fragment_program *rp) +static void init_program(r300ContextPtr r300, struct r300_fragment_program *fp) { struct r300_pfs_compile_state *cs = NULL; - struct gl_fragment_program *mp = &rp->mesa_program; + struct gl_fragment_program *mp = &fp->mesa_program; struct prog_instruction *fpi; GLuint InputsRead = mp->Base.InputsRead; - GLuint temps_used = 0; /* for rp->temps[] */ - int i,j; + GLuint temps_used = 0; /* for fp->temps[] */ + int i, j; /* New compile, reset tracking data */ - rp->optimization = driQueryOptioni(&r300->radeon.optionCache, "fp_optimization"); - rp->translated = GL_FALSE; - rp->error = GL_FALSE; - rp->cs = cs = &(R300_CONTEXT(rp->ctx)->state.pfs_compile); - rp->tex.length = 0; - rp->cur_node = 0; - rp->first_node_has_tex = 0; - rp->const_nr = 0; - rp->max_temp_idx = 0; - rp->node[0].alu_end = -1; - rp->node[0].tex_end = -1; - - _mesa_memset(cs, 0, sizeof(*rp->cs)); - for (i=0;i<PFS_MAX_ALU_INST;i++) { - for (j=0;j<3;j++) { + fp->optimization = + driQueryOptioni(&r300->radeon.optionCache, "fp_optimization"); + fp->translated = GL_FALSE; + fp->error = GL_FALSE; + fp->cs = cs = &(R300_CONTEXT(fp->ctx)->state.pfs_compile); + fp->tex.length = 0; + fp->cur_node = 0; + fp->first_node_has_tex = 0; + fp->const_nr = 0; + fp->max_temp_idx = 0; + fp->node[0].alu_end = -1; + fp->node[0].tex_end = -1; + + _mesa_memset(cs, 0, sizeof(*fp->cs)); + for (i = 0; i < PFS_MAX_ALU_INST; i++) { + for (j = 0; j < 3; j++) { cs->slot[i].vsrc[j] = SRC_CONST; cs->slot[i].ssrc[j] = SRC_CONST; } @@ -2183,10 +2117,11 @@ static void init_program(r300ContextPtr r300, struct r300_fragment_program *rp) */ /* Texcoords come first */ - for (i=0;i<rp->ctx->Const.MaxTextureUnits;i++) { + for (i = 0; i < fp->ctx->Const.MaxTextureUnits; i++) { if (InputsRead & (FRAG_BIT_TEX0 << i)) { - cs->inputs[FRAG_ATTRIB_TEX0+i].refcount = 0; - cs->inputs[FRAG_ATTRIB_TEX0+i].reg = get_hw_temp(rp, 0); + cs->inputs[FRAG_ATTRIB_TEX0 + i].refcount = 0; + cs->inputs[FRAG_ATTRIB_TEX0 + i].reg = + get_hw_temp(fp, 0); } } InputsRead &= ~FRAG_BITS_TEX_ANY; @@ -2194,7 +2129,7 @@ static void init_program(r300ContextPtr r300, struct r300_fragment_program *rp) /* fragment position treated as a texcoord */ if (InputsRead & FRAG_BIT_WPOS) { cs->inputs[FRAG_ATTRIB_WPOS].refcount = 0; - cs->inputs[FRAG_ATTRIB_WPOS].reg = get_hw_temp(rp, 0); + cs->inputs[FRAG_ATTRIB_WPOS].reg = get_hw_temp(fp, 0); insert_wpos(&mp->Base); } InputsRead &= ~FRAG_BIT_WPOS; @@ -2202,24 +2137,24 @@ static void init_program(r300ContextPtr r300, struct r300_fragment_program *rp) /* Then primary colour */ if (InputsRead & FRAG_BIT_COL0) { cs->inputs[FRAG_ATTRIB_COL0].refcount = 0; - cs->inputs[FRAG_ATTRIB_COL0].reg = get_hw_temp(rp, 0); + cs->inputs[FRAG_ATTRIB_COL0].reg = get_hw_temp(fp, 0); } InputsRead &= ~FRAG_BIT_COL0; /* Secondary color */ if (InputsRead & FRAG_BIT_COL1) { cs->inputs[FRAG_ATTRIB_COL1].refcount = 0; - cs->inputs[FRAG_ATTRIB_COL1].reg = get_hw_temp(rp, 0); + cs->inputs[FRAG_ATTRIB_COL1].reg = get_hw_temp(fp, 0); } InputsRead &= ~FRAG_BIT_COL1; /* Anything else */ if (InputsRead) { - WARN_ONCE("Don't know how to handle inputs 0x%x\n", - InputsRead); + WARN_ONCE("Don't know how to handle inputs 0x%x\n", InputsRead); /* force read from hwreg 0 for now */ - for (i=0;i<32;i++) - if (InputsRead & (1<<i)) cs->inputs[i].reg = 0; + for (i = 0; i < 32; i++) + if (InputsRead & (1 << i)) + cs->inputs[i].reg = 0; } /* Pre-parse the mesa program, grabbing refcounts on input/temp regs. @@ -2230,14 +2165,14 @@ static void init_program(r300ContextPtr r300, struct r300_fragment_program *rp) return; } - for (fpi=mp->Base.Instructions;fpi->Opcode != OPCODE_END; fpi++) { + for (fpi = mp->Base.Instructions; fpi->Opcode != OPCODE_END; fpi++) { int idx; - for (i=0;i<3;i++) { + for (i = 0; i < 3; i++) { idx = fpi->SrcReg[i].Index; switch (fpi->SrcReg[i].File) { case PROGRAM_TEMPORARY: - if (!(temps_used & (1<<idx))) { + if (!(temps_used & (1 << idx))) { cs->temps[idx].reg = -1; cs->temps[idx].refcount = 1; temps_used |= (1 << idx); @@ -2247,13 +2182,14 @@ static void init_program(r300ContextPtr r300, struct r300_fragment_program *rp) case PROGRAM_INPUT: cs->inputs[idx].refcount++; break; - default: break; + default: + break; } } idx = fpi->DstReg.Index; if (fpi->DstReg.File == PROGRAM_TEMPORARY) { - if (!(temps_used & (1<<idx))) { + if (!(temps_used & (1 << idx))) { cs->temps[idx].reg = -1; cs->temps[idx].refcount = 1; temps_used |= (1 << idx); @@ -2264,51 +2200,53 @@ static void init_program(r300ContextPtr r300, struct r300_fragment_program *rp) cs->temp_in_use = temps_used; } -static void update_params(struct r300_fragment_program *rp) +static void update_params(struct r300_fragment_program *fp) { - struct gl_fragment_program *mp = &rp->mesa_program; + struct gl_fragment_program *mp = &fp->mesa_program; /* Ask Mesa nicely to fill in ParameterValues for us */ if (mp->Base.Parameters) - _mesa_load_state_parameters(rp->ctx, mp->Base.Parameters); + _mesa_load_state_parameters(fp->ctx, mp->Base.Parameters); } -void r300_translate_fragment_shader(r300ContextPtr r300, struct r300_fragment_program *rp) +void r300TranslateFragmentShader(r300ContextPtr r300, + struct r300_fragment_program *fp) { struct r300_pfs_compile_state *cs = NULL; - if (!rp->translated) { + if (!fp->translated) { - init_program(r300, rp); - cs = rp->cs; + init_program(r300, fp); + cs = fp->cs; - if (parse_program(rp) == GL_FALSE) { - dump_program(rp); + if (parse_program(fp) == GL_FALSE) { + dump_program(fp); return; } /* Finish off */ - rp->node[rp->cur_node].alu_end = - cs->nrslots - rp->node[rp->cur_node].alu_offset - 1; - if (rp->node[rp->cur_node].tex_end < 0) - rp->node[rp->cur_node].tex_end = 0; - rp->alu_offset = 0; - rp->alu_end = cs->nrslots - 1; - rp->tex_offset = 0; - rp->tex_end = rp->tex.length ? rp->tex.length - 1 : 0; - assert(rp->node[rp->cur_node].alu_end >= 0); - assert(rp->alu_end >= 0); - - rp->translated = GL_TRUE; - if (RADEON_DEBUG & DEBUG_PIXEL) dump_program(rp); - r300UpdateStateParameters(rp->ctx, _NEW_PROGRAM); + fp->node[fp->cur_node].alu_end = + cs->nrslots - fp->node[fp->cur_node].alu_offset - 1; + if (fp->node[fp->cur_node].tex_end < 0) + fp->node[fp->cur_node].tex_end = 0; + fp->alu_offset = 0; + fp->alu_end = cs->nrslots - 1; + fp->tex_offset = 0; + fp->tex_end = fp->tex.length ? fp->tex.length - 1 : 0; + assert(fp->node[fp->cur_node].alu_end >= 0); + assert(fp->alu_end >= 0); + + fp->translated = GL_TRUE; + if (RADEON_DEBUG & DEBUG_PIXEL) + dump_program(fp); + r300UpdateStateParameters(fp->ctx, _NEW_PROGRAM); } - update_params(rp); + update_params(fp); } /* just some random things... */ -static void dump_program(struct r300_fragment_program *rp) +static void dump_program(struct r300_fragment_program *fp) { int n, i, j; static int pc = 0; @@ -2317,26 +2255,29 @@ static void dump_program(struct r300_fragment_program *rp) fprintf(stderr, "Mesa program:\n"); fprintf(stderr, "-------------\n"); - _mesa_print_program(&rp->mesa_program.Base); + _mesa_print_program(&fp->mesa_program.Base); fflush(stdout); fprintf(stderr, "Hardware program\n"); fprintf(stderr, "----------------\n"); - for (n = 0; n < (rp->cur_node+1); n++) { - fprintf(stderr, "NODE %d: alu_offset: %d, tex_offset: %d, "\ + for (n = 0; n < (fp->cur_node + 1); n++) { + fprintf(stderr, "NODE %d: alu_offset: %d, tex_offset: %d, " "alu_end: %d, tex_end: %d\n", n, - rp->node[n].alu_offset, - rp->node[n].tex_offset, - rp->node[n].alu_end, - rp->node[n].tex_end); + fp->node[n].alu_offset, + fp->node[n].tex_offset, + fp->node[n].alu_end, fp->node[n].tex_end); - if (rp->tex.length) { + if (fp->tex.length) { fprintf(stderr, " TEX:\n"); - for(i = rp->node[n].tex_offset; i <= rp->node[n].tex_offset+rp->node[n].tex_end; ++i) { - const char* instr; - - switch((rp->tex.inst[i] >> R300_FPITX_OPCODE_SHIFT) & 15) { + for (i = fp->node[n].tex_offset; + i <= fp->node[n].tex_offset + fp->node[n].tex_end; + ++i) { + const char *instr; + + switch ((fp->tex. + inst[i] >> R300_FPITX_OPCODE_SHIFT) & + 15) { case R300_FPITX_OP_TEX: instr = "TEX"; break; @@ -2353,94 +2294,121 @@ static void dump_program(struct r300_fragment_program *rp) instr = "UNKNOWN"; } - fprintf(stderr, " %s t%i, %c%i, texture[%i] (%08x)\n", - instr, - (rp->tex.inst[i] >> R300_FPITX_DST_SHIFT) & 31, - (rp->tex.inst[i] & R300_FPITX_SRC_CONST) ? 'c': 't', - (rp->tex.inst[i] >> R300_FPITX_SRC_SHIFT) & 31, - (rp->tex.inst[i] & R300_FPITX_IMAGE_MASK) >> R300_FPITX_IMAGE_SHIFT, - rp->tex.inst[i]); + fprintf(stderr, + " %s t%i, %c%i, texture[%i] (%08x)\n", + instr, + (fp->tex. + inst[i] >> R300_FPITX_DST_SHIFT) & 31, + (fp->tex. + inst[i] & R300_FPITX_SRC_CONST) ? 'c' : + 't', + (fp->tex. + inst[i] >> R300_FPITX_SRC_SHIFT) & 31, + (fp->tex. + inst[i] & R300_FPITX_IMAGE_MASK) >> + R300_FPITX_IMAGE_SHIFT, + fp->tex.inst[i]); } } - for(i = rp->node[n].alu_offset; i <= rp->node[n].alu_offset+rp->node[n].alu_end; ++i) { + for (i = fp->node[n].alu_offset; + i <= fp->node[n].alu_offset + fp->node[n].alu_end; ++i) { char srcc[3][10], dstc[20]; char srca[3][10], dsta[20]; char argc[3][20]; char arga[3][20]; char flags[5], tmp[10]; - for(j = 0; j < 3; ++j) { - int regc = rp->alu.inst[i].inst1 >> (j*6); - int rega = rp->alu.inst[i].inst3 >> (j*6); + for (j = 0; j < 3; ++j) { + int regc = fp->alu.inst[i].inst1 >> (j * 6); + int rega = fp->alu.inst[i].inst3 >> (j * 6); - sprintf(srcc[j], "%c%i", (regc & 32) ? 'c' : 't', regc & 31); - sprintf(srca[j], "%c%i", (rega & 32) ? 'c' : 't', rega & 31); + sprintf(srcc[j], "%c%i", + (regc & 32) ? 'c' : 't', regc & 31); + sprintf(srca[j], "%c%i", + (rega & 32) ? 'c' : 't', rega & 31); } dstc[0] = 0; sprintf(flags, "%s%s%s", - (rp->alu.inst[i].inst1 & R300_FPI1_DSTC_REG_X) ? "x" : "", - (rp->alu.inst[i].inst1 & R300_FPI1_DSTC_REG_Y) ? "y" : "", - (rp->alu.inst[i].inst1 & R300_FPI1_DSTC_REG_Z) ? "z" : ""); + (fp->alu.inst[i]. + inst1 & R300_FPI1_DSTC_REG_X) ? "x" : "", + (fp->alu.inst[i]. + inst1 & R300_FPI1_DSTC_REG_Y) ? "y" : "", + (fp->alu.inst[i]. + inst1 & R300_FPI1_DSTC_REG_Z) ? "z" : ""); if (flags[0] != 0) { sprintf(dstc, "t%i.%s ", - (rp->alu.inst[i].inst1 >> R300_FPI1_DSTC_SHIFT) & 31, - flags); + (fp->alu.inst[i]. + inst1 >> R300_FPI1_DSTC_SHIFT) & 31, + flags); } sprintf(flags, "%s%s%s", - (rp->alu.inst[i].inst1 & R300_FPI1_DSTC_OUTPUT_X) ? "x" : "", - (rp->alu.inst[i].inst1 & R300_FPI1_DSTC_OUTPUT_Y) ? "y" : "", - (rp->alu.inst[i].inst1 & R300_FPI1_DSTC_OUTPUT_Z) ? "z" : ""); + (fp->alu.inst[i]. + inst1 & R300_FPI1_DSTC_OUTPUT_X) ? "x" : "", + (fp->alu.inst[i]. + inst1 & R300_FPI1_DSTC_OUTPUT_Y) ? "y" : "", + (fp->alu.inst[i]. + inst1 & R300_FPI1_DSTC_OUTPUT_Z) ? "z" : ""); if (flags[0] != 0) { sprintf(tmp, "o%i.%s", - (rp->alu.inst[i].inst1 >> R300_FPI1_DSTC_SHIFT) & 31, - flags); + (fp->alu.inst[i]. + inst1 >> R300_FPI1_DSTC_SHIFT) & 31, + flags); strcat(dstc, tmp); } dsta[0] = 0; - if (rp->alu.inst[i].inst3 & R300_FPI3_DSTA_REG) { - sprintf(dsta, "t%i.w ", (rp->alu.inst[i].inst3 >> R300_FPI3_DSTA_SHIFT) & 31); + if (fp->alu.inst[i].inst3 & R300_FPI3_DSTA_REG) { + sprintf(dsta, "t%i.w ", + (fp->alu.inst[i]. + inst3 >> R300_FPI3_DSTA_SHIFT) & 31); } - if (rp->alu.inst[i].inst3 & R300_FPI3_DSTA_OUTPUT) { - sprintf(tmp, "o%i.w ", (rp->alu.inst[i].inst3 >> R300_FPI3_DSTA_SHIFT) & 31); + if (fp->alu.inst[i].inst3 & R300_FPI3_DSTA_OUTPUT) { + sprintf(tmp, "o%i.w ", + (fp->alu.inst[i]. + inst3 >> R300_FPI3_DSTA_SHIFT) & 31); strcat(dsta, tmp); } - if (rp->alu.inst[i].inst3 & R300_FPI3_DSTA_DEPTH) { + if (fp->alu.inst[i].inst3 & R300_FPI3_DSTA_DEPTH) { strcat(dsta, "Z"); } - fprintf(stderr, "%3i: xyz: %3s %3s %3s -> %-20s (%08x)\n" - " w: %3s %3s %3s -> %-20s (%08x)\n", - i, - srcc[0], srcc[1], srcc[2], dstc, rp->alu.inst[i].inst1, - srca[0], srca[1], srca[2], dsta, rp->alu.inst[i].inst3); + fprintf(stderr, + "%3i: xyz: %3s %3s %3s -> %-20s (%08x)\n" + " w: %3s %3s %3s -> %-20s (%08x)\n", i, + srcc[0], srcc[1], srcc[2], dstc, + fp->alu.inst[i].inst1, srca[0], srca[1], + srca[2], dsta, fp->alu.inst[i].inst3); - for(j = 0; j < 3; ++j) { - int regc = rp->alu.inst[i].inst0 >> (j*7); - int rega = rp->alu.inst[i].inst2 >> (j*7); + for (j = 0; j < 3; ++j) { + int regc = fp->alu.inst[i].inst0 >> (j * 7); + int rega = fp->alu.inst[i].inst2 >> (j * 7); int d; char buf[20]; d = regc & 31; if (d < 12) { - switch(d % 4) { - case R300_FPI0_ARGC_SRC0C_XYZ: - sprintf(buf, "%s.xyz", srcc[d / 4]); - break; - case R300_FPI0_ARGC_SRC0C_XXX: - sprintf(buf, "%s.xxx", srcc[d / 4]); - break; - case R300_FPI0_ARGC_SRC0C_YYY: - sprintf(buf, "%s.yyy", srcc[d / 4]); - break; - case R300_FPI0_ARGC_SRC0C_ZZZ: - sprintf(buf, "%s.zzz", srcc[d / 4]); - break; + switch (d % 4) { + case R300_FPI0_ARGC_SRC0C_XYZ: + sprintf(buf, "%s.xyz", + srcc[d / 4]); + break; + case R300_FPI0_ARGC_SRC0C_XXX: + sprintf(buf, "%s.xxx", + srcc[d / 4]); + break; + case R300_FPI0_ARGC_SRC0C_YYY: + sprintf(buf, "%s.yyy", + srcc[d / 4]); + break; + case R300_FPI0_ARGC_SRC0C_ZZZ: + sprintf(buf, "%s.zzz", + srcc[d / 4]); + break; } } else if (d < 15) { - sprintf(buf, "%s.www", srca[d-12]); + sprintf(buf, "%s.www", srca[d - 12]); } else if (d == 20) { sprintf(buf, "0.0"); } else if (d == 21) { @@ -2449,32 +2417,35 @@ static void dump_program(struct r300_fragment_program *rp) sprintf(buf, "0.5"); } else if (d >= 23 && d < 32) { d -= 23; - switch(d/3) { - case 0: - sprintf(buf, "%s.yzx", srcc[d % 3]); - break; - case 1: - sprintf(buf, "%s.zxy", srcc[d % 3]); - break; - case 2: - sprintf(buf, "%s.Wzy", srcc[d % 3]); - break; + switch (d / 3) { + case 0: + sprintf(buf, "%s.yzx", + srcc[d % 3]); + break; + case 1: + sprintf(buf, "%s.zxy", + srcc[d % 3]); + break; + case 2: + sprintf(buf, "%s.Wzy", + srcc[d % 3]); + break; } } else { sprintf(buf, "%i", d); } sprintf(argc[j], "%s%s%s%s", - (regc & 32) ? "-" : "", - (regc & 64) ? "|" : "", - buf, - (regc & 64) ? "|" : ""); + (regc & 32) ? "-" : "", + (regc & 64) ? "|" : "", + buf, (regc & 64) ? "|" : ""); d = rega & 31; if (d < 9) { - sprintf(buf, "%s.%c", srcc[d / 3], 'x' + (char)(d%3)); + sprintf(buf, "%s.%c", srcc[d / 3], + 'x' + (char)(d % 3)); } else if (d < 12) { - sprintf(buf, "%s.w", srca[d-9]); + sprintf(buf, "%s.w", srca[d - 9]); } else if (d == 16) { sprintf(buf, "0.0"); } else if (d == 17) { @@ -2486,16 +2457,16 @@ static void dump_program(struct r300_fragment_program *rp) } sprintf(arga[j], "%s%s%s%s", - (rega & 32) ? "-" : "", - (rega & 64) ? "|" : "", - buf, - (rega & 64) ? "|" : ""); + (rega & 32) ? "-" : "", + (rega & 64) ? "|" : "", + buf, (rega & 64) ? "|" : ""); } fprintf(stderr, " xyz: %8s %8s %8s op: %08x\n" - " w: %8s %8s %8s op: %08x\n", - argc[0], argc[1], argc[2], rp->alu.inst[i].inst0, - arga[0], arga[1], arga[2], rp->alu.inst[i].inst2); + " w: %8s %8s %8s op: %08x\n", + argc[0], argc[1], argc[2], + fp->alu.inst[i].inst0, arga[0], arga[1], + arga[2], fp->alu.inst[i].inst2); } } } diff --git a/src/mesa/drivers/dri/r300/r300_fragprog.h b/src/mesa/drivers/dri/r300/r300_fragprog.h index d883aee2d7..72fca77845 100644 --- a/src/mesa/drivers/dri/r300/r300_fragprog.h +++ b/src/mesa/drivers/dri/r300/r300_fragprog.h @@ -41,26 +41,6 @@ #include "r300_context.h" - -#if 0 -/* representation of a register for emit_arith/swizzle */ -typedef struct _pfs_reg_t { - enum { - REG_TYPE_INPUT, - REG_TYPE_OUTPUT, - REG_TYPE_TEMP, - REG_TYPE_CONST - } type:2; - GLuint index:6; - GLuint v_swz:5; - GLuint s_swz:5; - GLuint negate_v:1; - GLuint negate_s:1; - GLuint absolute:1; - GLboolean no_use:1; - GLboolean valid:1; -} pfs_reg_t; -#endif typedef struct r300_fragment_program_swizzle { GLuint length; GLuint src[4]; @@ -118,6 +98,7 @@ typedef struct r300_fragment_program_swizzle { struct r300_fragment_program; -extern void r300_translate_fragment_shader(r300ContextPtr r300, struct r300_fragment_program *rp); +extern void r300TranslateFragmentShader(r300ContextPtr r300, + struct r300_fragment_program *fp); #endif diff --git a/src/mesa/drivers/dri/r300/r300_ioctl.c b/src/mesa/drivers/dri/r300/r300_ioctl.c index 11e2d42e49..90f5027c9a 100644 --- a/src/mesa/drivers/dri/r300/r300_ioctl.c +++ b/src/mesa/drivers/dri/r300/r300_ioctl.c @@ -29,10 +29,12 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ -/* - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - * Nicolai Haehnle <prefect_@gmx.net> +/** + * \file + * + * \author Keith Whitwell <keith@tungstengraphics.com> + * + * \author Nicolai Haehnle <prefect_@gmx.net> */ #include <sched.h> @@ -61,14 +63,14 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. static void r300ClearBuffer(r300ContextPtr r300, int flags, int buffer) { - GLcontext* ctx = r300->radeon.glCtx; + GLcontext *ctx = r300->radeon.glCtx; __DRIdrawablePrivate *dPriv = r300->radeon.dri.drawable; GLuint cboffset, cbpitch; - drm_r300_cmd_header_t* cmd2; + drm_r300_cmd_header_t *cmd2; int cmd_reserved = 0; int cmd_written = 0; drm_radeon_cmd_header_t *cmd = NULL; - r300ContextPtr rmesa=r300; + r300ContextPtr rmesa = r300; if (RADEON_DEBUG & DEBUG_IOCTL) fprintf(stderr, "%s: %s buffer (%i,%i %ix%i)\n", @@ -87,69 +89,78 @@ static void r300ClearBuffer(r300ContextPtr r300, int flags, int buffer) cp_wait(r300, R300_WAIT_3D | R300_WAIT_3D_CLEAN); end_3d(rmesa); - + R300_STATECHANGE(r300, cb); reg_start(R300_RB3D_COLOROFFSET0, 0); e32(cboffset); - + if (r300->radeon.radeonScreen->cpp == 4) cbpitch |= R300_COLOR_FORMAT_ARGB8888; else cbpitch |= R300_COLOR_FORMAT_RGB565; - + if (r300->radeon.sarea->tiling_enabled) cbpitch |= R300_COLOR_TILE_ENABLE; - + reg_start(R300_RB3D_COLORPITCH0, 0); e32(cbpitch); R300_STATECHANGE(r300, cmk); reg_start(R300_RB3D_COLORMASK, 0); - + if (flags & CLEARBUFFER_COLOR) { e32((ctx->Color.ColorMask[BCOMP] ? R300_COLORMASK0_B : 0) | - (ctx->Color.ColorMask[GCOMP] ? R300_COLORMASK0_G : 0) | - (ctx->Color.ColorMask[RCOMP] ? R300_COLORMASK0_R : 0) | - (ctx->Color.ColorMask[ACOMP] ? R300_COLORMASK0_A : 0)); + (ctx->Color.ColorMask[GCOMP] ? R300_COLORMASK0_G : 0) | + (ctx->Color.ColorMask[RCOMP] ? R300_COLORMASK0_R : 0) | + (ctx->Color.ColorMask[ACOMP] ? R300_COLORMASK0_A : 0)); } else { - e32(0); + e32(0x0); } - + R300_STATECHANGE(r300, zs); reg_start(R300_RB3D_ZSTENCIL_CNTL_0, 2); - + { - uint32_t t1, t2; - - t1 = 0x0; - t2 = 0x0; - - if (flags & CLEARBUFFER_DEPTH) { - t1 |= R300_RB3D_Z_WRITE_ONLY; - t2 |= (R300_ZS_ALWAYS << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT); - } else { - t1 |= R300_RB3D_Z_DISABLED_1; // disable - } - - if (flags & CLEARBUFFER_STENCIL) { - t1 |= R300_RB3D_STENCIL_ENABLE; - t2 |= - (R300_ZS_ALWAYS<<R300_RB3D_ZS1_FRONT_FUNC_SHIFT) | - (R300_ZS_REPLACE<<R300_RB3D_ZS1_FRONT_FAIL_OP_SHIFT) | - (R300_ZS_REPLACE<<R300_RB3D_ZS1_FRONT_ZPASS_OP_SHIFT) | - (R300_ZS_REPLACE<<R300_RB3D_ZS1_FRONT_ZFAIL_OP_SHIFT) | - (R300_ZS_ALWAYS<<R300_RB3D_ZS1_BACK_FUNC_SHIFT) | - (R300_ZS_REPLACE<<R300_RB3D_ZS1_BACK_FAIL_OP_SHIFT) | - (R300_ZS_REPLACE<<R300_RB3D_ZS1_BACK_ZPASS_OP_SHIFT) | - (R300_ZS_REPLACE<<R300_RB3D_ZS1_BACK_ZFAIL_OP_SHIFT) ; - } - - e32(t1); - e32(t2); - e32(r300->state.stencil.clear); + uint32_t t1, t2; + + t1 = 0x0; + t2 = 0x0; + + if (flags & CLEARBUFFER_DEPTH) { + t1 |= R300_RB3D_Z_WRITE_ONLY; + t2 |= + (R300_ZS_ALWAYS << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT); + } else { + t1 |= R300_RB3D_Z_DISABLED_1; // disable + } + + if (flags & CLEARBUFFER_STENCIL) { + t1 |= R300_RB3D_STENCIL_ENABLE; + t2 |= + (R300_ZS_ALWAYS << + R300_RB3D_ZS1_FRONT_FUNC_SHIFT) | + (R300_ZS_REPLACE << + R300_RB3D_ZS1_FRONT_FAIL_OP_SHIFT) | + (R300_ZS_REPLACE << + R300_RB3D_ZS1_FRONT_ZPASS_OP_SHIFT) | + (R300_ZS_REPLACE << + R300_RB3D_ZS1_FRONT_ZFAIL_OP_SHIFT) | + (R300_ZS_ALWAYS << + R300_RB3D_ZS1_BACK_FUNC_SHIFT) | + (R300_ZS_REPLACE << + R300_RB3D_ZS1_BACK_FAIL_OP_SHIFT) | + (R300_ZS_REPLACE << + R300_RB3D_ZS1_BACK_ZPASS_OP_SHIFT) | + (R300_ZS_REPLACE << + R300_RB3D_ZS1_BACK_ZFAIL_OP_SHIFT); + } + + e32(t1); + e32(t2); + e32(r300->state.stencil.clear); } - - cmd2 = (drm_r300_cmd_header_t*)r300AllocCmdBuf(r300, 9, __FUNCTION__); + + cmd2 = (drm_r300_cmd_header_t *) r300AllocCmdBuf(r300, 9, __FUNCTION__); cmd2[0].packet3.cmd_type = R300_CMD_PACKET3; cmd2[0].packet3.packet = R300_CMD_PACKET3_CLEAR; cmd2[1].u = r300PackFloat32(dPriv->w / 2.0); @@ -161,54 +172,76 @@ static void r300ClearBuffer(r300ContextPtr r300, int flags, int buffer) cmd2[7].u = r300PackFloat32(ctx->Color.ClearColor[2]); cmd2[8].u = r300PackFloat32(ctx->Color.ClearColor[3]); - reg_start(R300_RB3D_DSTCACHE_CTLSTAT,0); - e32(R300_RB3D_DSTCACHE_UNKNOWN_0A); - - - reg_start(R300_RB3D_ZCACHE_CTLSTAT,0); - e32(R300_RB3D_ZCACHE_UNKNOWN_03); + r300EmitCacheFlush(rmesa); cp_wait(rmesa, R300_WAIT_3D | R300_WAIT_3D_CLEAN); } static void r300EmitClearState(GLcontext * ctx) { r300ContextPtr r300 = R300_CONTEXT(ctx); - r300ContextPtr rmesa=r300; + r300ContextPtr rmesa = r300; __DRIdrawablePrivate *dPriv = r300->radeon.dri.drawable; int i; int cmd_reserved = 0; int cmd_written = 0; drm_radeon_cmd_header_t *cmd = NULL; - - + int has_tcl = 1; + + if (!(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) + has_tcl = 0; + + /* FIXME: the values written to R300_VAP_INPUT_ROUTE_0_0 and + * R300_VAP_INPUT_ROUTE_0_1 are in fact known, however, the values are + * quite complex; see the functions in r300_emit.c. + * + * I believe it would be a good idea to extend the functions in + * r300_emit.c so that they can be used to setup the default values for + * these registers, as well as the actual values used for rendering. + */ R300_STATECHANGE(r300, vir[0]); reg_start(R300_VAP_INPUT_ROUTE_0_0, 0); - e32(0x21030003); - + if (!has_tcl) + e32(0x22030003); + else + e32(0x21030003); + /* disable fog */ R300_STATECHANGE(r300, fogs); reg_start(R300_RE_FOG_STATE, 0); e32(0x0); - + R300_STATECHANGE(r300, vir[1]); reg_start(R300_VAP_INPUT_ROUTE_1_0, 0); e32(0xF688F688); + /* R300_VAP_INPUT_CNTL_0, R300_VAP_INPUT_CNTL_1 */ R300_STATECHANGE(r300, vic); reg_start(R300_VAP_INPUT_CNTL_0, 1); - e32(0x00000001); - e32(0x00000405); - + e32(R300_INPUT_CNTL_0_COLOR); + e32(R300_INPUT_CNTL_POS | R300_INPUT_CNTL_COLOR | R300_INPUT_CNTL_TC0); + + R300_STATECHANGE(r300, vte); + /* comes from fglrx startup of clear */ + reg_start(R300_SE_VTE_CNTL, 1); + e32(R300_VTX_W0_FMT | R300_VPORT_X_SCALE_ENA | + R300_VPORT_X_OFFSET_ENA | R300_VPORT_Y_SCALE_ENA | + R300_VPORT_Y_OFFSET_ENA | R300_VPORT_Z_SCALE_ENA | + R300_VPORT_Z_OFFSET_ENA); + e32(0x8); + + reg_start(0x21dc, 0); + e32(0xaaaaaaaa); + R300_STATECHANGE(r300, vof); reg_start(R300_VAP_OUTPUT_VTX_FMT_0, 1); - e32(R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT | R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT); - e32(0); /* no textures */ - - + e32(R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT | + R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT); + e32(0x0); /* no textures */ + R300_STATECHANGE(r300, txe); reg_start(R300_TX_ENABLE, 0); - e32(0); - + e32(0x0); + R300_STATECHANGE(r300, vpt); reg_start(R300_SE_VPORT_XSCALE, 5); efloat(1.0); @@ -217,28 +250,28 @@ static void r300EmitClearState(GLcontext * ctx) efloat(dPriv->y); efloat(1.0); efloat(0.0); - + R300_STATECHANGE(r300, at); reg_start(R300_PP_ALPHA_TEST, 0); - e32(0); - + e32(0x0); + R300_STATECHANGE(r300, bld); reg_start(R300_RB3D_CBLEND, 1); - e32(0); - e32(0); - + e32(0x0); + e32(0x0); + R300_STATECHANGE(r300, unk221C); reg_start(R300_VAP_UNKNOWN_221C, 0); e32(R300_221C_CLEAR); - + R300_STATECHANGE(r300, ps); reg_start(R300_RE_POINTSIZE, 0); e32(((dPriv->w * 6) << R300_POINTSIZE_X_SHIFT) | - ((dPriv->h * 6) << R300_POINTSIZE_Y_SHIFT)); - + ((dPriv->h * 6) << R300_POINTSIZE_Y_SHIFT)); + R300_STATECHANGE(r300, ri); reg_start(R300_RS_INTERP_0, 8); - for(i = 0; i < 8; ++i){ + for (i = 0; i < 8; ++i) { e32(R300_RS_INTERP_USED); } @@ -246,62 +279,61 @@ static void r300EmitClearState(GLcontext * ctx) /* The second constant is needed to get glxgears display anything .. */ reg_start(R300_RS_CNTL_0, 1); e32((1 << R300_RS_CNTL_CI_CNT_SHIFT) | R300_RS_CNTL_0_UNKNOWN_18); - e32(0); - + e32(0x0); + R300_STATECHANGE(r300, rr); reg_start(R300_RS_ROUTE_0, 0); - e32(0x00004000); - + e32(R300_RS_ROUTE_0_COLOR); + R300_STATECHANGE(r300, fp); reg_start(R300_PFS_CNTL_0, 2); - e32(0); - e32(0); - e32(0); + e32(0x0); + e32(0x0); + e32(0x0); reg_start(R300_PFS_NODE_0, 3); - e32(0); - e32(0); - e32(0); + e32(0x0); + e32(0x0); + e32(0x0); e32(R300_PFS_NODE_OUTPUT_COLOR); - + R300_STATECHANGE(r300, fpi[0]); R300_STATECHANGE(r300, fpi[1]); R300_STATECHANGE(r300, fpi[2]); R300_STATECHANGE(r300, fpi[3]); - + reg_start(R300_PFS_INSTR0_0, 0); e32(FP_INSTRC(MAD, FP_ARGC(SRC0C_XYZ), FP_ARGC(ONE), FP_ARGC(ZERO))); - + reg_start(R300_PFS_INSTR1_0, 0); - e32(FP_SELC(0,NO,XYZ,FP_TMP(0),0,0)); - + e32(FP_SELC(0, NO, XYZ, FP_TMP(0), 0, 0)); + reg_start(R300_PFS_INSTR2_0, 0); e32(FP_INSTRA(MAD, FP_ARGA(SRC0A), FP_ARGA(ONE), FP_ARGA(ZERO))); - + reg_start(R300_PFS_INSTR3_0, 0); - e32(FP_SELA(0,NO,W,FP_TMP(0),0,0)); - - R300_STATECHANGE(r300, pvs); - reg_start(R300_VAP_PVS_CNTL_1, 2); - e32((0 << R300_PVS_CNTL_1_PROGRAM_START_SHIFT) | - (0 << R300_PVS_CNTL_1_POS_END_SHIFT) | - (1 << R300_PVS_CNTL_1_PROGRAM_END_SHIFT)); - e32(0); - e32(1 << R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT); - - R300_STATECHANGE(r300, vpi); - vsf_start_fragment(0x0, 8); - e32(VP_OUT(ADD,OUT,0,XYZW)); - e32(VP_IN(IN,0)); - e32(VP_ZERO()); - e32(0); - - e32(VP_OUT(ADD,OUT,1,XYZW)); - e32(VP_IN(IN,1)); - e32(VP_ZERO()); - e32(0); - - /*reg_start(0x4500,0); - e32(2560-1);*/ + e32(FP_SELA(0, NO, W, FP_TMP(0), 0, 0)); + + if (has_tcl) { + R300_STATECHANGE(r300, pvs); + reg_start(R300_VAP_PVS_CNTL_1, 2); + e32((0 << R300_PVS_CNTL_1_PROGRAM_START_SHIFT) | + (0 << R300_PVS_CNTL_1_POS_END_SHIFT) | + (1 << R300_PVS_CNTL_1_PROGRAM_END_SHIFT)); + e32(0x0); + e32(1 << R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT); + + R300_STATECHANGE(r300, vpi); + vsf_start_fragment(0x0, 8); + e32(VP_OUT(ADD, OUT, 0, XYZW)); + e32(VP_IN(IN, 0)); + e32(VP_ZERO()); + e32(0x0); + + e32(VP_OUT(ADD, OUT, 1, XYZW)); + e32(VP_IN(IN, 1)); + e32(VP_ZERO()); + e32(0x0); + } } /** @@ -339,8 +371,8 @@ static void r300Clear(GLcontext * ctx, GLbitfield mask) bits |= CLEARBUFFER_DEPTH; mask &= ~BUFFER_BIT_DEPTH; } - - if ( (mask & BUFFER_BIT_STENCIL) && r300->state.stencil.hw_stencil) { + + if ((mask & BUFFER_BIT_STENCIL) && r300->state.stencil.hw_stencil) { bits |= CLEARBUFFER_STENCIL; mask &= ~BUFFER_BIT_STENCIL; } @@ -352,11 +384,11 @@ static void r300Clear(GLcontext * ctx, GLbitfield mask) _swrast_Clear(ctx, mask); } - swapped = r300->radeon.doPageFlip && (r300->radeon.sarea->pfCurrentPage == 1); + swapped = r300->radeon.sarea->pfCurrentPage == 1; /* Make sure it fits there. */ - r300EnsureCmdBufSpace(r300, 421*3, __FUNCTION__); - if(flags || bits) + r300EnsureCmdBufSpace(r300, 421 * 3, __FUNCTION__); + if (flags || bits) r300EmitClearState(ctx); if (flags & BUFFER_BIT_FRONT_LEFT) { @@ -374,26 +406,28 @@ static void r300Clear(GLcontext * ctx, GLbitfield mask) } - void r300Flush(GLcontext * ctx) { - r300ContextPtr r300 = R300_CONTEXT(ctx); + r300ContextPtr rmesa = R300_CONTEXT(ctx); if (RADEON_DEBUG & DEBUG_IOCTL) fprintf(stderr, "%s\n", __FUNCTION__); - if (r300->cmdbuf.count_used > r300->cmdbuf.count_reemit) - r300FlushCmdBuf(r300, __FUNCTION__); + if (rmesa->dma.flush) + rmesa->dma.flush( rmesa ); + + if (rmesa->cmdbuf.count_used > rmesa->cmdbuf.count_reemit) + r300FlushCmdBuf(rmesa, __FUNCTION__); } #ifdef USER_BUFFERS -#include "radeon_mm.h" +#include "r300_mem.h" -static void r300RefillCurrentDmaRegion(r300ContextPtr rmesa, int size) +void r300RefillCurrentDmaRegion(r300ContextPtr rmesa, int size) { struct r300_dma_buffer *dmabuf; - size = MAX2(size, RADEON_BUFFER_SIZE*16); - + size = MAX2(size, RADEON_BUFFER_SIZE * 16); + if (RADEON_DEBUG & (DEBUG_IOCTL | DEBUG_DMA)) fprintf(stderr, "%s\n", __FUNCTION__); @@ -401,42 +435,39 @@ static void r300RefillCurrentDmaRegion(r300ContextPtr rmesa, int size) rmesa->dma.flush(rmesa); } - if (rmesa->dma.current.buf) + if (rmesa->dma.current.buf) { +#ifdef USER_BUFFERS + r300_mem_use(rmesa, rmesa->dma.current.buf->id); +#endif r300ReleaseDmaRegion(rmesa, &rmesa->dma.current, __FUNCTION__); - + } if (rmesa->dma.nr_released_bufs > 4) r300FlushCmdBuf(rmesa, __FUNCTION__); - + dmabuf = CALLOC_STRUCT(r300_dma_buffer); - dmabuf->buf = (void *)1; /* hack */ + dmabuf->buf = (void *)1; /* hack */ dmabuf->refcount = 1; - dmabuf->id = radeon_mm_alloc(rmesa, 4, size); + dmabuf->id = r300_mem_alloc(rmesa, 4, size); if (dmabuf->id == 0) { LOCK_HARDWARE(&rmesa->radeon); /* no need to validate */ - + r300FlushCmdBufLocked(rmesa, __FUNCTION__); radeonWaitForIdleLocked(&rmesa->radeon); - - dmabuf->id = radeon_mm_alloc(rmesa, 4, size); -#ifdef HW_VBOS - if (dmabuf->id == 0) { - /* Just kick all */ - r300_evict_vbos(rmesa->radeon.glCtx, /*RADEON_BUFFER_SIZE*16*/1<<30); - dmabuf->id = radeon_mm_alloc(rmesa, 4, size); - } -#endif + dmabuf->id = r300_mem_alloc(rmesa, 4, size); + UNLOCK_HARDWARE(&rmesa->radeon); - + if (dmabuf->id == 0) { - fprintf(stderr, "Error: Could not get dma buffer... exiting\n"); - exit(-1); + fprintf(stderr, + "Error: Could not get dma buffer... exiting\n"); + _mesa_exit(-1); } } - + rmesa->dma.current.buf = dmabuf; - rmesa->dma.current.address = radeon_mm_ptr(rmesa, dmabuf->id); + rmesa->dma.current.address = r300_mem_ptr(rmesa, dmabuf->id); rmesa->dma.current.end = size; rmesa->dma.current.start = 0; rmesa->dma.current.ptr = 0; @@ -455,7 +486,7 @@ void r300ReleaseDmaRegion(r300ContextPtr rmesa, rmesa->dma.flush(rmesa); if (--region->buf->refcount == 0) { - radeon_mm_free(rmesa, region->buf->id); + r300_mem_free(rmesa, region->buf->id); FREE(region->buf); rmesa->dma.nr_released_bufs++; } @@ -485,8 +516,7 @@ void r300AllocDmaRegion(r300ContextPtr rmesa, (rmesa->dma.current.ptr + alignment) & ~alignment; if (rmesa->dma.current.ptr + bytes > rmesa->dma.current.end) - r300RefillCurrentDmaRegion(rmesa, - (bytes + 0x7) & ~0x7); + r300RefillCurrentDmaRegion(rmesa, (bytes + 0x7) & ~0x7); region->start = rmesa->dma.current.start; region->ptr = rmesa->dma.current.start; @@ -511,7 +541,7 @@ static void r300RefillCurrentDmaRegion(r300ContextPtr rmesa) int size = 0; drmDMAReq dma; int ret; - + if (RADEON_DEBUG & (DEBUG_IOCTL | DEBUG_DMA)) fprintf(stderr, "%s\n", __FUNCTION__); @@ -554,8 +584,9 @@ static void r300RefillCurrentDmaRegion(r300ContextPtr rmesa) if (ret != 0) { UNLOCK_HARDWARE(&rmesa->radeon); - fprintf(stderr, "Error: Could not get dma buffer... exiting\n"); - exit(-1); + fprintf(stderr, + "Error: Could not get dma buffer... exiting\n"); + _mesa_exit(-1); } } @@ -591,15 +622,16 @@ void r300ReleaseDmaRegion(r300ContextPtr rmesa, drm_radeon_cmd_header_t *cmd; if (RADEON_DEBUG & (DEBUG_IOCTL | DEBUG_DMA)) - fprintf(stderr, "%s -- DISCARD BUF %d\n", __FUNCTION__, - region->buf->buf->idx); + fprintf(stderr, "%s -- DISCARD BUF %d\n", + __FUNCTION__, region->buf->buf->idx); cmd = (drm_radeon_cmd_header_t *) r300AllocCmdBuf(rmesa, - sizeof(*cmd) / 4, + sizeof + (*cmd) / 4, __FUNCTION__); cmd->dma.cmd_type = R300_CMD_DMA_DISCARD; cmd->dma.buf_idx = region->buf->buf->idx; - + FREE(region->buf); rmesa->dma.nr_released_bufs++; } @@ -647,34 +679,15 @@ void r300AllocDmaRegion(r300ContextPtr rmesa, #endif -/* Called via glXGetMemoryOffsetMESA() */ -GLuint r300GetMemoryOffsetMESA(__DRInativeDisplay * dpy, int scrn, - const GLvoid * pointer) -{ - GET_CURRENT_CONTEXT(ctx); - r300ContextPtr rmesa; - GLuint card_offset; - - if (!ctx || !(rmesa = R300_CONTEXT(ctx))) { - fprintf(stderr, "%s: no context\n", __FUNCTION__); - return ~0; - } - - if (!r300IsGartMemory(rmesa, pointer, 0)) - return ~0; - - card_offset = r300GartOffsetFromVirtual(rmesa, pointer); - - return card_offset - rmesa->radeon.radeonScreen->gart_base; -} - GLboolean r300IsGartMemory(r300ContextPtr rmesa, const GLvoid * pointer, GLint size) { int offset = - (char *)pointer - (char *)rmesa->radeon.radeonScreen->gartTextures.map; + (char *)pointer - + (char *)rmesa->radeon.radeonScreen->gartTextures.map; int valid = (size >= 0 && offset >= 0 - && offset + size < rmesa->radeon.radeonScreen->gartTextures.size); + && offset + size < + rmesa->radeon.radeonScreen->gartTextures.size); if (RADEON_DEBUG & DEBUG_IOCTL) fprintf(stderr, "r300IsGartMemory( %p ) : %d\n", pointer, @@ -686,11 +699,13 @@ GLboolean r300IsGartMemory(r300ContextPtr rmesa, const GLvoid * pointer, GLuint r300GartOffsetFromVirtual(r300ContextPtr rmesa, const GLvoid * pointer) { int offset = - (char *)pointer - (char *)rmesa->radeon.radeonScreen->gartTextures.map; + (char *)pointer - + (char *)rmesa->radeon.radeonScreen->gartTextures.map; //fprintf(stderr, "offset=%08x\n", offset); - if (offset < 0 || offset > rmesa->radeon.radeonScreen->gartTextures.size) + if (offset < 0 + || offset > rmesa->radeon.radeonScreen->gartTextures.size) return ~0; else return rmesa->radeon.radeonScreen->gart_texture_offset + offset; diff --git a/src/mesa/drivers/dri/r300/r300_ioctl.h b/src/mesa/drivers/dri/r300/r300_ioctl.h index 52325646e9..e1143fb6c3 100644 --- a/src/mesa/drivers/dri/r300/r300_ioctl.h +++ b/src/mesa/drivers/dri/r300/r300_ioctl.h @@ -39,11 +39,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "r300_context.h" #include "radeon_drm.h" -extern GLuint r300GetMemoryOffsetMESA(__DRInativeDisplay * dpy, int scrn, - const GLvoid * pointer); - -extern GLboolean r300IsGartMemory(r300ContextPtr rmesa, const GLvoid * pointer, - GLint size); +extern GLboolean r300IsGartMemory(r300ContextPtr rmesa, + const GLvoid * pointer, GLint size); extern GLuint r300GartOffsetFromVirtual(r300ContextPtr rmesa, const GLvoid * pointer); @@ -51,11 +48,13 @@ extern GLuint r300GartOffsetFromVirtual(r300ContextPtr rmesa, extern void r300Flush(GLcontext * ctx); extern void r300ReleaseDmaRegion(r300ContextPtr rmesa, - struct r300_dma_region *region, const char *caller); + struct r300_dma_region *region, + const char *caller); extern void r300AllocDmaRegion(r300ContextPtr rmesa, - struct r300_dma_region *region, - int bytes, int alignment); + struct r300_dma_region *region, int bytes, + int alignment); extern void r300InitIoctlFuncs(struct dd_function_table *functions); +extern void r300RefillCurrentDmaRegion(r300ContextPtr rmesa, int size); #endif /* __R300_IOCTL_H__ */ diff --git a/src/mesa/drivers/dri/r300/r300_maos.c b/src/mesa/drivers/dri/r300/r300_maos.c deleted file mode 100644 index b0d96f7601..0000000000 --- a/src/mesa/drivers/dri/r300/r300_maos.c +++ /dev/null @@ -1,627 +0,0 @@ -/* -Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. - -The Weather Channel (TM) funded Tungsten Graphics to develop the -initial release of the Radeon 8500 driver under the XFree86 license. -This notice must be preserved. - -Permission is hereby granted, free of charge, to any person obtaining -a copy of this software and associated documentation files (the -"Software"), to deal in the Software without restriction, including -without limitation the rights to use, copy, modify, merge, publish, -distribute, sublicense, and/or sell copies of the Software, and to -permit persons to whom the Software is furnished to do so, subject to -the following conditions: - -The above copyright notice and this permission notice (including the -next paragraph) shall be included in all copies or substantial -portions of the Software. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF -MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. -IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE -LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION -OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION -WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - -**************************************************************************/ - -/* - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - */ - -#include "glheader.h" -#include "mtypes.h" -#include "colormac.h" -#include "imports.h" -#include "macros.h" -#include "image.h" - -#include "swrast_setup/swrast_setup.h" -#include "math/m_translate.h" -#include "tnl/tnl.h" -#include "tnl/t_context.h" - -#include "r300_context.h" -#include "radeon_ioctl.h" -#include "r300_state.h" -#include "r300_maos.h" -#include "r300_ioctl.h" - -#ifdef USER_BUFFERS -#include "radeon_mm.h" -#endif - -#if SWIZZLE_X != R300_INPUT_ROUTE_SELECT_X || \ - SWIZZLE_Y != R300_INPUT_ROUTE_SELECT_Y || \ - SWIZZLE_Z != R300_INPUT_ROUTE_SELECT_Z || \ - SWIZZLE_W != R300_INPUT_ROUTE_SELECT_W || \ - SWIZZLE_ZERO != R300_INPUT_ROUTE_SELECT_ZERO || \ - SWIZZLE_ONE != R300_INPUT_ROUTE_SELECT_ONE -#error Cannot change these! -#endif - -#define DEBUG_ALL DEBUG_VERTS - - -#if defined(USE_X86_ASM) -#define COPY_DWORDS( dst, src, nr ) \ -do { \ - int __tmp; \ - __asm__ __volatile__( "rep ; movsl" \ - : "=%c" (__tmp), "=D" (dst), "=S" (__tmp) \ - : "0" (nr), \ - "D" ((long)dst), \ - "S" ((long)src) ); \ -} while (0) -#else -#define COPY_DWORDS( dst, src, nr ) \ -do { \ - int j; \ - for ( j = 0 ; j < nr ; j++ ) \ - dst[j] = ((int *)src)[j]; \ - dst += nr; \ -} while (0) -#endif - -static void emit_vec4(GLcontext * ctx, - struct r300_dma_region *rvb, - GLvoid *data, int stride, int count) -{ - int i; - int *out = (int *)(rvb->address + rvb->start); - - if (RADEON_DEBUG & DEBUG_VERTS) - fprintf(stderr, "%s count %d stride %d\n", - __FUNCTION__, count, stride); - - if (stride == 4) - COPY_DWORDS(out, data, count); - else - for (i = 0; i < count; i++) { - out[0] = *(int *)data; - out++; - data += stride; - } -} - -static void emit_vec8(GLcontext * ctx, - struct r300_dma_region *rvb, - GLvoid *data, int stride, int count) -{ - int i; - int *out = (int *)(rvb->address + rvb->start); - - if (RADEON_DEBUG & DEBUG_VERTS) - fprintf(stderr, "%s count %d stride %d\n", - __FUNCTION__, count, stride); - - if (stride == 8) - COPY_DWORDS(out, data, count * 2); - else - for (i = 0; i < count; i++) { - out[0] = *(int *)data; - out[1] = *(int *)(data + 4); - out += 2; - data += stride; - } -} - -static void emit_vec12(GLcontext * ctx, - struct r300_dma_region *rvb, - GLvoid *data, int stride, int count) -{ - int i; - int *out = (int *)(rvb->address + rvb->start); - - if (RADEON_DEBUG & DEBUG_VERTS) - fprintf(stderr, "%s count %d stride %d out %p data %p\n", - __FUNCTION__, count, stride, (void *)out, (void *)data); - - if (stride == 12) - COPY_DWORDS(out, data, count * 3); - else - for (i = 0; i < count; i++) { - out[0] = *(int *)data; - out[1] = *(int *)(data + 4); - out[2] = *(int *)(data + 8); - out += 3; - data += stride; - } -} - -static void emit_vec16(GLcontext * ctx, - struct r300_dma_region *rvb, - GLvoid *data, int stride, int count) -{ - int i; - int *out = (int *)(rvb->address + rvb->start); - - if (RADEON_DEBUG & DEBUG_VERTS) - fprintf(stderr, "%s count %d stride %d\n", - __FUNCTION__, count, stride); - - if (stride == 16) - COPY_DWORDS(out, data, count * 4); - else - for (i = 0; i < count; i++) { - out[0] = *(int *)data; - out[1] = *(int *)(data + 4); - out[2] = *(int *)(data + 8); - out[3] = *(int *)(data + 12); - out += 4; - data += stride; - } -} - -static void emit_vector(GLcontext * ctx, - struct r300_dma_region *rvb, - GLvoid *data, int size, int stride, int count) -{ - r300ContextPtr rmesa = R300_CONTEXT(ctx); - - if (RADEON_DEBUG & DEBUG_VERTS) - fprintf(stderr, "%s count %d size %d stride %d\n", - __FUNCTION__, count, size, stride); - - /* Gets triggered when playing with future_hw_tcl_on ...*/ - //assert(!rvb->buf); - - if (stride == 0) { - r300AllocDmaRegion(rmesa, rvb, size * 4, 4); - count = 1; - rvb->aos_offset = GET_START(rvb); - rvb->aos_stride = 0; - } else { - r300AllocDmaRegion(rmesa, rvb, size * count * 4, 4); /* alignment? */ - rvb->aos_offset = GET_START(rvb); - rvb->aos_stride = size; - } - - /* Emit the data - */ - switch (size) { - case 1: - emit_vec4(ctx, rvb, data, stride, count); - break; - case 2: - emit_vec8(ctx, rvb, data, stride, count); - break; - case 3: - emit_vec12(ctx, rvb, data, stride, count); - break; - case 4: - emit_vec16(ctx, rvb, data, stride, count); - break; - default: - assert(0); - exit(1); - break; - } - -} - -void r300EmitElts(GLcontext * ctx, void *elts, unsigned long n_elts, int elt_size) -{ - r300ContextPtr rmesa = R300_CONTEXT(ctx); - struct r300_dma_region *rvb=&rmesa->state.elt_dma; - void *out; - - assert(elt_size == 2 || elt_size == 4); - - if(r300IsGartMemory(rmesa, elts, n_elts * elt_size)){ - rvb->address = rmesa->radeon.radeonScreen->gartTextures.map; - rvb->start = ((char *)elts) - rvb->address; - rvb->aos_offset = rmesa->radeon.radeonScreen->gart_texture_offset + rvb->start; - - return ; - }else if(r300IsGartMemory(rmesa, elts, 1)){ - WARN_ONCE("Pointer not within GART memory!\n"); - exit(1); - } - - r300AllocDmaRegion(rmesa, rvb, n_elts * elt_size, elt_size); - rvb->aos_offset = GET_START(rvb); - - out = rvb->address + rvb->start; - memcpy(out, elts, n_elts * elt_size); -} - -static GLuint t_type(struct dt *dt) -{ - switch (dt->type) { - case GL_UNSIGNED_BYTE: - return AOS_FORMAT_UBYTE; - - case GL_SHORT: - return AOS_FORMAT_USHORT; - - case GL_FLOAT: - return AOS_FORMAT_FLOAT; - - default: - assert(0); - break; - } - - return AOS_FORMAT_FLOAT; -} - -static GLuint t_vir0_size(struct dt *dt) -{ - switch (dt->type) { - case GL_UNSIGNED_BYTE: - return 4; - - case GL_SHORT: - return 7; - - case GL_FLOAT: - return dt->size - 1; - - default: - assert(0); - break; - } - - return 0; -} - -static GLuint t_aos_size(struct dt *dt) -{ - switch (dt->type) { - case GL_UNSIGNED_BYTE: - return 1; - - case GL_SHORT: - return 2; - - case GL_FLOAT: - return dt->size; - - default: - assert(0); - break; - } - - return 0; -} - -static GLuint t_vir0(uint32_t *dst, struct dt *dt, int *inputs, GLint *tab, GLuint nr) -{ - GLuint i, dw; - - for (i = 0; i + 1 < nr; i += 2){ - dw = t_vir0_size(&dt[tab[i]]) | (inputs[tab[i]] << 8) | (t_type(&dt[tab[i]]) << 14); - dw |= (t_vir0_size(&dt[tab[i + 1]]) | (inputs[tab[i + 1]] << 8) | (t_type(&dt[tab[i + 1]]) << 14)) << 16; - - if (i + 2 == nr) { - dw |= (1 << (13 + 16)); - } - dst[i >> 1] = dw; - } - - if (nr & 1) { - dw = t_vir0_size(&dt[tab[nr - 1]]) | (inputs[tab[nr - 1]] << 8) | (t_type(&dt[tab[nr - 1]]) << 14); - dw |= 1 << 13; - - dst[nr >> 1] = dw; - } - - return (nr + 1) >> 1; -} - -static GLuint t_swizzle(int swizzle[4]) -{ - return (swizzle[0] << R300_INPUT_ROUTE_X_SHIFT) | - (swizzle[1] << R300_INPUT_ROUTE_Y_SHIFT) | - (swizzle[2] << R300_INPUT_ROUTE_Z_SHIFT) | - (swizzle[3] << R300_INPUT_ROUTE_W_SHIFT); -} - -static GLuint t_vir1(uint32_t *dst, int swizzle[][4], GLuint nr) -{ - GLuint i; - - for (i = 0; i + 1 < nr; i += 2) { - dst[i >> 1] = t_swizzle(swizzle[i]) | R300_INPUT_ROUTE_ENABLE; - dst[i >> 1] |= (t_swizzle(swizzle[i + 1]) | R300_INPUT_ROUTE_ENABLE) << 16; - } - - if (nr & 1) - dst[nr >> 1] = t_swizzle(swizzle[nr - 1]) | R300_INPUT_ROUTE_ENABLE; - - return (nr + 1) >> 1; -} - -static GLuint t_emit_size(struct dt *dt) -{ - return dt->size; -} - -static GLuint t_vic(GLcontext * ctx, GLuint InputsRead) -{ - r300ContextPtr r300 = R300_CONTEXT(ctx); - GLuint i, vic_1 = 0; - - if (InputsRead & (1 << VERT_ATTRIB_POS)) - vic_1 |= R300_INPUT_CNTL_POS; - - if (InputsRead & (1 << VERT_ATTRIB_NORMAL)) - vic_1 |= R300_INPUT_CNTL_NORMAL; - - if (InputsRead & (1 << VERT_ATTRIB_COLOR0)) - vic_1 |= R300_INPUT_CNTL_COLOR; - - r300->state.texture.tc_count = 0; - for (i = 0; i < ctx->Const.MaxTextureUnits; i++) - if (InputsRead & (1 << (VERT_ATTRIB_TEX0 + i))) { - r300->state.texture.tc_count++; - vic_1 |= R300_INPUT_CNTL_TC0 << i; - } - - return vic_1; -} - -/* Emit vertex data to GART memory - * Route inputs to the vertex processor - * This function should never return R300_FALLBACK_TCL when using software tcl. - */ - -int r300EmitArrays(GLcontext *ctx) -{ - r300ContextPtr rmesa = R300_CONTEXT(ctx); - r300ContextPtr r300 = rmesa; - struct radeon_vertex_buffer *VB = &rmesa->state.VB; - GLuint nr; - GLuint count = VB->Count; - GLuint i; - GLuint InputsRead = 0, OutputsWritten = 0; - int *inputs = NULL; - GLint tab[VERT_ATTRIB_MAX]; - int swizzle[VERT_ATTRIB_MAX][4]; - - if (hw_tcl_on) { - struct r300_vertex_program *prog=(struct r300_vertex_program *)CURRENT_VERTEX_SHADER(ctx); - inputs = prog->inputs; - InputsRead = CURRENT_VERTEX_SHADER(ctx)->key.InputsRead; - OutputsWritten = CURRENT_VERTEX_SHADER(ctx)->key.OutputsWritten; - } else { - DECLARE_RENDERINPUTS(inputs_bitset); - inputs = r300->state.sw_tcl_inputs; - - RENDERINPUTS_COPY( inputs_bitset, TNL_CONTEXT(ctx)->render_inputs_bitset ); - - assert(RENDERINPUTS_TEST( inputs_bitset, _TNL_ATTRIB_POS )); - InputsRead |= 1 << VERT_ATTRIB_POS; - OutputsWritten |= 1 << VERT_RESULT_HPOS; - - assert(RENDERINPUTS_TEST( inputs_bitset, _TNL_ATTRIB_NORMAL ) == 0); - - assert(RENDERINPUTS_TEST( inputs_bitset, _TNL_ATTRIB_COLOR0 )); - InputsRead |= 1 << VERT_ATTRIB_COLOR0; - OutputsWritten |= 1 << VERT_RESULT_COL0; - - if (RENDERINPUTS_TEST( inputs_bitset, _TNL_ATTRIB_COLOR1 )) { - InputsRead |= 1 << VERT_ATTRIB_COLOR1; - OutputsWritten |= 1 << VERT_RESULT_COL1; - } - - for (i = 0; i < ctx->Const.MaxTextureUnits; i++) - if (RENDERINPUTS_TEST( inputs_bitset, _TNL_ATTRIB_TEX(i) )) { - InputsRead |= 1 << (VERT_ATTRIB_TEX0 + i); - OutputsWritten |= 1 << (VERT_RESULT_TEX0 + i); - } - - for (i = 0, nr = 0; i < VERT_ATTRIB_MAX; i++) - if (InputsRead & (1 << i)) - inputs[i] = nr++; - else - inputs[i] = -1; - - RENDERINPUTS_COPY( rmesa->state.render_inputs_bitset, inputs_bitset ); - } - assert(InputsRead); - assert(OutputsWritten); - - for (i = 0, nr = 0; i < VERT_ATTRIB_MAX; i++) - if (InputsRead & (1 << i)) - tab[nr++] = i; - - if (nr > R300_MAX_AOS_ARRAYS) - return R300_FALLBACK_TCL; - - for (i = 0; i < nr; i++) { - int ci; - int comp_size, fix, found = 0; - - swizzle[i][0] = SWIZZLE_ZERO; - swizzle[i][1] = SWIZZLE_ZERO; - swizzle[i][2] = SWIZZLE_ZERO; - swizzle[i][3] = SWIZZLE_ONE; - - for (ci = 0; ci < VB->AttribPtr[tab[i]].size; ci++) - swizzle[i][ci] = ci; - -#if MESA_BIG_ENDIAN -#define SWAP_INT(a, b) do { \ - int __temp; \ - __temp = a;\ - a = b; \ - b = __temp; \ -} while (0) - - if (VB->AttribPtr[tab[i]].type == GL_UNSIGNED_BYTE) { - SWAP_INT(swizzle[i][0], swizzle[i][3]); - SWAP_INT(swizzle[i][1], swizzle[i][2]); - } -#endif /* MESA_BIG_ENDIAN */ - - if (r300IsGartMemory(rmesa, VB->AttribPtr[tab[i]].data, /*(count-1)*stride */ 4)) { - if (VB->AttribPtr[tab[i]].stride % 4) - return R300_FALLBACK_TCL; - - rmesa->state.aos[i].address = VB->AttribPtr[tab[i]].data; - rmesa->state.aos[i].start = 0; - rmesa->state.aos[i].aos_offset = r300GartOffsetFromVirtual(rmesa, VB->AttribPtr[tab[i]].data); - rmesa->state.aos[i].aos_stride = VB->AttribPtr[tab[i]].stride / 4; - - rmesa->state.aos[i].aos_size = t_emit_size(&VB->AttribPtr[tab[i]]); - } else { - /* TODO: emit_vector can only handle 4 byte vectors */ - if (VB->AttribPtr[tab[i]].type != GL_FLOAT) - return R300_FALLBACK_TCL; - - emit_vector(ctx, &rmesa->state.aos[i], VB->AttribPtr[tab[i]].data, - t_emit_size(&VB->AttribPtr[tab[i]]), VB->AttribPtr[tab[i]].stride, count); - } - - rmesa->state.aos[i].aos_size = t_aos_size(&VB->AttribPtr[tab[i]]); - - comp_size = _mesa_sizeof_type(VB->AttribPtr[tab[i]].type); - - for (fix = 0; fix <= 4 - VB->AttribPtr[tab[i]].size; fix++) { - if ((rmesa->state.aos[i].aos_offset - comp_size * fix) % 4) - continue; - - found = 1; - break; - } - - if (found) { - if (fix > 0) { - WARN_ONCE("Feeling lucky?\n"); - } - - rmesa->state.aos[i].aos_offset -= comp_size * fix; - - for (ci = 0; ci < VB->AttribPtr[tab[i]].size; ci++) - swizzle[i][ci] += fix; - } else { - WARN_ONCE("Cannot handle offset %x with stride %d, comp %d\n", - rmesa->state.aos[i].aos_offset, rmesa->state.aos[i].aos_stride, VB->AttribPtr[tab[i]].size); - return R300_FALLBACK_TCL; - } - } - - /* setup INPUT_ROUTE */ - R300_STATECHANGE(r300, vir[0]); - ((drm_r300_cmd_header_t*)r300->hw.vir[0].cmd)->packet0.count = - t_vir0(&r300->hw.vir[0].cmd[R300_VIR_CNTL_0], VB->AttribPtr, inputs, tab, nr); - - R300_STATECHANGE(r300, vir[1]); - ((drm_r300_cmd_header_t*)r300->hw.vir[1].cmd)->packet0.count = - t_vir1(&r300->hw.vir[1].cmd[R300_VIR_CNTL_0], swizzle, nr); - - /* Set up input_cntl */ - /* I don't think this is needed for vertex buffers, but it doesn't hurt anything */ - R300_STATECHANGE(r300, vic); - r300->hw.vic.cmd[R300_VIC_CNTL_0] = 0x5555; /* Hard coded value, no idea what it means */ - r300->hw.vic.cmd[R300_VIC_CNTL_1] = t_vic(ctx, InputsRead); - - /* Stage 3: VAP output */ - - R300_STATECHANGE(r300, vof); - - r300->hw.vof.cmd[R300_VOF_CNTL_0]=0; - r300->hw.vof.cmd[R300_VOF_CNTL_1]=0; - - if (OutputsWritten & (1 << VERT_RESULT_HPOS)) - r300->hw.vof.cmd[R300_VOF_CNTL_0] |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT; - - if (OutputsWritten & (1 << VERT_RESULT_COL0)) - r300->hw.vof.cmd[R300_VOF_CNTL_0] |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT; - - if (OutputsWritten & (1 << VERT_RESULT_COL1)) - r300->hw.vof.cmd[R300_VOF_CNTL_0] |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_1_PRESENT; - - /*if(OutputsWritten & (1 << VERT_RESULT_BFC0)) - r300->hw.vof.cmd[R300_VOF_CNTL_0] |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_2_PRESENT; - - if(OutputsWritten & (1 << VERT_RESULT_BFC1)) - r300->hw.vof.cmd[R300_VOF_CNTL_0] |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_3_PRESENT;*/ - //if(OutputsWritten & (1 << VERT_RESULT_FOGC)) - - if (OutputsWritten & (1 << VERT_RESULT_PSIZ)) - r300->hw.vof.cmd[R300_VOF_CNTL_0] |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT; - - for(i=0;i < ctx->Const.MaxTextureUnits;i++) - if(OutputsWritten & (1 << (VERT_RESULT_TEX0 + i))) - r300->hw.vof.cmd[R300_VOF_CNTL_1] |= (4 << (3 * i)); - - rmesa->state.aos_count = nr; - - return R300_FALLBACK_NONE; -} - -#ifdef USER_BUFFERS -void r300UseArrays(GLcontext * ctx) -{ - r300ContextPtr rmesa = R300_CONTEXT(ctx); - int i; - - if(rmesa->state.elt_dma.buf) - radeon_mm_use(rmesa, rmesa->state.elt_dma.buf->id); - - for (i=0; i < rmesa->state.aos_count;i++) { - if (rmesa->state.aos[i].buf) - radeon_mm_use(rmesa, rmesa->state.aos[i].buf->id); - } - -#ifdef HW_VBOS - -#define USE_VBO(a) \ - do { \ - if (ctx->Array.ArrayObj->a.BufferObj->Name \ - && ctx->Array.ArrayObj->a.Enabled) \ - radeon_mm_use(rmesa, ((struct r300_buffer_object *)ctx->Array.ArrayObj->a.BufferObj)->id); \ - } while(0) - - if (ctx->Array.ElementArrayBufferObj->Name && ctx->Array.ElementArrayBufferObj->OnCard) - radeon_mm_use(rmesa, ((struct r300_buffer_object *)ctx->Array.ElementArrayBufferObj)->id); - - USE_VBO(Vertex); - USE_VBO(Normal); - USE_VBO(Color); - USE_VBO(SecondaryColor); - USE_VBO(FogCoord); - - for (i=0; i < MAX_TEXTURE_COORD_UNITS; i++) - USE_VBO(TexCoord[i]); -#endif - -} -#endif - -void r300ReleaseArrays(GLcontext * ctx) -{ - r300ContextPtr rmesa = R300_CONTEXT(ctx); - int i; - - r300ReleaseDmaRegion(rmesa, &rmesa->state.elt_dma, __FUNCTION__); - for (i=0;i<rmesa->state.aos_count;i++) { - r300ReleaseDmaRegion(rmesa, &rmesa->state.aos[i], __FUNCTION__); - } -} diff --git a/src/mesa/drivers/dri/r300/r300_maos.h b/src/mesa/drivers/dri/r300/r300_maos.h deleted file mode 100644 index ab28317894..0000000000 --- a/src/mesa/drivers/dri/r300/r300_maos.h +++ /dev/null @@ -1,53 +0,0 @@ -/* -Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. - -The Weather Channel (TM) funded Tungsten Graphics to develop the -initial release of the Radeon 8500 driver under the XFree86 license. -This notice must be preserved. - -Permission is hereby granted, free of charge, to any person obtaining -a copy of this software and associated documentation files (the -"Software"), to deal in the Software without restriction, including -without limitation the rights to use, copy, modify, merge, publish, -distribute, sublicense, and/or sell copies of the Software, and to -permit persons to whom the Software is furnished to do so, subject to -the following conditions: - -The above copyright notice and this permission notice (including the -next paragraph) shall be included in all copies or substantial -portions of the Software. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF -MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. -IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE -LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION -OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION -WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - -**************************************************************************/ - -/* - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - */ - -#ifndef __R300_MAOS_H__ -#define __R300_MAOS_H__ - -#ifdef GLX_DIRECT_RENDERING - -#include "r300_context.h" - -extern void r300EmitElts(GLcontext * ctx, void *elts, unsigned long n_elts, int elt_size); -extern int r300EmitArrays(GLcontext *ctx); - -#ifdef USER_BUFFERS -void r300UseArrays(GLcontext * ctx); -#endif - -extern void r300ReleaseArrays(GLcontext * ctx); - -#endif -#endif - diff --git a/src/mesa/drivers/dri/r300/r300_mem.c b/src/mesa/drivers/dri/r300/r300_mem.c new file mode 100644 index 0000000000..f8f9d4fcdf --- /dev/null +++ b/src/mesa/drivers/dri/r300/r300_mem.c @@ -0,0 +1,385 @@ +/* + * Copyright (C) 2005 Aapo Tahkola. + * + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial + * portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +/** + * \file + * + * \author Aapo Tahkola <aet@rasterburn.org> + */ + +#include <unistd.h> + +#include "r300_context.h" +#include "r300_cmdbuf.h" +#include "r300_ioctl.h" +#include "r300_mem.h" +#include "radeon_ioctl.h" + +#ifdef USER_BUFFERS + +static void resize_u_list(r300ContextPtr rmesa) +{ + void *temp; + int nsize; + + temp = rmesa->rmm->u_list; + nsize = rmesa->rmm->u_size * 2; + + rmesa->rmm->u_list = _mesa_malloc(nsize * sizeof(*rmesa->rmm->u_list)); + _mesa_memset(rmesa->rmm->u_list, 0, + nsize * sizeof(*rmesa->rmm->u_list)); + + if (temp) { + r300FlushCmdBuf(rmesa, __FUNCTION__); + + _mesa_memcpy(rmesa->rmm->u_list, temp, + rmesa->rmm->u_size * sizeof(*rmesa->rmm->u_list)); + _mesa_free(temp); + } + + rmesa->rmm->u_size = nsize; +} + +void r300_mem_init(r300ContextPtr rmesa) +{ + rmesa->rmm = malloc(sizeof(struct r300_memory_manager)); + memset(rmesa->rmm, 0, sizeof(struct r300_memory_manager)); + + rmesa->rmm->u_size = 128; + resize_u_list(rmesa); +} + +void r300_mem_destroy(r300ContextPtr rmesa) +{ + _mesa_free(rmesa->rmm->u_list); + rmesa->rmm->u_list = NULL; + + _mesa_free(rmesa->rmm); + rmesa->rmm = NULL; +} + +void *r300_mem_ptr(r300ContextPtr rmesa, int id) +{ + assert(id <= rmesa->rmm->u_last); + return rmesa->rmm->u_list[id].ptr; +} + +int r300_mem_find(r300ContextPtr rmesa, void *ptr) +{ + int i; + + for (i = 1; i < rmesa->rmm->u_size + 1; i++) + if (rmesa->rmm->u_list[i].ptr && + ptr >= rmesa->rmm->u_list[i].ptr && + ptr < + rmesa->rmm->u_list[i].ptr + rmesa->rmm->u_list[i].size) + break; + + if (i < rmesa->rmm->u_size + 1) + return i; + + fprintf(stderr, "%p failed\n", ptr); + return 0; +} + +//#define MM_DEBUG +int r300_mem_alloc(r300ContextPtr rmesa, int alignment, int size) +{ + drm_radeon_mem_alloc_t alloc; + int offset = 0, ret; + int i, free = -1; + int done_age; + drm_radeon_mem_free_t memfree; + int tries = 0; + static int bytes_wasted = 0, allocated = 0; + + if (size < 4096) + bytes_wasted += 4096 - size; + + allocated += size; + +#if 0 + static int t = 0; + if (t != time(NULL)) { + t = time(NULL); + fprintf(stderr, "slots used %d, wasted %d kb, allocated %d\n", + rmesa->rmm->u_last, bytes_wasted / 1024, + allocated / 1024); + } +#endif + + memfree.region = RADEON_MEM_REGION_GART; + + again: + + done_age = radeonGetAge((radeonContextPtr) rmesa); + + if (rmesa->rmm->u_last + 1 >= rmesa->rmm->u_size) + resize_u_list(rmesa); + + for (i = rmesa->rmm->u_last + 1; i > 0; i--) { + if (rmesa->rmm->u_list[i].ptr == NULL) { + free = i; + continue; + } + + if (rmesa->rmm->u_list[i].h_pending == 0 && + rmesa->rmm->u_list[i].pending + && rmesa->rmm->u_list[i].age <= done_age) { + memfree.region_offset = + (char *)rmesa->rmm->u_list[i].ptr - + (char *)rmesa->radeon.radeonScreen->gartTextures. + map; + + ret = + drmCommandWrite(rmesa->radeon.radeonScreen-> + driScreen->fd, DRM_RADEON_FREE, + &memfree, sizeof(memfree)); + + if (ret) { + fprintf(stderr, "Failed to free at %p\n", + rmesa->rmm->u_list[i].ptr); + fprintf(stderr, "ret = %s\n", strerror(-ret)); + exit(1); + } else { +#ifdef MM_DEBUG + fprintf(stderr, "really freed %d at age %x\n", + i, + radeonGetAge((radeonContextPtr) rmesa)); +#endif + if (i == rmesa->rmm->u_last) + rmesa->rmm->u_last--; + + if (rmesa->rmm->u_list[i].size < 4096) + bytes_wasted -= + 4096 - rmesa->rmm->u_list[i].size; + + allocated -= rmesa->rmm->u_list[i].size; + rmesa->rmm->u_list[i].pending = 0; + rmesa->rmm->u_list[i].ptr = NULL; + free = i; + } + } + } + rmesa->rmm->u_head = i; + + if (free == -1) { + WARN_ONCE("Ran out of slots!\n"); + //usleep(100); + r300FlushCmdBuf(rmesa, __FUNCTION__); + tries++; + if (tries > 100) { + WARN_ONCE("Ran out of slots!\n"); + exit(1); + } + goto again; + } + + alloc.region = RADEON_MEM_REGION_GART; + alloc.alignment = alignment; + alloc.size = size; + alloc.region_offset = &offset; + + ret = + drmCommandWriteRead(rmesa->radeon.dri.fd, DRM_RADEON_ALLOC, &alloc, + sizeof(alloc)); + if (ret) { +#if 0 + WARN_ONCE("Ran out of mem!\n"); + r300FlushCmdBuf(rmesa, __FUNCTION__); + //usleep(100); + tries2++; + tries = 0; + if (tries2 > 100) { + WARN_ONCE("Ran out of GART memory!\n"); + exit(1); + } + goto again; +#else + WARN_ONCE + ("Ran out of GART memory (for %d)!\nPlease consider adjusting GARTSize option.\n", + size); + return 0; +#endif + } + + i = free; + + if (i > rmesa->rmm->u_last) + rmesa->rmm->u_last = i; + + rmesa->rmm->u_list[i].ptr = + ((GLubyte *) rmesa->radeon.radeonScreen->gartTextures.map) + offset; + rmesa->rmm->u_list[i].size = size; + rmesa->rmm->u_list[i].age = 0; + //fprintf(stderr, "alloc %p at id %d\n", rmesa->rmm->u_list[i].ptr, i); + +#ifdef MM_DEBUG + fprintf(stderr, "allocated %d at age %x\n", i, + radeonGetAge((radeonContextPtr) rmesa)); +#endif + + return i; +} + +void r300_mem_use(r300ContextPtr rmesa, int id) +{ + uint64_t ull; +#ifdef MM_DEBUG + fprintf(stderr, "%s: %d at age %x\n", __FUNCTION__, id, + radeonGetAge((radeonContextPtr) rmesa)); +#endif + drm_r300_cmd_header_t *cmd; + + assert(id <= rmesa->rmm->u_last); + + if (id == 0) + return; + + cmd = + (drm_r300_cmd_header_t *) r300AllocCmdBuf(rmesa, + 2 + sizeof(ull) / 4, + __FUNCTION__); + cmd[0].scratch.cmd_type = R300_CMD_SCRATCH; + cmd[0].scratch.reg = R300_MEM_SCRATCH; + cmd[0].scratch.n_bufs = 1; + cmd[0].scratch.flags = 0; + cmd++; + + ull = (uint64_t) (intptr_t) & rmesa->rmm->u_list[id].age; + _mesa_memcpy(cmd, &ull, sizeof(ull)); + cmd += sizeof(ull) / 4; + + cmd[0].u = /*id */ 0; + + LOCK_HARDWARE(&rmesa->radeon); /* Protect from DRM. */ + rmesa->rmm->u_list[id].h_pending++; + UNLOCK_HARDWARE(&rmesa->radeon); +} + +unsigned long r300_mem_offset(r300ContextPtr rmesa, int id) +{ + unsigned long offset; + + assert(id <= rmesa->rmm->u_last); + + offset = (char *)rmesa->rmm->u_list[id].ptr - + (char *)rmesa->radeon.radeonScreen->gartTextures.map; + offset += rmesa->radeon.radeonScreen->gart_texture_offset; + + return offset; +} + +void *r300_mem_map(r300ContextPtr rmesa, int id, int access) +{ +#ifdef MM_DEBUG + fprintf(stderr, "%s: %d at age %x\n", __FUNCTION__, id, + radeonGetAge((radeonContextPtr) rmesa)); +#endif + void *ptr; + int tries = 0; + + assert(id <= rmesa->rmm->u_last); + + if (access == R300_MEM_R) { + + if (rmesa->rmm->u_list[id].mapped == 1) + WARN_ONCE("buffer %d already mapped\n", id); + + rmesa->rmm->u_list[id].mapped = 1; + ptr = r300_mem_ptr(rmesa, id); + + return ptr; + } + + if (rmesa->rmm->u_list[id].h_pending) + r300FlushCmdBuf(rmesa, __FUNCTION__); + + if (rmesa->rmm->u_list[id].h_pending) { + return NULL; + } + + while (rmesa->rmm->u_list[id].age > + radeonGetAge((radeonContextPtr) rmesa) && tries++ < 1000) + usleep(10); + + if (tries >= 1000) { + fprintf(stderr, "Idling failed (%x vs %x)\n", + rmesa->rmm->u_list[id].age, + radeonGetAge((radeonContextPtr) rmesa)); + return NULL; + } + + if (rmesa->rmm->u_list[id].mapped == 1) + WARN_ONCE("buffer %d already mapped\n", id); + + rmesa->rmm->u_list[id].mapped = 1; + ptr = r300_mem_ptr(rmesa, id); + + return ptr; +} + +void r300_mem_unmap(r300ContextPtr rmesa, int id) +{ +#ifdef MM_DEBUG + fprintf(stderr, "%s: %d at age %x\n", __FUNCTION__, id, + radeonGetAge((radeonContextPtr) rmesa)); +#endif + + assert(id <= rmesa->rmm->u_last); + + if (rmesa->rmm->u_list[id].mapped == 0) + WARN_ONCE("buffer %d not mapped\n", id); + + rmesa->rmm->u_list[id].mapped = 0; +} + +void r300_mem_free(r300ContextPtr rmesa, int id) +{ +#ifdef MM_DEBUG + fprintf(stderr, "%s: %d at age %x\n", __FUNCTION__, id, + radeonGetAge((radeonContextPtr) rmesa)); +#endif + + assert(id <= rmesa->rmm->u_last); + + if (id == 0) + return; + + if (rmesa->rmm->u_list[id].ptr == NULL) { + WARN_ONCE("Not allocated!\n"); + return; + } + + if (rmesa->rmm->u_list[id].pending) { + WARN_ONCE("%p already pended!\n", rmesa->rmm->u_list[id].ptr); + return; + } + + rmesa->rmm->u_list[id].pending = 1; +} +#endif diff --git a/src/mesa/drivers/dri/r300/r300_mem.h b/src/mesa/drivers/dri/r300/r300_mem.h new file mode 100644 index 0000000000..625a7f6d8d --- /dev/null +++ b/src/mesa/drivers/dri/r300/r300_mem.h @@ -0,0 +1,37 @@ +#ifndef __R300_MEM_H__ +#define __R300_MEM_H__ + +//#define R300_MEM_PDL 0 +#define R300_MEM_UL 1 + +#define R300_MEM_R 1 +#define R300_MEM_W 2 +#define R300_MEM_RW (R300_MEM_R | R300_MEM_W) + +#define R300_MEM_SCRATCH 2 + +struct r300_memory_manager { + struct { + void *ptr; + uint32_t size; + uint32_t age; + uint32_t h_pending; + int pending; + int mapped; + } *u_list; + int u_head, u_size, u_last; + +}; + +extern void r300_mem_init(r300ContextPtr rmesa); +extern void r300_mem_destroy(r300ContextPtr rmesa); +extern void *r300_mem_ptr(r300ContextPtr rmesa, int id); +extern int r300_mem_find(r300ContextPtr rmesa, void *ptr); +extern int r300_mem_alloc(r300ContextPtr rmesa, int alignment, int size); +extern void r300_mem_use(r300ContextPtr rmesa, int id); +extern unsigned long r300_mem_offset(r300ContextPtr rmesa, int id); +extern void *r300_mem_map(r300ContextPtr rmesa, int id, int access); +extern void r300_mem_unmap(r300ContextPtr rmesa, int id); +extern void r300_mem_free(r300ContextPtr rmesa, int id); + +#endif diff --git a/src/mesa/drivers/dri/r300/r300_program.h b/src/mesa/drivers/dri/r300/r300_program.h index 3210660df1..eddd783f07 100644 --- a/src/mesa/drivers/dri/r300/r300_program.h +++ b/src/mesa/drivers/dri/r300/r300_program.h @@ -145,6 +145,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ((arg1) << R300_FPI2_ARG1A_SHIFT) | \ ((arg2) << R300_FPI2_ARG2A_SHIFT)) -extern void debug_vp(GLcontext *ctx, struct gl_vertex_program *vp); - -#endif /* __R300_PROGRAM_H__ */ +extern void debug_vp(GLcontext * ctx, struct gl_vertex_program *vp); + +#endif /* __R300_PROGRAM_H__ */ diff --git a/src/mesa/drivers/dri/r300/r300_reg.h b/src/mesa/drivers/dri/r300/r300_reg.h index b296aaa07a..e59919be49 100644 --- a/src/mesa/drivers/dri/r300/r300_reg.h +++ b/src/mesa/drivers/dri/r300/r300_reg.h @@ -23,6 +23,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ +/* *INDENT-OFF* */ + #ifndef _R300_REG_H #define _R300_REG_H @@ -114,6 +116,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT (1<<16) /* GUESS */ #define R300_VAP_OUTPUT_VTX_FMT_1 0x2094 + /* each of the following is 3 bits wide, specifies number + of components */ # define R300_VAP_OUTPUT_VTX_FMT_1__TEX_0_COMP_CNT_SHIFT 0 # define R300_VAP_OUTPUT_VTX_FMT_1__TEX_1_COMP_CNT_SHIFT 3 # define R300_VAP_OUTPUT_VTX_FMT_1__TEX_2_COMP_CNT_SHIFT 6 @@ -297,6 +301,18 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_221C_NORMAL 0x00000000 # define R300_221C_CLEAR 0x0001C000 +/* These seem to be per-pixel and per-vertex X and Y clipping planes. The first + * plane is per-pixel and the second plane is per-vertex. + * + * This was determined by experimentation alone but I believe it is correct. + * + * These registers are called X_QUAD0_1_FL to X_QUAD0_4_FL by glxtest. + */ +#define R300_VAP_CLIP_X_0 0x2220 +#define R300_VAP_CLIP_X_1 0x2224 +#define R300_VAP_CLIP_Y_0 0x2228 +#define R300_VAP_CLIP_Y_1 0x2230 + /* gap */ /* Sometimes, END_OF_PKT and 0x2284=0 are the only commands sent between @@ -320,13 +336,15 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. * The meaning of the two UNKNOWN fields is obviously not known. However, * experiments so far have shown that both *must* point to an instruction * inside the vertex program, otherwise the GPU locks up. + * * fglrx usually sets CNTL_3_UNKNOWN to the end of the program and - * CNTL_1_UNKNOWN points to instruction where last write to position takes - * place. + * R300_PVS_CNTL_1_POS_END_SHIFT points to instruction where last write to + * position takes place. + * * Most likely this is used to ignore rest of the program in cases * where group of verts arent visible. For some reason this "section" * is sometimes accepted other instruction that have no relationship with - *position calculations. + * position calculations. */ #define R300_VAP_PVS_CNTL_1 0x22D0 # define R300_PVS_CNTL_1_PROGRAM_START_SHIFT 0 @@ -488,6 +506,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_GB_W_SELECT_1 (1<<4) #define R300_GB_AA_CONFIG 0x4020 +# define R300_AA_DISABLE 0x00 # define R300_AA_ENABLE 0x01 # define R300_AA_SUBSAMPLES_2 0 # define R300_AA_SUBSAMPLES_3 (1<<1) @@ -670,6 +689,11 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. /* Special handling for color: When the fragment program uses color, * the ROUTE_0_COLOR bit is set and ROUTE_0_COLOR_DEST contains the * color register index. + * + * Apperently you may set the R300_RS_ROUTE_0_COLOR bit, but not provide any + * R300_RS_ROUTE_0_COLOR_DEST value; this setup is used for clearing the state. + * See r300_ioctl.c:r300EmitClearState. I'm not sure if this setup is strictly + * correct or not. - Oliver. */ # define R300_RS_ROUTE_0_COLOR (1 << 14) # define R300_RS_ROUTE_0_COLOR_DEST_SHIFT 17 @@ -959,7 +983,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. * first node is stored in NODE_2, the second node is stored in NODE_3. * * Offsets are relative to the master offset from PFS_CNTL_2. - * LAST_NODE is set for the last node, and only for the last node. */ #define R300_PFS_NODE_0 0x4610 #define R300_PFS_NODE_1 0x4614 @@ -973,7 +996,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_PFS_NODE_TEX_OFFSET_MASK (31 << 12) # define R300_PFS_NODE_TEX_END_SHIFT 17 # define R300_PFS_NODE_TEX_END_MASK (31 << 17) -/*# define R300_PFS_NODE_LAST_NODE (1 << 22) */ # define R300_PFS_NODE_OUTPUT_COLOR (1 << 22) # define R300_PFS_NODE_OUTPUT_DEPTH (1 << 23) @@ -1554,6 +1576,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #define R300_PRIM_COLOR_ORDER_BGRA (0 << 6) #define R300_PRIM_COLOR_ORDER_RGBA (1 << 6) #define R300_PRIM_NUM_VERTICES_SHIFT 16 +#define R300_PRIM_NUM_VERTICES_MASK 0xffff /* Draw a primitive from vertex data in arrays loaded via 3D_LOAD_VBPNTR. * Two parameter dwords: @@ -1582,6 +1605,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_EB_UNK1_SHIFT 24 # define R300_EB_UNK1 (0x80<<24) # define R300_EB_UNK2 0x0810 +#define R300_PACKET3_3D_DRAW_VBUF_2 0x00003400 #define R300_PACKET3_3D_DRAW_INDX_2 0x00003600 /* END: Packet 3 commands */ @@ -1602,5 +1626,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. */ #define R300_CP_CMD_BITBLT_MULTI 0xC0009B00 - #endif /* _R300_REG_H */ + +/* *INDENT-ON* */ diff --git a/src/mesa/drivers/dri/r300/r300_render.c b/src/mesa/drivers/dri/r300/r300_render.c index 63b21b9379..eee1e803a0 100644 --- a/src/mesa/drivers/dri/r300/r300_render.c +++ b/src/mesa/drivers/dri/r300/r300_render.c @@ -25,9 +25,29 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ -/* - * Authors: - * Nicolai Haehnle <prefect_@gmx.net> +/** + * \file + * + * \brief R300 Render (Vertex Buffer Implementation) + * + * The immediate implementation has been removed from CVS in favor of the vertex + * buffer implementation. + * + * The render functions are called by the pipeline manager to render a batch of + * primitives. They return TRUE to pass on to the next stage (i.e. software + * rasterization) or FALSE to indicate that the pipeline has finished after + * rendering something. + * + * When falling back to software TCL still attempt to use hardware + * rasterization. + * + * I am not sure that the cache related registers are setup correctly, but + * obviously this does work... Further investigation is needed. + * + * \author Nicolai Haehnle <prefect_@gmx.net> + * + * \todo Add immediate implementation back? Perhaps this is useful if there are + * no bugs... */ #include "glheader.h" @@ -38,14 +58,12 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #include "context.h" #include "dd.h" #include "simple_list.h" - #include "api_arrayelt.h" #include "swrast/swrast.h" #include "swrast_setup/swrast_setup.h" #include "vbo/vbo.h" #include "tnl/tnl.h" #include "tnl/t_vp_build.h" - #include "radeon_reg.h" #include "radeon_macros.h" #include "radeon_ioctl.h" @@ -54,321 +72,252 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #include "r300_ioctl.h" #include "r300_state.h" #include "r300_reg.h" -#include "r300_program.h" #include "r300_tex.h" -#include "r300_maos.h" #include "r300_emit.h" - extern int future_hw_tcl_on; -/********************************************************************** -* Hardware rasterization -* -* When we fell back to software TCL, we still try to use the -* rasterization hardware for rendering. -**********************************************************************/ - -static int r300_get_primitive_type(r300ContextPtr rmesa, GLcontext *ctx, int prim) +/** + * \brief Convert a OpenGL primitive type into a R300 primitive type. + */ +int r300PrimitiveType(r300ContextPtr rmesa, int prim) { - int type=-1; - switch (prim & PRIM_MODE_MASK) { case GL_POINTS: - type=R300_VAP_VF_CNTL__PRIM_POINTS; - break; + return R300_VAP_VF_CNTL__PRIM_POINTS; + break; case GL_LINES: - type=R300_VAP_VF_CNTL__PRIM_LINES; - break; + return R300_VAP_VF_CNTL__PRIM_LINES; + break; case GL_LINE_STRIP: - type=R300_VAP_VF_CNTL__PRIM_LINE_STRIP; - break; + return R300_VAP_VF_CNTL__PRIM_LINE_STRIP; + break; case GL_LINE_LOOP: - type=R300_VAP_VF_CNTL__PRIM_LINE_LOOP; - break; - case GL_TRIANGLES: - type=R300_VAP_VF_CNTL__PRIM_TRIANGLES; - break; - case GL_TRIANGLE_STRIP: - type=R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP; - break; - case GL_TRIANGLE_FAN: - type=R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN; - break; + return R300_VAP_VF_CNTL__PRIM_LINE_LOOP; + break; + case GL_TRIANGLES: + return R300_VAP_VF_CNTL__PRIM_TRIANGLES; + break; + case GL_TRIANGLE_STRIP: + return R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP; + break; + case GL_TRIANGLE_FAN: + return R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN; + break; case GL_QUADS: - type=R300_VAP_VF_CNTL__PRIM_QUADS; - break; + return R300_VAP_VF_CNTL__PRIM_QUADS; + break; case GL_QUAD_STRIP: - type=R300_VAP_VF_CNTL__PRIM_QUAD_STRIP; - break; + return R300_VAP_VF_CNTL__PRIM_QUAD_STRIP; + break; case GL_POLYGON: - type=R300_VAP_VF_CNTL__PRIM_POLYGON; + return R300_VAP_VF_CNTL__PRIM_POLYGON; break; - default: - fprintf(stderr, "%s:%s Do not know how to handle primitive %02x - help me !\n", - __FILE__, __FUNCTION__, - prim & PRIM_MODE_MASK); + default: + assert(0); return -1; - break; - } - return type; + break; + } } -int r300_get_num_verts(r300ContextPtr rmesa, int num_verts, int prim) +int r300NumVerts(r300ContextPtr rmesa, int num_verts, int prim) { - int verts_off=0; - char *name="UNKNOWN"; + int verts_off = 0; switch (prim & PRIM_MODE_MASK) { case GL_POINTS: - name="P"; verts_off = 0; - break; + break; case GL_LINES: - name="L"; verts_off = num_verts % 2; - break; + break; case GL_LINE_STRIP: - name="LS"; - if(num_verts < 2) + if (num_verts < 2) verts_off = num_verts; - break; + break; case GL_LINE_LOOP: - name="LL"; - if(num_verts < 2) + if (num_verts < 2) verts_off = num_verts; - break; - case GL_TRIANGLES: - name="T"; + break; + case GL_TRIANGLES: verts_off = num_verts % 3; - break; - case GL_TRIANGLE_STRIP: - name="TS"; - if(num_verts < 3) + break; + case GL_TRIANGLE_STRIP: + if (num_verts < 3) verts_off = num_verts; - break; - case GL_TRIANGLE_FAN: - name="TF"; - if(num_verts < 3) + break; + case GL_TRIANGLE_FAN: + if (num_verts < 3) verts_off = num_verts; - break; + break; case GL_QUADS: - name="Q"; verts_off = num_verts % 4; - break; + break; case GL_QUAD_STRIP: - name="QS"; - if(num_verts < 4) + if (num_verts < 4) verts_off = num_verts; else verts_off = num_verts % 2; - break; + break; case GL_POLYGON: - name="P"; - if(num_verts < 3) + if (num_verts < 3) verts_off = num_verts; break; - default: - fprintf(stderr, "%s:%s Do not know how to handle primitive %02x - help me !\n", - __FILE__, __FUNCTION__, - prim & PRIM_MODE_MASK); + default: + assert(0); return -1; - break; - } - - if (RADEON_DEBUG & DEBUG_VERTS) { - if (num_verts - verts_off == 0) { - WARN_ONCE("user error: Need more than %d vertices to draw primitive %s !\n", num_verts, name); - return 0; - } - - if (verts_off > 0) { - WARN_ONCE("user error: %d is not a valid number of vertices for primitive %s !\n", num_verts, name); - } + break; } return num_verts - verts_off; } -/* Immediate implementation has been removed from CVS. */ +static void r300EmitElts(GLcontext * ctx, void *elts, unsigned long n_elts) +{ + r300ContextPtr rmesa = R300_CONTEXT(ctx); + struct r300_dma_region *rvb = &rmesa->state.elt_dma; + void *out; + + if (r300IsGartMemory(rmesa, elts, n_elts * 4)) { + rvb->address = rmesa->radeon.radeonScreen->gartTextures.map; + rvb->start = ((char *)elts) - rvb->address; + rvb->aos_offset = + rmesa->radeon.radeonScreen->gart_texture_offset + + rvb->start; + return; + } else if (r300IsGartMemory(rmesa, elts, 1)) { + WARN_ONCE("Pointer not within GART memory!\n"); + _mesa_exit(-1); + } -/* vertex buffer implementation */ + r300AllocDmaRegion(rmesa, rvb, n_elts * 4, 4); + rvb->aos_offset = GET_START(rvb); -static void inline fire_EB(r300ContextPtr rmesa, unsigned long addr, int vertex_count, int type, int elt_size) + out = rvb->address + rvb->start; + memcpy(out, elts, n_elts * 4); +} + +static void r300FireEB(r300ContextPtr rmesa, unsigned long addr, + int vertex_count, int type) { int cmd_reserved = 0; int cmd_written = 0; drm_radeon_cmd_header_t *cmd = NULL; - unsigned long addr_a; - unsigned long t_addr; - unsigned long magic_1, magic_2; - GLcontext *ctx; - ctx = rmesa->radeon.glCtx; - assert(elt_size == 2 || elt_size == 4); + start_packet3(CP_PACKET3(R300_PACKET3_3D_DRAW_INDX_2, 0), 0); + e32(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (vertex_count << 16) | type | R300_VAP_VF_CNTL__INDEX_SIZE_32bit); - if(addr & (elt_size-1)){ - WARN_ONCE("Badly aligned buffer\n"); - return ; - } -#ifdef OPTIMIZE_ELTS - addr_a = 0; + start_packet3(CP_PACKET3(R300_PACKET3_INDX_BUFFER, 2), 2); + e32(R300_EB_UNK1 | (0 << 16) | R300_EB_UNK2); + e32(addr); + e32(vertex_count); +} - magic_1 = (addr % 32) / 4; - t_addr = addr & (~0x1d); - magic_2 = (vertex_count + 1 + (t_addr & 0x2)) / 2 + magic_1; +static void r300EmitAOS(r300ContextPtr rmesa, GLuint nr, GLuint offset) +{ + int sz = 1 + (nr >> 1) * 3 + (nr & 1) * 2; + int i; + int cmd_reserved = 0; + int cmd_written = 0; + drm_radeon_cmd_header_t *cmd = NULL; - check_space(6); + if (RADEON_DEBUG & DEBUG_VERTS) + fprintf(stderr, "%s: nr=%d, ofs=0x%08x\n", __FUNCTION__, nr, + offset); - start_packet3(RADEON_CP_PACKET3_3D_DRAW_INDX_2, 0); - if(elt_size == 4){ - e32(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (vertex_count<<16) | type | R300_VAP_VF_CNTL__INDEX_SIZE_32bit); - } else { - e32(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (vertex_count<<16) | type); - } + start_packet3(CP_PACKET3(R300_PACKET3_3D_LOAD_VBPNTR, sz - 1), sz - 1); + e32(nr); - start_packet3(RADEON_CP_PACKET3_INDX_BUFFER, 2); - if(elt_size == 4){ - e32(R300_EB_UNK1 | (0 << 16) | R300_EB_UNK2); - e32(addr /*& 0xffffffe3*/); - } else { - e32(R300_EB_UNK1 | (magic_1 << 16) | R300_EB_UNK2); - e32(t_addr); - } + for (i = 0; i + 1 < nr; i += 2) { + e32((rmesa->state.aos[i].aos_size << 0) | + (rmesa->state.aos[i].aos_stride << 8) | + (rmesa->state.aos[i + 1].aos_size << 16) | + (rmesa->state.aos[i + 1].aos_stride << 24)); - if(elt_size == 4){ - e32(vertex_count /*+ addr_a/4*/); /* Total number of dwords needed? */ - } else { - e32(magic_2); /* Total number of dwords needed? */ + e32(rmesa->state.aos[i].aos_offset + offset * 4 * rmesa->state.aos[i].aos_stride); + e32(rmesa->state.aos[i + 1].aos_offset + offset * 4 * rmesa->state.aos[i + 1].aos_stride); } - //cp_delay(rmesa, 1); -#if 0 - fprintf(stderr, "magic_1 %d\n", magic_1); - fprintf(stderr, "t_addr %x\n", t_addr); - fprintf(stderr, "magic_2 %d\n", magic_2); - exit(1); -#endif -#else - (void)magic_2, (void)magic_1, (void)t_addr; - addr_a = 0; - - check_space(6); - - start_packet3(RADEON_CP_PACKET3_3D_DRAW_INDX_2, 0); - if(elt_size == 4){ - e32(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (vertex_count<<16) | type | R300_VAP_VF_CNTL__INDEX_SIZE_32bit); - } else { - e32(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (vertex_count<<16) | type); + if (nr & 1) { + e32((rmesa->state.aos[nr - 1].aos_size << 0) | + (rmesa->state.aos[nr - 1].aos_stride << 8)); + e32(rmesa->state.aos[nr - 1].aos_offset + offset * 4 * rmesa->state.aos[nr - 1].aos_stride); } +} - start_packet3(RADEON_CP_PACKET3_INDX_BUFFER, 2); - e32(R300_EB_UNK1 | (0 << 16) | R300_EB_UNK2); - e32(addr /*& 0xffffffe3*/); +static void r300FireAOS(r300ContextPtr rmesa, int vertex_count, int type) +{ + int cmd_reserved = 0; + int cmd_written = 0; + drm_radeon_cmd_header_t *cmd = NULL; - if(elt_size == 4){ - e32(vertex_count /*+ addr_a/4*/); /* Total number of dwords needed? */ - } else { - e32((vertex_count+1)/2 /*+ addr_a/4*/); /* Total number of dwords needed? */ - } - //cp_delay(rmesa, 1); -#endif + start_packet3(CP_PACKET3(R300_PACKET3_3D_DRAW_VBUF_2, 0), 0); + e32(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (vertex_count << 16) | type); } -static void r300_render_vb_primitive(r300ContextPtr rmesa, - GLcontext *ctx, - int start, - int end, - int prim) +static void r300RunRenderPrimitive(r300ContextPtr rmesa, GLcontext * ctx, + int start, int end, int prim) { - int type, num_verts; - - type=r300_get_primitive_type(rmesa, ctx, prim); - num_verts=r300_get_num_verts(rmesa, end-start, prim); + int type, num_verts; + TNLcontext *tnl = TNL_CONTEXT(ctx); + struct vertex_buffer *vb = &tnl->vb; - if(type<0 || num_verts <= 0)return; + type = r300PrimitiveType(rmesa, prim); + num_verts = r300NumVerts(rmesa, end - start, prim); - if(rmesa->state.VB.Elts){ - r300EmitAOS(rmesa, rmesa->state.aos_count, /*0*/start); -#if 0 - int cmd_reserved = 0; - int cmd_written = 0; - drm_radeon_cmd_header_t *cmd = NULL; - int i; - start_index32_packet(num_verts, type); - for(i=0; i < num_verts; i++) - e32(((unsigned long *)rmesa->state.VB.Elts)[i]/*rmesa->state.Elts[start+i]*/); /* start ? */ -#else - if(num_verts == 1){ - //start_index32_packet(num_verts, type); - //e32(rmesa->state.Elts[start]); + if (type < 0 || num_verts <= 0) return; - } - if(num_verts > 65535){ /* not implemented yet */ - WARN_ONCE("Too many elts\n"); - return; + if (vb->Elts) { + r300EmitAOS(rmesa, rmesa->state.aos_count, start); + if (num_verts > 65535) { + /* not implemented yet */ + WARN_ONCE("Too many elts\n"); + return; + } + r300EmitElts(ctx, vb->Elts, num_verts); + r300FireEB(rmesa, rmesa->state.elt_dma.aos_offset, num_verts, type); + } else { + r300EmitAOS(rmesa, rmesa->state.aos_count, start); + r300FireAOS(rmesa, num_verts, type); } - - r300EmitElts(ctx, rmesa->state.VB.Elts, num_verts, rmesa->state.VB.elt_size); - fire_EB(rmesa, rmesa->state.elt_dma.aos_offset, num_verts, type, rmesa->state.VB.elt_size); -#endif - }else{ - r300EmitAOS(rmesa, rmesa->state.aos_count, start); - fire_AOS(rmesa, num_verts, type); - } } -GLboolean r300_run_vb_render(GLcontext *ctx, - struct tnl_pipeline_stage *stage) +static GLboolean r300RunRender(GLcontext * ctx, + struct tnl_pipeline_stage *stage) { r300ContextPtr rmesa = R300_CONTEXT(ctx); - struct radeon_vertex_buffer *VB = &rmesa->state.VB; int i; - int cmd_reserved = 0; - int cmd_written = 0; - drm_radeon_cmd_header_t *cmd = NULL; + TNLcontext *tnl = TNL_CONTEXT(ctx); + struct vertex_buffer *vb = &tnl->vb; if (RADEON_DEBUG & DEBUG_PRIMS) fprintf(stderr, "%s\n", __FUNCTION__); - if (stage) { - TNLcontext *tnl = TNL_CONTEXT(ctx); - radeon_vb_to_rvb(rmesa, VB, &tnl->vb); - } - r300UpdateShaders(rmesa); if (r300EmitArrays(ctx)) return GL_TRUE; r300UpdateShaderStates(rmesa); - reg_start(R300_RB3D_DSTCACHE_CTLSTAT,0); - e32(R300_RB3D_DSTCACHE_UNKNOWN_0A); - - reg_start(R300_RB3D_ZCACHE_CTLSTAT,0); - e32(R300_RB3D_ZCACHE_UNKNOWN_03); - + r300EmitCacheFlush(rmesa); r300EmitState(rmesa); - for(i=0; i < VB->PrimitiveCount; i++){ - GLuint prim = _tnl_translate_prim(&VB->Primitive[i]); - GLuint start = VB->Primitive[i].start; - GLuint length = VB->Primitive[i].count; - - r300_render_vb_primitive(rmesa, ctx, start, start + length, prim); + for (i = 0; i < vb->PrimitiveCount; i++) { + GLuint prim = _tnl_translate_prim(&vb->Primitive[i]); + GLuint start = vb->Primitive[i].start; + GLuint end = vb->Primitive[i].start + vb->Primitive[i].count; + r300RunRenderPrimitive(rmesa, ctx, start, end, prim); } - reg_start(R300_RB3D_DSTCACHE_CTLSTAT,0); - e32(R300_RB3D_DSTCACHE_UNKNOWN_0A /*R300_RB3D_DSTCACHE_UNKNOWN_02*/); - - reg_start(R300_RB3D_ZCACHE_CTLSTAT,0); - e32(R300_RB3D_ZCACHE_UNKNOWN_03 /*R300_RB3D_ZCACHE_UNKNOWN_01*/); + r300EmitCacheFlush(rmesa); #ifdef USER_BUFFERS r300UseArrays(ctx); #endif + r300ReleaseArrays(ctx); + return GL_FALSE; } @@ -382,89 +331,47 @@ GLboolean r300_run_vb_render(GLcontext *ctx, } \ } while(0) -int r300Fallback(GLcontext *ctx) +static int r300Fallback(GLcontext * ctx) { r300ContextPtr r300 = R300_CONTEXT(ctx); - struct r300_fragment_program *rp = - (struct r300_fragment_program *) - (char *)ctx->FragmentProgram._Current; - int i; + struct r300_fragment_program *fp = (struct r300_fragment_program *) + (char *)ctx->FragmentProgram._Current; - if (rp) { - if (!rp->translated) - r300_translate_fragment_shader(r300, rp); - - FALLBACK_IF(!rp->translated); + if (fp) { + if (!fp->translated) + r300TranslateFragmentShader(r300, fp); + FALLBACK_IF(!fp->translated); } - /* We do not do SELECT or FEEDBACK (yet ?) - * Is it worth doing them ? - */ FALLBACK_IF(ctx->RenderMode != GL_RENDER); -#if 0 - /* These should work now.. */ - FALLBACK_IF(ctx->Color.DitherFlag); - /* GL_ALPHA_TEST */ - FALLBACK_IF(ctx->Color.AlphaEnabled); - /* GL_BLEND */ - FALLBACK_IF(ctx->Color.BlendEnabled); - /* GL_POLYGON_OFFSET_FILL */ - FALLBACK_IF(ctx->Polygon.OffsetFill); - /* FOG seems to trigger an unknown output - * in vertex program. - */ - FALLBACK_IF(ctx->Fog.Enabled); -#endif - FALLBACK_IF(ctx->Stencil._TestTwoSide && - (ctx->Stencil.Ref[0] != ctx->Stencil.Ref[1] || - ctx->Stencil.ValueMask[0] != ctx->Stencil.ValueMask[1] || - ctx->Stencil.WriteMask[0] != ctx->Stencil.WriteMask[1])); - - if(!r300->disable_lowimpact_fallback){ - /* GL_POLYGON_OFFSET_POINT */ - FALLBACK_IF(ctx->Polygon.OffsetPoint); - /* GL_POLYGON_OFFSET_LINE */ - FALLBACK_IF(ctx->Polygon.OffsetLine); -#if 0 - /* GL_STENCIL_TEST */ - FALLBACK_IF(ctx->Stencil.Enabled); - /* GL_POLYGON_SMOOTH disabling to get blender going */ - FALLBACK_IF(ctx->Polygon.SmoothFlag); -#endif - /* GL_POLYGON_STIPPLE */ + FALLBACK_IF(ctx->Stencil._TestTwoSide + && (ctx->Stencil.Ref[0] != ctx->Stencil.Ref[1] + || ctx->Stencil.ValueMask[0] != + ctx->Stencil.ValueMask[1] + || ctx->Stencil.WriteMask[0] != + ctx->Stencil.WriteMask[1])); + + FALLBACK_IF(ctx->Color.ColorLogicOpEnabled); + + if (ctx->Extensions.NV_point_sprite || ctx->Extensions.ARB_point_sprite) + FALLBACK_IF(ctx->Point.PointSprite); + + if (!r300->disable_lowimpact_fallback) { FALLBACK_IF(ctx->Polygon.StippleFlag); - /* GL_MULTISAMPLE_ARB */ FALLBACK_IF(ctx->Multisample.Enabled); - /* blender ? */ FALLBACK_IF(ctx->Line.StippleFlag); - /* GL_LINE_SMOOTH */ FALLBACK_IF(ctx->Line.SmoothFlag); - /* GL_POINT_SMOOTH */ FALLBACK_IF(ctx->Point.SmoothFlag); } - /* Fallback for LOGICOP */ - FALLBACK_IF(ctx->Color.ColorLogicOpEnabled); - - /* Rest could be done with vertex fragments */ - if (ctx->Extensions.NV_point_sprite || - ctx->Extensions.ARB_point_sprite) - /* GL_POINT_SPRITE_NV */ - FALLBACK_IF(ctx->Point.PointSprite); - return R300_FALLBACK_NONE; } -/** - * Called by the pipeline manager to render a batch of primitives. - * We can return true to pass on to the next stage (i.e. software - * rasterization) or false to indicate that the pipeline has finished - * after we render something. - */ -static GLboolean r300_run_render(GLcontext *ctx, - struct tnl_pipeline_stage *stage) +static GLboolean r300RunNonTCLRender(GLcontext * ctx, + struct tnl_pipeline_stage *stage) { + r300ContextPtr rmesa = R300_CONTEXT(ctx); if (RADEON_DEBUG & DEBUG_PRIMS) fprintf(stderr, "%s\n", __FUNCTION__); @@ -472,29 +379,24 @@ static GLboolean r300_run_render(GLcontext *ctx, if (r300Fallback(ctx) >= R300_FALLBACK_RAST) return GL_TRUE; - return r300_run_vb_render(ctx, stage); -} + if (!(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) + return GL_TRUE; -const struct tnl_pipeline_stage _r300_render_stage = { - "r300 hw rasterize", - NULL, - NULL, - NULL, - NULL, - r300_run_render /* run */ -}; + return r300RunRender(ctx, stage); +} -static GLboolean r300_run_tcl_render(GLcontext *ctx, - struct tnl_pipeline_stage *stage) +static GLboolean r300RunTCLRender(GLcontext * ctx, + struct tnl_pipeline_stage *stage) { r300ContextPtr rmesa = R300_CONTEXT(ctx); struct r300_vertex_program *vp; - hw_tcl_on=future_hw_tcl_on; + hw_tcl_on = future_hw_tcl_on; if (RADEON_DEBUG & DEBUG_PRIMS) fprintf(stderr, "%s\n", __FUNCTION__); - if(hw_tcl_on == GL_FALSE) + + if (hw_tcl_on == GL_FALSE) return GL_TRUE; if (r300Fallback(ctx) >= R300_FALLBACK_TCL) { @@ -505,42 +407,28 @@ static GLboolean r300_run_tcl_render(GLcontext *ctx, r300UpdateShaders(rmesa); vp = (struct r300_vertex_program *)CURRENT_VERTEX_SHADER(ctx); -#if 0 /* Draw every second request with software arb vp */ - vp->native++; - vp->native &= 1; - //vp->native = GL_FALSE; -#endif - -#if 0 /* You dont want to know what this does... */ - TNLcontext *tnl = TNL_CONTEXT(ctx); - struct tnl_cache *cache; - struct tnl_cache_item *c; - - cache = tnl->vp_cache; - c = cache->items[0xc000cc0e % cache->size]; - - if(c && c->data == vp) - vp->native = GL_FALSE; - -#endif -#if 0 - vp->native = GL_FALSE; -#endif if (vp->native == GL_FALSE) { hw_tcl_on = GL_FALSE; return GL_TRUE; } - //r300UpdateShaderStates(rmesa); - return r300_run_vb_render(ctx, stage); + return r300RunRender(ctx, stage); } -const struct tnl_pipeline_stage _r300_tcl_stage = { - "r300 tcl", +const struct tnl_pipeline_stage _r300_render_stage = { + "r300 Hardware Rasterization", NULL, NULL, NULL, NULL, - r300_run_tcl_render /* run */ + r300RunNonTCLRender }; +const struct tnl_pipeline_stage _r300_tcl_stage = { + "r300 Hardware Transform, Clipping and Lighting", + NULL, + NULL, + NULL, + NULL, + r300RunTCLRender +}; diff --git a/src/mesa/drivers/dri/r300/r300_shader.c b/src/mesa/drivers/dri/r300/r300_shader.c index 41c07a3188..5f5ac7c4c7 100644 --- a/src/mesa/drivers/dri/r300/r300_shader.c +++ b/src/mesa/drivers/dri/r300/r300_shader.c @@ -7,82 +7,68 @@ #include "r300_context.h" #include "r300_fragprog.h" -static void -r300BindProgram(GLcontext *ctx, GLenum target, struct gl_program *prog) -{ - switch(target){ - case GL_VERTEX_PROGRAM_ARB: - case GL_FRAGMENT_PROGRAM_ARB: - break; - default: - WARN_ONCE("Target not supported yet!\n"); - break; - } -} - -static struct gl_program * -r300NewProgram(GLcontext *ctx, GLenum target, GLuint id) +static struct gl_program *r300NewProgram(GLcontext * ctx, GLenum target, + GLuint id) { struct r300_vertex_program_cont *vp; struct r300_fragment_program *fp; - - switch(target){ - case GL_VERTEX_STATE_PROGRAM_NV: - case GL_VERTEX_PROGRAM_ARB: - vp=CALLOC_STRUCT(r300_vertex_program_cont); - return _mesa_init_vertex_program(ctx, &vp->mesa_program, target, id); - case GL_FRAGMENT_PROGRAM_ARB: - fp=CALLOC_STRUCT(r300_fragment_program); - fp->ctx = ctx; - return _mesa_init_fragment_program(ctx, &fp->mesa_program, target, id); - case GL_FRAGMENT_PROGRAM_NV: - fp=CALLOC_STRUCT(r300_fragment_program); - return _mesa_init_fragment_program(ctx, &fp->mesa_program, target, id); - default: - _mesa_problem(ctx, "Bad target in r300NewProgram"); + + switch (target) { + case GL_VERTEX_STATE_PROGRAM_NV: + case GL_VERTEX_PROGRAM_ARB: + vp = CALLOC_STRUCT(r300_vertex_program_cont); + return _mesa_init_vertex_program(ctx, &vp->mesa_program, + target, id); + case GL_FRAGMENT_PROGRAM_ARB: + fp = CALLOC_STRUCT(r300_fragment_program); + fp->ctx = ctx; + return _mesa_init_fragment_program(ctx, &fp->mesa_program, + target, id); + case GL_FRAGMENT_PROGRAM_NV: + fp = CALLOC_STRUCT(r300_fragment_program); + return _mesa_init_fragment_program(ctx, &fp->mesa_program, + target, id); + default: + _mesa_problem(ctx, "Bad target in r300NewProgram"); } - - return NULL; + + return NULL; } -static void -r300DeleteProgram(GLcontext *ctx, struct gl_program *prog) +static void r300DeleteProgram(GLcontext * ctx, struct gl_program *prog) { _mesa_delete_program(ctx, prog); } static void -r300ProgramStringNotify(GLcontext *ctx, GLenum target, struct gl_program *prog) +r300ProgramStringNotify(GLcontext * ctx, GLenum target, struct gl_program *prog) { - struct r300_vertex_program_cont *vp=(void *)prog; - struct r300_fragment_program *fp = (struct r300_fragment_program *) prog; - - switch(target) { + struct r300_vertex_program_cont *vp = (void *)prog; + struct r300_fragment_program *fp = (struct r300_fragment_program *)prog; + + switch (target) { case GL_VERTEX_PROGRAM_ARB: vp->progs = NULL; - /*vp->translated = GL_FALSE; - memset(&vp->translated, 0, sizeof(struct r300_vertex_program) - sizeof(struct gl_vertex_program));*/ - /*r300_translate_vertex_shader(vp);*/ - break; + break; case GL_FRAGMENT_PROGRAM_ARB: fp->translated = GL_FALSE; - break; + break; } + /* need this for tcl fallbacks */ _tnl_program_string(ctx, target, prog); } static GLboolean -r300IsProgramNative(GLcontext *ctx, GLenum target, struct gl_program *prog) +r300IsProgramNative(GLcontext * ctx, GLenum target, struct gl_program *prog) { - return 1; + return GL_TRUE; } void r300InitShaderFuncs(struct dd_function_table *functions) { - functions->NewProgram=r300NewProgram; - functions->BindProgram=r300BindProgram; - functions->DeleteProgram=r300DeleteProgram; - functions->ProgramStringNotify=r300ProgramStringNotify; - functions->IsProgramNative=r300IsProgramNative; + functions->NewProgram = r300NewProgram; + functions->DeleteProgram = r300DeleteProgram; + functions->ProgramStringNotify = r300ProgramStringNotify; + functions->IsProgramNative = r300IsProgramNative; } diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c index 870d683f00..b5cf21d644 100644 --- a/src/mesa/drivers/dri/r300/r300_state.c +++ b/src/mesa/drivers/dri/r300/r300_state.c @@ -29,9 +29,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ -/* - * Authors: - * Nicolai Haehnle <prefect_@gmx.net> +/** + * \file + * + * \author Nicolai Haehnle <prefect_@gmx.net> */ #include "glheader.h" @@ -58,14 +59,15 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "r300_ioctl.h" #include "r300_state.h" #include "r300_reg.h" -#include "r300_program.h" #include "r300_emit.h" #include "r300_fragprog.h" #include "r300_tex.h" -#include "r300_maos.h" #include "drirenderbuffer.h" +extern int future_hw_tcl_on; +extern void _tnl_UpdateFixedFunctionProgram(GLcontext * ctx); + static void r300BlendColor(GLcontext * ctx, const GLfloat cf[4]) { GLubyte color[4]; @@ -78,8 +80,8 @@ static void r300BlendColor(GLcontext * ctx, const GLfloat cf[4]) CLAMPED_FLOAT_TO_UBYTE(color[2], cf[2]); CLAMPED_FLOAT_TO_UBYTE(color[3], cf[3]); - rmesa->hw.blend_color.cmd[1] = r300PackColor(4, color[3], color[0], - color[1], color[2]); + rmesa->hw.blend_color.cmd[1] = PACK_COLOR_8888(color[3], color[0], + color[1], color[2]); } /** @@ -98,60 +100,58 @@ static void r300BlendColor(GLcontext * ctx, const GLfloat cf[4]) */ static int blend_factor(GLenum factor, GLboolean is_src) { - int func; - switch (factor) { case GL_ZERO: - func = R300_BLEND_GL_ZERO; + return R300_BLEND_GL_ZERO; break; case GL_ONE: - func = R300_BLEND_GL_ONE; + return R300_BLEND_GL_ONE; break; case GL_DST_COLOR: - func = R300_BLEND_GL_DST_COLOR; + return R300_BLEND_GL_DST_COLOR; break; case GL_ONE_MINUS_DST_COLOR: - func = R300_BLEND_GL_ONE_MINUS_DST_COLOR; + return R300_BLEND_GL_ONE_MINUS_DST_COLOR; break; case GL_SRC_COLOR: - func = R300_BLEND_GL_SRC_COLOR; + return R300_BLEND_GL_SRC_COLOR; break; case GL_ONE_MINUS_SRC_COLOR: - func = R300_BLEND_GL_ONE_MINUS_SRC_COLOR; + return R300_BLEND_GL_ONE_MINUS_SRC_COLOR; break; case GL_SRC_ALPHA: - func = R300_BLEND_GL_SRC_ALPHA; + return R300_BLEND_GL_SRC_ALPHA; break; case GL_ONE_MINUS_SRC_ALPHA: - func = R300_BLEND_GL_ONE_MINUS_SRC_ALPHA; + return R300_BLEND_GL_ONE_MINUS_SRC_ALPHA; break; case GL_DST_ALPHA: - func = R300_BLEND_GL_DST_ALPHA; + return R300_BLEND_GL_DST_ALPHA; break; case GL_ONE_MINUS_DST_ALPHA: - func = R300_BLEND_GL_ONE_MINUS_DST_ALPHA; + return R300_BLEND_GL_ONE_MINUS_DST_ALPHA; break; case GL_SRC_ALPHA_SATURATE: - func = (is_src) ? R300_BLEND_GL_SRC_ALPHA_SATURATE : - R300_BLEND_GL_ZERO; + return (is_src) ? R300_BLEND_GL_SRC_ALPHA_SATURATE : + R300_BLEND_GL_ZERO; break; case GL_CONSTANT_COLOR: - func = R300_BLEND_GL_CONST_COLOR; + return R300_BLEND_GL_CONST_COLOR; break; case GL_ONE_MINUS_CONSTANT_COLOR: - func = R300_BLEND_GL_ONE_MINUS_CONST_COLOR; + return R300_BLEND_GL_ONE_MINUS_CONST_COLOR; break; case GL_CONSTANT_ALPHA: - func = R300_BLEND_GL_CONST_ALPHA; + return R300_BLEND_GL_CONST_ALPHA; break; case GL_ONE_MINUS_CONSTANT_ALPHA: - func = R300_BLEND_GL_ONE_MINUS_CONST_ALPHA; + return R300_BLEND_GL_ONE_MINUS_CONST_ALPHA; break; default: fprintf(stderr, "unknown blend factor %x\n", factor); - func = (is_src) ? R300_BLEND_GL_ONE : R300_BLEND_GL_ZERO; + return (is_src) ? R300_BLEND_GL_ONE : R300_BLEND_GL_ZERO; + break; } - return func; } /** @@ -166,12 +166,15 @@ static int blend_factor(GLenum factor, GLboolean is_src) */ /* helper function */ -static void r300_set_blend_cntl(r300ContextPtr r300, int func, int eqn, int cbits, int funcA, int eqnA) +static void r300SetBlendCntl(r300ContextPtr r300, int func, int eqn, + int cbits, int funcA, int eqnA) { GLuint new_ablend, new_cblend; #if 0 - fprintf(stderr, "eqnA=%08x funcA=%08x eqn=%08x func=%08x cbits=%08x\n", eqnA, funcA, eqn, func, cbits); + fprintf(stderr, + "eqnA=%08x funcA=%08x eqn=%08x func=%08x cbits=%08x\n", + eqnA, funcA, eqn, func, cbits); #endif new_ablend = eqnA | funcA; new_cblend = eqn | func; @@ -184,21 +187,20 @@ static void r300_set_blend_cntl(r300ContextPtr r300, int func, int eqn, int cbit */ #if 0 if (new_ablend == new_cblend) { - new_cblend |= R300_BLEND_NO_SEPARATE; + new_cblend |= R300_BLEND_NO_SEPARATE; } #endif new_cblend |= cbits; - if((new_ablend != r300->hw.bld.cmd[R300_BLD_ABLEND]) || - (new_cblend != r300->hw.bld.cmd[R300_BLD_CBLEND])) { + if ((new_ablend != r300->hw.bld.cmd[R300_BLD_ABLEND]) || + (new_cblend != r300->hw.bld.cmd[R300_BLD_CBLEND])) { R300_STATECHANGE(r300, bld); - r300->hw.bld.cmd[R300_BLD_ABLEND]=new_ablend; - r300->hw.bld.cmd[R300_BLD_CBLEND]=new_cblend; + r300->hw.bld.cmd[R300_BLD_ABLEND] = new_ablend; + r300->hw.bld.cmd[R300_BLD_CBLEND] = new_cblend; } } - -static void r300_set_blend_state(GLcontext * ctx) +static void r300SetBlendState(GLcontext * ctx) { r300ContextPtr r300 = R300_CONTEXT(ctx); int func = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) | @@ -209,14 +211,15 @@ static void r300_set_blend_state(GLcontext * ctx) int eqnA = R300_COMB_FCN_ADD_CLAMP; if (RGBA_LOGICOP_ENABLED(ctx) || !ctx->Color.BlendEnabled) { - r300_set_blend_cntl(r300, - func, eqn, 0, - func, eqn); + r300SetBlendCntl(r300, func, eqn, 0, func, eqn); return; } - func = (blend_factor(ctx->Color.BlendSrcRGB, GL_TRUE) << R300_SRC_BLEND_SHIFT) | - (blend_factor(ctx->Color.BlendDstRGB, GL_FALSE) << R300_DST_BLEND_SHIFT); + func = + (blend_factor(ctx->Color.BlendSrcRGB, GL_TRUE) << + R300_SRC_BLEND_SHIFT) | (blend_factor(ctx->Color.BlendDstRGB, + GL_FALSE) << + R300_DST_BLEND_SHIFT); switch (ctx->Color.BlendEquationRGB) { case GL_FUNC_ADD: @@ -246,13 +249,15 @@ static void r300_set_blend_state(GLcontext * ctx) default: fprintf(stderr, "[%s:%u] Invalid RGB blend equation (0x%04x).\n", - __func__, __LINE__, ctx->Color.BlendEquationRGB); + __FUNCTION__, __LINE__, ctx->Color.BlendEquationRGB); return; } - - funcA = (blend_factor(ctx->Color.BlendSrcA, GL_TRUE) << R300_SRC_BLEND_SHIFT) | - (blend_factor(ctx->Color.BlendDstA, GL_FALSE) << R300_DST_BLEND_SHIFT); + funcA = + (blend_factor(ctx->Color.BlendSrcA, GL_TRUE) << + R300_SRC_BLEND_SHIFT) | (blend_factor(ctx->Color.BlendDstA, + GL_FALSE) << + R300_DST_BLEND_SHIFT); switch (ctx->Color.BlendEquationA) { case GL_FUNC_ADD: @@ -280,33 +285,34 @@ static void r300_set_blend_state(GLcontext * ctx) break; default: - fprintf(stderr, "[%s:%u] Invalid A blend equation (0x%04x).\n", - __func__, __LINE__, ctx->Color.BlendEquationA); + fprintf(stderr, + "[%s:%u] Invalid A blend equation (0x%04x).\n", + __FUNCTION__, __LINE__, ctx->Color.BlendEquationA); return; } - r300_set_blend_cntl(r300, - func, eqn, R300_BLEND_UNKNOWN | R300_BLEND_ENABLE, - funcA, eqnA); + r300SetBlendCntl(r300, + func, eqn, + R300_BLEND_UNKNOWN | R300_BLEND_ENABLE, funcA, eqnA); } static void r300BlendEquationSeparate(GLcontext * ctx, GLenum modeRGB, GLenum modeA) { - r300_set_blend_state(ctx); + r300SetBlendState(ctx); } static void r300BlendFuncSeparate(GLcontext * ctx, GLenum sfactorRGB, GLenum dfactorRGB, GLenum sfactorA, GLenum dfactorA) { - r300_set_blend_state(ctx); + r300SetBlendState(ctx); } /** * Update our tracked culling state based on Mesa's state. */ -static void r300UpdateCulling(GLcontext* ctx) +static void r300UpdateCulling(GLcontext * ctx) { r300ContextPtr r300 = R300_CONTEXT(ctx); uint32_t val = 0; @@ -314,7 +320,7 @@ static void r300UpdateCulling(GLcontext* ctx) R300_STATECHANGE(r300, cul); if (ctx->Polygon.CullFlag) { if (ctx->Polygon.CullFaceMode == GL_FRONT_AND_BACK) - val = R300_CULL_FRONT|R300_CULL_BACK; + val = R300_CULL_FRONT | R300_CULL_BACK; else if (ctx->Polygon.CullFaceMode == GL_FRONT) val = R300_CULL_FRONT; else @@ -328,13 +334,13 @@ static void r300UpdateCulling(GLcontext* ctx) r300->hw.cul.cmd[R300_CUL_CULL] = val; } -static void update_early_z(GLcontext *ctx) +static void r300SetEarlyZState(GLcontext * ctx) { /* updates register R300_RB3D_EARLY_Z (0x4F14) if depth test is not enabled it should be R300_EARLY_Z_DISABLE if depth is enabled and alpha not it should be R300_EARLY_Z_ENABLE if depth and alpha is enabled it should be R300_EARLY_Z_DISABLE - */ + */ r300ContextPtr r300 = R300_CONTEXT(ctx); R300_STATECHANGE(r300, zstencil_format); @@ -351,7 +357,7 @@ static void update_early_z(GLcontext *ctx) } } -static void update_alpha(GLcontext *ctx) +static void r300SetAlphaState(GLcontext * ctx) { r300ContextPtr r300 = R300_CONTEXT(ctx); GLubyte refByte; @@ -383,7 +389,7 @@ static void update_alpha(GLcontext *ctx) pp_misc |= R300_ALPHA_TEST_GEQUAL; break; case GL_ALWAYS: - /*pp_misc |= R300_ALPHA_TEST_PASS;*/ + /*pp_misc |= R300_ALPHA_TEST_PASS; */ really_enabled = GL_FALSE; break; } @@ -395,17 +401,17 @@ static void update_alpha(GLcontext *ctx) pp_misc = 0x0; } - R300_STATECHANGE(r300, at); r300->hw.at.cmd[R300_AT_ALPHA_TEST] = pp_misc; - update_early_z(ctx); + + r300SetEarlyZState(ctx); } static void r300AlphaFunc(GLcontext * ctx, GLenum func, GLfloat ref) { - (void) func; - (void) ref; - update_alpha(ctx); + (void)func; + (void)ref; + r300SetAlphaState(ctx); } static int translate_func(int func) @@ -431,126 +437,38 @@ static int translate_func(int func) return 0; } -static void update_depth(GLcontext* ctx) +static void r300SetDepthState(GLcontext * ctx) { r300ContextPtr r300 = R300_CONTEXT(ctx); R300_STATECHANGE(r300, zs); r300->hw.zs.cmd[R300_ZS_CNTL_0] &= R300_RB3D_STENCIL_ENABLE; - r300->hw.zs.cmd[R300_ZS_CNTL_1] &= ~(R300_ZS_MASK << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT); + r300->hw.zs.cmd[R300_ZS_CNTL_1] &= + ~(R300_ZS_MASK << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT); if (ctx->Depth.Test && ctx->Depth.Func != GL_NEVER) { if (ctx->Depth.Mask) - r300->hw.zs.cmd[R300_ZS_CNTL_0] |= R300_RB3D_Z_TEST_AND_WRITE; + r300->hw.zs.cmd[R300_ZS_CNTL_0] |= + R300_RB3D_Z_TEST_AND_WRITE; else r300->hw.zs.cmd[R300_ZS_CNTL_0] |= R300_RB3D_Z_TEST; - r300->hw.zs.cmd[R300_ZS_CNTL_1] |= translate_func(ctx->Depth.Func) << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT; + r300->hw.zs.cmd[R300_ZS_CNTL_1] |= + translate_func(ctx->Depth. + Func) << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT; } else { r300->hw.zs.cmd[R300_ZS_CNTL_0] |= R300_RB3D_Z_DISABLED_1; - r300->hw.zs.cmd[R300_ZS_CNTL_1] |= translate_func(GL_NEVER) << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT; + r300->hw.zs.cmd[R300_ZS_CNTL_1] |= + translate_func(GL_NEVER) << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT; } - update_early_z(ctx); -} - -/** - * Handle glEnable()/glDisable(). - * - * \note Mesa already filters redundant calls to glEnable/glDisable. - */ -static void r300Enable(GLcontext* ctx, GLenum cap, GLboolean state) -{ - r300ContextPtr r300 = R300_CONTEXT(ctx); - - if (RADEON_DEBUG & DEBUG_STATE) - fprintf(stderr, "%s( %s = %s )\n", __FUNCTION__, - _mesa_lookup_enum_by_nr(cap), - state ? "GL_TRUE" : "GL_FALSE"); - - switch (cap) { - /* Fast track this one... - */ - case GL_TEXTURE_1D: - case GL_TEXTURE_2D: - case GL_TEXTURE_3D: - break; - - case GL_FOG: - R300_STATECHANGE(r300, fogs); - if (state) { - r300->hw.fogs.cmd[R300_FOGS_STATE] |= - R300_FOG_ENABLE; - - ctx->Driver.Fogfv( ctx, GL_FOG_MODE, NULL ); - ctx->Driver.Fogfv( ctx, GL_FOG_DENSITY, &ctx->Fog.Density ); - ctx->Driver.Fogfv( ctx, GL_FOG_START, &ctx->Fog.Start ); - ctx->Driver.Fogfv( ctx, GL_FOG_END, &ctx->Fog.End ); - ctx->Driver.Fogfv( ctx, GL_FOG_COLOR, ctx->Fog.Color ); - } else { - r300->hw.fogs.cmd[R300_FOGS_STATE] &= - ~R300_FOG_ENABLE; - } - - break; - - case GL_ALPHA_TEST: - update_alpha(ctx); - break; - - case GL_BLEND: - case GL_COLOR_LOGIC_OP: - r300_set_blend_state(ctx); - break; - - case GL_DEPTH_TEST: - update_depth(ctx); - break; - - case GL_STENCIL_TEST: - if (r300->state.stencil.hw_stencil) { - R300_STATECHANGE(r300, zs); - if (state) { - r300->hw.zs.cmd[R300_ZS_CNTL_0] |= - R300_RB3D_STENCIL_ENABLE; - } else { - r300->hw.zs.cmd[R300_ZS_CNTL_0] &= - ~R300_RB3D_STENCIL_ENABLE; - } - } else { -#if R200_MERGED - FALLBACK(&r300->radeon, RADEON_FALLBACK_STENCIL, state); -#endif - } - break; - - case GL_CULL_FACE: - r300UpdateCulling(ctx); - break; - - case GL_POLYGON_OFFSET_POINT: - case GL_POLYGON_OFFSET_LINE: - break; - - case GL_POLYGON_OFFSET_FILL: - R300_STATECHANGE(r300, occlusion_cntl); - if(state){ - r300->hw.occlusion_cntl.cmd[1] |= (3<<0); - } else { - r300->hw.occlusion_cntl.cmd[1] &= ~(3<<0); - } - break; - default: - radeonEnable(ctx, cap, state); - return; - } + r300SetEarlyZState(ctx); } - -static void r300UpdatePolygonMode(GLcontext *ctx) +static void r300UpdatePolygonMode(GLcontext * ctx) { r300ContextPtr r300 = R300_CONTEXT(ctx); - uint32_t hw_mode=0; + uint32_t hw_mode = 0; if (ctx->Polygon.FrontMode != GL_FILL || ctx->Polygon.BackMode != GL_FILL) { @@ -569,25 +487,25 @@ static void r300UpdatePolygonMode(GLcontext *ctx) switch (f) { case GL_LINE: hw_mode |= R300_PM_FRONT_LINE; - break; - case GL_POINT: /* noop */ + break; + case GL_POINT: /* noop */ hw_mode |= R300_PM_FRONT_POINT; - break; + break; case GL_FILL: hw_mode |= R300_PM_FRONT_FILL; - break; + break; } switch (b) { case GL_LINE: hw_mode |= R300_PM_BACK_LINE; - break; - case GL_POINT: /* noop */ + break; + case GL_POINT: /* noop */ hw_mode |= R300_PM_BACK_POINT; - break; + break; case GL_FILL: hw_mode |= R300_PM_BACK_FILL; - break; + break; } } @@ -602,20 +520,19 @@ static void r300UpdatePolygonMode(GLcontext *ctx) * * \note Mesa already filters redundant calls to this function. */ -static void r300CullFace(GLcontext* ctx, GLenum mode) +static void r300CullFace(GLcontext * ctx, GLenum mode) { (void)mode; r300UpdateCulling(ctx); } - /** * Change the polygon orientation. * * \note Mesa already filters redundant calls to this function. */ -static void r300FrontFace(GLcontext* ctx, GLenum mode) +static void r300FrontFace(GLcontext * ctx, GLenum mode) { (void)mode; @@ -623,42 +540,38 @@ static void r300FrontFace(GLcontext* ctx, GLenum mode) r300UpdatePolygonMode(ctx); } - /** * Change the depth testing function. * * \note Mesa already filters redundant calls to this function. */ -static void r300DepthFunc(GLcontext* ctx, GLenum func) +static void r300DepthFunc(GLcontext * ctx, GLenum func) { - (void) func; - update_depth(ctx); + (void)func; + r300SetDepthState(ctx); } - /** * Enable/Disable depth writing. * * \note Mesa already filters redundant calls to this function. */ -static void r300DepthMask(GLcontext* ctx, GLboolean mask) +static void r300DepthMask(GLcontext * ctx, GLboolean mask) { - (void) mask; - update_depth(ctx); + (void)mask; + r300SetDepthState(ctx); } - /** * Handle glColorMask() */ -static void r300ColorMask(GLcontext* ctx, +static void r300ColorMask(GLcontext * ctx, GLboolean r, GLboolean g, GLboolean b, GLboolean a) { r300ContextPtr r300 = R300_CONTEXT(ctx); int mask = (r ? R300_COLORMASK0_R : 0) | - (g ? R300_COLORMASK0_G : 0) | - (b ? R300_COLORMASK0_B : 0) | - (a ? R300_COLORMASK0_A : 0); + (g ? R300_COLORMASK0_G : 0) | + (b ? R300_COLORMASK0_B : 0) | (a ? R300_COLORMASK0_A : 0); if (mask != r300->hw.cmk.cmd[R300_CMK_COLORMASK]) { R300_STATECHANGE(r300, cmk); @@ -669,12 +582,15 @@ static void r300ColorMask(GLcontext* ctx, /* ============================================================= * Fog */ -static void r300Fogfv( GLcontext *ctx, GLenum pname, const GLfloat *param ) +static void r300Fogfv(GLcontext * ctx, GLenum pname, const GLfloat * param) { r300ContextPtr r300 = R300_CONTEXT(ctx); - union { int i; float f; } fogScale, fogStart; + union { + int i; + float f; + } fogScale, fogStart; - (void) param; + (void)param; fogScale.i = r300->hw.fogp.cmd[R300_FOGP_SCALE]; fogStart.i = r300->hw.fogp.cmd[R300_FOGP_START]; @@ -687,29 +603,37 @@ static void r300Fogfv( GLcontext *ctx, GLenum pname, const GLfloat *param ) case GL_LINEAR: R300_STATECHANGE(r300, fogs); r300->hw.fogs.cmd[R300_FOGS_STATE] = - (r300->hw.fogs.cmd[R300_FOGS_STATE] & ~R300_FOG_MODE_MASK) | R300_FOG_MODE_LINEAR; + (r300->hw.fogs. + cmd[R300_FOGS_STATE] & ~R300_FOG_MODE_MASK) | + R300_FOG_MODE_LINEAR; if (ctx->Fog.Start == ctx->Fog.End) { fogScale.f = -1.0; fogStart.f = 1.0; - } - else { - fogScale.f = 1.0 / (ctx->Fog.End-ctx->Fog.Start); - fogStart.f = -ctx->Fog.Start / (ctx->Fog.End-ctx->Fog.Start); + } else { + fogScale.f = + 1.0 / (ctx->Fog.End - ctx->Fog.Start); + fogStart.f = + -ctx->Fog.Start / (ctx->Fog.End - + ctx->Fog.Start); } break; case GL_EXP: R300_STATECHANGE(r300, fogs); r300->hw.fogs.cmd[R300_FOGS_STATE] = - (r300->hw.fogs.cmd[R300_FOGS_STATE] & ~R300_FOG_MODE_MASK) | R300_FOG_MODE_EXP; - fogScale.f = 0.0933*ctx->Fog.Density; + (r300->hw.fogs. + cmd[R300_FOGS_STATE] & ~R300_FOG_MODE_MASK) | + R300_FOG_MODE_EXP; + fogScale.f = 0.0933 * ctx->Fog.Density; fogStart.f = 0.0; break; case GL_EXP2: R300_STATECHANGE(r300, fogs); r300->hw.fogs.cmd[R300_FOGS_STATE] = - (r300->hw.fogs.cmd[R300_FOGS_STATE] & ~R300_FOG_MODE_MASK) | R300_FOG_MODE_EXP2; - fogScale.f = 0.3*ctx->Fog.Density; + (r300->hw.fogs. + cmd[R300_FOGS_STATE] & ~R300_FOG_MODE_MASK) | + R300_FOG_MODE_EXP2; + fogScale.f = 0.3 * ctx->Fog.Density; fogStart.f = 0.0; default: return; @@ -718,11 +642,11 @@ static void r300Fogfv( GLcontext *ctx, GLenum pname, const GLfloat *param ) case GL_FOG_DENSITY: switch (ctx->Fog.Mode) { case GL_EXP: - fogScale.f = 0.0933*ctx->Fog.Density; + fogScale.f = 0.0933 * ctx->Fog.Density; fogStart.f = 0.0; break; case GL_EXP2: - fogScale.f = 0.3*ctx->Fog.Density; + fogScale.f = 0.3 * ctx->Fog.Density; fogStart.f = 0.0; default: break; @@ -734,18 +658,23 @@ static void r300Fogfv( GLcontext *ctx, GLenum pname, const GLfloat *param ) if (ctx->Fog.Start == ctx->Fog.End) { fogScale.f = -1.0; fogStart.f = 1.0; - } - else { - fogScale.f = 1.0 / (ctx->Fog.End-ctx->Fog.Start); - fogStart.f = -ctx->Fog.Start / (ctx->Fog.End-ctx->Fog.Start); + } else { + fogScale.f = + 1.0 / (ctx->Fog.End - ctx->Fog.Start); + fogStart.f = + -ctx->Fog.Start / (ctx->Fog.End - + ctx->Fog.Start); } } break; case GL_FOG_COLOR: R300_STATECHANGE(r300, fogc); - r300->hw.fogc.cmd[R300_FOGC_R] = (GLuint) (ctx->Fog.Color[0]*1023.0F) & 0x3FF; - r300->hw.fogc.cmd[R300_FOGC_G] = (GLuint) (ctx->Fog.Color[1]*1023.0F) & 0x3FF; - r300->hw.fogc.cmd[R300_FOGC_B] = (GLuint) (ctx->Fog.Color[2]*1023.0F) & 0x3FF; + r300->hw.fogc.cmd[R300_FOGC_R] = + (GLuint) (ctx->Fog.Color[0] * 1023.0F) & 0x3FF; + r300->hw.fogc.cmd[R300_FOGC_G] = + (GLuint) (ctx->Fog.Color[1] * 1023.0F) & 0x3FF; + r300->hw.fogc.cmd[R300_FOGC_B] = + (GLuint) (ctx->Fog.Color[2] * 1023.0F) & 0x3FF; break; case GL_FOG_COORD_SRC: break; @@ -772,25 +701,25 @@ static void r300PointSize(GLcontext * ctx, GLfloat size) R300_STATECHANGE(r300, ps); r300->hw.ps.cmd[R300_PS_POINTSIZE] = - ((int)(size * 6) << R300_POINTSIZE_X_SHIFT) | - ((int)(size * 6) << R300_POINTSIZE_Y_SHIFT); + ((int)(size * 6) << R300_POINTSIZE_X_SHIFT) | + ((int)(size * 6) << R300_POINTSIZE_Y_SHIFT); } /* ============================================================= * Line state */ -static void r300LineWidth(GLcontext *ctx, GLfloat widthf) +static void r300LineWidth(GLcontext * ctx, GLfloat widthf) { r300ContextPtr r300 = R300_CONTEXT(ctx); widthf = ctx->Line._Width; R300_STATECHANGE(r300, lcntl); - r300->hw.lcntl.cmd[1] = (int)(widthf * 6.0); - r300->hw.lcntl.cmd[1] |= R300_LINE_CNT_VE; + r300->hw.lcntl.cmd[1] = + R300_LINE_CNT_HO | R300_LINE_CNT_VE | (int)(widthf * 6.0); } -static void r300PolygonMode(GLcontext *ctx, GLenum face, GLenum mode) +static void r300PolygonMode(GLcontext * ctx, GLenum face, GLenum mode) { (void)face; (void)mode; @@ -846,30 +775,42 @@ static void r300ShadeModel(GLcontext * ctx, GLenum mode) } static void r300StencilFuncSeparate(GLcontext * ctx, GLenum face, - GLenum func, GLint ref, GLuint mask) + GLenum func, GLint ref, GLuint mask) { r300ContextPtr rmesa = R300_CONTEXT(ctx); - GLuint refmask = (((ctx->Stencil.Ref[0] & 0xff) << R300_RB3D_ZS2_STENCIL_REF_SHIFT) | - ((ctx->Stencil.ValueMask[0] & 0xff) << R300_RB3D_ZS2_STENCIL_MASK_SHIFT)); + GLuint refmask = + (((ctx->Stencil. + Ref[0] & 0xff) << R300_RB3D_ZS2_STENCIL_REF_SHIFT) | ((ctx-> + Stencil. + ValueMask + [0] & + 0xff) + << + R300_RB3D_ZS2_STENCIL_MASK_SHIFT)); GLuint flag; R300_STATECHANGE(rmesa, zs); - rmesa->hw.zs.cmd[R300_ZS_CNTL_1] &= ~( - (R300_ZS_MASK << R300_RB3D_ZS1_FRONT_FUNC_SHIFT) - | (R300_ZS_MASK << R300_RB3D_ZS1_BACK_FUNC_SHIFT)); + rmesa->hw.zs.cmd[R300_ZS_CNTL_1] &= ~((R300_ZS_MASK << + R300_RB3D_ZS1_FRONT_FUNC_SHIFT) + | (R300_ZS_MASK << + R300_RB3D_ZS1_BACK_FUNC_SHIFT)); - rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &= ~((R300_RB3D_ZS2_STENCIL_MASK << R300_RB3D_ZS2_STENCIL_REF_SHIFT) | - (R300_RB3D_ZS2_STENCIL_MASK << R300_RB3D_ZS2_STENCIL_MASK_SHIFT)); + rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &= + ~((R300_RB3D_ZS2_STENCIL_MASK << + R300_RB3D_ZS2_STENCIL_REF_SHIFT) | + (R300_RB3D_ZS2_STENCIL_MASK << R300_RB3D_ZS2_STENCIL_MASK_SHIFT)); flag = translate_func(ctx->Stencil.Function[0]); - rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |= (flag << R300_RB3D_ZS1_FRONT_FUNC_SHIFT); + rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |= + (flag << R300_RB3D_ZS1_FRONT_FUNC_SHIFT); if (ctx->Stencil._TestTwoSide) flag = translate_func(ctx->Stencil.Function[1]); - rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |= (flag << R300_RB3D_ZS1_BACK_FUNC_SHIFT); + rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |= + (flag << R300_RB3D_ZS1_BACK_FUNC_SHIFT); rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |= refmask; } @@ -878,38 +819,50 @@ static void r300StencilMaskSeparate(GLcontext * ctx, GLenum face, GLuint mask) r300ContextPtr rmesa = R300_CONTEXT(ctx); R300_STATECHANGE(rmesa, zs); - rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &= ~(R300_RB3D_ZS2_STENCIL_MASK << R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT); - rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |= (ctx->Stencil.WriteMask[0] & 0xff) << R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT; + rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &= + ~(R300_RB3D_ZS2_STENCIL_MASK << + R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT); + rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |= + (ctx->Stencil. + WriteMask[0] & 0xff) << R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT; } - -static void r300StencilOpSeparate(GLcontext * ctx, GLenum face, GLenum fail, - GLenum zfail, GLenum zpass) +static void r300StencilOpSeparate(GLcontext * ctx, GLenum face, + GLenum fail, GLenum zfail, GLenum zpass) { r300ContextPtr rmesa = R300_CONTEXT(ctx); R300_STATECHANGE(rmesa, zs); - /* It is easier to mask what's left.. */ + /* It is easier to mask what's left.. */ rmesa->hw.zs.cmd[R300_ZS_CNTL_1] &= (R300_ZS_MASK << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT) | (R300_ZS_MASK << R300_RB3D_ZS1_FRONT_FUNC_SHIFT) | (R300_ZS_MASK << R300_RB3D_ZS1_BACK_FUNC_SHIFT); rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |= - (translate_stencil_op(ctx->Stencil.FailFunc[0]) << R300_RB3D_ZS1_FRONT_FAIL_OP_SHIFT) - |(translate_stencil_op(ctx->Stencil.ZFailFunc[0]) << R300_RB3D_ZS1_FRONT_ZFAIL_OP_SHIFT) - |(translate_stencil_op(ctx->Stencil.ZPassFunc[0]) << R300_RB3D_ZS1_FRONT_ZPASS_OP_SHIFT); + (translate_stencil_op(ctx->Stencil.FailFunc[0]) << + R300_RB3D_ZS1_FRONT_FAIL_OP_SHIFT) + | (translate_stencil_op(ctx->Stencil.ZFailFunc[0]) << + R300_RB3D_ZS1_FRONT_ZFAIL_OP_SHIFT) + | (translate_stencil_op(ctx->Stencil.ZPassFunc[0]) << + R300_RB3D_ZS1_FRONT_ZPASS_OP_SHIFT); if (ctx->Stencil._TestTwoSide) { rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |= - (translate_stencil_op(ctx->Stencil.FailFunc[1]) << R300_RB3D_ZS1_BACK_FAIL_OP_SHIFT) - |(translate_stencil_op(ctx->Stencil.ZFailFunc[1]) << R300_RB3D_ZS1_BACK_ZFAIL_OP_SHIFT) - |(translate_stencil_op(ctx->Stencil.ZPassFunc[1]) << R300_RB3D_ZS1_BACK_ZPASS_OP_SHIFT); + (translate_stencil_op(ctx->Stencil.FailFunc[1]) << + R300_RB3D_ZS1_BACK_FAIL_OP_SHIFT) + | (translate_stencil_op(ctx->Stencil.ZFailFunc[1]) << + R300_RB3D_ZS1_BACK_ZFAIL_OP_SHIFT) + | (translate_stencil_op(ctx->Stencil.ZPassFunc[1]) << + R300_RB3D_ZS1_BACK_ZPASS_OP_SHIFT); } else { rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |= - (translate_stencil_op(ctx->Stencil.FailFunc[0]) << R300_RB3D_ZS1_BACK_FAIL_OP_SHIFT) - |(translate_stencil_op(ctx->Stencil.ZFailFunc[0]) << R300_RB3D_ZS1_BACK_ZFAIL_OP_SHIFT) - |(translate_stencil_op(ctx->Stencil.ZPassFunc[0]) << R300_RB3D_ZS1_BACK_ZPASS_OP_SHIFT); + (translate_stencil_op(ctx->Stencil.FailFunc[0]) << + R300_RB3D_ZS1_BACK_FAIL_OP_SHIFT) + | (translate_stencil_op(ctx->Stencil.ZFailFunc[0]) << + R300_RB3D_ZS1_BACK_ZFAIL_OP_SHIFT) + | (translate_stencil_op(ctx->Stencil.ZPassFunc[0]) << + R300_RB3D_ZS1_BACK_ZPASS_OP_SHIFT); } } @@ -919,8 +872,10 @@ static void r300ClearStencil(GLcontext * ctx, GLint s) rmesa->state.stencil.clear = ((GLuint) (ctx->Stencil.Clear & 0xff) | - (R300_RB3D_ZS2_STENCIL_MASK << R300_RB3D_ZS2_STENCIL_MASK_SHIFT) | - ((ctx->Stencil.WriteMask[0] & 0xff) << R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT)); + (R300_RB3D_ZS2_STENCIL_MASK << + R300_RB3D_ZS2_STENCIL_MASK_SHIFT) | ((ctx->Stencil. + WriteMask[0] & 0xff) << + R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT)); } /* ============================================================= @@ -933,7 +888,7 @@ static void r300ClearStencil(GLcontext * ctx, GLint s) #define SUBPIXEL_X 0.125 #define SUBPIXEL_Y 0.125 -void r300UpdateWindow(GLcontext * ctx) +static void r300UpdateWindow(GLcontext * ctx) { r300ContextPtr rmesa = R300_CONTEXT(ctx); __DRIdrawablePrivate *dPriv = rmesa->radeon.dri.drawable; @@ -951,11 +906,11 @@ void r300UpdateWindow(GLcontext * ctx) R300_FIREVERTICES(rmesa); R300_STATECHANGE(rmesa, vpt); - rmesa->hw.vpt.cmd[R300_VPT_XSCALE] = r300PackFloat32(sx); + rmesa->hw.vpt.cmd[R300_VPT_XSCALE] = r300PackFloat32(sx); rmesa->hw.vpt.cmd[R300_VPT_XOFFSET] = r300PackFloat32(tx); - rmesa->hw.vpt.cmd[R300_VPT_YSCALE] = r300PackFloat32(sy); + rmesa->hw.vpt.cmd[R300_VPT_YSCALE] = r300PackFloat32(sy); rmesa->hw.vpt.cmd[R300_VPT_YOFFSET] = r300PackFloat32(ty); - rmesa->hw.vpt.cmd[R300_VPT_ZSCALE] = r300PackFloat32(sz); + rmesa->hw.vpt.cmd[R300_VPT_ZSCALE] = r300PackFloat32(sz); rmesa->hw.vpt.cmd[R300_VPT_ZOFFSET] = r300PackFloat32(tz); } @@ -974,38 +929,36 @@ static void r300DepthRange(GLcontext * ctx, GLclampd nearval, GLclampd farval) r300UpdateWindow(ctx); } -void r300UpdateViewportOffset( GLcontext *ctx ) +void r300UpdateViewportOffset(GLcontext * ctx) { r300ContextPtr rmesa = R300_CONTEXT(ctx); - __DRIdrawablePrivate *dPriv = ((radeonContextPtr)rmesa)->dri.drawable; - GLfloat xoffset = (GLfloat)dPriv->x; - GLfloat yoffset = (GLfloat)dPriv->y + dPriv->h; + __DRIdrawablePrivate *dPriv = ((radeonContextPtr) rmesa)->dri.drawable; + GLfloat xoffset = (GLfloat) dPriv->x; + GLfloat yoffset = (GLfloat) dPriv->y + dPriv->h; const GLfloat *v = ctx->Viewport._WindowMap.m; GLfloat tx = v[MAT_TX] + xoffset + SUBPIXEL_X; - GLfloat ty = (- v[MAT_TY]) + yoffset + SUBPIXEL_Y; + GLfloat ty = (-v[MAT_TY]) + yoffset + SUBPIXEL_Y; - if ( rmesa->hw.vpt.cmd[R300_VPT_XOFFSET] != r300PackFloat32(tx) || - rmesa->hw.vpt.cmd[R300_VPT_YOFFSET] != r300PackFloat32(ty)) - { - /* Note: this should also modify whatever data the context reset - * code uses... - */ - R300_STATECHANGE( rmesa, vpt ); - rmesa->hw.vpt.cmd[R300_VPT_XOFFSET] = r300PackFloat32(tx); - rmesa->hw.vpt.cmd[R300_VPT_YOFFSET] = r300PackFloat32(ty); + if (rmesa->hw.vpt.cmd[R300_VPT_XOFFSET] != r300PackFloat32(tx) || + rmesa->hw.vpt.cmd[R300_VPT_YOFFSET] != r300PackFloat32(ty)) { + /* Note: this should also modify whatever data the context reset + * code uses... + */ + R300_STATECHANGE(rmesa, vpt); + rmesa->hw.vpt.cmd[R300_VPT_XOFFSET] = r300PackFloat32(tx); + rmesa->hw.vpt.cmd[R300_VPT_YOFFSET] = r300PackFloat32(ty); } - radeonUpdateScissor( ctx ); + radeonUpdateScissor(ctx); } /** * Tell the card where to render (offset, pitch). * Effected by glDrawBuffer, etc */ -void -r300UpdateDrawBuffer(GLcontext *ctx) +void r300UpdateDrawBuffer(GLcontext * ctx) { r300ContextPtr rmesa = R300_CONTEXT(ctx); r300ContextPtr r300 = rmesa; @@ -1014,13 +967,15 @@ r300UpdateDrawBuffer(GLcontext *ctx) if (fb->_ColorDrawBufferMask[0] == BUFFER_BIT_FRONT_LEFT) { /* draw to front */ - drb = (driRenderbuffer *) fb->Attachment[BUFFER_FRONT_LEFT].Renderbuffer; - } - else if (fb->_ColorDrawBufferMask[0] == BUFFER_BIT_BACK_LEFT) { + drb = + (driRenderbuffer *) fb->Attachment[BUFFER_FRONT_LEFT]. + Renderbuffer; + } else if (fb->_ColorDrawBufferMask[0] == BUFFER_BIT_BACK_LEFT) { /* draw to back */ - drb = (driRenderbuffer *) fb->Attachment[BUFFER_BACK_LEFT].Renderbuffer; - } - else { + drb = + (driRenderbuffer *) fb->Attachment[BUFFER_BACK_LEFT]. + Renderbuffer; + } else { /* drawing to multiple buffers, or none */ return; } @@ -1028,12 +983,11 @@ r300UpdateDrawBuffer(GLcontext *ctx) assert(drb); assert(drb->flippedPitch); + R300_STATECHANGE(rmesa, cb); - R300_STATECHANGE( rmesa, cb ); - - r300->hw.cb.cmd[R300_CB_OFFSET] = drb->flippedOffset + //r300->radeon.state.color.drawOffset + - r300->radeon.radeonScreen->fbLocation; - r300->hw.cb.cmd[R300_CB_PITCH] = drb->flippedPitch;//r300->radeon.state.color.drawPitch; + r300->hw.cb.cmd[R300_CB_OFFSET] = drb->flippedOffset + //r300->radeon.state.color.drawOffset + + r300->radeon.radeonScreen->fbLocation; + r300->hw.cb.cmd[R300_CB_PITCH] = drb->flippedPitch; //r300->radeon.state.color.drawPitch; if (r300->radeon.radeonScreen->cpp == 4) r300->hw.cb.cmd[R300_CB_PITCH] |= R300_COLOR_FORMAT_ARGB8888; @@ -1043,51 +997,55 @@ r300UpdateDrawBuffer(GLcontext *ctx) if (r300->radeon.sarea->tiling_enabled) r300->hw.cb.cmd[R300_CB_PITCH] |= R300_COLOR_TILE_ENABLE; #if 0 - R200_STATECHANGE( rmesa, ctx ); + R200_STATECHANGE(rmesa, ctx); /* Note: we used the (possibly) page-flipped values */ rmesa->hw.ctx.cmd[CTX_RB3D_COLOROFFSET] - = ((drb->flippedOffset + rmesa->r200Screen->fbLocation) - & R200_COLOROFFSET_MASK); + = ((drb->flippedOffset + rmesa->r200Screen->fbLocation) + & R200_COLOROFFSET_MASK); rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] = drb->flippedPitch; if (rmesa->sarea->tiling_enabled) { - rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |= R200_COLOR_TILE_ENABLE; + rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |= + R200_COLOR_TILE_ENABLE; } #endif } static void -r300FetchStateParameter(GLcontext *ctx, - const gl_state_index state[STATE_LENGTH], - GLfloat *value) +r300FetchStateParameter(GLcontext * ctx, + const gl_state_index state[STATE_LENGTH], + GLfloat * value) { r300ContextPtr r300 = R300_CONTEXT(ctx); - switch(state[0]) { + switch (state[0]) { case STATE_INTERNAL: - switch(state[1]) { + switch (state[1]) { case STATE_R300_WINDOW_DIMENSION: - value[0] = r300->radeon.dri.drawable->w*0.5f;/* width*0.5 */ - value[1] = r300->radeon.dri.drawable->h*0.5f;/* height*0.5 */ - value[2] = 0.5F; /* for moving range [-1 1] -> [0 1] */ - value[3] = 1.0F; /* not used */ + value[0] = r300->radeon.dri.drawable->w * 0.5f; /* width*0.5 */ + value[1] = r300->radeon.dri.drawable->h * 0.5f; /* height*0.5 */ + value[2] = 0.5F; /* for moving range [-1 1] -> [0 1] */ + value[3] = 1.0F; /* not used */ break; - case STATE_R300_TEXRECT_FACTOR: { - struct gl_texture_object* t = ctx->Texture.Unit[state[2]].CurrentRect; - - if (t && t->Image[0][t->BaseLevel]) { - struct gl_texture_image* image = t->Image[0][t->BaseLevel]; - value[0] = 1.0 / image->Width2; - value[1] = 1.0 / image->Height2; - } else { - value[0] = 1.0; - value[1] = 1.0; + case STATE_R300_TEXRECT_FACTOR:{ + struct gl_texture_object *t = + ctx->Texture.Unit[state[2]].CurrentRect; + + if (t && t->Image[0][t->BaseLevel]) { + struct gl_texture_image *image = + t->Image[0][t->BaseLevel]; + value[0] = 1.0 / image->Width2; + value[1] = 1.0 / image->Height2; + } else { + value[0] = 1.0; + value[1] = 1.0; + } + value[2] = 1.0; + value[3] = 1.0; + break; } - value[2] = 1.0; - value[3] = 1.0; - break; } default: break; @@ -1109,23 +1067,24 @@ void r300UpdateStateParameters(GLcontext * ctx, GLuint new_state) struct gl_program_parameter_list *paramList; GLuint i; - if(!(new_state & (_NEW_BUFFERS|_NEW_PROGRAM))) - return; + if (!(new_state & (_NEW_BUFFERS | _NEW_PROGRAM))) + return; fp = (struct r300_fragment_program *)ctx->FragmentProgram._Current; if (!fp) - return; + return; paramList = fp->mesa_program.Base.Parameters; if (!paramList) - return; + return; for (i = 0; i < paramList->NumParameters; i++) { - if (paramList->Parameters[i].Type == PROGRAM_STATE_VAR){ + if (paramList->Parameters[i].Type == PROGRAM_STATE_VAR) { r300FetchStateParameter(ctx, - paramList->Parameters[i].StateIndexes, - paramList->ParameterValues[i]); + paramList->Parameters[i]. + StateIndexes, + paramList->ParameterValues[i]); } } } @@ -1141,10 +1100,10 @@ static void r300PolygonOffset(GLcontext * ctx, GLfloat factor, GLfloat units) switch (ctx->Visual.depthBits) { case 16: constant *= 4.0; - break; + break; case 24: constant *= 2.0; - break; + break; } factor *= 12.0; @@ -1160,7 +1119,6 @@ static void r300PolygonOffset(GLcontext * ctx, GLfloat factor, GLfloat units) /* Routing and texture-related */ - /* r300 doesnt handle GL_CLAMP and GL_MIRROR_CLAMP_EXT correctly when filter is NEAREST. * Since texwrap produces same results for GL_CLAMP and GL_CLAMP_TO_EDGE we use them instead. * We need to recalculate wrap modes whenever filter mode is changed because someone might do: @@ -1172,70 +1130,75 @@ static void r300PolygonOffset(GLcontext * ctx, GLfloat factor, GLfloat units) */ static unsigned long gen_fixed_filter(unsigned long f) { - unsigned long mag, min, needs_fixing=0; + unsigned long mag, min, needs_fixing = 0; //return f; /* We ignore MIRROR bit so we dont have to do everything twice */ - if((f & ((7-1) << R300_TX_WRAP_S_SHIFT)) == (R300_TX_CLAMP << R300_TX_WRAP_S_SHIFT)){ + if ((f & ((7 - 1) << R300_TX_WRAP_S_SHIFT)) == + (R300_TX_CLAMP << R300_TX_WRAP_S_SHIFT)) { needs_fixing |= 1; } - if((f & ((7-1) << R300_TX_WRAP_T_SHIFT)) == (R300_TX_CLAMP << R300_TX_WRAP_T_SHIFT)){ + if ((f & ((7 - 1) << R300_TX_WRAP_T_SHIFT)) == + (R300_TX_CLAMP << R300_TX_WRAP_T_SHIFT)) { needs_fixing |= 2; } - if((f & ((7-1) << R300_TX_WRAP_Q_SHIFT)) == (R300_TX_CLAMP << R300_TX_WRAP_Q_SHIFT)){ + if ((f & ((7 - 1) << R300_TX_WRAP_Q_SHIFT)) == + (R300_TX_CLAMP << R300_TX_WRAP_Q_SHIFT)) { needs_fixing |= 4; } - if(!needs_fixing) + if (!needs_fixing) return f; - mag=f & R300_TX_MAG_FILTER_MASK; - min=f & R300_TX_MIN_FILTER_MASK; + mag = f & R300_TX_MAG_FILTER_MASK; + min = f & R300_TX_MIN_FILTER_MASK; /* TODO: Check for anisto filters too */ - if((mag != R300_TX_MAG_FILTER_NEAREST) && (min != R300_TX_MIN_FILTER_NEAREST)) + if ((mag != R300_TX_MAG_FILTER_NEAREST) + && (min != R300_TX_MIN_FILTER_NEAREST)) return f; /* r300 cant handle these modes hence we force nearest to linear */ - if((mag == R300_TX_MAG_FILTER_NEAREST) && (min != R300_TX_MIN_FILTER_NEAREST)){ + if ((mag == R300_TX_MAG_FILTER_NEAREST) + && (min != R300_TX_MIN_FILTER_NEAREST)) { f &= ~R300_TX_MAG_FILTER_NEAREST; f |= R300_TX_MAG_FILTER_LINEAR; return f; } - if((min == R300_TX_MIN_FILTER_NEAREST) && (mag != R300_TX_MAG_FILTER_NEAREST)){ + if ((min == R300_TX_MIN_FILTER_NEAREST) + && (mag != R300_TX_MAG_FILTER_NEAREST)) { f &= ~R300_TX_MIN_FILTER_NEAREST; f |= R300_TX_MIN_FILTER_LINEAR; return f; } /* Both are nearest */ - if(needs_fixing & 1){ - f &= ~((7-1) << R300_TX_WRAP_S_SHIFT); + if (needs_fixing & 1) { + f &= ~((7 - 1) << R300_TX_WRAP_S_SHIFT); f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_S_SHIFT; } - if(needs_fixing & 2){ - f &= ~((7-1) << R300_TX_WRAP_T_SHIFT); + if (needs_fixing & 2) { + f &= ~((7 - 1) << R300_TX_WRAP_T_SHIFT); f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_T_SHIFT; } - if(needs_fixing & 4){ - f &= ~((7-1) << R300_TX_WRAP_Q_SHIFT); + if (needs_fixing & 4) { + f &= ~((7 - 1) << R300_TX_WRAP_Q_SHIFT); f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_Q_SHIFT; } return f; } -void r300_setup_textures(GLcontext *ctx) +static void r300SetupTextures(GLcontext * ctx) { int i, mtu; struct r300_tex_obj *t; r300ContextPtr r300 = R300_CONTEXT(ctx); - int hw_tmu=0; - int last_hw_tmu=-1; /* -1 translates into no setup costs for fields */ + int hw_tmu = 0; + int last_hw_tmu = -1; /* -1 translates into no setup costs for fields */ int tmu_mappings[R300_MAX_TEXTURE_UNITS] = { -1, }; - struct r300_fragment_program *rp = - (struct r300_fragment_program *) - (char *)ctx->FragmentProgram._Current; + struct r300_fragment_program *fp = (struct r300_fragment_program *) + (char *)ctx->FragmentProgram._Current; R300_STATECHANGE(r300, txe); R300_STATECHANGE(r300, tex.filter); @@ -1247,56 +1210,72 @@ void r300_setup_textures(GLcontext *ctx) R300_STATECHANGE(r300, tex.chroma_key); R300_STATECHANGE(r300, tex.border_color); - r300->hw.txe.cmd[R300_TXE_ENABLE]=0x0; + r300->hw.txe.cmd[R300_TXE_ENABLE] = 0x0; mtu = r300->radeon.glCtx->Const.MaxTextureUnits; if (RADEON_DEBUG & DEBUG_STATE) fprintf(stderr, "mtu=%d\n", mtu); - if(mtu > R300_MAX_TEXTURE_UNITS) { - fprintf(stderr, "Aiiee ! mtu=%d is greater than R300_MAX_TEXTURE_UNITS=%d\n", + if (mtu > R300_MAX_TEXTURE_UNITS) { + fprintf(stderr, + "Aiiee ! mtu=%d is greater than R300_MAX_TEXTURE_UNITS=%d\n", mtu, R300_MAX_TEXTURE_UNITS); - exit(-1); + _mesa_exit(-1); } /* We cannot let disabled tmu offsets pass DRM */ - for(i=0; i < mtu; i++) { + for (i = 0; i < mtu; i++) { if (ctx->Texture.Unit[i]._ReallyEnabled) { -#if 0 /* Enables old behaviour */ +#if 0 /* Enables old behaviour */ hw_tmu = i; #endif tmu_mappings[i] = hw_tmu; - t=r300->state.texture.unit[i].texobj; + t = r300->state.texture.unit[i].texobj; + /* XXX questionable fix for bug 9170: */ + if (!t) + continue; - if((t->format & 0xffffff00)==0xffffff00) { - WARN_ONCE("unknown texture format (entry %x) encountered. Help me !\n", t->format & 0xff); + if ((t->format & 0xffffff00) == 0xffffff00) { + WARN_ONCE + ("unknown texture format (entry %x) encountered. Help me !\n", + t->format & 0xff); } if (RADEON_DEBUG & DEBUG_STATE) - fprintf(stderr, "Activating texture unit %d\n", i); + fprintf(stderr, + "Activating texture unit %d\n", i); r300->hw.txe.cmd[R300_TXE_ENABLE] |= (1 << hw_tmu); - r300->hw.tex.filter.cmd[R300_TEX_VALUE_0 + hw_tmu] = gen_fixed_filter(t->filter) | (hw_tmu << 28); + r300->hw.tex.filter.cmd[R300_TEX_VALUE_0 + + hw_tmu] = + gen_fixed_filter(t->filter) | (hw_tmu << 28); /* Currently disabled! */ - r300->hw.tex.filter_1.cmd[R300_TEX_VALUE_0 + hw_tmu] = 0x0; //0x20501f80; - r300->hw.tex.size.cmd[R300_TEX_VALUE_0 + hw_tmu] = t->size; - r300->hw.tex.format.cmd[R300_TEX_VALUE_0 + hw_tmu] = t->format; - r300->hw.tex.pitch.cmd[R300_TEX_VALUE_0 + hw_tmu] = t->pitch_reg; - r300->hw.tex.offset.cmd[R300_TEX_VALUE_0 + hw_tmu] = t->offset; - - if(t->offset & R300_TXO_MACRO_TILE) { + r300->hw.tex.filter_1.cmd[R300_TEX_VALUE_0 + hw_tmu] = 0x0; //0x20501f80; + r300->hw.tex.size.cmd[R300_TEX_VALUE_0 + hw_tmu] = + t->size; + r300->hw.tex.format.cmd[R300_TEX_VALUE_0 + + hw_tmu] = t->format; + r300->hw.tex.pitch.cmd[R300_TEX_VALUE_0 + hw_tmu] = + t->pitch_reg; + r300->hw.tex.offset.cmd[R300_TEX_VALUE_0 + + hw_tmu] = t->offset; + + if (t->offset & R300_TXO_MACRO_TILE) { WARN_ONCE("macro tiling enabled!\n"); } - if(t->offset & R300_TXO_MICRO_TILE) { + if (t->offset & R300_TXO_MICRO_TILE) { WARN_ONCE("micro tiling enabled!\n"); } - r300->hw.tex.chroma_key.cmd[R300_TEX_VALUE_0 + hw_tmu] = 0x0; - r300->hw.tex.border_color.cmd[R300_TEX_VALUE_0 + hw_tmu] = t->pp_border_color; + r300->hw.tex.chroma_key.cmd[R300_TEX_VALUE_0 + + hw_tmu] = 0x0; + r300->hw.tex.border_color.cmd[R300_TEX_VALUE_0 + + hw_tmu] = + t->pp_border_color; last_hw_tmu = hw_tmu; @@ -1304,71 +1283,83 @@ void r300_setup_textures(GLcontext *ctx) } } - r300->hw.tex.filter.cmd[R300_TEX_CMD_0] = cmdpacket0(R300_TX_FILTER_0, last_hw_tmu + 1); - r300->hw.tex.filter_1.cmd[R300_TEX_CMD_0] = cmdpacket0(R300_TX_FILTER1_0, last_hw_tmu + 1); - r300->hw.tex.size.cmd[R300_TEX_CMD_0] = cmdpacket0(R300_TX_SIZE_0, last_hw_tmu + 1); - r300->hw.tex.format.cmd[R300_TEX_CMD_0] = cmdpacket0(R300_TX_FORMAT_0, last_hw_tmu + 1); - r300->hw.tex.pitch.cmd[R300_TEX_CMD_0] = cmdpacket0(R300_TX_PITCH_0, last_hw_tmu + 1); - r300->hw.tex.offset.cmd[R300_TEX_CMD_0] = cmdpacket0(R300_TX_OFFSET_0, last_hw_tmu + 1); - r300->hw.tex.chroma_key.cmd[R300_TEX_CMD_0] = cmdpacket0(R300_TX_CHROMA_KEY_0, last_hw_tmu + 1); - r300->hw.tex.border_color.cmd[R300_TEX_CMD_0] = cmdpacket0(R300_TX_BORDER_COLOR_0, last_hw_tmu + 1); - - - if (!rp) /* should only happenen once, just after context is created */ + r300->hw.tex.filter.cmd[R300_TEX_CMD_0] = + cmdpacket0(R300_TX_FILTER_0, last_hw_tmu + 1); + r300->hw.tex.filter_1.cmd[R300_TEX_CMD_0] = + cmdpacket0(R300_TX_FILTER1_0, last_hw_tmu + 1); + r300->hw.tex.size.cmd[R300_TEX_CMD_0] = + cmdpacket0(R300_TX_SIZE_0, last_hw_tmu + 1); + r300->hw.tex.format.cmd[R300_TEX_CMD_0] = + cmdpacket0(R300_TX_FORMAT_0, last_hw_tmu + 1); + r300->hw.tex.pitch.cmd[R300_TEX_CMD_0] = + cmdpacket0(R300_TX_PITCH_0, last_hw_tmu + 1); + r300->hw.tex.offset.cmd[R300_TEX_CMD_0] = + cmdpacket0(R300_TX_OFFSET_0, last_hw_tmu + 1); + r300->hw.tex.chroma_key.cmd[R300_TEX_CMD_0] = + cmdpacket0(R300_TX_CHROMA_KEY_0, last_hw_tmu + 1); + r300->hw.tex.border_color.cmd[R300_TEX_CMD_0] = + cmdpacket0(R300_TX_BORDER_COLOR_0, last_hw_tmu + 1); + + if (!fp) /* should only happenen once, just after context is created */ return; R300_STATECHANGE(r300, fpt); - for(i = 0; i < rp->tex.length; i++){ + for (i = 0; i < fp->tex.length; i++) { int unit; int opcode; unsigned long val; - unit = rp->tex.inst[i] >> R300_FPITX_IMAGE_SHIFT; + unit = fp->tex.inst[i] >> R300_FPITX_IMAGE_SHIFT; unit &= 15; - val = rp->tex.inst[i]; + val = fp->tex.inst[i]; val &= ~R300_FPITX_IMAGE_MASK; - opcode = (val & R300_FPITX_OPCODE_MASK) >> R300_FPITX_OPCODE_SHIFT; + opcode = + (val & R300_FPITX_OPCODE_MASK) >> R300_FPITX_OPCODE_SHIFT; if (opcode == R300_FPITX_OP_KIL) { - r300->hw.fpt.cmd[R300_FPT_INSTR_0+i] = val; + r300->hw.fpt.cmd[R300_FPT_INSTR_0 + i] = val; } else { if (tmu_mappings[unit] >= 0) { - val |= tmu_mappings[unit] << R300_FPITX_IMAGE_SHIFT; - r300->hw.fpt.cmd[R300_FPT_INSTR_0+i] = val; + val |= + tmu_mappings[unit] << + R300_FPITX_IMAGE_SHIFT; + r300->hw.fpt.cmd[R300_FPT_INSTR_0 + i] = val; } else { // We get here when the corresponding texture image is incomplete // (e.g. incomplete mipmaps etc.) - r300->hw.fpt.cmd[R300_FPT_INSTR_0+i] = val; + r300->hw.fpt.cmd[R300_FPT_INSTR_0 + i] = val; } } } - r300->hw.fpt.cmd[R300_FPT_CMD_0] = cmdpacket0(R300_PFS_TEXI_0, rp->tex.length); + r300->hw.fpt.cmd[R300_FPT_CMD_0] = + cmdpacket0(R300_PFS_TEXI_0, fp->tex.length); if (RADEON_DEBUG & DEBUG_STATE) - fprintf(stderr, "TX_ENABLE: %08x last_hw_tmu=%d\n", r300->hw.txe.cmd[R300_TXE_ENABLE], last_hw_tmu); + fprintf(stderr, "TX_ENABLE: %08x last_hw_tmu=%d\n", + r300->hw.txe.cmd[R300_TXE_ENABLE], last_hw_tmu); } union r300_outputs_written { - GLuint vp_outputs; /* hw_tcl_on */ - DECLARE_RENDERINPUTS(index_bitset); /* !hw_tcl_on */ + GLuint vp_outputs; /* hw_tcl_on */ + DECLARE_RENDERINPUTS(index_bitset); /* !hw_tcl_on */ }; #define R300_OUTPUTS_WRITTEN_TEST(ow, vp_result, tnl_attrib) \ ((hw_tcl_on) ? (ow).vp_outputs & (1 << (vp_result)) : \ RENDERINPUTS_TEST( (ow.index_bitset), (tnl_attrib) )) -void r300_setup_rs_unit(GLcontext *ctx) +static void r300SetupRSUnit(GLcontext * ctx) { r300ContextPtr r300 = R300_CONTEXT(ctx); /* I'm still unsure if these are needed */ GLuint interp_magic[8] = { 0x00, - 0x40, - 0x80, - 0xC0, + R300_RS_INTERP_1_UNKNOWN, + R300_RS_INTERP_2_UNKNOWN, + R300_RS_INTERP_3_UNKNOWN, 0x00, 0x00, 0x00, @@ -1380,16 +1371,16 @@ void r300_setup_rs_unit(GLcontext *ctx) int in_texcoords, col_interp_nr; int i; - if(hw_tcl_on) + if (hw_tcl_on) OutputsWritten.vp_outputs = CURRENT_VERTEX_SHADER(ctx)->key.OutputsWritten; else - RENDERINPUTS_COPY( OutputsWritten.index_bitset, r300->state.render_inputs_bitset ); + RENDERINPUTS_COPY(OutputsWritten.index_bitset, r300->state.render_inputs_bitset); if (ctx->FragmentProgram._Current) InputsRead = ctx->FragmentProgram._Current->Base.InputsRead; else { fprintf(stderr, "No ctx->FragmentProgram._Current!!\n"); - return; /* This should only ever happen once.. */ + return; /* This should only ever happen once.. */ } R300_STATECHANGE(r300, ri); @@ -1400,102 +1391,85 @@ void r300_setup_rs_unit(GLcontext *ctx) r300->hw.rr.cmd[R300_RR_ROUTE_1] = 0; - if (InputsRead & FRAG_BIT_WPOS){ + if (InputsRead & FRAG_BIT_WPOS) { for (i = 0; i < ctx->Const.MaxTextureUnits; i++) if (!(InputsRead & (FRAG_BIT_TEX0 << i))) break; - if(i == ctx->Const.MaxTextureUnits){ + if (i == ctx->Const.MaxTextureUnits) { fprintf(stderr, "\tno free texcoord found...\n"); - exit(0); + _mesa_exit(-1); } InputsRead |= (FRAG_BIT_TEX0 << i); InputsRead &= ~FRAG_BIT_WPOS; } - for (i=0;i<ctx->Const.MaxTextureUnits;i++) { - r300->hw.ri.cmd[R300_RI_INTERP_0+i] = 0 - | R300_RS_INTERP_USED - | (in_texcoords << R300_RS_INTERP_SRC_SHIFT) - | interp_magic[i]; + for (i = 0; i < ctx->Const.MaxTextureUnits; i++) { + r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = 0 | R300_RS_INTERP_USED | (in_texcoords << R300_RS_INTERP_SRC_SHIFT) + | interp_magic[i]; r300->hw.rr.cmd[R300_RR_ROUTE_0 + fp_reg] = 0; - if (InputsRead & (FRAG_BIT_TEX0<<i)) { + if (InputsRead & (FRAG_BIT_TEX0 << i)) { //assert(r300->state.texture.tc_count != 0); - r300->hw.rr.cmd[R300_RR_ROUTE_0 + fp_reg] |= - R300_RS_ROUTE_ENABLE - | i /* source INTERP */ - | (fp_reg << R300_RS_ROUTE_DEST_SHIFT); + r300->hw.rr.cmd[R300_RR_ROUTE_0 + fp_reg] |= R300_RS_ROUTE_ENABLE | i /* source INTERP */ + | (fp_reg << R300_RS_ROUTE_DEST_SHIFT); high_rr = fp_reg; - if (!R300_OUTPUTS_WRITTEN_TEST( OutputsWritten, VERT_RESULT_TEX0+i, _TNL_ATTRIB_TEX(i) )) { - /* Passing invalid data here can lock the GPU. */ + /* Passing invalid data here can lock the GPU. */ + if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_TEX0 + i, _TNL_ATTRIB_TEX(i))) { + InputsRead &= ~(FRAG_BIT_TEX0 << i); + fp_reg++; + } else { WARN_ONCE("fragprog wants coords for tex%d, vp doesn't provide them!\n", i); - //_mesa_print_program(&CURRENT_VERTEX_SHADER(ctx)->Base); - //exit(-1); } - InputsRead &= ~(FRAG_BIT_TEX0<<i); - fp_reg++; } /* Need to count all coords enabled at vof */ - if (R300_OUTPUTS_WRITTEN_TEST( OutputsWritten, VERT_RESULT_TEX0+i, _TNL_ATTRIB_TEX(i) )) + if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_TEX0 + i, _TNL_ATTRIB_TEX(i))) { in_texcoords++; + } } if (InputsRead & FRAG_BIT_COL0) { - if (!R300_OUTPUTS_WRITTEN_TEST( OutputsWritten, VERT_RESULT_COL0, _TNL_ATTRIB_COLOR0 )) { + if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL0, _TNL_ATTRIB_COLOR0)) { + r300->hw.rr.cmd[R300_RR_ROUTE_0] |= 0 | R300_RS_ROUTE_0_COLOR | (fp_reg++ << R300_RS_ROUTE_0_COLOR_DEST_SHIFT); + InputsRead &= ~FRAG_BIT_COL0; + col_interp_nr++; + } else { WARN_ONCE("fragprog wants col0, vp doesn't provide it\n"); - goto out; /* FIXME */ - //_mesa_print_program(&CURRENT_VERTEX_SHADER(ctx)->Base); - //exit(-1); } - - r300->hw.rr.cmd[R300_RR_ROUTE_0] |= 0 - | R300_RS_ROUTE_0_COLOR - | (fp_reg++ << R300_RS_ROUTE_0_COLOR_DEST_SHIFT); - InputsRead &= ~FRAG_BIT_COL0; - col_interp_nr++; } - out: if (InputsRead & FRAG_BIT_COL1) { - if (!R300_OUTPUTS_WRITTEN_TEST( OutputsWritten, VERT_RESULT_COL1, _TNL_ATTRIB_COLOR1 )) { + if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL1, _TNL_ATTRIB_COLOR1)) { + r300->hw.rr.cmd[R300_RR_ROUTE_1] |= R300_RS_ROUTE_1_UNKNOWN11 | R300_RS_ROUTE_1_COLOR1 | (fp_reg++ << R300_RS_ROUTE_1_COLOR1_DEST_SHIFT); + InputsRead &= ~FRAG_BIT_COL1; + if (high_rr < 1) + high_rr = 1; + col_interp_nr++; + } else { WARN_ONCE("fragprog wants col1, vp doesn't provide it\n"); - //exit(-1); } - - r300->hw.rr.cmd[R300_RR_ROUTE_1] |= R300_RS_ROUTE_1_UNKNOWN11 - | R300_RS_ROUTE_1_COLOR1 - | (fp_reg++ << R300_RS_ROUTE_1_COLOR1_DEST_SHIFT); - InputsRead &= ~FRAG_BIT_COL1; - if (high_rr < 1) high_rr = 1; - col_interp_nr++; } /* Need at least one. This might still lock as the values are undefined... */ if (in_texcoords == 0 && col_interp_nr == 0) { - r300->hw.rr.cmd[R300_RR_ROUTE_0] |= 0 - | R300_RS_ROUTE_0_COLOR - | (fp_reg++ << R300_RS_ROUTE_0_COLOR_DEST_SHIFT); + r300->hw.rr.cmd[R300_RR_ROUTE_0] |= 0 | R300_RS_ROUTE_0_COLOR | (fp_reg++ << R300_RS_ROUTE_0_COLOR_DEST_SHIFT); col_interp_nr++; } - r300->hw.rc.cmd[1] = 0 - | (in_texcoords << R300_RS_CNTL_TC_CNT_SHIFT) - | (col_interp_nr << R300_RS_CNTL_CI_CNT_SHIFT) - | R300_RS_CNTL_0_UNKNOWN_18; + r300->hw.rc.cmd[1] = 0 | (in_texcoords << R300_RS_CNTL_TC_CNT_SHIFT) + | (col_interp_nr << R300_RS_CNTL_CI_CNT_SHIFT) + | R300_RS_CNTL_0_UNKNOWN_18; assert(high_rr >= 0); - r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(R300_RS_ROUTE_0, high_rr+1); + r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(R300_RS_ROUTE_0, high_rr + 1); r300->hw.rc.cmd[2] = 0xC0 | high_rr; if (InputsRead) WARN_ONCE("Don't know how to satisfy InputsRead=0x%08x\n", InputsRead); } -#define vpucount(ptr) (((drm_r300_cmd_header_t*)(ptr))->vpu.count) - #define bump_vpu_count(ptr, new_count) do{\ drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\ int _nc=(new_count)/4; \ @@ -1503,472 +1477,252 @@ void r300_setup_rs_unit(GLcontext *ctx) if(_nc>_p->vpu.count)_p->vpu.count=_nc;\ }while(0) -void static inline setup_vertex_shader_fragment(r300ContextPtr r300, int dest, struct r300_vertex_shader_fragment *vsf) +static inline void r300SetupVertexProgramFragment(r300ContextPtr r300, int dest, struct r300_vertex_shader_fragment *vsf) { int i; - if(vsf->length==0)return; + if (vsf->length == 0) + return; - if(vsf->length & 0x3){ - fprintf(stderr,"VERTEX_SHADER_FRAGMENT must have length divisible by 4\n"); - exit(-1); - } + if (vsf->length & 0x3) { + fprintf(stderr, "VERTEX_SHADER_FRAGMENT must have length divisible by 4\n"); + _mesa_exit(-1); + } - switch((dest>>8) & 0xf){ + switch ((dest >> 8) & 0xf) { case 0: R300_STATECHANGE(r300, vpi); - for(i=0;i<vsf->length;i++) - r300->hw.vpi.cmd[R300_VPI_INSTR_0+i+4*(dest & 0xff)]=(vsf->body.d[i]); - bump_vpu_count(r300->hw.vpi.cmd, vsf->length+4*(dest & 0xff)); + for (i = 0; i < vsf->length; i++) + r300->hw.vpi.cmd[R300_VPI_INSTR_0 + i + 4 * (dest & 0xff)] = (vsf->body.d[i]); + bump_vpu_count(r300->hw.vpi.cmd, vsf->length + 4 * (dest & 0xff)); break; case 2: R300_STATECHANGE(r300, vpp); - for(i=0;i<vsf->length;i++) - r300->hw.vpp.cmd[R300_VPP_PARAM_0+i+4*(dest & 0xff)]=(vsf->body.d[i]); - bump_vpu_count(r300->hw.vpp.cmd, vsf->length+4*(dest & 0xff)); + for (i = 0; i < vsf->length; i++) + r300->hw.vpp.cmd[R300_VPP_PARAM_0 + i + 4 * (dest & 0xff)] = (vsf->body.d[i]); + bump_vpu_count(r300->hw.vpp.cmd, vsf->length + 4 * (dest & 0xff)); break; case 4: R300_STATECHANGE(r300, vps); - for(i=0;i<vsf->length;i++) - r300->hw.vps.cmd[1+i+4*(dest & 0xff)]=(vsf->body.d[i]); - bump_vpu_count(r300->hw.vps.cmd, vsf->length+4*(dest & 0xff)); + for (i = 0; i < vsf->length; i++) + r300->hw.vps.cmd[1 + i + 4 * (dest & 0xff)] = (vsf->body.d[i]); + bump_vpu_count(r300->hw.vps.cmd, vsf->length + 4 * (dest & 0xff)); break; default: fprintf(stderr, "%s:%s don't know how to handle dest %04x\n", __FILE__, __FUNCTION__, dest); - exit(-1); + _mesa_exit(-1); } } -void r300SetupVertexProgram(r300ContextPtr rmesa); - -/* just a skeleton for now.. */ - -/* Generate a vertex shader that simply transforms vertex and texture coordinates, - while leaving colors intact. Nothing fancy (like lights) - - If implementing lights make a copy first, so it is easy to switch between the two versions */ -static void r300GenerateSimpleVertexShader(r300ContextPtr r300) +static void r300SetupDefaultVertexProgram(r300ContextPtr rmesa) { - int i; + struct r300_vertex_shader_state *prog = &(rmesa->state.vertex_shader); GLuint o_reg = 0; - - /* Allocate parameters */ - r300->state.vap_param.transform_offset=0x0; /* transform matrix */ - r300->state.vertex_shader.param_offset=0x0; - r300->state.vertex_shader.param_count=0x4; /* 4 vector values - 4x4 matrix */ - - r300->state.vertex_shader.program_start=0x0; - r300->state.vertex_shader.unknown_ptr1=0x4; /* magic value ? */ - r300->state.vertex_shader.program_end=0x0; - - r300->state.vertex_shader.unknown_ptr2=0x0; /* magic value */ - r300->state.vertex_shader.unknown_ptr3=0x4; /* magic value */ - - /* Initialize matrix and vector parameters.. these should really be restructured */ - /* TODO: fix vertex_shader structure */ - r300->state.vertex_shader.matrix[0].length=16; - r300->state.vertex_shader.matrix[1].length=0; - r300->state.vertex_shader.matrix[2].length=0; - r300->state.vertex_shader.vector[0].length=0; - r300->state.vertex_shader.vector[1].length=0; - r300->state.vertex_shader.unknown1.length=0; - r300->state.vertex_shader.unknown2.length=0; - -#define WRITE_OP(oper,source1,source2,source3) {\ - r300->state.vertex_shader.program.body.i[r300->state.vertex_shader.program_end].op=(oper); \ - r300->state.vertex_shader.program.body.i[r300->state.vertex_shader.program_end].src1=(source1); \ - r300->state.vertex_shader.program.body.i[r300->state.vertex_shader.program_end].src2=(source2); \ - r300->state.vertex_shader.program.body.i[r300->state.vertex_shader.program_end].src3=(source3); \ - r300->state.vertex_shader.program_end++; \ - } - - /* Multiply vertex coordinates with transform matrix */ - - WRITE_OP( - EASY_VSF_OP(MUL, 0, ALL, TMP), - VSF_PARAM(3), - VSF_ATTR_W(0), - EASY_VSF_SOURCE(0, W, W, W, W, NONE, NONE) - ) - - WRITE_OP( - EASY_VSF_OP(MUL, 1, ALL, RESULT), - VSF_REG(1), - VSF_ATTR_UNITY(1), - VSF_UNITY(1) - ) - - WRITE_OP( - EASY_VSF_OP(MAD, 0, ALL, TMP), - VSF_PARAM(2), - VSF_ATTR_Z(0), - VSF_TMP(0) - ) - - WRITE_OP( - EASY_VSF_OP(MAD, 0, ALL, TMP), - VSF_PARAM(1), - VSF_ATTR_Y(0), - VSF_TMP(0) - ) - - WRITE_OP( - EASY_VSF_OP(MAD, 0, ALL, RESULT), - VSF_PARAM(0), - VSF_ATTR_X(0), - VSF_TMP(0) - ) - o_reg += 2; - - for (i = VERT_ATTRIB_COLOR1; i < VERT_ATTRIB_MAX; i++) - if (r300->state.sw_tcl_inputs[i] != -1) { - WRITE_OP( - EASY_VSF_OP(MUL, o_reg++ /* 2+i */, ALL, RESULT), - VSF_REG(r300->state.sw_tcl_inputs[i]), - VSF_ATTR_UNITY(r300->state.sw_tcl_inputs[i]), - VSF_UNITY(r300->state.sw_tcl_inputs[i]) - ) - + int i; + int inst_count = 0; + int param_count = 0; + int program_end = 0; + + for (i = VERT_ATTRIB_POS; i < VERT_ATTRIB_MAX; i++) { + if (rmesa->state.sw_tcl_inputs[i] != -1) { + prog->program.body.i[program_end].op = EASY_VSF_OP(MUL, o_reg++, ALL, RESULT); + prog->program.body.i[program_end].src[0] = VSF_REG(rmesa->state.sw_tcl_inputs[i]); + prog->program.body.i[program_end].src[1] = VSF_ATTR_UNITY(rmesa->state.sw_tcl_inputs[i]); + prog->program.body.i[program_end].src[2] = VSF_UNITY(rmesa->state.sw_tcl_inputs[i]); + program_end++; } - - r300->state.vertex_shader.program_end--; /* r300 wants program length to be one more - no idea why */ - r300->state.vertex_shader.program.length=(r300->state.vertex_shader.program_end+1)*4; - - r300->state.vertex_shader.unknown_ptr1=r300->state.vertex_shader.program_end; /* magic value ? */ - r300->state.vertex_shader.unknown_ptr2=r300->state.vertex_shader.program_end; /* magic value ? */ - r300->state.vertex_shader.unknown_ptr3=r300->state.vertex_shader.program_end; /* magic value ? */ - -} - - -void r300SetupVertexShader(r300ContextPtr rmesa) -{ - GLcontext* ctx = rmesa->radeon.glCtx; - - /* Reset state, in case we don't use something */ - ((drm_r300_cmd_header_t*)rmesa->hw.vpp.cmd)->vpu.count = 0; - ((drm_r300_cmd_header_t*)rmesa->hw.vpi.cmd)->vpu.count = 0; - ((drm_r300_cmd_header_t*)rmesa->hw.vps.cmd)->vpu.count = 0; - - /* Not sure why this doesnt work... - 0x400 area might have something to do with pixel shaders as it appears right after pfs programming. - 0x406 is set to { 0.0, 0.0, 1.0, 0.0 } most of the time but should change with smooth points and in other rare cases. */ - //setup_vertex_shader_fragment(rmesa, 0x406, &unk4); - if(hw_tcl_on && ((struct r300_vertex_program *)CURRENT_VERTEX_SHADER(ctx))->translated){ - r300SetupVertexProgram(rmesa); - return ; } -/* This needs to be replaced by vertex shader generation code */ - - -#if 0 - /* textures enabled ? */ - if(rmesa->state.texture.tc_count>0){ - rmesa->state.vertex_shader=SINGLE_TEXTURE_VERTEX_SHADER; - } else { - rmesa->state.vertex_shader=FLAT_COLOR_VERTEX_SHADER; - } -#endif - - r300GenerateSimpleVertexShader(rmesa); - - rmesa->state.vertex_shader.matrix[0].length=16; - memcpy(rmesa->state.vertex_shader.matrix[0].body.f, ctx->_ModelProjectMatrix.m, 16*4); - - setup_vertex_shader_fragment(rmesa, VSF_DEST_PROGRAM, &(rmesa->state.vertex_shader.program)); - - setup_vertex_shader_fragment(rmesa, VSF_DEST_MATRIX0, &(rmesa->state.vertex_shader.matrix[0])); -#if 0 - setup_vertex_shader_fragment(rmesa, VSF_DEST_MATRIX1, &(rmesa->state.vertex_shader.matrix[0])); - setup_vertex_shader_fragment(rmesa, VSF_DEST_MATRIX2, &(rmesa->state.vertex_shader.matrix[0])); - - setup_vertex_shader_fragment(rmesa, VSF_DEST_VECTOR0, &(rmesa->state.vertex_shader.vector[0])); - setup_vertex_shader_fragment(rmesa, VSF_DEST_VECTOR1, &(rmesa->state.vertex_shader.vector[1])); -#endif + prog->program.length = program_end * 4; -#if 0 - setup_vertex_shader_fragment(rmesa, VSF_DEST_UNKNOWN1, &(rmesa->state.vertex_shader.unknown1)); - setup_vertex_shader_fragment(rmesa, VSF_DEST_UNKNOWN2, &(rmesa->state.vertex_shader.unknown2)); -#endif + r300SetupVertexProgramFragment(rmesa, VSF_DEST_PROGRAM, &(prog->program)); + inst_count = (prog->program.length / 4) - 1; R300_STATECHANGE(rmesa, pvs); - rmesa->hw.pvs.cmd[R300_PVS_CNTL_1]=(rmesa->state.vertex_shader.program_start << R300_PVS_CNTL_1_PROGRAM_START_SHIFT) - | (rmesa->state.vertex_shader.unknown_ptr1 << R300_PVS_CNTL_1_POS_END_SHIFT) - | (rmesa->state.vertex_shader.program_end << R300_PVS_CNTL_1_PROGRAM_END_SHIFT); - rmesa->hw.pvs.cmd[R300_PVS_CNTL_2]=(rmesa->state.vertex_shader.param_offset << R300_PVS_CNTL_2_PARAM_OFFSET_SHIFT) - | (rmesa->state.vertex_shader.param_count << R300_PVS_CNTL_2_PARAM_COUNT_SHIFT); - rmesa->hw.pvs.cmd[R300_PVS_CNTL_3]=(rmesa->state.vertex_shader.unknown_ptr2 << R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT) - | (rmesa->state.vertex_shader.unknown_ptr3 << 0); - - /* This is done for vertex shader fragments, but also needs to be done for vap_pvs, - so I leave it as a reminder */ -#if 0 - reg_start(R300_VAP_PVS_WAITIDLE,0); - e32(0x00000000); -#endif + rmesa->hw.pvs.cmd[R300_PVS_CNTL_1] = + (0 << R300_PVS_CNTL_1_PROGRAM_START_SHIFT) | + (inst_count << R300_PVS_CNTL_1_POS_END_SHIFT) | + (inst_count << R300_PVS_CNTL_1_PROGRAM_END_SHIFT); + rmesa->hw.pvs.cmd[R300_PVS_CNTL_2] = + (0 << R300_PVS_CNTL_2_PARAM_OFFSET_SHIFT) | + (param_count << R300_PVS_CNTL_2_PARAM_COUNT_SHIFT); + rmesa->hw.pvs.cmd[R300_PVS_CNTL_3] = + (inst_count << R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT) | + (inst_count << R300_PVS_CNTL_3_PROGRAM_UNKNOWN2_SHIFT); } -void r300SetupVertexProgram(r300ContextPtr rmesa) +static void r300SetupRealVertexProgram(r300ContextPtr rmesa) { - GLcontext* ctx = rmesa->radeon.glCtx; - int inst_count; - int param_count; - struct r300_vertex_program *prog=(struct r300_vertex_program *)CURRENT_VERTEX_SHADER(ctx); - + GLcontext *ctx = rmesa->radeon.glCtx; + struct r300_vertex_program *prog = (struct r300_vertex_program *)CURRENT_VERTEX_SHADER(ctx); + int inst_count = 0; + int param_count = 0; - ((drm_r300_cmd_header_t*)rmesa->hw.vpp.cmd)->vpu.count = 0; + /* FIXME: r300SetupVertexProgramFragment */ R300_STATECHANGE(rmesa, vpp); - param_count = r300VertexProgUpdateParams(ctx, (struct r300_vertex_program_cont *)ctx->VertexProgram._Current/*prog*/, (float *)&rmesa->hw.vpp.cmd[R300_VPP_PARAM_0]); + param_count = + r300VertexProgUpdateParams(ctx, + (struct r300_vertex_program_cont *) + ctx->VertexProgram._Current, + (float *)&rmesa->hw.vpp. + cmd[R300_VPP_PARAM_0]); bump_vpu_count(rmesa->hw.vpp.cmd, param_count); param_count /= 4; - /* Reset state, in case we don't use something */ - ((drm_r300_cmd_header_t*)rmesa->hw.vpi.cmd)->vpu.count = 0; - ((drm_r300_cmd_header_t*)rmesa->hw.vps.cmd)->vpu.count = 0; - - setup_vertex_shader_fragment(rmesa, VSF_DEST_PROGRAM, &(prog->program)); - -#if 0 - setup_vertex_shader_fragment(rmesa, VSF_DEST_UNKNOWN1, &(rmesa->state.vertex_shader.unknown1)); - setup_vertex_shader_fragment(rmesa, VSF_DEST_UNKNOWN2, &(rmesa->state.vertex_shader.unknown2)); -#endif - - inst_count=prog->program.length/4 - 1; + r300SetupVertexProgramFragment(rmesa, VSF_DEST_PROGRAM, &(prog->program)); + inst_count = (prog->program.length / 4) - 1; R300_STATECHANGE(rmesa, pvs); - rmesa->hw.pvs.cmd[R300_PVS_CNTL_1]=(0 << R300_PVS_CNTL_1_PROGRAM_START_SHIFT) - | (inst_count/*pos_end*/ << R300_PVS_CNTL_1_POS_END_SHIFT) - | (inst_count << R300_PVS_CNTL_1_PROGRAM_END_SHIFT); - rmesa->hw.pvs.cmd[R300_PVS_CNTL_2]=(0 << R300_PVS_CNTL_2_PARAM_OFFSET_SHIFT) - | (param_count << R300_PVS_CNTL_2_PARAM_COUNT_SHIFT); - rmesa->hw.pvs.cmd[R300_PVS_CNTL_3]=(0/*rmesa->state.vertex_shader.unknown_ptr2*/ << R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT) - | (inst_count /*rmesa->state.vertex_shader.unknown_ptr3*/ << 0); - - /* This is done for vertex shader fragments, but also needs to be done for vap_pvs, - so I leave it as a reminder */ -#if 0 - reg_start(R300_VAP_PVS_WAITIDLE,0); - e32(0x00000000); -#endif + rmesa->hw.pvs.cmd[R300_PVS_CNTL_1] = + (0 << R300_PVS_CNTL_1_PROGRAM_START_SHIFT) | + (inst_count << R300_PVS_CNTL_1_POS_END_SHIFT) | + (inst_count << R300_PVS_CNTL_1_PROGRAM_END_SHIFT); + rmesa->hw.pvs.cmd[R300_PVS_CNTL_2] = + (0 << R300_PVS_CNTL_2_PARAM_OFFSET_SHIFT) | + (param_count << R300_PVS_CNTL_2_PARAM_COUNT_SHIFT); + rmesa->hw.pvs.cmd[R300_PVS_CNTL_3] = + (inst_count << R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT) | + (inst_count << R300_PVS_CNTL_3_PROGRAM_UNKNOWN2_SHIFT); } -extern void _tnl_UpdateFixedFunctionProgram( GLcontext *ctx ); - -extern int future_hw_tcl_on; -void r300UpdateShaders(r300ContextPtr rmesa) +static void r300SetupVertexProgram(r300ContextPtr rmesa) { - GLcontext *ctx; - struct r300_vertex_program *vp; - int i; - - ctx = rmesa->radeon.glCtx; - - if (rmesa->NewGLState && hw_tcl_on) { - rmesa->NewGLState = 0; - - for (i = _TNL_FIRST_MAT; i <= _TNL_LAST_MAT; i++) { - rmesa->temp_attrib[i] = TNL_CONTEXT(ctx)->vb.AttribPtr[i]; - TNL_CONTEXT(ctx)->vb.AttribPtr[i] = &rmesa->dummy_attrib[i]; - } - - _tnl_UpdateFixedFunctionProgram(ctx); - - for (i = _TNL_FIRST_MAT; i <= _TNL_LAST_MAT; i++) { - TNL_CONTEXT(ctx)->vb.AttribPtr[i] = rmesa->temp_attrib[i]; - } + GLcontext *ctx = rmesa->radeon.glCtx; - r300_select_vertex_shader(rmesa); - vp = (struct r300_vertex_program *)CURRENT_VERTEX_SHADER(ctx); - /*if (vp->translated == GL_FALSE) - r300_translate_vertex_shader(vp);*/ - if (vp->translated == GL_FALSE) { - fprintf(stderr, "Failing back to sw-tcl\n"); - hw_tcl_on = future_hw_tcl_on = 0; - r300ResetHwState(rmesa); + /* Reset state, in case we don't use something */ + ((drm_r300_cmd_header_t *) rmesa->hw.vpp.cmd)->vpu.count = 0; + ((drm_r300_cmd_header_t *) rmesa->hw.vpi.cmd)->vpu.count = 0; + ((drm_r300_cmd_header_t *) rmesa->hw.vps.cmd)->vpu.count = 0; - return ; - } - r300UpdateStateParameters(ctx, _NEW_PROGRAM); + /* Not sure why this doesnt work... + 0x400 area might have something to do with pixel shaders as it appears right after pfs programming. + 0x406 is set to { 0.0, 0.0, 1.0, 0.0 } most of the time but should change with smooth points and in other rare cases. */ + //setup_vertex_shader_fragment(rmesa, 0x406, &unk4); + if (hw_tcl_on && ((struct r300_vertex_program *)CURRENT_VERTEX_SHADER(ctx))->translated) { + r300SetupRealVertexProgram(rmesa); + } else { + /* FIXME: This needs to be replaced by vertex shader generation code. */ + r300SetupDefaultVertexProgram(rmesa); } -} -void r300UpdateShaderStates(r300ContextPtr rmesa) -{ - GLcontext *ctx; - ctx = rmesa->radeon.glCtx; - - r300UpdateTextureState(ctx); - - r300SetupPixelShader(rmesa); - r300_setup_textures(ctx); - - r300SetupVertexShader(rmesa); - r300_setup_rs_unit(ctx); + /* FIXME: This is done for vertex shader fragments, but also needs to be + * done for vap_pvs, so I leave it as a reminder. */ +#if 0 + reg_start(R300_VAP_PVS_WAITIDLE, 0); + e32(0x00000000); +#endif } -/* This is probably wrong for some values, I need to test this - * some more. Range checking would be a good idea also.. +/** + * Enable/Disable states. * - * But it works for most things. I'll fix it later if someone - * else with a better clue doesn't + * \note Mesa already filters redundant calls to this function. */ -static unsigned int r300PackFloat24(float f) +static void r300Enable(GLcontext * ctx, GLenum cap, GLboolean state) { - float mantissa; - int exponent; - unsigned int float24 = 0; - - if (f == 0.0) return 0; + r300ContextPtr r300 = R300_CONTEXT(ctx); - mantissa = frexpf(f, &exponent); + if (RADEON_DEBUG & DEBUG_STATE) + fprintf(stderr, "%s( %s = %s )\n", __FUNCTION__, + _mesa_lookup_enum_by_nr(cap), + state ? "GL_TRUE" : "GL_FALSE"); - /* Handle -ve */ - if (mantissa < 0) { - float24 |= (1<<23); - mantissa = mantissa * -1.0; - } - /* Handle exponent, bias of 63 */ - exponent += 62; - float24 |= (exponent << 16); - /* Kill 7 LSB of mantissa */ - float24 |= (r300PackFloat32(mantissa) & 0x7FFFFF) >> 7; + switch (cap) { + /* Fast track this one... + */ + case GL_TEXTURE_1D: + case GL_TEXTURE_2D: + case GL_TEXTURE_3D: + break; - return float24; -} + case GL_FOG: + R300_STATECHANGE(r300, fogs); + if (state) { + r300->hw.fogs.cmd[R300_FOGS_STATE] |= R300_FOG_ENABLE; -void r300SetupPixelShader(r300ContextPtr rmesa) -{ - GLcontext *ctx = rmesa->radeon.glCtx; - struct r300_fragment_program *rp = - (struct r300_fragment_program *) - (char *)ctx->FragmentProgram._Current; - int i,k; + r300Fogfv(ctx, GL_FOG_MODE, NULL); + r300Fogfv(ctx, GL_FOG_DENSITY, &ctx->Fog.Density); + r300Fogfv(ctx, GL_FOG_START, &ctx->Fog.Start); + r300Fogfv(ctx, GL_FOG_END, &ctx->Fog.End); + r300Fogfv(ctx, GL_FOG_COLOR, ctx->Fog.Color); + } else { + r300->hw.fogs.cmd[R300_FOGS_STATE] &= ~R300_FOG_ENABLE; + } - if (!rp) /* should only happenen once, just after context is created */ - return; + break; - r300_translate_fragment_shader(rmesa, rp); - if (!rp->translated) { - fprintf(stderr, "%s: No valid fragment shader, exiting\n", __func__); - return; - } + case GL_ALPHA_TEST: + r300SetAlphaState(ctx); + break; -#define OUTPUT_FIELD(st, reg, field) \ - R300_STATECHANGE(rmesa, st); \ - for(i=0;i<=rp->alu_end;i++) \ - rmesa->hw.st.cmd[R300_FPI_INSTR_0+i]=rp->alu.inst[i].field;\ - rmesa->hw.st.cmd[R300_FPI_CMD_0]=cmdpacket0(reg, rp->alu_end+1); + case GL_BLEND: + case GL_COLOR_LOGIC_OP: + r300SetBlendState(ctx); + break; - OUTPUT_FIELD(fpi[0], R300_PFS_INSTR0_0, inst0); - OUTPUT_FIELD(fpi[1], R300_PFS_INSTR1_0, inst1); - OUTPUT_FIELD(fpi[2], R300_PFS_INSTR2_0, inst2); - OUTPUT_FIELD(fpi[3], R300_PFS_INSTR3_0, inst3); -#undef OUTPUT_FIELD + case GL_DEPTH_TEST: + r300SetDepthState(ctx); + break; - R300_STATECHANGE(rmesa, fp); - /* I just want to say, the way these nodes are stored.. weird.. */ - for (i=0,k=(4-(rp->cur_node+1));i<4;i++,k++) { - if (i<(rp->cur_node+1)) { - rmesa->hw.fp.cmd[R300_FP_NODE0+k]= - (rp->node[i].alu_offset << R300_PFS_NODE_ALU_OFFSET_SHIFT) - | (rp->node[i].alu_end << R300_PFS_NODE_ALU_END_SHIFT) - | (rp->node[i].tex_offset << R300_PFS_NODE_TEX_OFFSET_SHIFT) - | (rp->node[i].tex_end << R300_PFS_NODE_TEX_END_SHIFT) - | rp->node[i].flags; /* ( (k==3) ? R300_PFS_NODE_LAST_NODE : 0); */ + case GL_STENCIL_TEST: + if (r300->state.stencil.hw_stencil) { + R300_STATECHANGE(r300, zs); + if (state) { + r300->hw.zs.cmd[R300_ZS_CNTL_0] |= + R300_RB3D_STENCIL_ENABLE; + } else { + r300->hw.zs.cmd[R300_ZS_CNTL_0] &= + ~R300_RB3D_STENCIL_ENABLE; + } } else { - rmesa->hw.fp.cmd[R300_FP_NODE0+(3-i)] = 0; +#if R200_MERGED + FALLBACK(&r300->radeon, RADEON_FALLBACK_STENCIL, state); +#endif } - } - - /* PFS_CNTL_0 */ - rmesa->hw.fp.cmd[R300_FP_CNTL0]= - rp->cur_node - | (rp->first_node_has_tex<<3); - /* PFS_CNTL_1 */ - rmesa->hw.fp.cmd[R300_FP_CNTL1]=rp->max_temp_idx; - /* PFS_CNTL_2 */ - rmesa->hw.fp.cmd[R300_FP_CNTL2]= - (rp->alu_offset << R300_PFS_CNTL_ALU_OFFSET_SHIFT) - | (rp->alu_end << R300_PFS_CNTL_ALU_END_SHIFT) - | (rp->tex_offset << R300_PFS_CNTL_TEX_OFFSET_SHIFT) - | (rp->tex_end << R300_PFS_CNTL_TEX_END_SHIFT); - - R300_STATECHANGE(rmesa, fpp); - for(i=0;i<rp->const_nr;i++){ - rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+0]=r300PackFloat24(rp->constant[i][0]); - rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+1]=r300PackFloat24(rp->constant[i][1]); - rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+2]=r300PackFloat24(rp->constant[i][2]); - rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+3]=r300PackFloat24(rp->constant[i][3]); - } - rmesa->hw.fpp.cmd[R300_FPP_CMD_0]=cmdpacket0(R300_PFS_PARAM_0_X, rp->const_nr*4); -} - -/** - * Called by Mesa after an internal state update. - */ -static void r300InvalidateState(GLcontext * ctx, GLuint new_state) -{ - r300ContextPtr r300 = R300_CONTEXT(ctx); + break; - _swrast_InvalidateState(ctx, new_state); - _swsetup_InvalidateState(ctx, new_state); - _vbo_InvalidateState(ctx, new_state); - _tnl_InvalidateState(ctx, new_state); - _ae_invalidate_state(ctx, new_state); + case GL_CULL_FACE: + r300UpdateCulling(ctx); + break; - if (new_state & (_NEW_BUFFERS | _NEW_COLOR | _NEW_PIXEL)) { - r300UpdateDrawBuffer(ctx); + case GL_POLYGON_OFFSET_POINT: + case GL_POLYGON_OFFSET_LINE: + case GL_POLYGON_OFFSET_FILL: + R300_STATECHANGE(r300, occlusion_cntl); + if (state) { + r300->hw.occlusion_cntl.cmd[1] |= (3 << 0); + } else { + r300->hw.occlusion_cntl.cmd[1] &= ~(3 << 0); + } + break; + default: + radeonEnable(ctx, cap, state); + return; } - - r300UpdateStateParameters(ctx, new_state); - -#ifdef HW_VBOS - if(new_state & _NEW_ARRAY) - r300->state.VB.lock_uptodate = GL_FALSE; -#endif - r300->NewGLState |= new_state; } /** * Completely recalculates hardware state based on the Mesa state. */ -void r300ResetHwState(r300ContextPtr r300) +static void r300ResetHwState(r300ContextPtr r300) { - GLcontext* ctx = r300->radeon.glCtx; + GLcontext *ctx = r300->radeon.glCtx; + int has_tcl = 1; + + if (!(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) + has_tcl = 0; if (RADEON_DEBUG & DEBUG_STATE) fprintf(stderr, "%s\n", __FUNCTION__); - /* This is a place to initialize registers which - have bitfields accessed by different functions - and not all bits are used */ -#if 0 - /* initialize similiar to r200 */ - r300->hw.zs.cmd[R300_ZS_CNTL_0] = 0; - r300->hw.zs.cmd[R300_ZS_CNTL_1] = - (R300_ZS_ALWAYS << R300_RB3D_ZS1_FRONT_FUNC_SHIFT) | - (R300_ZS_KEEP << R300_RB3D_ZS1_FRONT_FAIL_OP_SHIFT) | - (R300_ZS_KEEP << R300_RB3D_ZS1_FRONT_ZPASS_OP_SHIFT) | - (R300_ZS_KEEP << R300_RB3D_ZS1_FRONT_ZFAIL_OP_SHIFT) | - (R300_ZS_ALWAYS << R300_RB3D_ZS1_BACK_FUNC_SHIFT) | - (R300_ZS_KEEP << R300_RB3D_ZS1_BACK_FAIL_OP_SHIFT) | - (R300_ZS_KEEP << R300_RB3D_ZS1_BACK_ZPASS_OP_SHIFT) | - (R300_ZS_KEEP << R300_RB3D_ZS1_BACK_ZFAIL_OP_SHIFT); - r300->hw.zs.cmd[R300_ZS_CNTL_2] = 0x00ffff00; -#endif - - /* go and compute register values from GL state */ - r300UpdateWindow(ctx); r300ColorMask(ctx, - ctx->Color.ColorMask[RCOMP], - ctx->Color.ColorMask[GCOMP], - ctx->Color.ColorMask[BCOMP], - ctx->Color.ColorMask[ACOMP]); + ctx->Color.ColorMask[RCOMP], + ctx->Color.ColorMask[GCOMP], + ctx->Color.ColorMask[BCOMP], ctx->Color.ColorMask[ACOMP]); r300Enable(ctx, GL_DEPTH_TEST, ctx->Depth.Test); r300DepthMask(ctx, ctx->Depth.Mask); @@ -1977,123 +1731,103 @@ void r300ResetHwState(r300ContextPtr r300) /* stencil */ r300Enable(ctx, GL_STENCIL_TEST, ctx->Stencil.Enabled); r300StencilMaskSeparate(ctx, 0, ctx->Stencil.WriteMask[0]); - r300StencilFuncSeparate(ctx, 0, ctx->Stencil.Function[0], ctx->Stencil.Ref[0], ctx->Stencil.ValueMask[0]); - r300StencilOpSeparate(ctx, 0, ctx->Stencil.FailFunc[0], ctx->Stencil.ZFailFunc[0], ctx->Stencil.ZPassFunc[0]); + r300StencilFuncSeparate(ctx, 0, ctx->Stencil.Function[0], + ctx->Stencil.Ref[0], ctx->Stencil.ValueMask[0]); + r300StencilOpSeparate(ctx, 0, ctx->Stencil.FailFunc[0], + ctx->Stencil.ZFailFunc[0], + ctx->Stencil.ZPassFunc[0]); r300UpdateCulling(ctx); r300UpdateTextureState(ctx); -// r300_setup_routing(ctx, GL_TRUE); - -#if 0 /* Done in prior to rendering */ - if(hw_tcl_on == GL_FALSE){ - r300EmitArrays(ctx, GL_TRUE); /* Just do the routing */ - r300_setup_textures(ctx); - r300_setup_rs_unit(ctx); - - r300SetupVertexShader(r300); - r300SetupPixelShader(r300); - } -#endif - - r300_set_blend_state(ctx); + r300SetBlendState(ctx); r300AlphaFunc(ctx, ctx->Color.AlphaFunc, ctx->Color.AlphaRef); r300Enable(ctx, GL_ALPHA_TEST, ctx->Color.AlphaEnabled); - /* Initialize magic registers - TODO : learn what they really do, or get rid of - those we don't have to touch */ - if (!(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) + if (!has_tcl) r300->hw.vap_cntl.cmd[1] = 0x0014045a; else - r300->hw.vap_cntl.cmd[1] = 0x0030045A; //0x0030065a /* Dangerous */ + r300->hw.vap_cntl.cmd[1] = 0x0030045A; //0x0030065a /* Dangerous */ + r300->hw.vte.cmd[1] = R300_VPORT_X_SCALE_ENA - | R300_VPORT_X_OFFSET_ENA - | R300_VPORT_Y_SCALE_ENA - | R300_VPORT_Y_OFFSET_ENA - | R300_VPORT_Z_SCALE_ENA - | R300_VPORT_Z_OFFSET_ENA - | R300_VTX_W0_FMT; + | R300_VPORT_X_OFFSET_ENA + | R300_VPORT_Y_SCALE_ENA + | R300_VPORT_Y_OFFSET_ENA + | R300_VPORT_Z_SCALE_ENA + | R300_VPORT_Z_OFFSET_ENA | R300_VTX_W0_FMT; r300->hw.vte.cmd[2] = 0x00000008; r300->hw.unk2134.cmd[1] = 0x00FFFFFF; r300->hw.unk2134.cmd[2] = 0x00000000; - if (_mesa_little_endian()) - r300->hw.vap_cntl_status.cmd[1] = 0x00000000; - else - r300->hw.vap_cntl_status.cmd[1] = 0x00000002; + +#ifdef MESA_LITTLE_ENDIAN + r300->hw.vap_cntl_status.cmd[1] = R300_VC_NO_SWAP; +#else + r300->hw.vap_cntl_status.cmd[1] = R300_VC_32BIT_SWAP; +#endif /* disable VAP/TCL on non-TCL capable chips */ - if (!(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) + if (!has_tcl) r300->hw.vap_cntl_status.cmd[1] |= R300_VAP_TCL_BYPASS; -#if 0 /* Done in setup routing */ - ((drm_r300_cmd_header_t*)r300->hw.vir[0].cmd)->packet0.count = 1; - r300->hw.vir[0].cmd[1] = 0x21030003; - - ((drm_r300_cmd_header_t*)r300->hw.vir[1].cmd)->packet0.count = 1; - r300->hw.vir[1].cmd[1] = 0xF688F688; - - r300->hw.vic.cmd[R300_VIR_CNTL_0] = 0x00000001; - r300->hw.vic.cmd[R300_VIR_CNTL_1] = 0x00000405; -#endif - r300->hw.unk21DC.cmd[1] = 0xAAAAAAAA; r300->hw.unk221C.cmd[1] = R300_221C_NORMAL; - r300->hw.unk2220.cmd[1] = r300PackFloat32(1.0); - r300->hw.unk2220.cmd[2] = r300PackFloat32(1.0); - r300->hw.unk2220.cmd[3] = r300PackFloat32(1.0); - r300->hw.unk2220.cmd[4] = r300PackFloat32(1.0); + r300->hw.vap_clip.cmd[1] = r300PackFloat32(1.0); /* X */ + r300->hw.vap_clip.cmd[2] = r300PackFloat32(1.0); /* X */ + r300->hw.vap_clip.cmd[3] = r300PackFloat32(1.0); /* Y */ + r300->hw.vap_clip.cmd[4] = r300PackFloat32(1.0); /* Y */ - /* what about other chips than r300 or rv350??? */ - if (r300->radeon.radeonScreen->chip_family == CHIP_FAMILY_R300) - r300->hw.unk2288.cmd[1] = R300_2288_R300; - else - r300->hw.unk2288.cmd[1] = R300_2288_RV350; - -#if 0 - r300->hw.vof.cmd[R300_VOF_CNTL_0] = R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT - | R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT; - r300->hw.vof.cmd[R300_VOF_CNTL_1] = 0; /* no textures */ - - - r300->hw.pvs.cmd[R300_PVS_CNTL_1] = 0; - r300->hw.pvs.cmd[R300_PVS_CNTL_2] = 0; - r300->hw.pvs.cmd[R300_PVS_CNTL_3] = 0; -#endif + /* XXX: Other families? */ + if (has_tcl) { + switch (r300->radeon.radeonScreen->chip_family) { + case CHIP_FAMILY_R300: + r300->hw.unk2288.cmd[1] = R300_2288_R300; + break; + default: + r300->hw.unk2288.cmd[1] = R300_2288_RV350; + break; + } + } r300->hw.gb_enable.cmd[1] = R300_GB_POINT_STUFF_ENABLE - | R300_GB_LINE_STUFF_ENABLE - | R300_GB_TRIANGLE_STUFF_ENABLE /*| R300_GB_UNK31*/; + | R300_GB_LINE_STUFF_ENABLE + | R300_GB_TRIANGLE_STUFF_ENABLE /*| R300_GB_UNK31 */ ; r300->hw.gb_misc.cmd[R300_GB_MISC_MSPOS_0] = 0x66666666; r300->hw.gb_misc.cmd[R300_GB_MISC_MSPOS_1] = 0x06666666; - if ((r300->radeon.radeonScreen->chip_family == CHIP_FAMILY_R300) || - (r300->radeon.radeonScreen->chip_family == CHIP_FAMILY_R350)) - r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] = R300_GB_TILE_ENABLE - | R300_GB_TILE_PIPE_COUNT_R300 - | R300_GB_TILE_SIZE_16; - else if (r300->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV410) - r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] = R300_GB_TILE_ENABLE - | R300_GB_TILE_PIPE_COUNT_RV410 - | R300_GB_TILE_SIZE_16; - else if (r300->radeon.radeonScreen->chip_family == CHIP_FAMILY_R420) - r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] = R300_GB_TILE_ENABLE - | R300_GB_TILE_PIPE_COUNT_R420 - | R300_GB_TILE_SIZE_16; - else - r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] = R300_GB_TILE_ENABLE - | R300_GB_TILE_PIPE_COUNT_RV300 - | R300_GB_TILE_SIZE_16; - /* set to 0 when fog is disabled? */ + + /* XXX: Other families? */ + r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] = + R300_GB_TILE_ENABLE | R300_GB_TILE_SIZE_16; + switch (r300->radeon.radeonScreen->chip_family) { + case CHIP_FAMILY_R300: + case CHIP_FAMILY_R350: + r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |= + R300_GB_TILE_PIPE_COUNT_R300; + break; + case CHIP_FAMILY_RV410: + r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |= + R300_GB_TILE_PIPE_COUNT_RV410; + break; + case CHIP_FAMILY_R420: + r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |= + R300_GB_TILE_PIPE_COUNT_R420; + break; + default: + r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |= + R300_GB_TILE_PIPE_COUNT_RV300; + break; + } + + /* XXX: set to 0 when fog is disabled? */ r300->hw.gb_misc.cmd[R300_GB_MISC_SELECT] = R300_GB_FOG_SELECT_1_1_W; - r300->hw.gb_misc.cmd[R300_GB_MISC_AA_CONFIG] = 0x00000000; /* No antialiasing */ - //r300->hw.txe.cmd[R300_TXE_ENABLE] = 0; + /* XXX: Enable anti-aliasing? */ + r300->hw.gb_misc.cmd[R300_GB_MISC_AA_CONFIG] = R300_AA_DISABLE; r300->hw.unk4200.cmd[1] = r300PackFloat32(0.0); r300->hw.unk4200.cmd[2] = r300PackFloat32(0.0); @@ -2102,17 +1836,13 @@ void r300ResetHwState(r300ContextPtr r300) r300->hw.unk4214.cmd[1] = 0x00050005; - r300PointSize(ctx, 0.0); -#if 0 - r300->hw.ps.cmd[R300_PS_POINTSIZE] = (6 << R300_POINTSIZE_X_SHIFT) | - (6 << R300_POINTSIZE_Y_SHIFT); -#endif + r300PointSize(ctx, 1.0); r300->hw.unk4230.cmd[1] = 0x18000006; r300->hw.unk4230.cmd[2] = 0x00020006; r300->hw.unk4230.cmd[3] = r300PackFloat32(1.0 / 192.0); - r300LineWidth(ctx, 0.0); + r300LineWidth(ctx, 1.0); r300->hw.unk4260.cmd[1] = 0; r300->hw.unk4260.cmd[2] = r300PackFloat32(0.0); @@ -2129,68 +1859,47 @@ void r300ResetHwState(r300ContextPtr r300) r300->hw.polygon_mode.cmd[3] = 0x00000000; r300->hw.zbias_cntl.cmd[1] = 0x00000000; - r300PolygonOffset(ctx, ctx->Polygon.OffsetFactor, ctx->Polygon.OffsetUnits); + r300PolygonOffset(ctx, ctx->Polygon.OffsetFactor, + ctx->Polygon.OffsetUnits); + r300Enable(ctx, GL_POLYGON_OFFSET_POINT, ctx->Polygon.OffsetPoint); + r300Enable(ctx, GL_POLYGON_OFFSET_LINE, ctx->Polygon.OffsetLine); r300Enable(ctx, GL_POLYGON_OFFSET_FILL, ctx->Polygon.OffsetFill); r300->hw.unk42C0.cmd[1] = 0x4B7FFFFF; r300->hw.unk42C0.cmd[2] = 0x00000000; - r300->hw.unk43A4.cmd[1] = 0x0000001C; r300->hw.unk43A4.cmd[2] = 0x2DA49525; r300->hw.unk43E8.cmd[1] = 0x00FFFFFF; -#if 0 - r300->hw.fp.cmd[R300_FP_CNTL0] = 0; - r300->hw.fp.cmd[R300_FP_CNTL1] = 0; - r300->hw.fp.cmd[R300_FP_CNTL2] = 0; - r300->hw.fp.cmd[R300_FP_NODE0] = 0; - r300->hw.fp.cmd[R300_FP_NODE1] = 0; - r300->hw.fp.cmd[R300_FP_NODE2] = 0; - r300->hw.fp.cmd[R300_FP_NODE3] = 0; -#endif - r300->hw.unk46A4.cmd[1] = 0x00001B01; r300->hw.unk46A4.cmd[2] = 0x00001B0F; r300->hw.unk46A4.cmd[3] = 0x00001B0F; r300->hw.unk46A4.cmd[4] = 0x00001B0F; r300->hw.unk46A4.cmd[5] = 0x00000001; -#if 0 - for(i = 1; i <= 64; ++i) { - /* create NOP instructions */ - r300->hw.fpi[0].cmd[i] = FP_INSTRC(MAD, FP_ARGC(SRC0C_XYZ), FP_ARGC(ONE), FP_ARGC(ZERO)); - r300->hw.fpi[1].cmd[i] = FP_SELC(0,XYZ,NO,FP_TMP(0),0,0); - r300->hw.fpi[2].cmd[i] = FP_INSTRA(MAD, FP_ARGA(SRC0A), FP_ARGA(ONE), FP_ARGA(ZERO)); - r300->hw.fpi[3].cmd[i] = FP_SELA(0,W,NO,FP_TMP(0),0,0); - } -#endif r300Enable(ctx, GL_FOG, ctx->Fog.Enabled); - ctx->Driver.Fogfv( ctx, GL_FOG_MODE, NULL ); - ctx->Driver.Fogfv( ctx, GL_FOG_DENSITY, &ctx->Fog.Density ); - ctx->Driver.Fogfv( ctx, GL_FOG_START, &ctx->Fog.Start ); - ctx->Driver.Fogfv( ctx, GL_FOG_END, &ctx->Fog.End ); - ctx->Driver.Fogfv( ctx, GL_FOG_COLOR, ctx->Fog.Color ); - ctx->Driver.Fogfv( ctx, GL_FOG_COORDINATE_SOURCE_EXT, NULL ); + r300Fogfv(ctx, GL_FOG_MODE, NULL); + r300Fogfv(ctx, GL_FOG_DENSITY, &ctx->Fog.Density); + r300Fogfv(ctx, GL_FOG_START, &ctx->Fog.Start); + r300Fogfv(ctx, GL_FOG_END, &ctx->Fog.End); + r300Fogfv(ctx, GL_FOG_COLOR, ctx->Fog.Color); + r300Fogfv(ctx, GL_FOG_COORDINATE_SOURCE_EXT, NULL); r300->hw.at.cmd[R300_AT_UNKNOWN] = 0; r300->hw.unk4BD8.cmd[1] = 0; r300->hw.unk4E00.cmd[1] = 0; -#if 0 - r300->hw.bld.cmd[R300_BLD_CBLEND] = 0; - r300->hw.bld.cmd[R300_BLD_ABLEND] = 0; -#endif - r300BlendColor(ctx, ctx->Color.BlendColor); r300->hw.blend_color.cmd[2] = 0; r300->hw.blend_color.cmd[3] = 0; /* Again, r300ClearBuffer uses this */ - r300->hw.cb.cmd[R300_CB_OFFSET] = r300->radeon.state.color.drawOffset + - r300->radeon.radeonScreen->fbLocation; + r300->hw.cb.cmd[R300_CB_OFFSET] = + r300->radeon.state.color.drawOffset + + r300->radeon.radeonScreen->fbLocation; r300->hw.cb.cmd[R300_CB_PITCH] = r300->radeon.state.color.drawPitch; if (r300->radeon.radeonScreen->cpp == 4) @@ -2219,14 +1928,14 @@ void r300ResetHwState(r300ContextPtr r300) switch (ctx->Visual.depthBits) { case 16: r300->hw.zstencil_format.cmd[1] = R300_DEPTH_FORMAT_16BIT_INT_Z; - break; + break; case 24: r300->hw.zstencil_format.cmd[1] = R300_DEPTH_FORMAT_24BIT_INT_Z; - break; + break; default: fprintf(stderr, "Error: Unsupported depth %d... exiting\n", ctx->Visual.depthBits); - exit(-1); + _mesa_exit(-1); } /* z compress? */ @@ -2236,16 +1945,17 @@ void r300ResetHwState(r300ContextPtr r300) r300->hw.zstencil_format.cmd[4] = 0x00000000; r300->hw.zb.cmd[R300_ZB_OFFSET] = - r300->radeon.radeonScreen->depthOffset + - r300->radeon.radeonScreen->fbLocation; + r300->radeon.radeonScreen->depthOffset + + r300->radeon.radeonScreen->fbLocation; r300->hw.zb.cmd[R300_ZB_PITCH] = r300->radeon.radeonScreen->depthPitch; - if (r300->radeon.sarea->tiling_enabled) { - /* Turn off when clearing buffers ? */ + if (r300->radeon.sarea->tiling_enabled) { + /* XXX: Turn off when clearing buffers ? */ r300->hw.zb.cmd[R300_ZB_PITCH] |= R300_DEPTH_TILE_ENABLE; if (ctx->Visual.depthBits == 24) - r300->hw.zb.cmd[R300_ZB_PITCH] |= R300_DEPTH_MICROTILE_ENABLE; + r300->hw.zb.cmd[R300_ZB_PITCH] |= + R300_DEPTH_MICROTILE_ENABLE; } r300->hw.unk4F28.cmd[1] = 0; @@ -2257,31 +1967,166 @@ void r300ResetHwState(r300ContextPtr r300) r300->hw.unk4F54.cmd[1] = 0; -#if 0 - ((drm_r300_cmd_header_t*)r300->hw.vpi.cmd)->vpu.count = 0; - for(i = 1; i < R300_VPI_CMDSIZE; i += 4) { - /* MOV t0, t0 */ - r300->hw.vpi.cmd[i+0] = VP_OUT(ADD,TMP,0,XYZW); - r300->hw.vpi.cmd[i+1] = VP_IN(TMP,0); - r300->hw.vpi.cmd[i+2] = VP_ZERO(); - r300->hw.vpi.cmd[i+3] = VP_ZERO(); + if (has_tcl) { + r300->hw.vps.cmd[R300_VPS_ZERO_0] = 0; + r300->hw.vps.cmd[R300_VPS_ZERO_1] = 0; + r300->hw.vps.cmd[R300_VPS_POINTSIZE] = r300PackFloat32(1.0); + r300->hw.vps.cmd[R300_VPS_ZERO_3] = 0; } - ((drm_r300_cmd_header_t*)r300->hw.vpp.cmd)->vpu.count = 0; - for(i = 1; i < R300_VPP_CMDSIZE; ++i) - r300->hw.vpp.cmd[i] = 0; -#endif + r300->hw.all_dirty = GL_TRUE; +} - r300->hw.vps.cmd[R300_VPS_ZERO_0] = 0; - r300->hw.vps.cmd[R300_VPS_ZERO_1] = 0; - r300->hw.vps.cmd[R300_VPS_POINTSIZE] = r300PackFloat32(1.0); - r300->hw.vps.cmd[R300_VPS_ZERO_3] = 0; +void r300UpdateShaders(r300ContextPtr rmesa) +{ + GLcontext *ctx; + struct r300_vertex_program *vp; + int i; -//END: TODO - r300->hw.all_dirty = GL_TRUE; + ctx = rmesa->radeon.glCtx; + + if (rmesa->NewGLState && hw_tcl_on) { + rmesa->NewGLState = 0; + + for (i = _TNL_FIRST_MAT; i <= _TNL_LAST_MAT; i++) { + rmesa->temp_attrib[i] = + TNL_CONTEXT(ctx)->vb.AttribPtr[i]; + TNL_CONTEXT(ctx)->vb.AttribPtr[i] = + &rmesa->dummy_attrib[i]; + } + + _tnl_UpdateFixedFunctionProgram(ctx); + + for (i = _TNL_FIRST_MAT; i <= _TNL_LAST_MAT; i++) { + TNL_CONTEXT(ctx)->vb.AttribPtr[i] = + rmesa->temp_attrib[i]; + } + + r300SelectVertexShader(rmesa); + vp = (struct r300_vertex_program *) + CURRENT_VERTEX_SHADER(ctx); + /*if (vp->translated == GL_FALSE) + r300TranslateVertexShader(vp); */ + if (vp->translated == GL_FALSE) { + fprintf(stderr, "Failing back to sw-tcl\n"); + hw_tcl_on = future_hw_tcl_on = 0; + r300ResetHwState(rmesa); + + return; + } + r300UpdateStateParameters(ctx, _NEW_PROGRAM); + } } +static void r300SetupPixelShader(r300ContextPtr rmesa) +{ + GLcontext *ctx = rmesa->radeon.glCtx; + struct r300_fragment_program *fp = (struct r300_fragment_program *) + (char *)ctx->FragmentProgram._Current; + int i, k; + + if (!fp) /* should only happenen once, just after context is created */ + return; + + r300TranslateFragmentShader(rmesa, fp); + if (!fp->translated) { + fprintf(stderr, "%s: No valid fragment shader, exiting\n", + __FUNCTION__); + return; + } + + R300_STATECHANGE(rmesa, fpi[0]); + rmesa->hw.fpi[0].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_PFS_INSTR0_0, fp->alu_end + 1); + for (i = 0; i <= fp->alu_end; i++) { + rmesa->hw.fpi[0].cmd[R300_FPI_INSTR_0 + i] = fp->alu.inst[i].inst0; + } + + R300_STATECHANGE(rmesa, fpi[1]); + rmesa->hw.fpi[1].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_PFS_INSTR1_0, fp->alu_end + 1); + for (i = 0; i <= fp->alu_end; i++) { + rmesa->hw.fpi[1].cmd[R300_FPI_INSTR_0 + i] = fp->alu.inst[i].inst1; + } + + R300_STATECHANGE(rmesa, fpi[2]); + rmesa->hw.fpi[2].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_PFS_INSTR2_0, fp->alu_end + 1); + for (i = 0; i <= fp->alu_end; i++) { + rmesa->hw.fpi[2].cmd[R300_FPI_INSTR_0 + i] = fp->alu.inst[i].inst2; + } + + R300_STATECHANGE(rmesa, fpi[3]); + rmesa->hw.fpi[3].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_PFS_INSTR3_0, fp->alu_end + 1); + for (i = 0; i <= fp->alu_end; i++) { + rmesa->hw.fpi[3].cmd[R300_FPI_INSTR_0 + i] = fp->alu.inst[i].inst3; + } + R300_STATECHANGE(rmesa, fp); + rmesa->hw.fp.cmd[R300_FP_CNTL0] = fp->cur_node | (fp->first_node_has_tex << 3); + rmesa->hw.fp.cmd[R300_FP_CNTL1] = fp->max_temp_idx; + rmesa->hw.fp.cmd[R300_FP_CNTL2] = + (fp->alu_offset << R300_PFS_CNTL_ALU_OFFSET_SHIFT) | + (fp->alu_end << R300_PFS_CNTL_ALU_END_SHIFT) | + (fp->tex_offset << R300_PFS_CNTL_TEX_OFFSET_SHIFT) | + (fp->tex_end << R300_PFS_CNTL_TEX_END_SHIFT); + /* I just want to say, the way these nodes are stored.. weird.. */ + for (i = 0, k = (4 - (fp->cur_node + 1)); i < 4; i++, k++) { + if (i < (fp->cur_node + 1)) { + rmesa->hw.fp.cmd[R300_FP_NODE0 + k] = + (fp->node[i].alu_offset << R300_PFS_NODE_ALU_OFFSET_SHIFT) | + (fp->node[i].alu_end << R300_PFS_NODE_ALU_END_SHIFT) | + (fp->node[i].tex_offset << R300_PFS_NODE_TEX_OFFSET_SHIFT) | + (fp->node[i].tex_end << R300_PFS_NODE_TEX_END_SHIFT) | + fp->node[i].flags; + } else { + rmesa->hw.fp.cmd[R300_FP_NODE0 + (3 - i)] = 0; + } + } + + R300_STATECHANGE(rmesa, fpp); + rmesa->hw.fpp.cmd[R300_FPP_CMD_0] = cmdpacket0(R300_PFS_PARAM_0_X, fp->const_nr * 4); + for (i = 0; i < fp->const_nr; i++) { + rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 0] = r300PackFloat24(fp->constant[i][0]); + rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 1] = r300PackFloat24(fp->constant[i][1]); + rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 2] = r300PackFloat24(fp->constant[i][2]); + rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 3] = r300PackFloat24(fp->constant[i][3]); + } +} + +void r300UpdateShaderStates(r300ContextPtr rmesa) +{ + GLcontext *ctx; + ctx = rmesa->radeon.glCtx; + + r300UpdateTextureState(ctx); + + r300SetupPixelShader(rmesa); + r300SetupTextures(ctx); + + if ((rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) + r300SetupVertexProgram(rmesa); + r300SetupRSUnit(ctx); +} + +/** + * Called by Mesa after an internal state update. + */ +static void r300InvalidateState(GLcontext * ctx, GLuint new_state) +{ + r300ContextPtr r300 = R300_CONTEXT(ctx); + + _swrast_InvalidateState(ctx, new_state); + _swsetup_InvalidateState(ctx, new_state); + _vbo_InvalidateState(ctx, new_state); + _tnl_InvalidateState(ctx, new_state); + _ae_invalidate_state(ctx, new_state); + + if (new_state & (_NEW_BUFFERS | _NEW_COLOR | _NEW_PIXEL)) { + r300UpdateDrawBuffer(ctx); + } + + r300UpdateStateParameters(ctx, new_state); + + r300->NewGLState |= new_state; +} /** * Calculate initial hardware state and register state functions. @@ -2309,19 +2154,19 @@ void r300InitState(r300ContextPtr r300) default: fprintf(stderr, "Error: Unsupported depth %d... exiting\n", ctx->Visual.depthBits); - exit(-1); + _mesa_exit(-1); } /* Only have hw stencil when depth buffer is 24 bits deep */ r300->state.stencil.hw_stencil = (ctx->Visual.stencilBits > 0 && - ctx->Visual.depthBits == 24); + ctx->Visual.depthBits == 24); memset(&(r300->state.texture), 0, sizeof(r300->state.texture)); r300ResetHwState(r300); } -static void r300RenderMode( GLcontext *ctx, GLenum mode ) +static void r300RenderMode(GLcontext * ctx, GLenum mode) { r300ContextPtr rmesa = R300_CONTEXT(ctx); (void)rmesa; @@ -2331,7 +2176,7 @@ static void r300RenderMode( GLcontext *ctx, GLenum mode ) /** * Initialize driver's state callback functions */ -void r300InitStateFuncs(struct dd_function_table* functions) +void r300InitStateFuncs(struct dd_function_table *functions) { radeonInitStateFuncs(functions); @@ -2364,6 +2209,5 @@ void r300InitStateFuncs(struct dd_function_table* functions) functions->PolygonOffset = r300PolygonOffset; functions->PolygonMode = r300PolygonMode; - functions->RenderMode = r300RenderMode; + functions->RenderMode = r300RenderMode; } - diff --git a/src/mesa/drivers/dri/r300/r300_state.h b/src/mesa/drivers/dri/r300/r300_state.h index 52e606f241..365f7ecd0c 100644 --- a/src/mesa/drivers/dri/r300/r300_state.h +++ b/src/mesa/drivers/dri/r300/r300_state.h @@ -37,14 +37,21 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "r300_context.h" +#define R300_NEWPRIM( rmesa ) \ + do { \ + if ( rmesa->dma.flush ) \ + rmesa->dma.flush( rmesa ); \ + } while (0) + #define R300_STATECHANGE(r300, atom) \ do { \ + R300_NEWPRIM(r300); \ r300->hw.atom.dirty = GL_TRUE; \ r300->hw.is_dirty = GL_TRUE; \ } while(0) #define R300_PRINT_STATE(r300, atom) \ - r300_print_state_atom(r300, &r300->hw.atom) + r300PrintStateAtom(r300, &r300->hw.atom) /* Fire the buffered vertices no matter what. TODO: This has not been implemented yet @@ -58,23 +65,13 @@ do { \ \ } while (0) - -extern void r300ResetHwState(r300ContextPtr r300); - extern void r300UpdateStateParameters(GLcontext * ctx, GLuint new_state); extern void r300InitState(r300ContextPtr r300); -extern void r300InitStateFuncs(struct dd_function_table* functions); -extern void r300UpdateViewportOffset( GLcontext *ctx ); -extern void r300UpdateWindow(GLcontext * ctx); -extern void r300UpdateDrawBuffer(GLcontext *ctx); -extern void r300SetupVertexShader(r300ContextPtr rmesa); -extern void r300SetupPixelShader(r300ContextPtr rmesa); +extern void r300InitStateFuncs(struct dd_function_table *functions); +extern void r300UpdateViewportOffset(GLcontext * ctx); +extern void r300UpdateDrawBuffer(GLcontext * ctx); -extern void r300_setup_textures(GLcontext *ctx); -extern void r300_setup_rs_unit(GLcontext *ctx); extern void r300UpdateShaders(r300ContextPtr rmesa); extern void r300UpdateShaderStates(r300ContextPtr rmesa); -extern void r300_print_state_atom(r300ContextPtr r300, struct r300_state_atom *state); - -#endif /* __R300_STATE_H__ */ +#endif /* __R300_STATE_H__ */ diff --git a/src/mesa/drivers/dri/r300/r300_swtcl.c b/src/mesa/drivers/dri/r300/r300_swtcl.c new file mode 100644 index 0000000000..7aea063447 --- /dev/null +++ b/src/mesa/drivers/dri/r300/r300_swtcl.c @@ -0,0 +1,706 @@ +/************************************************************************** + +Copyright (C) 2007 Dave Airlie + +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Dave Airlie <airlied@linux.ie> + */ + +/* derived from r200 swtcl path */ + + + +#include "glheader.h" +#include "mtypes.h" +#include "colormac.h" +#include "enums.h" +#include "image.h" +#include "imports.h" +#include "macros.h" + +#include "swrast/s_context.h" +#include "swrast/s_fog.h" +#include "swrast_setup/swrast_setup.h" +#include "math/m_translate.h" +#include "tnl/tnl.h" +#include "tnl/t_context.h" +#include "tnl/t_pipeline.h" + +#include "r300_context.h" +#include "r300_swtcl.h" +#include "r300_state.h" +#include "r300_ioctl.h" +#include "r300_emit.h" +#include "r300_mem.h" + +static void flush_last_swtcl_prim( r300ContextPtr rmesa ); + + +void r300EmitVertexAOS(r300ContextPtr rmesa, GLuint vertex_size, GLuint offset); +void r300EmitVbufPrim(r300ContextPtr rmesa, GLuint primitive, GLuint vertex_nr); +#define EMIT_ATTR( ATTR, STYLE ) \ +do { \ + rmesa->swtcl.vertex_attrs[rmesa->swtcl.vertex_attr_count].attrib = (ATTR); \ + rmesa->swtcl.vertex_attrs[rmesa->swtcl.vertex_attr_count].format = (STYLE); \ + rmesa->swtcl.vertex_attr_count++; \ +} while (0) + +#define EMIT_PAD( N ) \ +do { \ + rmesa->swtcl.vertex_attrs[rmesa->swtcl.vertex_attr_count].attrib = 0; \ + rmesa->swtcl.vertex_attrs[rmesa->swtcl.vertex_attr_count].format = EMIT_PAD; \ + rmesa->swtcl.vertex_attrs[rmesa->swtcl.vertex_attr_count].offset = (N); \ + rmesa->swtcl.vertex_attr_count++; \ +} while (0) + +/* this differs from the VIR0 in emit.c - TODO merge them using another option */ +static GLuint r300VAPInputRoute0(uint32_t * dst, GLvector4f ** attribptr, + int *inputs, GLint * tab, GLuint nr) +{ + GLuint i, dw; + + /* type, inputs, stop bit, size */ + for (i = 0; i + 1 < nr; i += 2) { + dw = (inputs[tab[i]] << 8) | 0x3; + dw |= ((inputs[tab[i + 1]] << 8) | 0x3) << 16; + if (i + 2 == nr) { + dw |= (R300_VAP_INPUT_ROUTE_END << 16); + } + dst[i >> 1] = dw; + } + + if (nr & 1) { + dw = (inputs[tab[nr - 1]] << 8) | 0x3; + dw |= R300_VAP_INPUT_ROUTE_END; + dst[nr >> 1] = dw; + } + + return (nr + 1) >> 1; +} + +static void r300SetVertexFormat( GLcontext *ctx ) +{ + r300ContextPtr rmesa = R300_CONTEXT( ctx ); + TNLcontext *tnl = TNL_CONTEXT(ctx); + struct vertex_buffer *VB = &tnl->vb; + DECLARE_RENDERINPUTS(index_bitset); + GLuint InputsRead = 0, OutputsWritten = 0; + int vap_fmt_0 = 0; + int vap_vte_cntl = 0; + int offset = 0; + int vte = 0; + GLint inputs[VERT_ATTRIB_MAX]; + GLint tab[VERT_ATTRIB_MAX]; + int swizzle[VERT_ATTRIB_MAX][4]; + GLuint i, nr; + + DECLARE_RENDERINPUTS(render_inputs_bitset); + RENDERINPUTS_COPY(render_inputs_bitset, tnl->render_inputs_bitset); + RENDERINPUTS_COPY( index_bitset, tnl->render_inputs_bitset ); + RENDERINPUTS_COPY(rmesa->state.render_inputs_bitset, render_inputs_bitset); + + /* Important: + */ + if ( VB->NdcPtr != NULL ) { + VB->AttribPtr[VERT_ATTRIB_POS] = VB->NdcPtr; + } + else { + VB->AttribPtr[VERT_ATTRIB_POS] = VB->ClipPtr; + } + + assert( VB->AttribPtr[VERT_ATTRIB_POS] != NULL ); + rmesa->swtcl.vertex_attr_count = 0; + + /* EMIT_ATTR's must be in order as they tell t_vertex.c how to + * build up a hardware vertex. + */ + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_POS)) { + vap_vte_cntl |= R300_VTX_W0_FMT; + InputsRead |= 1 << VERT_ATTRIB_POS; + OutputsWritten |= 1 << VERT_RESULT_HPOS; + EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_4F ); + } else + EMIT_PAD(4 * sizeof(float)); + + offset = 4; + + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_POINTSIZE )) { + EMIT_ATTR( _TNL_ATTRIB_POINTSIZE, EMIT_1F ); + vap_fmt_0 |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT; + offset += 1; + } + + if (RENDERINPUTS_TEST(index_bitset, _TNL_ATTRIB_COLOR0)) { + rmesa->swtcl.coloroffset = offset; + InputsRead |= 1 << VERT_ATTRIB_COLOR0; + OutputsWritten |= 1 << VERT_RESULT_COL0; + EMIT_ATTR( _TNL_ATTRIB_COLOR0, EMIT_4F ); + } + + offset += 4; + + rmesa->swtcl.specoffset = 0; + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 )) { + rmesa->swtcl.specoffset = offset; + EMIT_ATTR( _TNL_ATTRIB_COLOR1, EMIT_4F ); + InputsRead |= 1 << VERT_ATTRIB_COLOR1; + OutputsWritten |= 1 << VERT_RESULT_COL1; + } + + if (RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX )) { + int i; + + for (i = 0; i < ctx->Const.MaxTextureUnits; i++) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(i) )) { + InputsRead |= 1 << (VERT_ATTRIB_TEX0 + i); + OutputsWritten |= 1 << (VERT_RESULT_TEX0 + i); + EMIT_ATTR( _TNL_ATTRIB_TEX0+i, EMIT_4F ); + } + } + } + + for (i = 0, nr = 0; i < VERT_ATTRIB_MAX; i++) { + if (InputsRead & (1 << i)) { + inputs[i] = nr++; + } else { + inputs[i] = -1; + } + } + + /* Fixed, apply to vir0 only */ + if (InputsRead & (1 << VERT_ATTRIB_POS)) + inputs[VERT_ATTRIB_POS] = 0; + if (InputsRead & (1 << VERT_ATTRIB_COLOR0)) + inputs[VERT_ATTRIB_COLOR0] = 2; + if (InputsRead & (1 << VERT_ATTRIB_COLOR1)) + inputs[VERT_ATTRIB_COLOR1] = 3; + for (i = VERT_ATTRIB_TEX0; i <= VERT_ATTRIB_TEX7; i++) + if (InputsRead & (1 << i)) + inputs[i] = 6 + (i - VERT_ATTRIB_TEX0); + + for (i = 0, nr = 0; i < VERT_ATTRIB_MAX; i++) { + if (InputsRead & (1 << i)) { + tab[nr++] = i; + } + } + + for (i = 0; i < nr; i++) { + int ci; + + swizzle[i][0] = SWIZZLE_ZERO; + swizzle[i][1] = SWIZZLE_ZERO; + swizzle[i][2] = SWIZZLE_ZERO; + swizzle[i][3] = SWIZZLE_ONE; + + for (ci = 0; ci < VB->AttribPtr[tab[i]]->size; ci++) { + swizzle[i][ci] = ci; + } + } + + R300_NEWPRIM(rmesa); + R300_STATECHANGE(rmesa, vir[0]); + ((drm_r300_cmd_header_t *) rmesa->hw.vir[0].cmd)->packet0.count = + r300VAPInputRoute0(&rmesa->hw.vir[0].cmd[R300_VIR_CNTL_0], + VB->AttribPtr, inputs, tab, nr); + R300_STATECHANGE(rmesa, vir[1]); + ((drm_r300_cmd_header_t *) rmesa->hw.vir[1].cmd)->packet0.count = + r300VAPInputRoute1(&rmesa->hw.vir[1].cmd[R300_VIR_CNTL_0], swizzle, + nr); + + R300_STATECHANGE(rmesa, vic); + rmesa->hw.vic.cmd[R300_VIC_CNTL_0] = r300VAPInputCntl0(ctx, InputsRead); + rmesa->hw.vic.cmd[R300_VIC_CNTL_1] = r300VAPInputCntl1(ctx, InputsRead); + + R300_STATECHANGE(rmesa, vof); + rmesa->hw.vof.cmd[R300_VOF_CNTL_0] = r300VAPOutputCntl0(ctx, OutputsWritten); + rmesa->hw.vof.cmd[R300_VOF_CNTL_1] = r300VAPOutputCntl1(ctx, OutputsWritten); + + rmesa->swtcl.vertex_size = + _tnl_install_attrs( ctx, + rmesa->swtcl.vertex_attrs, + rmesa->swtcl.vertex_attr_count, + NULL, 0 ); + + rmesa->swtcl.vertex_size /= 4; + + RENDERINPUTS_COPY( rmesa->tnl_index_bitset, index_bitset ); + + vte = rmesa->hw.vte.cmd[1]; + R300_STATECHANGE(rmesa, vte); + rmesa->hw.vte.cmd[1] = vte; + rmesa->hw.vte.cmd[2] = rmesa->swtcl.vertex_size; +} + + +/* Flush vertices in the current dma region. + */ +static void flush_last_swtcl_prim( r300ContextPtr rmesa ) +{ + if (RADEON_DEBUG & DEBUG_IOCTL) + fprintf(stderr, "%s\n", __FUNCTION__); + + rmesa->dma.flush = NULL; + + if (rmesa->dma.current.buf) { + struct r300_dma_region *current = &rmesa->dma.current; + GLuint current_offset = GET_START(current); + + assert (current->start + + rmesa->swtcl.numverts * rmesa->swtcl.vertex_size * 4 == + current->ptr); + + if (rmesa->dma.current.start != rmesa->dma.current.ptr) { + + r300EnsureCmdBufSpace( rmesa, rmesa->hw.max_state_size + (12*sizeof(int)), __FUNCTION__); + + r300EmitState(rmesa); + + r300EmitVertexAOS( rmesa, + rmesa->swtcl.vertex_size, + current_offset); + + r300EmitVbufPrim( rmesa, + rmesa->swtcl.hw_primitive, + rmesa->swtcl.numverts); + + r300EmitCacheFlush(rmesa); + } + + rmesa->swtcl.numverts = 0; + current->start = current->ptr; + } +} + +/* Alloc space in the current dma region. + */ +static void * +r300AllocDmaLowVerts( r300ContextPtr rmesa, int nverts, int vsize ) +{ + GLuint bytes = vsize * nverts; + + if ( rmesa->dma.current.ptr + bytes > rmesa->dma.current.end ) + r300RefillCurrentDmaRegion( rmesa, bytes); + + if (!rmesa->dma.flush) { + rmesa->radeon.glCtx->Driver.NeedFlush |= FLUSH_STORED_VERTICES; + rmesa->dma.flush = flush_last_swtcl_prim; + } + + ASSERT( vsize == rmesa->swtcl.vertex_size * 4 ); + ASSERT( rmesa->dma.flush == flush_last_swtcl_prim ); + ASSERT( rmesa->dma.current.start + + rmesa->swtcl.numverts * rmesa->swtcl.vertex_size * 4 == + rmesa->dma.current.ptr ); + + { + GLubyte *head = (GLubyte *) (rmesa->dma.current.address + rmesa->dma.current.ptr); + rmesa->dma.current.ptr += bytes; + rmesa->swtcl.numverts += nverts; + return head; + } +} + +static GLuint reduced_prim[] = { + GL_POINTS, + GL_LINES, + GL_LINES, + GL_LINES, + GL_TRIANGLES, + GL_TRIANGLES, + GL_TRIANGLES, + GL_TRIANGLES, + GL_TRIANGLES, + GL_TRIANGLES, +}; + +static void r300RasterPrimitive( GLcontext *ctx, GLuint prim ); +static void r300RenderPrimitive( GLcontext *ctx, GLenum prim ); +//static void r300ResetLineStipple( GLcontext *ctx ); + +/*********************************************************************** + * Emit primitives as inline vertices * + ***********************************************************************/ + + +#define HAVE_POINTS 1 +#define HAVE_LINES 1 +#define HAVE_LINE_STRIPS 1 +#define HAVE_TRIANGLES 1 +#define HAVE_TRI_STRIPS 1 +#define HAVE_TRI_STRIP_1 0 +#define HAVE_TRI_FANS 1 +#define HAVE_QUADS 0 +#define HAVE_QUAD_STRIPS 0 +#define HAVE_POLYGONS 1 +#define HAVE_ELTS 1 + +#undef LOCAL_VARS +#undef ALLOC_VERTS +#define CTX_ARG r300ContextPtr rmesa +#define GET_VERTEX_DWORDS() rmesa->swtcl.vertex_size +#define ALLOC_VERTS( n, size ) r300AllocDmaLowVerts( rmesa, n, size * 4 ) +#define LOCAL_VARS \ + r300ContextPtr rmesa = R300_CONTEXT(ctx); \ + const char *r300verts = (char *)rmesa->swtcl.verts; +#define VERT(x) (r300Vertex *)(r300verts + ((x) * vertsize * sizeof(int))) +#define VERTEX r300Vertex +#define DO_DEBUG_VERTS (1 && (RADEON_DEBUG & DEBUG_VERTS)) +#define PRINT_VERTEX(x) +#undef TAG +#define TAG(x) r300_##x +#include "tnl_dd/t_dd_triemit.h" + + + +/*********************************************************************** + * Macros for t_dd_tritmp.h to draw basic primitives * + ***********************************************************************/ + +#define QUAD( a, b, c, d ) r300_quad( rmesa, a, b, c, d ) +#define TRI( a, b, c ) r300_triangle( rmesa, a, b, c ) +#define LINE( a, b ) r300_line( rmesa, a, b ) +#define POINT( a ) r300_point( rmesa, a ) + +/*********************************************************************** + * Build render functions from dd templates * + ***********************************************************************/ + +#define R300_TWOSIDE_BIT 0x01 +#define R300_UNFILLED_BIT 0x02 +#define R300_MAX_TRIFUNC 0x04 + +static struct { + tnl_points_func points; + tnl_line_func line; + tnl_triangle_func triangle; + tnl_quad_func quad; +} rast_tab[R300_MAX_TRIFUNC]; + +#define DO_FALLBACK 0 +#define DO_UNFILLED (IND & R300_UNFILLED_BIT) +#define DO_TWOSIDE (IND & R300_TWOSIDE_BIT) +#define DO_FLAT 0 +#define DO_OFFSET 0 +#define DO_TRI 1 +#define DO_QUAD 1 +#define DO_LINE 1 +#define DO_POINTS 1 +#define DO_FULL_QUAD 1 + +#define HAVE_RGBA 1 +#define HAVE_SPEC 1 +#define HAVE_BACK_COLORS 0 +#define HAVE_HW_FLATSHADE 1 +#define TAB rast_tab + +#define DEPTH_SCALE 1.0 +#define UNFILLED_TRI unfilled_tri +#define UNFILLED_QUAD unfilled_quad +#define VERT_X(_v) _v->v.x +#define VERT_Y(_v) _v->v.y +#define VERT_Z(_v) _v->v.z +#define AREA_IS_CCW( a ) (a < 0) +#define GET_VERTEX(e) (rmesa->swtcl.verts + (e*rmesa->swtcl.vertex_size*sizeof(int))) + +/* Only used to pull back colors into vertices (ie, we know color is + * floating point). + */ +#define R300_COLOR( dst, src ) \ +do { \ + UNCLAMPED_FLOAT_TO_UBYTE((dst)[0], (src)[2]); \ + UNCLAMPED_FLOAT_TO_UBYTE((dst)[1], (src)[1]); \ + UNCLAMPED_FLOAT_TO_UBYTE((dst)[2], (src)[0]); \ + UNCLAMPED_FLOAT_TO_UBYTE((dst)[3], (src)[3]); \ +} while (0) + +#define VERT_SET_RGBA( v, c ) if (coloroffset) R300_COLOR( v->ub4[coloroffset], c ) +#define VERT_COPY_RGBA( v0, v1 ) if (coloroffset) v0->ui[coloroffset] = v1->ui[coloroffset] +#define VERT_SAVE_RGBA( idx ) if (coloroffset) color[idx] = v[idx]->ui[coloroffset] +#define VERT_RESTORE_RGBA( idx ) if (coloroffset) v[idx]->ui[coloroffset] = color[idx] + +#define R300_SPEC( dst, src ) \ +do { \ + UNCLAMPED_FLOAT_TO_UBYTE((dst)[0], (src)[2]); \ + UNCLAMPED_FLOAT_TO_UBYTE((dst)[1], (src)[1]); \ + UNCLAMPED_FLOAT_TO_UBYTE((dst)[2], (src)[0]); \ +} while (0) + +#define VERT_SET_SPEC( v, c ) if (specoffset) R300_SPEC( v->ub4[specoffset], c ) +#define VERT_COPY_SPEC( v0, v1 ) if (specoffset) COPY_3V(v0->ub4[specoffset], v1->ub4[specoffset]) +#define VERT_SAVE_SPEC( idx ) if (specoffset) spec[idx] = v[idx]->ui[specoffset] +#define VERT_RESTORE_SPEC( idx ) if (specoffset) v[idx]->ui[specoffset] = spec[idx] + +#undef LOCAL_VARS +#undef TAG +#undef INIT + +#define LOCAL_VARS(n) \ + r300ContextPtr rmesa = R300_CONTEXT(ctx); \ + GLuint color[n], spec[n]; \ + GLuint coloroffset = rmesa->swtcl.coloroffset; \ + GLuint specoffset = rmesa->swtcl.specoffset; \ + (void) color; (void) spec; (void) coloroffset; (void) specoffset; + +/*********************************************************************** + * Helpers for rendering unfilled primitives * + ***********************************************************************/ + +#define RASTERIZE(x) r300RasterPrimitive( ctx, reduced_prim[x] ) +#define RENDER_PRIMITIVE rmesa->swtcl.render_primitive +#undef TAG +#define TAG(x) x +#include "tnl_dd/t_dd_unfilled.h" +#undef IND + + +/*********************************************************************** + * Generate GL render functions * + ***********************************************************************/ + + +#define IND (0) +#define TAG(x) x +#include "tnl_dd/t_dd_tritmp.h" + +#define IND (R300_TWOSIDE_BIT) +#define TAG(x) x##_twoside +#include "tnl_dd/t_dd_tritmp.h" + +#define IND (R300_UNFILLED_BIT) +#define TAG(x) x##_unfilled +#include "tnl_dd/t_dd_tritmp.h" + +#define IND (R300_TWOSIDE_BIT|R300_UNFILLED_BIT) +#define TAG(x) x##_twoside_unfilled +#include "tnl_dd/t_dd_tritmp.h" + + + +static void init_rast_tab( void ) +{ + init(); + init_twoside(); + init_unfilled(); + init_twoside_unfilled(); +} + +/**********************************************************************/ +/* Render unclipped begin/end objects */ +/**********************************************************************/ + +#define RENDER_POINTS( start, count ) \ + for ( ; start < count ; start++) \ + r300_point( rmesa, VERT(start) ) +#define RENDER_LINE( v0, v1 ) \ + r300_line( rmesa, VERT(v0), VERT(v1) ) +#define RENDER_TRI( v0, v1, v2 ) \ + r300_triangle( rmesa, VERT(v0), VERT(v1), VERT(v2) ) +#define RENDER_QUAD( v0, v1, v2, v3 ) \ + r300_quad( rmesa, VERT(v0), VERT(v1), VERT(v2), VERT(v3) ) +#define INIT(x) do { \ + r300RenderPrimitive( ctx, x ); \ +} while (0) +#undef LOCAL_VARS +#define LOCAL_VARS \ + r300ContextPtr rmesa = R300_CONTEXT(ctx); \ + const GLuint vertsize = rmesa->swtcl.vertex_size; \ + const char *r300verts = (char *)rmesa->swtcl.verts; \ + const GLuint * const elt = TNL_CONTEXT(ctx)->vb.Elts; \ + const GLboolean stipple = ctx->Line.StippleFlag; \ + (void) elt; (void) stipple; +#define RESET_STIPPLE //if ( stipple ) r200ResetLineStipple( ctx ); +#define RESET_OCCLUSION +#define PRESERVE_VB_DEFS +#define ELT(x) (x) +#define TAG(x) r300_##x##_verts +#include "tnl/t_vb_rendertmp.h" +#undef ELT +#undef TAG +#define TAG(x) r300_##x##_elts +#define ELT(x) elt[x] +#include "tnl/t_vb_rendertmp.h" + + + + +/**********************************************************************/ +/* Choose render functions */ +/**********************************************************************/ +static void r300ChooseRenderState( GLcontext *ctx ) +{ + TNLcontext *tnl = TNL_CONTEXT(ctx); + r300ContextPtr rmesa = R300_CONTEXT(ctx); + GLuint index = 0; + GLuint flags = ctx->_TriangleCaps; + + if (flags & DD_TRI_LIGHT_TWOSIDE) index |= R300_TWOSIDE_BIT; + if (flags & DD_TRI_UNFILLED) index |= R300_UNFILLED_BIT; + + if (index != rmesa->swtcl.RenderIndex) { + tnl->Driver.Render.Points = rast_tab[index].points; + tnl->Driver.Render.Line = rast_tab[index].line; + tnl->Driver.Render.ClippedLine = rast_tab[index].line; + tnl->Driver.Render.Triangle = rast_tab[index].triangle; + tnl->Driver.Render.Quad = rast_tab[index].quad; + + if (index == 0) { + tnl->Driver.Render.PrimTabVerts = r300_render_tab_verts; + tnl->Driver.Render.PrimTabElts = r300_render_tab_elts; + tnl->Driver.Render.ClippedPolygon = r300_fast_clipped_poly; + } else { + tnl->Driver.Render.PrimTabVerts = _tnl_render_tab_verts; + tnl->Driver.Render.PrimTabElts = _tnl_render_tab_elts; + tnl->Driver.Render.ClippedPolygon = _tnl_RenderClippedPolygon; + } + + rmesa->swtcl.RenderIndex = index; + } +} + + +static void r300RenderStart(GLcontext *ctx) +{ + r300ContextPtr rmesa = R300_CONTEXT( ctx ); + // fprintf(stderr, "%s\n", __FUNCTION__); + + r300ChooseRenderState(ctx); + r300SetVertexFormat(ctx); + + r300UpdateShaderStates(rmesa); + + r300EmitCacheFlush(rmesa); + + if (rmesa->dma.flush != 0 && + rmesa->dma.flush != flush_last_swtcl_prim) + rmesa->dma.flush( rmesa ); + +} + +static void r300RenderFinish(GLcontext *ctx) +{ +} + +static void r300RasterPrimitive( GLcontext *ctx, GLuint hwprim ) +{ + r300ContextPtr rmesa = R300_CONTEXT(ctx); + + if (rmesa->swtcl.hw_primitive != hwprim) { + R300_NEWPRIM( rmesa ); + rmesa->swtcl.hw_primitive = hwprim; + } +} + +static void r300RenderPrimitive(GLcontext *ctx, GLenum prim) +{ + + r300ContextPtr rmesa = R300_CONTEXT(ctx); + rmesa->swtcl.render_primitive = prim; + + if ((prim == GL_TRIANGLES) && (ctx->_TriangleCaps & DD_TRI_UNFILLED)) + return; + + r300RasterPrimitive( ctx, reduced_prim[prim] ); + // fprintf(stderr, "%s\n", __FUNCTION__); + +} + +static void r300ResetLineStipple(GLcontext *ctx) +{ + + +} + +void r300InitSwtcl(GLcontext *ctx) +{ + TNLcontext *tnl = TNL_CONTEXT(ctx); + r300ContextPtr rmesa = R300_CONTEXT(ctx); + static int firsttime = 1; + + if (firsttime) { + init_rast_tab(); + firsttime = 0; + } + + tnl->Driver.Render.Start = r300RenderStart; + tnl->Driver.Render.Finish = r300RenderFinish; + tnl->Driver.Render.PrimitiveNotify = r300RenderPrimitive; + tnl->Driver.Render.ResetLineStipple = r300ResetLineStipple; + tnl->Driver.Render.BuildVertices = _tnl_build_vertices; + tnl->Driver.Render.CopyPV = _tnl_copy_pv; + tnl->Driver.Render.Interp = _tnl_interp; + + /* FIXME: what are these numbers? */ + _tnl_init_vertices( ctx, ctx->Const.MaxArrayLockSize + 12, + 48 * sizeof(GLfloat) ); + + rmesa->swtcl.verts = (GLubyte *)tnl->clipspace.vertex_buf; + rmesa->swtcl.RenderIndex = ~0; + rmesa->swtcl.render_primitive = GL_TRIANGLES; + rmesa->swtcl.hw_primitive = 0; + + _tnl_invalidate_vertex_state( ctx, ~0 ); + _tnl_invalidate_vertices( ctx, ~0 ); + RENDERINPUTS_ZERO( rmesa->tnl_index_bitset ); + + _tnl_need_projected_coords( ctx, GL_FALSE ); + r300ChooseRenderState(ctx); +} + +void r300DestroySwtcl(GLcontext *ctx) +{ +} + +void r300EmitVertexAOS(r300ContextPtr rmesa, GLuint vertex_size, GLuint offset) +{ + int cmd_reserved = 0; + int cmd_written = 0; + + drm_radeon_cmd_header_t *cmd = NULL; + if (RADEON_DEBUG & DEBUG_VERTS) + fprintf(stderr, "%s: vertex_size %d, offset 0x%x \n", + __FUNCTION__, vertex_size, offset); + + start_packet3(CP_PACKET3(R300_PACKET3_3D_LOAD_VBPNTR, 2), 2); + e32(1); + e32(vertex_size | (vertex_size << 8)); + e32(offset); +} + +void r300EmitVbufPrim(r300ContextPtr rmesa, GLuint primitive, GLuint vertex_nr) +{ + + int cmd_reserved = 0; + int cmd_written = 0; + int type, num_verts; + drm_radeon_cmd_header_t *cmd = NULL; + + type = r300PrimitiveType(rmesa, primitive); + num_verts = r300NumVerts(rmesa, vertex_nr, primitive); + + start_packet3(CP_PACKET3(R300_PACKET3_3D_DRAW_VBUF_2, 0), 0); + e32(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (num_verts << 16) | type); +} diff --git a/src/mesa/drivers/dri/r300/radeon_span.h b/src/mesa/drivers/dri/r300/r300_swtcl.h index c4280b1b6d..2ea6ceded7 100644 --- a/src/mesa/drivers/dri/r300/radeon_span.h +++ b/src/mesa/drivers/dri/r300/r300_swtcl.h @@ -24,23 +24,22 @@ IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - -**************************************************************************/ +*/ /* * Authors: - * Keith Whitwell <keith@tungstengraphics.com> + * Keith Whitwell <keith@tungstengraphics.com> - original r200 code + * Dave Airlie <airlied@linux.ie> */ -#ifndef __RADEON_SPAN_H__ -#define __RADEON_SPAN_H__ - -#ifdef GLX_DIRECT_RENDERING +#ifndef __R300_SWTCL_H__ +#define __R300_SWTCL_H__ -#include "drirenderbuffer.h" +#include "mtypes.h" +#include "swrast/swrast.h" +#include "r300_context.h" -extern void radeonInitSpanFuncs(GLcontext * ctx); -extern void radeonSetSpanFunctions(driRenderbuffer *rb, const GLvisual *vis); +extern void r300InitSwtcl( GLcontext *ctx ); +extern void r300DestroySwtcl( GLcontext *ctx ); #endif -#endif diff --git a/src/mesa/drivers/dri/r300/r300_tex.c b/src/mesa/drivers/dri/r300/r300_tex.c index eb72802f8b..1805cecd0a 100644 --- a/src/mesa/drivers/dri/r300/r300_tex.c +++ b/src/mesa/drivers/dri/r300/r300_tex.c @@ -26,9 +26,10 @@ OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ -/* - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> +/** + * \file + * + * \author Keith Whitwell <keith@tungstengraphics.com> */ #include "glheader.h" @@ -47,7 +48,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "r300_context.h" #include "r300_state.h" #include "r300_ioctl.h" -//#include "r300_swtcl.h" #include "r300_tex.h" #include "xmlpool.h" @@ -63,7 +63,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. static void r300SetTexWrap(r300TexObjPtr t, GLenum swrap, GLenum twrap, GLenum rwrap) { - unsigned long hw_swrap=0, hw_twrap=0, hw_qwrap=0; + unsigned long hw_swrap = 0, hw_twrap = 0, hw_qwrap = 0; t->filter &= ~(R300_TX_WRAP_S_MASK | R300_TX_WRAP_T_MASK | R300_TX_WRAP_Q_MASK); @@ -158,11 +158,6 @@ static void r300SetTexWrap(r300TexObjPtr t, GLenum swrap, GLenum twrap, t->filter |= hw_swrap << R300_TX_WRAP_S_SHIFT; t->filter |= hw_twrap << R300_TX_WRAP_T_SHIFT; t->filter |= hw_qwrap << R300_TX_WRAP_Q_SHIFT; - -#if 0 - t->format_x &= ~R200_CLAMP_Q_MASK; - t->border_fallback = (is_clamp && is_clamp_to_border); -#endif } static void r300SetTexMaxAnisotropy(r300TexObjPtr t, GLfloat max) @@ -196,9 +191,6 @@ static void r300SetTexFilter(r300TexObjPtr t, GLenum minf, GLenum magf) GLuint anisotropy = (t->filter & R300_TX_MAX_ANISO_MASK); t->filter &= ~(R300_TX_MIN_FILTER_MASK | R300_TX_MAG_FILTER_MASK); -#if 0 - //t->format_x &= ~R200_VOLUME_FILTER_MASK; -#endif if (anisotropy == R300_TX_MAX_ANISO_1_TO_1) { switch (minf) { @@ -232,12 +224,12 @@ static void r300SetTexFilter(r300TexObjPtr t, GLenum minf, GLenum magf) case GL_NEAREST_MIPMAP_NEAREST: case GL_LINEAR_MIPMAP_NEAREST: t->filter |= - R300_TX_MIN_FILTER_ANISO_NEAREST_MIP_NEAREST; + R300_TX_MIN_FILTER_ANISO_NEAREST_MIP_NEAREST; break; case GL_NEAREST_MIPMAP_LINEAR: case GL_LINEAR_MIPMAP_LINEAR: t->filter |= - R300_TX_MIN_FILTER_ANISO_NEAREST_MIP_LINEAR; + R300_TX_MIN_FILTER_ANISO_NEAREST_MIP_LINEAR; break; } } @@ -248,18 +240,16 @@ static void r300SetTexFilter(r300TexObjPtr t, GLenum minf, GLenum magf) switch (magf) { case GL_NEAREST: t->filter |= R300_TX_MAG_FILTER_NEAREST; - /*t->format_x |= R200_VOLUME_FILTER_NEAREST;*/ break; case GL_LINEAR: t->filter |= R300_TX_MAG_FILTER_LINEAR; - /*t->format_x |= R200_VOLUME_FILTER_LINEAR;*/ break; } } static void r300SetTexBorderColor(r300TexObjPtr t, GLubyte c[4]) { - t->pp_border_color = r300PackColor(4, c[0], c[1], c[2], c[3]); + t->pp_border_color = PACK_COLOR_8888(c[0], c[1], c[2], c[3]); } /** @@ -297,35 +287,30 @@ static r300TexObjPtr r300AllocTexObj(struct gl_texture_object *texObj) } /* try to find a format which will only need a memcopy */ -static const struct gl_texture_format *r300Choose8888TexFormat( GLenum srcFormat, - GLenum srcType ) +static const struct gl_texture_format *r300Choose8888TexFormat(GLenum srcFormat, + GLenum srcType) { const GLuint ui = 1; - const GLubyte littleEndian = *((const GLubyte *) &ui); + const GLubyte littleEndian = *((const GLubyte *)&ui); if ((srcFormat == GL_RGBA && srcType == GL_UNSIGNED_INT_8_8_8_8) || (srcFormat == GL_RGBA && srcType == GL_UNSIGNED_BYTE && !littleEndian) || (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_INT_8_8_8_8_REV) || (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_BYTE && littleEndian)) { return &_mesa_texformat_rgba8888; - } - else if ((srcFormat == GL_RGBA && srcType == GL_UNSIGNED_INT_8_8_8_8_REV) || - (srcFormat == GL_RGBA && srcType == GL_UNSIGNED_BYTE && littleEndian) || - (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_INT_8_8_8_8) || - (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_BYTE && !littleEndian)) { + } else if ((srcFormat == GL_RGBA && srcType == GL_UNSIGNED_INT_8_8_8_8_REV) || + (srcFormat == GL_RGBA && srcType == GL_UNSIGNED_BYTE && littleEndian) || + (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_INT_8_8_8_8) || + (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_BYTE && !littleEndian)) { return &_mesa_texformat_rgba8888_rev; - } - else if (srcFormat == GL_BGRA && - ((srcType == GL_UNSIGNED_BYTE && !littleEndian) || - srcType == GL_UNSIGNED_INT_8_8_8_8)) { + } else if (srcFormat == GL_BGRA && ((srcType == GL_UNSIGNED_BYTE && !littleEndian) || + srcType == GL_UNSIGNED_INT_8_8_8_8)) { return &_mesa_texformat_argb8888_rev; - } - else if (srcFormat == GL_BGRA && - ((srcType == GL_UNSIGNED_BYTE && littleEndian) || - srcType == GL_UNSIGNED_INT_8_8_8_8_REV)) { + } else if (srcFormat == GL_BGRA && ((srcType == GL_UNSIGNED_BYTE && littleEndian) || + srcType == GL_UNSIGNED_INT_8_8_8_8_REV)) { return &_mesa_texformat_argb8888; - } - else return _dri_texformat_argb8888; + } else + return _dri_texformat_argb8888; } static const struct gl_texture_format *r300ChooseTextureFormat(GLcontext * ctx, @@ -344,10 +329,8 @@ static const struct gl_texture_format *r300ChooseTextureFormat(GLcontext * ctx, #if 0 fprintf(stderr, "InternalFormat=%s(%d) type=%s format=%s\n", _mesa_lookup_enum_by_nr(internalFormat), internalFormat, - _mesa_lookup_enum_by_nr(type), - _mesa_lookup_enum_by_nr(format)); - fprintf(stderr, "do32bpt=%d force16bpt=%d\n", - do32bpt, force16bpt); + _mesa_lookup_enum_by_nr(type), _mesa_lookup_enum_by_nr(format)); + fprintf(stderr, "do32bpt=%d force16bpt=%d\n", do32bpt, force16bpt); #endif switch (internalFormat) { @@ -393,7 +376,8 @@ static const struct gl_texture_format *r300ChooseTextureFormat(GLcontext * ctx, case GL_RGBA12: case GL_RGBA16: return !force16bpt ? - r300Choose8888TexFormat(format, type) : _dri_texformat_argb4444; + r300Choose8888TexFormat(format, + type) : _dri_texformat_argb4444; case GL_RGBA4: case GL_RGBA2: @@ -460,43 +444,43 @@ static const struct gl_texture_format *r300ChooseTextureFormat(GLcontext * ctx, case GL_RGB_S3TC: case GL_RGB4_S3TC: case GL_COMPRESSED_RGB_S3TC_DXT1_EXT: - return &_mesa_texformat_rgb_dxt1; - + return &_mesa_texformat_rgb_dxt1; + case GL_COMPRESSED_RGBA_S3TC_DXT1_EXT: - return &_mesa_texformat_rgba_dxt1; - + return &_mesa_texformat_rgba_dxt1; + case GL_RGBA_S3TC: case GL_RGBA4_S3TC: case GL_COMPRESSED_RGBA_S3TC_DXT3_EXT: - return &_mesa_texformat_rgba_dxt3; - + return &_mesa_texformat_rgba_dxt3; + case GL_COMPRESSED_RGBA_S3TC_DXT5_EXT: - return &_mesa_texformat_rgba_dxt5; - - case GL_ALPHA16F_ARB: - return &_mesa_texformat_alpha_float16; + return &_mesa_texformat_rgba_dxt5; + + case GL_ALPHA16F_ARB: + return &_mesa_texformat_alpha_float16; case GL_ALPHA32F_ARB: - return &_mesa_texformat_alpha_float32; + return &_mesa_texformat_alpha_float32; case GL_LUMINANCE16F_ARB: - return &_mesa_texformat_luminance_float16; + return &_mesa_texformat_luminance_float16; case GL_LUMINANCE32F_ARB: - return &_mesa_texformat_luminance_float32; + return &_mesa_texformat_luminance_float32; case GL_LUMINANCE_ALPHA16F_ARB: - return &_mesa_texformat_luminance_alpha_float16; + return &_mesa_texformat_luminance_alpha_float16; case GL_LUMINANCE_ALPHA32F_ARB: - return &_mesa_texformat_luminance_alpha_float32; + return &_mesa_texformat_luminance_alpha_float32; case GL_INTENSITY16F_ARB: - return &_mesa_texformat_intensity_float16; + return &_mesa_texformat_intensity_float16; case GL_INTENSITY32F_ARB: - return &_mesa_texformat_intensity_float32; + return &_mesa_texformat_intensity_float32; case GL_RGB16F_ARB: - return &_mesa_texformat_rgba_float16; + return &_mesa_texformat_rgba_float16; case GL_RGB32F_ARB: - return &_mesa_texformat_rgba_float32; + return &_mesa_texformat_rgba_float32; case GL_RGBA16F_ARB: - return &_mesa_texformat_rgba_float16; + return &_mesa_texformat_rgba_float16; case GL_RGBA32F_ARB: - return &_mesa_texformat_rgba_float32; + return &_mesa_texformat_rgba_float32; default: _mesa_problem(ctx, @@ -519,7 +503,7 @@ r300ValidateClientStorage(GLcontext * ctx, GLenum target, { r300ContextPtr rmesa = R300_CONTEXT(ctx); - if (0) + if (RADEON_DEBUG & DEBUG_TEXTURE) fprintf(stderr, "intformat %s format %s type %s\n", _mesa_lookup_enum_by_nr(internalFormat), _mesa_lookup_enum_by_nr(format), @@ -572,34 +556,31 @@ r300ValidateClientStorage(GLcontext * ctx, GLenum target, return 0; } - { - GLint srcRowStride = _mesa_image_row_stride(packing, srcWidth, - format, type); + GLint srcRowStride = _mesa_image_row_stride(packing, srcWidth, + format, type); - if (0) - fprintf(stderr, "%s: srcRowStride %d/%x\n", - __FUNCTION__, srcRowStride, srcRowStride); + if (RADEON_DEBUG & DEBUG_TEXTURE) + fprintf(stderr, "%s: srcRowStride %d/%x\n", + __FUNCTION__, srcRowStride, srcRowStride); - /* Could check this later in upload, pitch restrictions could be - * relaxed, but would need to store the image pitch somewhere, - * as packing details might change before image is uploaded: - */ - if (!r300IsGartMemory(rmesa, pixels, srcHeight * srcRowStride) - || (srcRowStride & 63)) - return 0; + /* Could check this later in upload, pitch restrictions could be + * relaxed, but would need to store the image pitch somewhere, + * as packing details might change before image is uploaded: + */ + if (!r300IsGartMemory(rmesa, pixels, srcHeight * srcRowStride) + || (srcRowStride & 63)) + return 0; - /* Have validated that _mesa_transfer_teximage would be a straight - * memcpy at this point. NOTE: future calls to TexSubImage will - * overwrite the client data. This is explicitly mentioned in the - * extension spec. - */ - texImage->Data = (void *)pixels; - texImage->IsClientData = GL_TRUE; - texImage->RowStride = - srcRowStride / texImage->TexFormat->TexelBytes; + /* Have validated that _mesa_transfer_teximage would be a straight + * memcpy at this point. NOTE: future calls to TexSubImage will + * overwrite the client data. This is explicitly mentioned in the + * extension spec. + */ + texImage->Data = (void *)pixels; + texImage->IsClientData = GL_TRUE; + texImage->RowStride = srcRowStride / texImage->TexFormat->TexelBytes; - return 1; - } + return 1; } static void r300TexImage1D(GLcontext * ctx, GLenum target, GLint level, @@ -771,116 +752,123 @@ static void r300TexSubImage2D(GLcontext * ctx, GLenum target, GLint level, t->dirty_images[face] |= (1 << level); } -static void r300CompressedTexImage2D( GLcontext *ctx, GLenum target, GLint level, - GLint internalFormat, - GLint width, GLint height, GLint border, - GLsizei imageSize, const GLvoid *data, - struct gl_texture_object *texObj, - struct gl_texture_image *texImage ) +static void r300CompressedTexImage2D(GLcontext * ctx, GLenum target, + GLint level, GLint internalFormat, + GLint width, GLint height, GLint border, + GLsizei imageSize, const GLvoid * data, + struct gl_texture_object *texObj, + struct gl_texture_image *texImage) { - driTextureObject * t = (driTextureObject *) texObj->DriverData; - GLuint face; - - /* which cube face or ordinary 2D image */ - switch (target) { - case GL_TEXTURE_CUBE_MAP_POSITIVE_X: - case GL_TEXTURE_CUBE_MAP_NEGATIVE_X: - case GL_TEXTURE_CUBE_MAP_POSITIVE_Y: - case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y: - case GL_TEXTURE_CUBE_MAP_POSITIVE_Z: - case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z: - face = (GLuint) target - (GLuint) GL_TEXTURE_CUBE_MAP_POSITIVE_X; - ASSERT(face < 6); - break; - default: - face = 0; - } - - if ( t != NULL ) { - driSwapOutTextureObject( t ); - } - else { - t = (driTextureObject *) r300AllocTexObj( texObj ); - if (!t) { - _mesa_error(ctx, GL_OUT_OF_MEMORY, "glCompressedTexImage2D"); - return; - } - } - - texImage->IsClientData = GL_FALSE; -/* can't call this, different parameters. Would never evaluate to true anyway currently - if (r300ValidateClientStorage( ctx, target, - internalFormat, - width, height, - format, type, pixels, - packing, texObj, texImage)) { - if (RADEON_DEBUG & DEBUG_TEXTURE) - fprintf(stderr, "%s: Using client storage\n", __FUNCTION__); - } - else */{ - if (RADEON_DEBUG & DEBUG_TEXTURE) - fprintf(stderr, "%s: Using normal storage\n", __FUNCTION__); - - /* Normal path: copy (to cached memory) and eventually upload - * via another copy to GART memory and then a blit... Could - * eliminate one copy by going straight to (permanent) GART. - * - * Note, this will call r300ChooseTextureFormat. - */ - _mesa_store_compressed_teximage2d(ctx, target, level, internalFormat, width, - height, border, imageSize, data, texObj, texImage); - - t->dirty_images[face] |= (1 << level); - } -} + driTextureObject *t = (driTextureObject *) texObj->DriverData; + GLuint face; + + /* which cube face or ordinary 2D image */ + switch (target) { + case GL_TEXTURE_CUBE_MAP_POSITIVE_X: + case GL_TEXTURE_CUBE_MAP_NEGATIVE_X: + case GL_TEXTURE_CUBE_MAP_POSITIVE_Y: + case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y: + case GL_TEXTURE_CUBE_MAP_POSITIVE_Z: + case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z: + face = + (GLuint) target - (GLuint) GL_TEXTURE_CUBE_MAP_POSITIVE_X; + ASSERT(face < 6); + break; + default: + face = 0; + } + if (t != NULL) { + driSwapOutTextureObject(t); + } else { + t = (driTextureObject *) r300AllocTexObj(texObj); + if (!t) { + _mesa_error(ctx, GL_OUT_OF_MEMORY, + "glCompressedTexImage2D"); + return; + } + } + + texImage->IsClientData = GL_FALSE; -static void r300CompressedTexSubImage2D( GLcontext *ctx, GLenum target, GLint level, - GLint xoffset, GLint yoffset, - GLsizei width, GLsizei height, - GLenum format, - GLsizei imageSize, const GLvoid *data, - struct gl_texture_object *texObj, - struct gl_texture_image *texImage ) + /* can't call this, different parameters. Would never evaluate to true anyway currently */ +#if 0 + if (r300ValidateClientStorage(ctx, target, + internalFormat, + width, height, + format, type, pixels, + packing, texObj, texImage)) { + if (RADEON_DEBUG & DEBUG_TEXTURE) + fprintf(stderr, "%s: Using client storage\n", + __FUNCTION__); + } else +#endif + { + if (RADEON_DEBUG & DEBUG_TEXTURE) + fprintf(stderr, "%s: Using normal storage\n", + __FUNCTION__); + + /* Normal path: copy (to cached memory) and eventually upload + * via another copy to GART memory and then a blit... Could + * eliminate one copy by going straight to (permanent) GART. + * + * Note, this will call r300ChooseTextureFormat. + */ + _mesa_store_compressed_teximage2d(ctx, target, level, + internalFormat, width, height, + border, imageSize, data, + texObj, texImage); + + t->dirty_images[face] |= (1 << level); + } +} + +static void r300CompressedTexSubImage2D(GLcontext * ctx, GLenum target, + GLint level, GLint xoffset, + GLint yoffset, GLsizei width, + GLsizei height, GLenum format, + GLsizei imageSize, const GLvoid * data, + struct gl_texture_object *texObj, + struct gl_texture_image *texImage) { - driTextureObject * t = (driTextureObject *) texObj->DriverData; - GLuint face; - - - /* which cube face or ordinary 2D image */ - switch (target) { - case GL_TEXTURE_CUBE_MAP_POSITIVE_X: - case GL_TEXTURE_CUBE_MAP_NEGATIVE_X: - case GL_TEXTURE_CUBE_MAP_POSITIVE_Y: - case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y: - case GL_TEXTURE_CUBE_MAP_POSITIVE_Z: - case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z: - face = (GLuint) target - (GLuint) GL_TEXTURE_CUBE_MAP_POSITIVE_X; - ASSERT(face < 6); - break; - default: - face = 0; - } - - assert( t ); /* this _should_ be true */ - if ( t ) { - driSwapOutTextureObject( t ); - } - else { - t = (driTextureObject *) r300AllocTexObj( texObj ); - if (!t) { - _mesa_error(ctx, GL_OUT_OF_MEMORY, "glCompressedTexSubImage3D"); - return; - } - } - - _mesa_store_compressed_texsubimage2d(ctx, target, level, xoffset, yoffset, width, - height, format, imageSize, data, texObj, texImage); - - t->dirty_images[face] |= (1 << level); + driTextureObject *t = (driTextureObject *) texObj->DriverData; + GLuint face; + + /* which cube face or ordinary 2D image */ + switch (target) { + case GL_TEXTURE_CUBE_MAP_POSITIVE_X: + case GL_TEXTURE_CUBE_MAP_NEGATIVE_X: + case GL_TEXTURE_CUBE_MAP_POSITIVE_Y: + case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y: + case GL_TEXTURE_CUBE_MAP_POSITIVE_Z: + case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z: + face = + (GLuint) target - (GLuint) GL_TEXTURE_CUBE_MAP_POSITIVE_X; + ASSERT(face < 6); + break; + default: + face = 0; + } + + assert(t); /* this _should_ be true */ + if (t) { + driSwapOutTextureObject(t); + } else { + t = (driTextureObject *) r300AllocTexObj(texObj); + if (!t) { + _mesa_error(ctx, GL_OUT_OF_MEMORY, + "glCompressedTexSubImage3D"); + return; + } + } + + _mesa_store_compressed_texsubimage2d(ctx, target, level, xoffset, + yoffset, width, height, format, + imageSize, data, texObj, texImage); + + t->dirty_images[face] |= (1 << level); } -#if ENABLE_HW_3D_TEXTURE static void r300TexImage3D(GLcontext * ctx, GLenum target, GLint level, GLint internalFormat, GLint width, GLint height, GLint depth, @@ -934,9 +922,7 @@ static void r300TexImage3D(GLcontext * ctx, GLenum target, GLint level, t->dirty_images[0] |= (1 << level); } } -#endif -#if ENABLE_HW_3D_TEXTURE static void r300TexSubImage3D(GLcontext * ctx, GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, @@ -970,7 +956,6 @@ r300TexSubImage3D(GLcontext * ctx, GLenum target, GLint level, t->dirty_images[0] |= (1 << level); } -#endif static void r300TexEnv(GLcontext * ctx, GLenum target, GLenum pname, const GLfloat * param) @@ -986,7 +971,7 @@ static void r300TexEnv(GLcontext * ctx, GLenum target, */ switch (pname) { case GL_TEXTURE_LOD_BIAS_EXT:{ -#if 0 /* Needs to be relocated in order to make sure we got the right tmu */ +#if 0 /* Needs to be relocated in order to make sure we got the right tmu */ GLfloat bias, min; GLuint b; @@ -1006,10 +991,16 @@ static void r300TexEnv(GLcontext * ctx, GLenum target, b = 0x1000 / 16.0 * bias; b &= R300_LOD_BIAS_MASK; - if(b != (rmesa->hw.tex.unknown1.cmd[R300_TEX_VALUE_0+unit] & R300_LOD_BIAS_MASK)){ + if (b != + (rmesa->hw.tex.unknown1. + cmd[R300_TEX_VALUE_0 + + unit] & R300_LOD_BIAS_MASK)) { R300_STATECHANGE(rmesa, tex.unknown1); - rmesa->hw.tex.unknown1.cmd[R300_TEX_VALUE_0+unit] &= ~R300_LOD_BIAS_MASK; - rmesa->hw.tex.unknown1.cmd[R300_TEX_VALUE_0+unit] |= b; + rmesa->hw.tex.unknown1.cmd[R300_TEX_VALUE_0 + + unit] &= + ~R300_LOD_BIAS_MASK; + rmesa->hw.tex.unknown1.cmd[R300_TEX_VALUE_0 + + unit] |= b; } #endif break; @@ -1085,9 +1076,7 @@ static void r300BindTexture(GLcontext * ctx, GLenum target, if ((target == GL_TEXTURE_1D) || (target == GL_TEXTURE_2D) -#if ENABLE_HW_3D_TEXTURE || (target == GL_TEXTURE_3D) -#endif || (target == GL_TEXTURE_CUBE_MAP) || (target == GL_TEXTURE_RECTANGLE_NV)) { assert(texObj->DriverData != NULL); @@ -1140,7 +1129,6 @@ static struct gl_texture_object *r300NewTextureObject(GLcontext * ctx, return obj; } - void r300InitTextureFuncs(struct dd_function_table *functions) { /* Note: we only plug in the functions we implement in the driver @@ -1149,18 +1137,10 @@ void r300InitTextureFuncs(struct dd_function_table *functions) functions->ChooseTextureFormat = r300ChooseTextureFormat; functions->TexImage1D = r300TexImage1D; functions->TexImage2D = r300TexImage2D; -#if ENABLE_HW_3D_TEXTURE functions->TexImage3D = r300TexImage3D; -#else - functions->TexImage3D = _mesa_store_teximage3d; -#endif functions->TexSubImage1D = r300TexSubImage1D; functions->TexSubImage2D = r300TexSubImage2D; -#if ENABLE_HW_3D_TEXTURE functions->TexSubImage3D = r300TexSubImage3D; -#else - functions->TexSubImage3D = _mesa_store_texsubimage3d; -#endif functions->NewTextureObject = r300NewTextureObject; functions->BindTexture = r300BindTexture; functions->DeleteTexture = r300DeleteTexture; @@ -1168,23 +1148,9 @@ void r300InitTextureFuncs(struct dd_function_table *functions) functions->TexEnv = r300TexEnv; functions->TexParameter = r300TexParameter; - - functions->CompressedTexImage2D = r300CompressedTexImage2D; - functions->CompressedTexSubImage2D = r300CompressedTexSubImage2D; - driInitTextureFormats(); + functions->CompressedTexImage2D = r300CompressedTexImage2D; + functions->CompressedTexSubImage2D = r300CompressedTexSubImage2D; -#if 0 - /* moved or obsolete code */ - r300ContextPtr rmesa = R300_CONTEXT(ctx); - driInitTextureObjects(ctx, &rmesa->swapped, - DRI_TEXMGR_DO_TEXTURE_1D - | DRI_TEXMGR_DO_TEXTURE_2D); - - /* Hack: r300NewTextureObject is not yet installed when the - * default textures are created. Therefore set MaxAnisotropy of the - * default 2D texture now. */ - ctx->Shared->Default2D->MaxAnisotropy = - driQueryOptionf(&rmesa->optionCache, "def_max_anisotropy"); -#endif + driInitTextureFormats(); } diff --git a/src/mesa/drivers/dri/r300/r300_tex.h b/src/mesa/drivers/dri/r300/r300_tex.h index 10aabc8b4b..f67a8e6ba6 100644 --- a/src/mesa/drivers/dri/r300/r300_tex.h +++ b/src/mesa/drivers/dri/r300/r300_tex.h @@ -35,7 +35,9 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #ifndef __r300_TEX_H__ #define __r300_TEX_H__ -#ifdef GLX_DIRECT_RENDERING +extern void r300SetTexOffset(__DRIcontext *pDRICtx, GLint texname, + unsigned long long offset, GLint depth, + GLuint pitch); extern void r300UpdateTextureState(GLcontext * ctx); @@ -46,5 +48,4 @@ extern void r300DestroyTexObj(r300ContextPtr rmesa, r300TexObjPtr t); extern void r300InitTextureFuncs(struct dd_function_table *functions); -#endif #endif /* __r300_TEX_H__ */ diff --git a/src/mesa/drivers/dri/r300/r300_texmem.c b/src/mesa/drivers/dri/r300/r300_texmem.c index c527677cd0..38f0da8b7c 100644 --- a/src/mesa/drivers/dri/r300/r300_texmem.c +++ b/src/mesa/drivers/dri/r300/r300_texmem.c @@ -28,11 +28,12 @@ SOFTWARE. **************************************************************************/ -/* - * Authors: - * Kevin E. Martin <martin@valinux.com> - * Gareth Hughes <gareth@valinux.com> +/** + * \file + * + * \author Gareth Hughes <gareth@valinux.com> * + * \author Kevin E. Martin <martin@valinux.com> */ #include <errno.h> @@ -48,15 +49,12 @@ SOFTWARE. #include "r300_state.h" #include "r300_cmdbuf.h" #include "radeon_ioctl.h" -/* -#include "r300_swtcl.h" -*/ #include "r300_tex.h" #include "r300_ioctl.h" #include <unistd.h> /* for usleep() */ #ifdef USER_BUFFERS -#include "radeon_mm.h" +#include "r300_mem.h" #endif /** @@ -65,29 +63,16 @@ SOFTWARE. */ void r300DestroyTexObj(r300ContextPtr rmesa, r300TexObjPtr t) { + int i; + if (RADEON_DEBUG & DEBUG_TEXTURE) { fprintf(stderr, "%s( %p, %p )\n", __FUNCTION__, (void *)t, (void *)t->base.tObj); } - if (rmesa != NULL) { - unsigned i; - - for (i = 0; i < rmesa->radeon.glCtx->Const.MaxTextureUnits; i++) { - if (t == rmesa->state.texture.unit[i].texobj) { - rmesa->state.texture.unit[i].texobj = NULL; - /* This code below is meant to shorten state - pushed to the hardware by not programming - unneeded units. - - This does not appear to be worthwhile on R300 */ -#if 0 - remove_from_list(&rmesa->hw.tex[i]); - make_empty_list(&rmesa->hw.tex[i]); - remove_from_list(&rmesa->hw.cube[i]); - make_empty_list(&rmesa->hw.cube[i]); -#endif - } + for (i = 0; i < rmesa->radeon.glCtx->Const.MaxTextureUnits; i++) { + if (rmesa->state.texture.unit[i].texobj == t) { + rmesa->state.texture.unit[i].texobj = NULL; } } } @@ -210,10 +195,8 @@ static void r300UploadRectSubImage(r300ContextPtr rmesa, /* In this case, could also use GART texturing. This is * currently disabled, but has been tested & works. */ - t->offset = - r300GartOffsetFromVirtual(rmesa, texImage->Data); - t->pitch = - texImage->RowStride * texFormat->TexelBytes - 32; + t->offset = r300GartOffsetFromVirtual(rmesa, texImage->Data); + t->pitch = texImage->RowStride * texFormat->TexelBytes - 32; if (RADEON_DEBUG & DEBUG_TEXTURE) fprintf(stderr, @@ -257,7 +240,7 @@ static void r300UploadRectSubImage(r300ContextPtr rmesa, /* Copy texdata to dma: */ - if (0) + if (RADEON_DEBUG & DEBUG_TEXTURE) fprintf(stderr, "%s: src_pitch %d dst_pitch %d\n", __FUNCTION__, src_pitch, dstPitch); @@ -283,14 +266,11 @@ static void r300UploadRectSubImage(r300ContextPtr rmesa, blit_format, dstPitch, GET_START(®ion), dstPitch | (t->tile_bits >> 16), - t->bufAddr, - 0, 0, - 0, done, - width, lines); + t->bufAddr, 0, 0, 0, done, width, lines); r300EmitWait(rmesa, R300_WAIT_2D); #ifdef USER_BUFFERS - radeon_mm_use(rmesa, region.buf->id); + r300_mem_use(rmesa, region.buf->id); #endif r300ReleaseDmaRegion(rmesa, ®ion, __FUNCTION__); @@ -303,10 +283,10 @@ static void r300UploadRectSubImage(r300ContextPtr rmesa, * Upload the texture image associated with texture \a t at the specified * level at the address relative to \a start. */ -static void uploadSubImage( r300ContextPtr rmesa, r300TexObjPtr t, - GLint hwlevel, - GLint x, GLint y, GLint width, GLint height, - GLuint face ) +static void r300UploadSubImage(r300ContextPtr rmesa, r300TexObjPtr t, + GLint hwlevel, + GLint x, GLint y, GLint width, GLint height, + GLuint face) { struct gl_texture_image *texImage = NULL; GLuint offset; @@ -316,71 +296,74 @@ static void uploadSubImage( r300ContextPtr rmesa, r300TexObjPtr t, drm_radeon_tex_image_t tmp; const int level = hwlevel + t->base.firstLevel; - if ( RADEON_DEBUG & DEBUG_TEXTURE ) { - fprintf( stderr, "%s( %p, %p ) level/width/height/face = %d/%d/%d/%u\n", - __FUNCTION__, (void *)t, (void *)t->base.tObj, - level, width, height, face ); + if (RADEON_DEBUG & DEBUG_TEXTURE) { + fprintf(stderr, + "%s( %p, %p ) level/width/height/face = %d/%d/%d/%u\n", + __FUNCTION__, (void *)t, (void *)t->base.tObj, level, + width, height, face); } ASSERT(face < 6); /* Ensure we have a valid texture to upload */ - if ( ( hwlevel < 0 ) || ( hwlevel >= RADEON_MAX_TEXTURE_LEVELS ) ) { + if ((hwlevel < 0) || (hwlevel >= RADEON_MAX_TEXTURE_LEVELS)) { _mesa_problem(NULL, "bad texture level in %s", __FUNCTION__); return; } texImage = t->base.tObj->Image[face][level]; - if ( !texImage ) { - if ( RADEON_DEBUG & DEBUG_TEXTURE ) - fprintf( stderr, "%s: texImage %d is NULL!\n", __FUNCTION__, level ); + if (!texImage) { + if (RADEON_DEBUG & DEBUG_TEXTURE) + fprintf(stderr, "%s: texImage %d is NULL!\n", + __FUNCTION__, level); return; } - if ( !texImage->Data ) { - if ( RADEON_DEBUG & DEBUG_TEXTURE ) - fprintf( stderr, "%s: image data is NULL!\n", __FUNCTION__ ); + if (!texImage->Data) { + if (RADEON_DEBUG & DEBUG_TEXTURE) + fprintf(stderr, "%s: image data is NULL!\n", + __FUNCTION__); return; } - if (t->base.tObj->Target == GL_TEXTURE_RECTANGLE_NV) { assert(level == 0); assert(hwlevel == 0); - if ( RADEON_DEBUG & DEBUG_TEXTURE ) - fprintf( stderr, "%s: image data is rectangular\n", __FUNCTION__); - r300UploadRectSubImage( rmesa, t, texImage, x, y, width, height ); + if (RADEON_DEBUG & DEBUG_TEXTURE) + fprintf(stderr, "%s: image data is rectangular\n", + __FUNCTION__); + r300UploadRectSubImage(rmesa, t, texImage, x, y, width, height); return; } else if (texImage->IsClientData) { - if ( RADEON_DEBUG & DEBUG_TEXTURE ) - fprintf( stderr, "%s: image data is in GART client storage\n", - __FUNCTION__); - r300UploadGARTClientSubImage( rmesa, t, texImage, hwlevel, - x, y, width, height ); + if (RADEON_DEBUG & DEBUG_TEXTURE) + fprintf(stderr, + "%s: image data is in GART client storage\n", + __FUNCTION__); + r300UploadGARTClientSubImage(rmesa, t, texImage, hwlevel, x, y, + width, height); return; - } else if ( RADEON_DEBUG & DEBUG_TEXTURE ) - fprintf( stderr, "%s: image data is in normal memory\n", + } else if (RADEON_DEBUG & DEBUG_TEXTURE) + fprintf(stderr, "%s: image data is in normal memory\n", __FUNCTION__); - imageWidth = texImage->Width; imageHeight = texImage->Height; offset = t->bufAddr + t->base.totalSize / 6 * face; - if ( RADEON_DEBUG & (DEBUG_TEXTURE|DEBUG_IOCTL) ) { + if (RADEON_DEBUG & (DEBUG_TEXTURE | DEBUG_IOCTL)) { GLint imageX = 0; GLint imageY = 0; GLint blitX = t->image[face][hwlevel].x; GLint blitY = t->image[face][hwlevel].y; GLint blitWidth = t->image[face][hwlevel].width; GLint blitHeight = t->image[face][hwlevel].height; - fprintf( stderr, " upload image: %d,%d at %d,%d\n", - imageWidth, imageHeight, imageX, imageY ); - fprintf( stderr, " upload blit: %d,%d at %d,%d\n", - blitWidth, blitHeight, blitX, blitY ); - fprintf( stderr, " blit ofs: 0x%07x level: %d/%d\n", - (GLuint)offset, hwlevel, level ); + fprintf(stderr, " upload image: %d,%d at %d,%d\n", + imageWidth, imageHeight, imageX, imageY); + fprintf(stderr, " upload blit: %d,%d at %d,%d\n", + blitWidth, blitHeight, blitX, blitY); + fprintf(stderr, " blit ofs: 0x%07x level: %d/%d\n", + (GLuint) offset, hwlevel, level); } t->image[face][hwlevel].data = texImage->Data; @@ -395,12 +378,15 @@ static void uploadSubImage( r300ContextPtr rmesa, r300TexObjPtr t, tex.offset = offset; tex.image = &tmp; /* copy (x,y,width,height,data) */ - memcpy( &tmp, &t->image[face][hwlevel], sizeof(tmp) ); + memcpy(&tmp, &t->image[face][hwlevel], sizeof(tmp)); if (texImage->TexFormat->TexelBytes > 4) { - const int log2TexelBytes = (3 + (texImage->TexFormat->TexelBytes >> 4)); - tex.format = RADEON_TXFORMAT_I8; /* any 1-byte texel format */ - tex.pitch = MAX2((texImage->Width * texImage->TexFormat->TexelBytes) / 64, 1); + const int log2TexelBytes = + (3 + (texImage->TexFormat->TexelBytes >> 4)); + tex.format = RADEON_TXFORMAT_I8; /* any 1-byte texel format */ + tex.pitch = + MAX2((texImage->Width * texImage->TexFormat->TexelBytes) / + 64, 1); tex.height = imageHeight; tex.width = imageWidth << log2TexelBytes; tex.offset += (tmp.x << log2TexelBytes) & ~1023; @@ -410,7 +396,7 @@ static void uploadSubImage( r300ContextPtr rmesa, r300TexObjPtr t, /* use multi-byte upload scheme */ tex.height = imageHeight; tex.width = imageWidth; - switch(texImage->TexFormat->TexelBytes) { + switch (texImage->TexFormat->TexelBytes) { case 1: tex.format = RADEON_TXFORMAT_I8; break; @@ -421,23 +407,28 @@ static void uploadSubImage( r300ContextPtr rmesa, r300TexObjPtr t, tex.format = RADEON_TXFORMAT_ARGB8888; break; } - tex.pitch = MAX2((texImage->Width * texImage->TexFormat->TexelBytes) / 64, 1); + tex.pitch = + MAX2((texImage->Width * texImage->TexFormat->TexelBytes) / + 64, 1); tex.offset += tmp.x & ~1023; tmp.x = tmp.x % 1024; if (t->tile_bits & R300_TXO_MICRO_TILE) { /* need something like "tiled coordinates" ? */ tmp.y = tmp.x / (tex.pitch * 128) * 2; - tmp.x = tmp.x % (tex.pitch * 128) / 2 / texImage->TexFormat->TexelBytes; + tmp.x = + tmp.x % (tex.pitch * 128) / 2 / + texImage->TexFormat->TexelBytes; tex.pitch |= RADEON_DST_TILE_MICRO >> 22; } else { tmp.x = tmp.x >> (texImage->TexFormat->TexelBytes >> 1); } #if 1 if ((t->tile_bits & R300_TXO_MACRO_TILE) && - (texImage->Width * texImage->TexFormat->TexelBytes >= 256) && - ((!(t->tile_bits & R300_TXO_MICRO_TILE) && (texImage->Height >= 8)) || - (texImage->Height >= 16))) { + (texImage->Width * texImage->TexFormat->TexelBytes >= 256) + && ((!(t->tile_bits & R300_TXO_MICRO_TILE) + && (texImage->Height >= 8)) + || (texImage->Height >= 16))) { /* weird: R200 disables macro tiling if mip width is smaller than 256 bytes, OR if height is smaller than 8 automatically, but if micro tiling is active the limit is height 16 instead ? */ @@ -451,41 +442,43 @@ static void uploadSubImage( r300ContextPtr rmesa, r300TexObjPtr t, /* set tex.height to 1/4 since 1 "macropixel" (dxt-block) has 4 real pixels. Needed so the kernel module reads the right amount of data. */ - tex.format = RADEON_TXFORMAT_I8; /* any 1-byte texel format */ + tex.format = RADEON_TXFORMAT_I8; /* any 1-byte texel format */ tex.pitch = (R300_BLIT_WIDTH_BYTES / 64); tex.height = (imageHeight + 3) / 4; tex.width = (imageWidth + 3) / 4; - if ((t->format & R300_TX_FORMAT_DXT1) == R300_TX_FORMAT_DXT1) - { + if ((t->format & R300_TX_FORMAT_DXT1) == R300_TX_FORMAT_DXT1) { tex.width *= 8; } else { tex.width *= 16; } } - LOCK_HARDWARE( &rmesa->radeon ); + LOCK_HARDWARE(&rmesa->radeon); do { - ret = drmCommandWriteRead( rmesa->radeon.dri.fd, DRM_RADEON_TEXTURE, - &tex, sizeof(drm_radeon_texture_t) ); + ret = + drmCommandWriteRead(rmesa->radeon.dri.fd, + DRM_RADEON_TEXTURE, &tex, + sizeof(drm_radeon_texture_t)); if (ret) { - if (RADEON_DEBUG & DEBUG_IOCTL) - fprintf(stderr, "DRM_RADEON_TEXTURE: again!\n"); - usleep(1); + if (RADEON_DEBUG & DEBUG_IOCTL) + fprintf(stderr, + "DRM_RADEON_TEXTURE: again!\n"); + usleep(1); } - } while ( ret == -EAGAIN ); - - UNLOCK_HARDWARE( &rmesa->radeon ); - - if ( ret ) { - fprintf( stderr, "DRM_RADEON_TEXTURE: return = %d\n", ret ); - fprintf( stderr, " offset=0x%08x\n", - offset ); - fprintf( stderr, " image width=%d height=%d\n", - imageWidth, imageHeight ); - fprintf( stderr, " blit width=%d height=%d data=%p\n", - t->image[face][hwlevel].width, t->image[face][hwlevel].height, - t->image[face][hwlevel].data ); - exit( 1 ); + } while (ret == -EAGAIN); + + UNLOCK_HARDWARE(&rmesa->radeon); + + if (ret) { + fprintf(stderr, "DRM_RADEON_TEXTURE: return = %d\n", ret); + fprintf(stderr, " offset=0x%08x\n", offset); + fprintf(stderr, " image width=%d height=%d\n", + imageWidth, imageHeight); + fprintf(stderr, " blit width=%d height=%d data=%p\n", + t->image[face][hwlevel].width, + t->image[face][hwlevel].height, + t->image[face][hwlevel].data); + _mesa_exit(-1); } } @@ -502,6 +495,9 @@ int r300UploadTexImages(r300ContextPtr rmesa, r300TexObjPtr t, GLuint face) { const int numLevels = t->base.lastLevel - t->base.firstLevel + 1; + if (t->image_override) + return 0; + if (RADEON_DEBUG & (DEBUG_TEXTURE | DEBUG_IOCTL)) { fprintf(stderr, "%s( %p, %p ) sz=%d lvls=%d-%d\n", __FUNCTION__, (void *)rmesa->radeon.glCtx, (void *)t->base.tObj, @@ -557,9 +553,10 @@ int r300UploadTexImages(r300ContextPtr rmesa, r300TexObjPtr t, GLuint face) dirty_images[face] & (1 << (i + t->base.firstLevel))) != 0) { - uploadSubImage(rmesa, t, i, 0, 0, - t->image[face][i].width, - t->image[face][i].height, face); + r300UploadSubImage(rmesa, t, i, 0, 0, + t->image[face][i].width, + t->image[face][i].height, + face); } } t->base.dirty_images[face] = 0; diff --git a/src/mesa/drivers/dri/r300/r300_texstate.c b/src/mesa/drivers/dri/r300/r300_texstate.c index 14b0c6063b..1d2909fd21 100644 --- a/src/mesa/drivers/dri/r300/r300_texstate.c +++ b/src/mesa/drivers/dri/r300/r300_texstate.c @@ -27,9 +27,12 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ -/* - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> +/** + * \file + * + * \author Keith Whitwell <keith@tungstengraphics.com> + * + * \todo Enable R300 texture tiling code? */ #include "glheader.h" @@ -37,6 +40,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "context.h" #include "macros.h" #include "texformat.h" +#include "teximage.h" +#include "texobj.h" #include "enums.h" #include "r300_context.h" @@ -46,109 +51,75 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "r300_tex.h" #include "r300_reg.h" - #define VALID_FORMAT(f) ( ((f) <= MESA_FORMAT_RGBA_DXT5 \ || ((f) >= MESA_FORMAT_RGBA_FLOAT32 && \ (f) <= MESA_FORMAT_INTENSITY_FLOAT16)) \ - && tx_table_le[f].flag ) + && tx_table[f].flag ) #define _ASSIGN(entry, format) \ [ MESA_FORMAT_ ## entry ] = { format, 0, 1} -static const struct { - GLuint format, filter, flag; -} tx_table_be[] = { - /* - * Note that the _REV formats are the same as the non-REV formats. - * This is because the REV and non-REV formats are identical as a - * byte string, but differ when accessed as 16-bit or 32-bit words - * depending on the endianness of the host. Since the textures are - * transferred to the R300 as a byte string (i.e. without any - * byte-swapping), the R300 sees the REV and non-REV formats - * identically. -- paulus - */ - _ASSIGN(RGBA8888, R300_EASY_TX_FORMAT(Z, Y, X, W, W8Z8Y8X8)), - _ASSIGN(RGBA8888_REV, R300_EASY_TX_FORMAT(Y, Z, W, X, W8Z8Y8X8)), - _ASSIGN(ARGB8888, R300_EASY_TX_FORMAT(W, Z, Y, X, W8Z8Y8X8)), - _ASSIGN(ARGB8888_REV, R300_EASY_TX_FORMAT(X, Y, Z, W, W8Z8Y8X8)), - _ASSIGN(RGB888, 0xffffffff), - _ASSIGN(RGB565, R300_EASY_TX_FORMAT(X, Y, Z, ONE, Z5Y6X5)), - _ASSIGN(RGB565_REV, R300_EASY_TX_FORMAT(X, Y, Z, ONE, Z5Y6X5)), - _ASSIGN(ARGB4444, R300_EASY_TX_FORMAT(X, Y, Z, W, W4Z4Y4X4)), - _ASSIGN(ARGB4444_REV, R300_EASY_TX_FORMAT(X, Y, Z, W, W4Z4Y4X4)), - _ASSIGN(ARGB1555, R300_EASY_TX_FORMAT(X, Y, Z, W, W1Z5Y5X5)), - _ASSIGN(ARGB1555_REV, R300_EASY_TX_FORMAT(X, Y, Z, W, W1Z5Y5X5)), - _ASSIGN(AL88, R300_EASY_TX_FORMAT(X, X, X, Y, Y8X8)), - _ASSIGN(AL88_REV, R300_EASY_TX_FORMAT(X, X, X, Y, Y8X8)), - _ASSIGN(RGB332, R300_EASY_TX_FORMAT(X, Y, Z, ONE, Z3Y3X2)), - _ASSIGN(A8, R300_EASY_TX_FORMAT(ZERO, ZERO, ZERO, X, X8)), - _ASSIGN(L8, R300_EASY_TX_FORMAT(X, X, X, ONE, X8)), - _ASSIGN(I8, R300_EASY_TX_FORMAT(X, X, X, X, X8)), - _ASSIGN(CI8, R300_EASY_TX_FORMAT(X, X, X, X, X8)), - _ASSIGN(YCBCR, R300_EASY_TX_FORMAT(X, Y, Z, ONE, G8R8_G8B8)|R300_TX_FORMAT_YUV_MODE ), - _ASSIGN(YCBCR_REV, R300_EASY_TX_FORMAT(X, Y, Z, ONE, G8R8_G8B8)|R300_TX_FORMAT_YUV_MODE), - _ASSIGN(RGB_DXT1, R300_EASY_TX_FORMAT(X, Y, Z, ONE, DXT1)), - _ASSIGN(RGBA_DXT1, R300_EASY_TX_FORMAT(X, Y, Z, W, DXT1)), - _ASSIGN(RGBA_DXT3, R300_EASY_TX_FORMAT(X, Y, Z, W, DXT3)), - _ASSIGN(RGBA_DXT5, R300_EASY_TX_FORMAT(Y, Z, W, X, DXT5)), - _ASSIGN(RGBA_FLOAT32, R300_EASY_TX_FORMAT(Z, Y, X, W, FL_R32G32B32A32)), - _ASSIGN(RGBA_FLOAT16, R300_EASY_TX_FORMAT(Z, Y, X, W, FL_R16G16B16A16)), - _ASSIGN(RGB_FLOAT32, 0xffffffff), - _ASSIGN(RGB_FLOAT16, 0xffffffff), - _ASSIGN(ALPHA_FLOAT32, R300_EASY_TX_FORMAT(ZERO, ZERO, ZERO, X, FL_I32)), - _ASSIGN(ALPHA_FLOAT16, R300_EASY_TX_FORMAT(ZERO, ZERO, ZERO, X, FL_I16)), - _ASSIGN(LUMINANCE_FLOAT32, R300_EASY_TX_FORMAT(X, X, X, ONE, FL_I32)), - _ASSIGN(LUMINANCE_FLOAT16, R300_EASY_TX_FORMAT(X, X, X, ONE, FL_I16)), - _ASSIGN(LUMINANCE_ALPHA_FLOAT32, R300_EASY_TX_FORMAT(X, X, X, Y, FL_I32A32)), - _ASSIGN(LUMINANCE_ALPHA_FLOAT16, R300_EASY_TX_FORMAT(X, X, X, Y, FL_I16A16)), - _ASSIGN(INTENSITY_FLOAT32, R300_EASY_TX_FORMAT(X, X, X, X, FL_I32)), - _ASSIGN(INTENSITY_FLOAT16, R300_EASY_TX_FORMAT(X, X, X, X, FL_I16)), - }; - -static const struct { +/* + * Note that the _REV formats are the same as the non-REV formats. This is + * because the REV and non-REV formats are identical as a byte string, but + * differ when accessed as 16-bit or 32-bit words depending on the endianness of + * the host. Since the textures are transferred to the R300 as a byte string + * (i.e. without any byte-swapping), the R300 sees the REV and non-REV formats + * identically. -- paulus + */ + +static const struct tx_table { GLuint format, filter, flag; -} tx_table_le[] = { - _ASSIGN(RGBA8888, R300_EASY_TX_FORMAT(Y, Z, W, X, W8Z8Y8X8)), - _ASSIGN(RGBA8888_REV, R300_EASY_TX_FORMAT(Z, Y, X, W, W8Z8Y8X8)), - _ASSIGN(ARGB8888, R300_EASY_TX_FORMAT(X, Y, Z, W, W8Z8Y8X8)), - _ASSIGN(ARGB8888_REV, R300_EASY_TX_FORMAT(W, Z, Y, X, W8Z8Y8X8)), - _ASSIGN(RGB888, 0xffffffff), - _ASSIGN(RGB565, R300_EASY_TX_FORMAT(X, Y, Z, ONE, Z5Y6X5)), - _ASSIGN(RGB565_REV, R300_EASY_TX_FORMAT(X, Y, Z, ONE, Z5Y6X5)), - _ASSIGN(ARGB4444, R300_EASY_TX_FORMAT(X, Y, Z, W, W4Z4Y4X4)), - _ASSIGN(ARGB4444_REV, R300_EASY_TX_FORMAT(X, Y, Z, W, W4Z4Y4X4)), - _ASSIGN(ARGB1555, R300_EASY_TX_FORMAT(X, Y, Z, W, W1Z5Y5X5)), - _ASSIGN(ARGB1555_REV, R300_EASY_TX_FORMAT(X, Y, Z, W, W1Z5Y5X5)), - _ASSIGN(AL88, R300_EASY_TX_FORMAT(X, X, X, Y, Y8X8)), - _ASSIGN(AL88_REV, R300_EASY_TX_FORMAT(X, X, X, Y, Y8X8)), - _ASSIGN(RGB332, R300_EASY_TX_FORMAT(X, Y, Z, ONE, Z3Y3X2)), - _ASSIGN(A8, R300_EASY_TX_FORMAT(ZERO, ZERO, ZERO, X, X8)), - _ASSIGN(L8, R300_EASY_TX_FORMAT(X, X, X, ONE, X8)), - _ASSIGN(I8, R300_EASY_TX_FORMAT(X, X, X, X, X8)), - _ASSIGN(CI8, R300_EASY_TX_FORMAT(X, X, X, X, X8)), - _ASSIGN(YCBCR, R300_EASY_TX_FORMAT(X, Y, Z, ONE, G8R8_G8B8)|R300_TX_FORMAT_YUV_MODE ), - _ASSIGN(YCBCR_REV, R300_EASY_TX_FORMAT(X, Y, Z, ONE, G8R8_G8B8)|R300_TX_FORMAT_YUV_MODE), - _ASSIGN(RGB_DXT1, R300_EASY_TX_FORMAT(X, Y, Z, ONE, DXT1)), - _ASSIGN(RGBA_DXT1, R300_EASY_TX_FORMAT(X, Y, Z, W, DXT1)), - _ASSIGN(RGBA_DXT3, R300_EASY_TX_FORMAT(X, Y, Z, W, DXT3)), - _ASSIGN(RGBA_DXT5, R300_EASY_TX_FORMAT(Y, Z, W, X, DXT5)), - _ASSIGN(RGBA_FLOAT32, R300_EASY_TX_FORMAT(Z, Y, X, W, FL_R32G32B32A32)), - _ASSIGN(RGBA_FLOAT16, R300_EASY_TX_FORMAT(Z, Y, X, W, FL_R16G16B16A16)), - _ASSIGN(RGB_FLOAT32, 0xffffffff), - _ASSIGN(RGB_FLOAT16, 0xffffffff), - _ASSIGN(ALPHA_FLOAT32, R300_EASY_TX_FORMAT(ZERO, ZERO, ZERO, X, FL_I32)), - _ASSIGN(ALPHA_FLOAT16, R300_EASY_TX_FORMAT(ZERO, ZERO, ZERO, X, FL_I16)), - _ASSIGN(LUMINANCE_FLOAT32, R300_EASY_TX_FORMAT(X, X, X, ONE, FL_I32)), - _ASSIGN(LUMINANCE_FLOAT16, R300_EASY_TX_FORMAT(X, X, X, ONE, FL_I16)), - _ASSIGN(LUMINANCE_ALPHA_FLOAT32, R300_EASY_TX_FORMAT(X, X, X, Y, FL_I32A32)), - _ASSIGN(LUMINANCE_ALPHA_FLOAT16, R300_EASY_TX_FORMAT(X, X, X, Y, FL_I16A16)), - _ASSIGN(INTENSITY_FLOAT32, R300_EASY_TX_FORMAT(X, X, X, X, FL_I32)), - _ASSIGN(INTENSITY_FLOAT16, R300_EASY_TX_FORMAT(X, X, X, X, FL_I16)), - }; +} tx_table[] = { + /* *INDENT-OFF* */ +#ifdef MESA_LITTLE_ENDIAN + _ASSIGN(RGBA8888, R300_EASY_TX_FORMAT(Y, Z, W, X, W8Z8Y8X8)), + _ASSIGN(RGBA8888_REV, R300_EASY_TX_FORMAT(Z, Y, X, W, W8Z8Y8X8)), + _ASSIGN(ARGB8888, R300_EASY_TX_FORMAT(X, Y, Z, W, W8Z8Y8X8)), + _ASSIGN(ARGB8888_REV, R300_EASY_TX_FORMAT(W, Z, Y, X, W8Z8Y8X8)), +#else + _ASSIGN(RGBA8888, R300_EASY_TX_FORMAT(Z, Y, X, W, W8Z8Y8X8)), + _ASSIGN(RGBA8888_REV, R300_EASY_TX_FORMAT(Y, Z, W, X, W8Z8Y8X8)), + _ASSIGN(ARGB8888, R300_EASY_TX_FORMAT(W, Z, Y, X, W8Z8Y8X8)), + _ASSIGN(ARGB8888_REV, R300_EASY_TX_FORMAT(X, Y, Z, W, W8Z8Y8X8)), +#endif + _ASSIGN(RGB888, R300_EASY_TX_FORMAT(X, Y, Z, ONE, W8Z8Y8X8)), + _ASSIGN(RGB565, R300_EASY_TX_FORMAT(X, Y, Z, ONE, Z5Y6X5)), + _ASSIGN(RGB565_REV, R300_EASY_TX_FORMAT(X, Y, Z, ONE, Z5Y6X5)), + _ASSIGN(ARGB4444, R300_EASY_TX_FORMAT(X, Y, Z, W, W4Z4Y4X4)), + _ASSIGN(ARGB4444_REV, R300_EASY_TX_FORMAT(X, Y, Z, W, W4Z4Y4X4)), + _ASSIGN(ARGB1555, R300_EASY_TX_FORMAT(X, Y, Z, W, W1Z5Y5X5)), + _ASSIGN(ARGB1555_REV, R300_EASY_TX_FORMAT(X, Y, Z, W, W1Z5Y5X5)), + _ASSIGN(AL88, R300_EASY_TX_FORMAT(X, X, X, Y, Y8X8)), + _ASSIGN(AL88_REV, R300_EASY_TX_FORMAT(X, X, X, Y, Y8X8)), + _ASSIGN(RGB332, R300_EASY_TX_FORMAT(X, Y, Z, ONE, Z3Y3X2)), + _ASSIGN(A8, R300_EASY_TX_FORMAT(ZERO, ZERO, ZERO, X, X8)), + _ASSIGN(L8, R300_EASY_TX_FORMAT(X, X, X, ONE, X8)), + _ASSIGN(I8, R300_EASY_TX_FORMAT(X, X, X, X, X8)), + _ASSIGN(CI8, R300_EASY_TX_FORMAT(X, X, X, X, X8)), + _ASSIGN(YCBCR, R300_EASY_TX_FORMAT(X, Y, Z, ONE, G8R8_G8B8) | R300_TX_FORMAT_YUV_MODE), + _ASSIGN(YCBCR_REV, R300_EASY_TX_FORMAT(X, Y, Z, ONE, G8R8_G8B8) | R300_TX_FORMAT_YUV_MODE), + _ASSIGN(RGB_DXT1, R300_EASY_TX_FORMAT(X, Y, Z, ONE, DXT1)), + _ASSIGN(RGBA_DXT1, R300_EASY_TX_FORMAT(X, Y, Z, W, DXT1)), + _ASSIGN(RGBA_DXT3, R300_EASY_TX_FORMAT(X, Y, Z, W, DXT3)), + _ASSIGN(RGBA_DXT5, R300_EASY_TX_FORMAT(Y, Z, W, X, DXT5)), + _ASSIGN(RGBA_FLOAT32, R300_EASY_TX_FORMAT(Z, Y, X, W, FL_R32G32B32A32)), + _ASSIGN(RGBA_FLOAT16, R300_EASY_TX_FORMAT(Z, Y, X, W, FL_R16G16B16A16)), + _ASSIGN(RGB_FLOAT32, 0xffffffff), + _ASSIGN(RGB_FLOAT16, 0xffffffff), + _ASSIGN(ALPHA_FLOAT32, R300_EASY_TX_FORMAT(ZERO, ZERO, ZERO, X, FL_I32)), + _ASSIGN(ALPHA_FLOAT16, R300_EASY_TX_FORMAT(ZERO, ZERO, ZERO, X, FL_I16)), + _ASSIGN(LUMINANCE_FLOAT32, R300_EASY_TX_FORMAT(X, X, X, ONE, FL_I32)), + _ASSIGN(LUMINANCE_FLOAT16, R300_EASY_TX_FORMAT(X, X, X, ONE, FL_I16)), + _ASSIGN(LUMINANCE_ALPHA_FLOAT32, R300_EASY_TX_FORMAT(X, X, X, Y, FL_I32A32)), + _ASSIGN(LUMINANCE_ALPHA_FLOAT16, R300_EASY_TX_FORMAT(X, X, X, Y, FL_I16A16)), + _ASSIGN(INTENSITY_FLOAT32, R300_EASY_TX_FORMAT(X, X, X, X, FL_I32)), + _ASSIGN(INTENSITY_FLOAT16, R300_EASY_TX_FORMAT(X, X, X, X, FL_I16)), + /* *INDENT-ON* */ +}; #undef _ASSIGN - /** * This function computes the number of bytes of storage needed for * the given texture object (all mipmap levels, all cube faces). @@ -173,19 +144,11 @@ static void r300SetTexImages(r300ContextPtr rmesa, /* Set the hardware texture format */ - if (VALID_FORMAT(baseImage->TexFormat->MesaFormat)) { - if (_mesa_little_endian()) { - t->format = - tx_table_le[baseImage->TexFormat->MesaFormat].format; - t->filter |= - tx_table_le[baseImage->TexFormat->MesaFormat].filter; - } else { - t->format = - tx_table_be[baseImage->TexFormat->MesaFormat].format; - t->filter |= - tx_table_be[baseImage->TexFormat->MesaFormat].filter; - } - } else { + if (!t->image_override + && VALID_FORMAT(baseImage->TexFormat->MesaFormat)) { + t->format = tx_table[baseImage->TexFormat->MesaFormat].format; + t->filter |= tx_table[baseImage->TexFormat->MesaFormat].filter; + } else if (!t->image_override) { _mesa_problem(NULL, "unexpected texture format in %s", __FUNCTION__); return; @@ -213,18 +176,21 @@ static void r300SetTexImages(r300ContextPtr rmesa, t->tile_bits = 0; /* figure out if this texture is suitable for tiling. */ -#if 0 /* Disabled for now */ +#if 0 /* Disabled for now */ if (texelBytes) { - if (rmesa->texmicrotile && (tObj->Target != GL_TEXTURE_RECTANGLE_NV) && - /* texrect might be able to use micro tiling too in theory? */ - (baseImage->Height > 1)) { + if ((tObj->Target != GL_TEXTURE_RECTANGLE_NV) && + /* texrect might be able to use micro tiling too in theory? */ + (baseImage->Height > 1)) { /* allow 32 (bytes) x 1 mip (which will use two times the space the non-tiled version would use) max if base texture is large enough */ if ((numLevels == 1) || - (((baseImage->Width * texelBytes / baseImage->Height) <= 32) && - (baseImage->Width * texelBytes > 64)) || - ((baseImage->Width * texelBytes / baseImage->Height) <= 16)) { + (((baseImage->Width * texelBytes / + baseImage->Height) <= 32) + && (baseImage->Width * texelBytes > 64)) + || + ((baseImage->Width * texelBytes / + baseImage->Height) <= 16)) { t->tile_bits |= R300_TXO_MICRO_TILE; } } @@ -246,9 +212,10 @@ static void r300SetTexImages(r300ContextPtr rmesa, /* find image size in bytes */ if (texImage->IsCompressed) { - if ((t->format & R300_TX_FORMAT_DXT1) == R300_TX_FORMAT_DXT1) { + if ((t->format & R300_TX_FORMAT_DXT1) == + R300_TX_FORMAT_DXT1) { // fprintf(stderr,"DXT 1 %d %08X\n", texImage->Width, t->format); - if ((texImage->Width + 3) < 8) /* width one block */ + if ((texImage->Width + 3) < 8) /* width one block */ size = texImage->CompressedSize * 4; else if ((texImage->Width + 3) < 16) size = texImage->CompressedSize * 2; @@ -256,7 +223,8 @@ static void r300SetTexImages(r300ContextPtr rmesa, size = texImage->CompressedSize; } else { /* DXT3/5, 16 bytes per block */ - WARN_ONCE("DXT 3/5 suffers from multitexturing problems!\n"); + WARN_ONCE + ("DXT 3/5 suffers from multitexturing problems!\n"); // fprintf(stderr,"DXT 3/5 %d\n", texImage->Width); if ((texImage->Width + 3) < 8) size = texImage->CompressedSize * 2; @@ -264,14 +232,18 @@ static void r300SetTexImages(r300ContextPtr rmesa, size = texImage->CompressedSize; } } else if (tObj->Target == GL_TEXTURE_RECTANGLE_NV) { - size = ((texImage->Width * texelBytes + 63) & ~63) * texImage->Height; + size = + ((texImage->Width * texelBytes + + 63) & ~63) * texImage->Height; blitWidth = 64 / texelBytes; } else if (t->tile_bits & R300_TXO_MICRO_TILE) { /* tile pattern is 16 bytes x2. mipmaps stay 32 byte aligned, - though the actual offset may be different (if texture is less than - 32 bytes width) to the untiled case */ + though the actual offset may be different (if texture is less than + 32 bytes width) to the untiled case */ int w = (texImage->Width * texelBytes * 2 + 31) & ~31; - size = (w * ((texImage->Height + 1) / 2)) * texImage->Depth; + size = + (w * ((texImage->Height + 1) / 2)) * + texImage->Depth; blitWidth = MAX2(texImage->Width, 64 / texelBytes); } else { int w = (texImage->Width * texelBytes + 31) & ~31; @@ -280,11 +252,12 @@ static void r300SetTexImages(r300ContextPtr rmesa, } assert(size > 0); - if(0) + if (RADEON_DEBUG & DEBUG_TEXTURE) fprintf(stderr, "w=%d h=%d d=%d tb=%d intFormat=%d\n", - texImage->Width, texImage->Height, - texImage->Depth, texImage->TexFormat->TexelBytes, - texImage->InternalFormat); + texImage->Width, texImage->Height, + texImage->Depth, + texImage->TexFormat->TexelBytes, + texImage->InternalFormat); /* Align to 32-byte offset. It is faster to do this unconditionally * (no branch penalty). @@ -296,22 +269,25 @@ static void r300SetTexImages(r300ContextPtr rmesa, /* fix x and y coords up later together with offset */ t->image[0][i].x = curOffset; t->image[0][i].y = 0; - t->image[0][i].width = MIN2(size / texelBytes, blitWidth); - t->image[0][i].height = (size / texelBytes) / t->image[0][i].width; + t->image[0][i].width = + MIN2(size / texelBytes, blitWidth); + t->image[0][i].height = + (size / texelBytes) / t->image[0][i].width; } else { t->image[0][i].x = curOffset % R300_BLIT_WIDTH_BYTES; t->image[0][i].y = curOffset / R300_BLIT_WIDTH_BYTES; - t->image[0][i].width = MIN2(size, R300_BLIT_WIDTH_BYTES); + t->image[0][i].width = + MIN2(size, R300_BLIT_WIDTH_BYTES); t->image[0][i].height = size / t->image[0][i].width; } - if (0) + if (RADEON_DEBUG & DEBUG_TEXTURE) fprintf(stderr, - "level %d: %dx%d x=%d y=%d w=%d h=%d size=%d at %d\n", - i, texImage->Width, texImage->Height, - t->image[0][i].x, t->image[0][i].y, - t->image[0][i].width, t->image[0][i].height, - size, curOffset); + "level %d: %dx%d x=%d y=%d w=%d h=%d size=%d at %d\n", + i, texImage->Width, texImage->Height, + t->image[0][i].x, t->image[0][i].y, + t->image[0][i].width, t->image[0][i].height, + size, curOffset); curOffset += size; } @@ -336,45 +312,17 @@ static void r300SetTexImages(r300ContextPtr rmesa, t->base.totalSize *= 6; /* total texmem needed */ } - /* Hardware state: - */ -#if 0 - t->format &= ~(R200_TXFORMAT_WIDTH_MASK | - R200_TXFORMAT_HEIGHT_MASK | - R200_TXFORMAT_CUBIC_MAP_ENABLE | - R200_TXFORMAT_F5_WIDTH_MASK | - R200_TXFORMAT_F5_HEIGHT_MASK); - t->format |= ((log2Width << R200_TXFORMAT_WIDTH_SHIFT) | - (log2Height << R200_TXFORMAT_HEIGHT_SHIFT)); -#endif -#if 0 - t->format_x &= ~(R200_DEPTH_LOG2_MASK | R200_TEXCOORD_MASK); - if (tObj->Target == GL_TEXTURE_3D) { - t->format_x |= (log2Depth << R200_DEPTH_LOG2_SHIFT); - t->format_x |= R200_TEXCOORD_VOLUME; - } else if (tObj->Target == GL_TEXTURE_CUBE_MAP) { - ASSERT(log2Width == log2Height); - t->format |= R300_TX_FORMAT_CUBIC_MAP; - - t->format_x |= R200_TEXCOORD_CUBIC_ENV; - t->pp_cubic_faces = ((log2Width << R200_FACE_WIDTH_1_SHIFT) | - (log2Height << R200_FACE_HEIGHT_1_SHIFT) | - (log2Width << R200_FACE_WIDTH_2_SHIFT) | - (log2Height << R200_FACE_HEIGHT_2_SHIFT) | - (log2Width << R200_FACE_WIDTH_3_SHIFT) | - (log2Height << R200_FACE_HEIGHT_3_SHIFT) | - (log2Width << R200_FACE_WIDTH_4_SHIFT) | - (log2Height << R200_FACE_HEIGHT_4_SHIFT)); - } -#endif if (tObj->Target == GL_TEXTURE_CUBE_MAP) { ASSERT(log2Width == log2Height); t->format |= R300_TX_FORMAT_CUBIC_MAP; } - t->size = (((tObj->Image[0][t->base.firstLevel]->Width - 1) << R300_TX_WIDTHMASK_SHIFT) - |((tObj->Image[0][t->base.firstLevel]->Height - 1) << R300_TX_HEIGHTMASK_SHIFT)) - |((numLevels - 1) << R300_TX_MAX_MIP_LEVEL_SHIFT); + t->size = + (((tObj->Image[0][t->base.firstLevel]->Width - + 1) << R300_TX_WIDTHMASK_SHIFT) + | ((tObj->Image[0][t->base.firstLevel]->Height - 1) << + R300_TX_HEIGHTMASK_SHIFT)) + | ((numLevels - 1) << R300_TX_MAX_MIP_LEVEL_SHIFT); /* Only need to round to nearest 32 for textures, but the blitter * requires 64-byte aligned pitches, and we may/may not need the @@ -383,15 +331,16 @@ static void r300SetTexImages(r300ContextPtr rmesa, if (baseImage->IsCompressed) { t->pitch = (tObj->Image[0][t->base.firstLevel]->Width + 63) & ~(63); - } - else if (tObj->Target == GL_TEXTURE_RECTANGLE_NV) { + } else if (tObj->Target == GL_TEXTURE_RECTANGLE_NV) { unsigned int align = blitWidth - 1; t->pitch = ((tObj->Image[0][t->base.firstLevel]->Width * - texelBytes) + 63) & ~(63); + texelBytes) + 63) & ~(63); t->size |= R300_TX_SIZE_TXPITCH_EN; - t->pitch_reg = (((tObj->Image[0][t->base.firstLevel]->Width) + align) & ~align) - 1; - } - else { + if (!t->image_override) + t->pitch_reg = + (((tObj->Image[0][t->base.firstLevel]->Width) + + align) & ~align) - 1; + } else { t->pitch = ((tObj->Image[0][t->base.firstLevel]->Width * texelBytes) + 63) & ~(63); @@ -402,12 +351,11 @@ static void r300SetTexImages(r300ContextPtr rmesa, /* FYI: r300UploadTexImages( rmesa, t ) used to be called here */ } - /* ================================================================ * Texture unit state management */ -static GLboolean enable_tex_2d(GLcontext * ctx, int unit) +static GLboolean r300EnableTexture2D(GLcontext * ctx, int unit) { r300ContextPtr rmesa = R300_CONTEXT(ctx); struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit]; @@ -418,35 +366,26 @@ static GLboolean enable_tex_2d(GLcontext * ctx, int unit) if (t->base.dirty_images[0]) { R300_FIREVERTICES(rmesa); + r300SetTexImages(rmesa, tObj); r300UploadTexImages(rmesa, (r300TexObjPtr) tObj->DriverData, 0); - if (!t->base.memBlock) + if (!t->base.memBlock && !t->image_override) return GL_FALSE; } return GL_TRUE; } -#if ENABLE_HW_3D_TEXTURE -static GLboolean enable_tex_3d(GLcontext * ctx, int unit) +static GLboolean r300EnableTexture3D(GLcontext * ctx, int unit) { r300ContextPtr rmesa = R300_CONTEXT(ctx); struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit]; struct gl_texture_object *tObj = texUnit->_Current; r300TexObjPtr t = (r300TexObjPtr) tObj->DriverData; - /* Need to load the 3d images associated with this unit. - */ -#if 0 - if (t->format & R200_TXFORMAT_NON_POWER2) { - t->format &= ~R200_TXFORMAT_NON_POWER2; - t->base.dirty_images[0] = ~0; - } -#endif ASSERT(tObj->Target == GL_TEXTURE_3D); - /* R100 & R200 do not support mipmaps for 3D textures. - */ + /* r300 does not support mipmaps for 3D textures. */ if ((tObj->MinFilter != GL_NEAREST) && (tObj->MinFilter != GL_LINEAR)) { return GL_FALSE; } @@ -461,9 +400,8 @@ static GLboolean enable_tex_3d(GLcontext * ctx, int unit) return GL_TRUE; } -#endif -static GLboolean enable_tex_cube(GLcontext * ctx, int unit) +static GLboolean r300EnableTextureCube(GLcontext * ctx, int unit) { r300ContextPtr rmesa = R300_CONTEXT(ctx); struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit]; @@ -471,15 +409,6 @@ static GLboolean enable_tex_cube(GLcontext * ctx, int unit) r300TexObjPtr t = (r300TexObjPtr) tObj->DriverData; GLuint face; - /* Need to load the 2d images associated with this unit. - */ -#if 0 - if (t->format & R200_TXFORMAT_NON_POWER2) { - t->format &= ~R200_TXFORMAT_NON_POWER2; - for (face = 0; face < 6; face++) - t->base.dirty_images[face] = ~0; - } -#endif ASSERT(tObj->Target == GL_TEXTURE_CUBE_MAP); if (t->base.dirty_images[0] || t->base.dirty_images[1] || @@ -508,7 +437,7 @@ static GLboolean enable_tex_cube(GLcontext * ctx, int unit) return GL_TRUE; } -static GLboolean enable_tex_rect(GLcontext * ctx, int unit) +static GLboolean r300EnableTextureRect(GLcontext * ctx, int unit) { r300ContextPtr rmesa = R300_CONTEXT(ctx); struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit]; @@ -519,16 +448,18 @@ static GLboolean enable_tex_rect(GLcontext * ctx, int unit) if (t->base.dirty_images[0]) { R300_FIREVERTICES(rmesa); + r300SetTexImages(rmesa, tObj); r300UploadTexImages(rmesa, (r300TexObjPtr) tObj->DriverData, 0); - if (!t->base.memBlock && !rmesa->prefer_gart_client_texturing) + if (!t->base.memBlock && !t->image_override && + !rmesa->prefer_gart_client_texturing) return GL_FALSE; } return GL_TRUE; } -static GLboolean update_tex_common(GLcontext * ctx, int unit) +static GLboolean r300UpdateTexture(GLcontext * ctx, int unit) { r300ContextPtr rmesa = R300_CONTEXT(ctx); struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit]; @@ -549,11 +480,11 @@ static GLboolean update_tex_common(GLcontext * ctx, int unit) */ rmesa->state.texture.unit[unit].texobj->base.bound &= - ~(1UL << unit); + ~(1 << unit); } rmesa->state.texture.unit[unit].texobj = t; - t->base.bound |= (1UL << unit); + t->base.bound |= (1 << unit); t->dirty_state |= 1 << unit; driUpdateTextureLRU((driTextureObject *) t); /* XXX: should be locked! */ } @@ -561,44 +492,83 @@ static GLboolean update_tex_common(GLcontext * ctx, int unit) return !t->border_fallback; } +void r300SetTexOffset(__DRIcontext * pDRICtx, GLint texname, + unsigned long long offset, GLint depth, GLuint pitch) +{ + r300ContextPtr rmesa = + (r300ContextPtr) ((__DRIcontextPrivate *) pDRICtx->private)-> + driverPrivate; + struct gl_texture_object *tObj = + _mesa_lookup_texture(rmesa->radeon.glCtx, texname); + r300TexObjPtr t; + + if (!tObj) + return; + + t = (r300TexObjPtr) tObj->DriverData; + + t->image_override = GL_TRUE; + + if (!offset) + return; + + t->offset = offset; + t->pitch_reg = pitch; + + switch (depth) { + case 32: + t->format = R300_EASY_TX_FORMAT(X, Y, Z, W, W8Z8Y8X8); + t->filter |= tx_table[2].filter; + t->pitch_reg /= 4; + break; + case 24: + default: + t->format = R300_EASY_TX_FORMAT(X, Y, Z, ONE, W8Z8Y8X8); + t->filter |= tx_table[4].filter; + t->pitch_reg /= 4; + break; + case 16: + t->format = R300_EASY_TX_FORMAT(X, Y, Z, ONE, Z5Y6X5); + t->filter |= tx_table[5].filter; + t->pitch_reg /= 2; + break; + } + + t->pitch_reg--; +} + static GLboolean r300UpdateTextureUnit(GLcontext * ctx, int unit) { struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit]; if (texUnit->_ReallyEnabled & (TEXTURE_RECT_BIT)) { - return (enable_tex_rect(ctx, unit) && - update_tex_common(ctx, unit)); + return (r300EnableTextureRect(ctx, unit) && + r300UpdateTexture(ctx, unit)); } else if (texUnit->_ReallyEnabled & (TEXTURE_1D_BIT | TEXTURE_2D_BIT)) { - return (enable_tex_2d(ctx, unit) && - update_tex_common(ctx, unit)); - } -#if ENABLE_HW_3D_TEXTURE - else if (texUnit->_ReallyEnabled & (TEXTURE_3D_BIT)) { - return (enable_tex_3d(ctx, unit) && - update_tex_common(ctx, unit)); - } -#endif - else if (texUnit->_ReallyEnabled & (TEXTURE_CUBE_BIT)) { - return (enable_tex_cube(ctx, unit) && - update_tex_common(ctx, unit)); + return (r300EnableTexture2D(ctx, unit) && + r300UpdateTexture(ctx, unit)); + } else if (texUnit->_ReallyEnabled & (TEXTURE_3D_BIT)) { + return (r300EnableTexture3D(ctx, unit) && + r300UpdateTexture(ctx, unit)); + } else if (texUnit->_ReallyEnabled & (TEXTURE_CUBE_BIT)) { + return (r300EnableTextureCube(ctx, unit) && + r300UpdateTexture(ctx, unit)); } else if (texUnit->_ReallyEnabled) { return GL_FALSE; } else { return GL_TRUE; - } + } } void r300UpdateTextureState(GLcontext * ctx) { - GLboolean ok; - - ok = (r300UpdateTextureUnit(ctx, 0) && - r300UpdateTextureUnit(ctx, 1) && - r300UpdateTextureUnit(ctx, 2) && - r300UpdateTextureUnit(ctx, 3) && - r300UpdateTextureUnit(ctx, 4) && - r300UpdateTextureUnit(ctx, 5) && - r300UpdateTextureUnit(ctx, 6) && - r300UpdateTextureUnit(ctx, 7) - ); + int i; + + for (i = 0; i < 8; i++) { + if (!r300UpdateTextureUnit(ctx, i)) { + _mesa_warning(ctx, + "failed to update texture state for unit %d.\n", + i); + } + } } diff --git a/src/mesa/drivers/dri/r300/r300_vertprog.c b/src/mesa/drivers/dri/r300/r300_vertprog.c index 52fd1de449..16dddf6557 100644 --- a/src/mesa/drivers/dri/r300/r300_vertprog.c +++ b/src/mesa/drivers/dri/r300/r300_vertprog.c @@ -25,10 +25,12 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ -/* - * Authors: - * Aapo Tahkola <aet@rasterburn.org> +/** + * \file + * + * \author Aapo Tahkola <aet@rasterburn.org> */ + #include "glheader.h" #include "macros.h" #include "enums.h" @@ -39,7 +41,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #include "tnl/tnl.h" #include "r300_context.h" -#include "r300_program.h" #if SWIZZLE_X != VSF_IN_COMPONENT_X || \ SWIZZLE_Y != VSF_IN_COMPONENT_Y || \ @@ -56,62 +57,66 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #define SCALAR_FLAG (1<<31) #define FLAG_MASK (1<<31) -#define OP_MASK (0xf) /* we are unlikely to have more than 15 */ +#define OP_MASK (0xf) /* we are unlikely to have more than 15 */ #define OPN(operator, ip) {#operator, OPCODE_##operator, ip} -static struct{ +static struct { char *name; int opcode; - unsigned long ip; /* number of input operands and flags */ -}op_names[]={ + unsigned long ip; /* number of input operands and flags */ +} op_names[] = { + /* *INDENT-OFF* */ OPN(ABS, 1), OPN(ADD, 2), - OPN(ARL, 1|SCALAR_FLAG), + OPN(ARL, 1 | SCALAR_FLAG), OPN(DP3, 2), OPN(DP4, 2), OPN(DPH, 2), OPN(DST, 2), - OPN(EX2, 1|SCALAR_FLAG), - OPN(EXP, 1|SCALAR_FLAG), + OPN(EX2, 1 | SCALAR_FLAG), + OPN(EXP, 1 | SCALAR_FLAG), OPN(FLR, 1), OPN(FRC, 1), - OPN(LG2, 1|SCALAR_FLAG), + OPN(LG2, 1 | SCALAR_FLAG), OPN(LIT, 1), - OPN(LOG, 1|SCALAR_FLAG), + OPN(LOG, 1 | SCALAR_FLAG), OPN(MAD, 3), OPN(MAX, 2), OPN(MIN, 2), OPN(MOV, 1), OPN(MUL, 2), - OPN(POW, 2|SCALAR_FLAG), - OPN(RCP, 1|SCALAR_FLAG), - OPN(RSQ, 1|SCALAR_FLAG), + OPN(POW, 2 | SCALAR_FLAG), + OPN(RCP, 1 | SCALAR_FLAG), + OPN(RSQ, 1 | SCALAR_FLAG), OPN(SGE, 2), OPN(SLT, 2), OPN(SUB, 2), OPN(SWZ, 1), OPN(XPD, 2), - OPN(RCC, 0), //extra + OPN(RCC, 0), //extra OPN(PRINT, 0), - OPN(END, 0), + OPN(END, 0) + /* *INDENT-ON* */ }; + #undef OPN -int r300VertexProgUpdateParams(GLcontext *ctx, struct r300_vertex_program_cont *vp, float *dst) +int r300VertexProgUpdateParams(GLcontext * ctx, + struct r300_vertex_program_cont *vp, float *dst) { int pi; struct gl_vertex_program *mesa_vp = &vp->mesa_program; - float *dst_o=dst; - struct gl_program_parameter_list *paramList; + float *dst_o = dst; + struct gl_program_parameter_list *paramList; if (mesa_vp->IsNVProgram) { _mesa_load_tracked_matrices(ctx); - for (pi=0; pi < MAX_NV_VERTEX_PROGRAM_PARAMS; pi++) { - *dst++=ctx->VertexProgram.Parameters[pi][0]; - *dst++=ctx->VertexProgram.Parameters[pi][1]; - *dst++=ctx->VertexProgram.Parameters[pi][2]; - *dst++=ctx->VertexProgram.Parameters[pi][3]; + for (pi = 0; pi < MAX_NV_VERTEX_PROGRAM_PARAMS; pi++) { + *dst++ = ctx->VertexProgram.Parameters[pi][0]; + *dst++ = ctx->VertexProgram.Parameters[pi][1]; + *dst++ = ctx->VertexProgram.Parameters[pi][2]; + *dst++ = ctx->VertexProgram.Parameters[pi][3]; } return dst - dst_o; } @@ -119,26 +124,29 @@ int r300VertexProgUpdateParams(GLcontext *ctx, struct r300_vertex_program_cont * assert(mesa_vp->Base.Parameters); _mesa_load_state_parameters(ctx, mesa_vp->Base.Parameters); - if(mesa_vp->Base.Parameters->NumParameters * 4 > VSF_MAX_FRAGMENT_LENGTH){ + if (mesa_vp->Base.Parameters->NumParameters * 4 > + VSF_MAX_FRAGMENT_LENGTH) { fprintf(stderr, "%s:Params exhausted\n", __FUNCTION__); - exit(-1); + _mesa_exit(-1); } - paramList = mesa_vp->Base.Parameters; - for(pi=0; pi < paramList->NumParameters; pi++){ - switch(paramList->Parameters[pi].Type){ + paramList = mesa_vp->Base.Parameters; + for (pi = 0; pi < paramList->NumParameters; pi++) { + switch (paramList->Parameters[pi].Type) { case PROGRAM_STATE_VAR: case PROGRAM_NAMED_PARAM: //fprintf(stderr, "%s", vp->Parameters->Parameters[pi].Name); case PROGRAM_CONSTANT: - *dst++=paramList->ParameterValues[pi][0]; - *dst++=paramList->ParameterValues[pi][1]; - *dst++=paramList->ParameterValues[pi][2]; - *dst++=paramList->ParameterValues[pi][3]; - break; + *dst++ = paramList->ParameterValues[pi][0]; + *dst++ = paramList->ParameterValues[pi][1]; + *dst++ = paramList->ParameterValues[pi][2]; + *dst++ = paramList->ParameterValues[pi][3]; + break; - default: _mesa_problem(NULL, "Bad param type in %s", __FUNCTION__); + default: + _mesa_problem(NULL, "Bad param type in %s", + __FUNCTION__); } } @@ -155,31 +163,33 @@ static unsigned long t_dst_mask(GLuint mask) static unsigned long t_dst_class(enum register_file file) { - switch(file){ - case PROGRAM_TEMPORARY: - return VSF_OUT_CLASS_TMP; - case PROGRAM_OUTPUT: - return VSF_OUT_CLASS_RESULT; - case PROGRAM_ADDRESS: - return VSF_OUT_CLASS_ADDR; + switch (file) { + case PROGRAM_TEMPORARY: + return VSF_OUT_CLASS_TMP; + case PROGRAM_OUTPUT: + return VSF_OUT_CLASS_RESULT; + case PROGRAM_ADDRESS: + return VSF_OUT_CLASS_ADDR; /* - case PROGRAM_INPUT: - case PROGRAM_LOCAL_PARAM: - case PROGRAM_ENV_PARAM: - case PROGRAM_NAMED_PARAM: - case PROGRAM_STATE_VAR: - case PROGRAM_WRITE_ONLY: - case PROGRAM_ADDRESS: - */ - default: - fprintf(stderr, "problem in %s", __FUNCTION__); - exit(0); + case PROGRAM_INPUT: + case PROGRAM_LOCAL_PARAM: + case PROGRAM_ENV_PARAM: + case PROGRAM_NAMED_PARAM: + case PROGRAM_STATE_VAR: + case PROGRAM_WRITE_ONLY: + case PROGRAM_ADDRESS: + */ + default: + fprintf(stderr, "problem in %s", __FUNCTION__); + _mesa_exit(-1); + return -1; } } -static unsigned long t_dst_index(struct r300_vertex_program *vp, struct prog_dst_register *dst) +static unsigned long t_dst_index(struct r300_vertex_program *vp, + struct prog_dst_register *dst) { - if(dst->File == PROGRAM_OUTPUT) + if (dst->File == PROGRAM_OUTPUT) return vp->outputs[dst->Index]; return dst->Index; @@ -188,30 +198,31 @@ static unsigned long t_dst_index(struct r300_vertex_program *vp, struct prog_dst static unsigned long t_src_class(enum register_file file) { - switch(file){ - case PROGRAM_TEMPORARY: - return VSF_IN_CLASS_TMP; + switch (file) { + case PROGRAM_TEMPORARY: + return VSF_IN_CLASS_TMP; - case PROGRAM_INPUT: - return VSF_IN_CLASS_ATTR; + case PROGRAM_INPUT: + return VSF_IN_CLASS_ATTR; - case PROGRAM_LOCAL_PARAM: - case PROGRAM_ENV_PARAM: - case PROGRAM_NAMED_PARAM: - case PROGRAM_STATE_VAR: - return VSF_IN_CLASS_PARAM; + case PROGRAM_LOCAL_PARAM: + case PROGRAM_ENV_PARAM: + case PROGRAM_NAMED_PARAM: + case PROGRAM_STATE_VAR: + return VSF_IN_CLASS_PARAM; /* - case PROGRAM_OUTPUT: - case PROGRAM_WRITE_ONLY: - case PROGRAM_ADDRESS: - */ - default: - fprintf(stderr, "problem in %s", __FUNCTION__); - exit(0); + case PROGRAM_OUTPUT: + case PROGRAM_WRITE_ONLY: + case PROGRAM_ADDRESS: + */ + default: + fprintf(stderr, "problem in %s", __FUNCTION__); + _mesa_exit(-1); + return -1; } } -static __inline unsigned long t_swizzle(GLubyte swizzle) +static inline unsigned long t_swizzle(GLubyte swizzle) { /* this is in fact a NOP as the Mesa SWIZZLE_* are all identical to VSF_IN_COMPONENT_* */ return swizzle; @@ -222,96 +233,106 @@ static void vp_dump_inputs(struct r300_vertex_program *vp, char *caller) { int i; - if(vp == NULL){ - fprintf(stderr, "vp null in call to %s from %s\n", __FUNCTION__, caller); - return ; + if (vp == NULL) { + fprintf(stderr, "vp null in call to %s from %s\n", __FUNCTION__, + caller); + return; } fprintf(stderr, "%s:<", caller); - for(i=0; i < VERT_ATTRIB_MAX; i++) + for (i = 0; i < VERT_ATTRIB_MAX; i++) fprintf(stderr, "%d ", vp->inputs[i]); fprintf(stderr, ">\n"); } #endif -static unsigned long t_src_index(struct r300_vertex_program *vp, struct prog_src_register *src) +static unsigned long t_src_index(struct r300_vertex_program *vp, + struct prog_src_register *src) { int i; - int max_reg=-1; + int max_reg = -1; - if(src->File == PROGRAM_INPUT){ - if(vp->inputs[src->Index] != -1) + if (src->File == PROGRAM_INPUT) { + if (vp->inputs[src->Index] != -1) return vp->inputs[src->Index]; - for(i=0; i < VERT_ATTRIB_MAX; i++) - if(vp->inputs[i] > max_reg) - max_reg=vp->inputs[i]; + for (i = 0; i < VERT_ATTRIB_MAX; i++) + if (vp->inputs[i] > max_reg) + max_reg = vp->inputs[i]; - vp->inputs[src->Index]=max_reg+1; + vp->inputs[src->Index] = max_reg + 1; //vp_dump_inputs(vp, __FUNCTION__); return vp->inputs[src->Index]; - }else{ + } else { if (src->Index < 0) { - fprintf(stderr, "WARNING negative offsets for indirect addressing do not work\n"); + fprintf(stderr, + "negative offsets for indirect addressing do not work.\n"); return 0; } return src->Index; } } -static unsigned long t_src(struct r300_vertex_program *vp, struct prog_src_register *src) +static unsigned long t_src(struct r300_vertex_program *vp, + struct prog_src_register *src) { /* src->NegateBase uses the NEGATE_ flags from program_instruction.h, * which equal our VSF_FLAGS_ values, so it's safe to just pass it here. */ return MAKE_VSF_SOURCE(t_src_index(vp, src), - t_swizzle(GET_SWZ(src->Swizzle, 0)), - t_swizzle(GET_SWZ(src->Swizzle, 1)), - t_swizzle(GET_SWZ(src->Swizzle, 2)), - t_swizzle(GET_SWZ(src->Swizzle, 3)), - t_src_class(src->File), - src->NegateBase) | (src->RelAddr << 4); + t_swizzle(GET_SWZ(src->Swizzle, 0)), + t_swizzle(GET_SWZ(src->Swizzle, 1)), + t_swizzle(GET_SWZ(src->Swizzle, 2)), + t_swizzle(GET_SWZ(src->Swizzle, 3)), + t_src_class(src->File), + src->NegateBase) | (src->RelAddr << 4); } -static unsigned long t_src_scalar(struct r300_vertex_program *vp, struct prog_src_register *src) +static unsigned long t_src_scalar(struct r300_vertex_program *vp, + struct prog_src_register *src) { return MAKE_VSF_SOURCE(t_src_index(vp, src), - t_swizzle(GET_SWZ(src->Swizzle, 0)), - t_swizzle(GET_SWZ(src->Swizzle, 0)), - t_swizzle(GET_SWZ(src->Swizzle, 0)), - t_swizzle(GET_SWZ(src->Swizzle, 0)), - t_src_class(src->File), - src->NegateBase ? VSF_FLAG_ALL : VSF_FLAG_NONE) | (src->RelAddr << 4); + t_swizzle(GET_SWZ(src->Swizzle, 0)), + t_swizzle(GET_SWZ(src->Swizzle, 0)), + t_swizzle(GET_SWZ(src->Swizzle, 0)), + t_swizzle(GET_SWZ(src->Swizzle, 0)), + t_src_class(src->File), + src-> + NegateBase ? VSF_FLAG_ALL : VSF_FLAG_NONE) | + (src->RelAddr << 4); } static unsigned long t_opcode(enum prog_opcode opcode) { - switch(opcode){ - case OPCODE_ARL: return R300_VPI_OUT_OP_ARL; - case OPCODE_DST: return R300_VPI_OUT_OP_DST; - case OPCODE_EX2: return R300_VPI_OUT_OP_EX2; - case OPCODE_EXP: return R300_VPI_OUT_OP_EXP; - case OPCODE_FRC: return R300_VPI_OUT_OP_FRC; - case OPCODE_LG2: return R300_VPI_OUT_OP_LG2; - case OPCODE_LOG: return R300_VPI_OUT_OP_LOG; - case OPCODE_MAX: return R300_VPI_OUT_OP_MAX; - case OPCODE_MIN: return R300_VPI_OUT_OP_MIN; - case OPCODE_MUL: return R300_VPI_OUT_OP_MUL; - case OPCODE_RCP: return R300_VPI_OUT_OP_RCP; - case OPCODE_RSQ: return R300_VPI_OUT_OP_RSQ; - case OPCODE_SGE: return R300_VPI_OUT_OP_SGE; - case OPCODE_SLT: return R300_VPI_OUT_OP_SLT; - case OPCODE_DP4: return R300_VPI_OUT_OP_DOT; - - default: - fprintf(stderr, "%s: Should not be called with opcode %d!", __FUNCTION__, opcode); + switch (opcode) { + /* *INDENT-OFF* */ + case OPCODE_ARL: return R300_VPI_OUT_OP_ARL; + case OPCODE_DST: return R300_VPI_OUT_OP_DST; + case OPCODE_EX2: return R300_VPI_OUT_OP_EX2; + case OPCODE_EXP: return R300_VPI_OUT_OP_EXP; + case OPCODE_FRC: return R300_VPI_OUT_OP_FRC; + case OPCODE_LG2: return R300_VPI_OUT_OP_LG2; + case OPCODE_LOG: return R300_VPI_OUT_OP_LOG; + case OPCODE_MAX: return R300_VPI_OUT_OP_MAX; + case OPCODE_MIN: return R300_VPI_OUT_OP_MIN; + case OPCODE_MUL: return R300_VPI_OUT_OP_MUL; + case OPCODE_RCP: return R300_VPI_OUT_OP_RCP; + case OPCODE_RSQ: return R300_VPI_OUT_OP_RSQ; + case OPCODE_SGE: return R300_VPI_OUT_OP_SGE; + case OPCODE_SLT: return R300_VPI_OUT_OP_SLT; + case OPCODE_DP4: return R300_VPI_OUT_OP_DOT; + /* *INDENT-ON* */ + + default: + fprintf(stderr, "%s: Should not be called with opcode %d!", + __FUNCTION__, opcode); } - exit(-1); + _mesa_exit(-1); return 0; } @@ -320,20 +341,21 @@ static unsigned long op_operands(enum prog_opcode opcode) int i; /* Can we trust mesas opcodes to be in order ? */ - for(i=0; i < sizeof(op_names) / sizeof(*op_names); i++) - if(op_names[i].opcode == opcode) + for (i = 0; i < sizeof(op_names) / sizeof(*op_names); i++) + if (op_names[i].opcode == opcode) return op_names[i].ip; fprintf(stderr, "op %d not found in op_names\n", opcode); - exit(-1); + _mesa_exit(-1); return 0; } -static GLboolean valid_dst(struct r300_vertex_program *vp, struct prog_dst_register *dst) +static GLboolean valid_dst(struct r300_vertex_program *vp, + struct prog_dst_register *dst) { - if(dst->File == PROGRAM_OUTPUT && vp->outputs[dst->Index] == -1) { + if (dst->File == PROGRAM_OUTPUT && vp->outputs[dst->Index] == -1) { return GL_FALSE; - } else if(dst->File == PROGRAM_ADDRESS) { + } else if (dst->File == PROGRAM_ADDRESS) { assert(dst->Index == 0); } @@ -389,9 +411,10 @@ static GLboolean valid_dst(struct r300_vertex_program *vp, struct prog_dst_regis u_temp_i=VSF_MAX_FRAGMENT_TEMPS-1; \ } while (0) -static void r300_translate_vertex_shader(struct r300_vertex_program *vp, struct prog_instruction *vpi) +static void r300TranslateVertexShader(struct r300_vertex_program *vp, + struct prog_instruction *vpi) { - int i, cur_reg=0; + int i, cur_reg = 0; VERTEX_SHADER_INSTRUCTION *o_inst; unsigned long operands; int are_srcs_scalar; @@ -399,341 +422,475 @@ static void r300_translate_vertex_shader(struct r300_vertex_program *vp, struct /* Initial value should be last tmp reg that hw supports. Strangely enough r300 doesnt mind even though these would be out of range. Smart enough to realize that it doesnt need it? */ - int u_temp_i=VSF_MAX_FRAGMENT_TEMPS-1; + int u_temp_i = VSF_MAX_FRAGMENT_TEMPS - 1; struct prog_src_register src[3]; - vp->pos_end=0; /* Not supported yet */ - vp->program.length=0; - /*vp->num_temporaries=mesa_vp->Base.NumTemporaries;*/ + vp->pos_end = 0; /* Not supported yet */ + vp->program.length = 0; + /*vp->num_temporaries=mesa_vp->Base.NumTemporaries; */ - for(i=0; i < VERT_ATTRIB_MAX; i++) + for (i = 0; i < VERT_ATTRIB_MAX; i++) vp->inputs[i] = -1; - for(i=0; i < VERT_RESULT_MAX; i++) + for (i = 0; i < VERT_RESULT_MAX; i++) vp->outputs[i] = -1; assert(vp->key.OutputsWritten & (1 << VERT_RESULT_HPOS)); /* Assign outputs */ - if(vp->key.OutputsWritten & (1 << VERT_RESULT_HPOS)) + if (vp->key.OutputsWritten & (1 << VERT_RESULT_HPOS)) vp->outputs[VERT_RESULT_HPOS] = cur_reg++; - if(vp->key.OutputsWritten & (1 << VERT_RESULT_PSIZ)) + if (vp->key.OutputsWritten & (1 << VERT_RESULT_PSIZ)) vp->outputs[VERT_RESULT_PSIZ] = cur_reg++; - if(vp->key.OutputsWritten & (1 << VERT_RESULT_COL0)) + if (vp->key.OutputsWritten & (1 << VERT_RESULT_COL0)) vp->outputs[VERT_RESULT_COL0] = cur_reg++; - if(vp->key.OutputsWritten & (1 << VERT_RESULT_COL1)) + if (vp->key.OutputsWritten & (1 << VERT_RESULT_COL1)) vp->outputs[VERT_RESULT_COL1] = cur_reg++; -#if 0 /* Not supported yet */ - if(vp->key.OutputsWritten & (1 << VERT_RESULT_BFC0)) +#if 0 /* Not supported yet */ + if (vp->key.OutputsWritten & (1 << VERT_RESULT_BFC0)) vp->outputs[VERT_RESULT_BFC0] = cur_reg++; - if(vp->key.OutputsWritten & (1 << VERT_RESULT_BFC1)) + if (vp->key.OutputsWritten & (1 << VERT_RESULT_BFC1)) vp->outputs[VERT_RESULT_BFC1] = cur_reg++; - if(vp->key.OutputsWritten & (1 << VERT_RESULT_FOGC)) + if (vp->key.OutputsWritten & (1 << VERT_RESULT_FOGC)) vp->outputs[VERT_RESULT_FOGC] = cur_reg++; #endif - for(i=VERT_RESULT_TEX0; i <= VERT_RESULT_TEX7; i++) - if(vp->key.OutputsWritten & (1 << i)) + for (i = VERT_RESULT_TEX0; i <= VERT_RESULT_TEX7; i++) + if (vp->key.OutputsWritten & (1 << i)) vp->outputs[i] = cur_reg++; vp->translated = GL_TRUE; vp->native = GL_TRUE; - o_inst=vp->program.body.i; - for(; vpi->Opcode != OPCODE_END; vpi++, o_inst++){ + o_inst = vp->program.body.i; + for (; vpi->Opcode != OPCODE_END; vpi++, o_inst++) { FREE_TEMPS(); - if(!valid_dst(vp, &vpi->DstReg)) - { + if (!valid_dst(vp, &vpi->DstReg)) { /* redirect result to unused temp */ vpi->DstReg.File = PROGRAM_TEMPORARY; vpi->DstReg.Index = u_temp_i; } - operands=op_operands(vpi->Opcode); - are_srcs_scalar=operands & SCALAR_FLAG; + operands = op_operands(vpi->Opcode); + are_srcs_scalar = operands & SCALAR_FLAG; operands &= OP_MASK; - for(i=0; i < operands; i++) - src[i]=vpi->SrcReg[i]; - - if(operands == 3){ /* TODO: scalars */ - if( CMP_SRCS(src[1], src[2]) || CMP_SRCS(src[0], src[2]) ){ - o_inst->op=MAKE_VSF_OP(R300_VPI_OUT_OP_ADD, u_temp_i, - VSF_FLAG_ALL, VSF_OUT_CLASS_TMP); - - o_inst->src1=MAKE_VSF_SOURCE(t_src_index(vp, &src[2]), - SWIZZLE_X, SWIZZLE_Y, - SWIZZLE_Z, SWIZZLE_W, - t_src_class(src[2].File), VSF_FLAG_NONE) | (src[2].RelAddr << 4); - - o_inst->src2=ZERO_SRC_2; - o_inst->src3=ZERO_SRC_2; + for (i = 0; i < operands; i++) + src[i] = vpi->SrcReg[i]; + + if (operands == 3) { /* TODO: scalars */ + if (CMP_SRCS(src[1], src[2]) + || CMP_SRCS(src[0], src[2])) { + o_inst->op = + MAKE_VSF_OP(R300_VPI_OUT_OP_ADD, u_temp_i, + VSF_FLAG_ALL, + VSF_OUT_CLASS_TMP); + + o_inst->src[0] = + MAKE_VSF_SOURCE(t_src_index(vp, &src[2]), + SWIZZLE_X, SWIZZLE_Y, + SWIZZLE_Z, SWIZZLE_W, + t_src_class(src[2].File), + VSF_FLAG_NONE) | (src[2]. + RelAddr << + 4); + + o_inst->src[1] = ZERO_SRC_2; + o_inst->src[2] = ZERO_SRC_2; o_inst++; - src[2].File=PROGRAM_TEMPORARY; - src[2].Index=u_temp_i; - src[2].RelAddr=0; + src[2].File = PROGRAM_TEMPORARY; + src[2].Index = u_temp_i; + src[2].RelAddr = 0; u_temp_i--; } } - if(operands >= 2){ - if( CMP_SRCS(src[1], src[0]) ){ - o_inst->op=MAKE_VSF_OP(R300_VPI_OUT_OP_ADD, u_temp_i, - VSF_FLAG_ALL, VSF_OUT_CLASS_TMP); - - o_inst->src1=MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), - SWIZZLE_X, SWIZZLE_Y, - SWIZZLE_Z, SWIZZLE_W, - t_src_class(src[0].File), VSF_FLAG_NONE) | (src[0].RelAddr << 4); - - o_inst->src2=ZERO_SRC_0; - o_inst->src3=ZERO_SRC_0; + if (operands >= 2) { + if (CMP_SRCS(src[1], src[0])) { + o_inst->op = + MAKE_VSF_OP(R300_VPI_OUT_OP_ADD, u_temp_i, + VSF_FLAG_ALL, + VSF_OUT_CLASS_TMP); + + o_inst->src[0] = + MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), + SWIZZLE_X, SWIZZLE_Y, + SWIZZLE_Z, SWIZZLE_W, + t_src_class(src[0].File), + VSF_FLAG_NONE) | (src[0]. + RelAddr << + 4); + + o_inst->src[1] = ZERO_SRC_0; + o_inst->src[2] = ZERO_SRC_0; o_inst++; - src[0].File=PROGRAM_TEMPORARY; - src[0].Index=u_temp_i; - src[0].RelAddr=0; + src[0].File = PROGRAM_TEMPORARY; + src[0].Index = u_temp_i; + src[0].RelAddr = 0; u_temp_i--; } } /* These ops need special handling. */ - switch(vpi->Opcode){ + switch (vpi->Opcode) { case OPCODE_POW: - o_inst->op=MAKE_VSF_OP(R300_VPI_OUT_OP_POW, t_dst_index(vp, &vpi->DstReg), - t_dst_mask(vpi->DstReg.WriteMask), t_dst_class(vpi->DstReg.File)); - o_inst->src1=t_src_scalar(vp, &src[0]); - o_inst->src2=ZERO_SRC_0; - o_inst->src3=t_src_scalar(vp, &src[1]); + o_inst->op = + MAKE_VSF_OP(R300_VPI_OUT_OP_POW, + t_dst_index(vp, &vpi->DstReg), + t_dst_mask(vpi->DstReg.WriteMask), + t_dst_class(vpi->DstReg.File)); + o_inst->src[0] = t_src_scalar(vp, &src[0]); + o_inst->src[1] = ZERO_SRC_0; + o_inst->src[2] = t_src_scalar(vp, &src[1]); goto next; - case OPCODE_MOV://ADD RESULT 1.X Y Z W PARAM 0{} {X Y Z W} PARAM 0{} {ZERO ZERO ZERO ZERO} + case OPCODE_MOV: //ADD RESULT 1.X Y Z W PARAM 0{} {X Y Z W} PARAM 0{} {ZERO ZERO ZERO ZERO} case OPCODE_SWZ: #if 1 - o_inst->op=MAKE_VSF_OP(R300_VPI_OUT_OP_ADD, t_dst_index(vp, &vpi->DstReg), - t_dst_mask(vpi->DstReg.WriteMask), t_dst_class(vpi->DstReg.File)); - o_inst->src1=t_src(vp, &src[0]); - o_inst->src2=ZERO_SRC_0; - o_inst->src3=ZERO_SRC_0; + o_inst->op = + MAKE_VSF_OP(R300_VPI_OUT_OP_ADD, + t_dst_index(vp, &vpi->DstReg), + t_dst_mask(vpi->DstReg.WriteMask), + t_dst_class(vpi->DstReg.File)); + o_inst->src[0] = t_src(vp, &src[0]); + o_inst->src[1] = ZERO_SRC_0; + o_inst->src[2] = ZERO_SRC_0; #else - hw_op=(src[0].File == PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 : R300_VPI_OUT_OP_MAD; - - o_inst->op=MAKE_VSF_OP(hw_op, t_dst_index(vp, &vpi->DstReg), - t_dst_mask(vpi->DstReg.WriteMask), t_dst_class(vpi->DstReg.File)); - o_inst->src1=t_src(vp, &src[0]); - o_inst->src2=ONE_SRC_0; - o_inst->src3=ZERO_SRC_0; + hw_op = + (src[0].File == + PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 : + R300_VPI_OUT_OP_MAD; + + o_inst->op = + MAKE_VSF_OP(hw_op, t_dst_index(vp, &vpi->DstReg), + t_dst_mask(vpi->DstReg.WriteMask), + t_dst_class(vpi->DstReg.File)); + o_inst->src[0] = t_src(vp, &src[0]); + o_inst->src[1] = ONE_SRC_0; + o_inst->src[2] = ZERO_SRC_0; #endif goto next; case OPCODE_ADD: #if 1 - hw_op=(src[0].File == PROGRAM_TEMPORARY && - src[1].File == PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 : R300_VPI_OUT_OP_MAD; - - o_inst->op=MAKE_VSF_OP(hw_op, t_dst_index(vp, &vpi->DstReg), - t_dst_mask(vpi->DstReg.WriteMask), t_dst_class(vpi->DstReg.File)); - o_inst->src1=ONE_SRC_0; - o_inst->src2=t_src(vp, &src[0]); - o_inst->src3=t_src(vp, &src[1]); + hw_op = (src[0].File == PROGRAM_TEMPORARY && + src[1].File == + PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 : + R300_VPI_OUT_OP_MAD; + + o_inst->op = + MAKE_VSF_OP(hw_op, t_dst_index(vp, &vpi->DstReg), + t_dst_mask(vpi->DstReg.WriteMask), + t_dst_class(vpi->DstReg.File)); + o_inst->src[0] = ONE_SRC_0; + o_inst->src[1] = t_src(vp, &src[0]); + o_inst->src[2] = t_src(vp, &src[1]); #else - o_inst->op=MAKE_VSF_OP(R300_VPI_OUT_OP_ADD, t_dst_index(vp, &vpi->DstReg), - t_dst_mask(vpi->DstReg.WriteMask), t_dst_class(vpi->DstReg.File)); - o_inst->src1=t_src(vp, &src[0]); - o_inst->src2=t_src(vp, &src[1]); - o_inst->src3=ZERO_SRC_1; + o_inst->op = + MAKE_VSF_OP(R300_VPI_OUT_OP_ADD, + t_dst_index(vp, &vpi->DstReg), + t_dst_mask(vpi->DstReg.WriteMask), + t_dst_class(vpi->DstReg.File)); + o_inst->src[0] = t_src(vp, &src[0]); + o_inst->src[1] = t_src(vp, &src[1]); + o_inst->src[2] = ZERO_SRC_1; #endif goto next; case OPCODE_MAD: - hw_op=(src[0].File == PROGRAM_TEMPORARY && - src[1].File == PROGRAM_TEMPORARY && - src[2].File == PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 : R300_VPI_OUT_OP_MAD; - - o_inst->op=MAKE_VSF_OP(hw_op, t_dst_index(vp, &vpi->DstReg), - t_dst_mask(vpi->DstReg.WriteMask), t_dst_class(vpi->DstReg.File)); - o_inst->src1=t_src(vp, &src[0]); - o_inst->src2=t_src(vp, &src[1]); - o_inst->src3=t_src(vp, &src[2]); + hw_op = (src[0].File == PROGRAM_TEMPORARY && + src[1].File == PROGRAM_TEMPORARY && + src[2].File == + PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 : + R300_VPI_OUT_OP_MAD; + + o_inst->op = + MAKE_VSF_OP(hw_op, t_dst_index(vp, &vpi->DstReg), + t_dst_mask(vpi->DstReg.WriteMask), + t_dst_class(vpi->DstReg.File)); + o_inst->src[0] = t_src(vp, &src[0]); + o_inst->src[1] = t_src(vp, &src[1]); + o_inst->src[2] = t_src(vp, &src[2]); goto next; - case OPCODE_MUL: /* HW mul can take third arg but appears to have some other limitations. */ - hw_op=(src[0].File == PROGRAM_TEMPORARY && - src[1].File == PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 : R300_VPI_OUT_OP_MAD; + case OPCODE_MUL: /* HW mul can take third arg but appears to have some other limitations. */ + hw_op = (src[0].File == PROGRAM_TEMPORARY && + src[1].File == + PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 : + R300_VPI_OUT_OP_MAD; - o_inst->op=MAKE_VSF_OP(hw_op, t_dst_index(vp, &vpi->DstReg), - t_dst_mask(vpi->DstReg.WriteMask), t_dst_class(vpi->DstReg.File)); - o_inst->src1=t_src(vp, &src[0]); - o_inst->src2=t_src(vp, &src[1]); + o_inst->op = + MAKE_VSF_OP(hw_op, t_dst_index(vp, &vpi->DstReg), + t_dst_mask(vpi->DstReg.WriteMask), + t_dst_class(vpi->DstReg.File)); + o_inst->src[0] = t_src(vp, &src[0]); + o_inst->src[1] = t_src(vp, &src[1]); - o_inst->src3=ZERO_SRC_1; + o_inst->src[2] = ZERO_SRC_1; goto next; - case OPCODE_DP3://DOT RESULT 1.X Y Z W PARAM 0{} {X Y Z ZERO} PARAM 0{} {X Y Z ZERO} - o_inst->op=MAKE_VSF_OP(R300_VPI_OUT_OP_DOT, t_dst_index(vp, &vpi->DstReg), - t_dst_mask(vpi->DstReg.WriteMask), t_dst_class(vpi->DstReg.File)); - - o_inst->src1=MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), - t_swizzle(GET_SWZ(src[0].Swizzle, 0)), - t_swizzle(GET_SWZ(src[0].Swizzle, 1)), - t_swizzle(GET_SWZ(src[0].Swizzle, 2)), - SWIZZLE_ZERO, - t_src_class(src[0].File), - src[0].NegateBase ? VSF_FLAG_XYZ : VSF_FLAG_NONE) | (src[0].RelAddr << 4); - - o_inst->src2=MAKE_VSF_SOURCE(t_src_index(vp, &src[1]), - t_swizzle(GET_SWZ(src[1].Swizzle, 0)), - t_swizzle(GET_SWZ(src[1].Swizzle, 1)), - t_swizzle(GET_SWZ(src[1].Swizzle, 2)), - SWIZZLE_ZERO, - t_src_class(src[1].File), - src[1].NegateBase ? VSF_FLAG_XYZ : VSF_FLAG_NONE) | (src[1].RelAddr << 4); - - o_inst->src3=ZERO_SRC_1; + case OPCODE_DP3: //DOT RESULT 1.X Y Z W PARAM 0{} {X Y Z ZERO} PARAM 0{} {X Y Z ZERO} + o_inst->op = + MAKE_VSF_OP(R300_VPI_OUT_OP_DOT, + t_dst_index(vp, &vpi->DstReg), + t_dst_mask(vpi->DstReg.WriteMask), + t_dst_class(vpi->DstReg.File)); + + o_inst->src[0] = + MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), + t_swizzle(GET_SWZ + (src[0].Swizzle, 0)), + t_swizzle(GET_SWZ + (src[0].Swizzle, 1)), + t_swizzle(GET_SWZ + (src[0].Swizzle, 2)), + SWIZZLE_ZERO, + t_src_class(src[0].File), + src[0]. + NegateBase ? VSF_FLAG_XYZ : + VSF_FLAG_NONE) | (src[0]. + RelAddr << 4); + + o_inst->src[1] = + MAKE_VSF_SOURCE(t_src_index(vp, &src[1]), + t_swizzle(GET_SWZ + (src[1].Swizzle, 0)), + t_swizzle(GET_SWZ + (src[1].Swizzle, 1)), + t_swizzle(GET_SWZ + (src[1].Swizzle, 2)), + SWIZZLE_ZERO, + t_src_class(src[1].File), + src[1]. + NegateBase ? VSF_FLAG_XYZ : + VSF_FLAG_NONE) | (src[1]. + RelAddr << 4); + + o_inst->src[2] = ZERO_SRC_1; goto next; - case OPCODE_SUB://ADD RESULT 1.X Y Z W TMP 0{} {X Y Z W} PARAM 1{X Y Z W } {X Y Z W} neg Xneg Yneg Zneg W + case OPCODE_SUB: //ADD RESULT 1.X Y Z W TMP 0{} {X Y Z W} PARAM 1{X Y Z W } {X Y Z W} neg Xneg Yneg Zneg W #if 1 - hw_op=(src[0].File == PROGRAM_TEMPORARY && - src[1].File == PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 : R300_VPI_OUT_OP_MAD; - - o_inst->op=MAKE_VSF_OP(hw_op, t_dst_index(vp, &vpi->DstReg), - t_dst_mask(vpi->DstReg.WriteMask), t_dst_class(vpi->DstReg.File)); - o_inst->src1=t_src(vp, &src[0]); - o_inst->src2=ONE_SRC_0; - o_inst->src3=MAKE_VSF_SOURCE(t_src_index(vp, &src[1]), - t_swizzle(GET_SWZ(src[1].Swizzle, 0)), - t_swizzle(GET_SWZ(src[1].Swizzle, 1)), - t_swizzle(GET_SWZ(src[1].Swizzle, 2)), - t_swizzle(GET_SWZ(src[1].Swizzle, 3)), - t_src_class(src[1].File), - (!src[1].NegateBase) ? VSF_FLAG_ALL : VSF_FLAG_NONE) | (src[1].RelAddr << 4); + hw_op = (src[0].File == PROGRAM_TEMPORARY && + src[1].File == + PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 : + R300_VPI_OUT_OP_MAD; + + o_inst->op = + MAKE_VSF_OP(hw_op, t_dst_index(vp, &vpi->DstReg), + t_dst_mask(vpi->DstReg.WriteMask), + t_dst_class(vpi->DstReg.File)); + o_inst->src[0] = t_src(vp, &src[0]); + o_inst->src[1] = ONE_SRC_0; + o_inst->src[2] = + MAKE_VSF_SOURCE(t_src_index(vp, &src[1]), + t_swizzle(GET_SWZ + (src[1].Swizzle, 0)), + t_swizzle(GET_SWZ + (src[1].Swizzle, 1)), + t_swizzle(GET_SWZ + (src[1].Swizzle, 2)), + t_swizzle(GET_SWZ + (src[1].Swizzle, 3)), + t_src_class(src[1].File), + (!src[1]. + NegateBase) ? VSF_FLAG_ALL : + VSF_FLAG_NONE) | (src[1]. + RelAddr << 4); #else - o_inst->op=MAKE_VSF_OP(R300_VPI_OUT_OP_ADD, t_dst_index(vp, &vpi->DstReg), - t_dst_mask(vpi->DstReg.WriteMask), t_dst_class(vpi->DstReg.File)); - - o_inst->src1=t_src(vp, &src[0]); - o_inst->src2=MAKE_VSF_SOURCE(t_src_index(vp, &src[1]), - t_swizzle(GET_SWZ(src[1].Swizzle, 0)), - t_swizzle(GET_SWZ(src[1].Swizzle, 1)), - t_swizzle(GET_SWZ(src[1].Swizzle, 2)), - t_swizzle(GET_SWZ(src[1].Swizzle, 3)), - t_src_class(src[1].File), - (!src[1].NegateBase) ? VSF_FLAG_ALL : VSF_FLAG_NONE) | (src[1].RelAddr << 4); - o_inst->src3=0; + o_inst->op = + MAKE_VSF_OP(R300_VPI_OUT_OP_ADD, + t_dst_index(vp, &vpi->DstReg), + t_dst_mask(vpi->DstReg.WriteMask), + t_dst_class(vpi->DstReg.File)); + + o_inst->src[0] = t_src(vp, &src[0]); + o_inst->src[1] = + MAKE_VSF_SOURCE(t_src_index(vp, &src[1]), + t_swizzle(GET_SWZ + (src[1].Swizzle, 0)), + t_swizzle(GET_SWZ + (src[1].Swizzle, 1)), + t_swizzle(GET_SWZ + (src[1].Swizzle, 2)), + t_swizzle(GET_SWZ + (src[1].Swizzle, 3)), + t_src_class(src[1].File), + (!src[1]. + NegateBase) ? VSF_FLAG_ALL : + VSF_FLAG_NONE) | (src[1]. + RelAddr << 4); + o_inst->src[2] = 0; #endif goto next; - case OPCODE_ABS://MAX RESULT 1.X Y Z W PARAM 0{} {X Y Z W} PARAM 0{X Y Z W } {X Y Z W} neg Xneg Yneg Zneg W - o_inst->op=MAKE_VSF_OP(R300_VPI_OUT_OP_MAX, t_dst_index(vp, &vpi->DstReg), - t_dst_mask(vpi->DstReg.WriteMask), t_dst_class(vpi->DstReg.File)); - - o_inst->src1=t_src(vp, &src[0]); - o_inst->src2=MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), - t_swizzle(GET_SWZ(src[0].Swizzle, 0)), - t_swizzle(GET_SWZ(src[0].Swizzle, 1)), - t_swizzle(GET_SWZ(src[0].Swizzle, 2)), - t_swizzle(GET_SWZ(src[0].Swizzle, 3)), - t_src_class(src[0].File), - (!src[0].NegateBase) ? VSF_FLAG_ALL : VSF_FLAG_NONE) | (src[0].RelAddr << 4); - o_inst->src3=0; + case OPCODE_ABS: //MAX RESULT 1.X Y Z W PARAM 0{} {X Y Z W} PARAM 0{X Y Z W } {X Y Z W} neg Xneg Yneg Zneg W + o_inst->op = + MAKE_VSF_OP(R300_VPI_OUT_OP_MAX, + t_dst_index(vp, &vpi->DstReg), + t_dst_mask(vpi->DstReg.WriteMask), + t_dst_class(vpi->DstReg.File)); + + o_inst->src[0] = t_src(vp, &src[0]); + o_inst->src[1] = + MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), + t_swizzle(GET_SWZ + (src[0].Swizzle, 0)), + t_swizzle(GET_SWZ + (src[0].Swizzle, 1)), + t_swizzle(GET_SWZ + (src[0].Swizzle, 2)), + t_swizzle(GET_SWZ + (src[0].Swizzle, 3)), + t_src_class(src[0].File), + (!src[0]. + NegateBase) ? VSF_FLAG_ALL : + VSF_FLAG_NONE) | (src[0]. + RelAddr << 4); + o_inst->src[2] = 0; goto next; case OPCODE_FLR: - /* FRC TMP 0.X Y Z W PARAM 0{} {X Y Z W} - ADD RESULT 1.X Y Z W PARAM 0{} {X Y Z W} TMP 0{X Y Z W } {X Y Z W} neg Xneg Yneg Zneg W */ + /* FRC TMP 0.X Y Z W PARAM 0{} {X Y Z W} + ADD RESULT 1.X Y Z W PARAM 0{} {X Y Z W} TMP 0{X Y Z W } {X Y Z W} neg Xneg Yneg Zneg W */ - o_inst->op=MAKE_VSF_OP(R300_VPI_OUT_OP_FRC, u_temp_i, - t_dst_mask(vpi->DstReg.WriteMask), VSF_OUT_CLASS_TMP); + o_inst->op = MAKE_VSF_OP(R300_VPI_OUT_OP_FRC, u_temp_i, + t_dst_mask(vpi->DstReg. + WriteMask), + VSF_OUT_CLASS_TMP); - o_inst->src1=t_src(vp, &src[0]); - o_inst->src2=ZERO_SRC_0; - o_inst->src3=ZERO_SRC_0; + o_inst->src[0] = t_src(vp, &src[0]); + o_inst->src[1] = ZERO_SRC_0; + o_inst->src[2] = ZERO_SRC_0; o_inst++; - o_inst->op=MAKE_VSF_OP(R300_VPI_OUT_OP_ADD, t_dst_index(vp, &vpi->DstReg), - t_dst_mask(vpi->DstReg.WriteMask), t_dst_class(vpi->DstReg.File)); - - o_inst->src1=t_src(vp, &src[0]); - o_inst->src2=MAKE_VSF_SOURCE(u_temp_i, - VSF_IN_COMPONENT_X, - VSF_IN_COMPONENT_Y, - VSF_IN_COMPONENT_Z, - VSF_IN_COMPONENT_W, - VSF_IN_CLASS_TMP, - /* Not 100% sure about this */ - (!src[0].NegateBase) ? VSF_FLAG_ALL : VSF_FLAG_NONE/*VSF_FLAG_ALL*/); - - o_inst->src3=ZERO_SRC_0; + o_inst->op = + MAKE_VSF_OP(R300_VPI_OUT_OP_ADD, + t_dst_index(vp, &vpi->DstReg), + t_dst_mask(vpi->DstReg.WriteMask), + t_dst_class(vpi->DstReg.File)); + + o_inst->src[0] = t_src(vp, &src[0]); + o_inst->src[1] = MAKE_VSF_SOURCE(u_temp_i, + VSF_IN_COMPONENT_X, + VSF_IN_COMPONENT_Y, + VSF_IN_COMPONENT_Z, + VSF_IN_COMPONENT_W, + VSF_IN_CLASS_TMP, + /* Not 100% sure about this */ + (!src[0]. + NegateBase) ? + VSF_FLAG_ALL : + VSF_FLAG_NONE + /*VSF_FLAG_ALL */ ); + + o_inst->src[2] = ZERO_SRC_0; u_temp_i--; goto next; - case OPCODE_LG2:// LG2 RESULT 1.X Y Z W PARAM 0{} {X X X X} - o_inst->op=MAKE_VSF_OP(R300_VPI_OUT_OP_LG2, t_dst_index(vp, &vpi->DstReg), - t_dst_mask(vpi->DstReg.WriteMask), t_dst_class(vpi->DstReg.File)); - - o_inst->src1=MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), - t_swizzle(GET_SWZ(src[0].Swizzle, 0)), - t_swizzle(GET_SWZ(src[0].Swizzle, 0)), - t_swizzle(GET_SWZ(src[0].Swizzle, 0)), - t_swizzle(GET_SWZ(src[0].Swizzle, 0)), - t_src_class(src[0].File), - src[0].NegateBase ? VSF_FLAG_ALL : VSF_FLAG_NONE) | (src[0].RelAddr << 4); - o_inst->src2=ZERO_SRC_0; - o_inst->src3=ZERO_SRC_0; + case OPCODE_LG2: // LG2 RESULT 1.X Y Z W PARAM 0{} {X X X X} + o_inst->op = + MAKE_VSF_OP(R300_VPI_OUT_OP_LG2, + t_dst_index(vp, &vpi->DstReg), + t_dst_mask(vpi->DstReg.WriteMask), + t_dst_class(vpi->DstReg.File)); + + o_inst->src[0] = + MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), + t_swizzle(GET_SWZ + (src[0].Swizzle, 0)), + t_swizzle(GET_SWZ + (src[0].Swizzle, 0)), + t_swizzle(GET_SWZ + (src[0].Swizzle, 0)), + t_swizzle(GET_SWZ + (src[0].Swizzle, 0)), + t_src_class(src[0].File), + src[0]. + NegateBase ? VSF_FLAG_ALL : + VSF_FLAG_NONE) | (src[0]. + RelAddr << 4); + o_inst->src[1] = ZERO_SRC_0; + o_inst->src[2] = ZERO_SRC_0; goto next; - case OPCODE_LIT://LIT TMP 1.Y Z TMP 1{} {X W Z Y} TMP 1{} {Y W Z X} TMP 1{} {Y X Z W} - o_inst->op=MAKE_VSF_OP(R300_VPI_OUT_OP_LIT, t_dst_index(vp, &vpi->DstReg), - t_dst_mask(vpi->DstReg.WriteMask), t_dst_class(vpi->DstReg.File)); + case OPCODE_LIT: //LIT TMP 1.Y Z TMP 1{} {X W Z Y} TMP 1{} {Y W Z X} TMP 1{} {Y X Z W} + o_inst->op = + MAKE_VSF_OP(R300_VPI_OUT_OP_LIT, + t_dst_index(vp, &vpi->DstReg), + t_dst_mask(vpi->DstReg.WriteMask), + t_dst_class(vpi->DstReg.File)); /* NOTE: Users swizzling might not work. */ - o_inst->src1=MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), - t_swizzle(GET_SWZ(src[0].Swizzle, 0)), // x - t_swizzle(GET_SWZ(src[0].Swizzle, 3)), // w - VSF_IN_COMPONENT_ZERO, // z - t_swizzle(GET_SWZ(src[0].Swizzle, 1)), // y - t_src_class(src[0].File), - src[0].NegateBase ? VSF_FLAG_ALL : VSF_FLAG_NONE) | (src[0].RelAddr << 4); - o_inst->src2=MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), - t_swizzle(GET_SWZ(src[0].Swizzle, 1)), // y - t_swizzle(GET_SWZ(src[0].Swizzle, 3)), // w - VSF_IN_COMPONENT_ZERO, // z - t_swizzle(GET_SWZ(src[0].Swizzle, 0)), // x - t_src_class(src[0].File), - src[0].NegateBase ? VSF_FLAG_ALL : VSF_FLAG_NONE) | (src[0].RelAddr << 4); - o_inst->src3=MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), - t_swizzle(GET_SWZ(src[0].Swizzle, 1)), // y - t_swizzle(GET_SWZ(src[0].Swizzle, 0)), // x - VSF_IN_COMPONENT_ZERO, // z - t_swizzle(GET_SWZ(src[0].Swizzle, 3)), // w - t_src_class(src[0].File), - src[0].NegateBase ? VSF_FLAG_ALL : VSF_FLAG_NONE) | (src[0].RelAddr << 4); + o_inst->src[0] = MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), t_swizzle(GET_SWZ(src[0].Swizzle, 0)), // x + t_swizzle(GET_SWZ(src[0].Swizzle, 3)), // w + VSF_IN_COMPONENT_ZERO, // z + t_swizzle(GET_SWZ(src[0].Swizzle, 1)), // y + t_src_class(src[0]. + File), + src[0]. + NegateBase ? + VSF_FLAG_ALL : + VSF_FLAG_NONE) | + (src[0].RelAddr << 4); + o_inst->src[1] = MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), t_swizzle(GET_SWZ(src[0].Swizzle, 1)), // y + t_swizzle(GET_SWZ(src[0].Swizzle, 3)), // w + VSF_IN_COMPONENT_ZERO, // z + t_swizzle(GET_SWZ(src[0].Swizzle, 0)), // x + t_src_class(src[0]. + File), + src[0]. + NegateBase ? + VSF_FLAG_ALL : + VSF_FLAG_NONE) | + (src[0].RelAddr << 4); + o_inst->src[2] = MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), t_swizzle(GET_SWZ(src[0].Swizzle, 1)), // y + t_swizzle(GET_SWZ(src[0].Swizzle, 0)), // x + VSF_IN_COMPONENT_ZERO, // z + t_swizzle(GET_SWZ(src[0].Swizzle, 3)), // w + t_src_class(src[0]. + File), + src[0]. + NegateBase ? + VSF_FLAG_ALL : + VSF_FLAG_NONE) | + (src[0].RelAddr << 4); goto next; - case OPCODE_DPH://DOT RESULT 1.X Y Z W PARAM 0{} {X Y Z ONE} PARAM 0{} {X Y Z W} - o_inst->op=MAKE_VSF_OP(R300_VPI_OUT_OP_DOT, t_dst_index(vp, &vpi->DstReg), - t_dst_mask(vpi->DstReg.WriteMask), t_dst_class(vpi->DstReg.File)); - - o_inst->src1=MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), - t_swizzle(GET_SWZ(src[0].Swizzle, 0)), - t_swizzle(GET_SWZ(src[0].Swizzle, 1)), - t_swizzle(GET_SWZ(src[0].Swizzle, 2)), - VSF_IN_COMPONENT_ONE, - t_src_class(src[0].File), - src[0].NegateBase ? VSF_FLAG_XYZ : VSF_FLAG_NONE) | (src[0].RelAddr << 4); - o_inst->src2=t_src(vp, &src[1]); - o_inst->src3=ZERO_SRC_1; + case OPCODE_DPH: //DOT RESULT 1.X Y Z W PARAM 0{} {X Y Z ONE} PARAM 0{} {X Y Z W} + o_inst->op = + MAKE_VSF_OP(R300_VPI_OUT_OP_DOT, + t_dst_index(vp, &vpi->DstReg), + t_dst_mask(vpi->DstReg.WriteMask), + t_dst_class(vpi->DstReg.File)); + + o_inst->src[0] = + MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), + t_swizzle(GET_SWZ + (src[0].Swizzle, 0)), + t_swizzle(GET_SWZ + (src[0].Swizzle, 1)), + t_swizzle(GET_SWZ + (src[0].Swizzle, 2)), + VSF_IN_COMPONENT_ONE, + t_src_class(src[0].File), + src[0]. + NegateBase ? VSF_FLAG_XYZ : + VSF_FLAG_NONE) | (src[0]. + RelAddr << 4); + o_inst->src[1] = t_src(vp, &src[1]); + o_inst->src[2] = ZERO_SRC_1; goto next; case OPCODE_XPD: @@ -742,135 +899,162 @@ static void r300_translate_vertex_shader(struct r300_vertex_program *vp, struct NOTE: might need MAD_2 */ - o_inst->op=MAKE_VSF_OP(R300_VPI_OUT_OP_MAD, u_temp_i, - t_dst_mask(vpi->DstReg.WriteMask), VSF_OUT_CLASS_TMP); - - o_inst->src1=MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), - t_swizzle(GET_SWZ(src[0].Swizzle, 1)), // y - t_swizzle(GET_SWZ(src[0].Swizzle, 2)), // z - t_swizzle(GET_SWZ(src[0].Swizzle, 0)), // x - t_swizzle(GET_SWZ(src[0].Swizzle, 3)), // w - t_src_class(src[0].File), - src[0].NegateBase ? VSF_FLAG_ALL : VSF_FLAG_NONE) | (src[0].RelAddr << 4); - - o_inst->src2=MAKE_VSF_SOURCE(t_src_index(vp, &src[1]), - t_swizzle(GET_SWZ(src[1].Swizzle, 2)), // z - t_swizzle(GET_SWZ(src[1].Swizzle, 0)), // x - t_swizzle(GET_SWZ(src[1].Swizzle, 1)), // y - t_swizzle(GET_SWZ(src[1].Swizzle, 3)), // w - t_src_class(src[1].File), - src[1].NegateBase ? VSF_FLAG_ALL : VSF_FLAG_NONE) | (src[1].RelAddr << 4); - - o_inst->src3=ZERO_SRC_1; + o_inst->op = MAKE_VSF_OP(R300_VPI_OUT_OP_MAD, u_temp_i, + t_dst_mask(vpi->DstReg. + WriteMask), + VSF_OUT_CLASS_TMP); + + o_inst->src[0] = MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), t_swizzle(GET_SWZ(src[0].Swizzle, 1)), // y + t_swizzle(GET_SWZ(src[0].Swizzle, 2)), // z + t_swizzle(GET_SWZ(src[0].Swizzle, 0)), // x + t_swizzle(GET_SWZ(src[0].Swizzle, 3)), // w + t_src_class(src[0]. + File), + src[0]. + NegateBase ? + VSF_FLAG_ALL : + VSF_FLAG_NONE) | + (src[0].RelAddr << 4); + + o_inst->src[1] = MAKE_VSF_SOURCE(t_src_index(vp, &src[1]), t_swizzle(GET_SWZ(src[1].Swizzle, 2)), // z + t_swizzle(GET_SWZ(src[1].Swizzle, 0)), // x + t_swizzle(GET_SWZ(src[1].Swizzle, 1)), // y + t_swizzle(GET_SWZ(src[1].Swizzle, 3)), // w + t_src_class(src[1]. + File), + src[1]. + NegateBase ? + VSF_FLAG_ALL : + VSF_FLAG_NONE) | + (src[1].RelAddr << 4); + + o_inst->src[2] = ZERO_SRC_1; o_inst++; u_temp_i--; - o_inst->op=MAKE_VSF_OP(R300_VPI_OUT_OP_MAD, t_dst_index(vp, &vpi->DstReg), - t_dst_mask(vpi->DstReg.WriteMask), t_dst_class(vpi->DstReg.File)); - - o_inst->src1=MAKE_VSF_SOURCE(t_src_index(vp, &src[1]), - t_swizzle(GET_SWZ(src[1].Swizzle, 1)), // y - t_swizzle(GET_SWZ(src[1].Swizzle, 2)), // z - t_swizzle(GET_SWZ(src[1].Swizzle, 0)), // x - t_swizzle(GET_SWZ(src[1].Swizzle, 3)), // w - t_src_class(src[1].File), - (!src[1].NegateBase) ? VSF_FLAG_ALL : VSF_FLAG_NONE) | (src[1].RelAddr << 4); - - o_inst->src2=MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), - t_swizzle(GET_SWZ(src[0].Swizzle, 2)), // z - t_swizzle(GET_SWZ(src[0].Swizzle, 0)), // x - t_swizzle(GET_SWZ(src[0].Swizzle, 1)), // y - t_swizzle(GET_SWZ(src[0].Swizzle, 3)), // w - t_src_class(src[0].File), - src[0].NegateBase ? VSF_FLAG_ALL : VSF_FLAG_NONE) | (src[0].RelAddr << 4); - - o_inst->src3=MAKE_VSF_SOURCE(u_temp_i+1, - VSF_IN_COMPONENT_X, - VSF_IN_COMPONENT_Y, - VSF_IN_COMPONENT_Z, - VSF_IN_COMPONENT_W, - VSF_IN_CLASS_TMP, - VSF_FLAG_NONE); + o_inst->op = + MAKE_VSF_OP(R300_VPI_OUT_OP_MAD, + t_dst_index(vp, &vpi->DstReg), + t_dst_mask(vpi->DstReg.WriteMask), + t_dst_class(vpi->DstReg.File)); + + o_inst->src[0] = MAKE_VSF_SOURCE(t_src_index(vp, &src[1]), t_swizzle(GET_SWZ(src[1].Swizzle, 1)), // y + t_swizzle(GET_SWZ(src[1].Swizzle, 2)), // z + t_swizzle(GET_SWZ(src[1].Swizzle, 0)), // x + t_swizzle(GET_SWZ(src[1].Swizzle, 3)), // w + t_src_class(src[1]. + File), + (!src[1]. + NegateBase) ? + VSF_FLAG_ALL : + VSF_FLAG_NONE) | + (src[1].RelAddr << 4); + + o_inst->src[1] = MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), t_swizzle(GET_SWZ(src[0].Swizzle, 2)), // z + t_swizzle(GET_SWZ(src[0].Swizzle, 0)), // x + t_swizzle(GET_SWZ(src[0].Swizzle, 1)), // y + t_swizzle(GET_SWZ(src[0].Swizzle, 3)), // w + t_src_class(src[0]. + File), + src[0]. + NegateBase ? + VSF_FLAG_ALL : + VSF_FLAG_NONE) | + (src[0].RelAddr << 4); + + o_inst->src[2] = MAKE_VSF_SOURCE(u_temp_i + 1, + VSF_IN_COMPONENT_X, + VSF_IN_COMPONENT_Y, + VSF_IN_COMPONENT_Z, + VSF_IN_COMPONENT_W, + VSF_IN_CLASS_TMP, + VSF_FLAG_NONE); goto next; case OPCODE_RCC: - fprintf(stderr, "Dont know how to handle op %d yet\n", vpi->Opcode); - exit(-1); - break; + fprintf(stderr, "Dont know how to handle op %d yet\n", + vpi->Opcode); + _mesa_exit(-1); + break; case OPCODE_END: break; default: break; } - o_inst->op=MAKE_VSF_OP(t_opcode(vpi->Opcode), t_dst_index(vp, &vpi->DstReg), - t_dst_mask(vpi->DstReg.WriteMask), t_dst_class(vpi->DstReg.File)); - - if(are_srcs_scalar){ - switch(operands){ - case 1: - o_inst->src1=t_src_scalar(vp, &src[0]); - o_inst->src2=ZERO_SRC_0; - o_inst->src3=ZERO_SRC_0; + o_inst->op = + MAKE_VSF_OP(t_opcode(vpi->Opcode), + t_dst_index(vp, &vpi->DstReg), + t_dst_mask(vpi->DstReg.WriteMask), + t_dst_class(vpi->DstReg.File)); + + if (are_srcs_scalar) { + switch (operands) { + case 1: + o_inst->src[0] = t_src_scalar(vp, &src[0]); + o_inst->src[1] = ZERO_SRC_0; + o_inst->src[2] = ZERO_SRC_0; break; - case 2: - o_inst->src1=t_src_scalar(vp, &src[0]); - o_inst->src2=t_src_scalar(vp, &src[1]); - o_inst->src3=ZERO_SRC_1; + case 2: + o_inst->src[0] = t_src_scalar(vp, &src[0]); + o_inst->src[1] = t_src_scalar(vp, &src[1]); + o_inst->src[2] = ZERO_SRC_1; break; - case 3: - o_inst->src1=t_src_scalar(vp, &src[0]); - o_inst->src2=t_src_scalar(vp, &src[1]); - o_inst->src3=t_src_scalar(vp, &src[2]); + case 3: + o_inst->src[0] = t_src_scalar(vp, &src[0]); + o_inst->src[1] = t_src_scalar(vp, &src[1]); + o_inst->src[2] = t_src_scalar(vp, &src[2]); break; - default: - fprintf(stderr, "scalars and op RCC not handled yet"); - exit(-1); + default: + fprintf(stderr, + "scalars and op RCC not handled yet"); + _mesa_exit(-1); break; } - }else{ - switch(operands){ - case 1: - o_inst->src1=t_src(vp, &src[0]); - o_inst->src2=ZERO_SRC_0; - o_inst->src3=ZERO_SRC_0; + } else { + switch (operands) { + case 1: + o_inst->src[0] = t_src(vp, &src[0]); + o_inst->src[1] = ZERO_SRC_0; + o_inst->src[2] = ZERO_SRC_0; break; - case 2: - o_inst->src1=t_src(vp, &src[0]); - o_inst->src2=t_src(vp, &src[1]); - o_inst->src3=ZERO_SRC_1; + case 2: + o_inst->src[0] = t_src(vp, &src[0]); + o_inst->src[1] = t_src(vp, &src[1]); + o_inst->src[2] = ZERO_SRC_1; break; - case 3: - o_inst->src1=t_src(vp, &src[0]); - o_inst->src2=t_src(vp, &src[1]); - o_inst->src3=t_src(vp, &src[2]); + case 3: + o_inst->src[0] = t_src(vp, &src[0]); + o_inst->src[1] = t_src(vp, &src[1]); + o_inst->src[2] = t_src(vp, &src[2]); break; - default: - fprintf(stderr, "scalars and op RCC not handled yet"); - exit(-1); + default: + fprintf(stderr, + "scalars and op RCC not handled yet"); + _mesa_exit(-1); break; } } - next: ; + next:; } /* Will most likely segfault before we get here... fix later. */ - if(o_inst - vp->program.body.i >= VSF_MAX_FRAGMENT_LENGTH/4) { + if (o_inst - vp->program.body.i >= VSF_MAX_FRAGMENT_LENGTH / 4) { vp->program.length = 0; vp->native = GL_FALSE; - return ; + return; } - vp->program.length=(o_inst - vp->program.body.i) * 4; + vp->program.length = (o_inst - vp->program.body.i) * 4; #if 0 fprintf(stderr, "hw program:\n"); - for(i=0; i < vp->program.length; i++) + for (i = 0; i < vp->program.length; i++) fprintf(stderr, "%08x\n", vp->program.body.d[i]); #endif } @@ -883,19 +1067,20 @@ static void position_invariant(struct gl_program *prog) gl_state_index tokens[STATE_LENGTH] = { STATE_MVP_MATRIX, 0, 0, 0, 0 }; + /* tokens[4] = matrix modifier */ #ifdef PREFER_DP4 - tokens[5] = STATE_MATRIX; + tokens[4] = 0; /* not transposed or inverted */ #else - tokens[5] = STATE_MATRIX_TRANSPOSE; + tokens[4] = STATE_MATRIX_TRANSPOSE; #endif paramList = prog->Parameters; - vpi = _mesa_alloc_instructions (prog->NumInstructions + 4); - _mesa_init_instructions (vpi, prog->NumInstructions + 4); + vpi = _mesa_alloc_instructions(prog->NumInstructions + 4); + _mesa_init_instructions(vpi, prog->NumInstructions + 4); - for (i=0; i < 4; i++) { + for (i = 0; i < 4; i++) { GLint idx; - tokens[3] = tokens[4] = i; + tokens[2] = tokens[3] = i; /* matrix row[i]..row[i] */ idx = _mesa_add_state_reference(paramList, tokens); #ifdef PREFER_DP4 vpi[i].Opcode = OPCODE_DP4; @@ -947,34 +1132,35 @@ static void position_invariant(struct gl_program *prog) #endif } - _mesa_copy_instructions (&vpi[i], prog->Instructions, prog->NumInstructions); + _mesa_copy_instructions(&vpi[i], prog->Instructions, + prog->NumInstructions); free(prog->Instructions); prog->Instructions = vpi; prog->NumInstructions += 4; - vpi = &prog->Instructions[prog->NumInstructions-1]; + vpi = &prog->Instructions[prog->NumInstructions - 1]; assert(vpi->Opcode == OPCODE_END); } static void insert_wpos(struct r300_vertex_program *vp, - struct gl_program *prog, - GLuint temp_index) + struct gl_program *prog, GLuint temp_index) { struct prog_instruction *vpi; struct prog_instruction *vpi_insert; int i = 0; - vpi = _mesa_alloc_instructions (prog->NumInstructions + 2); - _mesa_init_instructions (vpi, prog->NumInstructions + 2); + vpi = _mesa_alloc_instructions(prog->NumInstructions + 2); + _mesa_init_instructions(vpi, prog->NumInstructions + 2); /* all but END */ - _mesa_copy_instructions (vpi, prog->Instructions, prog->NumInstructions - 1); + _mesa_copy_instructions(vpi, prog->Instructions, + prog->NumInstructions - 1); /* END */ - _mesa_copy_instructions (&vpi[prog->NumInstructions + 1], - &prog->Instructions[prog->NumInstructions - 1], - 1); + _mesa_copy_instructions(&vpi[prog->NumInstructions + 1], + &prog->Instructions[prog->NumInstructions - 1], + 1); vpi_insert = &vpi[prog->NumInstructions - 1]; vpi_insert[i].Opcode = OPCODE_MOV; @@ -992,7 +1178,7 @@ static void insert_wpos(struct r300_vertex_program *vp, vpi_insert[i].Opcode = OPCODE_MOV; vpi_insert[i].DstReg.File = PROGRAM_OUTPUT; - vpi_insert[i].DstReg.Index = VERT_RESULT_TEX0+vp->wpos_idx; + vpi_insert[i].DstReg.Index = VERT_RESULT_TEX0 + vp->wpos_idx; vpi_insert[i].DstReg.WriteMask = WRITEMASK_XYZW; vpi_insert[i].DstReg.CondMask = COND_TR; @@ -1006,7 +1192,7 @@ static void insert_wpos(struct r300_vertex_program *vp, prog->Instructions = vpi; prog->NumInstructions += i; - vpi = &prog->Instructions[prog->NumInstructions-1]; + vpi = &prog->Instructions[prog->NumInstructions - 1]; assert(vpi->Opcode == OPCODE_END); } @@ -1019,9 +1205,9 @@ static void pos_as_texcoord(struct r300_vertex_program *vp, /* should do something else if no temps left... */ prog->NumTemporaries++; - for(vpi = prog->Instructions; vpi->Opcode != OPCODE_END; vpi++){ - if( vpi->DstReg.File == PROGRAM_OUTPUT && - vpi->DstReg.Index == VERT_RESULT_HPOS ){ + for (vpi = prog->Instructions; vpi->Opcode != OPCODE_END; vpi++) { + if (vpi->DstReg.File == PROGRAM_OUTPUT && + vpi->DstReg.Index == VERT_RESULT_HPOS) { vpi->DstReg.File = PROGRAM_TEMPORARY; vpi->DstReg.Index = tempregi; } @@ -1029,9 +1215,9 @@ static void pos_as_texcoord(struct r300_vertex_program *vp, insert_wpos(vp, prog, tempregi); } -static struct r300_vertex_program *build_program(struct r300_vertex_program_key *wanted_key, - struct gl_vertex_program *mesa_vp, - GLint wpos_idx) +static struct r300_vertex_program *build_program(struct r300_vertex_program_key + *wanted_key, struct gl_vertex_program + *mesa_vp, GLint wpos_idx) { struct r300_vertex_program *vp; @@ -1040,23 +1226,23 @@ static struct r300_vertex_program *build_program(struct r300_vertex_program_key vp->wpos_idx = wpos_idx; - if(mesa_vp->IsPositionInvariant) { + if (mesa_vp->IsPositionInvariant) { position_invariant(&mesa_vp->Base); } - if(wpos_idx > -1) + if (wpos_idx > -1) pos_as_texcoord(vp, &mesa_vp->Base); assert(mesa_vp->Base.NumInstructions); - vp->num_temporaries=mesa_vp->Base.NumTemporaries; + vp->num_temporaries = mesa_vp->Base.NumTemporaries; - r300_translate_vertex_shader(vp, mesa_vp->Base.Instructions); + r300TranslateVertexShader(vp, mesa_vp->Base.Instructions); return vp; } -void r300_select_vertex_shader(r300ContextPtr r300) +void r300SelectVertexShader(r300ContextPtr r300) { GLcontext *ctx = ctx = r300->radeon.glCtx; GLuint InputsRead; @@ -1072,14 +1258,14 @@ void r300_select_vertex_shader(r300ContextPtr r300) wanted_key.OutputsWritten |= 1 << VERT_RESULT_HPOS; wpos_idx = -1; - if (InputsRead & FRAG_BIT_WPOS){ + if (InputsRead & FRAG_BIT_WPOS) { for (i = 0; i < ctx->Const.MaxTextureUnits; i++) if (!(InputsRead & (FRAG_BIT_TEX0 << i))) break; - if(i == ctx->Const.MaxTextureUnits){ + if (i == ctx->Const.MaxTextureUnits) { fprintf(stderr, "\tno free texcoord found\n"); - exit(0); + _mesa_exit(-1); } InputsRead |= (FRAG_BIT_TEX0 << i); @@ -1089,26 +1275,27 @@ void r300_select_vertex_shader(r300ContextPtr r300) if (InputsRead & FRAG_BIT_COL0) wanted_key.OutputsWritten |= 1 << VERT_RESULT_COL0; - if ((InputsRead & FRAG_BIT_COL1) /*|| - (InputsRead & FRAG_BIT_FOGC)*/) + if ((InputsRead & FRAG_BIT_COL1) /*|| + (InputsRead & FRAG_BIT_FOGC) */ ) wanted_key.OutputsWritten |= 1 << VERT_RESULT_COL1; for (i = 0; i < ctx->Const.MaxTextureUnits; i++) if (InputsRead & (FRAG_BIT_TEX0 << i)) - wanted_key.OutputsWritten |= 1 << (VERT_RESULT_TEX0 + i); + wanted_key.OutputsWritten |= + 1 << (VERT_RESULT_TEX0 + i); wanted_key.InputsRead = vpc->mesa_program.Base.InputsRead; - if(vpc->mesa_program.IsPositionInvariant) { + if (vpc->mesa_program.IsPositionInvariant) { /* we wan't position don't we ? */ wanted_key.InputsRead |= (1 << VERT_ATTRIB_POS); } for (vp = vpc->progs; vp; vp = vp->next) - if (_mesa_memcmp(&vp->key, &wanted_key, sizeof(wanted_key)) == 0) { + if (_mesa_memcmp(&vp->key, &wanted_key, sizeof(wanted_key)) == + 0) { r300->selected_vp = vp; - return ; + return; } - //_mesa_print_program(&vpc->mesa_program.Base); vp = build_program(&wanted_key, &vpc->mesa_program, wpos_idx); diff --git a/src/mesa/drivers/dri/r300/vertex_shader.h b/src/mesa/drivers/dri/r300/r300_vertprog.h index f8267b7a2f..252d5a901f 100644 --- a/src/mesa/drivers/dri/r300/vertex_shader.h +++ b/src/mesa/drivers/dri/r300/r300_vertprog.h @@ -1,14 +1,12 @@ -#ifndef __VERTEX_SHADER_H__ -#define __VERTEX_SHADER_H__ +#ifndef __R300_VERTPROG_H_ +#define __R300_VERTPROG_H_ #include "r300_reg.h" typedef struct { - CARD32 op; - CARD32 src1; - CARD32 src2; - CARD32 src3; - } VERTEX_SHADER_INSTRUCTION; + GLuint op; + GLuint src[3]; +} VERTEX_SHADER_INSTRUCTION; #define VSF_FLAG_X 1 #define VSF_FLAG_Y 2 @@ -22,8 +20,7 @@ typedef struct { #define VSF_OUT_CLASS_ADDR 1 #define VSF_OUT_CLASS_RESULT 2 - -/* first CARD32 of an instruction */ +/* first DWORD of an instruction */ /* possible operations: DOT, MUL, ADD, MAD, FRC, MAX, MIN, SGE, SLT, EXP, LOG, LIT, POW, RCP, RSQ, EX2, @@ -38,7 +35,7 @@ typedef struct { #define EASY_VSF_OP(op, out_reg_index, out_reg_fields, class) \ MAKE_VSF_OP(R300_VPI_OUT_OP_##op, out_reg_index, VSF_FLAG_##out_reg_fields, VSF_OUT_CLASS_##class) \ -/* according to Nikolai, the subsequent 3 CARD32 are sources, use same define for each */ +/* according to Nikolai, the subsequent 3 DWORDs are sources, use same define for each */ #define VSF_IN_CLASS_TMP 0 #define VSF_IN_CLASS_ATTR 1 @@ -59,7 +56,7 @@ typedef struct { | ((comp_z)<<R300_VPI_IN_Z_SHIFT) \ | ((comp_w)<<R300_VPI_IN_W_SHIFT) \ | ((negate)<<25) | ((class))) - + #define EASY_VSF_SOURCE(in_reg_index, comp_x, comp_y, comp_z, comp_w, class, negate) \ MAKE_VSF_SOURCE(in_reg_index, \ VSF_IN_COMPONENT_##comp_x, \ @@ -71,8 +68,8 @@ typedef struct { /* special sources: */ /* (1.0,1.0,1.0,1.0) vector (ATTR, plain ) */ -#define VSF_ATTR_UNITY(reg) EASY_VSF_SOURCE(reg, ONE, ONE, ONE, ONE, ATTR, NONE) -#define VSF_UNITY(reg) EASY_VSF_SOURCE(reg, ONE, ONE, ONE, ONE, NONE, NONE) +#define VSF_ATTR_UNITY(reg) EASY_VSF_SOURCE(reg, ONE, ONE, ONE, ONE, ATTR, NONE) +#define VSF_UNITY(reg) EASY_VSF_SOURCE(reg, ONE, ONE, ONE, ONE, NONE, NONE) /* contents of unmodified register */ #define VSF_REG(reg) EASY_VSF_SOURCE(reg, X, Y, Z, W, ATTR, NONE) diff --git a/src/mesa/drivers/dri/r300/radeon_context.c b/src/mesa/drivers/dri/r300/radeon_context.c index 22f943ebf3..e9634b427a 100644 --- a/src/mesa/drivers/dri/r300/radeon_context.c +++ b/src/mesa/drivers/dri/r300/radeon_context.c @@ -90,9 +90,15 @@ static const GLubyte *radeonGetString(GLcontext * ctx, GLenum name) offset = driGetRendererString(buffer, chipname, DRIVER_DATE, agp_mode); + if (IS_R300_CLASS(radeon->radeonScreen)) { sprintf(&buffer[offset], " %sTCL", + (radeon->radeonScreen->chip_flags & RADEON_CHIPSET_TCL) + ? "" : "NO-"); + } else { + sprintf(&buffer[offset], " %sTCL", !(radeon->TclFallback & RADEON_TCL_FALLBACK_TCL_DISABLE) ? "" : "NO-"); + } return (GLubyte *) buffer; } @@ -283,7 +289,6 @@ GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv, radeon->dri.drawable = driDrawPriv; radeonSetCliprects(radeon); - r300UpdateWindow(radeon->glCtx); r300UpdateViewportOffset(radeon->glCtx); } @@ -293,12 +298,9 @@ GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv, (GLframebuffer *) driReadPriv-> driverPrivate); - if (!radeon->glCtx->Viewport.Width) { - _mesa_set_viewport(radeon->glCtx, 0, 0, - driDrawPriv->w, driDrawPriv->h); - } - _mesa_update_state(radeon->glCtx); + + radeonUpdatePageFlipping(radeon); } else { if (RADEON_DEBUG & DEBUG_DRI) fprintf(stderr, "%s ctx is null\n", __FUNCTION__); diff --git a/src/mesa/drivers/dri/r300/radeon_context.h b/src/mesa/drivers/dri/r300/radeon_context.h index 07a0c7cbd6..2f239417a9 100644 --- a/src/mesa/drivers/dri/r300/radeon_context.h +++ b/src/mesa/drivers/dri/r300/radeon_context.h @@ -1,10 +1,15 @@ -/* +/************************************************************************** + +Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and + VA Linux Systems Inc., Fremont, California. Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. The Weather Channel (TM) funded Tungsten Graphics to develop the initial release of the Radeon 8500 driver under the XFree86 license. This notice must be preserved. +All Rights Reserved. + Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including @@ -29,7 +34,9 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. /* * Authors: + * Gareth Hughes <gareth@valinux.com> * Keith Whitwell <keith@tungstengraphics.com> + * Kevin E. Martin <martin@valinux.com> * Nicolai Haehnle <prefect_@gmx.net> */ @@ -44,20 +51,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. struct radeon_context; typedef struct radeon_context radeonContextRec; -typedef struct radeon_context* radeonContextPtr; - -static __inline GLuint radeonPackColor(GLuint cpp, - GLubyte r, GLubyte g, GLubyte b, GLubyte a) -{ - switch (cpp) { - case 2: - return PACK_COLOR_565(r, g, b); - case 4: - return PACK_COLOR_8888(a, r, g, b); - default: - return 0; - } -} +typedef struct radeon_context *radeonContextPtr; #define TEX_0 0x1 #define TEX_1 0x2 @@ -69,17 +63,16 @@ static __inline GLuint radeonPackColor(GLuint cpp, #define TEX_7 0x80 #define TEX_ALL 0xff - /* Rasterizing fallbacks */ /* See correponding strings in r200_swtcl.c */ -#define RADEON_FALLBACK_TEXTURE 0x01 -#define RADEON_FALLBACK_DRAW_BUFFER 0x02 -#define RADEON_FALLBACK_STENCIL 0x04 -#define RADEON_FALLBACK_RENDER_MODE 0x08 -#define RADEON_FALLBACK_BLEND_EQ 0x10 -#define RADEON_FALLBACK_BLEND_FUNC 0x20 -#define RADEON_FALLBACK_DISABLE 0x40 -#define RADEON_FALLBACK_BORDER_MODE 0x80 +#define RADEON_FALLBACK_TEXTURE 0x0001 +#define RADEON_FALLBACK_DRAW_BUFFER 0x0002 +#define RADEON_FALLBACK_STENCIL 0x0004 +#define RADEON_FALLBACK_RENDER_MODE 0x0008 +#define RADEON_FALLBACK_BLEND_EQ 0x0010 +#define RADEON_FALLBACK_BLEND_FUNC 0x0020 +#define RADEON_FALLBACK_DISABLE 0x0040 +#define RADEON_FALLBACK_BORDER_MODE 0x0080 #if R200_MERGED extern void radeonFallback(GLcontext * ctx, GLuint bit, GLboolean mode); @@ -116,19 +109,18 @@ extern void radeonTclFallback(GLcontext * ctx, GLuint bit, GLboolean mode); #define TCL_FALLBACK( ctx, bit, mode ) ; #endif - struct radeon_dri_mirror { __DRIcontextPrivate *context; /* DRI context */ __DRIscreenPrivate *screen; /* DRI screen */ /** * DRI drawable bound to this context for drawing. */ - __DRIdrawablePrivate *drawable; + __DRIdrawablePrivate *drawable; /** * DRI drawable bound to this context for reading. */ - __DRIdrawablePrivate *readable; + __DRIdrawablePrivate *readable; drm_context_t hwContext; drm_hw_lock_t *hwLock; @@ -164,7 +156,7 @@ struct radeon_state { * structure. */ struct radeon_context { - GLcontext *glCtx; /* Mesa context */ + GLcontext *glCtx; /* Mesa context */ radeonScreenPtr radeonScreen; /* Screen private DRI data */ /* Fallback state */ @@ -200,7 +192,6 @@ struct radeon_context { GLuint swap_count; GLuint swap_missed_count; - /* Derived state */ struct radeon_state state; @@ -215,7 +206,7 @@ extern void radeonSwapBuffers(__DRIdrawablePrivate * dPriv); extern void radeonCopySubBuffer(__DRIdrawablePrivate * dPriv, int x, int y, int w, int h); extern GLboolean radeonInitContext(radeonContextPtr radeon, - struct dd_function_table* functions, + struct dd_function_table *functions, const __GLcontextModes * glVisual, __DRIcontextPrivate * driContextPriv, void *sharedContextPrivate); @@ -252,4 +243,4 @@ extern int RADEON_DEBUG; #define DEBUG_PIXEL 0x2000 #define DEBUG_MEMORY 0x4000 -#endif /* __RADEON_CONTEXT_H__ */ +#endif /* __RADEON_CONTEXT_H__ */ diff --git a/src/mesa/drivers/dri/r300/radeon_lock.c b/src/mesa/drivers/dri/r300/radeon_lock.c index ec501c3dc0..bc3c2d6c6b 100644 --- a/src/mesa/drivers/dri/r300/radeon_lock.c +++ b/src/mesa/drivers/dri/r300/radeon_lock.c @@ -1,10 +1,15 @@ -/* +/************************************************************************** + +Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and + VA Linux Systems Inc., Fremont, California. Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. The Weather Channel (TM) funded Tungsten Graphics to develop the initial release of the Radeon 8500 driver under the XFree86 license. This notice must be preserved. +All Rights Reserved. + Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including @@ -29,9 +34,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. /* * Authors: + * Gareth Hughes <gareth@valinux.com> * Keith Whitwell <keith@tungstengraphics.com> + * Kevin E. Martin <martin@valinux.com> */ -#include <string.h> #include "radeon_lock.h" #include "radeon_ioctl.h" @@ -50,54 +56,31 @@ int prevLockLine = 0; /* Turn on/off page flipping according to the flags in the sarea: */ -static void radeonUpdatePageFlipping(radeonContextPtr radeon) +void radeonUpdatePageFlipping(radeonContextPtr rmesa) { int use_back; - radeon->doPageFlip = radeon->sarea->pfState; - if (radeon->glCtx->WinSysDrawBuffer) { - driFlipRenderbuffers(radeon->glCtx->WinSysDrawBuffer, radeon->sarea->pfCurrentPage); - } + rmesa->doPageFlip = rmesa->sarea->pfState; + if (rmesa->glCtx->WinSysDrawBuffer) { + driFlipRenderbuffers(rmesa->glCtx->WinSysDrawBuffer, + rmesa->sarea->pfCurrentPage); + r300UpdateDrawBuffer(rmesa->glCtx); + } - use_back = (radeon->glCtx->DrawBuffer->_ColorDrawBufferMask[0] == BUFFER_BIT_BACK_LEFT); - use_back ^= (radeon->sarea->pfCurrentPage == 1); + use_back = rmesa->glCtx->DrawBuffer ? + (rmesa->glCtx->DrawBuffer->_ColorDrawBufferMask[0] == + BUFFER_BIT_BACK_LEFT) : 1; + use_back ^= (rmesa->sarea->pfCurrentPage == 1); if (use_back) { - radeon->state.color.drawOffset = radeon->radeonScreen->backOffset; - radeon->state.color.drawPitch = radeon->radeonScreen->backPitch; + rmesa->state.color.drawOffset = + rmesa->radeonScreen->backOffset; + rmesa->state.color.drawPitch = rmesa->radeonScreen->backPitch; } else { - radeon->state.color.drawOffset = radeon->radeonScreen->frontOffset; - radeon->state.color.drawPitch = radeon->radeonScreen->frontPitch; - } -} - -/** - * Called by radeonGetLock() after the lock has been obtained. - */ -static void r300RegainedLock(radeonContextPtr radeon) -{ - int i; - __DRIdrawablePrivate *const drawable = radeon->dri.drawable; - r300ContextPtr r300 = (r300ContextPtr)radeon; - drm_radeon_sarea_t *sarea = radeon->sarea; - - if ( radeon->lastStamp != drawable->lastStamp ) { - radeonUpdatePageFlipping(radeon); - radeonSetCliprects(radeon); -#if 1 - r300UpdateViewportOffset( radeon->glCtx ); - driUpdateFramebufferSize(radeon->glCtx, drawable); -#else - radeonUpdateScissor(radeon->glCtx); -#endif - } - - if (sarea->ctx_owner != radeon->dri.hwContext) { - sarea->ctx_owner = radeon->dri.hwContext; - - for (i = 0; i < r300->nr_heaps; i++) { - DRI_AGE_TEXTURES(r300->texture_heaps[i]); - } + rmesa->state.color.drawOffset = + rmesa->radeonScreen->frontOffset; + rmesa->state.color.drawPitch = + rmesa->radeonScreen->frontPitch; } } @@ -109,15 +92,17 @@ static void r300RegainedLock(radeonContextPtr radeon) * the hardware lock when it changes the window state, this routine will * automatically be called after such a change. */ -void radeonGetLock(radeonContextPtr radeon, GLuint flags) +void radeonGetLock(radeonContextPtr rmesa, GLuint flags) { - __DRIdrawablePrivate *const drawable = radeon->dri.drawable; - __DRIdrawablePrivate *const readable = radeon->dri.readable; - __DRIscreenPrivate *sPriv = radeon->dri.screen; - - assert (drawable != NULL); + __DRIdrawablePrivate *const drawable = rmesa->dri.drawable; + __DRIdrawablePrivate *const readable = rmesa->dri.readable; + __DRIscreenPrivate *sPriv = rmesa->dri.screen; + drm_radeon_sarea_t *sarea = rmesa->sarea; + r300ContextPtr r300 = (r300ContextPtr) rmesa; - drmGetLock(radeon->dri.fd, radeon->dri.hwContext, flags); + assert(drawable != NULL); + + drmGetLock(rmesa->dri.fd, rmesa->dri.hwContext, flags); /* The window might have moved, so we might need to get new clip * rects. @@ -127,13 +112,26 @@ void radeonGetLock(radeonContextPtr radeon, GLuint flags) * Since the hardware state depends on having the latest drawable * clip rects, all state checking must be done _after_ this call. */ - DRI_VALIDATE_DRAWABLE_INFO( sPriv, drawable ); + DRI_VALIDATE_DRAWABLE_INFO(sPriv, drawable); if (drawable != readable) { - DRI_VALIDATE_DRAWABLE_INFO( sPriv, readable ); + DRI_VALIDATE_DRAWABLE_INFO(sPriv, readable); + } + + if (rmesa->lastStamp != drawable->lastStamp) { + radeonUpdatePageFlipping(rmesa); + radeonSetCliprects(rmesa); + r300UpdateViewportOffset(rmesa->glCtx); + driUpdateFramebufferSize(rmesa->glCtx, drawable); + } + + if (sarea->ctx_owner != rmesa->dri.hwContext) { + int i; + + sarea->ctx_owner = rmesa->dri.hwContext; + for (i = 0; i < r300->nr_heaps; i++) { + DRI_AGE_TEXTURES(r300->texture_heaps[i]); + } } - if (IS_R300_CLASS(radeon->radeonScreen)) - r300RegainedLock(radeon); - - radeon->lost_context = GL_TRUE; + rmesa->lost_context = GL_TRUE; } diff --git a/src/mesa/drivers/dri/r300/radeon_lock.h b/src/mesa/drivers/dri/r300/radeon_lock.h index 632329fde1..a344837f47 100644 --- a/src/mesa/drivers/dri/r300/radeon_lock.h +++ b/src/mesa/drivers/dri/r300/radeon_lock.h @@ -1,10 +1,15 @@ -/* +/************************************************************************** + +Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and + VA Linux Systems Inc., Fremont, California. Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. The Weather Channel (TM) funded Tungsten Graphics to develop the initial release of the Radeon 8500 driver under the XFree86 license. This notice must be preserved. +All Rights Reserved. + Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including @@ -29,18 +34,18 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. /* * Authors: + * Gareth Hughes <gareth@valinux.com> * Keith Whitwell <keith@tungstengraphics.com> + * Kevin E. Martin <martin@valinux.com> */ #ifndef __RADEON_LOCK_H__ #define __RADEON_LOCK_H__ -#if 0 -#include "r200_ioctl.h" -#endif #include "radeon_context.h" -extern void radeonGetLock(radeonContextPtr radeon, GLuint flags); +extern void radeonGetLock(radeonContextPtr rmesa, GLuint flags); +extern void radeonUpdatePageFlipping(radeonContextPtr rmesa); /* Turn DEBUG_LOCKING on to find locking conflicts. */ @@ -64,11 +69,11 @@ extern int prevLockLine; #define DEBUG_CHECK_LOCK() \ do { \ - if ( prevLockFile ) { \ - fprintf( stderr, \ + if (prevLockFile) { \ + fprintf(stderr, \ "LOCK SET!\n\tPrevious %s:%d\n\tCurrent: %s:%d\n", \ - prevLockFile, prevLockLine, __FILE__, __LINE__ ); \ - exit( 1 ); \ + prevLockFile, prevLockLine, __FILE__, __LINE__); \ + exit(1); \ } \ } while (0) @@ -88,38 +93,23 @@ extern int prevLockLine; /* Lock the hardware and validate our state. */ -#define LOCK_HARDWARE( radeon ) \ +#define LOCK_HARDWARE( rmesa ) \ do { \ char __ret = 0; \ DEBUG_CHECK_LOCK(); \ - DRM_CAS( (radeon)->dri.hwLock, (radeon)->dri.hwContext, \ - (DRM_LOCK_HELD | (radeon)->dri.hwContext), __ret ); \ - if ( __ret ) \ - radeonGetLock( (radeon), 0 ); \ + DRM_CAS((rmesa)->dri.hwLock, (rmesa)->dri.hwContext, \ + (DRM_LOCK_HELD | (rmesa)->dri.hwContext), __ret); \ + if (__ret) \ + radeonGetLock((rmesa), 0); \ DEBUG_LOCK(); \ } while (0) -#if R200_MERGED -#define UNLOCK_HARDWARE( radeon ) \ - do { \ - DRM_UNLOCK( (radeon)->dri.fd, \ - (radeon)->dri.hwLock, \ - (radeon)->dri.hwContext ); \ - DEBUG_RESET(); \ - if (IS_R200_CLASS(radeon->radeonScreen)) { \ - r200ContextPtr __r200 = (r200ContextPtr)(radeon); \ - if (__r200->save_on_next_unlock) \ - r200SaveHwState( __r200 ); \ - __r200->save_on_next_unlock = GL_FALSE; \ - } \ - } while (0) -#else -#define UNLOCK_HARDWARE( radeon ) \ +#define UNLOCK_HARDWARE( rmesa ) \ do { \ - DRM_UNLOCK( (radeon)->dri.fd, \ - (radeon)->dri.hwLock, \ - (radeon)->dri.hwContext ); \ + DRM_UNLOCK((rmesa)->dri.fd, \ + (rmesa)->dri.hwLock, \ + (rmesa)->dri.hwContext); \ DEBUG_RESET(); \ } while (0) -#endif + #endif /* __RADEON_LOCK_H__ */ diff --git a/src/mesa/drivers/dri/r300/radeon_mm.c b/src/mesa/drivers/dri/r300/radeon_mm.c deleted file mode 100644 index 1502dac8fc..0000000000 --- a/src/mesa/drivers/dri/r300/radeon_mm.c +++ /dev/null @@ -1,492 +0,0 @@ -/* - * Copyright (C) 2005 Aapo Tahkola. - * - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial - * portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE - * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION - * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - */ - -/* - * Authors: - * Aapo Tahkola <aet@rasterburn.org> - */ -#include <unistd.h> - -#include "r300_context.h" -#include "r300_cmdbuf.h" -#include "r300_ioctl.h" -#include "radeon_mm.h" -#include "radeon_ioctl.h" - -#ifdef USER_BUFFERS - -static void resize_u_list(r300ContextPtr rmesa) -{ - void *temp; - int nsize; - - temp = rmesa->rmm->u_list; - nsize = rmesa->rmm->u_size * 2; - - rmesa->rmm->u_list = _mesa_malloc(nsize * sizeof(*rmesa->rmm->u_list)); - _mesa_memset(rmesa->rmm->u_list, 0, nsize * sizeof(*rmesa->rmm->u_list)); - - if (temp) { - r300FlushCmdBuf(rmesa, __FUNCTION__); - - _mesa_memcpy(rmesa->rmm->u_list, temp, rmesa->rmm->u_size * sizeof(*rmesa->rmm->u_list)); - _mesa_free(temp); - } - - rmesa->rmm->u_size = nsize; -} - -void radeon_mm_init(r300ContextPtr rmesa) -{ - rmesa->rmm = malloc(sizeof(struct radeon_memory_manager)); - memset(rmesa->rmm, 0, sizeof(struct radeon_memory_manager)); - - rmesa->rmm->u_size = 128; - resize_u_list(rmesa); -} - -void radeon_mm_destroy(r300ContextPtr rmesa) -{ - _mesa_free(rmesa->rmm->u_list); - rmesa->rmm->u_list = NULL; - - _mesa_free(rmesa->rmm); - rmesa->rmm = NULL; -} - -void *radeon_mm_ptr(r300ContextPtr rmesa, int id) -{ - assert(id <= rmesa->rmm->u_last); - return rmesa->rmm->u_list[id].ptr; -} - -int radeon_mm_find(r300ContextPtr rmesa, void *ptr) -{ - int i; - - for (i=1; i < rmesa->rmm->u_size+1; i++) - if(rmesa->rmm->u_list[i].ptr && - ptr >= rmesa->rmm->u_list[i].ptr && - ptr < rmesa->rmm->u_list[i].ptr + rmesa->rmm->u_list[i].size) - break; - - if (i < rmesa->rmm->u_size + 1) - return i; - - fprintf(stderr, "%p failed\n", ptr); - return 0; -} - -//#define MM_DEBUG -int radeon_mm_alloc(r300ContextPtr rmesa, int alignment, int size) -{ - drm_radeon_mem_alloc_t alloc; - int offset = 0, ret; - int i, free=-1; - int done_age; - drm_radeon_mem_free_t memfree; - int tries=0; - static int bytes_wasted=0, allocated=0; - - if(size < 4096) - bytes_wasted += 4096 - size; - - allocated += size; - -#if 0 - static int t=0; - if (t != time(NULL)) { - t = time(NULL); - fprintf(stderr, "slots used %d, wasted %d kb, allocated %d\n", rmesa->rmm->u_last, bytes_wasted/1024, allocated/1024); - } -#endif - - memfree.region = RADEON_MEM_REGION_GART; - - again: - - done_age = radeonGetAge((radeonContextPtr)rmesa); - - if (rmesa->rmm->u_last + 1 >= rmesa->rmm->u_size) - resize_u_list(rmesa); - - for (i = rmesa->rmm->u_last + 1; i > 0; i --) { - if (rmesa->rmm->u_list[i].ptr == NULL) { - free = i; - continue; - } - - if (rmesa->rmm->u_list[i].h_pending == 0 && - rmesa->rmm->u_list[i].pending && rmesa->rmm->u_list[i].age <= done_age) { - memfree.region_offset = (char *)rmesa->rmm->u_list[i].ptr - - (char *)rmesa->radeon.radeonScreen->gartTextures.map; - - ret = drmCommandWrite(rmesa->radeon.radeonScreen->driScreen->fd, - DRM_RADEON_FREE, &memfree, sizeof(memfree)); - - if (ret) { - fprintf(stderr, "Failed to free at %p\n", rmesa->rmm->u_list[i].ptr); - fprintf(stderr, "ret = %s\n", strerror(-ret)); - exit(1); - } else { -#ifdef MM_DEBUG - fprintf(stderr, "really freed %d at age %x\n", i, radeonGetAge((radeonContextPtr)rmesa)); -#endif - if (i == rmesa->rmm->u_last) - rmesa->rmm->u_last --; - - if(rmesa->rmm->u_list[i].size < 4096) - bytes_wasted -= 4096 - rmesa->rmm->u_list[i].size; - - allocated -= rmesa->rmm->u_list[i].size; - rmesa->rmm->u_list[i].pending = 0; - rmesa->rmm->u_list[i].ptr = NULL; - - if (rmesa->rmm->u_list[i].fb) { - LOCK_HARDWARE(&(rmesa->radeon)); - ret = mmFreeMem(rmesa->rmm->u_list[i].fb); - UNLOCK_HARDWARE(&(rmesa->radeon)); - - if (ret != 0) - fprintf(stderr, "failed to free!\n"); - rmesa->rmm->u_list[i].fb = NULL; - } - rmesa->rmm->u_list[i].ref_count = 0; - free = i; - } - } - } - rmesa->rmm->u_head = i; - - if (free == -1) { - WARN_ONCE("Ran out of slots!\n"); - //usleep(100); - r300FlushCmdBuf(rmesa, __FUNCTION__); - tries++; - if(tries>100){ - WARN_ONCE("Ran out of slots!\n"); - exit(1); - } - goto again; - } - - alloc.region = RADEON_MEM_REGION_GART; - alloc.alignment = alignment; - alloc.size = size; - alloc.region_offset = &offset; - - ret = drmCommandWriteRead( rmesa->radeon.dri.fd, DRM_RADEON_ALLOC, &alloc, sizeof(alloc)); - if (ret) { -#if 0 - WARN_ONCE("Ran out of mem!\n"); - r300FlushCmdBuf(rmesa, __FUNCTION__); - //usleep(100); - tries2++; - tries = 0; - if(tries2>100){ - WARN_ONCE("Ran out of GART memory!\n"); - exit(1); - } - goto again; -#else - WARN_ONCE("Ran out of GART memory (for %d)!\nPlease consider adjusting GARTSize option.\n", size); - return 0; -#endif - } - - i = free; - - if (i > rmesa->rmm->u_last) - rmesa->rmm->u_last = i; - - rmesa->rmm->u_list[i].ptr = ((GLubyte *)rmesa->radeon.radeonScreen->gartTextures.map) + offset; - rmesa->rmm->u_list[i].size = size; - rmesa->rmm->u_list[i].age = 0; - rmesa->rmm->u_list[i].fb = NULL; - //fprintf(stderr, "alloc %p at id %d\n", rmesa->rmm->u_list[i].ptr, i); - -#ifdef MM_DEBUG - fprintf(stderr, "allocated %d at age %x\n", i, radeonGetAge((radeonContextPtr)rmesa)); -#endif - - return i; -} - -#include "r300_emit.h" -static void emit_lin_cp(r300ContextPtr rmesa, unsigned long dst, unsigned long src, unsigned long size) -{ - int cmd_reserved = 0; - int cmd_written = 0; - drm_radeon_cmd_header_t *cmd = NULL; - int cp_size; - - - while (size > 0){ - cp_size = size; - if(cp_size > /*8190*/4096) - cp_size = /*8190*/4096; - - reg_start(0x146c,1); - e32(0x52cc32fb); - - reg_start(0x15ac,1); - e32(src); - e32(cp_size); - - reg_start(0x1704,0); - e32(0x0); - - reg_start(0x1404,1); - e32(dst); - e32(cp_size); - - reg_start(0x1700,0); - e32(0x0); - - reg_start(0x1640,3); - e32(0x00000000); - e32(0x00001fff); - e32(0x00000000); - e32(0x00001fff); - - start_packet3(RADEON_CP_PACKET3_UNK1B, 2); - e32(0 << 16 | 0); - e32(0 << 16 | 0); - e32(cp_size << 16 | 0x1); - - dst += cp_size; - src += cp_size; - size -= cp_size; - } - - reg_start(R300_RB3D_DSTCACHE_CTLSTAT,0); - e32(R300_RB3D_DSTCACHE_UNKNOWN_0A); - - reg_start(0x342c,0); - e32(0x00000005); - - reg_start(0x1720,0); - e32(0x00010000); -} - -void radeon_mm_use(r300ContextPtr rmesa, int id) -{ - uint64_t ull; -#ifdef MM_DEBUG - fprintf(stderr, "%s: %d at age %x\n", __FUNCTION__, id, radeonGetAge((radeonContextPtr)rmesa)); -#endif - drm_r300_cmd_header_t *cmd; - - assert(id <= rmesa->rmm->u_last); - - if(id == 0) - return; - -#if 0 /* FB VBOs. Needs further changes... */ - rmesa->rmm->u_list[id].ref_count ++; - if (rmesa->rmm->u_list[id].ref_count > 100 && rmesa->rmm->u_list[id].fb == NULL && - rmesa->rmm->u_list[id].size != RADEON_BUFFER_SIZE*16 /*&& rmesa->rmm->u_list[id].size > 40*/) { - driTexHeap *heap; - struct mem_block *mb; - - LOCK_HARDWARE(&(rmesa->radeon)); - - heap = rmesa->texture_heaps[0]; - - mb = mmAllocMem(heap->memory_heap, rmesa->rmm->u_list[id].size, heap->alignmentShift, 0); - - UNLOCK_HARDWARE(&(rmesa->radeon)); - - if (mb) { - rmesa->rmm->u_list[id].fb = mb; - - emit_lin_cp(rmesa, rmesa->radeon.radeonScreen->texOffset[0] + rmesa->rmm->u_list[id].fb->ofs, - r300GartOffsetFromVirtual(rmesa, rmesa->rmm->u_list[id].ptr), - rmesa->rmm->u_list[id].size); - } else { - WARN_ONCE("Upload to fb failed, %d, %d\n", rmesa->rmm->u_list[id].size, id); - } - //fprintf(stderr, "Upload to fb! %d, %d\n", rmesa->rmm->u_list[id].ref_count, id); - } - /*if (rmesa->rmm->u_list[id].fb) { - emit_lin_cp(rmesa, rmesa->radeon.radeonScreen->texOffset[0] + rmesa->rmm->u_list[id].fb->ofs, - r300GartOffsetFromVirtual(rmesa, rmesa->rmm->u_list[id].ptr), - rmesa->rmm->u_list[id].size); - }*/ -#endif - - cmd = (drm_r300_cmd_header_t *)r300AllocCmdBuf(rmesa, 2 + sizeof(ull) / 4, __FUNCTION__); - cmd[0].scratch.cmd_type = R300_CMD_SCRATCH; - cmd[0].scratch.reg = RADEON_MM_SCRATCH; - cmd[0].scratch.n_bufs = 1; - cmd[0].scratch.flags = 0; - cmd ++; - - ull = (uint64_t)(intptr_t)&rmesa->rmm->u_list[id].age; - _mesa_memcpy(cmd, &ull, sizeof(ull)); - cmd += sizeof(ull) / 4; - - cmd[0].u = /*id*/0; - - LOCK_HARDWARE(&rmesa->radeon); /* Protect from DRM. */ - rmesa->rmm->u_list[id].h_pending ++; - UNLOCK_HARDWARE(&rmesa->radeon); -} - -unsigned long radeon_mm_offset(r300ContextPtr rmesa, int id) -{ - unsigned long offset; - - assert(id <= rmesa->rmm->u_last); - - if (rmesa->rmm->u_list[id].fb) { - offset = rmesa->radeon.radeonScreen->texOffset[0] + rmesa->rmm->u_list[id].fb->ofs; - } else { - offset = (char *)rmesa->rmm->u_list[id].ptr - - (char *)rmesa->radeon.radeonScreen->gartTextures.map; - offset += rmesa->radeon.radeonScreen->gart_texture_offset; - } - - return offset; -} - -int radeon_mm_on_card(r300ContextPtr rmesa, int id) -{ - assert(id <= rmesa->rmm->u_last); - - if (rmesa->rmm->u_list[id].fb) - return GL_TRUE; - - return GL_FALSE; -} - -void *radeon_mm_map(r300ContextPtr rmesa, int id, int access) -{ -#ifdef MM_DEBUG - fprintf(stderr, "%s: %d at age %x\n", __FUNCTION__, id, radeonGetAge((radeonContextPtr)rmesa)); -#endif - void *ptr; - int tries = 0; - - assert(id <= rmesa->rmm->u_last); - - rmesa->rmm->u_list[id].ref_count = 0; - if (rmesa->rmm->u_list[id].fb) { - WARN_ONCE("Mapping fb!\n"); - /* Idle gart only and do upload on unmap */ - //rmesa->rmm->u_list[id].fb = NULL; - - - if(rmesa->rmm->u_list[id].mapped == 1) - WARN_ONCE("buffer %d already mapped\n", id); - - rmesa->rmm->u_list[id].mapped = 1; - ptr = radeon_mm_ptr(rmesa, id); - - return ptr; - } - - if (access == RADEON_MM_R) { - - if(rmesa->rmm->u_list[id].mapped == 1) - WARN_ONCE("buffer %d already mapped\n", id); - - rmesa->rmm->u_list[id].mapped = 1; - ptr = radeon_mm_ptr(rmesa, id); - - return ptr; - } - - - if (rmesa->rmm->u_list[id].h_pending) - r300FlushCmdBuf(rmesa, __FUNCTION__); - - if (rmesa->rmm->u_list[id].h_pending) { - return NULL; - } - - while(rmesa->rmm->u_list[id].age > radeonGetAge((radeonContextPtr)rmesa) && tries++ < 1000) - usleep(10); - - if (tries >= 1000) { - fprintf(stderr, "Idling failed (%x vs %x)\n", - rmesa->rmm->u_list[id].age, radeonGetAge((radeonContextPtr)rmesa)); - return NULL; - } - - if(rmesa->rmm->u_list[id].mapped == 1) - WARN_ONCE("buffer %d already mapped\n", id); - - rmesa->rmm->u_list[id].mapped = 1; - ptr = radeon_mm_ptr(rmesa, id); - - return ptr; -} - -void radeon_mm_unmap(r300ContextPtr rmesa, int id) -{ -#ifdef MM_DEBUG - fprintf(stderr, "%s: %d at age %x\n", __FUNCTION__, id, radeonGetAge((radeonContextPtr)rmesa)); -#endif - - assert(id <= rmesa->rmm->u_last); - - if(rmesa->rmm->u_list[id].mapped == 0) - WARN_ONCE("buffer %d not mapped\n", id); - - rmesa->rmm->u_list[id].mapped = 0; - - if (rmesa->rmm->u_list[id].fb) - emit_lin_cp(rmesa, rmesa->radeon.radeonScreen->texOffset[0] + rmesa->rmm->u_list[id].fb->ofs, - r300GartOffsetFromVirtual(rmesa, rmesa->rmm->u_list[id].ptr), - rmesa->rmm->u_list[id].size); -} - -void radeon_mm_free(r300ContextPtr rmesa, int id) -{ -#ifdef MM_DEBUG - fprintf(stderr, "%s: %d at age %x\n", __FUNCTION__, id, radeonGetAge((radeonContextPtr)rmesa)); -#endif - - assert(id <= rmesa->rmm->u_last); - - if(id == 0) - return; - - if(rmesa->rmm->u_list[id].ptr == NULL){ - WARN_ONCE("Not allocated!\n"); - return ; - } - - if(rmesa->rmm->u_list[id].pending){ - WARN_ONCE("%p already pended!\n", rmesa->rmm->u_list[id].ptr); - return ; - } - - rmesa->rmm->u_list[id].pending = 1; -} -#endif diff --git a/src/mesa/drivers/dri/r300/radeon_mm.h b/src/mesa/drivers/dri/r300/radeon_mm.h deleted file mode 100644 index 81f89917e6..0000000000 --- a/src/mesa/drivers/dri/r300/radeon_mm.h +++ /dev/null @@ -1,40 +0,0 @@ -#ifndef __RADEON_MM_H__ -#define __RADEON_MM_H__ - -//#define RADEON_MM_PDL 0 -#define RADEON_MM_UL 1 - -#define RADEON_MM_R 1 -#define RADEON_MM_W 2 -#define RADEON_MM_RW (RADEON_MM_R | RADEON_MM_W) - -#define RADEON_MM_SCRATCH 2 - -struct radeon_memory_manager { - struct { - void *ptr; - uint32_t size; - uint32_t age; - uint32_t h_pending; - int pending; - int mapped; - int ref_count; - struct mem_block *fb; - } *u_list; - int u_head, u_tail, u_size, u_last; - -}; - -extern void radeon_mm_init(r300ContextPtr rmesa); -extern void radeon_mm_destroy(r300ContextPtr rmesa); -extern void *radeon_mm_ptr(r300ContextPtr rmesa, int id); -extern int radeon_mm_find(r300ContextPtr rmesa, void *ptr); -extern int radeon_mm_alloc(r300ContextPtr rmesa, int alignment, int size); -extern void radeon_mm_use(r300ContextPtr rmesa, int id); -extern unsigned long radeon_mm_offset(r300ContextPtr rmesa, int id); -extern int radeon_mm_on_card(r300ContextPtr rmesa, int id); -extern void *radeon_mm_map(r300ContextPtr rmesa, int id, int access); -extern void radeon_mm_unmap(r300ContextPtr rmesa, int id); -extern void radeon_mm_free(r300ContextPtr rmesa, int id); - -#endif diff --git a/src/mesa/drivers/dri/r300/radeon_span.c b/src/mesa/drivers/dri/r300/radeon_span.c index cc779d684f..eae09d6b35 100644 --- a/src/mesa/drivers/dri/r300/radeon_span.c +++ b/src/mesa/drivers/dri/r300/radeon_span.c @@ -39,9 +39,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * Keith Whitwell <keith@tungstengraphics.com> * */ -#include <unistd.h> + #include "glheader.h" -#include "imports.h" #include "swrast/swrast.h" #include "r300_state.h" @@ -51,10 +50,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "drirenderbuffer.h" - #define DBG 0 - /* * Note that all information needed to access pixels in a renderbuffer * should be obtained through the gl_renderbuffer parameter, not per-context @@ -85,8 +82,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define HW_UNLOCK() - - /* ================================================================ * Color buffer */ @@ -101,7 +96,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define GET_PTR(X,Y) (buf + ((Y) * drb->flippedPitch + (X)) * 2) #include "spantmp2.h" - /* 32 bit, ARGB8888 color spanline and pixel functions */ #define SPANTMP_PIXEL_FMT GL_BGRA @@ -112,7 +106,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define GET_PTR(X,Y) (buf + ((Y) * drb->flippedPitch + (X)) * 4) #include "spantmp2.h" - /* ================================================================ * Depth buffer */ @@ -127,59 +120,56 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * too... */ -static GLuint -radeon_mba_z32( const driRenderbuffer *drb, GLint x, GLint y ) +static GLuint radeon_mba_z32(const driRenderbuffer * drb, GLint x, GLint y) { - GLuint pitch = drb->pitch; - if (1 /*|| drb->depthHasSurface */) { - return 4 * (x + y * pitch); - } - else { - GLuint ba, address = 0; /* a[0..1] = 0 */ - - ba = (y / 8) * (pitch / 8) + (x / 8); - - address |= (x & 0x7) << 2; /* a[2..4] = x[0..2] */ - address |= (y & 0x3) << 5; /* a[5..6] = y[0..1] */ - address |= - (((x & 0x10) >> 2) ^ (y & 0x4)) << 5; /* a[7] = x[4] ^ y[2] */ - address |= (ba & 0x3) << 8; /* a[8..9] = ba[0..1] */ - - address |= (y & 0x8) << 7; /* a[10] = y[3] */ - address |= - (((x & 0x8) << 1) ^ (y & 0x10)) << 7; /* a[11] = x[3] ^ y[4] */ - address |= (ba & ~0x3) << 10; /* a[12..] = ba[2..] */ - - return address; - } + GLuint pitch = drb->pitch; + if (drb->depthHasSurface) { + return 4 * (x + y * pitch); + } else { + GLuint ba, address = 0; /* a[0..1] = 0 */ + +#ifdef COMPILE_R300 + ba = (y / 8) * (pitch / 8) + (x / 8); +#else + ba = (y / 16) * (pitch / 16) + (x / 16); +#endif + + address |= (x & 0x7) << 2; /* a[2..4] = x[0..2] */ + address |= (y & 0x3) << 5; /* a[5..6] = y[0..1] */ + address |= (((x & 0x10) >> 2) ^ (y & 0x4)) << 5; /* a[7] = x[4] ^ y[2] */ + address |= (ba & 0x3) << 8; /* a[8..9] = ba[0..1] */ + + address |= (y & 0x8) << 7; /* a[10] = y[3] */ + address |= (((x & 0x8) << 1) ^ (y & 0x10)) << 7; /* a[11] = x[3] ^ y[4] */ + address |= (ba & ~0x3) << 10; /* a[12..] = ba[2..] */ + + return address; + } } - static INLINE GLuint -radeon_mba_z16( const driRenderbuffer *drb, GLint x, GLint y ) +radeon_mba_z16(const driRenderbuffer * drb, GLint x, GLint y) { - GLuint pitch = drb->pitch; - if (1 /*|| drb->depthHasSurface */) { - return 2 * (x + y * pitch); - } - else { - GLuint ba, address = 0; /* a[0] = 0 */ - - ba = (y / 16) * (pitch / 32) + (x / 32); - - address |= (x & 0x7) << 1; /* a[1..3] = x[0..2] */ - address |= (y & 0x7) << 4; /* a[4..6] = y[0..2] */ - address |= (x & 0x8) << 4; /* a[7] = x[3] */ - address |= (ba & 0x3) << 8; /* a[8..9] = ba[0..1] */ - address |= (y & 0x8) << 7; /* a[10] = y[3] */ - address |= ((x & 0x10) ^ (y & 0x10)) << 7;/* a[11] = x[4] ^ y[4] */ - address |= (ba & ~0x3) << 10; /* a[12..] = ba[2..] */ - - return address; - } + GLuint pitch = drb->pitch; + if (drb->depthHasSurface) { + return 2 * (x + y * pitch); + } else { + GLuint ba, address = 0; /* a[0] = 0 */ + + ba = (y / 16) * (pitch / 32) + (x / 32); + + address |= (x & 0x7) << 1; /* a[1..3] = x[0..2] */ + address |= (y & 0x7) << 4; /* a[4..6] = y[0..2] */ + address |= (x & 0x8) << 4; /* a[7] = x[3] */ + address |= (ba & 0x3) << 8; /* a[8..9] = ba[0..1] */ + address |= (y & 0x8) << 7; /* a[10] = y[3] */ + address |= ((x & 0x10) ^ (y & 0x10)) << 7; /* a[11] = x[4] ^ y[4] */ + address |= (ba & ~0x3) << 10; /* a[12..] = ba[2..] */ + + return address; + } } - /* 16-bit depth buffer functions */ #define WRITE_DEPTH( _x, _y, d ) \ @@ -191,12 +181,12 @@ radeon_mba_z16( const driRenderbuffer *drb, GLint x, GLint y ) #define TAG(x) radeon##x##_z16 #include "depthtmp.h" - /* 24 bit depth, 8 bit stencil depthbuffer functions * * Careful: It looks like the R300 uses ZZZS byte order while the R200 * uses SZZZ for 24 bit depth, 8 bit stencil mode. */ +#ifdef COMPILE_R300 #define WRITE_DEPTH( _x, _y, d ) \ do { \ GLuint offset = radeon_mba_z32( drb, _x + xo, _y + yo ); \ @@ -205,23 +195,39 @@ do { \ tmp |= ((d << 8) & 0xffffff00); \ *(GLuint *)(buf + offset) = tmp; \ } while (0) +#else +#define WRITE_DEPTH( _x, _y, d ) \ +do { \ + GLuint offset = radeon_mba_z32( drb, _x + xo, _y + yo ); \ + GLuint tmp = *(GLuint *)(buf + offset); \ + tmp &= 0xff000000; \ + tmp |= ((d) & 0x00ffffff); \ + *(GLuint *)(buf + offset) = tmp; \ +} while (0) +#endif +#ifdef COMPILE_R300 #define READ_DEPTH( d, _x, _y ) \ do { \ d = (*(GLuint *)(buf + radeon_mba_z32( drb, _x + xo, \ _y + yo )) & 0xffffff00) >> 8; \ }while(0) +#else +#define READ_DEPTH( d, _x, _y ) \ + d = *(GLuint *)(buf + radeon_mba_z32( drb, _x + xo, \ + _y + yo )) & 0x00ffffff; +#endif #define TAG(x) radeon##x##_z24_s8 #include "depthtmp.h" - /* ================================================================ * Stencil buffer */ /* 24 bit depth, 8 bit stencil depthbuffer functions */ +#ifdef COMPILE_R300 #define WRITE_STENCIL( _x, _y, d ) \ do { \ GLuint offset = radeon_mba_z32( drb, _x + xo, _y + yo ); \ @@ -230,95 +236,86 @@ do { \ tmp |= (d) & 0xff; \ *(GLuint *)(buf + offset) = tmp; \ } while (0) +#else +#define WRITE_STENCIL( _x, _y, d ) \ +do { \ + GLuint offset = radeon_mba_z32( drb, _x + xo, _y + yo ); \ + GLuint tmp = *(GLuint *)(buf + offset); \ + tmp &= 0x00ffffff; \ + tmp |= (((d) & 0xff) << 24); \ + *(GLuint *)(buf + offset) = tmp; \ +} while (0) +#endif +#ifdef COMPILE_R300 #define READ_STENCIL( d, _x, _y ) \ do { \ GLuint offset = radeon_mba_z32( drb, _x + xo, _y + yo ); \ GLuint tmp = *(GLuint *)(buf + offset); \ d = tmp & 0x000000ff; \ } while (0) +#else +#define READ_STENCIL( d, _x, _y ) \ +do { \ + GLuint offset = radeon_mba_z32( drb, _x + xo, _y + yo ); \ + GLuint tmp = *(GLuint *)(buf + offset); \ + d = (tmp & 0xff000000) >> 24; \ +} while (0) +#endif #define TAG(x) radeon##x##_z24_s8 #include "stenciltmp.h" - - /* Move locking out to get reasonable span performance (10x better * than doing this in HW_LOCK above). WaitForIdle() is the main * culprit. */ -static void radeonSpanRenderStart( GLcontext *ctx ) +static void radeonSpanRenderStart(GLcontext * ctx) { - radeonContextPtr rmesa = RADEON_CONTEXT( ctx ); - { - static int first = 1; - r300ContextPtr r300 = (r300ContextPtr)rmesa; - - if (first) { - r300->span_dlocking = getenv("R300_SPAN_DISABLE_LOCKING") ? 1 : 0; - if (r300->span_dlocking == 0) { - fprintf(stderr, "Try R300_SPAN_DISABLE_LOCKING env var if this hangs.\n"); - fflush(stderr); - sleep(1); - } - first = 0; - } - - if (r300->span_dlocking) { - r300Flush(ctx); - LOCK_HARDWARE( rmesa ); - radeonWaitForIdleLocked( rmesa ); - UNLOCK_HARDWARE( rmesa ); - - return; - } - } - // R300_FIREVERTICES( rmesa ); - // old code has flush - r300Flush(ctx); - LOCK_HARDWARE( rmesa ); - radeonWaitForIdleLocked( rmesa ); + radeonContextPtr rmesa = RADEON_CONTEXT(ctx); +#ifdef COMPILE_R300 + r300ContextPtr r300 = (r300ContextPtr) rmesa; + R300_FIREVERTICES(r300); +#else + RADEON_FIREVERTICES(rmesa); +#endif + LOCK_HARDWARE(rmesa); + radeonWaitForIdleLocked(rmesa); } -static void radeonSpanRenderFinish( GLcontext *ctx ) +static void radeonSpanRenderFinish(GLcontext * ctx) { - radeonContextPtr rmesa = RADEON_CONTEXT( ctx ); - r300ContextPtr r300 = (r300ContextPtr)rmesa; - _swrast_flush( ctx ); - if (r300->span_dlocking == 0) - UNLOCK_HARDWARE( rmesa ); + radeonContextPtr rmesa = RADEON_CONTEXT(ctx); + _swrast_flush(ctx); + UNLOCK_HARDWARE(rmesa); } -void radeonInitSpanFuncs( GLcontext *ctx ) +void radeonInitSpanFuncs(GLcontext * ctx) { - struct swrast_device_driver *swdd = _swrast_GetDeviceDriverReference(ctx); - swdd->SpanRenderStart = radeonSpanRenderStart; - swdd->SpanRenderFinish = radeonSpanRenderFinish; + struct swrast_device_driver *swdd = + _swrast_GetDeviceDriverReference(ctx); + swdd->SpanRenderStart = radeonSpanRenderStart; + swdd->SpanRenderFinish = radeonSpanRenderFinish; } - /** * Plug in the Get/Put routines for the given driRenderbuffer. */ -void -radeonSetSpanFunctions(driRenderbuffer *drb, const GLvisual *vis) +void radeonSetSpanFunctions(driRenderbuffer * drb, const GLvisual * vis) { - if (drb->Base.InternalFormat == GL_RGBA) { - if (vis->redBits == 5 && vis->greenBits == 6 && vis->blueBits == 5) { - radeonInitPointers_RGB565(&drb->Base); - } - else { - radeonInitPointers_ARGB8888(&drb->Base); - } - } - else if (drb->Base.InternalFormat == GL_DEPTH_COMPONENT16) { - radeonInitDepthPointers_z16(&drb->Base); - } - else if (drb->Base.InternalFormat == GL_DEPTH_COMPONENT24) { - radeonInitDepthPointers_z24_s8(&drb->Base); - } - else if (drb->Base.InternalFormat == GL_STENCIL_INDEX8_EXT) { - radeonInitStencilPointers_z24_s8(&drb->Base); - } + if (drb->Base.InternalFormat == GL_RGBA) { + if (vis->redBits == 5 && vis->greenBits == 6 + && vis->blueBits == 5) { + radeonInitPointers_RGB565(&drb->Base); + } else { + radeonInitPointers_ARGB8888(&drb->Base); + } + } else if (drb->Base.InternalFormat == GL_DEPTH_COMPONENT16) { + radeonInitDepthPointers_z16(&drb->Base); + } else if (drb->Base.InternalFormat == GL_DEPTH_COMPONENT24) { + radeonInitDepthPointers_z24_s8(&drb->Base); + } else if (drb->Base.InternalFormat == GL_STENCIL_INDEX8_EXT) { + radeonInitStencilPointers_z24_s8(&drb->Base); + } } diff --git a/src/mesa/drivers/dri/r300/radeon_state.c b/src/mesa/drivers/dri/r300/radeon_state.c index 902e9583a6..82bfd951b9 100644 --- a/src/mesa/drivers/dri/r300/radeon_state.c +++ b/src/mesa/drivers/dri/r300/radeon_state.c @@ -154,7 +154,8 @@ void radeonSetCliprects(radeonContextPtr radeon) if (draw_fb->_ColorDrawBufferMask[0] == BUFFER_BIT_BACK_LEFT) { /* Can't ignore 2d windows if we are page flipping. */ - if (drawable->numBackClipRects == 0 || radeon->doPageFlip) { + if (drawable->numBackClipRects == 0 || radeon->doPageFlip || + radeon->sarea->pfCurrentPage == 1) { radeon->numClipRects = drawable->numClipRects; radeon->pClipRects = drawable->pClipRects; } else { diff --git a/src/mesa/drivers/dri/r300/radeon_state.h b/src/mesa/drivers/dri/r300/radeon_state.h index c2d041eb4a..821cb40c7e 100644 --- a/src/mesa/drivers/dri/r300/radeon_state.h +++ b/src/mesa/drivers/dri/r300/radeon_state.h @@ -31,8 +31,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #ifndef __RADEON_STATE_H__ #define __RADEON_STATE_H__ -#include "radeon_context.h" - extern void radeonRecalcScissorRects(radeonContextPtr radeon); extern void radeonSetCliprects(radeonContextPtr radeon); extern void radeonUpdateScissor(GLcontext* ctx); diff --git a/src/mesa/drivers/dri/r300/radeon_vtxfmt_a.c b/src/mesa/drivers/dri/r300/radeon_vtxfmt_a.c deleted file mode 100644 index 0625e5bc57..0000000000 --- a/src/mesa/drivers/dri/r300/radeon_vtxfmt_a.c +++ /dev/null @@ -1,656 +0,0 @@ -/* - * Copyright (C) 2005 Aapo Tahkola. - * - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial - * portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE - * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION - * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - */ - -/* - * Authors: - * Aapo Tahkola <aet@rasterburn.org> - */ - -#include "context.h" -#include "r300_context.h" -#include "r300_cmdbuf.h" -#include "r300_ioctl.h" -#include "r300_maos.h" -#include "r300_state.h" -#include "radeon_mm.h" - -#include "hash.h" -#include "dispatch.h" -#include "bufferobj.h" -#include "vtxfmt.h" -#include "api_validate.h" -#include "state.h" -#include "image.h" - -#include "vbo/vbo_context.h" - -#define CONV_VB(a, b) rvb->AttribPtr[(a)].size = vb->b->size, \ - rvb->AttribPtr[(a)].type = GL_FLOAT, \ - rvb->AttribPtr[(a)].stride = vb->b->stride, \ - rvb->AttribPtr[(a)].data = vb->b->data - -void radeon_vb_to_rvb(r300ContextPtr rmesa, struct radeon_vertex_buffer *rvb, struct vertex_buffer *vb) -{ - int i; - GLcontext *ctx; - ctx = rmesa->radeon.glCtx; - - memset(rvb, 0, sizeof(*rvb)); - - rvb->Elts = vb->Elts; - rvb->elt_size = 4; - rvb->elt_min = 0; - rvb->elt_max = vb->Count; - - rvb->Count = vb->Count; - - CONV_VB(VERT_ATTRIB_POS, ObjPtr); - CONV_VB(VERT_ATTRIB_NORMAL, NormalPtr); - CONV_VB(VERT_ATTRIB_COLOR0, ColorPtr[0]); - CONV_VB(VERT_ATTRIB_COLOR1, SecondaryColorPtr[0]); - CONV_VB(VERT_ATTRIB_FOG, FogCoordPtr); - - for (i=0; i < ctx->Const.MaxTextureCoordUnits; i++) - CONV_VB(VERT_ATTRIB_TEX0 + i, TexCoordPtr[i]); - - for (i=0; i < MAX_VERTEX_PROGRAM_ATTRIBS; i++) - CONV_VB(VERT_ATTRIB_GENERIC0 + i, AttribPtr[VERT_ATTRIB_GENERIC0 + i]); - - rvb->Primitive = vb->Primitive; - rvb->PrimitiveCount = vb->PrimitiveCount; - rvb->LockFirst = rvb->LockCount = 0; - rvb->lock_uptodate = GL_FALSE; -} - -#ifdef RADEON_VTXFMT_A - -extern void _tnl_array_init( GLcontext *ctx ); - -#define CONV(a, b) \ - do { \ - if (ctx->Array.ArrayObj->b.Enabled) { \ - rmesa->state.VB.AttribPtr[(a)].size = ctx->Array.ArrayObj->b.Size; \ - rmesa->state.VB.AttribPtr[(a)].data = ctx->Array.ArrayObj->b.BufferObj->Name \ - ? (void *)ADD_POINTERS(ctx->Array.ArrayObj->b.Ptr, ctx->Array.ArrayObj->b.BufferObj->Data) \ - : (void *)ctx->Array.ArrayObj->b.Ptr; \ - rmesa->state.VB.AttribPtr[(a)].stride = ctx->Array.ArrayObj->b.StrideB; \ - rmesa->state.VB.AttribPtr[(a)].type = ctx->Array.ArrayObj->b.Type; \ - enabled |= 1 << (a); \ - } \ - } while (0) - -static int setup_arrays(r300ContextPtr rmesa, GLint start) -{ - int i; - struct dt def = { 4, GL_FLOAT, 0, NULL }; - GLcontext *ctx; - GLuint enabled = 0; - - ctx = rmesa->radeon.glCtx; - i = r300Fallback(ctx); - if (i) - return i; - - memset(rmesa->state.VB.AttribPtr, 0, VERT_ATTRIB_MAX*sizeof(struct dt)); - - CONV(VERT_ATTRIB_POS, Vertex); - CONV(VERT_ATTRIB_NORMAL, Normal); - CONV(VERT_ATTRIB_COLOR0, Color); - CONV(VERT_ATTRIB_COLOR1, SecondaryColor); - CONV(VERT_ATTRIB_FOG, FogCoord); - - for (i=0; i < MAX_TEXTURE_COORD_UNITS; i++) - CONV(VERT_ATTRIB_TEX0 + i, TexCoord[i]); - - if (ctx->VertexProgram._Enabled) - for (i=0; i < VERT_ATTRIB_MAX; i++) - CONV(i, VertexAttrib[i]); - - for (i=0; i < VERT_ATTRIB_MAX; i++) { - rmesa->state.VB.AttribPtr[i].data += rmesa->state.VB.AttribPtr[i].stride * start; - } - - for(i=0; i < VERT_ATTRIB_MAX; i++){ - if(rmesa->state.VB.AttribPtr[i].type != GL_UNSIGNED_BYTE && -#if MESA_LITTLE_ENDIAN - rmesa->state.VB.AttribPtr[i].type != GL_SHORT && -#endif - rmesa->state.VB.AttribPtr[i].type != GL_FLOAT){ - WARN_ONCE("Unsupported format %d at index %d\n", rmesa->state.VB.AttribPtr[i].type, i); - return R300_FALLBACK_TCL; - } - - /*fprintf(stderr, "%d: ", i); - - switch(rmesa->state.VB.AttribPtr[i].type){ - case GL_BYTE: fprintf(stderr, "byte "); break; - case GL_UNSIGNED_BYTE: fprintf(stderr, "u byte "); break; - case GL_SHORT: fprintf(stderr, "short "); break; - case GL_UNSIGNED_SHORT: fprintf(stderr, "u short "); break; - case GL_INT: fprintf(stderr, "int "); break; - case GL_UNSIGNED_INT: fprintf(stderr, "u int "); break; - case GL_FLOAT: fprintf(stderr, "float "); break; - case GL_2_BYTES: fprintf(stderr, "2 bytes "); break; - case GL_3_BYTES: fprintf(stderr, "3 bytes "); break; - case GL_4_BYTES: fprintf(stderr, "4 bytes "); break; - case GL_DOUBLE: fprintf(stderr, "double "); break; - default: fprintf(stderr, "unknown "); break; - } - - fprintf(stderr, "Size %d ", rmesa->state.VB.AttribPtr[i].size); - fprintf(stderr, "Ptr %p ", rmesa->state.VB.AttribPtr[i].data); - fprintf(stderr, "Stride %d ", rmesa->state.VB.AttribPtr[i].stride); - fprintf(stderr, "\n");*/ - } - return R300_FALLBACK_NONE; -} - -void radeon_init_vtxfmt_a(r300ContextPtr rmesa); - - -static void radeonDrawRangeElements(GLcontext *ctx, - GLenum mode, - GLuint min, - GLuint max, - GLsizei count, - GLenum type, - const GLvoid *c_indices) -{ -#if 1 - return GL_FALSE; -#else - r300ContextPtr rmesa = R300_CONTEXT(ctx); - struct tnl_prim prim; - int elt_size; - int i; - void *ptr = NULL; - struct r300_dma_region rvb; - const GLvoid *indices = c_indices; - - if (count > 65535) { - /* TODO */ - if (mode == GL_POINTS || - mode == GL_LINES || - mode == GL_QUADS || - mode == GL_TRIANGLES) { - - while (count) { - i = r300_get_num_verts(rmesa, MIN2(count, 65535), mode); - - radeonDrawRangeElements(mode, min, max, i, type, indices); - - indices += i * _mesa_sizeof_type(type); - count -= i; - } - return GL_TRUE; - } - WARN_ONCE("Too many verts!\n"); - return GL_FALSE; - } - - if (ctx->Array.ElementArrayBufferObj->Name) { - /* use indices in the buffer object */ - if (!ctx->Array.ElementArrayBufferObj->Data) { - _mesa_warning(ctx, "DrawRangeElements with empty vertex elements buffer!"); - return GL_TRUE; - } - /* actual address is the sum of pointers */ - indices = (GLvoid *) - ADD_POINTERS(ctx->Array.ElementArrayBufferObj->Data, (const GLubyte *) c_indices); - } - - FLUSH_CURRENT( ctx, 0 ); -#ifdef OPTIMIZE_ELTS - min = 0; -#endif - - memset(&rvb, 0, sizeof(rvb)); - switch (type){ - case GL_UNSIGNED_BYTE: -#ifdef FORCE_32BITS_ELTS - elt_size = 4; -#else - elt_size = 2; -#endif - r300AllocDmaRegion(rmesa, &rvb, count * elt_size, elt_size); - rvb.aos_offset = GET_START(&rvb); - ptr = rvb.address + rvb.start; - -#ifdef FORCE_32BITS_ELTS - for(i=0; i < count; i++) - ((unsigned int *)ptr)[i] = ((unsigned char *)indices)[i] - min; -#else - for(i=0; i < count; i++) - ((unsigned short int *)ptr)[i] = ((unsigned char *)indices)[i] - min; -#endif - break; - - case GL_UNSIGNED_SHORT: -#ifdef FORCE_32BITS_ELTS - elt_size = 4; -#else - elt_size = 2; -#endif -#ifdef OPTIMIZE_ELTS - if (min == 0 && ctx->Array.ElementArrayBufferObj->Name){ - ptr = indices; - break; - } -#endif - r300AllocDmaRegion(rmesa, &rvb, count * elt_size, elt_size); - rvb.aos_offset = GET_START(&rvb); - ptr = rvb.address + rvb.start; - -#ifdef FORCE_32BITS_ELTS - for(i=0; i < count; i++) - ((unsigned int *)ptr)[i] = ((unsigned short int *)indices)[i] - min; -#else - for(i=0; i < count; i++) - ((unsigned short int *)ptr)[i] = ((unsigned short int *)indices)[i] - min; -#endif - break; - - case GL_UNSIGNED_INT: -#ifdef FORCE_32BITS_ELTS - elt_size = 4; -#else - if (max - min <= 65535) - elt_size = 2; - else - elt_size = 4; -#endif - r300AllocDmaRegion(rmesa, &rvb, count * elt_size, elt_size); - rvb.aos_offset = GET_START(&rvb); - ptr = rvb.address + rvb.start; - - if (elt_size == 2) - for (i=0; i < count; i++) - ((unsigned short int *)ptr)[i] = ((unsigned int *)indices)[i] - min; - else - for (i=0; i < count; i++) - ((unsigned int *)ptr)[i] = ((unsigned int *)indices)[i] - min; - break; - - default: - WARN_ONCE("Unknown elt type!\n"); - return GL_FALSE; - } - - /* XXX: setup_arrays before state update? */ - - if (ctx->NewState) - _mesa_update_state( ctx ); - - r300UpdateShaders(rmesa); - - if (setup_arrays(rmesa, min) >= R300_FALLBACK_TCL) { - r300ReleaseDmaRegion(rmesa, &rvb, __FUNCTION__); - return GL_FALSE; - } - - rmesa->state.VB.Count = max - min + 1; - - r300UpdateShaderStates(rmesa); - - rmesa->state.VB.Primitive = &prim; - rmesa->state.VB.PrimitiveCount = 1; - - prim.mode = mode | PRIM_BEGIN | PRIM_END; - if (rmesa->state.VB.LockCount) - prim.start = min - rmesa->state.VB.LockFirst; - else - prim.start = 0; - prim.count = count; - - rmesa->state.VB.Elts = ptr; - rmesa->state.VB.elt_size = elt_size; - rmesa->state.VB.elt_min = min; - rmesa->state.VB.elt_max = max; - - if (r300_run_vb_render(ctx, NULL)) { - r300ReleaseDmaRegion(rmesa, &rvb, __FUNCTION__); - return GL_FALSE; - } - - if(rvb.buf) - radeon_mm_use(rmesa, rvb.buf->id); - - r300ReleaseDmaRegion(rmesa, &rvb, __FUNCTION__); - return GL_TRUE; -#endif -} - -static GLboolean radeonDrawArrays( GLcontext *ctx, - GLenum mode, GLint start, GLsizei count ) -{ -#if 1 - return GL_FALSE; -#else - GET_CURRENT_CONTEXT(ctx); - r300ContextPtr rmesa = R300_CONTEXT(ctx); - struct tnl_prim prim; - - if (count > 65535) { - /* TODO: split into multiple draws. - */ - WARN_ONCE("Too many verts!\n"); - return GL_FALSE; - } - - FLUSH_CURRENT( ctx, 0 ); - - if (ctx->NewState) - _mesa_update_state( ctx ); - - /* XXX: setup_arrays before state update? */ - - r300UpdateShaders(rmesa); - - if (setup_arrays(rmesa, start) >= R300_FALLBACK_TCL) - return GL_FALSE; - - rmesa->state.VB.Count = count; - - r300UpdateShaderStates(rmesa); - - rmesa->state.VB.Primitive = &prim; - rmesa->state.VB.PrimitiveCount = 1; - - prim.mode = mode | PRIM_BEGIN | PRIM_END; - if (rmesa->state.VB.LockCount) - prim.start = start - rmesa->state.VB.LockFirst; - else - prim.start = 0; - prim.count = count; - - rmesa->state.VB.Elts = NULL; - rmesa->state.VB.elt_size = 0; - rmesa->state.VB.elt_min = 0; - rmesa->state.VB.elt_max = 0; - - if (r300_run_vb_render(ctx, NULL)) - return GL_FALSE; - - return GL_TRUE; -#endif -} - -static void radeon_draw_prims( GLcontext *ctx, - const struct gl_client_array *arrays[], - const struct _mesa_prim *prim, - GLuint nr_prims, - const struct _mesa_index_buffer *ib, - GLuint min_index, - GLuint max_index) -{ - if (ib == NULL) { - for (i = 0; i < nr_prims; i++) { - if (!radeonDrawArrays(ctx, - prim->mode, - prim->start, - prim->count)) { - /* Fallback - */ - _tnl_draw_prims(ctx, - arrays, - prim + i, - nr_prims - i, - ib, - min_index, - max_index); - return; - } - } - } else { - for (i = 0; i < nr_prims; i++) { - if (!radeonDrawRangeElements(ctx, - prim->mode, - min_index, - max_index, - prim->count, - ib->types, - ib->ptr)) { - /* Fallback - */ - _tnl_draw_prims(ctx, - arrays, - prim + i, - nr_prims - i, - ib, - min_index, - max_index); - return; - } - } - } -} - -void radeon_init_vtxfmt_a(r300ContextPtr rmesa) -{ - GLcontext *ctx; - struct vbo_context *vbo = vbo_context(ctx); - - vbo->draw_prims = radeon_draw_prims; -} - -#endif - -#ifdef HW_VBOS - -static struct gl_buffer_object * -r300NewBufferObject(GLcontext *ctx, GLuint name, GLenum target ) -{ - struct r300_buffer_object *obj; - - (void) ctx; - - obj = MALLOC_STRUCT(r300_buffer_object); - _mesa_initialize_buffer_object(&obj->mesa_obj, name, target); - return &obj->mesa_obj; -} - -static void r300BufferData(GLcontext *ctx, GLenum target, GLsizeiptrARB size, - const GLvoid *data, GLenum usage, struct gl_buffer_object *obj) -{ - r300ContextPtr rmesa = R300_CONTEXT(ctx); - struct r300_buffer_object *r300_obj = (struct r300_buffer_object *)obj; - - /* Free previous buffer */ - if (obj->OnCard) { - radeon_mm_free(rmesa, r300_obj->id); - obj->OnCard = GL_FALSE; - } else { - if (obj->Data) - _mesa_free(obj->Data); - } -#ifdef OPTIMIZE_ELTS - if (0) { -#else - if (target == GL_ELEMENT_ARRAY_BUFFER_ARB) { -#endif - fallback: - obj->Data = malloc(size); - - if (data) - _mesa_memcpy(obj->Data, data, size); - - obj->OnCard = GL_FALSE; - } else { - r300_obj->id = radeon_mm_alloc(rmesa, 4, size); - if (r300_obj->id == 0) - goto fallback; - - obj->Data = radeon_mm_map(rmesa, r300_obj->id, RADEON_MM_W); - - if (data) - _mesa_memcpy(obj->Data, data, size); - - radeon_mm_unmap(rmesa, r300_obj->id); - obj->OnCard = GL_TRUE; - } - - obj->Size = size; - obj->Usage = usage; -} - -static void r300BufferSubData(GLcontext *ctx, GLenum target, GLintptrARB offset, - GLsizeiptrARB size, const GLvoid * data, struct gl_buffer_object * bufObj) -{ - r300ContextPtr rmesa = R300_CONTEXT(ctx); - struct r300_buffer_object *r300_obj = (struct r300_buffer_object *)bufObj; - (void) ctx; (void) target; - void *ptr; - - if (bufObj->Data && ((GLuint) (size + offset) <= bufObj->Size)) { - if (bufObj->OnCard){ - ptr = radeon_mm_map(rmesa, r300_obj->id, RADEON_MM_W); - - _mesa_memcpy( (GLubyte *) ptr + offset, data, size ); - - radeon_mm_unmap(rmesa, r300_obj->id); - } else { - _mesa_memcpy( (GLubyte *) bufObj->Data + offset, data, size ); - } - } -} - -static void *r300MapBuffer(GLcontext *ctx, GLenum target, GLenum access, - struct gl_buffer_object *bufObj) -{ - r300ContextPtr rmesa = R300_CONTEXT(ctx); - struct r300_buffer_object *r300_obj = (struct r300_buffer_object *)bufObj; - - (void) ctx; - (void) target; - (void) access; - //ASSERT(!bufObj->OnCard); - /* Just return a direct pointer to the data */ - if (bufObj->Pointer) { - /* already mapped! */ - return NULL; - } - - if (!bufObj->OnCard) { - bufObj->Pointer = bufObj->Data; - return bufObj->Pointer; - } - - switch (access) { - case GL_READ_ONLY: - bufObj->Pointer = radeon_mm_map(rmesa, r300_obj->id, RADEON_MM_R); - break; - - case GL_WRITE_ONLY: - bufObj->Pointer = radeon_mm_map(rmesa, r300_obj->id, RADEON_MM_W); - break; - - case GL_READ_WRITE: - bufObj->Pointer = radeon_mm_map(rmesa, r300_obj->id, RADEON_MM_RW); - break; - - default: - WARN_ONCE("Unknown access type\n"); - bufObj->Pointer = NULL; - break; - } - - return bufObj->Pointer; -} - -static GLboolean r300UnmapBuffer(GLcontext *ctx, GLenum target, struct gl_buffer_object *bufObj) -{ - r300ContextPtr rmesa = R300_CONTEXT(ctx); - struct r300_buffer_object *r300_obj = (struct r300_buffer_object *)bufObj; - - (void) ctx; - (void) target; - //ASSERT(!bufObj->OnCard); - /* XXX we might assert here that bufObj->Pointer is non-null */ - if (!bufObj->OnCard) { - bufObj->Pointer = NULL; - return GL_TRUE; - } - radeon_mm_unmap(rmesa, r300_obj->id); - - bufObj->Pointer = NULL; - return GL_TRUE; -} - -static void r300DeleteBuffer(GLcontext *ctx, struct gl_buffer_object *obj) -{ - r300ContextPtr rmesa = R300_CONTEXT(ctx); - struct r300_buffer_object *r300_obj = (struct r300_buffer_object *)obj; - - if (obj->OnCard) { - radeon_mm_free(rmesa, r300_obj->id); - obj->Data = NULL; - } - _mesa_delete_buffer_object(ctx, obj); -} - -void r300_evict_vbos(GLcontext *ctx, int amount) -{ - r300ContextPtr rmesa = R300_CONTEXT(ctx); - struct _mesa_HashTable *hash = ctx->Shared->BufferObjects; - GLuint k = _mesa_HashFirstEntry(hash); - - while (amount > 0 && k) { - struct gl_buffer_object *obj = _mesa_lookup_bufferobj(ctx, k); - struct r300_buffer_object *r300_obj - = (struct r300_buffer_object *) obj; - - if (obj->OnCard && obj->Size) { - GLvoid *data; - obj->Data = _mesa_malloc(obj->Size); - - data = radeon_mm_map(rmesa, r300_obj->id, RADEON_MM_R); - _mesa_memcpy(obj->Data, data, obj->Size); - radeon_mm_unmap(rmesa, r300_obj->id); - - radeon_mm_free(rmesa, r300_obj->id); - r300_obj->id = 0; - obj->OnCard = GL_FALSE; - - amount -= obj->Size; - } - - k = _mesa_HashNextEntry(hash, k); - } - -} - -void r300_init_vbo_funcs(struct dd_function_table *functions) -{ - functions->NewBufferObject = r300NewBufferObject; - functions->BufferData = r300BufferData; - functions->BufferSubData = r300BufferSubData; - functions->MapBuffer = r300MapBuffer; - functions->UnmapBuffer = r300UnmapBuffer; - functions->DeleteBuffer = r300DeleteBuffer; -} - -#endif diff --git a/src/mesa/drivers/dri/radeon/radeon_context.c b/src/mesa/drivers/dri/radeon/radeon_context.c index d7c2d1407d..9451ec4aa5 100644 --- a/src/mesa/drivers/dri/radeon/radeon_context.c +++ b/src/mesa/drivers/dri/radeon/radeon_context.c @@ -604,7 +604,6 @@ radeonMakeCurrent( __DRIcontextPrivate *driContextPriv, newCtx->dri.drawable = driDrawPriv; radeonSetCliprects(newCtx); - radeonUpdateWindow( newCtx->glCtx ); radeonUpdateViewportOffset( newCtx->glCtx ); } @@ -612,6 +611,7 @@ radeonMakeCurrent( __DRIcontextPrivate *driContextPriv, (GLframebuffer *) driDrawPriv->driverPrivate, (GLframebuffer *) driReadPriv->driverPrivate ); + _mesa_update_state( newCtx->glCtx ); } else { if (RADEON_DEBUG & DEBUG_DRI) fprintf(stderr, "%s ctx is null\n", __FUNCTION__); diff --git a/src/mesa/drivers/dri/radeon/radeon_context.h b/src/mesa/drivers/dri/radeon/radeon_context.h index 02cea2f4e3..8dedd66f56 100644 --- a/src/mesa/drivers/dri/radeon/radeon_context.h +++ b/src/mesa/drivers/dri/radeon/radeon_context.h @@ -1,8 +1,12 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_context.h,v 1.6 2002/12/16 16:18:58 dawes Exp $ */ /************************************************************************** Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and VA Linux Systems Inc., Fremont, California. +Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. + +The Weather Channel (TM) funded Tungsten Graphics to develop the +initial release of the Radeon 8500 driver under the XFree86 license. +This notice must be preserved. All Rights Reserved. @@ -30,9 +34,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. /* * Authors: - * Kevin E. Martin <martin@valinux.com> * Gareth Hughes <gareth@valinux.com> * Keith Whitwell <keith@tungstengraphics.com> + * Kevin E. Martin <martin@valinux.com> + * Nicolai Haehnle <prefect_@gmx.net> */ #ifndef __RADEON_CONTEXT_H__ @@ -54,7 +59,10 @@ typedef struct radeon_context *radeonContextPtr; /* This union is used to avoid warnings/miscompilation with float to uint32_t casts due to strict-aliasing */ -typedef union { GLfloat f; uint32_t ui32; } float_ui32_type; +typedef union { + GLfloat f; + uint32_t ui32; +} float_ui32_type; #include "radeon_lock.h" #include "radeon_screen.h" @@ -62,8 +70,13 @@ typedef union { GLfloat f; uint32_t ui32; } float_ui32_type; #include "math/m_vector.h" -/* Flags for software fallback cases */ -/* See correponding strings in radeon_swtcl.c */ +#define TEX_0 0x1 +#define TEX_1 0x2 +#define TEX_2 0x4 +#define TEX_ALL 0x7 + +/* Rasterizing fallbacks */ +/* See correponding strings in r200_swtcl.c */ #define RADEON_FALLBACK_TEXTURE 0x0001 #define RADEON_FALLBACK_DRAW_BUFFER 0x0002 #define RADEON_FALLBACK_STENCIL 0x0004 @@ -84,46 +97,41 @@ typedef union { GLfloat f; uint32_t ui32; } float_ui32_type; #include "tnl_dd/t_dd_vertex.h" #undef TAG -typedef void (*radeon_tri_func)( radeonContextPtr, +typedef void (*radeon_tri_func) (radeonContextPtr, radeonVertex *, - radeonVertex *, - radeonVertex * ); - -typedef void (*radeon_line_func)( radeonContextPtr, - radeonVertex *, - radeonVertex * ); + radeonVertex *, radeonVertex *); -typedef void (*radeon_point_func)( radeonContextPtr, - radeonVertex * ); +typedef void (*radeon_line_func) (radeonContextPtr, + radeonVertex *, radeonVertex *); +typedef void (*radeon_point_func) (radeonContextPtr, radeonVertex *); struct radeon_colorbuffer_state { - GLuint clear; - int roundEnable; + GLuint clear; + int roundEnable; }; - struct radeon_depthbuffer_state { - GLuint clear; - GLfloat scale; + GLuint clear; + GLfloat scale; }; struct radeon_scissor_state { - drm_clip_rect_t rect; - GLboolean enabled; + drm_clip_rect_t rect; + GLboolean enabled; - GLuint numClipRects; /* Cliprects active */ - GLuint numAllocedClipRects; /* Cliprects available */ - drm_clip_rect_t *pClipRects; + GLuint numClipRects; /* Cliprects active */ + GLuint numAllocedClipRects; /* Cliprects available */ + drm_clip_rect_t *pClipRects; }; struct radeon_stencilbuffer_state { - GLboolean hwBuffer; - GLuint clear; /* rb3d_stencilrefmask value */ + GLboolean hwBuffer; + GLuint clear; /* rb3d_stencilrefmask value */ }; struct radeon_stipple_state { - GLuint mask[32]; + GLuint mask[32]; }; /* used for both tcl_vtx and vc_frmt tex bits (they are identical) */ @@ -133,70 +141,61 @@ struct radeon_stipple_state { #define RADEON_Q_BIT(unit) \ (unit == 0 ? RADEON_CP_VC_FRMT_Q0 : (RADEON_CP_VC_FRMT_Q1 >> 2) << (2 * unit)) -#define TEX_0 0x1 -#define TEX_1 0x2 -#define TEX_2 0x4 -#define TEX_ALL 0x7 - typedef struct radeon_tex_obj radeonTexObj, *radeonTexObjPtr; /* Texture object in locally shared texture space. */ struct radeon_tex_obj { - driTextureObject base; + driTextureObject base; - GLuint bufAddr; /* Offset to start of locally - shared texture block */ + GLuint bufAddr; /* Offset to start of locally + shared texture block */ - GLuint dirty_state; /* Flags (1 per texunit) for - whether or not this texobj - has dirty hardware state - (pp_*) that needs to be - brought into the - texunit. */ + GLuint dirty_state; /* Flags (1 per texunit) for + whether or not this texobj + has dirty hardware state + (pp_*) that needs to be + brought into the + texunit. */ - drm_radeon_tex_image_t image[6][RADEON_MAX_TEXTURE_LEVELS]; - /* Six, for the cube faces */ + drm_radeon_tex_image_t image[6][RADEON_MAX_TEXTURE_LEVELS]; + /* Six, for the cube faces */ - GLuint pp_txfilter; /* hardware register values */ - GLuint pp_txformat; - GLuint pp_txoffset; /* Image location in texmem. - All cube faces follow. */ - GLuint pp_txsize; /* npot only */ - GLuint pp_txpitch; /* npot only */ - GLuint pp_border_color; - GLuint pp_cubic_faces; /* cube face 1,2,3,4 log2 sizes */ + GLuint pp_txfilter; /* hardware register values */ + GLuint pp_txformat; + GLuint pp_txoffset; /* Image location in texmem. + All cube faces follow. */ + GLuint pp_txsize; /* npot only */ + GLuint pp_txpitch; /* npot only */ + GLuint pp_border_color; + GLuint pp_cubic_faces; /* cube face 1,2,3,4 log2 sizes */ - GLboolean border_fallback; + GLboolean border_fallback; - GLuint tile_bits; /* hw texture tile bits used on this texture */ + GLuint tile_bits; /* hw texture tile bits used on this texture */ }; - struct radeon_texture_env_state { - radeonTexObjPtr texobj; - GLenum format; - GLenum envMode; + radeonTexObjPtr texobj; + GLenum format; + GLenum envMode; }; struct radeon_texture_state { - struct radeon_texture_env_state unit[RADEON_MAX_TEXTURE_UNITS]; + struct radeon_texture_env_state unit[RADEON_MAX_TEXTURE_UNITS]; }; - struct radeon_state_atom { - struct radeon_state_atom *next, *prev; - const char *name; /* for debug */ - int cmd_size; /* size in bytes */ - GLuint is_tcl; - int *cmd; /* one or more cmd's */ - int *lastcmd; /* one or more cmd's */ - GLboolean dirty; /* dirty-mark in emit_state_list */ - GLboolean (*check)( GLcontext * ); /* is this state active? */ + struct radeon_state_atom *next, *prev; + const char *name; /* for debug */ + int cmd_size; /* size in bytes */ + GLuint is_tcl; + int *cmd; /* one or more cmd's */ + int *lastcmd; /* one or more cmd's */ + GLboolean dirty; /* dirty-mark in emit_state_list */ + GLboolean(*check) (GLcontext *); /* is this state active? */ }; - - /* Trying to keep these relatively short as the variables are becoming * extravagently long. Drop the driver name prefix off the front of * everything - I think we know which driver we're in by now, and keep the @@ -263,9 +262,9 @@ struct radeon_state_atom { #define TEX_PP_BORDER_COLOR 8 #define TEX_STATE_SIZE 9 -#define TXR_CMD_0 0 /* rectangle textures */ -#define TXR_PP_TEX_SIZE 1 /* 0x1d04, 0x1d0c for NPOT! */ -#define TXR_PP_TEX_PITCH 2 /* 0x1d08, 0x1d10 for NPOT! */ +#define TXR_CMD_0 0 /* rectangle textures */ +#define TXR_PP_TEX_SIZE 1 /* 0x1d04, 0x1d0c for NPOT! */ +#define TXR_PP_TEX_PITCH 2 /* 0x1d08, 0x1d10 for NPOT! */ #define TXR_STATE_SIZE 3 #define CUBE_CMD_0 0 @@ -297,11 +296,11 @@ struct radeon_state_atom { #define TCL_PER_LIGHT_CTL_3 11 #define TCL_STATE_SIZE 12 -#define MTL_CMD_0 0 -#define MTL_EMMISSIVE_RED 1 -#define MTL_EMMISSIVE_GREEN 2 -#define MTL_EMMISSIVE_BLUE 3 -#define MTL_EMMISSIVE_ALPHA 4 +#define MTL_CMD_0 0 +#define MTL_EMMISSIVE_RED 1 +#define MTL_EMMISSIVE_GREEN 2 +#define MTL_EMMISSIVE_BLUE 3 +#define MTL_EMMISSIVE_ALPHA 4 #define MTL_AMBIENT_RED 5 #define MTL_AMBIENT_GREEN 6 #define MTL_AMBIENT_BLUE 7 @@ -365,7 +364,7 @@ struct radeon_state_atom { #define LIT_SPOT_EXPONENT 27 #define LIT_SPOT_CUTOFF 28 #define LIT_SPECULAR_THRESH 29 -#define LIT_RANGE_CUTOFF 30 /* ? */ +#define LIT_RANGE_CUTOFF 30 /* ? */ #define LIT_ATTEN_CONST_INV 31 #define LIT_STATE_SIZE 32 @@ -409,59 +408,54 @@ struct radeon_state_atom { #define SHN_SHININESS 1 #define SHN_STATE_SIZE 2 - - - - struct radeon_hw_state { - /* Head of the linked list of state atoms. */ - struct radeon_state_atom atomlist; - - /* Hardware state, stored as cmdbuf commands: - * -- Need to doublebuffer for - * - eliding noop statechange loops? (except line stipple count) - */ - struct radeon_state_atom ctx; - struct radeon_state_atom set; - struct radeon_state_atom lin; - struct radeon_state_atom msk; - struct radeon_state_atom vpt; - struct radeon_state_atom tcl; - struct radeon_state_atom msc; - struct radeon_state_atom tex[3]; - struct radeon_state_atom cube[3]; - struct radeon_state_atom zbs; - struct radeon_state_atom mtl; - struct radeon_state_atom mat[6]; - struct radeon_state_atom lit[8]; /* includes vec, scl commands */ - struct radeon_state_atom ucp[6]; - struct radeon_state_atom eye; /* eye pos */ - struct radeon_state_atom grd; /* guard band clipping */ - struct radeon_state_atom fog; - struct radeon_state_atom glt; - struct radeon_state_atom txr[3]; /* for NPOT */ - - int max_state_size; /* Number of bytes necessary for a full state emit. */ - GLboolean is_dirty, all_dirty; + /* Head of the linked list of state atoms. */ + struct radeon_state_atom atomlist; + + /* Hardware state, stored as cmdbuf commands: + * -- Need to doublebuffer for + * - eliding noop statechange loops? (except line stipple count) + */ + struct radeon_state_atom ctx; + struct radeon_state_atom set; + struct radeon_state_atom lin; + struct radeon_state_atom msk; + struct radeon_state_atom vpt; + struct radeon_state_atom tcl; + struct radeon_state_atom msc; + struct radeon_state_atom tex[3]; + struct radeon_state_atom cube[3]; + struct radeon_state_atom zbs; + struct radeon_state_atom mtl; + struct radeon_state_atom mat[6]; + struct radeon_state_atom lit[8]; /* includes vec, scl commands */ + struct radeon_state_atom ucp[6]; + struct radeon_state_atom eye; /* eye pos */ + struct radeon_state_atom grd; /* guard band clipping */ + struct radeon_state_atom fog; + struct radeon_state_atom glt; + struct radeon_state_atom txr[3]; /* for NPOT */ + + int max_state_size; /* Number of bytes necessary for a full state emit. */ + GLboolean is_dirty, all_dirty; }; struct radeon_state { - /* Derived state for internal purposes: - */ - struct radeon_colorbuffer_state color; - struct radeon_depthbuffer_state depth; - struct radeon_scissor_state scissor; - struct radeon_stencilbuffer_state stencil; - struct radeon_stipple_state stipple; - struct radeon_texture_state texture; + /* Derived state for internal purposes: + */ + struct radeon_colorbuffer_state color; + struct radeon_depthbuffer_state depth; + struct radeon_scissor_state scissor; + struct radeon_stencilbuffer_state stencil; + struct radeon_stipple_state stipple; + struct radeon_texture_state texture; }; - /* Need refcounting on dma buffers: */ struct radeon_dma_buffer { - int refcount; /* the number of retained regions in buf */ - drmBufPtr buf; + int refcount; /* the number of retained regions in buf */ + drmBufPtr buf; }; #define GET_START(rvb) (rmesa->radeonScreen->gart_buffer_offset + \ @@ -471,139 +465,130 @@ struct radeon_dma_buffer { /* A retained region, eg vertices for indexed vertices. */ struct radeon_dma_region { - struct radeon_dma_buffer *buf; - char *address; /* == buf->address */ - int start, end, ptr; /* offsets from start of buf */ - int aos_start; - int aos_stride; - int aos_size; + struct radeon_dma_buffer *buf; + char *address; /* == buf->address */ + int start, end, ptr; /* offsets from start of buf */ + int aos_start; + int aos_stride; + int aos_size; }; - struct radeon_dma { - /* Active dma region. Allocations for vertices and retained - * regions come from here. Also used for emitting random vertices, - * these may be flushed by calling flush_current(); - */ - struct radeon_dma_region current; - - void (*flush)( radeonContextPtr ); + /* Active dma region. Allocations for vertices and retained + * regions come from here. Also used for emitting random vertices, + * these may be flushed by calling flush_current(); + */ + struct radeon_dma_region current; - char *buf0_address; /* start of buf[0], for index calcs */ - GLuint nr_released_bufs; /* flush after so many buffers released */ + void (*flush) (radeonContextPtr); + + char *buf0_address; /* start of buf[0], for index calcs */ + GLuint nr_released_bufs; /* flush after so many buffers released */ }; struct radeon_dri_mirror { - __DRIcontextPrivate *context; /* DRI context */ - __DRIscreenPrivate *screen; /* DRI screen */ + __DRIcontextPrivate *context; /* DRI context */ + __DRIscreenPrivate *screen; /* DRI screen */ /** * DRI drawable bound to this context for drawing. */ - __DRIdrawablePrivate *drawable; + __DRIdrawablePrivate *drawable; /** * DRI drawable bound to this context for reading. */ - __DRIdrawablePrivate *readable; + __DRIdrawablePrivate *readable; - drm_context_t hwContext; - drm_hw_lock_t *hwLock; - int fd; - int drmMinor; + drm_context_t hwContext; + drm_hw_lock_t *hwLock; + int fd; + int drmMinor; }; - -#define RADEON_CMD_BUF_SZ (8*1024) +#define RADEON_CMD_BUF_SZ (8*1024) struct radeon_store { - GLuint statenr; - GLuint primnr; - char cmd_buf[RADEON_CMD_BUF_SZ]; - int cmd_used; - int elts_start; + GLuint statenr; + GLuint primnr; + char cmd_buf[RADEON_CMD_BUF_SZ]; + int cmd_used; + int elts_start; }; - /* radeon_tcl.c */ struct radeon_tcl_info { - GLuint vertex_format; - GLuint hw_primitive; - - /* Temporary for cases where incoming vertex data is incompatible - * with maos code. - */ - GLvector4f ObjClean; - - struct radeon_dma_region *aos_components[8]; - GLuint nr_aos_components; - - GLuint *Elts; - - struct radeon_dma_region indexed_verts; - struct radeon_dma_region obj; - struct radeon_dma_region rgba; - struct radeon_dma_region spec; - struct radeon_dma_region fog; - struct radeon_dma_region tex[RADEON_MAX_TEXTURE_UNITS]; - struct radeon_dma_region norm; + GLuint vertex_format; + GLuint hw_primitive; + + /* Temporary for cases where incoming vertex data is incompatible + * with maos code. + */ + GLvector4f ObjClean; + + struct radeon_dma_region *aos_components[8]; + GLuint nr_aos_components; + + GLuint *Elts; + + struct radeon_dma_region indexed_verts; + struct radeon_dma_region obj; + struct radeon_dma_region rgba; + struct radeon_dma_region spec; + struct radeon_dma_region fog; + struct radeon_dma_region tex[RADEON_MAX_TEXTURE_UNITS]; + struct radeon_dma_region norm; }; - /* radeon_swtcl.c */ struct radeon_swtcl_info { - GLuint RenderIndex; - GLuint vertex_size; - GLuint vertex_format; + GLuint RenderIndex; + GLuint vertex_size; + GLuint vertex_format; - struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX]; - GLuint vertex_attr_count; + struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX]; + GLuint vertex_attr_count; - GLubyte *verts; + GLubyte *verts; - /* Fallback rasterization functions - */ - radeon_point_func draw_point; - radeon_line_func draw_line; - radeon_tri_func draw_tri; + /* Fallback rasterization functions + */ + radeon_point_func draw_point; + radeon_line_func draw_line; + radeon_tri_func draw_tri; - GLuint hw_primitive; - GLenum render_primitive; - GLuint numverts; + GLuint hw_primitive; + GLenum render_primitive; + GLuint numverts; /** * Offset of the 4UB color data within a hardware (swtcl) vertex. */ - GLuint coloroffset; + GLuint coloroffset; /** * Offset of the 3UB specular color data within a hardware (swtcl) vertex. */ - GLuint specoffset; + GLuint specoffset; - GLboolean needproj; + GLboolean needproj; - struct radeon_dma_region indexed_verts; + struct radeon_dma_region indexed_verts; }; - struct radeon_ioctl { - GLuint vertex_offset; - GLuint vertex_size; + GLuint vertex_offset; + GLuint vertex_size; }; - - #define RADEON_MAX_PRIMS 64 - - struct radeon_prim { - GLuint start; - GLuint end; - GLuint prim; + GLuint start; + GLuint end; + GLuint prim; }; /* A maximum total of 20 elements per vertex: 3 floats for position, 3 @@ -615,145 +600,141 @@ struct radeon_prim { */ #define RADEON_MAX_VERTEX_SIZE 20 - struct radeon_context { - GLcontext *glCtx; /* Mesa context */ - - /* Driver and hardware state management - */ - struct radeon_hw_state hw; - struct radeon_state state; - - /* Texture object bookkeeping - */ - unsigned nr_heaps; - driTexHeap * texture_heaps[ RADEON_NR_TEX_HEAPS ]; - driTextureObject swapped; - int texture_depth; - float initialMaxAnisotropy; - - /* Rasterization and vertex state: - */ - GLuint TclFallback; - GLuint Fallback; - GLuint NewGLState; - DECLARE_RENDERINPUTS(tnl_index_bitset); /* index of bits for last tnl_install_attrs */ - - /* Vertex buffers - */ - struct radeon_ioctl ioctl; - struct radeon_dma dma; - struct radeon_store store; - /* A full state emit as of the first state emit in the main store, in case - * the context is lost. - */ - struct radeon_store backup_store; - - /* Page flipping - */ - GLuint doPageFlip; - - /* Busy waiting - */ - GLuint do_usleeps; - GLuint do_irqs; - GLuint irqsEmitted; - drm_radeon_irq_wait_t iw; - - /* Drawable, cliprect and scissor information - */ - GLuint numClipRects; /* Cliprects for the draw buffer */ - drm_clip_rect_t *pClipRects; - unsigned int lastStamp; - GLboolean lost_context; - GLboolean save_on_next_emit; - radeonScreenPtr radeonScreen; /* Screen private DRI data */ - drm_radeon_sarea_t *sarea; /* Private SAREA data */ - - /* TCL stuff - */ - GLmatrix TexGenMatrix[RADEON_MAX_TEXTURE_UNITS]; - GLboolean recheck_texgen[RADEON_MAX_TEXTURE_UNITS]; - GLboolean TexGenNeedNormals[RADEON_MAX_TEXTURE_UNITS]; - GLuint TexGenEnabled; - GLuint NeedTexMatrix; - GLuint TexMatColSwap; - GLmatrix tmpmat[RADEON_MAX_TEXTURE_UNITS]; - GLuint last_ReallyEnabled; - - /* VBI - */ - GLuint vbl_seq; - GLuint vblank_flags; - - int64_t swap_ust; - int64_t swap_missed_ust; - - GLuint swap_count; - GLuint swap_missed_count; - - - /* radeon_tcl.c - */ - struct radeon_tcl_info tcl; - - /* radeon_swtcl.c - */ - struct radeon_swtcl_info swtcl; - - /* Mirrors of some DRI state - */ - struct radeon_dri_mirror dri; - - /* Configuration cache - */ - driOptionCache optionCache; - - GLboolean using_hyperz; - GLboolean texmicrotile; - - /* Performance counters - */ - GLuint boxes; /* Draw performance boxes */ - GLuint hardwareWentIdle; - GLuint c_clears; - GLuint c_drawWaits; - GLuint c_textureSwaps; - GLuint c_textureBytes; - GLuint c_vertexBuffers; + GLcontext *glCtx; /* Mesa context */ + + /* Driver and hardware state management + */ + struct radeon_hw_state hw; + struct radeon_state state; + + /* Texture object bookkeeping + */ + unsigned nr_heaps; + driTexHeap *texture_heaps[RADEON_NR_TEX_HEAPS]; + driTextureObject swapped; + int texture_depth; + float initialMaxAnisotropy; + + /* Rasterization and vertex state: + */ + GLuint TclFallback; + GLuint Fallback; + GLuint NewGLState; + DECLARE_RENDERINPUTS(tnl_index_bitset); /* index of bits for last tnl_install_attrs */ + + /* Vertex buffers + */ + struct radeon_ioctl ioctl; + struct radeon_dma dma; + struct radeon_store store; + /* A full state emit as of the first state emit in the main store, in case + * the context is lost. + */ + struct radeon_store backup_store; + + /* Page flipping + */ + GLuint doPageFlip; + + /* Busy waiting + */ + GLuint do_usleeps; + GLuint do_irqs; + GLuint irqsEmitted; + drm_radeon_irq_wait_t iw; + + /* Drawable, cliprect and scissor information + */ + GLuint numClipRects; /* Cliprects for the draw buffer */ + drm_clip_rect_t *pClipRects; + unsigned int lastStamp; + GLboolean lost_context; + GLboolean save_on_next_emit; + radeonScreenPtr radeonScreen; /* Screen private DRI data */ + drm_radeon_sarea_t *sarea; /* Private SAREA data */ + + /* TCL stuff + */ + GLmatrix TexGenMatrix[RADEON_MAX_TEXTURE_UNITS]; + GLboolean recheck_texgen[RADEON_MAX_TEXTURE_UNITS]; + GLboolean TexGenNeedNormals[RADEON_MAX_TEXTURE_UNITS]; + GLuint TexGenEnabled; + GLuint NeedTexMatrix; + GLuint TexMatColSwap; + GLmatrix tmpmat[RADEON_MAX_TEXTURE_UNITS]; + GLuint last_ReallyEnabled; + + /* VBI + */ + GLuint vbl_seq; + GLuint vblank_flags; + + int64_t swap_ust; + int64_t swap_missed_ust; + + GLuint swap_count; + GLuint swap_missed_count; + + /* radeon_tcl.c + */ + struct radeon_tcl_info tcl; + + /* radeon_swtcl.c + */ + struct radeon_swtcl_info swtcl; + + /* Mirrors of some DRI state + */ + struct radeon_dri_mirror dri; + + /* Configuration cache + */ + driOptionCache optionCache; + + GLboolean using_hyperz; + GLboolean texmicrotile; + + /* Performance counters + */ + GLuint boxes; /* Draw performance boxes */ + GLuint hardwareWentIdle; + GLuint c_clears; + GLuint c_drawWaits; + GLuint c_textureSwaps; + GLuint c_textureBytes; + GLuint c_vertexBuffers; }; #define RADEON_CONTEXT(ctx) ((radeonContextPtr)(ctx->DriverCtx)) - -static __inline GLuint radeonPackColor( GLuint cpp, - GLubyte r, GLubyte g, - GLubyte b, GLubyte a ) +static __inline GLuint radeonPackColor(GLuint cpp, + GLubyte r, GLubyte g, + GLubyte b, GLubyte a) { - switch ( cpp ) { - case 2: - return PACK_COLOR_565( r, g, b ); - case 4: - return PACK_COLOR_8888( a, r, g, b ); - default: - return 0; - } + switch (cpp) { + case 2: + return PACK_COLOR_565(r, g, b); + case 4: + return PACK_COLOR_8888(a, r, g, b); + default: + return 0; + } } #define RADEON_OLD_PACKETS 1 - -extern void radeonDestroyContext( __DRIcontextPrivate *driContextPriv ); -extern GLboolean radeonCreateContext(const __GLcontextModes *glVisual, - __DRIcontextPrivate *driContextPriv, +extern void radeonDestroyContext(__DRIcontextPrivate * driContextPriv); +extern GLboolean radeonCreateContext(const __GLcontextModes * glVisual, + __DRIcontextPrivate * driContextPriv, void *sharedContextPrivate); -extern void radeonSwapBuffers( __DRIdrawablePrivate *dPriv ); +extern void radeonSwapBuffers(__DRIdrawablePrivate * dPriv); extern void radeonCopySubBuffer(__DRIdrawablePrivate * dPriv, int x, int y, int w, int h); -extern GLboolean radeonMakeCurrent( __DRIcontextPrivate *driContextPriv, - __DRIdrawablePrivate *driDrawPriv, - __DRIdrawablePrivate *driReadPriv ); -extern GLboolean radeonUnbindContext( __DRIcontextPrivate *driContextPriv ); +extern GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv, + __DRIdrawablePrivate * driDrawPriv, + __DRIdrawablePrivate * driReadPriv); +extern GLboolean radeonUnbindContext(__DRIcontextPrivate * driContextPriv); /* ================================================================ * Debugging: @@ -766,18 +747,18 @@ extern int RADEON_DEBUG; #define RADEON_DEBUG 0 #endif -#define DEBUG_TEXTURE 0x001 -#define DEBUG_STATE 0x002 -#define DEBUG_IOCTL 0x004 -#define DEBUG_PRIMS 0x008 -#define DEBUG_VERTS 0x010 -#define DEBUG_FALLBACKS 0x020 -#define DEBUG_VFMT 0x040 -#define DEBUG_CODEGEN 0x080 -#define DEBUG_VERBOSE 0x100 -#define DEBUG_DRI 0x200 -#define DEBUG_DMA 0x400 -#define DEBUG_SANITY 0x800 -#define DEBUG_SYNC 0x1000 - -#endif /* __RADEON_CONTEXT_H__ */ +#define DEBUG_TEXTURE 0x0001 +#define DEBUG_STATE 0x0002 +#define DEBUG_IOCTL 0x0004 +#define DEBUG_PRIMS 0x0008 +#define DEBUG_VERTS 0x0010 +#define DEBUG_FALLBACKS 0x0020 +#define DEBUG_VFMT 0x0040 +#define DEBUG_CODEGEN 0x0080 +#define DEBUG_VERBOSE 0x0100 +#define DEBUG_DRI 0x0200 +#define DEBUG_DMA 0x0400 +#define DEBUG_SANITY 0x0800 +#define DEBUG_SYNC 0x1000 + +#endif /* __RADEON_CONTEXT_H__ */ diff --git a/src/mesa/drivers/dri/radeon/radeon_lock.c b/src/mesa/drivers/dri/radeon/radeon_lock.c index 312041e035..30a0c3863c 100644 --- a/src/mesa/drivers/dri/radeon/radeon_lock.c +++ b/src/mesa/drivers/dri/radeon/radeon_lock.c @@ -1,8 +1,12 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_lock.c,v 1.5 2002/10/30 12:51:55 alanh Exp $ */ /************************************************************************** Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and VA Linux Systems Inc., Fremont, California. +Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. + +The Weather Channel (TM) funded Tungsten Graphics to develop the +initial release of the Radeon 8500 driver under the XFree86 license. +This notice must be preserved. All Rights Reserved. @@ -30,8 +34,9 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. /* * Authors: - * Kevin E. Martin <martin@valinux.com> * Gareth Hughes <gareth@valinux.com> + * Keith Whitwell <keith@tungstengraphics.com> + * Kevin E. Martin <martin@valinux.com> */ #include "glheader.h" @@ -44,7 +49,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "drirenderbuffer.h" - #if DEBUG_LOCKING char *prevLockFile = NULL; int prevLockLine = 0; @@ -52,17 +56,15 @@ int prevLockLine = 0; /* Turn on/off page flipping according to the flags in the sarea: */ -static void -radeonUpdatePageFlipping( radeonContextPtr rmesa ) +static void radeonUpdatePageFlipping(radeonContextPtr rmesa) { - rmesa->doPageFlip = rmesa->sarea->pfState; - if (rmesa->glCtx->WinSysDrawBuffer) { - driFlipRenderbuffers(rmesa->glCtx->WinSysDrawBuffer, - rmesa->sarea->pfCurrentPage); - } + rmesa->doPageFlip = rmesa->sarea->pfState; + if (rmesa->glCtx->WinSysDrawBuffer) { + driFlipRenderbuffers(rmesa->glCtx->WinSysDrawBuffer, + rmesa->sarea->pfCurrentPage); + } } - /* Update the hardware state. This is called if another context has * grabbed the hardware lock, which includes the X server. This * function also updates the driver's window state after the X server @@ -71,51 +73,52 @@ radeonUpdatePageFlipping( radeonContextPtr rmesa ) * the hardware lock when it changes the window state, this routine will * automatically be called after such a change. */ -void radeonGetLock( radeonContextPtr rmesa, GLuint flags ) +void radeonGetLock(radeonContextPtr rmesa, GLuint flags) { - __DRIdrawablePrivate *const drawable = rmesa->dri.drawable; - __DRIdrawablePrivate *const readable = rmesa->dri.readable; - __DRIscreenPrivate *sPriv = rmesa->dri.screen; - drm_radeon_sarea_t *sarea = rmesa->sarea; - - drmGetLock( rmesa->dri.fd, rmesa->dri.hwContext, flags ); - - /* The window might have moved, so we might need to get new clip - * rects. - * - * NOTE: This releases and regrabs the hw lock to allow the X server - * to respond to the DRI protocol request for new drawable info. - * Since the hardware state depends on having the latest drawable - * clip rects, all state checking must be done _after_ this call. - */ - DRI_VALIDATE_DRAWABLE_INFO( sPriv, drawable ); - if (drawable != readable) { - DRI_VALIDATE_DRAWABLE_INFO( sPriv, readable ); - } - - if ( rmesa->lastStamp != drawable->lastStamp ) { - radeonUpdatePageFlipping( rmesa ); - radeonSetCliprects( rmesa ); - radeonUpdateViewportOffset( rmesa->glCtx ); - driUpdateFramebufferSize(rmesa->glCtx, drawable); - } - - RADEON_STATECHANGE( rmesa, ctx ); - if (rmesa->sarea->tiling_enabled) { - rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |= RADEON_COLOR_TILE_ENABLE; - } - else { - rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] &= ~RADEON_COLOR_TILE_ENABLE; - } - - if ( sarea->ctx_owner != rmesa->dri.hwContext ) { - int i; - sarea->ctx_owner = rmesa->dri.hwContext; - - for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) { - DRI_AGE_TEXTURES( rmesa->texture_heaps[ i ] ); - } - } - - rmesa->lost_context = GL_TRUE; + __DRIdrawablePrivate *const drawable = rmesa->dri.drawable; + __DRIdrawablePrivate *const readable = rmesa->dri.readable; + __DRIscreenPrivate *sPriv = rmesa->dri.screen; + drm_radeon_sarea_t *sarea = rmesa->sarea; + + drmGetLock(rmesa->dri.fd, rmesa->dri.hwContext, flags); + + /* The window might have moved, so we might need to get new clip + * rects. + * + * NOTE: This releases and regrabs the hw lock to allow the X server + * to respond to the DRI protocol request for new drawable info. + * Since the hardware state depends on having the latest drawable + * clip rects, all state checking must be done _after_ this call. + */ + DRI_VALIDATE_DRAWABLE_INFO(sPriv, drawable); + if (drawable != readable) { + DRI_VALIDATE_DRAWABLE_INFO(sPriv, readable); + } + + if (rmesa->lastStamp != drawable->lastStamp) { + radeonUpdatePageFlipping(rmesa); + radeonSetCliprects(rmesa); + radeonUpdateViewportOffset(rmesa->glCtx); + driUpdateFramebufferSize(rmesa->glCtx, drawable); + } + + RADEON_STATECHANGE(rmesa, ctx); + if (rmesa->sarea->tiling_enabled) { + rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |= + RADEON_COLOR_TILE_ENABLE; + } else { + rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] &= + ~RADEON_COLOR_TILE_ENABLE; + } + + if (sarea->ctx_owner != rmesa->dri.hwContext) { + int i; + sarea->ctx_owner = rmesa->dri.hwContext; + + for (i = 0; i < rmesa->nr_heaps; i++) { + DRI_AGE_TEXTURES(rmesa->texture_heaps[i]); + } + } + + rmesa->lost_context = GL_TRUE; } diff --git a/src/mesa/drivers/dri/radeon/radeon_lock.h b/src/mesa/drivers/dri/radeon/radeon_lock.h index 4e8617eb8f..86e96aa7d2 100644 --- a/src/mesa/drivers/dri/radeon/radeon_lock.h +++ b/src/mesa/drivers/dri/radeon/radeon_lock.h @@ -1,8 +1,12 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_lock.h,v 1.3 2002/10/30 12:51:55 alanh Exp $ */ /************************************************************************** Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and VA Linux Systems Inc., Fremont, California. +Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. + +The Weather Channel (TM) funded Tungsten Graphics to develop the +initial release of the Radeon 8500 driver under the XFree86 license. +This notice must be preserved. All Rights Reserved. @@ -30,14 +34,15 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. /* * Authors: - * Kevin E. Martin <martin@valinux.com> * Gareth Hughes <gareth@valinux.com> + * Keith Whitwell <keith@tungstengraphics.com> + * Kevin E. Martin <martin@valinux.com> */ #ifndef __RADEON_LOCK_H__ #define __RADEON_LOCK_H__ -extern void radeonGetLock( radeonContextPtr rmesa, GLuint flags ); +extern void radeonGetLock(radeonContextPtr rmesa, GLuint flags); /* Turn DEBUG_LOCKING on to find locking conflicts. */ @@ -83,26 +88,25 @@ extern int prevLockLine; * do not do any drawing !!! */ - /* Lock the hardware and validate our state. */ #define LOCK_HARDWARE( rmesa ) \ do { \ char __ret = 0; \ DEBUG_CHECK_LOCK(); \ - DRM_CAS( rmesa->dri.hwLock, rmesa->dri.hwContext, \ - (DRM_LOCK_HELD | rmesa->dri.hwContext), __ret ); \ + DRM_CAS( (rmesa)->dri.hwLock, (rmesa)->dri.hwContext, \ + (DRM_LOCK_HELD | (rmesa)->dri.hwContext), __ret ); \ if ( __ret ) \ - radeonGetLock( rmesa, 0 ); \ + radeonGetLock( (rmesa), 0 ); \ DEBUG_LOCK(); \ } while (0) #define UNLOCK_HARDWARE( rmesa ) \ do { \ - DRM_UNLOCK( rmesa->dri.fd, \ - rmesa->dri.hwLock, \ - rmesa->dri.hwContext ); \ + DRM_UNLOCK( (rmesa)->dri.fd, \ + (rmesa)->dri.hwLock, \ + (rmesa)->dri.hwContext ); \ DEBUG_RESET(); \ } while (0) -#endif /* __RADEON_LOCK_H__ */ +#endif /* __RADEON_LOCK_H__ */ diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c index b0c8fae285..aa7fb633dd 100644 --- a/src/mesa/drivers/dri/radeon/radeon_screen.c +++ b/src/mesa/drivers/dri/radeon/radeon_screen.c @@ -56,6 +56,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #elif RADEON_COMMON && defined(RADEON_COMMON_FOR_R300) #include "r300_context.h" #include "r300_fragprog.h" +#include "r300_tex.h" #include "radeon_span.h" #endif @@ -656,8 +657,7 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv ) case PCI_CHIP_RC410_5A61: case PCI_CHIP_RC410_5A62: screen->chip_family = CHIP_FAMILY_RS400; - fprintf(stderr, "Warning, xpress200 detected. Won't work.\n"); - return NULL; + fprintf(stderr, "Warning, xpress200 detected.\n"); break; default: @@ -953,6 +953,9 @@ static struct __DriverAPIRec radeonAPI = { .WaitForSBC = NULL, .SwapBuffersMSC = NULL, .CopySubBuffer = radeonCopySubBuffer, +#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R300) + .setTexOffset = r300SetTexOffset, +#endif }; #else static const struct __DriverAPIRec r200API = { diff --git a/src/mesa/drivers/dri/radeon/radeon_span.c b/src/mesa/drivers/dri/radeon/radeon_span.c index c49f5870c6..732a85ecf0 100644 --- a/src/mesa/drivers/dri/radeon/radeon_span.c +++ b/src/mesa/drivers/dri/radeon/radeon_span.c @@ -1,9 +1,13 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_span.c,v 1.6 2002/10/30 12:51:56 alanh Exp $ */ /************************************************************************** +Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and VA Linux Systems Inc., Fremont, California. +The Weather Channel (TM) funded Tungsten Graphics to develop the +initial release of the Radeon 8500 driver under the XFree86 license. +This notice must be preserved. + All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining @@ -47,10 +51,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "drirenderbuffer.h" - #define DBG 0 - /* * Note that all information needed to access pixels in a renderbuffer * should be obtained through the gl_renderbuffer parameter, not per-context @@ -81,8 +83,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define HW_UNLOCK() - - /* ================================================================ * Color buffer */ @@ -97,7 +97,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define GET_PTR(X,Y) (buf + ((Y) * drb->flippedPitch + (X)) * 2) #include "spantmp2.h" - /* 32 bit, ARGB8888 color spanline and pixel functions */ #define SPANTMP_PIXEL_FMT GL_BGRA @@ -108,7 +107,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define GET_PTR(X,Y) (buf + ((Y) * drb->flippedPitch + (X)) * 4) #include "spantmp2.h" - /* ================================================================ * Depth buffer */ @@ -123,59 +121,56 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * too... */ -static GLuint -radeon_mba_z32( const driRenderbuffer *drb, GLint x, GLint y ) +static GLuint radeon_mba_z32(const driRenderbuffer * drb, GLint x, GLint y) { - GLuint pitch = drb->pitch; - if (drb->depthHasSurface) { - return 4 * (x + y * pitch); - } - else { - GLuint ba, address = 0; /* a[0..1] = 0 */ - - ba = (y / 16) * (pitch / 16) + (x / 16); - - address |= (x & 0x7) << 2; /* a[2..4] = x[0..2] */ - address |= (y & 0x3) << 5; /* a[5..6] = y[0..1] */ - address |= - (((x & 0x10) >> 2) ^ (y & 0x4)) << 5; /* a[7] = x[4] ^ y[2] */ - address |= (ba & 0x3) << 8; /* a[8..9] = ba[0..1] */ - - address |= (y & 0x8) << 7; /* a[10] = y[3] */ - address |= - (((x & 0x8) << 1) ^ (y & 0x10)) << 7; /* a[11] = x[3] ^ y[4] */ - address |= (ba & ~0x3) << 10; /* a[12..] = ba[2..] */ - - return address; - } + GLuint pitch = drb->pitch; + if (drb->depthHasSurface) { + return 4 * (x + y * pitch); + } else { + GLuint ba, address = 0; /* a[0..1] = 0 */ + +#ifdef COMPILE_R300 + ba = (y / 8) * (pitch / 8) + (x / 8); +#else + ba = (y / 16) * (pitch / 16) + (x / 16); +#endif + + address |= (x & 0x7) << 2; /* a[2..4] = x[0..2] */ + address |= (y & 0x3) << 5; /* a[5..6] = y[0..1] */ + address |= (((x & 0x10) >> 2) ^ (y & 0x4)) << 5; /* a[7] = x[4] ^ y[2] */ + address |= (ba & 0x3) << 8; /* a[8..9] = ba[0..1] */ + + address |= (y & 0x8) << 7; /* a[10] = y[3] */ + address |= (((x & 0x8) << 1) ^ (y & 0x10)) << 7; /* a[11] = x[3] ^ y[4] */ + address |= (ba & ~0x3) << 10; /* a[12..] = ba[2..] */ + + return address; + } } - static INLINE GLuint -radeon_mba_z16( const driRenderbuffer *drb, GLint x, GLint y ) +radeon_mba_z16(const driRenderbuffer * drb, GLint x, GLint y) { - GLuint pitch = drb->pitch; - if (drb->depthHasSurface) { - return 2 * (x + y * pitch); - } - else { - GLuint ba, address = 0; /* a[0] = 0 */ - - ba = (y / 16) * (pitch / 32) + (x / 32); - - address |= (x & 0x7) << 1; /* a[1..3] = x[0..2] */ - address |= (y & 0x7) << 4; /* a[4..6] = y[0..2] */ - address |= (x & 0x8) << 4; /* a[7] = x[3] */ - address |= (ba & 0x3) << 8; /* a[8..9] = ba[0..1] */ - address |= (y & 0x8) << 7; /* a[10] = y[3] */ - address |= ((x & 0x10) ^ (y & 0x10)) << 7;/* a[11] = x[4] ^ y[4] */ - address |= (ba & ~0x3) << 10; /* a[12..] = ba[2..] */ - - return address; - } + GLuint pitch = drb->pitch; + if (drb->depthHasSurface) { + return 2 * (x + y * pitch); + } else { + GLuint ba, address = 0; /* a[0] = 0 */ + + ba = (y / 16) * (pitch / 32) + (x / 32); + + address |= (x & 0x7) << 1; /* a[1..3] = x[0..2] */ + address |= (y & 0x7) << 4; /* a[4..6] = y[0..2] */ + address |= (x & 0x8) << 4; /* a[7] = x[3] */ + address |= (ba & 0x3) << 8; /* a[8..9] = ba[0..1] */ + address |= (y & 0x8) << 7; /* a[10] = y[3] */ + address |= ((x & 0x10) ^ (y & 0x10)) << 7; /* a[11] = x[4] ^ y[4] */ + address |= (ba & ~0x3) << 10; /* a[12..] = ba[2..] */ + + return address; + } } - /* 16-bit depth buffer functions */ #define WRITE_DEPTH( _x, _y, d ) \ @@ -187,9 +182,21 @@ radeon_mba_z16( const driRenderbuffer *drb, GLint x, GLint y ) #define TAG(x) radeon##x##_z16 #include "depthtmp.h" - /* 24 bit depth, 8 bit stencil depthbuffer functions + * + * Careful: It looks like the R300 uses ZZZS byte order while the R200 + * uses SZZZ for 24 bit depth, 8 bit stencil mode. */ +#ifdef COMPILE_R300 +#define WRITE_DEPTH( _x, _y, d ) \ +do { \ + GLuint offset = radeon_mba_z32( drb, _x + xo, _y + yo ); \ + GLuint tmp = *(GLuint *)(buf + offset); \ + tmp &= 0x000000ff; \ + tmp |= ((d << 8) & 0xffffff00); \ + *(GLuint *)(buf + offset) = tmp; \ +} while (0) +#else #define WRITE_DEPTH( _x, _y, d ) \ do { \ GLuint offset = radeon_mba_z32( drb, _x + xo, _y + yo ); \ @@ -198,21 +205,39 @@ do { \ tmp |= ((d) & 0x00ffffff); \ *(GLuint *)(buf + offset) = tmp; \ } while (0) +#endif +#ifdef COMPILE_R300 +#define READ_DEPTH( d, _x, _y ) \ + do { \ + d = (*(GLuint *)(buf + radeon_mba_z32( drb, _x + xo, \ + _y + yo )) & 0xffffff00) >> 8; \ + }while(0) +#else #define READ_DEPTH( d, _x, _y ) \ d = *(GLuint *)(buf + radeon_mba_z32( drb, _x + xo, \ _y + yo )) & 0x00ffffff; +#endif #define TAG(x) radeon##x##_z24_s8 #include "depthtmp.h" - /* ================================================================ * Stencil buffer */ /* 24 bit depth, 8 bit stencil depthbuffer functions */ +#ifdef COMPILE_R300 +#define WRITE_STENCIL( _x, _y, d ) \ +do { \ + GLuint offset = radeon_mba_z32( drb, _x + xo, _y + yo ); \ + GLuint tmp = *(GLuint *)(buf + offset); \ + tmp &= 0xffffff00; \ + tmp |= (d) & 0xff; \ + *(GLuint *)(buf + offset) = tmp; \ +} while (0) +#else #define WRITE_STENCIL( _x, _y, d ) \ do { \ GLuint offset = radeon_mba_z32( drb, _x + xo, _y + yo ); \ @@ -221,69 +246,77 @@ do { \ tmp |= (((d) & 0xff) << 24); \ *(GLuint *)(buf + offset) = tmp; \ } while (0) +#endif +#ifdef COMPILE_R300 #define READ_STENCIL( d, _x, _y ) \ do { \ GLuint offset = radeon_mba_z32( drb, _x + xo, _y + yo ); \ GLuint tmp = *(GLuint *)(buf + offset); \ - tmp &= 0xff000000; \ - d = tmp >> 24; \ + d = tmp & 0x000000ff; \ } while (0) +#else +#define READ_STENCIL( d, _x, _y ) \ +do { \ + GLuint offset = radeon_mba_z32( drb, _x + xo, _y + yo ); \ + GLuint tmp = *(GLuint *)(buf + offset); \ + d = (tmp & 0xff000000) >> 24; \ +} while (0) +#endif #define TAG(x) radeon##x##_z24_s8 #include "stenciltmp.h" - - /* Move locking out to get reasonable span performance (10x better * than doing this in HW_LOCK above). WaitForIdle() is the main * culprit. */ -static void radeonSpanRenderStart( GLcontext *ctx ) +static void radeonSpanRenderStart(GLcontext * ctx) { - radeonContextPtr rmesa = RADEON_CONTEXT( ctx ); - RADEON_FIREVERTICES( rmesa ); - LOCK_HARDWARE( rmesa ); - radeonWaitForIdleLocked( rmesa ); + radeonContextPtr rmesa = RADEON_CONTEXT(ctx); +#ifdef COMPILE_R300 + r300ContextPtr r300 = (r300ContextPtr) rmesa; + R300_FIREVERTICES(r300); +#else + RADEON_FIREVERTICES(rmesa); +#endif + LOCK_HARDWARE(rmesa); + radeonWaitForIdleLocked(rmesa); } -static void radeonSpanRenderFinish( GLcontext *ctx ) +static void radeonSpanRenderFinish(GLcontext * ctx) { - radeonContextPtr rmesa = RADEON_CONTEXT( ctx ); - _swrast_flush( ctx ); - UNLOCK_HARDWARE( rmesa ); + radeonContextPtr rmesa = RADEON_CONTEXT(ctx); + _swrast_flush(ctx); + UNLOCK_HARDWARE(rmesa); } -void radeonInitSpanFuncs( GLcontext *ctx ) +void radeonInitSpanFuncs(GLcontext * ctx) { - struct swrast_device_driver *swdd = _swrast_GetDeviceDriverReference(ctx); - swdd->SpanRenderStart = radeonSpanRenderStart; - swdd->SpanRenderFinish = radeonSpanRenderFinish; + struct swrast_device_driver *swdd = + _swrast_GetDeviceDriverReference(ctx); + swdd->SpanRenderStart = radeonSpanRenderStart; + swdd->SpanRenderFinish = radeonSpanRenderFinish; } - /** * Plug in the Get/Put routines for the given driRenderbuffer. */ -void -radeonSetSpanFunctions(driRenderbuffer *drb, const GLvisual *vis) +void radeonSetSpanFunctions(driRenderbuffer * drb, const GLvisual * vis) { - if (drb->Base.InternalFormat == GL_RGBA) { - if (vis->redBits == 5 && vis->greenBits == 6 && vis->blueBits == 5) { - radeonInitPointers_RGB565(&drb->Base); - } - else { - radeonInitPointers_ARGB8888(&drb->Base); - } - } - else if (drb->Base.InternalFormat == GL_DEPTH_COMPONENT16) { - radeonInitDepthPointers_z16(&drb->Base); - } - else if (drb->Base.InternalFormat == GL_DEPTH_COMPONENT24) { - radeonInitDepthPointers_z24_s8(&drb->Base); - } - else if (drb->Base.InternalFormat == GL_STENCIL_INDEX8_EXT) { - radeonInitStencilPointers_z24_s8(&drb->Base); - } + if (drb->Base.InternalFormat == GL_RGBA) { + if (vis->redBits == 5 && vis->greenBits == 6 + && vis->blueBits == 5) { + radeonInitPointers_RGB565(&drb->Base); + } else { + radeonInitPointers_ARGB8888(&drb->Base); + } + } else if (drb->Base.InternalFormat == GL_DEPTH_COMPONENT16) { + radeonInitDepthPointers_z16(&drb->Base); + } else if (drb->Base.InternalFormat == GL_DEPTH_COMPONENT24) { + radeonInitDepthPointers_z24_s8(&drb->Base); + } else if (drb->Base.InternalFormat == GL_STENCIL_INDEX8_EXT) { + radeonInitStencilPointers_z24_s8(&drb->Base); + } } diff --git a/src/mesa/drivers/dri/radeon/radeon_span.h b/src/mesa/drivers/dri/radeon/radeon_span.h index 13b308e1c4..9abe0864b1 100644 --- a/src/mesa/drivers/dri/radeon/radeon_span.h +++ b/src/mesa/drivers/dri/radeon/radeon_span.h @@ -1,8 +1,12 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_span.h,v 1.2 2002/02/22 21:45:01 dawes Exp $ */ /************************************************************************** Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and VA Linux Systems Inc., Fremont, California. +Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. + +The Weather Channel (TM) funded Tungsten Graphics to develop the +initial release of the Radeon 8500 driver under the XFree86 license. +This notice must be preserved. All Rights Reserved. @@ -30,8 +34,9 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. /* * Authors: - * Kevin E. Martin <martin@valinux.com> * Gareth Hughes <gareth@valinux.com> + * Keith Whitwell <keith@tungstengraphics.com> + * Kevin E. Martin <martin@valinux.com> */ #ifndef __RADEON_SPAN_H__ @@ -39,8 +44,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "drirenderbuffer.h" -extern void radeonInitSpanFuncs( GLcontext *ctx ); - -extern void radeonSetSpanFunctions(driRenderbuffer *rb, const GLvisual *vis); +extern void radeonInitSpanFuncs(GLcontext * ctx); +extern void radeonSetSpanFunctions(driRenderbuffer * rb, const GLvisual * vis); #endif diff --git a/src/mesa/drivers/dri/s3v/s3v_tritmp.h b/src/mesa/drivers/dri/s3v/s3v_tritmp.h index 696fc02250..2321bd414f 100644 --- a/src/mesa/drivers/dri/s3v/s3v_tritmp.h +++ b/src/mesa/drivers/dri/s3v/s3v_tritmp.h @@ -43,12 +43,12 @@ #define SORT_LINE_VERT() \ do { \ - if(v[0].win[1] <= v[1].win[1]) { \ + if(v[0].attrib[FRAG_ATTRIB_WPOS][1] <= v[1].attrib[FRAG_ATTRIB_WPOS][1]) { \ \ idx[0] = 0; \ idx[1] = 1; \ \ - } else if (v[0].win[1] > v[1].win[1]) { \ + } else if (v[0].attrib[FRAG_ATTRIB_WPOS][1] > v[1].attrib[FRAG_ATTRIB_WPOS][1]) { \ \ idx[0] = 1; \ idx[1] = 0; \ @@ -58,19 +58,19 @@ do { \ #define SET_LINE_VERT() \ do { \ - x[0] = (v[idx[0]].win[0] * 1024.0f * 1024.0f); /* 0x100000 */ \ - y[0] = fy[0] = dPriv->h - v[idx[0]].win[1]; \ - z[0] = (v[idx[0]].win[2]) * 1024.0f * 32.0f; /* 0x8000; */ \ + x[0] = (v[idx[0]].attrib[FRAG_ATTRIB_WPOS][0] * 1024.0f * 1024.0f); /* 0x100000 */ \ + y[0] = fy[0] = dPriv->h - v[idx[0]].attrib[FRAG_ATTRIB_WPOS][1]; \ + z[0] = (v[idx[0]].attrib[FRAG_ATTRIB_WPOS][2]) * 1024.0f * 32.0f; /* 0x8000; */ \ \ - x[1] = (v[idx[1]].win[0] * 1024.0f * 1024.0f); /* 0x100000 */ \ - y[1] = dPriv->h - v[idx[1]].win[1]; \ - z[1] = (v[idx[1]].win[2]) * 1024.0f * 32.0f; /* 0x8000 */ \ + x[1] = (v[idx[1]].attrib[FRAG_ATTRIB_WPOS][0] * 1024.0f * 1024.0f); /* 0x100000 */ \ + y[1] = dPriv->h - v[idx[1]].attrib[FRAG_ATTRIB_WPOS][1]; \ + z[1] = (v[idx[1]].attrib[FRAG_ATTRIB_WPOS][2]) * 1024.0f * 32.0f; /* 0x8000 */ \ } while(0) #define SET_LINE_XY() \ do { \ - tmp = v[idx[0]].win[0]; \ - tmp2 = v[idx[1]].win[0]; \ + tmp = v[idx[0]].attrib[FRAG_ATTRIB_WPOS][0]; \ + tmp2 = v[idx[1]].attrib[FRAG_ATTRIB_WPOS][0]; \ \ dx01 = x[0] - x[1]; \ dy01 = y[0] - y[1]; \ @@ -265,7 +265,7 @@ do { \ #define SORT_VERT() \ do { \ for (i=0; i<3; i++) \ - fy[i] = v[i].win[1]; \ + fy[i] = v[i].attrib[FRAG_ATTRIB_WPOS][1]; \ \ if (fy[1] > fy[0]) { /* (fy[1] > fy[0]) */ \ \ @@ -305,9 +305,9 @@ do { \ do { \ for (i=0; i<3; i++) \ { \ - x[i] = ((v[idx[i]].win[0]) * /* 0x100000*/ 1024.0 * 1024.0); \ - y[i] = fy[i] = (dPriv->h - v[idx[i]].win[1]); \ - z[i] = ((v[idx[i]].win[2]) * /* 0x8000 */ 1024.0 * 32.0); \ + x[i] = ((v[idx[i]].attrib[FRAG_ATTRIB_WPOS][0]) * /* 0x100000*/ 1024.0 * 1024.0); \ + y[i] = fy[i] = (dPriv->h - v[idx[i]].attrib[FRAG_ATTRIB_WPOS][1]); \ + z[i] = ((v[idx[i]].attrib[FRAG_ATTRIB_WPOS][2]) * /* 0x8000 */ 1024.0 * 32.0); \ } \ \ ydiff = fy[0] - (float)y[0]; \ @@ -420,9 +420,9 @@ do { \ v2 = (v[idx[2]].attrib[FRAG_ATTRIB_TEX0][1] \ * (GLfloat)(t->globj->Image[0][0]->Height) * 256.0); \ \ - w0 = (v[idx[0]].win[3]); \ - w1 = (v[idx[1]].win[3]); \ - w2 = (v[idx[2]].win[3]); \ + w0 = (v[idx[0]].attrib[FRAG_ATTRIB_WPOS][3]); \ + w1 = (v[idx[1]].attrib[FRAG_ATTRIB_WPOS][3]); \ + w2 = (v[idx[2]].attrib[FRAG_ATTRIB_WPOS][3]); \ } while (0) #define SET_BASEUV() \ @@ -732,8 +732,8 @@ DEBUG(("***\n")); #if (IND & S3V_RAST_CULL_BIT) cull = vmesa->backface_sign * - ((v[1].win[0] - v[0].win[0]) * (v[0].win[1] - v[2].win[1]) + - (v[1].win[1] - v[0].win[1]) * (v[2].win[0] - v[0].win[0])); + ((v[1].attrib[FRAG_ATTRIB_WPOS][0] - v[0].attrib[FRAG_ATTRIB_WPOS][0]) * (v[0].attrib[FRAG_ATTRIB_WPOS][1] - v[2].attrib[FRAG_ATTRIB_WPOS][1]) + + (v[1].attrib[FRAG_ATTRIB_WPOS][1] - v[0].attrib[FRAG_ATTRIB_WPOS][1]) * (v[2].attrib[FRAG_ATTRIB_WPOS][0] - v[0].attrib[FRAG_ATTRIB_WPOS][0])); if (cull < vmesa->cull_zero /* -0.02f */) return; #endif @@ -842,8 +842,8 @@ static void TAG(s3v_quad)( s3vContextPtr vmesa, #if (IND & S3V_RAST_CULL_BIT) cull = vmesa->backface_sign * - ((v[1].win[0] - v[0].win[0]) * (v[0].win[1] - v[2].win[1]) + - (v[1].win[1] - v[0].win[1]) * (v[2].win[0] - v[0].win[0])); + ((v[1].attrib[FRAG_ATTRIB_WPOS][0] - v[0].attrib[FRAG_ATTRIB_WPOS][0]) * (v[0].attrib[FRAG_ATTRIB_WPOS][1] - v[2].attrib[FRAG_ATTRIB_WPOS][1]) + + (v[1].attrib[FRAG_ATTRIB_WPOS][1] - v[0].attrib[FRAG_ATTRIB_WPOS][1]) * (v[2].attrib[FRAG_ATTRIB_WPOS][0] - v[0].attrib[FRAG_ATTRIB_WPOS][0])); if (cull < vmesa->cull_zero /* -0.02f */) goto second; /* return; */ /* (a) */ #endif @@ -897,8 +897,8 @@ second: #if (IND & S3V_RAST_CULL_BIT) cull = vmesa->backface_sign * - ((v[1].win[0] - v[0].win[0]) * (v[0].win[1] - v[2].win[1]) + - (v[1].win[1] - v[0].win[1]) * (v[2].win[0] - v[0].win[0])); + ((v[1].attrib[FRAG_ATTRIB_WPOS][0] - v[0].attrib[FRAG_ATTRIB_WPOS][0]) * (v[0].attrib[FRAG_ATTRIB_WPOS][1] - v[2].attrib[FRAG_ATTRIB_WPOS][1]) + + (v[1].attrib[FRAG_ATTRIB_WPOS][1] - v[0].attrib[FRAG_ATTRIB_WPOS][1]) * (v[2].attrib[FRAG_ATTRIB_WPOS][0] - v[0].attrib[FRAG_ATTRIB_WPOS][0])); if (cull < /* -0.02f */ vmesa->cull_zero) return; #endif diff --git a/src/mesa/drivers/dri/tdfx/tdfx_context.c b/src/mesa/drivers/dri/tdfx/tdfx_context.c index a9163f49a8..b4eea2566f 100644 --- a/src/mesa/drivers/dri/tdfx/tdfx_context.c +++ b/src/mesa/drivers/dri/tdfx/tdfx_context.c @@ -165,12 +165,6 @@ static const struct tnl_pipeline_stage *tdfx_pipeline[] = { &_tnl_texgen_stage, &_tnl_texture_transform_stage, &_tnl_point_attenuation_stage, -#if 0 -#if defined(FEATURE_NV_vertex_program) || defined(FEATURE_ARB_vertex_program) - &_tnl_arb_vertex_program_stage, - &_tnl_vertex_program_stage, -#endif -#endif &_tnl_render_stage, 0, }; diff --git a/src/mesa/drivers/dri/tdfx/tdfx_tris.c b/src/mesa/drivers/dri/tdfx/tdfx_tris.c index 4ba2f40b9e..96f9ae27fc 100644 --- a/src/mesa/drivers/dri/tdfx/tdfx_tris.c +++ b/src/mesa/drivers/dri/tdfx/tdfx_tris.c @@ -142,10 +142,10 @@ tdfx_translate_vertex( GLcontext *ctx, const tdfxVertex *src, SWvertex *dst) tdfxContextPtr fxMesa = TDFX_CONTEXT(ctx); if (fxMesa->vertexFormat == TDFX_LAYOUT_TINY) { - dst->win[0] = src->x - fxMesa->x_offset; - dst->win[1] = src->y - (fxMesa->screen_height - fxMesa->height - fxMesa->y_offset); - dst->win[2] = src->z; - dst->win[3] = 1.0; + dst->attrib[FRAG_ATTRIB_WPOS][0] = src->x - fxMesa->x_offset; + dst->attrib[FRAG_ATTRIB_WPOS][1] = src->y - (fxMesa->screen_height - fxMesa->height - fxMesa->y_offset); + dst->attrib[FRAG_ATTRIB_WPOS][2] = src->z; + dst->attrib[FRAG_ATTRIB_WPOS][3] = 1.0; dst->color[0] = src->color[2]; dst->color[1] = src->color[1]; @@ -155,10 +155,10 @@ tdfx_translate_vertex( GLcontext *ctx, const tdfxVertex *src, SWvertex *dst) else { GLfloat w = 1.0 / src->rhw; - dst->win[0] = src->x - fxMesa->x_offset; - dst->win[1] = src->y - (fxMesa->screen_height - fxMesa->height - fxMesa->y_offset); - dst->win[2] = src->z; - dst->win[3] = src->rhw; + dst->attrib[FRAG_ATTRIB_WPOS][0] = src->x - fxMesa->x_offset; + dst->attrib[FRAG_ATTRIB_WPOS][1] = src->y - (fxMesa->screen_height - fxMesa->height - fxMesa->y_offset); + dst->attrib[FRAG_ATTRIB_WPOS][2] = src->z; + dst->attrib[FRAG_ATTRIB_WPOS][3] = src->rhw; dst->color[0] = src->color[2]; dst->color[1] = src->color[1]; |