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-rw-r--r--src/mesa/drivers/dri/i915/intel_tris.c4
-rw-r--r--src/mesa/drivers/dri/intel/intel_reg.h4
-rw-r--r--src/mesa/drivers/dri/r200/r200_cmdbuf.c3
-rw-r--r--src/mesa/drivers/dri/r200/r200_tcl.c56
-rw-r--r--src/mesa/drivers/glslcompiler/Makefile3
-rw-r--r--src/mesa/drivers/x11/glxapi.c15
6 files changed, 50 insertions, 35 deletions
diff --git a/src/mesa/drivers/dri/i915/intel_tris.c b/src/mesa/drivers/dri/i915/intel_tris.c
index fb191fe346..81c4adeaf3 100644
--- a/src/mesa/drivers/dri/i915/intel_tris.c
+++ b/src/mesa/drivers/dri/i915/intel_tris.c
@@ -251,7 +251,7 @@ void intel_flush_prim(struct intel_context *intel)
BEGIN_BATCH(5);
OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
I1_LOAD_S(0) | I1_LOAD_S(1) | 1);
- assert((offset & !S0_VB_OFFSET_MASK) == 0);
+ assert((offset & ~S0_VB_OFFSET_MASK) == 0);
OUT_RELOC(vb_bo, I915_GEM_DOMAIN_VERTEX, 0, offset);
OUT_BATCH((intel->vertex_size << S1_VERTEX_WIDTH_SHIFT) |
(intel->vertex_size << S1_VERTEX_PITCH_SHIFT));
@@ -270,7 +270,7 @@ void intel_flush_prim(struct intel_context *intel)
OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
I1_LOAD_S(0) | I1_LOAD_S(2) | 1);
/* S0 */
- assert((offset & !S0_VB_OFFSET_MASK_830) == 0);
+ assert((offset & ~S0_VB_OFFSET_MASK_830) == 0);
OUT_RELOC(vb_bo, I915_GEM_DOMAIN_VERTEX, 0,
offset | (intel->vertex_size << S0_VB_PITCH_SHIFT_830) |
S0_VB_ENABLE_830);
diff --git a/src/mesa/drivers/dri/intel/intel_reg.h b/src/mesa/drivers/dri/intel/intel_reg.h
index d19f1bae34..36d8180598 100644
--- a/src/mesa/drivers/dri/intel/intel_reg.h
+++ b/src/mesa/drivers/dri/intel/intel_reg.h
@@ -70,8 +70,10 @@
/** @{
* 915 definitions
+ *
+ * 915 documents say that bits 31:28 and 1 are "undefined, must be zero."
*/
-#define S0_VB_OFFSET_MASK 0xffffffc0
+#define S0_VB_OFFSET_MASK 0x0ffffffc
#define S0_AUTO_CACHE_INV_DISABLE (1<<0)
/** @} */
diff --git a/src/mesa/drivers/dri/r200/r200_cmdbuf.c b/src/mesa/drivers/dri/r200/r200_cmdbuf.c
index 2f2b8d94dc..ad43a8ca92 100644
--- a/src/mesa/drivers/dri/r200/r200_cmdbuf.c
+++ b/src/mesa/drivers/dri/r200/r200_cmdbuf.c
@@ -189,7 +189,8 @@ void r200FlushElts(GLcontext *ctx)
if (R200_ELT_BUF_SZ > elt_used)
radeonReturnDmaRegion(&rmesa->radeon, R200_ELT_BUF_SZ - elt_used);
- if (radeon_is_debug_enabled(RADEON_SYNC, RADEON_CRITICAL)) {
+ if (radeon_is_debug_enabled(RADEON_SYNC, RADEON_CRITICAL)
+ && !rmesa->radeon.radeonScreen->kernel_mm) {
radeon_print(RADEON_SYNC, RADEON_NORMAL, "%s: Syncing\n", __FUNCTION__);
radeonFinish( rmesa->radeon.glCtx );
}
diff --git a/src/mesa/drivers/dri/r200/r200_tcl.c b/src/mesa/drivers/dri/r200/r200_tcl.c
index f3f558b7de..d43e14581e 100644
--- a/src/mesa/drivers/dri/r200/r200_tcl.c
+++ b/src/mesa/drivers/dri/r200/r200_tcl.c
@@ -404,8 +404,9 @@ static GLuint r200EnsureEmitSize( GLcontext * ctx , GLubyte* vimap_rev )
rendering code may decide convert to elts.
In that case we have to make pessimistic prediction.
and use larger of 2 paths. */
- const GLuint elts = ELTS_BUFSZ(nr_aos);
- const GLuint index = INDEX_BUFSZ;
+ const GLuint elt_count =(VB->Primitive[i].count/GET_MAX_HW_ELTS() + 1);
+ const GLuint elts = ELTS_BUFSZ(nr_aos) * elt_count;
+ const GLuint index = INDEX_BUFSZ * elt_count;
const GLuint vbuf = VBUF_BUFSZ;
if ( (!VB->Elts && VB->Primitive[i].count >= MAX_CONVERSION_SIZE)
|| vbuf > index + elts)
@@ -687,25 +688,34 @@ static char *getFallbackString(GLuint bit)
void r200TclFallback( GLcontext *ctx, GLuint bit, GLboolean mode )
{
- r200ContextPtr rmesa = R200_CONTEXT(ctx);
- GLuint oldfallback = rmesa->radeon.TclFallback;
-
- if (mode) {
- rmesa->radeon.TclFallback |= bit;
- if (oldfallback == 0) {
- if (R200_DEBUG & RADEON_FALLBACKS)
- fprintf(stderr, "R200 begin tcl fallback %s\n",
- getFallbackString( bit ));
- transition_to_swtnl( ctx );
- }
- }
- else {
- rmesa->radeon.TclFallback &= ~bit;
- if (oldfallback == bit) {
- if (R200_DEBUG & RADEON_FALLBACKS)
- fprintf(stderr, "R200 end tcl fallback %s\n",
- getFallbackString( bit ));
- transition_to_hwtnl( ctx );
- }
- }
+ r200ContextPtr rmesa = R200_CONTEXT(ctx);
+ GLuint oldfallback = rmesa->radeon.TclFallback;
+
+ if (mode) {
+ if (oldfallback == 0) {
+ /* We have to flush before transition */
+ if ( rmesa->radeon.dma.flush )
+ rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
+
+ if (R200_DEBUG & RADEON_FALLBACKS)
+ fprintf(stderr, "R200 begin tcl fallback %s\n",
+ getFallbackString( bit ));
+ rmesa->radeon.TclFallback |= bit;
+ transition_to_swtnl( ctx );
+ } else
+ rmesa->radeon.TclFallback |= bit;
+ } else {
+ if (oldfallback == bit) {
+ /* We have to flush before transition */
+ if ( rmesa->radeon.dma.flush )
+ rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
+
+ if (R200_DEBUG & RADEON_FALLBACKS)
+ fprintf(stderr, "R200 end tcl fallback %s\n",
+ getFallbackString( bit ));
+ rmesa->radeon.TclFallback &= ~bit;
+ transition_to_hwtnl( ctx );
+ } else
+ rmesa->radeon.TclFallback &= ~bit;
+ }
}
diff --git a/src/mesa/drivers/glslcompiler/Makefile b/src/mesa/drivers/glslcompiler/Makefile
index 080fe475c1..d3404988d5 100644
--- a/src/mesa/drivers/glslcompiler/Makefile
+++ b/src/mesa/drivers/glslcompiler/Makefile
@@ -10,9 +10,10 @@ PROGRAM = glslcompiler
OBJECTS = \
glslcompiler.o \
../../glapi/glapi.o \
+ ../../glapi/glapi_getproc.o \
+ ../../glapi/glapi_dispatch.o \
../../glapi/glapi_nop.o \
../../glapi/glthread.o \
- ../../main/dispatch.o \
../common/driverfuncs.o \
../../libmesa.a
diff --git a/src/mesa/drivers/x11/glxapi.c b/src/mesa/drivers/x11/glxapi.c
index e11aff1a84..955eba4e94 100644
--- a/src/mesa/drivers/x11/glxapi.c
+++ b/src/mesa/drivers/x11/glxapi.c
@@ -1113,7 +1113,7 @@ glXGetAGPOffsetMESA( const GLvoid *pointer )
/*** GLX_MESA_allocate_memory */
-void *
+void PUBLIC *
glXAllocateMemoryMESA(Display *dpy, int scrn, size_t size,
float readfreq, float writefreq, float priority)
{
@@ -1121,14 +1121,14 @@ glXAllocateMemoryMESA(Display *dpy, int scrn, size_t size,
return NULL;
}
-void
+void PUBLIC
glXFreeMemoryMESA(Display *dpy, int scrn, void *pointer)
{
/* dummy */
}
-GLuint
+GLuint PUBLIC
glXGetMemoryOffsetMESA(Display *dpy, int scrn, const void *pointer)
{
/* dummy */
@@ -1138,7 +1138,7 @@ glXGetMemoryOffsetMESA(Display *dpy, int scrn, const void *pointer)
/*** GLX_EXT_texture_from_pixmap */
-void
+void PUBLIC
glXBindTexImageEXT(Display *dpy, GLXDrawable drawable, int buffer,
const int *attrib_list)
{
@@ -1148,7 +1148,7 @@ glXBindTexImageEXT(Display *dpy, GLXDrawable drawable, int buffer,
t->BindTexImageEXT(dpy, drawable, buffer, attrib_list);
}
-void
+void PUBLIC
glXReleaseTexImageEXT(Display *dpy, GLXDrawable drawable, int buffer)
{
struct _glxapi_table *t;
@@ -1426,7 +1426,7 @@ _glxapi_get_proc_address(const char *funcName)
* This function does not get dispatched through the dispatch table
* since it's really a "meta" function.
*/
-__GLXextFuncPtr
+__GLXextFuncPtr PUBLIC
glXGetProcAddressARB(const GLubyte *procName)
{
__GLXextFuncPtr f;
@@ -1442,7 +1442,8 @@ glXGetProcAddressARB(const GLubyte *procName)
/* GLX 1.4 */
-void (*glXGetProcAddress(const GLubyte *procName))()
+void PUBLIC
+(*glXGetProcAddress(const GLubyte *procName))()
{
return glXGetProcAddressARB(procName);
}
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-16 01:30:30 +0000