diff options
Diffstat (limited to 'src/mesa/drivers')
21 files changed, 157 insertions, 74 deletions
diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c index fd12e4d0a6..2b00e8979d 100644 --- a/src/mesa/drivers/common/meta.c +++ b/src/mesa/drivers/common/meta.c @@ -48,6 +48,7 @@ #include "main/macros.h" #include "main/matrix.h" #include "main/mipmap.h" +#include "main/pbo.h" #include "main/polygon.h" #include "main/readpix.h" #include "main/scissor.h" diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 3e52304f6a..26a6388f34 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -424,8 +424,6 @@ struct brw_vertex_element { gl_vert_attrib attrib; /** Size of a complete element */ GLuint element_size; - /** Number of uploaded elements for this input. */ - GLuint count; /** Offset of the first element within the buffer object */ unsigned int offset; }; @@ -462,7 +460,7 @@ struct brw_context GLboolean has_negative_rhw_bug; GLboolean has_aa_line_parameters; GLboolean has_pln; -; + struct { struct brw_state_flags dirty; @@ -519,9 +517,9 @@ struct brw_context */ const struct _mesa_index_buffer *ib; - /* Updates to these fields are signaled by BRW_NEW_INDEX_BUFFER. */ + /* Updates are signaled by BRW_NEW_INDEX_BUFFER. */ drm_intel_bo *bo; - unsigned int offset; + GLuint type; /* Offset to index buffer index to use in CMD_3D_PRIM so that we can * avoid re-uploading the IB packet over and over if we're actually diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c index 7234ce210b..e96c32a93a 100644 --- a/src/mesa/drivers/dri/i965/brw_draw_upload.c +++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c @@ -208,7 +208,7 @@ static GLuint get_surface_type( GLenum type, GLuint size, case GL_UNSIGNED_SHORT: return ushort_types_scale[size]; case GL_UNSIGNED_BYTE: return ubyte_types_scale[size]; default: assert(0); return 0; - } + } } } @@ -225,11 +225,11 @@ static GLuint get_size( GLenum type ) case GL_UNSIGNED_INT: return sizeof(GLuint); case GL_UNSIGNED_SHORT: return sizeof(GLushort); case GL_UNSIGNED_BYTE: return sizeof(GLubyte); - default: return 0; - } + default: assert(0); return 0; + } } -static GLuint get_index_type(GLenum type) +static GLuint get_index_type(GLenum type) { switch (type) { case GL_UNSIGNED_BYTE: return BRW_INDEX_BYTE; @@ -240,43 +240,45 @@ static GLuint get_index_type(GLenum type) } static void -copy_array_to_vbo_array( struct brw_context *brw, - struct brw_vertex_element *element, - struct brw_vertex_buffer *buffer, - GLuint dst_stride) +copy_array_to_vbo_array(struct brw_context *brw, + struct brw_vertex_element *element, + int min, int max, + struct brw_vertex_buffer *buffer, + GLuint dst_stride) { - GLuint size = element->count * dst_stride; + int src_stride = element->glarray->StrideB; + const unsigned char *src = element->glarray->Ptr + min * src_stride; + int count = max - min + 1; + GLuint size = count * dst_stride; - buffer->stride = dst_stride; - if (dst_stride == element->glarray->StrideB) { - intel_upload_data(&brw->intel, element->glarray->Ptr, size, dst_stride, + if (dst_stride == src_stride) { + intel_upload_data(&brw->intel, src, size, dst_stride, &buffer->bo, &buffer->offset); } else { - const unsigned char *src = element->glarray->Ptr; - char *map = intel_upload_map(&brw->intel, size, dst_stride); + char * const map = intel_upload_map(&brw->intel, size, dst_stride); char *dst = map; - int i; - for (i = 0; i < element->count; i++) { + while (count--) { memcpy(dst, src, dst_stride); - src += element->glarray->StrideB; + src += src_stride; dst += dst_stride; } intel_upload_unmap(&brw->intel, map, size, dst_stride, &buffer->bo, &buffer->offset); } + buffer->stride = dst_stride; } static void brw_prepare_vertices(struct brw_context *brw) { struct gl_context *ctx = &brw->intel.ctx; struct intel_context *intel = intel_context(ctx); - GLbitfield vs_inputs = brw->vs.prog_data->inputs_read; + GLbitfield vs_inputs = brw->vs.prog_data->inputs_read; const unsigned char *ptr = NULL; - GLuint interleaved = 0, total_size = 0, count = -1; + GLuint interleaved = 0, total_size = 0; unsigned int min_index = brw->vb.min_index; unsigned int max_index = brw->vb.max_index; - int i, j; + int delta, i, j; struct brw_vertex_element *upload[VERT_ATTRIB_MAX]; GLuint nr_uploads = 0; @@ -293,7 +295,8 @@ static void brw_prepare_vertices(struct brw_context *brw) struct brw_vertex_element *input = &brw->vb.inputs[i]; vs_inputs &= ~(1 << i); - brw->vb.enabled[brw->vb.nr_enabled++] = input; + if (input->glarray->Size && get_size(input->glarray->Type)) + brw->vb.enabled[brw->vb.nr_enabled++] = input; } if (brw->vb.nr_enabled == 0) @@ -340,7 +343,8 @@ static void brw_prepare_vertices(struct brw_context *brw) struct brw_vertex_buffer *buffer = &brw->vb.buffers[j]; /* Named buffer object: Just reference its contents directly. */ - buffer->bo = intel_bufferobj_source(intel, intel_buffer, + buffer->bo = intel_bufferobj_source(intel, + intel_buffer, type_size, &buffer->offset); drm_intel_bo_reference(buffer->bo); buffer->offset += (uintptr_t)glarray->Ptr; @@ -349,7 +353,6 @@ static void brw_prepare_vertices(struct brw_context *brw) input->buffer = j++; input->offset = 0; } - input->count = glarray->_MaxElement; /* This is a common place to reach if the user mistakenly supplies * a pointer in place of a VBO offset. If we just let it go through, @@ -365,8 +368,6 @@ static void brw_prepare_vertices(struct brw_context *brw) */ assert(input->offset < brw->vb.buffers[input->buffer].bo->size); } else { - input->count = glarray->StrideB ? max_index + 1 : 1; - /* Queue the buffer object up to be uploaded in the next pass, * when we've decided if we're doing interleaved or not. */ @@ -386,30 +387,41 @@ static void brw_prepare_vertices(struct brw_context *brw) { interleaved = 0; } - else if (total_size & (type_size -1)) + else if ((uintptr_t)(glarray->Ptr - ptr) & (type_size -1)) { /* enforce natural alignment (for doubles) */ interleaved = 0; } - if (count > input->count) - count = input->count; - upload[nr_uploads++] = input; + total_size = ALIGN(total_size, type_size); total_size += input->element_size; } } + /* If we need to upload all the arrays, then we can trim those arrays to + * only the used elements [min_index, max_index] so long as we adjust all + * the values used in the 3DPRIMITIVE i.e. by setting the vertex bias. + */ + brw->vb.start_vertex_bias = 0; + delta = min_index; + if (nr_uploads == brw->vb.nr_enabled) { + brw->vb.start_vertex_bias = -delta; + delta = 0; + } + if (delta && !brw->intel.intelScreen->relaxed_relocations) + min_index = delta = 0; + /* Handle any arrays to be uploaded. */ if (nr_uploads > 1) { if (interleaved && interleaved <= 2*total_size) { + struct brw_vertex_buffer *buffer = &brw->vb.buffers[j]; /* All uploads are interleaved, so upload the arrays together as * interleaved. First, upload the contents and set up upload[0]. */ - upload[0]->count = count; /* trim the upload over all arrays */ - copy_array_to_vbo_array(brw, - upload[0], &brw->vb.buffers[j], - interleaved); + copy_array_to_vbo_array(brw, upload[0], min_index, max_index, + buffer, interleaved); + buffer->offset -= delta * interleaved; for (i = 0; i < nr_uploads; i++) { /* Then, just point upload[i] at upload[0]'s buffer. */ @@ -423,8 +435,9 @@ static void brw_prepare_vertices(struct brw_context *brw) } else if (total_size < 2048) { /* Upload non-interleaved arrays into a single interleaved array */ - struct brw_vertex_buffer *buffer = &brw->vb.buffers[j]; - int count = upload[0]->count, offset; + struct brw_vertex_buffer *buffer; + int count = max_index - min_index + 1; + int offset; char *map; map = intel_upload_map(&brw->intel, total_size * count, total_size); @@ -432,9 +445,13 @@ static void brw_prepare_vertices(struct brw_context *brw) const unsigned char *src = upload[i]->glarray->Ptr; int size = upload[i]->element_size; int stride = upload[i]->glarray->StrideB; - char *dst = map + offset; + char *dst; int n; + offset = ALIGN(offset, get_size(upload[i]->glarray->Type)); + dst = map + offset; + src += min_index * stride; + for (n = 0; n < count; n++) { memcpy(dst, src, size); src += stride; @@ -446,25 +463,27 @@ static void brw_prepare_vertices(struct brw_context *brw) offset += size; } - intel_upload_unmap(&brw->intel, map, total_size * count, total_size, + assert(offset == total_size); + buffer = &brw->vb.buffers[j++]; + intel_upload_unmap(&brw->intel, map, offset * count, offset, &buffer->bo, &buffer->offset); buffer->stride = offset; - j++; + buffer->offset -= delta * offset; nr_uploads = 0; } } /* Upload non-interleaved arrays */ for (i = 0; i < nr_uploads; i++) { - copy_array_to_vbo_array(brw, - upload[i], &brw->vb.buffers[j], - upload[i]->element_size); + struct brw_vertex_buffer *buffer = &brw->vb.buffers[j]; + copy_array_to_vbo_array(brw, upload[i], min_index, max_index, + buffer, upload[i]->element_size); + buffer->offset -= delta * buffer->stride; upload[i]->buffer = j++; upload[i]->offset = 0; } /* can we simply extend the current vb? */ - brw->vb.start_vertex_bias = 0; if (j == brw->vb.nr_current_buffers) { int delta = 0; for (i = 0; i < j; i++) { @@ -475,14 +494,14 @@ static void brw_prepare_vertices(struct brw_context *brw) break; d = brw->vb.buffers[i].offset - brw->vb.current_buffers[i].offset; - if (delta == 0) + if (i == 0) delta = d / brw->vb.current_buffers[i].stride; if (delta * brw->vb.current_buffers[i].stride != d) break; } if (i == j) { - brw->vb.start_vertex_bias = delta; + brw->vb.start_vertex_bias += delta; while (--j >= 0) drm_intel_bo_unreference(brw->vb.buffers[j].bo); j = 0; @@ -652,7 +671,6 @@ static void brw_prepare_indices(struct brw_context *brw) intel_upload_data(&brw->intel, index_buffer->ptr, ib_size, ib_type_size, &bo, &offset); brw->ib.start_vertex_offset = offset / ib_type_size; - offset = 0; } else { offset = (GLuint) (unsigned long) index_buffer->ptr; @@ -669,7 +687,6 @@ static void brw_prepare_indices(struct brw_context *brw) intel_upload_data(&brw->intel, map, ib_size, ib_type_size, &bo, &offset); brw->ib.start_vertex_offset = offset / ib_type_size; - offset = 0; ctx->Driver.UnmapBuffer(ctx, GL_ELEMENT_ARRAY_BUFFER_ARB, bufferobj); } else { @@ -679,22 +696,30 @@ static void brw_prepare_indices(struct brw_context *brw) */ brw->ib.start_vertex_offset = offset / ib_type_size; - bo = intel_bufferobj_source(intel, intel_buffer_object(bufferobj), + bo = intel_bufferobj_source(intel, + intel_buffer_object(bufferobj), + ib_type_size, &offset); drm_intel_bo_reference(bo); + + brw->ib.start_vertex_offset += offset / ib_type_size; } } - if (brw->ib.bo != bo || brw->ib.offset != offset) { + if (brw->ib.bo != bo) { drm_intel_bo_unreference(brw->ib.bo); brw->ib.bo = bo; - brw->ib.offset = offset; brw_add_validated_bo(brw, brw->ib.bo); brw->state.dirty.brw |= BRW_NEW_INDEX_BUFFER; } else { drm_intel_bo_unreference(bo); } + + if (index_buffer->type != brw->ib.type) { + brw->ib.type = index_buffer->type; + brw->state.dirty.brw |= BRW_NEW_INDEX_BUFFER; + } } const struct brw_tracked_state brw_indices = { @@ -721,7 +746,7 @@ static void brw_emit_index_buffer(struct brw_context *brw) 1); OUT_RELOC(brw->ib.bo, I915_GEM_DOMAIN_VERTEX, 0, - brw->ib.offset); + 0); OUT_RELOC(brw->ib.bo, I915_GEM_DOMAIN_VERTEX, 0, brw->ib.bo->size - 1); diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 9bdcda780e..ce7959b19d 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -495,7 +495,7 @@ fs_visitor::emit_fragcoord_interpolation(ir_variable *ir) wpos.reg_offset++; /* gl_FragCoord.w: Already set up in emit_interpolation */ - emit(fs_inst(BRW_OPCODE_MOV, wpos, this->pixel_w)); + emit(fs_inst(BRW_OPCODE_MOV, wpos, this->wpos_w)); return reg; } diff --git a/src/mesa/drivers/dri/i965/brw_urb.c b/src/mesa/drivers/dri/i965/brw_urb.c index dfc1551aca..b0419d8a42 100644 --- a/src/mesa/drivers/dri/i965/brw_urb.c +++ b/src/mesa/drivers/dri/i965/brw_urb.c @@ -248,5 +248,13 @@ void brw_upload_urb_fence(struct brw_context *brw) uf.bits1.sf_fence = brw->urb.cs_start; uf.bits1.cs_fence = brw->urb.size; + /* erratum: URB_FENCE must not cross a 64byte cacheline */ + if ((brw->intel.batch.used & 15) > 12) { + int pad = 16 - (brw->intel.batch.used & 15); + do + brw->intel.batch.map[brw->intel.batch.used++] = MI_NOOP; + while (--pad); + } + BRW_BATCH_STRUCT(brw, &uf); } diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c index 0411ce0b36..6ec62554cc 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_emit.c +++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c @@ -1561,6 +1561,7 @@ static void emit_vertex_write( struct brw_vs_compile *c) int eot; GLuint len_vertex_header = 2; int next_mrf, i; + int msg_len; if (c->key.copy_edgeflag) { brw_MOV(p, @@ -1727,13 +1728,20 @@ static void emit_vertex_write( struct brw_vs_compile *c) eot = (c->first_overflow_output == 0); + msg_len = c->nr_outputs + 2 + len_vertex_header; + if (intel->gen >= 6) { + /* interleaved urb write message length for gen6 should be multiple of 2 */ + if ((msg_len % 2) != 0) + msg_len++; + } + brw_urb_WRITE(p, brw_null_reg(), /* dest */ 0, /* starting mrf reg nr */ c->r0, /* src */ 0, /* allocate */ 1, /* used */ - MIN2(c->nr_outputs + 1 + len_vertex_header, (BRW_MAX_MRF-1)), /* msg len */ + MIN2(msg_len - 1, (BRW_MAX_MRF - 1)), /* msg len */ 0, /* response len */ eot, /* eot */ eot, /* writes complete */ diff --git a/src/mesa/drivers/dri/i965/gen6_urb.c b/src/mesa/drivers/dri/i965/gen6_urb.c index fc46c4cb79..c3819f9b36 100644 --- a/src/mesa/drivers/dri/i965/gen6_urb.c +++ b/src/mesa/drivers/dri/i965/gen6_urb.c @@ -34,19 +34,26 @@ static void prepare_urb( struct brw_context *brw ) { - brw->urb.nr_vs_entries = 24; - if (brw->gs.prog_bo) - brw->urb.nr_gs_entries = 4; - else - brw->urb.nr_gs_entries = 0; + int urb_size, max_urb_entry; + struct intel_context *intel = &brw->intel; + + if (IS_GT1(intel->intelScreen->deviceID)) { + urb_size = 32 * 1024; + max_urb_entry = 128; + } else { + urb_size = 64 * 1024; + max_urb_entry = 256; + } + + brw->urb.nr_vs_entries = max_urb_entry; + brw->urb.nr_gs_entries = max_urb_entry; + /* CACHE_NEW_VS_PROG */ brw->urb.vs_size = MAX2(brw->vs.prog_data->urb_entry_size, 1); - /* Check that the number of URB rows (8 floats each) allocated is less - * than the URB space. - */ - assert((brw->urb.nr_vs_entries + - brw->urb.nr_gs_entries) * brw->urb.vs_size * 8 < 64 * 1024); + if (2 * brw->urb.vs_size > urb_size) + brw->urb.nr_vs_entries = brw->urb.nr_gs_entries = + (urb_size ) / (2 * brw->urb.vs_size); } static void diff --git a/src/mesa/drivers/dri/i965/gen6_vs_state.c b/src/mesa/drivers/dri/i965/gen6_vs_state.c index e68c0ac261..ce0b8ea7ea 100644 --- a/src/mesa/drivers/dri/i965/gen6_vs_state.c +++ b/src/mesa/drivers/dri/i965/gen6_vs_state.c @@ -136,7 +136,8 @@ upload_vs_state(struct brw_context *brw) OUT_BATCH((1 << GEN6_VS_DISPATCH_START_GRF_SHIFT) | (brw->vs.prog_data->urb_read_length << GEN6_VS_URB_READ_LENGTH_SHIFT) | (0 << GEN6_VS_URB_ENTRY_READ_OFFSET_SHIFT)); - OUT_BATCH((0 << GEN6_VS_MAX_THREADS_SHIFT) | + + OUT_BATCH(((60 - 1) << GEN6_VS_MAX_THREADS_SHIFT) | /* max 60 threads for gen6 */ GEN6_VS_STATISTICS_ENABLE | GEN6_VS_ENABLE); ADVANCE_BATCH(); diff --git a/src/mesa/drivers/dri/intel/intel_buffer_objects.c b/src/mesa/drivers/dri/intel/intel_buffer_objects.c index 2f750a768a..439d6fc824 100644 --- a/src/mesa/drivers/dri/intel/intel_buffer_objects.c +++ b/src/mesa/drivers/dri/intel/intel_buffer_objects.c @@ -723,11 +723,11 @@ void intel_upload_unmap(struct intel_context *intel, drm_intel_bo * intel_bufferobj_source(struct intel_context *intel, struct intel_buffer_object *intel_obj, - GLuint *offset) + GLuint align, GLuint *offset) { if (intel_obj->buffer == NULL) { intel_upload_data(intel, - intel_obj->sys_buffer, intel_obj->Base.Size, 64, + intel_obj->sys_buffer, intel_obj->Base.Size, align, &intel_obj->buffer, &intel_obj->offset); intel_obj->source = 1; } @@ -782,7 +782,7 @@ intel_bufferobj_copy_subdata(struct gl_context *ctx, /* Otherwise, we have real BOs, so blit them. */ dst_bo = intel_bufferobj_buffer(intel, intel_dst, INTEL_WRITE_PART); - src_bo = intel_bufferobj_source(intel, intel_src, &src_offset); + src_bo = intel_bufferobj_source(intel, intel_src, 64, &src_offset); intel_emit_linear_blit(intel, dst_bo, write_offset, diff --git a/src/mesa/drivers/dri/intel/intel_buffer_objects.h b/src/mesa/drivers/dri/intel/intel_buffer_objects.h index 3ec3a52138..81ee21f062 100644 --- a/src/mesa/drivers/dri/intel/intel_buffer_objects.h +++ b/src/mesa/drivers/dri/intel/intel_buffer_objects.h @@ -68,6 +68,7 @@ drm_intel_bo *intel_bufferobj_buffer(struct intel_context *intel, GLuint flag); drm_intel_bo *intel_bufferobj_source(struct intel_context *intel, struct intel_buffer_object *obj, + GLuint align, GLuint *offset); void intel_upload_data(struct intel_context *intel, diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h b/src/mesa/drivers/dri/intel/intel_chipset.h index 4fecdbed20..4ff9140d56 100644 --- a/src/mesa/drivers/dri/intel/intel_chipset.h +++ b/src/mesa/drivers/dri/intel/intel_chipset.h @@ -133,6 +133,10 @@ devid == PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS || \ devid == PCI_CHIP_SANDYBRIDGE_S) +#define IS_GT1(devid) (devid == PCI_CHIP_SANDYBRIDGE_GT1 || \ + devid == PCI_CHIP_SANDYBRIDGE_M_GT1 || \ + devid == PCI_CHIP_SANDYBRIDGE_S) + #define IS_965(devid) (IS_GEN4(devid) || \ IS_G4X(devid) || \ IS_GEN5(devid) || \ diff --git a/src/mesa/drivers/dri/intel/intel_decode.c b/src/mesa/drivers/dri/intel/intel_decode.c index 25b4131594..688b8fee64 100644 --- a/src/mesa/drivers/dri/intel/intel_decode.c +++ b/src/mesa/drivers/dri/intel/intel_decode.c @@ -1601,10 +1601,12 @@ decode_3d_965(uint32_t *data, int count, uint32_t hw_offset, uint32_t devid, int { 0x790a, 3, 3, "3DSTATE_AA_LINE_PARAMETERS" }, { 0x790b, 4, 4, "3DSTATE_GS_SVB_INDEX" }, { 0x790d, 3, 3, "3DSTATE_MULTISAMPLE" }, + { 0x7910, 2, 2, "3DSTATE_CLEAR_PARAMS" }, { 0x7b00, 6, 6, "3DPRIMITIVE" }, { 0x7802, 4, 4, "3DSTATE_SAMPLER_STATE_POINTERS" }, { 0x7805, 3, 3, "3DSTATE_URB" }, { 0x780e, 4, 4, "3DSTATE_CC_STATE_POINTERS" }, + { 0x780f, 2, 2, "3DSTATE_SCISSOR_STATE_POINTERS" }, { 0x7810, 6, 6, "3DSTATE_VS_STATE" }, { 0x7811, 7, 7, "3DSTATE_GS_STATE" }, { 0x7812, 4, 4, "3DSTATE_CLIP_STATE" }, diff --git a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c index d7561ee689..d398775906 100644 --- a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c +++ b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c @@ -31,6 +31,7 @@ #include "main/colormac.h" #include "main/mtypes.h" #include "main/macros.h" +#include "main/pbo.h" #include "main/bufferobj.h" #include "main/state.h" #include "main/texobj.h" diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c index 746da462ee..5c95c72732 100644 --- a/src/mesa/drivers/dri/intel/intel_screen.c +++ b/src/mesa/drivers/dri/intel/intel_screen.c @@ -309,6 +309,13 @@ intel_get_param(__DRIscreen *psp, int param, int *value) return GL_TRUE; } +static GLboolean +intel_get_boolean(__DRIscreen *psp, int param) +{ + int value = 0; + return intel_get_param(psp, param, &value) && value; +} + static void nop_callback(GLuint key, void *data, void *userData) { @@ -482,6 +489,10 @@ intel_init_bufmgr(struct intel_screen *intelScreen) intelScreen->named_regions = _mesa_NewHashTable(); + intelScreen->relaxed_relocations = 0; + intelScreen->relaxed_relocations |= + intel_get_boolean(spriv, I915_PARAM_HAS_RELAXED_DELTA) << 0; + return GL_TRUE; } diff --git a/src/mesa/drivers/dri/intel/intel_screen.h b/src/mesa/drivers/dri/intel/intel_screen.h index 5863093f00..0f0b5be56d 100644 --- a/src/mesa/drivers/dri/intel/intel_screen.h +++ b/src/mesa/drivers/dri/intel/intel_screen.h @@ -43,6 +43,7 @@ struct intel_screen __DRIscreen *driScrnPriv; GLboolean no_hw; + GLuint relaxed_relocations; GLboolean no_vbo; dri_bufmgr *bufmgr; diff --git a/src/mesa/drivers/dri/intel/intel_tex_copy.c b/src/mesa/drivers/dri/intel/intel_tex_copy.c index 136d8e1d0a..62d4169acd 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_copy.c +++ b/src/mesa/drivers/dri/intel/intel_tex_copy.c @@ -77,6 +77,7 @@ intel_copy_texsubimage(struct intel_context *intel, { struct gl_context *ctx = &intel->ctx; struct intel_renderbuffer *irb; + bool copy_supported = false; bool copy_supported_with_alpha_override = false; intel_prepare_render(intel); @@ -89,13 +90,21 @@ intel_copy_texsubimage(struct intel_context *intel, return GL_FALSE; } + copy_supported = intelImage->base.TexFormat == irb->Base.Format; + + /* Converting ARGB8888 to XRGB8888 is trivial: ignore the alpha bits */ + if (irb->Base.Format == MESA_FORMAT_ARGB8888 && + intelImage->base.TexFormat == MESA_FORMAT_XRGB8888) { + copy_supported = true; + } + + /* Converting XRGB8888 to ARGB8888 requires setting the alpha bits to 1.0 */ if (irb->Base.Format == MESA_FORMAT_XRGB8888 && intelImage->base.TexFormat == MESA_FORMAT_ARGB8888) { copy_supported_with_alpha_override = true; } - if (intelImage->base.TexFormat != irb->Base.Format && - !copy_supported_with_alpha_override) { + if (!copy_supported && !copy_supported_with_alpha_override) { if (unlikely(INTEL_DEBUG & DEBUG_FALLBACKS)) fprintf(stderr, "%s mismatched formats %s, %s\n", __FUNCTION__, diff --git a/src/mesa/drivers/dri/intel/intel_tex_image.c b/src/mesa/drivers/dri/intel/intel_tex_image.c index 9dba529c58..906f8a6271 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_image.c +++ b/src/mesa/drivers/dri/intel/intel_tex_image.c @@ -7,6 +7,7 @@ #include "main/bufferobj.h" #include "main/context.h" #include "main/formats.h" +#include "main/pbo.h" #include "main/texcompress.h" #include "main/texstore.h" #include "main/texgetimage.h" @@ -236,7 +237,8 @@ try_pbo_upload(struct intel_context *intel, { GLuint offset; - drm_intel_bo *src_buffer = intel_bufferobj_source(intel, pbo, &offset); + drm_intel_bo *src_buffer = + intel_bufferobj_source(intel, pbo, 64, &offset); if (!intelEmitCopyBlit(intel, intelImage->mt->cpp, diff --git a/src/mesa/drivers/dri/intel/intel_tex_subimage.c b/src/mesa/drivers/dri/intel/intel_tex_subimage.c index c9b992a21b..6b7f13ff35 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_subimage.c +++ b/src/mesa/drivers/dri/intel/intel_tex_subimage.c @@ -27,6 +27,7 @@ **************************************************************************/ #include "main/mtypes.h" +#include "main/pbo.h" #include "main/texobj.h" #include "main/texstore.h" #include "main/texcompress.h" diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c index cf85a5bb57..9ec53881bb 100644 --- a/src/mesa/drivers/dri/radeon/radeon_texture.c +++ b/src/mesa/drivers/dri/radeon/radeon_texture.c @@ -35,6 +35,7 @@ #include "main/enums.h" #include "main/mfeatures.h" #include "main/mipmap.h" +#include "main/pbo.h" #include "main/texcompress.h" #include "main/texstore.h" #include "main/teximage.h" diff --git a/src/mesa/drivers/dri/unichrome/via_tex.c b/src/mesa/drivers/dri/unichrome/via_tex.c index 18fb8f33b9..a2fb010e14 100644 --- a/src/mesa/drivers/dri/unichrome/via_tex.c +++ b/src/mesa/drivers/dri/unichrome/via_tex.c @@ -34,6 +34,7 @@ #include "main/context.h" #include "main/mipmap.h" #include "main/mm.h" +#include "main/pbo.h" #include "main/simple_list.h" #include "main/texobj.h" #include "main/texstore.h" diff --git a/src/mesa/drivers/x11/xm_dd.c b/src/mesa/drivers/x11/xm_dd.c index b8d9e20c42..3031b7b327 100644 --- a/src/mesa/drivers/x11/xm_dd.c +++ b/src/mesa/drivers/x11/xm_dd.c @@ -41,6 +41,7 @@ #include "main/image.h" #include "main/imports.h" #include "main/mtypes.h" +#include "main/pbo.h" #include "main/state.h" #include "main/texobj.h" #include "main/teximage.h" |