diff options
Diffstat (limited to 'src/mesa')
-rw-r--r-- | src/mesa/drivers/dri/r300/r300_cmdbuf.c | 64 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r300/r300_context.h | 10 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r300/r300_render.c | 9 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r300/r300_state.c | 73 |
4 files changed, 92 insertions, 64 deletions
diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.c b/src/mesa/drivers/dri/r300/r300_cmdbuf.c index 060c3e253d..7c57d128ae 100644 --- a/src/mesa/drivers/dri/r300/r300_cmdbuf.c +++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.c @@ -356,6 +356,8 @@ void r300InitCmdBuf(r300ContextPtr r300) ALLOC_STATE( fp, always, R300_FP_CMDSIZE, "fp", 0 ); r300->hw.fp.cmd[R300_FP_CMD_0] = cmducs(R300_PFS_CNTL_0, 3); r300->hw.fp.cmd[R300_FP_CMD_1] = cmducs(R300_PFS_NODE_0, 4); + ALLOC_STATE( fpt, variable, R300_FPT_CMDSIZE, "fpt", 0 ); + r300->hw.fpt.cmd[R300_FPT_CMD_0] = cmducs(R300_PFS_TEXI_0, 0); ALLOC_STATE( unk46A4, always, 6, "unk46A4", 0 ); r300->hw.unk46A4.cmd[0] = cmducs(0x46A4, 5); ALLOC_STATE( fpi[0], variable, R300_FPI_CMDSIZE, "fpi/0", 0 ); @@ -374,6 +376,8 @@ void r300InitCmdBuf(r300ContextPtr r300) r300->hw.at.cmd[R300_AT_CMD_0] = cmducs(R300_PP_ALPHA_TEST, 1); ALLOC_STATE( unk4BD8, always, 2, "unk4BD8", 0 ); r300->hw.unk4BD8.cmd[0] = cmducs(0x4BD8, 1); + ALLOC_STATE( fpp, variable, R300_FPP_CMDSIZE, "fpp", 0 ); + r300->hw.fpp.cmd[R300_FPP_CMD_0] = cmducs(R300_PFS_PARAM_0_X, 0); ALLOC_STATE( unk4E00, always, 2, "unk4E00", 0 ); r300->hw.unk4E00.cmd[0] = cmducs(0x4E00, 1); ALLOC_STATE( bld, always, R300_BLD_CMDSIZE, "bld", 0 ); @@ -477,6 +481,7 @@ void r300InitCmdBuf(r300ContextPtr r300) insert_at_tail(&r300->hw.atomlist, &r300->hw.unk43A4); insert_at_tail(&r300->hw.atomlist, &r300->hw.unk43E8); insert_at_tail(&r300->hw.atomlist, &r300->hw.fp); + insert_at_tail(&r300->hw.atomlist, &r300->hw.fpt); insert_at_tail(&r300->hw.atomlist, &r300->hw.unk46A4); insert_at_tail(&r300->hw.atomlist, &r300->hw.fpi[0]); insert_at_tail(&r300->hw.atomlist, &r300->hw.fpi[1]); @@ -486,6 +491,7 @@ void r300InitCmdBuf(r300ContextPtr r300) insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4BC8); insert_at_tail(&r300->hw.atomlist, &r300->hw.at); insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4BD8); + insert_at_tail(&r300->hw.atomlist, &r300->hw.fpp); insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4E00); insert_at_tail(&r300->hw.atomlist, &r300->hw.bld); insert_at_tail(&r300->hw.atomlist, &r300->hw.cmk); @@ -645,61 +651,3 @@ e32(RADEON_CP_PACKET2); e32(RADEON_CP_PACKET2); #endif } - -void r300EmitPixelShader(r300ContextPtr rmesa) -{ -int i,k; -LOCAL_VARS - -if(rmesa->state.pixel_shader.program.tex.length>0){ - reg_start(R300_PFS_TEXI_0, rmesa->state.pixel_shader.program.tex.length-1); - for(i=0;i<rmesa->state.pixel_shader.program.tex.length;i++) - e32(rmesa->state.pixel_shader.program.tex.inst[i]); - } - -if(rmesa->state.pixel_shader.program.alu.length>0){ - #define OUTPUT_FIELD(reg, field) \ - reg_start(reg,rmesa->state.pixel_shader.program.alu.length-1); \ - for(i=0;i<rmesa->state.pixel_shader.program.alu.length;i++) \ - e32(rmesa->state.pixel_shader.program.alu.inst[i].field); - - OUTPUT_FIELD(R300_PFS_INSTR0_0, inst0); - OUTPUT_FIELD(R300_PFS_INSTR1_0, inst1); - OUTPUT_FIELD(R300_PFS_INSTR2_0, inst2); - OUTPUT_FIELD(R300_PFS_INSTR3_0, inst3); - #undef OUTPUT_FIELD - } - -reg_start(R300_PFS_NODE_0, 3); -for(i=0;i<4;i++){ - e32( (rmesa->state.pixel_shader.program.node[i].alu_offset << R300_PFS_NODE_ALU_OFFSET_SHIFT) - | (rmesa->state.pixel_shader.program.node[i].alu_end << R300_PFS_NODE_ALU_END_SHIFT) - | (rmesa->state.pixel_shader.program.node[i].tex_offset << R300_PFS_NODE_TEX_OFFSET_SHIFT) - | (rmesa->state.pixel_shader.program.node[i].tex_end << R300_PFS_NODE_TEX_END_SHIFT) - | ( (i==3) ? R300_PFS_NODE_LAST_NODE : 0) - ); - } - -reg_start(R300_PFS_CNTL_0, 2); - /* PFS_CNTL_0 */ -e32((rmesa->state.pixel_shader.program.active_nodes-1) | (rmesa->state.pixel_shader.program.first_node_has_tex<<3)); - /* PFS_CNTL_1 */ -e32(rmesa->state.pixel_shader.program.temp_register_count); - /* PFS_CNTL_2 */ -e32( (rmesa->state.pixel_shader.program.alu_offset << R300_PFS_CNTL_ALU_OFFSET_SHIFT) - | (rmesa->state.pixel_shader.program.alu_end << R300_PFS_CNTL_ALU_END_SHIFT) - | (rmesa->state.pixel_shader.program.tex_offset << R300_PFS_CNTL_TEX_OFFSET_SHIFT) - | (rmesa->state.pixel_shader.program.tex_end << R300_PFS_CNTL_TEX_END_SHIFT) - ); - -if(rmesa->state.pixel_shader.param_length>0){ - reg_start(R300_PFS_PARAM_0_X, rmesa->state.pixel_shader.param_length*4-1); - for(i=0;i<rmesa->state.pixel_shader.param_length;i++){ - efloat(rmesa->state.pixel_shader.param[i].x); - efloat(rmesa->state.pixel_shader.param[i].y); - efloat(rmesa->state.pixel_shader.param[i].z); - efloat(rmesa->state.pixel_shader.param[i].w); - } - } - -} diff --git a/src/mesa/drivers/dri/r300/r300_context.h b/src/mesa/drivers/dri/r300/r300_context.h index b2805a9e59..bee36f08b3 100644 --- a/src/mesa/drivers/dri/r300/r300_context.h +++ b/src/mesa/drivers/dri/r300/r300_context.h @@ -300,10 +300,18 @@ struct r300_state_atom { #define R300_FP_NODE3 8 #define R300_FP_CMDSIZE 9 +#define R300_FPT_CMD_0 0 +#define R300_FPT_INSTR_0 1 +#define R300_FPT_CMDSIZE 65 + #define R300_FPI_CMD_0 0 #define R300_FPI_INSTR_0 1 #define R300_FPI_CMDSIZE 65 +#define R300_FPP_CMD_0 0 +#define R300_FPP_PARAM_0 1 +#define R300_FPP_CMDSIZE (32*4+1) + #define R300_AT_CMD_0 0 #define R300_AT_ALPHA_TEST 1 #define R300_AT_CMDSIZE 2 @@ -398,12 +406,14 @@ struct r300_hw_state { struct r300_state_atom unk43A4; /* (43A4) */ struct r300_state_atom unk43E8; /* (43E8) */ struct r300_state_atom fp; /* fragment program cntl + nodes (4600) */ + struct r300_state_atom fpt; /* texi - (4620) */ struct r300_state_atom unk46A4; /* (46A4) */ struct r300_state_atom fpi[4]; /* fp instructions (46C0/47C0/48C0/49C0) */ struct r300_state_atom unk4BC0; /* (4BC0) */ struct r300_state_atom unk4BC8; /* (4BC8) */ struct r300_state_atom at; /* alpha test (4BD4) */ struct r300_state_atom unk4BD8; /* (4BD8) */ + struct r300_state_atom fpp; /* 0x4C00 and following */ struct r300_state_atom unk4E00; /* (4E00) */ struct r300_state_atom bld; /* blending (4E04) */ struct r300_state_atom cmk; /* colormask (4E0C) */ diff --git a/src/mesa/drivers/dri/r300/r300_render.c b/src/mesa/drivers/dri/r300/r300_render.c index 4ca5f0af59..eb1df1dfb5 100644 --- a/src/mesa/drivers/dri/r300/r300_render.c +++ b/src/mesa/drivers/dri/r300/r300_render.c @@ -298,8 +298,8 @@ static GLboolean r300_run_immediate_render(GLcontext *ctx, | R300_VPORT_Y_SCALE_ENA | R300_VPORT_Y_OFFSET_ENA | R300_VTX_W0_FMT; - #endif R300_STATECHANGE(rmesa, vte); + #endif /* Magic register - note it is right after 20b0 */ @@ -308,15 +308,12 @@ static GLboolean r300_run_immediate_render(GLcontext *ctx, reg_start(0x20b4,0); e32(0x0000000c); - assign_pipeline(rmesa, &SINGLE_TEXTURE_PIPELINE); - } else { - assign_pipeline(rmesa, &FLAT_COLOR_PIPELINE); } - + r300SetupVertexShader(rmesa); + r300SetupPixelShader(rmesa); r300EmitState(rmesa); - r300EmitPixelShader(rmesa); #if 0 reg_start(R300_RB3D_COLORMASK, 0); diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c index 961df73aa5..994a4455a2 100644 --- a/src/mesa/drivers/dri/r300/r300_state.c +++ b/src/mesa/drivers/dri/r300/r300_state.c @@ -1175,6 +1175,78 @@ void r300SetupVertexShader(r300ContextPtr rmesa) #endif } +void r300SetupPixelShader(r300ContextPtr rmesa) +{ +int i,k; + + /* This needs to be replaced by pixel shader generation code */ + + + /* Watch out ! This is buggy .. but will do for now */ + + /* At least one sanity check is in order */ + if(sizeof(rmesa->state.pixel_shader) != sizeof(FLAT_COLOR_PIPELINE.pixel_shader)){ + fprintf(stderr, "Aieee ! pixel_shader sizes don't match.\n"); + exit(-1); + } + /* textures enabled ? */ + if(rmesa->state.texture.tc_count>0){ + memcpy(&rmesa->state.pixel_shader, &(SINGLE_TEXTURE_PIPELINE.pixel_shader), sizeof(rmesa->state.pixel_shader)); + } else { + memcpy(&rmesa->state.pixel_shader, &(FLAT_COLOR_PIPELINE.pixel_shader), sizeof(rmesa->state.pixel_shader)); + } + + R300_STATECHANGE(rmesa, fpt); + for(i=0;i<rmesa->state.pixel_shader.program.tex.length;i++) + rmesa->hw.fpt.cmd[R300_FPT_INSTR_0+i]=rmesa->state.pixel_shader.program.tex.inst[i]; + rmesa->hw.fpt.cmd[R300_FPT_CMD_0]=cmducs(R300_PFS_TEXI_0, rmesa->state.pixel_shader.program.tex.length); + + #define OUTPUT_FIELD(st, reg, field) \ + R300_STATECHANGE(rmesa, st); \ + for(i=0;i<rmesa->state.pixel_shader.program.alu.length;i++) \ + rmesa->hw.st.cmd[R300_FPI_INSTR_0+i]=rmesa->state.pixel_shader.program.alu.inst[i].field;\ + rmesa->hw.st.cmd[R300_FPI_CMD_0]=cmducs(reg, rmesa->state.pixel_shader.program.alu.length); + + OUTPUT_FIELD(fpi[0], R300_PFS_INSTR0_0, inst0); + OUTPUT_FIELD(fpi[1], R300_PFS_INSTR1_0, inst1); + OUTPUT_FIELD(fpi[2], R300_PFS_INSTR2_0, inst2); + OUTPUT_FIELD(fpi[3], R300_PFS_INSTR3_0, inst3); + #undef OUTPUT_FIELD + + R300_STATECHANGE(rmesa, fp); + for(i=0;i<4;i++){ + rmesa->hw.fp.cmd[R300_FP_NODE0+i]= + (rmesa->state.pixel_shader.program.node[i].alu_offset << R300_PFS_NODE_ALU_OFFSET_SHIFT) + | (rmesa->state.pixel_shader.program.node[i].alu_end << R300_PFS_NODE_ALU_END_SHIFT) + | (rmesa->state.pixel_shader.program.node[i].tex_offset << R300_PFS_NODE_TEX_OFFSET_SHIFT) + | (rmesa->state.pixel_shader.program.node[i].tex_end << R300_PFS_NODE_TEX_END_SHIFT) + | ( (i==3) ? R300_PFS_NODE_LAST_NODE : 0); + } + + /* PFS_CNTL_0 */ + rmesa->hw.fp.cmd[R300_FP_CNTL0]= + (rmesa->state.pixel_shader.program.active_nodes-1) + | (rmesa->state.pixel_shader.program.first_node_has_tex<<3); + /* PFS_CNTL_1 */ + rmesa->hw.fp.cmd[R300_FP_CNTL1]=rmesa->state.pixel_shader.program.temp_register_count; + /* PFS_CNTL_2 */ + rmesa->hw.fp.cmd[R300_FP_CNTL2]= + (rmesa->state.pixel_shader.program.alu_offset << R300_PFS_CNTL_ALU_OFFSET_SHIFT) + | (rmesa->state.pixel_shader.program.alu_end << R300_PFS_CNTL_ALU_END_SHIFT) + | (rmesa->state.pixel_shader.program.tex_offset << R300_PFS_CNTL_TEX_OFFSET_SHIFT) + | (rmesa->state.pixel_shader.program.tex_end << R300_PFS_CNTL_TEX_END_SHIFT); + + R300_STATECHANGE(rmesa, fpp); + for(i=0;i<rmesa->state.pixel_shader.param_length;i++){ + rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+0]=r300PackFloat32(rmesa->state.pixel_shader.param[i].x); + rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+1]=r300PackFloat32(rmesa->state.pixel_shader.param[i].y); + rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+2]=r300PackFloat32(rmesa->state.pixel_shader.param[i].z); + rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+3]=r300PackFloat32(rmesa->state.pixel_shader.param[i].w); + } + rmesa->hw.fpp.cmd[R300_FPP_CMD_0]=cmducs(R300_PFS_PARAM_0_X, rmesa->state.pixel_shader.param_length); + +} + /** * Called by Mesa after an internal state update. */ @@ -1225,6 +1297,7 @@ void r300ResetHwState(r300ContextPtr r300) r300_setup_rs_unit(ctx); r300SetupVertexShader(r300); + r300SetupPixelShader(r300); r300_set_blend_state(ctx); r300AlphaFunc(ctx, ctx->Color.AlphaFunc, ctx->Color.AlphaRef); |